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Signal Processing Architectures, 2008

This document contains an exam for a signal processing architectures course. It has two sections. Section 1 covers topics like digital signal processing fundamentals, Fourier transforms, the DFT algorithm, and multirate systems. Section 2 covers digital filters, DSP processor architectures like TMS320C67XX and TMS320C54XX, and topics like quadrature mirror filters and development tools. The exam contains 6 questions, with students required to answer 2 from each section. Questions involve deriving equations, designing filters meeting specifications, explaining DSP concepts and processor architectures, and short notes.

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Rajesh Ket
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81 views2 pages

Signal Processing Architectures, 2008

This document contains an exam for a signal processing architectures course. It has two sections. Section 1 covers topics like digital signal processing fundamentals, Fourier transforms, the DFT algorithm, and multirate systems. Section 2 covers digital filters, DSP processor architectures like TMS320C67XX and TMS320C54XX, and topics like quadrature mirror filters and development tools. The exam contains 6 questions, with students required to answer 2 from each section. Questions involve deriving equations, designing filters meeting specifications, explaining DSP concepts and processor architectures, and short notes.

Uploaded by

Rajesh Ket
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Total No.

of Questions : 6]

P4090

SEAT No. :
[Total No. of Pages : 2

[4860] - 269
M.E. (Electronics) (Digital Systems)
SIGNAL PROCESSING ARCHITECTURES
(2008 Pattern)

Time : 3 Hours]
[Max. Marks : 100
Instructions to the candidates:
1) Answers to the two sections must be written in separate answer papers.
2) Answer any two questions from each section.
3) Figure to the right indicates full marks.
4) Assume suitable data if necessary.

Q1) a)
b)
c)

Q2) a)

b)
c)

Q3) a)
b)
c)

SECTION - I
Explain DSP with block diagram and also explain advantages and
disadvantages of digital over analog signal processing.
[8]
Explain the relation between Fourier transform and Z transform.
[8]
Derive and the equations for DIT FFT radix-2 algorithm. Draw the butterfly
diagram for the same. Justify how FET is faster than DFT.
[9]
Determine 4 pt. DFT of the given DT signals. Also plot their magnitude
and phase spectra.
[8]
i) x[n] = {0.2,0.3,0.4,0.5}
ii) x[n]={4,2,1}
Compute circular convolution using DFT and IDFT for the following
sequence. x1[n] = {2,l,l, 3 and x2[n]={2,l,1,5}
[8]
Design low pass FIR filter using rectangular window with passband gain
of unity, cut off frequency of 100 Hz and sampling frequency of 500 Hz.
Assume the length of impulse response as 7.
[9]
Determine the response of FIR filter using DFT for x[n] = {2,l } and
h[n]={2,2}.
[10]
How multirate systems are described using dataflow graphs?
Write short note on
i) Data flow graph
ii) Multirate sampling

[7]
[8]

P.T.O.

SECTION - II
Q4) a)

b)
c)

Design second order digital butterworth band stop filter with following
specifications.
[9]
Fc1 = 155 Hz
Fc2 = 180 Hz
Fs = 400 Hz
Draw and explain the architecture of TMS320C67XX processors. [8]
How DMA helps in increasing the processing speed of a DSP processor?[8]

Q5) a)

Explain different on chip resources available in TMS320C54XX


processor.
[9]

b)

Explain different addressing modes of TMS320C54XX processor. [8]

c)

Explain pipeline operations of TMS320C67XX processors.

Q6) a)
b)

[8]

What are quadrature mirror filters? How do they provide perfect


reconstruction? Support your answer mathematically.
[7]
Write short notes on :
[18]
i) Code composer studio
ii) Blacfin processor
iii) Finite word length effects

yyy

[4860] - 269

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