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Assignment July Dec2015

The document contains 10 questions related to digital electronics. Question 1 asks to convert a decimal number to base 9. Question 2 asks about unused states in a 3-bit Johnson counter. Question 3 asks to design a 4-bit synchronous counter that counts only odd numbers and resets to 1 if it reaches an even number. The remaining questions ask about simplifying a Boolean expression using K-maps, implementing Boolean functions using PAL, characteristics of a ring counter, resolution of an analog to digital converter, designing logic gates using CMOS, designing a memory chip using smaller memory chips, and characteristics of a 4-input resistive divider.
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0% found this document useful (0 votes)
31 views

Assignment July Dec2015

The document contains 10 questions related to digital electronics. Question 1 asks to convert a decimal number to base 9. Question 2 asks about unused states in a 3-bit Johnson counter. Question 3 asks to design a 4-bit synchronous counter that counts only odd numbers and resets to 1 if it reaches an even number. The remaining questions ask about simplifying a Boolean expression using K-maps, implementing Boolean functions using PAL, characteristics of a ring counter, resolution of an analog to digital converter, designing logic gates using CMOS, designing a memory chip using smaller memory chips, and characteristics of a 4-input resistive divider.
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Digital Electronics BE IT 3 Sem July-Dec 2015

Assignment
Q1. Convert (543.2)6 to base 9.
Q2. In a 3-bit Johnson's counter what are the unused states?
Q3. Design a 4 bit synchronous counter which counts only odd numbers. If
in case it reaches to any even number, the counter resets to decimal
number 1. Use T-flip flops for the design.
Q4. Simplify using K-Map:
(B+C+D) (A+B+C+D) (A+B+C+D)(A+B+C+D) (A+B+C+D)
(A+B+C+D)
Q5. Implement the Boolean function using PAL.
Y1= m (1, 2 , 4, 7)
Y2= m (3, 6)
Q6. 7 bit ring counter's initial state is 0100010. After how many clock
cycles will it return to the initial state?
Q7. How many bits are required for designing a converter having
resolution of 5mV and the
ladder has +15V?
Q8. Design a AND gate using pMOS. Design NAND gate using CMOS
Q9. Design 8K* 8 size memory chip using 8K* 4 size memory chips.
Q10. For a 4 input resistive divider, find
i. The full scale output voltage
ii. The input voltage change due to LSB.
iii. The analog output voltage for a digital input of 1100
Assume that the swing is from 0 15V.
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