EC 252 EDC Lab Manual PDF
EC 252 EDC Lab Manual PDF
EC-252
DEPARTMENT OF ECE
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List of Experiments
1. Study of CRO
2. Characteristics of Silicon and Germanium diodes
3. Characteristics of Zener diode and regulator
4. Characteristics of Common Base Configuration
5. Characteristics of Common Emitter Configuration
6. Characteristics of Emitter Follower circuit
7. Characteristics of JFET
8. Characteristics of UJT
9. Design and verification of self bias circuit
10.Characteristics of Silicon Controlled Oscillator
11.Characteristics of DIAC
12.Characteristics of Thermistor
13.Characteristics of Source Follower circuit
14.Design and Verification of Collector to Base bias circuit
15.Characteristics of Photo transistor
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1. STUDY OF CRO
AIM: To observe front panel control knobs and to find amplitude, time period and
frequency for given waveforms.
APPARATUS:
CRO
Function generator and probes
PROCEDURE
1. Understand the significance of each and every knob on the CRO.
2. From the given function generator feed in a sinusoidal wave and adjust the time base
knob and the amplitude knob to observe the waveform as a function of time.
3. Measure the time period and amplitude (peak to peak) of the signal. Find the
frequency and verify if the same frequency is given fro the function generator.
4. Observe two waveforms simultaneously on the two channels of a CRO.
5. Repeat the above steps for pulse and triangular waveforms.
6. Report the readings and the waveforms taken.
MEASUREMENTS:
Amplitude = no. of vertical divisions * Volts/div.
Time period = no. of horizontal divisions * Time/div.
Frequency=(1/T)Hz
MODEL GRAPHS:
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APPLICATIONS OF CRO:
1. Measurement of current
2. Measurement of voltage
3. Measurement of power
4. Measurement of frequency
5. Measurement of phase angle
6. To see transistor curves
7. To trace and measuring signals of RF, IF and AF in radio and TV.
8. To trace visual display of sine waves.
VIVA Questions:
1. How do you measure frequency using the CRO?
2. Can you measure signal phase using the CRO?
3. Suggest a procedure for signal phase measurement using the data from CRO?
4. Can you comment on the wavelength of a signal using CRO>
5. How many channels are there in a CRO?
6. Can you measure DC voltage using a CRO?
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the diode and also in the circuit. The diode is said to be in ON state. The current increases with
increasing forward voltage.
When N-type (cathode) is connected to +ve terminal and P-type (Anode) is
connected to the ve terminal of the supply voltage is known as reverse bias and the potential
barrier across the junction increases. Therefore, the junction resistance becomes very high and
a very small current (reverse saturation current) flows in the circuit. The diode is said to be in
OFF state. The reverse bias current is due to minority charge carriers.
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REVERSE BIAS:-
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MODEL WAVEFORM:-
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5. The readings of voltage and current are tabulated and a graph is plotted between voltage and
current.
6. Repeat the above procedure for Germanium diode also and tabulate the results.
OBSERVATION:-
S.NO
APPLIED VOLTAGE
DIODE CURRENT
(V)
(mA)
(V)
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7. Repeat the above procedure for the given Germanium diode also and tabulate the results
obtained.
OBSEVATION:S.NO
APPLIED VOLTAGE
DIODE CURRENT
(V)
(A)
(V)
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REGULATION CHARACTERISTICS:-
Theory:A zener diode is heavily doped p-n junction diode, specially made to operate
in the break down region. A p-n junction diode normally does not conduct when reverse
biased. But if the reverse bias is increased, at a particular voltage it starts conducting heavily.
This voltage is called Break down Voltage. High current through the diode can permanently
damage the device
To avoid high current, we connect a resistor in series with zener diode. Once
the diode starts conducting it maintains almost constant voltage across the terminals what
ever may be the current through it, i.e., it has very low dynamic resistance. It is used in voltage
regulators.
PROCEDURE:Static characteristics:1. Connections are made as per the circuit diagram.
2. The Regulated power supply voltage is increased in steps.
3. The zener current (lz), and the zener voltage (Vz.) are observed and then noted in the
tabular form.
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4. A graph is plotted between zener current (Iz) and zener voltage (Vz).
5. Do the above steps for forward as well as reverse bias connections as shown in the circuit
diagrams.
Regulation characteristics:1. Connections are made as per the circuit diagram
2. The load resistance is fixed to known value and the zener voltage (Vz), and Zener current
(lz), are measured.
3. The load resistence is varied in steps and the corresponding values are noted down for
each load resistance value.
4. All the readings are tabulated.
OBSERVATIONS:Static characteristics:S.NO
ZENER
ZENER CURRENT(IZ)
VOLTAGE(VZ)
Regulation characteristics:VZ(VOLTS)
IR1 (amperes)
RL ()
S.N0
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MODEL WAVEFORMS:-
IR1 (A)
RL
PRECAUTIONS:-
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THEORY:
A transistor is a three terminal active device. T he terminals are emitter, base, collector.
In CB configuration, the base is common to both input (emitter) and output (collector). For
normal operation, the E-B junction is forward biased and C-B junction is reverse biased.
In CB configuration, IE is +ve, IC is ve and IB is ve. So,
VEB=f1 (VCB,IE) and
IC=f2 (VCB,IB)
With an increasing the reverse collector voltage, the space-charge width at the output
junction increases and the effective base width W decreases. This phenomenon is known as
Early effect. Then, there will be less chance for recombination within the base region. With
increase of charge gradient with in the base region, the current of minority carriers injected
across the emitter junction increases.The current amplification factor of CB configuration is
given by,
= IC/ IE
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CIRCUIT DIAGRAM
PROCEDURE:
INPUT CHARACTERISTICS:
1. Connections are made as per the circuit diagram.
2. For plotting the input characteristics, the output voltage VCE is kept constant at 0V and for
different values of VEB note down the values of IE.
3. Repeat the above step keeping VCB at 2V, 4V, and 6V.All the readings are tabulated.
4. A graph is drawn between VEB and IE for constant VCB.
OUTPUT CHARACTERISTICS:
1. Connections are made as per the circuit diagram.
2. For plotting the output characteristics, the input IE iskept constant at 10m A and for
different values of VCB, note down the values of IC.
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3. Repeat the above step for the values of IE at 20 mA, 40 mA, and 60 mA, all the readings
are tabulated.
4. A graph is drawn between VCB and Ic for constant IE
OBSERVATIONS:
INPUT CHARACTERISTICS:
S.No
VCB=0V
VEB(V)
VCB=1V
IE(mA)
VEB(V)
VCB=2V
IE(mA)
VEB(V)
IE(mA)
OUTPUT CHARACTERISTICS:
IE=10mA
S.No
VCB(V)
IE=20mA
IC(mA)
VCB(V)
IE=30mA
IC(mA)
VCB(V)
IC(mA)
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MODEL GRAPHS:
INPUT CHARACTERISTICS
OUTPUT CHARACTERISTICS
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PRECAUTIONS:
1. The supply voltages should not exceed the rating of the transistor.
2. Meters should be connected properly according to their polarities.
VIVA QUESTIONS:
1.
2.
3.
4.
5.
6.
7.
Define (alpha)?
8.
9.
10.
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5. TRANSISTOR CE CHARACTERSTICS
AIM: To draw the input and output characteristics of transistor connected in CE configuration
APPARATUS:
Transistor (SL100 or BC107)
R.P.S (O-30V)
2Nos
Voltmeters (0-20V)
2Nos
Ammeters (0-200mA)
Resistors
100Kohm, 100ohm
CE
is known as Knee voltage. The transistor always operated in the region above Knee
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CIRCUIT DIAGRAM:
PROCEDURE:
INPUT CHARECTERSTICS:
1. Connect the circuit as per the circuit diagram.
2. For plotting the input characteristics the output voltage VCE is kept constant at 1V and
for different values of VBE . Note down the values of IC
3. Repeat the above step by keeping VCE at 2V and 4V.
4. Tabulate all the readings.
5. plot the graph between VBE and IB for constant VCE
OUTPUT CHARACTERSTICS:
1. Connect the circuit as per the circuit diagram
2. for plotting the output characteristics the input current IB is kept constant at 10A and
for different values of VCE note down the values of IC
3. repeat the above step by keeping IB at 75 A 100 A
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OBSERVATIONS:
INPUT CHARACTERISTICS:
VCE = 1V
VCE = 2V
VCE = 4V
S.NO
VBE(V)
IB(A)
VBE(V)
IB(A)
VBE(V)
IB(A)
IB = 50 A
IB = 75 A
IB = 100 A
S.NO
VCE(V)
IC(mA)
VCE(V)
ICmA)
VCE(V)
IC(mA)
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MODEL GRAPHS:
INPUT CHARACTERSTICS:
OUTPUT CHARECTERSTICS:
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PRECAUTIONS:
1. The supply voltage should not exceed the rating of the transistor
2. Meters should be connected properly according to their polarities
VIVA QUESTIONS:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
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2Nos
Voltmeters (0-20V)
2Nos
Ammeters (0-200A)
(0-200mA)
Resistors
100Kohm
CE
is known as Knee voltage. The transistor always operated in the region above Knee
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CIRCUIT DIAGRAM:
PROCEDURE:
INPUT CHARECTERSTICS:
1. Connect the circuit as per the circuit diagram.
2. For plotting the input characteristics the output voltage VCE is kept constant at 2V and
note down values of VCB for each value of IB
3. Change VCE to 10 V and repeat the above step.
4. Disconnect the voltmeter from input circuit.
5. plot the graph between VCB and IB for constant VCE
OUTPUT CHARACTERSTICS:
1. Connect the circuit as per the circuit diagram
2. With IB set at 0A, vary VCE and note down the corresponding IE value.
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OBSERVATIONS:
INPUT CHARACTERISTICS:
VCE = 2V
VCE = 4V
VCE = 10 V
S.NO
VCB(V)
IB(A)
VCB(V)
IB(A)
VCB(V)
IB(A)
IB = 0 A
IB = 30 A
IB = 40 A
S.NO
VCE(V)
IE(mA)
VCE(V)
IE(mA)
VCE(V)
IE(mA)
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MODEL GRAPHS:
INPUT CHARACTERSTICS:
OUTPUT CHARECTERSTICS:
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PRECAUTIONS:
1. The supply voltage should not exceed the rating of the transistor
2. Meters should be connected properly according to their polarities
VIVA QUESTIONS:
1. What are the input and output impedances of CC configuration?
2. Identify various regions in the output characteristics?
3. Why CC configuration is preferred for buffering?
4. What is the phase relation between input and output?
5. Draw diagram of CC configuration for PNP transistor?
6.
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7. Characteristics of JFET
AIM: 1. To obtain the drain and transfer characteristics of the given JFET transistor.
2. To calculate rd, gm and from the curves obtained.
APPARATUS:
JFET transistor
BFW10
R.P.S (O-30V)
2Nos
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
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2. Keeping VGS as 0V, vary VDS in steps of 0.1V from 0 to 1 V and in steps of 2V from 1 to
15V.
3. Note down the drain current Id for each step.
4. Now set VGS to -1V, -2V and -3V and repeat the above steps for each VGS value, record
the readings in the table.
5. Keep VDS at 4V and vary VGS in steps of -5V till the drain current Id is 0. Note Id value
for each value of VGS.
6. With VDS at 8V repeat the above step and record the readings in the table.
7. Plot the drain and transfer characteristics from tabulated readings.
OBSERVATIONS:
Drain Characteristics:
VDS
ID (VGS=0V)
ID (VGS=-1V)
ID (VGS=-2V)
Transfer Characteristics:
VGS
ID (VDS=4V)
ID (VDS=8V)
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MODEL GRAPHS:
Drain Characteristics:
Transfer Characteristics:
PRECAUTIONS:
1. The supply voltage should not exceed the rating of the FET.
2. Connections must be tight.
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VIVA QUESTIONS:
1. What are the advantages of FET over transistor?
2. Is FET a current controlled device? Explain?
3. What is the operation of a N-channel JFET?
4. Can you compare JFET and a MOSFET?
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8. UJT CHARACTERISTICS
AIM: To observe the characteristics of UJT and to calculate the Intrinsic Stand-Off Ratio ().
APPARATUS:
Regulated Power Supply (0-30V, 1A)
- 2Nos
UJT 2N2646
Resistors 1k, 100
Multimeters - 2Nos
Breadboard and connecting Wires
CIRCUIT DIAGRAM
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THEORY:
Circuit symbol
The UJT is biased with a positive voltage between the two bases. This causes a
potential drop along the length of the device. When the emitter voltage is driven
approximately one diode voltage above the voltage at the point where the P diffusion
(emitter) is, current will begin to flow from the emitter into the base region. Because
the base region is very lightly doped, the additional current (actually charges in the
base region) causes (conductivity modulation) which reduces the resistance of the
portion of the base between the emitter junction and the B2 terminal. This reduction in
resistance means that the emitter junction is more forward biased, and so even more
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current is injected. Overall, the effect is a negative resistance at the emitter terminal.
This is what makes the UJT useful, especially in simple oscillator circuits.When the
emitter voltage reaches Vp, the current startsto increase and the emitter voltage starts
to decrease.This is represented by negative slope of the characteristics which is
reffered to as the negative resistance region,beyond the valleypoint ,RB1 reaches
minimum value and this region,VEB propotional to IE.
PROCEDURE:
1. Connection is made as per circuit diagram.
2. Output voltage is fixed at a constant level and by varying input voltage
corresponding emitter current values are noted down.
3. This procedure is repeated for different values of output voltages.
4. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated using
= (Vp-VD) / VBB
5. A graph is plotted between VEE and IE for different values of VBE.
MODEL GRAPH:
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OBSEVATIONS:
VBB=1V
VEB(V)
VBB=2V
IE(mA)
VBB=3V
VEB(V)
IE(mA)
VEB(V)
IE(mA)
CALCULATIONS:
VP = VBB + VD
= (VP-VD) / VBB
= ( 1 + 2 + 3 ) / 3
VIVA QUESTIONS
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
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2Nos
Theory:
A self bias circuit stabilizes the bias point more appropriately than a fixed bias circuit. In this
experiment CE configuration is used and a self bias circuit is designed and verified.
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CALCULATIONS:
Given VCC=10V, RE=220 ohm IC=4mA VCE=6V VBE=0.6V hfe=229
RC=(VCC-VCE)/IC
IB=IC/
RB= *RE/10
VBB=IB*RB+VBE +(IB+IC)RE
R1=(VCC/VBB)*RB
R2=RB/(1-VBB/VCC)
PROCEDURE:
1. Assemble the circuit on a bread board with designed values of resistors and transistor.
2. Apply Vcc and measure VCE, VBE and VEE and record the readings in table I.
3. Without changing the values of biasing resistors, change the transistor with other
values and repeat the above steps and record the readings in the table.
OBSERVATIONS:
value
VCE
VBE
VEE
IC=(VCC-VCE)/RC
IE=VEE/RE
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PRECAUTIONS:
1. The supply voltage should not exceed the rating of the transistor
2. Connections must be tight.
VIVA QUESTIONS:
1. What are the advantages of self bias?
2. What are the various other configurations available for bias?
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CIRCUIT DIAGRAM:
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THEORY:
It is a four layer semiconductor device being alternate of P-type and N-type silicon. It
consists os 3 junctions J1, J2, J3 the J1 and J3 operate in forward direction and J2
operates in reverse direction and three terminals called anode A, cathode K , and a
gate G. The operation of SCR can be studied when the gate is open and when the
gate is positive with respect to cathode.
When gate is open, no voltage is applied at the gate due to reverse bias of
the junction J2 no current flows through R2 and hence SCR is at cutt off. When anode
voltage is increased J2 tends to breakdown.
When the gate positive,with respect to cathode J3 junction is forward biased
and J2 is reverse biased .Electrons from N-type material move across junction J3
towards gate while holes from P-type material moves across junction J3 towards
cathode. So gate current starts flowing ,anode current increaase is in extremely small
current junction J2 break down and SCR conducts heavily.
When gate is open thee breakover voltage is determined on the minimum
forward voltage at which SCR conducts heavily.Now most of the supply voltage
appears across the load resistance.The holfing current is the maximum anode current
gate being open , when break over occurs.
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PROCEDURE:
1. Connections are made as per circuit diagram.
2. Keep the gate supply voltage at some constant value
3. Vary the anode to cathode supply voltage and note down the readings of voltmeter
and ammeter.Keep the gate voltage at standard value.
4. A graph is drawn between VAK and IAK .
OBSERVATION
VAK(V)
IAK ( A)
MODEL WAVEFORM:
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VIVA QUESTIONS
1. What the symbol of SCR?
2. IN which state SCR turns of conducting state to blocking state?
3. What are the applications of SCR?
4. What is holding current?
5. What are the important types thyristors?
6. How many numbers of junctions are involved in SCR?
7. What is the function of gate in SCR?
8. When gate is open, what happens when anode voltage is increased?
9. What is the value of forward resistance offered by SCR?
10. What is the condition for making from conducting state to non conducting state?
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THEORY:
DIAC is a diode that can work on AC. The DIAC has symmetrical breakdown characteristics.
The leads are interchangeable. It turns on around 30V. While conducting, it acts like a low
resistance with a drop of around 3V. When not conducting, it acts like an open switch.
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MODEL GRAPH:
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Change the voltage V12 in steps till 30V and observe VB01, the start of break over
voltage. Observe the conduction of PnPn .
3. Change the voltage V12 in steps in the negative direction till -30V and observe VB02, the
start of break over voltage. Observe the conduction of PnPn .
4. The characteristics are tabulated and plotted.
OBSERVATIONS:
V-I Characteristics:
Va (V)
Ia
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PRECAUTIONS:
1. The break down condition must be properly verified.
2. Connections must be tight.
VIVA QUESTIONS:
1. What are the applications of DIAC?
2. Why is DIAC a gateless TRIAC?
3. When does the DIAC conduct?
4. How many terminals are present in a DIAC?
5. Do you notice a similarity of operation as a Shockley diode? If so how?
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APPARATUS:
Thermistors RT4201K
Resistors
CIRCUIT DIAGRAM:
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THEORY:
The thermistor is a resistor with a negative temperature coefficient.
R=A * e
(B/T)
values from the V-I characteristics curve of the thermistor. It is mainly used for bridges in
instrumentation and measurements.
PROCEDURE:
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MODEL GRAPHS:
OBSERVATIONS:
Thermistor Characteristics:
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PRECAUTIONS:
1. Connections must be tight and these experiments require utmost care.
VIVA QUESTIONS:
1. What are the applications of thermistor?
2. What are the advantages of thermistor?
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2Nos
Voltmeters (0-20V)
2Nos
Ammeters (0-200mA)
Resistor 220 ohm
Bread board and connecting wires
CIRCUIT DIAGRAM:
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PROCEDURE:
V-I CHARECTERSTICS:
1. Connect the circuit as per the circuit diagram.
2. Keeping gate voltage VG as 0V, vary VDD in steps of 0.1V from 0 to 1 V and in steps of
2V from 1 to 15V.
3. Note down the source current Is for each step.
4. Now set VG to -1V, -2V and -3V and repeat the above steps for each VG value, record
the readings in the table.
5. Keep VDD at 4V and vary VGS in steps of -5V till the drain current Is is 0. Note Is value for
each value of VG.
6. With VDD at 8V repeat the above step and record the readings in the table.
7. Plot the characteristics from tabulated readings.
OBSERVATIONS:
Input Characteristics:
VDD
IS (VG=0V)
IS (VG=-1V)
IS(VG=-2V)
Transfer Characteristics:
VG
IS (VDD=4V)
IS (VDD=8V)
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MODEL GRAPHS:
Drain Characteristics:
Transfer Characteristics:
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PRECAUTIONS:
1. The supply voltage should not exceed the rating of the FET.
2. Connections must be tight.
VIVA QUESTIONS:
1. What are the advantages of CD configuration?
2. What are the applications?
3. Why is it called source follower?
4. Can you name the analogous configuration in transistors?
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1. To design a fixed bias circuit and observe stability by changing of the given
transistor in CE configuration.
2. To design a collector to base bias circuit and observe stability by changing of the given
transistor in CE configuration.
APPARATUS:
Transistors (BC 107) with different values
R.P.S (O-30V)
2 No.s
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CALCULATIONS:
Fixed Bias Circuit
Given VCC=10V, IC=4mA, VCE=6V, VBE=0.6V
IC=IB/
RB=(VCC-VBE)/IB
RC=(VCC-VCE)/IC
Collector-to-base bias circuit
Given VCC=10V, IC=4mA, VCE=6V, VBE=0.6V
IC=IB/
RC=(VCC-VCE)/(IB+IC)
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RB={(VCC-VBE-ICRC) }/IC RC
PROCEDURE:
1. Assemble the circuit on breadboard with design values of RC, RB and .
2. Apply VCC and measure VCE and VBE and record the readings in the table.
3. Without changing bias resistors, change the transistors with other values and repeat the
above step.
4. Repeat the above steps using the collector to base bias circuit and tabulate all the
readings.
OBSERVATIONS:
Fixed Bias
value
VCE
VBE
IC=(VCC-VCE)/RC
VCE
VBE
IC=(VCC-VCE)/RC - IB
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PRECAUTIONS:
1. The supply voltage should not exceed the rating of the transistor
2. Meters should be connected properly according to their polarities
VIVA QUESTIONS:
1. What are the applications of fixed bias configuration?
2. What are the applications of collector to base bias configuration?
3. What are the disadvantages of fixed bias configuration?
4. How to overcome the disadvantages of fixed bias configuration.
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2Nos
THEORY:
The photo transistor is a 3 terminal device which gives an electrical current as output if an
input light excitation is provided. It works in reverse bias. When reverse biased along with the
reverse bias current ICO, the light current IL is also added to the total output current. The
amount of current flow depends on the input light intensity given as excitation. Phototransistor
is basically a photodiode with amplification and operates by exposing its base region to the
light source. Phototransistor light sensors operate the same as photodiodes except that they
can provide current gain and are much more sensitive than the photodiode with currents are
50 - 100 times greater than that of the standard photodiode. Phototransistors consist mainly of
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Ic (mA)
MODEL GRAPH:
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PRECAUTIONS:
1. The photo transistor must be given a proper excitation for a reasonable current flow.
2. Connections must be tight.
VIVA QUESTIONS:
1. What are the applications of phototransistor?
2. When does the photo transistor conduct?
3. What is the input excitation in a photo transistor?
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