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Nodal and Loop Analysis Techniques

Nodal and loop analysis techniques allow determining all voltages and currents in circuits with multiple nodes and loops. Nodal analysis uses Kirchhoff's Current Law (KCL) and node voltages, while loop analysis uses Kirchhoff's Voltage Law (KVL) and loop currents. The key steps are to identify nodes and loops, write KCL or KVL equations, and solve the equations to find voltages and currents. Nodal analysis is commonly used by writing a KCL equation for each node in terms of the node voltages.

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Muhammad Osama
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89 views

Nodal and Loop Analysis Techniques

Nodal and loop analysis techniques allow determining all voltages and currents in circuits with multiple nodes and loops. Nodal analysis uses Kirchhoff's Current Law (KCL) and node voltages, while loop analysis uses Kirchhoff's Voltage Law (KVL) and loop currents. The key steps are to identify nodes and loops, write KCL or KVL equations, and solve the equations to find voltages and currents. Nodal analysis is commonly used by writing a KCL equation for each node in terms of the node voltages.

Uploaded by

Muhammad Osama
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© © All Rights Reserved
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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NODAL AND LOOP ANALYSIS TECHNIQUES

LEARNING GOALS
NODAL ANALYSIS
LOOP ANALYSIS

Develop systematic techniques to determine


all the voltages and currents in a circuit
that contain multi nodes and loops.
KCL for nodal analysis (Nodal Voltage), KVL
for loop analysis(Loop Currents), Ohms law
to calculate additional parameters.

NODE ANALYSIS
One of the systematic ways to
determine every voltage and
current in a circuit
The variables used to describe the circuit will be Node Voltages
-- The voltages of each node with respect to a pre-selected
reference node (or ground).
Generally, the ground is selected to which largest number of branches
are connected.
All other nodes are defined with reference to ground node and are
designated positive sign. The resulted analysis will indicate the actual
polarity.

IT IS INSTRUCTIVE TO START THE PRESENTATION WITH


A RECAP OF A PROBLEM SOLVED BEFORE USING SERIES/
PARALLEL RESISTOR COMBINATIONS

COMPUTE ALL THE VOLTAGES AND CURRENTS IN THIS CIRCUIT

4k || 12k 12k
SECOND: BACKTRACK USING KVL, KCL OHMS

6k
I3

OHM' S : I 2

Va
6k

KCL : I1 I 2 I3 0

OHM'S : Vb 3k * I3

OTHER OPTIONS...

6k || 6k
FIRST REDUCE TO A SINGLE LOOP CIRCUIT

KCL : I 5 I 4 I 3 0
OHM' S : VC 3k * I 5
I1

12
I3
4 12
Vb 4k * I 4
I4

12V
12k

Va

3
(12)
39

THE NODE ANALYSIS PERSPECTIVE

KVL

V5 Vb Vc

KVL

THERE ARE FIVE NODES.


IF ONE NODE IS SELECTED AS
REFERENCE THEN THERE ARE
FOUR VOLTAGES WITH RESPECT
TO THE REFERENCE NODE

KVL
Vc V5 Vb 0

VS V1 Va 0 Va V3 Vb 0
V1 VS Va

V3 Va Vb

REFERENCE

ONCE THE VOLTAGES ARE


KNOWN THE CURRENTS CAN
BE COMPUTED USING OHMS
LAW

WHAT IS THE PATTERN???

THEOREM: IF ALL NODE VOLTAGES WITH


RESPECT TO A COMMON REFERENCE NODE
ARE KNOWN THEN ONE CAN DETERMINE
ANY OTHER ELECTRICAL VARIABLE FOR
THE CIRCUIT

v R vm v N

vR

A GENERAL VIEW

THE REFERENCE DIRECTION FOR CURRENTS IS IRRELEVANT

vR

v R'

USING THE LEFT-RIGHT REFERENCE DIRECTION


THE VOLTAGE DROP ACROSS THE RESISTOR MUST
HAVE THE POLARITY SHOWN

v v
OHM'S LAW i m N
R

i i

' PASSIVE SIGN CONVENTION RULES!

i'

IF THE CURRENT REFERENCE DIRECTION IS


REVERSED ...
THE PASSIVE SIGN CONVENTION WILL ASSIGN
THE REVERSE REFERENCE POLARITY TO THE
VOLTAGE ACROSS THE RESISTOR

OHM'S LAW i '

v N vm
R

DEFINING THE REFERENCE NODE IS VITAL


V12

4V

2V

THE STATEMENT V1 4V IS MEANINGLES S


UNTIL THE REFERENCE POINT IS DEFINED
BY CONVENTION THE GROUND SYMBOL
SPECIFIES THE REFERENCE POINT.
ALL NODE VOLTAGES ARE MEASURED WITH
RESPECT TO THAT REFERENCE POINT

V12 _____?
V12 _____?

Current Directions

THE STRATEGY FOR NODE ANALYSIS

VS

Va

Vb

Vc

1. IDENTIFY ALL NODES AND SELECT


A REFERENCE NODE
2. IDENTIFY KNOWN NODE VOLTAGES

@Va : I1 I 2 I 3 0
Va Vs Va Va Vb

0
9k
6k
3k

@Vb : I 3 I 4 I 5 0

REFERENCE

3. AT EACH NODE WITH UNKNOWN


VOLTAGE WRITE A KCL EQUATION
(Considering High voltage at
each Node)
4. REPLACE CURRENTS IN TERMS OF
NODE VOLTAGES
AND GET ALGEBRAIC EQUATIONS IN
THE NODE VOLTAGES ...

Vb Va Vb Vb Vc

0
3k
4k
9k

SHORTCUT: SKIP WRITING


THESE EQUATIONS...

@Vc : I 5 I 6 0
Vc Vb Vc

0
9k
3k

AND PRACTICE WRITING


THESE DIRECTLY

WHEN WRITING A NODE EQUATION...


AT EACH NODE ONE CAN CHOSE ARBITRARY
DIRECTIONS FOR THE CURRENTS

Va

Vb

R1

R3

I1'

CURRENTS LEAVING 0
Va Vb Vb Vd Vb Vc

0
R1
R2
R3

CURRENTS INTO NODE 0

I1 I 2 I 3 0

R3
I 3'
I 2'

R2

Vc

I2

AND SELECT ANY FORM OF KCL.


WHEN THE CURRENTS ARE REPLACED IN TERMS
OF THE NODE VOLTAGES THE NODE EQUATIONS
THAT RESULT ARE THE SAME OR EQUIVALENT

I1 I 2 I 3 0

Vd

I3

R2
Vd

Va

R1

Vc
I1

Vb

Va Vb Vb Vd Vb Vc

0
R1
R2
R3

CURRENTS LEAVING 0

I1' I 2' I 3' 0

Vb Va Vb Vd Vc Vb

0
R1
R2
R3

CURRENTS INTO NODE 0

I1' I 2' I 3' 0

Vb Va Vb Vd Vc Vb

0
R1
R2
R3

WHEN WRITING THE NODE EQUATIONS


WRITE THE EQUATION DIRECTLY IN TERMS
OF THE NODE VOLTAGES.
BY DEFAULT USE KCL IN THE FORM
SUM-OF-CURRENTS-LEAVING = 0
THE REFERENCE DIRECTION FOR THE
CURRENTS DOES NOT AFFECT THE NODE
EQUATION

CIRCUITS WITH ONLY INDEPENDENT CURRENT SOURCES

Can we add algebraically the current


sources?

HINT: THE FORMAL MANIPULATION OF


EQUATIONS MAY BE SIMPLER IF ONE
USES CONDUCTANCES INSTEAD OF
RESISTANCES.

@ NODE 1

USING RESISTANCE S i A

v1 v1 v2

0
R1
R2

WITH CONDUCTANC ES i A G1v1 G2 (v1 v2 ) 0


REORDERING TERMS

@ NODE 2
REORDERING TERMS
THE MODEL FOR THE CIRCUIT IS A SYSTEM
OF ALGEBRAIC EQUATIONS

THE MANIPULATION OF SYSTEMS OF ALGEBRAIC


EQUATIONS CAN BE EFFICIENTLY DONE
USING MATRIX ANALYSIS

EXAMPLE
WRITE THE KCL EQUATIONS

@ NODE 1 WE VISUALIZE THE CURRENTS


LEAVING AND WRITE THE KCL EQUATION

REPEAT THE PROCESS AT NODE 2

i2

v2 v1 v2 v1

0
R4
R3

OR VISUALIZE CURRENTS GOING INTO NODE

ANOTHER EXAMPLE OF WRITING NODE EQUATIONS

BB

MARK THE NODES


(TO INSURE THAT
NONE IS MISSING)

15mA
A
VA

8k

2k

8k

2k

WRITE KCL AT EACH NODE IN TERMS OF


NODE VOLTAGES

SELECT AS
REFERENCE

VA VA

15mA 0
2k 8k
V V
@ B B B 15mA 0
8k 2k

@A

A MODEL IS SOLVED BY MANIPULATION OF


EQUATIONS AND USING MATRIX ANALYSIS

NUMERICAL MODEL

LEARNING EXAMPLE

USE GAUSSIAN ELIMINATION

i A 12mA, iB 4mA
THE NODE EQUATIONS

R1 12k, R2 R3 6k

ALTERNATIVE MANIPULATION
THE MODEL

* / 12k
REPLACE VALUES AND SWITCH NOTATION
TO UPPER CASE

RIGHT HAND
SIDE IS
VOLTS.
COEFFS ARE
NUMBERS

* / 6k

3V1 2V2 12
V1 2V2 24 * / 3 (and add equations)
4V2 60[V ]
ADD EQS 2V 12[V ]
1

SOLUTION USING MATRIX ALGEBRA

PLACE IN MATRIX FORM


AND DO THE MATRIX ALGEBRA ...

USE MATRIX ANALYSIS TO SHOW SOLUTION

PERFORM THE MATRIX MANIPULATIONS

Adj ( A)
A
| A|
1

FOR THE ADJOINT REPLACE


EACH ELEMENT BY ITS
COFACTOR

Draw Circuit again and write nodal


voltage and brabch currents

AN EXAMPLE OF NODE ANALYSIS

Rearranging terms ...

@v1

@ v2
COULD WRITE EQUATIONS BY INSPECTION

@ v3

CONDUCTANC ES CONNECTED TO NODE

CONDUCTANC ES BETWEEN 1 & 2

CONDUCTANC ES BETWEEN 1 & 3


CONDUCTANC ES BETWEEN 2 & 3

WRITING EQUATIONS BY INSPECTION


FOR CIRCUITS WITH ONLY INDEPENDENT
SOURCES THE MATRIX IS ALWAYS SYMMETRIC
THE DIAGONAL ELEMENTS ARE POSITIVE
THE OFF-DIAGONAL ELEMENTS ARE NEGATIVE

Conductances connected to node 1


Conductances between 1 and 2
Conductances between 1 and 3
Conductances between 2 and 3

VALID ONLY FOR CIRCUITS


WITHOUT DEPENDENT
SOURCES

LEARNING EXTENSION

V1 V1 V2 USING

6k
12k
V V V
@V2 : 2mA 2 2 1 0
6k
12k
@V1 : 4mA

BY INSPECTION

1
1
1

V2 4mA

1
12k
6k 12k
1 1
1


V2 2mA
12k 6k 12k

Home work:
Examples: 3.2
E: 3.1, 3.2,
P 3.1, 3.2, 3.3, 3.4

KCL

LEARNING EXTENSION

6mA

I3

I1
I2
Node analysis
V
@ V1 : 1 2mA 6mA 0 V1 16V
2k
V V
@V : 6mA 2 2 0 V2 12V
2

6k

IN MOST CASES THERE


ARE SEVERAL DIFFERENT
WAYS OF SOLVING A
PROBLEM

NODE EQS. BY INSPECTION

1
V1 0V2 2 6mA
2k
0V1 1 1 V2 6mA
6k 3k

3k

I 1 8mA
3k
I2
(6mA) 2mA
3k 6k
6k
I3
(6mA) 4mA
3k 6k

CURRENTS COULD BE COMPUTED DIRECTLY


USING KCL AND CURRENT DIVIDER!!

Once node voltages are known

I1

V1
2k

I2

V2
6k

I3

V2
3k

LEARNING EXAMPLE

CIRCUITS WITH DEPENDENT CURRENT SOURCES


CIRCUITS WITH DEPENDENT SOURCES CANNOT
BE MODELED BY INSPECTION. THE SYMMETRY
IS LOST.
A PROCEDURE FOR MODELING
WRITE THE NODE EQUATIONS USING DEPENDENT
SOURCES AS REGULAR SOURCES.
FOR EACH DEPENDENT SOURCE WE ADD
ONE EQUATION EXPRESSING THE CONTROLLING
VARIABLE IN TERMS OF THE NODE VOLTAGES

NUMERICAL EXAMPLE

1
1
1
2

1
v 2 0
12k 6k
3k 6k
1
1
1
v1
v2 2mA
6k
12k 3k
* / 4k
* / 6k

v v v
io 1 1 2 0
R1
R2
v
v v
iA 2 2 1 0
R3
R2
MODEL FOR
CONTROLLING VARIABLE

io

v2
R3

V1 2V2 0
REPLACE AND REARRANGE

1
1
1
v1 v2 0
R1 R2
R3 R2
1
1
1
v1
v2 i A
R2
R2 R3

V1 3V2 12[V ]
ADDING THE EQUATIONS

V1

24
V
5

5V2 12[V ]

LEARNING EXAMPLE: CIRCUIT WITH VOLTAGE-CONTROLLED CURRENT

REPLACE AND REARRANGE

CONTINUE WITH GAUSSIAN ELIMINATION...


WRITE NODE EQUATIONS. TREAT DEPENDENT
SOURCE AS REGULAR SOURCE

OR USE MATRIX ALGEBRA

EXPRESS CONTROLLING VARIABLE IN TERMS OF


NODE VOLTAGES

FOUR EQUATIONS IN OUR UNKNOWNS. SOLVE


USING FAVORITE TECHNIQUE

USING MATLAB TO SOLVE THE NODE EQUATIONS

R1 1k, R2 R3 2k,
R4 4k, i A 2mA, iB 4mA,

2[ A / V ]
DEFINE THE COMPONENTS OF THE CIRCUIT

DEFINE THE MATRIX G


Entries in a row are
separated by commas
(or plain spaces).
Rows are separated by
semi colon

R1=1000;R2=2000;R3=2000;
R4=4000; %resistances in Ohm
iA=0.002;iB=0.004; %sources in Amps
alpha=2; %gain of dependent source

G=[(1/R1+1/R2), -1/R1, 0; %first row of the matrix


-1/R1, (1/R1+alpha+1/R2), -(alpha+1/R2); %second row
0, -1/R2, (1/R2+1/R4)], %third row. End in comma to have the echo
G=
0.0015 -0.0010
0
-0.0010 2.0015 -2.0005
0 -0.0005 0.0008

DEFINE RIGHT HAND SIDE VECTOR

I=[iA;-iA;iB]; %end in ";" to skip echo

V=G\I % end with carriage return and get the echo


SOLVE LINEAR EQUATION
V=
11.9940
15.9910
15.9940

LEARNING EXTENSION: FIND NODE VOLTAGES


REARRANGE AND MULTIPLY BY 10k

2V1 V2 40[V ] * / 2 and add eqs.


V1 2V2 0
5V1 80V V1 16V
NODE EQUATIONS

V1
V V
4mA 1 2 0
10k
10k
V V
V
@V2 : 2 1 2 IO 2 0
10k
10k
@V1 :

CONTROLLING VARIABLE (IN TERMS ON NODE


VOLTAGES)

IO

V1
10k

REPLACE

V1
V V
4mA 1 2 0
10k
10k
V2 V1
V
V
2 1 2 0
10k
10k 10k

V2

V1
V2 8V
2

FIND THE VOLTAGE VO

NODE EQUATIONS

LEARNING EXTENSION

NOTICE REPLACEMENT OF DEPENDENT SOURCE


IN TERMS OF NODE VOLTAGE

Vx Vx

0 * / 6k
3k 6k
V
V
V
x O O 0 * / 12k
6k 12k 12k

2mA

3Vx 12[V ] Vx 4[V ]


2VO 2Vx 0 VO 4[V ]

Home work
Example: 3.4
E: 3.3, 3.4,
P: 3.44, 3.45, 3.48, 3.50

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