Assignment 1
Assignment 1
POWER REDUCTION
Power reduction Of Various Components In a Class Room
BY,
GOWTHAMI M.R
PRAKRUTHI T.G
RAVI KIRAN N
SHRUHTI A B
FEBRUARY 1, 2014
UTL TECHNOLOGIES
FTV_13
FORMULE:
Power utilized= (Ax12) + (Bx2) + (Cx1)
Where A= power utilized by tube light, B=power utilized by fan, C= power utilized by AC
Assuming A=15Watt, B=50W, C=60W.
1. DIFFERENT MODES:
APRIL
MAY
MODES
LIGHTS
ON
2(LE),4(L),6(P),1(PR)
ON
2(LE),4(L),6(P),1(PR)
ON
2(LE),4(L),6(P),1(PR)
ON
2(LE),4(L),6(P),1(PR)
SLEEP
LEARNING
AC
OFF
0(LE),0(L),1(P),0(PR)
OFF
0(LE),0(L),(P),0(PR)
ON
0(LE),0(L),1(P),0(PR)
ON
0(LE),0(L),1(P),0(PR)
PEAK
PROJECTION
FEB
0(OFF)
MARCH
0(OFF)
APRIL
0(OFF)
MAY
0(OFF)
AVERAGE 100%saved
pg. 1
LECTURER
FANS
ON
0(LE),0(L),1(P),0PR)
ON (1 fan in Morning)
0(LE),0(L),1(P),0PR)
(2 fans in afternoon)
0(LE),0(L),2(P),0PR)
ON
0(LE),0(L),1(P),0PR)
ON
0(LE),0(L),2(P),0(PR)
82%saved 75%saved
68%saved
85%SAVED
4. FSM IMPLEMENTATION:
6. BLACK BOX:
pg. 2
6. FSM CODE:
module
fsm1(clk,rst,sensor_1,sensor_2,sensor_3,morning_session,lights_on,fa
n_on,ac_on);
input sensor_1,sensor_2,sensor_3,morning_session;
input clk,rst;
output reg [11:0] lights_on;
output reg [1:0] fan_on;
output reg ac_on;
reg [2:0]cs,ns;
parameter
sleep_mode=3'b000,lecture_mode=3'b100,learning_mode=3'b010,peak_mode
=3'b110,projector_mode=3'b001;
always@(posedge clk)
begin
if(rst)
cs<=sleep_mode;
else
cs<=ns;
end
always@(cs)
begin
case({sensor_1,sensor_2,sensor_3})
sleep_mode:begin
lights_on<=0;
fan_on<=0;
ac_on<=0;
if(sensor_2 & ~(sensor_1))
ns<=lecture_mode;
else
ns<=sleep_mode;
end
lecture_mode:
begin
lights_on[1]<=1;
lights_on[6]<=1;
ac_on<=0;
if(morning_session)
begin
fan_on<=0;
ac_on<=0;
end
else
begin
fan_on[0]<=1;
end
if(~sensor_2 & (sensor_rc))
pg. 3
ns<=learning_mode;
else
ns<=lecture_mode;
end
learning_mode:
begin
lights_on[1]<=1;
lights_on[6]<=1;
lights_on[2]<=1;
lights_on[9]<=1;
ac_on<=0;
if(morning_session)
begin
fan_on<=0;
ac_on<=0;
end
else
begin
fan_on[0]<=1;
end
if(sensor_1 & (sensor_2))
ns<=peak_mode;
else
ns<=learning_mode;
end
peak_mode:
begin
lights_on[1]<=1;
lights_on[6]<=1;
lights_on[2]<=1;
lights_on[9]<=1;
lights_on[5]<=1;
lights_on[10]=1;
if(morning_session)
begin
fan_on<=0;
ac_on<=0;
end
else
begin
fan_on[0]<=1;
end
if(~sensor_1 | ~sensor_2 | ~sensor_3 )
ns<=sleep_mode;
ac_on<=0;
end
projector_mode:
begin
lights_on<=0;
fan_on<=0;
ac_on<=0;
pg. 4
7. FSM _TB
module tb;
reg sensor_1,sensor_2,sensor_3,morning_session;
reg clk,rst;
wire [11:0] lights_on;
wire [1:0] fan_on;
wire ac_on;
fsm1
l1(clk,rst,sensor_1,sensor_2,sensor_3,morning_session,lights_on,fan_
on,ac_on);
initial
begin
clk=0;
rst=1;
#10;
rst=0;
sensor_1=0;
sensor_2=0;
sensor_3=0;
#10;
sensor_1=1;
sensor_2=0;
sensor_3=0;
morning_session=1;
#10;
morning_session=0;
#10;
/*
sensor_1=0;
sensor_2=1;
sensor_3=0;
morning_session=1;
#10;
morning_session=0;
#10;
sensor_1=1;
sensor_2=1;
sensor_3=0;
morning_session=1;
#10;
pg. 5
morning_session=0;
#10;
sensor_1=0;
sensor_2=0;
sensor_3=1;
morning_session=1;
#10;
morning_session=0;
#10;
*/
end
always #5 clk=~clk;
endmodule
8.SIMULATION RESULT:
pg. 6