ARM Processor Interview Questions

Hey All, These are few very simple and general ARM processor interview questions 1. What are the types of CORTEX-M series ? 2. How do you select a specific CORTEX-M processor ? 3. What is Trustzone System IP block ? 4. What is the use of T604 ? Have you used it ? 5. Have you come across LINARO ? Have you been involved in LINARO ? 6. What is pipeline shutdown ? 7. what are the kinds of protection available for SRAMS ? How to use the single bit or double bit fault correction ? 8. What is interrupt pipelining ? 9. Explain the architecture of the CORTEX series ARM that you have used . 10. What is the use of the AMBA interface and where is it present in the architecture ? 11. What is branch prediction ? 12. What is out of order execution ? Have you considered it in selection of processor ? 13. If the pipleline is wider , the instruction throughput is high - True/False ? 14. What is the use of Neon Floating point engine ? 15. In what scenarios can neon do better than normal core ? 16. Is power dissipation more in neon compared to normal core ? 17. Incase of multimedia applications, what is the approximate number of times by which the throughput is increased compared to normal core ? 18. Is Neon available with Cortex M or Cortex A series ? 19. Have you used RVDS ? Have you used gcc arm toolchain ? Which of these two tools is better ? 20. What is the use of --vectorize option ? 21. Have you used Palladium emulator ? Is it JTAG based ? 22. Have you used XDS510 emulator ? 23. What is Coresight System Trace Macrocell(STM) ? 24. What is the difference between 'intrusive trace' and 'non-intrusive trace' mechanisms ? 25. Which of the following is intrusive - printf, lttng, strace, ftrace, ltrace ? 26. Can you explain the flow from User application and the role of STM driver ? 27. What are the advantages and disadvantages of LTTng ? 28. What is hardware assisted instrumentation ? 29. What is the advantage of hardware assisted instrumentation over software instrumentation ? 30. What is PTM ? 31. What is TPIU ? 32. What is ITM ? 33. What is ETM ? 34. Low latency instrumentation is required for ISR tracing, Bootcode tracing . How is low latency tracing achieved ? 35. STM cannot trace instructions. It traces only system level calls - True / False. 36. ETM is for data/program instructions & for cache/DMA level instructions - True / False. 37. In Kinetis, can SRAM be configured to act as either NVRAM or EEPROM ? Have you configured or tried it ? 38. How many power modes are there in Kinetis ? Can you tell the wakeup/recovery time for every

mode ? Which mode has the fastest recovery time ? Which mode has the lowest current consumption ? 39. Cortex M4 has Run , Sleep and Deep sleep modes - True / False ? 40. Is 32-pin Cortex M4 compatible with 256 pin Cortex M4 processor ? 41. What is I2S interface ? 42. What are the features of Cortex M4 ? 43. Tell about the Exception Handling in ARM processor. What does the ARM Core do automatically for every exception ? 44. Can you tell about DSP in ARM7TDMI or DSP in STRONGARM or DSP in ARM9E ? 45. Why should you design the DSP algorithm in general ARM architecture so that saturation is not required ? 46. Tell about AIF(Arm Image Format) and AOF(Arm Object Format) ? 47. What are the Memory initialization directives ? 48. What is the use of 'SWI' in ARM assembly ? 49. How to Represent a Digital Signal in ARM ? 50. Give Example of STMFD w.r.t Stack Operation push/pop ? 51. Tell about Extended Multiply Instructions in ARM 52. Tell about the NORMAL Multiply Instructions in ARM 53. Tell about ADR's relation with LDR and the Advantage of using LDR together with '=' ? 54. When does the Processor Stall in ARM and what is the pipeline hazard in ARM? 55. What is called 'pipeline bubble' in ARM ? 56. What is Saturating Arithmetic ? Explain 57. Tell the 2 software methods available to remove interlocks following load instructions 58. Tell about 'Load Scheduling By Preloading' and 'Load Scheduling by unrolling' ? 59. How will you flush the instuction Cache in ARM processor ? 60. List the issues when porting C code to the ARM processor ? 61. What are the advantages of writing in Assembly in ARM processor? 62. Explain this -> "AREA |.text|, CODE, READONLY" 63. What is the use of the 'EXPORT' directive ? 64. What is the use of various directives ? 65. How to build using command line tools w.r.t ARM ? 66. Write a simple square.s program in ARM assembly called from a C file ? 67. What will you change that program when calling ARM code from C compiled as Thumb ? 68. How will you allow Thumb C code to call the ARM assembly Code ? 69. What is the use of 'RN' directive in ARM assembly ? 70. What imports the libraries like printf automatically in the assembly side of ARM ? 71. What is the DCB directive and its relation with strings ? 72. What is ARMulator ? Where and How have you used it ? 73. How will you handle the Register Shortage problem in ARM ? 74. Relation between CPSR flags, S Suffix Instructions and Comparison Instructions ? 75. What is Conditional Execution in ARM ? 76. What is single issue multiple data (SIMD) processing ? 77. What is a Coprorcessor / CP15 in ARM ? 78. What does the 'B' mean in LDRB or What is the difference between LDR and LDRB in ARM ? 79. What is the use of Write-Back ? 80. When should i use '!' in ARM programming and where is it Not Allowed to be used in ARM programming ? 81. Tell about 'Single Data Transfer' and 'Multiple Data Transfer' in ARM 82. How will you manually Enable / Disable an interrupt in ARM Processor ?

83. Tell about MRS and MSR instructions ? 84. Can you tell a 32-bit branch instruction and the way you used it ? 85. When have you used Thumb instructions in ARM processor ? 86. Write a program to mask bytes in ARM assembly ? 87. ARM7 family of processors does not use any branch prediction scheme. Neither ARM9 nor ARM9E family implements branch prediction - True / False 88. The ARM11 micro-architecture uses two techniques to predict branches - True / False 89. What is Translation Lookaside Buffer (TLB) ? 90. What are the types of addressing modes in ARM ? 91. Can you brief up the evolution of ARM architecture ? 92. Why ARM7TDMI alone highlights the features that it supports in its naming and why not other ARM architectures ? 93. When will you choose to use ARM and when will you choose to use Thumb instructions ? 94. Can you explain the operation of ARM7 pipeline for simple instructions ? 95. Can you tell about function performed by this instruction - ADD r3, r5, r12 ?

You can check out the possible Microprocessor interview questions

Posted by super manidhan at 5:36 PM 0 comments Labels: ARM, Embedded, Interview, Network Processor
MONDAY, JULY 5, 2010

Linux and Linux Device driver interview questions

Linux is one of the very common Operating Systems and hope many would like to have some linux interview questions for their interview. Here is a collection of questions for linux and linux device driver related interviews :-) All the Best ! 1. What is the difference in features between kernel 2.2, 2.4 and 2.6 ? 2. What are Static and Shared libraries ? 3. What is dynamic linking ? What is static linking ? 4. What are the advantages of Dynamic linking or Shared libraries ? 5. Does gcc search for both static and shared libraries ? Which is searched initially by gcc compiler ? 6. What should be done for Shared library based linking in gcc ? 7. What should be done for static library based linking in gcc ? 8. What is object file and what are symbols ? 9. Can you tell the memory layout based on Data,BSS,HEAP and STACK ? 10. What are the ways in which linux kernel can be compiled ? 11. How will get the driver added into the kernel ? What are Kconfig files ? 12. What is a kernel module ? 13. What is the difference between insmod and modprobe ? 14. How will you list the modules ? 15. How do you get the list of currently available drivers ? 16. How will you Access userspace memory from kernel ? What are the various methods ? 17. What is the use of ioctl(inode,file,cmd,arg) ApI ? 18. What is the use of the poll(file, polltable) API ? 19. What is the use of file->private_data in a device driver structure ? 20. What is a device number ? 21. What are the two types of devices drivers from VFS point of view ?

22. What are character devices ? 23. How does the character device driver adds and remove itself from the kernel ? What is the use of register_chrdev and unregister_chrdev ? 24. What is the role of interrupts in a device driver ? How are interrupts handled in device driver ? 25. How will you make interrupt handlers as fast as possible ? 26. What are the types of softirqs ? 27. Difference between Timer Softirq and Tasklet Softirq ? 28. What are tasklets ? How are they activated ? when and How are they initialized ? 29. What is task_struct and how are task states maintained ? 30. What is rwlock and spinlock ? Briefly explain about both of them ? 31. When will you use rwlock instead of spinlock ? 32. Can spinlock/rwlock be used in Interrupt handler ? 33. Tell about the Memory Layout of a Process in Linux . 34. How will you trace the system calls made into the kernel of lInux ? 35. What is mmap ? MMAP & malloc ? MMAP & brk ? MMAP adv & dis-adv. 36. Tell the relation between Malloc and MMAP 37. Advantages of MMAP over Read ? 38. Tell the role of brk() in malloc / Tell the relation between heap and brk? 39. Example of using MMAP and MUNMAP in C ? 40. Tell about the method/steps in Linux Kernel Compilation. 41. What is Kmalloc and how does it differ from normal malloc ? or Why can't we use malloc in kernel code ? 42. What happens as soon as a packet arrives from the network in Linux ? 43. What is a stack frame, stack pointer & frame pointer ? 44. What is a profiler ? Which one have you used ? 45. How do you determine the direction of stack growth ?
Posted by super manidhan at 2:30 PM 1 comments Labels: Device Driver, Embedded, Interview, Linux
WEDNESDAY, JUNE 23, 2010

Microprocessor interview questions

This is a collection of microprocessor(general) based interview questions. 1. What are the two famous architecture of CPU ? 2. What is the difference between Harvard and Von Neuman architecture ? 3. What is the use of instruction cache ? 4. Is it good to have more instruction cache or data cache ? 5. What is the use of data cache ? 6. What is the use of TLB ? 7. What do you mean by Cache Hit or Cache Miss ? What is cache hit rate ? 8. What is the difference between read miss and write miss ? 9. How does cache hit or cache miss determine the selection of processor ? 10. What is cache line or cache block ? 11. What is write-back or copy-back cache ? 12. What is the need for cache coherence protocol ? 13. What are the 3 kinds of cache misses ? or Which of the below causes the most delay and why ? Instruction read miss, Data read miss, and Data write miss . 14. What is boundary alignment and what is the use of it ?

15. What will happen if the data being fetched exceeds the cache line size ? or if the data is not being aligned at the beginning of cache block ? 16. How can grouping of data can improve the cache based operations from application-side ? 17. What is cache prefetch ? 18. Brief up on pipelined versus Run-to-Completion processor software architecture ? 19. Why multicore processors are preferred to improve performance rather than trying to make a single processor based system faster ? 20. Does memory access speed varies at various stages ? Which is the fastest memory that you can directly deal with from a processor or Which type of memory of a CPU has almost zero percent latency ? 21. What is temporal locality and spatial locality ? 22. What are the applications of temporal locality and spatial locality ? or where are they applied in a CPU architecture ? 23. What is the use of Shadow Registers in ARM architecture ? 24. How will you calculate the idle time off a processor ? 25. How will you identify the endianness of a processor programatically ? 26. What is Memory Overlay ? 27. Tell about Bank Switching ? 28. What are the Disadvantages of Bank Switching ? 29. Why is the size of L1 cache smaller than that of the L2 cache in most of the processors ? 30. When should one use polling method and when should one use interrupt based method ? Are there scenarios in which both can be used ? 31. What could be the better way to determine the exact locations in which the prefetch instruction should be used ? 32. Considering that a processor runs at 100 MHz and the data is coming to the processor from an external device/peripheral at the rate of 1000 Mbit/s (8 Bits/Clockcycle @ 125 MHz), which is the best way to handle traffic that comes at a higher speed to the processor ? 33. Consider that there are 100 plus ways of interrupts occuring from various sensors. There are chances that all can occur at the same time too. How can the software be designed to handle it efficiently ? 34. What is Write-Back Cache ? 35. What is Write-Through Cache ? 36. What is cache coherency ? 37. What is Clock Cycles Per Instruction (CPI) ? 38. What is IPC(Instructions per cycle) ? 39. Tell about the 'nested interrupt handler' , 'reentrant interrupt handler' and ' prioritized direct interrupt handler' ? 40. What is Memory Banking ? Explain w.r.t 8051 architecture 41. What is Primary Memory and What is Secondary Memory ? 42. What is the advantage of MMU ? 43. How do you determine the direction of stack growth ? 44. What is the debugger that you have used ? 45. Have you used any emulator. If yes, how have you used it ? 46. Can you tell a scenario that was very difficult to solve / fix ? 47. Have you worked on optimization w.r.t memory usage ? What techniques have you followed to optimize ? 47. Have you worked on optimization w.r.t throughput / speed ? What techniques have you followed to optimize ? 48. What kind of co-processors have you used ?

Also, you can checkout the possible ARM processor interview questions.
Posted by super manidhan at 1:11 AM 0 comments Labels: Embedded, Interview, microprocessor
FRIDAY, JUNE 18, 2010

Linux kernel interview questions

Linux has become one of the commonly used Operating System in todays development environment/lab for most of the projects. I have listed the possible questions that can appear in a linux interview. 1. How are FLIHs and SLIHs termed in Linux ? 2. What is the main drawback for not considering Linux as realtime ? 3. What is the type of scheduler used in Linux Kernel 2.5 ? 4. What are the types of scheduler used in Linux Kernel 2.6 to 2.6.23 and after Linux kernel 2.6.23 ? 5. CFS scheduler in Linux is based on red-black tree - True / False ? 6. O(1) scheduler in Linux is based on run queues - True / False ? 7. Is the architecture of linux kernel monolithic / microkernel ? 8. How will you trace the system calls made into the kernel of lInux ? 9. Tell about the Linux Kernel Compilation method ? 10. What is 'make mrproper' and how is it different from 'make clean' ? 11. What is Kmalloc and how does it differ from normal malloc ? or Why can't we use malloc in kernel code ? 12. Does the scheduler assign a zombie state to a process ? 13. Brief up 'vmalloc' vs 'kmalloc' ? 14. Brief up 'malloc' vs 'kmalloc' ? 15. How modules begin and end in LInux ? Tell the difference between Modules and Program ? 16. What is mmap ? 17. What are the advantages of mmap over read ? 18. Most of Unix kernels are monolithic - True / False ? 19. Why is microkernel slower than monolithic kernel ? 20. What are the advantges of microkernel over monolithic kernel ? 21. What is a 'Module' ? 22. What are the main advantages of using a 'Module' ? 23. Once linked in, the object code of a 'module' is equivalent to the object code of the statically linked kernel - True / False ? 24. What are the limitations of hard links / What are advantages of soft links ? 25. Unix Kernels are Reentrant - True / False ? 26. What is Kernel Control Path ? 27. What is the drawback in using semaphore for synchronization ? How does spinlock help in overcoming it ? 28. What does a semaphore consist of ? and What does a spinlock consist of ? 29. Why spinlocks are useless in uniprocessor systems ? 30. What are the two kinds of system events ?
Posted by super manidhan at 10:23 PM 0 comments Labels: Embedded, Interview, Linux

Multicore processor interview questions

Initially multicore processors were used mainly in telecom industry. But, nowadays, these multicore processors have made inroads into almost every technology/industry. Here are a few basic multicore processor based interview questions that can be helpful. 1. Will increasing the number of cores, increase the throughput of your system ? 2. What are the general methods of communication between the cores ? 3. When is it better to use single core processor compared to multi-core processor ? 4. If the CPU in a multi-core processor updates the data in the cache, copies of data in caches associated with other cores will become stale. How is the multicore processor designed to handle this scenario ? 5. What is 'Run to Completion' software architecture ? 6. What is a 'Pipelined' software architecture ? 7. What is the difference between 'Run to Completion' and 'Pipelined' software architecture ? 8. How is the debugging and testing environment in the case of multithreaded/multiprocessing applications ? 9. At what point does adding more processors or computers to the computation pool slow things down instead of speeding them up? 10. Is there an optimal number of processors for any given parallel program? 11. How Many Processes or Threads are enough for an application ?
Posted by super manidhan at 10:16 PM 0 comments Labels: Embedded, Multicore, Network Processor
THURSDAY, JUNE 10, 2010

uC/OS-II interview questions

Hey all, Here is a collection of uC/OS-II interview questions that would be of great interest to you ! 1. Expansion of uC/OS-II ? 2. What is the footprint size of uC/OS-II ? 3. Roughly, how man lines of code is it ? 4. What type of scheduler is supported by uC/OS-II ? 5. Does uc/OS-II RTOS support nested interrupts ? To how many levels ? 6. What are the APIs that play a significant role in uC/OS-II initialization ? 7. Binary semaphore in uC/OS-II use priority cieling to address priority inversion - True/False ? 8. What is the exact context switch time in uC/OS-II RTOS ? 9. Does uC/OS-II RTOS support MMU ? 10. Is it possible to use uC/OS-II RTOS without MMU ? 11. What could be the best reason/scenario for selecting uC/OS-II RTOS ? 12. Which is the lowest prirority task in uC/OS-II RTOS ? 13. The idle task is always the lowest-priority task and can not be deleted or suspended by usertasks True / False ? 14. The idle task consumes some of the processor resources - True / False ? How to reduce the resource usage ? 15. What are the various states of task in uC/OS-II RTOS ? 16. Explain Task Scheduling in uC/OS-II RTOS ? 17. Task-level scheduling and ISR-level scheduling are done by OS_Sched() and OSIntExit(), respectively - True/False ? 18. Task level scheduling invokes a software interrupt for context switches in uC/OS-II RTOS - True / False ?

19. Why are interrupts disabled while identifying the high-prirority ready task ? 20. Which API services Clock ticks ? 21. uC/OS-II RTOS lacks soft realtime support - True / False. 22. Does uC/OS-II RTOS support sempahore / Tell about OSSemPend and OSsemPost use ? 23. Tell about the use of mailbox in uC/OS=II RTOS ? 24. If there is already a message in the mailbox, then an error is returned, and also it is not overwritten - True/False 25. uC/OS-II does not automatically check for the status of stacks - True/False 26. What is the use of OSTaskStkCheck() ? 27. How will you port uC/OS-II RTOS ? 28. While porting, Where do you do the compiler specific data type and processor specific changes for porting uC/OS-II RTOS or What are the changes specific to OS_CPU.h ? 29. WHat is the use of HOOK functions / APIs ? 30. How can you identify the exten to which the CPU is busy ? 31. WHere do you do the interrupt related processor specific changes for porting uC/OS-II RTOS ? or What are the changes to be done in OS_CPU_A.ASM ? 32. Tell about Message Queues operation ? 33. What is the difference between Mailbox and Message queue in uC/OS-II RTOS ? 34. What are hooks ? PS - uC/OS-III RTOS has got released in March 2009 . The above questions have been framed based on uC/OS-II RTOS only.
Posted by super manidhan at 1:19 AM 2 comments Labels: Embedded, Interview, RTOS, uC/OS-II
WEDNESDAY, JUNE 9, 2010

Operating System interview questions

Earlier, i listed few of the good and highly probable RTOS interview questions. Here, i am listing general Operating System based interview questions that might be helpful for embedded interview. 1. What is an interrupt Vector ? 2. How CPUs find the ISR and distinguish between the various devices ? Is it possible for two devices to share an interrupt request line but have different ISR for those two devices ? 3. What is page fault ? 4. Which hardware unit of processor detects the page fault ? 5. Difference between Monolithic kernel, Micro kernel and Hybrid kernel ? 6. What is Interrupt Descriptor Table (IDT) ? 7. Main Difference between a process and thread ? 8. Threads are lightweight. Why and How ? 9. STACK growth is in downward direction in the case of 80x86 processor - True/False. 10. What is the difference between Multiprogramming and Multiprocessing ? 11. What is parallel programming ? 12. What is a time slice ? 13. What is the difference between multiprogramming and multiprocessing ? 14. What is parallel programming ? 15. What is ABI (Application Binary Interface ) ? 16. What is the layout of a program image in main memory ?

17. What are the types of IPC mechanisms ? 18. Tell about shared memory ? Does it provide locking mechanism ? When is it typically used ? 19. What are the types of synchronization problems and what are the resources that can cause such problems ? 20. What is data race ? 21. What is Indefinite Postponement / Indefinite blocking or starvation ? 22. What is Deadlock ? 23. What are the synchronization relationships that are present in a multithreaded or mulitprogramming applications ? 24. How Many Processes or Threads Are Enough for an application ? 25. How does memory segmentation help in memory protection ?
Posted by super manidhan at 11:54 PM 0 comments Labels: Embedded, Interview, Operating Systems

RTOS interview questions

RTOS has become very important as it is concerned with time critical events. Okay, let me list down few of the famous RTOS interview questions that can be helpful . 1. What is priority inversion ? 2. What are the solutions for priority inversion ? 3. What is priority inheritance ? 4. What is priority ceiling ? 5. What is deadlock ? 6. What is the famous diners problem ? 7. What is mutex ? 8. What is spinlock ? 9. Where are spinlocks used ? 10. What do you mean by atomic operations ? 11. what is a semaphore ? 12. What are the types of semaphore ? 13. What is binary semaphore ? 14. What is a counting semaphore ? 15. What is message queue ? 16. What is the role of a scheduler ? How does it function ? 17. What is the difference between a normal OS and RTOS ? 18. What is preemption ? 19. What is preemptive multi-tasking/time-sharing ? What is its difference with co-operative multitasking/time-sharing ? 20. Threads are described as lightweight because switching between threads does not involve changing the memory context - True/False ? 21.What are the factors considered for a RTOS selection ? 22. What is the use of the method of temporarily masking / disabling interrupts ? When is it used ? What should be taken care while doing this method ? 23. Since, disabling/masking of interrupts can be done whent the critical section is ONLY SHORT,What method can be used if the critical section is longer than few source lines or if it involves few lengthy loopings ? 24. Difference between semaphores and disabling/masking of interrupts method ? 25. Binary semaphore is equivalent to Mutex - True/False. How ? 26. How can you avoid deadlocks incase of semaphore based designs ?

27. What is Message passing method ? What is its advantages ? 28. Tell about the design of Interrupt Handler and Scheduler in RTOS ? 29. What is interrupt latency ? 30. Even if we never enables interrupts in the code, the processor automatically disables them often during hardware access - True/False ? In this case how to reduce interrupt latency ? 31. When should we re-enable the interrupts in an ISR and why ? 32. How do you measure the latency of your system ? 33. What are First Level Interrupt handlers and Second level Interrupt handlers ? 34. What could be the typical design/implementation of FLIH and SLIH ? 35. Reentrant interrupt handlers might cause a stack overflow from multiple preemptions by the same interrupt vector - True / False ? 36. What kind of memory allocation procedure is good for embedded systems ? 37. Is there any RTOS that has non-preemptive scheduling ? 38. What is reentrant code ? 39. What is preemptive multitasking ? 40. What does timeslice refer to ? 41. If the time slice is too short then the scheduler will consume too much of processing time - True / False 42. What is I/O bound ? What is CPU bound ? 43. What is non-preemptive multitasking ? 44. CFS uses 'nanosecond' granularity accounting, the atomic units by which individual process share the CPU instead of previous notion of 'timeslice' - True/False . 45. When will you use binary semaphore ? 46. When will you choose busy-wait instead of context switch ? 47. What are the possible scenarios in which context switching of threads can occur ? 48. Can you use mutex/semaphore inside an ISR ? 49. Explain a scenari that could cause deadlock ? What is the best solution for a deadlock ? 50. Will the performance of your application improve if it has only a single thread and it is running on multiple cores of a processor ? 51. What will happen if there are more threads requesting for CPU resource such as time ? 52. What is Gang Scheduling and how is it useful ? 53. Can you sleep in interrupt handler ? 54. What is the main drawback for not considering Linux as realtime / RTOS ? 55. What is the drawback in using semaphore for synchronization ? How does spinlock help in overcoming it ? 56. What does a semaphore consist of ? and What does a spinlock consist of ? 57. Why spinlocks are useless in uniprocessor systems ? 58. What is timeslice ? 59. What is the difference between multiprogramming and multiprocessing ? 60. What is parallel programming ? 61. What are the types of IPC mechanisms ? 62. What are the types of synchronization problems and what are the resources that can cause such problems ? 63. What is data race ? 64. What is Indefinite Postponement / Indefinite blocking or starvation ? 65. What are the synchronization relationships that are present in a multithreaded or mulitprogramming applications ? 66. How Many Processes or Threads Are Enough for an application ?

67. Tell the advantages and disadvantages of Co-operative multitasking. 67. When should we use mutex and when should we use semaphore ?
Posted by super manidhan at 7:00 PM 0 comments Labels: Embedded, Interview, RTOS
TUESDAY, JUNE 8, 2010

Boot loader interview questions

Here are boot loader related interview questions that can appear in an interview and might be of great interest to you. Check it out ! 1. What are the various boot loaders that you have worked on ? 2. Where is the boot loader present in an embedded system design ? 3. In general, what does the boot loader do ? 4. What is the role of boot loader in embedded systems ? 5. How will you handle a scenario in which the boot software is erased/corrupted ? 6. How will you handle boot software erasure/corruption scenario if Boot ROM is not available ? 7. What do you mean by bootstrap loader and what does it do ? 8. Is booting different from bootstrapping ? 9. When the computer is powered ON, it does not have OS it in neither ROM nor RAM - True/False ? 10. What is a second-stage boot loader ? 11. Do LILO/GRUB/Syslinux belong to either first stage boot loader(small program) or second-stage boot loaders ? 12. What is network booting ? 13. What is Chain loading or Multi-stage boot loader ? 14. Can you brief up the boot sequence of a normal desktop computer ? 15. Tell about OMAP CPU booting ? 16. What are the most common boot modes of DSP processor ? 17. Give few examples for systems that use Host Port(HPI Boot) for DSP booting ? 18. How will you put U-Boot into the target board ? 19. TFTP is a stripped down version of FTP that does not require authentication - True/False ? 20. Why do you need 2 stage boot process in OMAP processor ? 21. Can you give a highlevel view of Linux Boot process ? 22. What is the role of MBR and its relation with BIOS ? 23. Where is the MBR located ? 24. What is the structure of MBR ? 25. The secondary, or second-stage, boot loader could be more aptly called the kernel loader - True / False 26. What is the relation between GRUB and filesystem while booting ? or Main Difference between LILO and GRUB ? 27. What is the difference between zImage and bzImage ? 28. What is the role of initrd/Initial RAM disk ? 29. What is the role of initrd/Initial RAM disk in Embedded systems ? 30. Can you tell about the major function-level flow for Linux i386 booting ? 31. Does GRUB involve a 3-stage boot loading ? If yes, what are they . Brief it ? Hope this list will help in equipping yourself for few of major interview questions related with boot loaders :-)

Posted by super manidhan at 10:30 PM 0 comments Labels: Bootloader, DSP, Embedded, Interview, Linux

I2C and SPI related interview questions

Hey dudes, the following are the possible interview questions related to I2C and SPI protocol. 1. Can devices be added and removed while the system is running (Hot swapping) in I2C ? 2. What is the standard bus speed in I2C ? 3. How many devices can be connected in a standard I2C communication ? 4. What are the 2 roles of nodes in I2C communication ? 5. What are the modes of operation in I2C communication ? 6. What is bus arbitration ? 7. Advantages and limitations of I2C communication ? 8. How many wires are required for I2C communication ? What are the signals involved in I2C ? 9. What is START bit and STOP bit ? 10. How will the master indicate that it is either address / data ? How will it intimate to the slave that it is going to either read / write ? 11. Is it possible to have multiple masters in I2C ? 12. In write transaction, the Master monitors the last ACK and issues STOP condition - True/False ? 13. In read transaction, the master doesnot acknowledge the final byte it receives and issues STOP condition - True/False ? 14. What is SPI communication ? 15. How many wires are required for SPI communication ? 16. What are the 4 logic signals specified by SPI bus ? 17. Does SPI slave acknowledge the receipt of data ? 18. SPI has higher throughput than I2C - True / False ? 19. Is it better to use I2C or SPI for data communication between a microprocessor and DSP ? 20. Is it better to use I2C or SPI for data communication from ADC ? 21. Duplex communication is possible by simultaneously using MOSI and MISO during each SPI clock cycle - True / False ? 22. Is it possible to connect SPI slaves in daisy chain ? 23. What is the role of shift register in Master and Slave devices in SPI ? 24. How will the master convey that it is stopping the transmission of data ? 25. What is bit banging ? Hope , the above are the main possible embedded interview questions related to I2C/SPI protocol ! All the best :-)
Posted by super manidhan at 8:30 AM 0 comments Labels: Embedded, Interview, Protocol

Basic network/telecom based interview questions

Hey guys, thought that i would come up with few network/telecom based interview questions that might be frequently asked in various interviews in telcommunication or networking domain. Hope you give it a try ! 1. What is network throughput ? 2. What is bandwidth ? 3. In which layer is network throughput normally measured ? 4. What is Bandwidth-delay product ?

5. What is goodput ? 6. What is maximum bandwidth for a TCP based communication ? 7. What is MTU ? 8. What is MSS ? 9. What is Path MTU discovery ? 10. Which layer of OSI model does fragmentation based on MTU ? 11. What is a LFN (Long Fat Network) ? 12. What is Jumbo Frames ? 13. What is difference between Fast ethernet n/w i/f card and Gigabit ethernet n/w i/f card ? 14. What is the difference between outb and outportb APIs ? 15. What is the need for retransmission mechanism ? 16. What is the need for retransmission mechanism at various layers ? 17. What is socket communication ? 18. What is the use of the following APIs - socket, bind, listen, connect, accept, send, poll, receive ? 19. Have you used 'select' API ? 20. What are the types of sockets ? What is the difference between the following - datagram sockets, stream sockets and raw sockets ? 21. Provide a brief description about TCP Connection Establishment / 3 way handshake method of TCP connection establishment. 22. What is the data structure used in TCP communication ? 23. Tell about TCP and UDP wrt Transport Layer of OSI model ? 24. Why is MTU size 576 bytes ? 25. Explain the communication between DCE(Modem) and DTE(PC) ? 26. What happens as soon as a packet arrives from the network in Linux ? 27. Why is the design of TCP servers mostly such that whenever it accepts a connection, a new process is invoked to handle it . But, why in the case of UDP servers, mostly there is only a single process that handles all client requests ? 28. Why does the client end of a connection use high port number(ephemeral ports) whereas the applications listen on typically small port numbers ? 29. When should you use UDP and When should you use TCP ? Also, give some realtime examples of applications that use TCP or UDP . 30. Difference between TCP and UDP ? What is the difference between symbol rate and bit rate ? 31. What is BER (Bit error Rate / Bit Error Ratio)? 32. What is Spatial Multiplexing ? 33. What are the advantages of OFDM ? 34. In practice, OFDM signals are generated and detected using the FFT algorithm - True/False 35. What parameters can be changed for OFDM systems / Why should we not change Frequency ? 36. What is a Symbol in OFDM ? 37. What is the purpose of guard bands in OFDM ? 38. What do you mean by Tones in OFDM ? 39. Tell the 2 important tasks to be performed on the Receiver end of OFDM system ? 40. What is Turbo Codes ? 41. What are the advantages of Turbo Coding ? 42. What is Hybrid-ARQ ? 43. What is Frequency Reuse ? 44. What is Delay Spread ? 45. What is Call Processing ? 46. What is Reed-Solomon Error Correction ?

47. What is Reed-Solomon code and its areas of Uses ? 48. What is Shannon and its relation with Channel Capacity ? 49. What is "Channel Access Method" ? 50. What is FHSS - "Frequency-hopping spread spectrum" ? 51. What is TDM ? 52. Applications of TDM ? 53. What is TDMA ? 54. What are the features of TDMA ? 55. Tell few Systems that use TDMA ? 56. Tell about TDMA in 2G and 3G ? 57. Tell about CDMA vs TDMA ? 58. What is TDD ? 59. Examples of TDD systems ? 60. What is FDM ? 61. Applications of FDM ? 62. What is FDMA ? 63. What are the features of FDMA ? 64. What is FDD ? 65. Explain CDMA / IS-95 ? 66. What is spread spectrum and its use ? 67. What is the difference between UMTS and WCDMA ? 68. What does LAC stand for in CDMA ? 69. What is RLP and What is RLC ? 70. What are the basic ways to design the channel code and protocol for an error correcting system ? 71. What is convolutional code ? 72. What is the technology behind Mobile WiMAX ? 73. What is the technology behind LTE ? This is a small set of questions that i have thought of. I will be updating more in the future !
Posted by super manidhan at 4:25 AM 0 comments Labels: Embedded, Interview, Network, Telecom
MONDAY, JUNE 7, 2010

Flash Memory interview questions

I think, the below set of questions are the possible interview questions related to Flash Memory. 1. Why is serial flash memory preferred in embedded systems ? 2. Flash Memory is costlier than byte programmable EEPROM - True / False ? 3. MiniSD, MemoryStick are of NAND flash memory type - True / False ? 4. Flash memory's read access time is less than that of DRAM memory 's read access time - True / False ? 5. Flash memory has infinite number of erase-write cycles - True / False ? 6. NOR flash memory's usage is for random access read - True / False ? 7. NOR flash memory is preferred for XIP - True / False ? 8. NOR flash memory is more expensive than NAND flash memory - True/False ? 9. NAND flash memory's usage is for replacing the HDD and also to save space - True/False ? 10. NAND requires copying of memory contents into memory mapped RAM - True / False ? 11. A completely erased flash memory will have all corresponding bits set to 1 - True / False ?

12. Flash memory erases in both NOR and NAND flash memory is block basis - True / False ? 13. NAND flash memroy is not suitable for micrprocessor/microcontroller ROM - True / False ? 14. NOR memory is suitable for BIOS as it gives random access read/program - True/False ? 15. Why is NAND flash memory not suitable for ROM/Program memory of Microprocessor/Microcontroller ? 16. Erasure time of NOR flash memory is more than that of NAND flash memory - True/False ? 17. Write time of NOR flash memory is more than that of NAND flash memory - True/False ? 18. Why is blockwise erasure faster than that of bytewise erasure ? 19. Flash memory is a specific type of EEPROM - True / False ? 20. NAND flash memory is used for filesystems - True / False ? Why ? 21. In general, Flash Memory erase operation is slower than program operation . And the program operation is slower than read operation - True / False ? 22. In general, SPI interface is used by serial flash memory - True / False ? 23. What are the main areas of application of serial flash in embedded systems ? 24. NAND flash memory has greater storage density and lower cost per bit than NOR flash - True / False ? 25. What is XIP ? Where is it useful ? 26. What are the common Flash Memory problems ? 27. How will you test a Flash Memory ? Have you written any power on self test ? How will you perform the following test procedures for flash memory a. Address bus test b. Data bus test c. Control signal test d. Missing memory device test 28. Is writing to a flash memory straightforward ? How will you set/clear a particular bit of flash memory ? 29. How do you expand program memory space using Bank Switching/Code Banking ? Consider for 8051. 30. What are the disadvantages of Bank switching/Code Banking ? Consider for 8051. 31. Any alternative method to overcome drawbacks of Bank switching ? 32. What is the use of Common area in Code Banking ? 33. What is Overlaying ? Why is it popular in embedded systems ? Knowing the answers for the above flash memory based interview questions will be definitely helpful to you for an embedded interview . Cheers :-) All the Best !
Posted by super manidhan at 9:31 PM 0 comments Labels: Embedded, Interview, Memory

ADC or DAC interview questions

Hey geeks, the below is a set of possible ADC/DAC basic questions that can appear in an interview. 1. What are the factors you consider for the selection of ADC ? 2. What do you mean by Resolution of ADC ? 3. How do you determine the number of bits of ADC is required for you ? 4. Which factor determines the number of iterations in SAR done to approximate the input voltage ? 5. What are the 2 methods of ADC interface ? 6. Can you brief up the steps involved in ADC interface with 8051 or any microprocessor for the EOC based method ?

7. Can you brief up the steps involved in ADC interface with 8051 or any microprocessor for the Interrupt based method ? 8. How do you select the particular channel of a ADC . For example, can you tell for ADC0809 ? 9. When will you make the OE high in case of ADC0809 ? 10. What will happen if SC and EOC are tied together in ADC0809 ? 11. What is sampling rate/frequency ? 12. What is the use of interpolation formula ? Are you aware of any interpolation formula ? 13. What is sample and hold ? 14. Are there any Megasample / Gigasample converters ? Where are they used ? 15. What is aliasing ? 16. What is Nyquist-Shannon theorem ? 17. Is it good to sample at a rate that is higher than that of Nyquist Frequency ? 18. What is quantization error and when does it occur ? What is the unit of measurement of it ? 19. How can dithering improve digitization of slowly varying signal ? 20. Which type of ADC implementation is good or should be chosen, if we need lot of channels ? Well, try to answer these questions and that might be very helpful for your interview in embedded (ADC/DAC) . All the Best !
Posted by super manidhan at 5:23 PM 0 comments Labels: DSP, Embedded, Interview

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