Anna University: Chennai - 600 025
Anna University: Chennai - 600 025
E. Electronics and Communication Engineering) Regulations - 2008 Time: 3 Hours 1 2 3 4 5 6 7 8 9 Maximum Marks: 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100
Design & construct Half adder & Full Adder by using suitable logic gates & verify its truth table. Design & construct Half Subtractor & Full subtractor by using suitable logic gates & verify its truth table. Design & construct BCD to excess-3 converter , excess-3 to BCD converter using suitable logic gates and verify their truth table. Design & construct four bit binary to gray code converter & gray to binary code converter using suitable logic gates and verify their truth table. Design & construct Binary adder/ subtractor and BCD adder/ subtractor using IC 7483 Design & construct 2 bit magnitude comparator using logic gates and verify its function. Design & construct 8 bit magnitude comparator using IC7485 and verify its operation. Design & construct a 16 bit parity generator/checker using logic gates using IC 74180. Design & construct 4x1 Multiplexer & 1x4 demultiplexer & verify its truth table
10 Design & implement 4x2 Encoder & 2x4 decoder & verify its truth table 11 Design an asynchronous 4-bit binary up counter using JK flip flops. 12 Design an asynchronous/ripple 4-bit decimal (BCD) up counter using JK flip flops. 13 Design an asynchronous/ripple MOD-12 up counter using JK flip flops. 14 Design & construct a 4 bit serial in serial out shift register. 15 Design & construct a 4 bit Serial in parallel out shift register.
16 Design & construct a 4 bit Parallel in serial out shift register. 17 Design & construct a 4 bit Parallel in parallel out shift register.
100 100
18 Write a program for Half adder & full adder using verilog. Obtain RTL schematic and 100 necessary simulation waveforms 19 Write a program for Half subtractor & full subtractor using verilog. Obtain RTL 100 schematic and necessary simulation waveforms. 20 Write a program for Multiplexer & De-Multiplexer using verilog. Obtain RTL 100 schematic and necessary simulation waveforms. 21 Write a program for 4 bit ripple up counter & T flip flop using verilog. Obtain RTL 100 schematic and necessary simulation waveforms. 22 Write a program for any one type of shift register using verilog. Obtain RTL schematic 100 and necessary simulation waveforms.