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Digital Logic: Lab Sheet No. 2 Experiment On Two Input - NAND Gate (7400), NOR Gate (7402) & Exclusive OR

This document discusses digital logic gates including the NAND gate, NOR gate, and XOR gate. It describes their truth tables and boolean algebra expressions. The objectives are to study and verify the truth tables of these gates, realize an XOR gate using NAND gates, and realize 1-input NAND and NOR gates using 2-input gates. The equipment used includes a breadboard, LEDs, NAND, NOR, and XOR ICs, and connecting wires.

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Dinesh Pudasaini
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24 views

Digital Logic: Lab Sheet No. 2 Experiment On Two Input - NAND Gate (7400), NOR Gate (7402) & Exclusive OR

This document discusses digital logic gates including the NAND gate, NOR gate, and XOR gate. It describes their truth tables and boolean algebra expressions. The objectives are to study and verify the truth tables of these gates, realize an XOR gate using NAND gates, and realize 1-input NAND and NOR gates using 2-input gates. The equipment used includes a breadboard, LEDs, NAND, NOR, and XOR ICs, and connecting wires.

Uploaded by

Dinesh Pudasaini
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOC, PDF, TXT or read online on Scribd
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Kantipur City College Putalisadak, Kathmandu BIT- II Digital Logic: Lab Sheet No.

2 Experiment on Two Input - NAND Gate !"##$% N&' Gate !"#2) & Exclu(i)e &'
*&'$ Gate !"+,$ &b-ecti)e(: i. To study and veri y the truth ta!le o "#"$ %ate &'())) ii. To study and veri y the truth ta!le o "*+ %ate &'(),) iii. +eali-e .*+ %ate using a "#"$ %ate. iv. To study and veri y the truth ta!le o .*+ %ate &'(/0) v. To reali-e 1 input "#"$ %#T2 using 1 inputs "#"$ %#T2 vi. To reali-e 1 input "*+ %#T2 using 1 inputs "*+ %#T2 E.uipment( 'e.uire/: i. Bread Board 3ith 4 56olt Po3er 7upply. ii. 8ight 2mitting $iode &82$) iii. "#"$ %#T2 IC &'())) iv. "*+ %#T2 IC &'(),) v. .*+ %#T2 IC &'(/0) vi. Conne9ting :ires

Theor0
NAND GATE 9an !e taken as a universal gate as it 9an per orm #"$ %#T2, *+ %#T2 "*T %#T2 in 9om!ination *utput o "#"$ %#T2 is ;I%; i any o the input is 8*:. *utput o "#"$ %#T2 is 8*: i all o the inputs are ;I%; Boolean alge!ra o "#"$ %#T2: . < A.B Truth Ta!le o "#"$ %#T2 Inputs # ) ) ? ? +e9tangular 7ym!ol $istin9tive 7ym!ol B ) ? ) ? *utputs . ? ? ? )

N&' GATE 9an !e taken as a universal gate as in 9om!ination, it 9an per orm #"$ %#T2, *+ %#T2, "*T %#T2 in 9om!ination. *utput o ="*+> is %ate ;I%; i all the inputs are lo3. *utput o ="*+> is %ate 8*: i any o the input is ;I%; Boolean alge!ra o "*+ %#T2: . < A + B

Kantipur City College Putalisadak, Kathmandu BIT- II


Truth Ta!le o "*+ %#T2 Inputs *utputs # B . ) ) ? ) ? ) ? ) ) ? ? )

$istin9tive 7ym!ol

+e9tangular 7ym!ol

*&' GATE gives high output 3henever the level o t3o inputs is di erent. It gives 8*: output 3henever the level o the t3o inputs is same.

$istin9tive 7ym!ol o .*+ %ate

+e9tangular 7ym!ol o .*+ %ate

@rom , input "#"$ and "*+ gets reali-e 1 input "#"$ gate and "*+ gate. 1ircuit Diagram: &b(er)ation: Di(cu((ion an/ conclu(ion:

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