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Analog Digital Apr2009

The document is an exam paper for an analog and digital CMOS IC design course. It contains 8 questions divided into two sections. Section 1 deals with MOSFET and opamp design questions. It asks to calculate device dimensions for a given resistance, design a differential amplifier, and discuss low noise and buffered opamps. Section 2 covers finite state machine design in VHDL, CMOS parasitics, NORA logic, high speed VLSI trends, and power dissipation calculations. It also asks short notes on topics like transmission gates and low power design.

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humtum_shri5736
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24 views

Analog Digital Apr2009

The document is an exam paper for an analog and digital CMOS IC design course. It contains 8 questions divided into two sections. Section 1 deals with MOSFET and opamp design questions. It asks to calculate device dimensions for a given resistance, design a differential amplifier, and discuss low noise and buffered opamps. Section 2 covers finite state machine design in VHDL, CMOS parasitics, NORA logic, high speed VLSI trends, and power dissipation calculations. It also asks short notes on topics like transmission gates and low power design.

Uploaded by

humtum_shri5736
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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Total No.

of Questions : 8]

[Total No. of Pages : 2

P1650

[3665] - 127 - A
M.E. (E & T/C.) VLSI & Embedded Systems
ANALOG AND DIGITAL CMOS IC DESIGN (2008 Course) (Elective - I)

Time : 3 Hours]

[Max. Marks : 100

Instructions to the candidates: 1) Answer any three questions from each section. 2) Answers to the two sections should be written in separate books. 3) Neat diagrams must be drawn wherever necessary. 4) Use of electronic pocket calculator is allowed. 5) Assume suitable data, if necessary.

SECTION - I Q1) a) b) Calculate W/L for MOSFET to offer dynamic resistance of 10 k . Assume suitable data. [8] With the help of necessary schematic explain current sink & source with Rout offered. [8]

Q2) Design CMOS differential amplifier for CMRR = 40dB. The dissipation should not exceed 2.5 mW at supply of 2.5V. [16] Q3) a) b) What is design technique for low noise opamp? Brief with the help of necessary expressions. [8] What is meant by buffered opamp? Explore with schematic. [8] [18]

Q4) Write short notes on any three : a) b) c) d) Cascode amplifier. Current mirrors. Bandgap reference. Micro power opamp. SECTION - II

Q5) Draw FSM diagram & write VHDL code for 001101 Moor sequence detector. Also write test bench for it. [16]

P.T.O.

Q6) a) b)

Explore CMOS parasitics in detail. How do they affect performance? [8] What is need of NORA logic? With suitable schematic explore the typical logic function. [8] What are the advance trends in high speed VLSI? [8]

Q7) a) b)

For CMOS logic derive the expressions for total power dissipation & PDP. [8] [18]

Q8) Write short notes on any three : a) b) c) d) Merits & demerits of transmission gate. Technology scaling & its effects. Hazards & mitigation techniques. Low power design.

[3665] - 127-A

-2-

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