Open In App

Instruction Formats

Last Updated : 21 Oct, 2025
Comments
Improve
Suggest changes
186 Likes
Like
Report

Instruction format defines how instructions are represented in a computer’s memory. There are different types of instruction formats, including zero, one, two, and three-address instructions.

what_is_instruction_format_in_coa_
Defines how the CPU decodes and executes instructions.
  • Opcode: This field specifies the operation to be performed by the CPU, such as addition, subtraction, or data transfer.
  • Operands: These fields contain the data or references (addresses) to data on which the operation acts.
  • Addressing Mode: This specifies how to interpret or locate the operand, such as direct, indirect, or immediate addressing.

Types of Instruction Formats

Instruction formats are classified into zero, one, two, and three-address types, depending on how many address fields they have. Each type works differently and is used in various ways in computer architecture.

NOTE: We will use the X = (A+B)*(C+D) expression to showcase the procedure. 

Zero Address Instructions

These instructions do not specify any operands or addresses. Instead, they operate on data stored in registers or memory locations implicitly defined by the instruction. For example, a zero-address instruction might simply add the contents of two registers together without specifying the register names.

Zero Address Instruction
Zero Address Instruction


A stack-based computer does not use the address field in the instruction. To evaluate an expression, it is first converted to reverse Polish Notation i.e. Postfix Notation.

Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+*
TOP means top of stack
M[X] is any memory location

InstructionStack (TOP Value After Execution)
PUSH ATOP = A
PUSH BTOP = B
ADDTOP = A + B
PUSH CTOP = C
PUSH DTOP = D
ADDTOP = C + D
MULTOP = (C + D) * (A + B)
POP XM[X] = TOP

One Address Instructions

These instructions specify one operand or address, which typically refers to a memory location or register. The instruction operates on the contents of that operand, and the result may be stored in the same or a different location. For example, a one-address instruction might load the contents of a memory location into a register.

This uses an implied ACCUMULATOR register for data manipulation. One operand is in the accumulator and the other is in the register or memory location. Implied means that the CPU already knows that one operand is in the accumulator so there is no need to specify it.

One Address Instruction
One Address Instruction

Expression: X = (A+B)*(C+D)
AC is accumulator
M[] is any memory location
M[T] is temporary location

InstructionStack / Register (AC / M[])
AC = AAC = A
AC = AC + BAC = A + B
M[T] = ACM[T] = A + B
AC = CAC = C
AC = AC + DAC = C + D
M[] = ACM[] = C + D
AC = AC * M[T]AC = (A + B) * (C + D)
M[X] = ACM[X] = (A + B) * (C + D)

Two Address Instructions

These instructions specify two operands or addresses, which may be memory locations or registers. The instruction operates on the contents of both operands, and the result may be stored in the same or a different location. For example, a two-address instruction might add the contents of two registers together and store the result in one of the registers.

This is common in commercial computers. Here two addresses can be specified in the instruction. Unlike earlier in one address instruction, the result was stored in the accumulator, here the result can be stored at different locations rather than just accumulators, but require more number of bit to represent the address.

Two Address Instruction
Two Address Instruction

Here destination address can also contain an operand.

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

InstructionRegisters / Memory (R1, R2, M[])
R1 = AR1 = A
R1 = R1 + BR1 = A + B
R2 = CR2 = C
R2 = R2 + DR2 = C + D
R1 = R1 * R2R1 = (A + B) * (C + D)
M[X] = R1M[X] = (A + B) * (C + D)

Three Address Instructions

These instructions specify three operands or addresses, which may be memory locations or registers. The instruction operates on the contents of all three operands, and the result may be stored in the same or a different location. For example, a three-address instruction might multiply the contents of two registers together and add the contents of a third register, storing the result in a fourth register.

This has three address fields to specify a register or a memory location. Programs created are much short in size but number of bits per instruction increases. These instructions make the creation of the program much easier but it does not mean that program will run much faster because now instructions only contain more information but each micro-operation (changing the content of the register, loading address in the address bus etc.) will be performed in one cycle only.

Three Address Instruction
Three Address Instruction

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

Instruction

Description

R1 = A

Load value A into R1

R1 = R1 + B

Add B to R1

M[T1] = R1

Store R1 into memory at M[T1]

R2 = C

Load value C into R2

R2 = R2 + D

Add D to R2

M[T2] = R2

Store R2 into memory at M[T2]

R1 = M[T1]

Load M[T1] into R1

R1 = R1 * M[T2]

Multiply R1 by M[T2] and store in R1

M[X] = R1

Store R1 into memory at M[X]

CPU Organization and Instruction Formats

Generally, CPU organization is of three types based on the number of address fields:

  • Single Accumulator Organisation: Uses one special register (called an accumulator) to store and process data for operations.
  • General Register Organisation: Uses several general-purpose registers to hold operands (data) for operations.
  • Stack Organisation: Works with a stack, processing data using the top elements without directly specifying operands.
Suggested Quiz
6 Questions

What is the primary objective of an Instruction Set Architecture (ISA)?

  • A

    To define the hardware implementation of the processor

  • B

    To specify the set of instructions a processor can execute and their format

  • C

    To design the microarchitecture of a processor

  • D

    To optimize the processor clock speed

Explanation:

ISA defines the set of instructions available to software, their binary encoding, and how instructions operate on data

Which of the following best distinguishes Microarchitecture from ISA?

  • A

    ISA deals with implementation, Microarchitecture deals with software

  • B

    ISA is the physical layout of circuits, Microarchitecture is the instruction set

  • C

    ISA is a programmer-visible interface; Microarchitecture is the internal organization of the processor

  • D

    Microarchitecture defines instruction formats; ISA defines control signals

Explanation:

ISA is the abstract interface that software programmers see, whereas Microarchitecture refers to the detailed hardware design that implements the ISA.

Which type of ISA is characterized by a large number of simple instructions and fixed instruction length?

  • A

    RISC

  • B

    CISC

  • C

    VLIW

  • D

    Stack-based

Explanation:

RISC uses simple, uniform instructions, often with fixed-length formats to simplify decoding and improve pipelining.

Which of the following instruction formats contains no operand fields?

  • A

    Zero-address format

  • B

    One-address format

  • C

    Two-address format

  • D

    Three-address format

Explanation:

Zero-address instructions typically operate using an implicit stack; without specifying explicit operand addresses

Why is the instruction format important in CPU organization?

  • A

    It determines how many registers are available

  • B

    It influences how instructions are fetched, decoded, and executed

  • C

    It fixes the clock speed of the CPU

  • D

    It decides the power consumption of the processor

Explanation:

The instruction format defines how to parse an instruction, which affects the design of the instruction fetch and decode units

In a CPU instruction format, the opcode field:

  • A

    Specifies the operation to be performed

  • B

    Indicates the addressing mode

  • C

    Contains the data to operate on

  • D

    Stores the result of the operation

Explanation:

The opcode identifies the specific operation that the CPU should perform

Quiz Completed Successfully
Your Score :   2/6
Accuracy :  0%
Login to View Explanation
1/6 1/6 < Previous Next >

Explore