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Program Control Instructions

Last Updated : 21 Oct, 2025
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Program Control Instructions are machine code instructions that manage the flow of execution in a microprocessor or microcontroller. They allow the processor to make decisions, repeat operations, or stop execution as needed. These instructions are commonly written in assembly language or generated from high-level languages during compilation.

  • Direct the processor to execute specific tasks and access different program segments.
  • Enable decision-making and looping within a program.
  • Control how and when instructions are executed.
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Types of Program Control Instructions

Following are some control instructions with their examples:

1. Compare Instruction

Compare instruction is specifically provided, which is similar to a subtract instruction except the result is not stored anywhere, but flags are set according to the result. 

Example:
CMP R1, R2 ;

2. Unconditional Branch Instruction

It causes an unconditional change in the execution sequence, meaning the processor directly jumps to a new memory location and continues execution from there without checking any conditions.

Example:
JUMP L2
Mov R3, R1 goto L2

3. Conditional Branch Instruction

A conditional branch instruction is used to examine the values stored in the condition code register to determine whether the specific condition exists and to branch if it does. 

Example:
Assembly Code : BE R1, R2, L1
Compiler allocates R1 for x and R2 for y
High Level Code: if (x==y) goto L1;

4. Subroutines

A subroutine is a program fragment that lives in user space, performs a well-defined task. It is invoked by another user program and returns control to the calling program when finished. 

Example:
CALL and RET

5. Halting Instructions

Halting Instructions are special instructions used to either pause or stop the execution of a program without performing any data processing operations. They help in managing processor timing, synchronization, or bringing the system to a controlled stop.

  • NOP (No Operation): Causes no change in the processor state other than advancing the program counter. It is often used to synchronize timing.
  • HALT: Brings the processor to an orderly halt and keeps it in an idle state until restarted by an interrupt, trace, reset, or external action.

6. Interrupt Instructions

Interrupt is a mechanism by which an I/O or an instruction can suspend the normal execution of processor and get itself serviced. 

  • RESET - It reset the processor. This may include any or all setting registers to an initial value or setting program counter to standard starting location.
  • TRAP - It is non-maskable edge and level triggered interrupt. TRAP has the highest priority and vectored interrupt.
  • INTR - It is level triggered and maskable interrupt. It has the lowest priority. It can be disabled by resetting the processor.

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