Combinational Circuits

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Question 1

A multiplexer is placed between a group of 32 registers and an accumulator to regulate data movement such that at any given point in time the content of only one register will move to the accumulator. The number of select lines needed for the multiplexer is _________ .

Note - This question was Numerical Type.

  • 5

  • 6

  • 4

  • 7

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Question 2

If there are m input lines n output lines for a decoder that is used to uniquely address a byte addressable 1 KB RAM, then the minimum value of m+n is ________ .

Note - This question was Numerical Type.

  • 18

  • 1034

  • 10

  • 1024

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Question 3

In the following truth table, V = 1 if and only if the input is valid. gatecs20133 What function does the truth table represent?

  • Priority encoder
  • Decoder
  • Multiplexer
  • Demultiplexer
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Question 4

What is the Boolean expression for the output f of the combinational logic circuit of NOR gates given below? CSE_201031

  • (Q+R)'

  • (P+Q)'

  • (P+R)

  • (P+Q+R)'

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Question 5

How many 3-to-8 line decoders with an enable input are needed to construct a 6-to-64 line decoder without using any other logic gates?
  • 7
  • 8
  • 9
  • 10
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Question 6

Suppose only one multiplexer and one inverter are allowed to be used to implement any Boolean function of n variables. What is the minimum size of the multiplexer needed?

  • 2n line to 1 line

  • 2n+1 line to 1 line

  • 2n-1 line to 1 line

  • 2n-2 line to 1 line

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Question 7

In a look-ahead carry generator, the carry generate function Gi and the carry propagate function Pi for inputs Ai and Bi are given by: 
Pi = Ai ⨁ Bi and Gi = AiBi
The expressions for the sum bit Si and the carry bit Ci+1 of the look-ahead carry adder are given by: 
Si = Pi ⨁ Ci and Ci+1 = Gi + PiCi , where C0 is the input carry.
Consider a two-level logic implementation of the look-ahead carry generator. Assume that all Pi and Gi are available for the carry generator circuit and that the AND and OR gates can have any number of inputs. The number of AND gates and OR gates needed to implement the look-ahead carry generator for a 4-bit adder with S3, S2, S1, S0 and C4 as its outputs are respectively:
  • 6, 3
  • 10, 4
  • 6, 4
  • 10, 5
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Question 8

Consider a 4-to-1 multiplexer with two select lines S1 and S0, given below GATECS2014Q55 The minimal sum-of-products form of the Boolean expression for the output F of the multiplexer is

  • P\'Q + QR\' + PQ\'R
  • P\'Q + P\'QR\' + PQR\' + PQ\'R
  • P\'QR + P\'QR\' + QR\' + PQ\'R
  • PQR\'
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Question 9

Consider the following combinational function block involving four Boolean variables x, y, a, b where x, a, b are inputs and y is the output. C 
f (x, y, a, b)
{
   if (x is 1) y = a;
   else y = b;
}
Which one of the following digital logic blocks is the most suitable for implementing this function?
  • Full adder
  • Priority encoder
  • Multiplexer
  • Flip-flop
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Question 10

GATE2006Q35 Consider the circuit above. Which one of the following options correctly represents f (x, y, z)?
  • xz\' + xy + y\'z
  • xz\' + xy + (yz)\'
  • xz + xy + (yz)\'
  • xz + xy\' + y\'z
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