PLC: Programmable Logic Controller – Arktika.: EXPERIMENTAL PRODUCT BASED ON CPLD.

------------------------------------------------------------------------------------

PREFACE.  (1_01 - 1_05)  (INDEX)

------------------------------------------------------------------------------------

The digital book (or eBook), entitled:

''PLC: PROGRAMMABLE LOGIC CONTROLLER – ARKTIKA''

describes the construction, syntax and programming of a system capable of processing Boolean operations and capable of intercommunicating with other circuit parts electrically connected to it, such as digital integrated circuits.

The processing logic is continuous and can be programmed to perform only the necessary operations, characteristics that equate it to a PLC even if designed for teaching and study purposes, in particular of Boolean algebra.

The processing unit responsible for processing the calculations is based on an electronic architecture installed on a CPLD (Complex Programmable Logic Device) integrated circuit, given the flexibility of use of the latter.

The main support where all the system electronics are housed is a commercial board where the CPLD programmable logic integrated circuit and the primary supports such as stabilized power supply, connectors to connect the complementary circuit modules, LEDs, etc. are already soldered. simplifying hardware construction.

• The text includes attachments, the most important of which are:

- files (.qpf), (.qsf), (.pof) to program the CPLD integrated circuit in addition to the Verilog file (.v) which describes the processing architecture;

- graphic diagram of the processing architecture;

- communication protocol for programming via PC;

- 34 programming examples to test the system;

• Other attachments concern:

- files to create the printed circuits of the modules that will attach to the main board;

- files (.qpf), (.qsf), (.pof), (.v) to program the CPLD integrated circuit and to be used for some simple tests of hardware robustness against external interference.

• LINK DOWNLOAD INTERNET - ACCESS TO ATTACHED FILES.

- LINK 1;

- LINK 2.

Both LINKS allow you to download the ATTACHMENT.7z file which in turn must be decompressed with the 7-zip software.

The pages of this title have been curated to be viewed by ebook_readers, tablets and PCs.

An intensive use of schematic drawings is made, exploiting the characteristic of including a lot of information that can be consulted in an intuitive way given the characteristic of the universal language.

The same thing also applies to photos, in color and with resolutions designed to enlarge the details as well as making the theme more interesting.

PREFACE, PREVIEW.  (1_06)  (INDEX)

Photo: System image.

PREFACE, PREVIEW.  (1_07)  (INDEX)

Photo: System image.

INDEX.  (1_08)

• 1: INTRODUCTORY DESCRIPTION OF THE SYSTEM.

• 2: PROJECTS TO BUILD THE SYSTEM.

• 3: DESCRIPTIVE CODE, STRUCTURE.

• 4: DESCRIPTIVE CODE, SYNTAX.

• 5: DESCRIPTIVE CODE, ADDITIONAL SYNTAXES.

• 6: PROGRAMMING.

• 7: SYSTEM TESTING, PROGRAMMING.

• 8: SYSTEM TESTING, ELECTRONICS.

• 9_01: ACCESS TO ATTACHED FILES,  LINK 1.

• 9_02: ACCESS TO ATTACHED FILES,  LINK 2.

------------------------------------------------------------------------------------

1_INTRODUCTORY DESCRIPTION OF THE SYSTEM.  (1_09 - 1_10)  (INDEX)

------------------------------------------------------------------------------------

The processing system (hereinafter simply referred to as system), as already introduced in the preface, can be subjected to a PLC (programmable_logic_controller) of an educational and study nature, developed with its own processing architecture (ARKTIKA-A) and related syntax of programming.

The operating principle, at the calculation level, is to process the translation into binary numbers of an ideal digital circuit developed to carry out predetermined and automated operations and communicate the results with other electronic devices possibly connected to it, which in turn transform them in optical signals mechanical, sound, computational signals, etc.

The circuit configuration adopted, during the Boolean calculation of the circuit description, exploits the advantages of the communication speed of the RAM memory with the processing architecture programmed on the CPLD integrated circuit.

INTRODUCTORY DESCRIPTION OF THE SYSTEM.  (1_11 - 1_12)  (INDEX)

CHARACTERISTICS:

• main electronics consisting of a main board equipped with a CPLD programmable logic integrated circuit and available as a commercial product;

• processing architecture installed on CPLD integrated circuit;

• management of the description of a digital circuit composed of up to a maximum of 3185 logical elements and 32,767+1 memory cells;

• flexible syntax to describe the digital circuit;

• programming via wav or Mp3 audio files transmitted from a PC where common playback software is installed;

• number of programs that can be performed depending on the read/write cycles of the connected F-RAM memory which varies from 10^12 to 10^14 times depending on the type used;

• support software partly commonly installed on PCs and for those missing downloadable from the internet with a freeware licence;

• assembly on commercial CPLD board using mainly complementary modules made on standardized printed circuits;

• working frequency generator integrated into the CPLD chip (<