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| 1 | +; This test emulates two translation units with 3 kernels: |
| 2 | +; TU0_kernel0 - 1st translation unit, no aspects used |
| 3 | +; TU0_kernel1 - 1st translation unit, aspect 1 is used |
| 4 | +; TU1_kernel2 - 2nd translation unit, no aspects used |
| 5 | + |
| 6 | +; The test is intended to check that sycl-post-link correctly separates kernels |
| 7 | +; that use aspects from kernels which doesn't use aspects regardless of device |
| 8 | +; code split mode |
| 9 | + |
| 10 | +; RUN: sycl-post-link -split=auto -symbols -S %s -o %t.table |
| 11 | +; RUN: FileCheck %s -input-file=%t_0.ll --check-prefixes CHECK-M0-IR \ |
| 12 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 13 | +; RUN: FileCheck %s -input-file=%t_1.ll --check-prefixes CHECK-M1-IR \ |
| 14 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 15 | +; RUN: FileCheck %s -input-file=%t_2.ll --check-prefixes CHECK-M2-IR \ |
| 16 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 17 | +; RUN: FileCheck %s -input-file=%t_0.sym --check-prefixes CHECK-M0-SYMS \ |
| 18 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 19 | +; RUN: FileCheck %s -input-file=%t_1.sym --check-prefixes CHECK-M1-SYMS \ |
| 20 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 21 | +; RUN: FileCheck %s -input-file=%t_2.sym --check-prefixes CHECK-M2-SYMS \ |
| 22 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 23 | + |
| 24 | +; RUN: sycl-post-link -split=source -symbols -S %s -o %t.table |
| 25 | +; RUN: FileCheck %s -input-file=%t_0.ll --check-prefixes CHECK-M0-IR \ |
| 26 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 27 | +; RUN: FileCheck %s -input-file=%t_1.ll --check-prefixes CHECK-M1-IR \ |
| 28 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 29 | +; RUN: FileCheck %s -input-file=%t_2.ll --check-prefixes CHECK-M2-IR \ |
| 30 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 31 | +; RUN: FileCheck %s -input-file=%t_0.sym --check-prefixes CHECK-M0-SYMS \ |
| 32 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 33 | +; RUN: FileCheck %s -input-file=%t_1.sym --check-prefixes CHECK-M1-SYMS \ |
| 34 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 35 | +; RUN: FileCheck %s -input-file=%t_2.sym --check-prefixes CHECK-M2-SYMS \ |
| 36 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 37 | + |
| 38 | +; RUN: sycl-post-link -split=kernel -symbols -S %s -o %t.table |
| 39 | +; RUN: FileCheck %s -input-file=%t_0.ll --check-prefixes CHECK-M0-IR \ |
| 40 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 41 | +; RUN: FileCheck %s -input-file=%t_1.ll --check-prefixes CHECK-M1-IR \ |
| 42 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 43 | +; RUN: FileCheck %s -input-file=%t_2.ll --check-prefixes CHECK-M2-IR \ |
| 44 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 45 | +; RUN: FileCheck %s -input-file=%t_0.sym --check-prefixes CHECK-M0-SYMS \ |
| 46 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 47 | +; RUN: FileCheck %s -input-file=%t_1.sym --check-prefixes CHECK-M1-SYMS \ |
| 48 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 49 | +; RUN: FileCheck %s -input-file=%t_2.sym --check-prefixes CHECK-M2-SYMS \ |
| 50 | +; RUN: --implicit-check-not kernel0 --implicit-check-not kernel1 |
| 51 | + |
| 52 | +; Regardless of device code split mode, each kernel should go into a separate |
| 53 | +; device image |
| 54 | + |
| 55 | +; CHECK-M2-IR: define {{.*}} @TU0_kernel0 |
| 56 | +; CHECK-M2-SYMS: TU0_kernel0 |
| 57 | + |
| 58 | +; CHECK-M1-IR: define {{.*}} @TU0_kernel1 |
| 59 | +; CHECK-M1-SYMS: TU0_kernel1 |
| 60 | + |
| 61 | +; CHECK-M0-IR: define {{.*}} @TU1_kernel2 |
| 62 | +; CHECK-M0-SYMS: TU1_kernel2 |
| 63 | + |
| 64 | +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024" |
| 65 | +target triple = "spir64-unknown-linux" |
| 66 | + |
| 67 | +; FIXME: device globals should also be properly distributed across device images |
| 68 | +; if they are of optional type |
| 69 | +@_ZL2GV = internal addrspace(1) constant [1 x i32] [i32 42], align 4 |
| 70 | + |
| 71 | +define dso_local spir_kernel void @TU0_kernel0() #0 { |
| 72 | +entry: |
| 73 | + call spir_func void @foo() |
| 74 | + ret void |
| 75 | +} |
| 76 | + |
| 77 | +define dso_local spir_func void @foo() { |
| 78 | +entry: |
| 79 | + %a = alloca i32, align 4 |
| 80 | + %call = call spir_func i32 @bar(i32 1) |
| 81 | + %add = add nsw i32 2, %call |
| 82 | + store i32 %add, i32* %a, align 4 |
| 83 | + ret void |
| 84 | +} |
| 85 | + |
| 86 | +; Function Attrs: nounwind |
| 87 | +define linkonce_odr dso_local spir_func i32 @bar(i32 %arg) { |
| 88 | +entry: |
| 89 | + %arg.addr = alloca i32, align 4 |
| 90 | + store i32 %arg, i32* %arg.addr, align 4 |
| 91 | + %0 = load i32, i32* %arg.addr, align 4 |
| 92 | + ret i32 %0 |
| 93 | +} |
| 94 | + |
| 95 | +define dso_local spir_kernel void @TU0_kernel1() #0 !sycl_used_aspects !2 { |
| 96 | +entry: |
| 97 | + call spir_func void @foo1() |
| 98 | + ret void |
| 99 | +} |
| 100 | + |
| 101 | +; Function Attrs: nounwind |
| 102 | +define dso_local spir_func void @foo1() { |
| 103 | +entry: |
| 104 | + %a = alloca i32, align 4 |
| 105 | + store i32 2, i32* %a, align 4 |
| 106 | + ret void |
| 107 | +} |
| 108 | + |
| 109 | +define dso_local spir_kernel void @TU1_kernel2() #1 { |
| 110 | +entry: |
| 111 | + call spir_func void @foo2() |
| 112 | + ret void |
| 113 | +} |
| 114 | + |
| 115 | +; Function Attrs: nounwind |
| 116 | +define dso_local spir_func void @foo2() { |
| 117 | +entry: |
| 118 | + %a = alloca i32, align 4 |
| 119 | + %0 = load i32, i32 addrspace(4)* getelementptr inbounds ([1 x i32], [1 x i32] addrspace(4)* addrspacecast ([1 x i32] addrspace(1)* @_ZL2GV to [1 x i32] addrspace(4)*), i64 0, i64 0), align 4 |
| 120 | + %add = add nsw i32 4, %0 |
| 121 | + store i32 %add, i32* %a, align 4 |
| 122 | + ret void |
| 123 | +} |
| 124 | + |
| 125 | +attributes #0 = { "sycl-module-id"="TU1.cpp" } |
| 126 | +attributes #1 = { "sycl-module-id"="TU2.cpp" } |
| 127 | + |
| 128 | +!opencl.spir.version = !{!0, !0} |
| 129 | +!spirv.Source = !{!1, !1} |
| 130 | + |
| 131 | +!0 = !{i32 1, i32 2} |
| 132 | +!1 = !{i32 4, i32 100000} |
| 133 | +!2 = !{i32 1} |
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