Update config.{guess,sub}, timestamps 2023-01-01,2023-01-21

[libpcap] / extract.h

diff --git a/extract.h b/extract.h
index 941ccc2a349c165b814facb0b17a207407ec4f5f..33579b1155b5593e17acacc6b5930507569ea405 100644 (file)
--- a/extract.h
+++ b/extract.h
@@ -58,7 +58,6 @@
 #endif
 
 #if (defined(__i386__) || defined(_M_IX86) || defined(__X86__) || defined(__x86_64__) || defined(_M_X64)) || \
 #endif
 
 #if (defined(__i386__) || defined(_M_IX86) || defined(__X86__) || defined(__x86_64__) || defined(_M_X64)) || \

-    (defined(__arm__) || defined(_M_ARM) || defined(__aarch64__)) || \

     (defined(__m68k__) && (!defined(__mc68000__) && !defined(__mc68010__))) || \
     (defined(__ppc__) || defined(__ppc64__) || defined(_M_PPC) || defined(_ARCH_PPC) || defined(_ARCH_PPC64)) || \
     (defined(__s390__) || defined(__s390x__) || defined(__zarch__))
     (defined(__m68k__) && (!defined(__mc68000__) && !defined(__mc68010__))) || \
     (defined(__ppc__) || defined(__ppc64__) || defined(_M_PPC) || defined(_ARCH_PPC) || defined(_ARCH_PPC64)) || \
     (defined(__s390__) || defined(__s390x__) || defined(__zarch__))


@@ -67,9 +66,6 @@
  * cast the pointer and fetch through it.
  *
  * XXX - are those all the x86 tests we need?
  * cast the pointer and fetch through it.
  *
  * XXX - are those all the x86 tests we need?

- * XXX - do we need to worry about ARMv1 through ARMv5, which didn't
- * support unaligned loads, and, if so, do we need to worry about all
- * of them, or just some of them, e.g. ARMv5?

  * XXX - are those the only 68k tests we need not to generated
  * unaligned accesses if the target is the 68000 or 68010?
  * XXX - are there any tests we don't need, because some definitions are for
  * XXX - are those the only 68k tests we need not to generated
  * unaligned accesses if the target is the 68000 or 68010?
  * XXX - are there any tests we don't need, because some definitions are for


@@ -116,7 +112,7 @@ EXTRACT_BE_S_8(const void *p)
                ((uint64_t)ntohl(*((const uint32_t *)(p) + 1))) << 0));
 
 }
                ((uint64_t)ntohl(*((const uint32_t *)(p) + 1))) << 0));
 
 }

-#elif ND_IS_AT_LEAST_GNUC_VERSION(2,0) && \
+#elif PCAP_IS_AT_LEAST_GNUC_VERSION(2,0) && \

     (defined(__alpha) || defined(__alpha__) || \
      defined(__mips) || defined(__mips__))
 /*
     (defined(__alpha) || defined(__alpha__) || \
      defined(__mips) || defined(__mips__))
 /*


@@ -131,11 +127,11 @@ EXTRACT_BE_S_8(const void *p)
  * cast the pointer to point to one of those, and fetch through it;
  * the GCC manual doesn't appear to explicitly say that
  * __attribute__((packed)) causes the compiler to generate unaligned-safe
  * cast the pointer to point to one of those, and fetch through it;
  * the GCC manual doesn't appear to explicitly say that
  * __attribute__((packed)) causes the compiler to generate unaligned-safe

- * code, but it apppears to do so.
+ * code, but it appears to do so.

  *
  * We do this in case the compiler can generate code using those
  * instructions to do an unaligned load and pass stuff to "ntohs()" or
  *
  * We do this in case the compiler can generate code using those
  * instructions to do an unaligned load and pass stuff to "ntohs()" or

- * "ntohl()", which might be better than than the code to fetch the
+ * "ntohl()", which might be better than the code to fetch the

  * bytes one at a time and assemble them.  (That might not be the
  * case on a little-endian platform, such as DEC's MIPS machines and
  * Alpha machines, where "ntohs()" and "ntohl()" might not be done
  * bytes one at a time and assemble them.  (That might not be the
  * case on a little-endian platform, such as DEC's MIPS machines and
  * Alpha machines, where "ntohs()" and "ntohl()" might not be done


@@ -232,6 +228,16 @@ EXTRACT_BE_S_8(const void *p)
  * set to do unaligned loads, so do unaligned loads of big-endian
  * quantities the hard way - fetch the bytes one at a time and
  * assemble them.
  * set to do unaligned loads, so do unaligned loads of big-endian
  * quantities the hard way - fetch the bytes one at a time and
  * assemble them.

+ *
+ * XXX - ARM is a special case.  ARMv1 through ARMv5 didn't suppory
+ * unaligned loads; ARMv6 and later support it *but* have a bit in
+ * the system control register that the OS can set and that causes
+ * unaligned loads to fault rather than succeeding.
+ *
+ * At least some OSes may set that flag, so we do *not* treat ARM
+ * as supporting unaligned loads.  If your OS supports them on ARM,
+ * and you want to use them, please update the tests in the #if above
+ * to check for ARM *and* for your OS.

  */
 #define EXTRACT_BE_U_2(p) \
        ((uint16_t)(((uint16_t)(*((const uint8_t *)(p) + 0)) << 8) | \
  */
 #define EXTRACT_BE_U_2(p) \
        ((uint16_t)(((uint16_t)(*((const uint8_t *)(p) + 0)) << 8) | \