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Atoms-to-Circuits Simulation Investigation of CNT Interconnects for Next Generation CMOS Technology

Lee, J. et al. (2017) Atoms-to-Circuits Simulation Investigation of CNT Interconnects for Next Generation CMOS Technology. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, pp. 153-156. (doi: 10.23919/SISPAD.2017.8085287)

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Abstract

In this study, we suggest a hierarchical model to investigate the electrical performance of carbon nanotube (CNT)- based interconnects. From the density functional theory, we have obtained important physical parameters, which are used in TCAD simulators to obtain the RC netlists. We then use these RC netlists for the circuit-level simulations to optimize interconnect design in VLSI. Also, we have compared various CNT-based interconnects such as single-walled CNTs, multi-walled CNTs, doped CNTs, and Cu-CNT composites in terms of conductivity, ring oscillator delay, and propagation time delay.

Item Type:Conference Proceedings
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Sadi, Dr Toufik and Amoroso, Dr Salvatore and Lee, Mr Jaehyun and Wang, Dr Liping and Georgiev, Professor Vihar and Asenov, Professor Asen
Authors: Lee, J., Liang, J., Amoroso, S. M., Sadi, T., Wang, L., Asenov, P., Pender, A., Reid, D. T., Georgiev, V. P., Millar, C., Todri-Sanial, A., and Asenov, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Copyright Holders:Copyright © 2017 The Japan Society of Applied Physics
Publisher Policy:Reproduced in accordance with the copyright policy of the publisher
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Project Code
Award No
Project Name
Principal Investigator
Funder's Name
Funder Ref
Lead Dept
1
CONNECT
Asen Asenov
688612
ENG - ENGINEERING ELECTRONICS & NANO ENG

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