Table of Contents BCM538X/BCM5396 Application Note
BROADCOM
January 20, 2010 • 538X_5396-AN105-R Page 5
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RvMII Layout ..........................................................................................................................................26
GMII Interface...............................................................................................................................................28
3.3V GMII I/Os........................................................................................................................................28
Pin Descriptions .....................................................................................................................................28
Transmit GMII ........................................................................................................................................28
Receive GMII..........................................................................................................................................29
GMII Driver Compliance.........................................................................................................................29
GMII Layout............................................................................................................................................29
RGMII Interface ............................................................................................................................................30
Signal Descriptions.................................................................................................................................31
Pin Descriptions .....................................................................................................................................31
RGMII Transmit ......................................................................................................................................32
RGMII Receive........................................................................................................................................32
RGMII Delayed Timing ...........................................................................................................................33
Delayed Transmit Timing ................................................................................................................33
Delayed Receive Timing..................................................................................................................33
Data and Control Signal Encoding..........................................................................................................34
RGMII Layout .........................................................................................................................................35
Section 4: I/O Pins........................................................................................................... 36
1.2V/2.5V with 3.3V Tolerance ....................................................................................................................36
Internal Pull-Ups and Pull-Downs ................................................................................................................36
Configuring the Programming Interfaces ....................................................................................................36
Reset .............................................................................................................................................................37
Unused Pins ..................................................................................................................................................38
Section 5: Programming Interfaces.................................................................................. 39
SPI Compatible Programming Interface ......................................................................................................39
External PHY Registers ...........................................................................................................................40
Clock Polarity and Phase........................................................................................................................40
Read and Write Examples......................................................................................................................41
Normal Mode Read ........................................................................................................................41
Fast Mode Read ..............................................................................................................................43
Normal Mode Write .......................................................................................................................44
EEPROM Interface Connection.....................................................................................................................45
MDC/MDIO Interface ...................................................................................................................................46
Master: External PHY Registers .............................................................................................................47
Internal SerDes Transceiver and Pseudo PHY ........................................................................................48
