Hamza Bendaoudi

The below infographic by Quartr based on TechInsights research gives you a view of Apple's high-tech supplier network for the iPhone 15 Pro.

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Interesting to see massive deployment of AMD chips for AI datacenter.

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BREAKING:Nokia's Strategic Acquisition of Infinera: A Game-Changer for Optical Networks as two Optica Corporate Members merge. In a significant move to bolster its network infrastructure business, Nokia has announced its acquisition of optical networks company Infinera, valuing the deal at $2.3 billion. This acquisition marks Nokia's second major shake-up in its Networks Infrastructure division within a single day. Nokia anticipates that the acquisition of Infinera will be a crucial driver towards achieving a double-digit operating margin for its Optical Networks business, which is one of three units in the revamped Networks Infrastructure division. The deal is expected to enhance Nokia's operations in North America, a region that underperformed in Q1. The acquisition offer stands at a 28% premium on Infinera's closing share price as of June 26, comprising at least 70% in cash and up to 30% in stock. Nokia emphasized that 60% of Infinera's revenue is generated from North America, with the acquisition expected to strengthen Nokia's position in the optical sector across APAC, EMEA, and Latin America. Pekka Lundmark, President and CEO of Nokia, remarked, "Now is the right time to take a compelling inorganic step to grow our optical capabilities, following our commitment to organic growth in 2021. The combined businesses have a strong strategic fit given their highly complementary customer, geographic, and technology profiles." Federico Guillén Moñino, President of Network Infrastructure at Nokia, added, "We have long respected Infinera as a competitor, but now we find the logic of combination irresistible." Nokia projects that the acquisition will expand the scale of its Optical Networks business by 75%, providing opportunities to accelerate product development and enhance its competitive edge. Key benefits expected include an expanded digital signal processor development team, expertise in silicon photonics, indium phosphide-based semiconductor materials, and advanced photonic integrated circuit technology. The acquisition is slated to close in the first half of 2025, pending approval from Infinera shareholders and regulatory authorities. With all this in mind watch Light Reading Video analyst Sterling Perrin and Infinera CEO David Heard discussing at the recent OFC Conference how the AI traffic boom is already driving optics in data center interconnect, subsea and terrestrial telecom networks, and also open new opportunities for Infinera’s chips inside the data center itself. Interesting numbers in that interview. https://lnkd.in/dKBz57Pa

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Tackling Data Retention in SSDs (by Anil Burra from Intelligent Memory) 🤩 "SSDs have conquered the market due to their speed, durability, energy efficiency, and small form factor. However, write endurance and data retention are concerns in #embedded and #industrial applications, especially as the technology moves to ever smaller nodes." (Anil Burra) With the scaling of #NAND #flash #technology to higher densities (e.g., Triple-Level-Cell or Quad Level-Cell) and smaller process nodes, data retention becomes more challenging due to increased cell-to-cell interference and reduced margins for charge storage. Therefore, newer #technologies may have shorter specified data retention periods compared to older, more robust #SLC (Single-Level-Cell) or #MLC (Mul ti-Level-Cell) #NAND products. Two key factors affect data retention, the period over which #flashmemory can store #data without loss or corruption, in #NANDflash cells: program/erase (P/E) cycling and operating temperature. A very big thank you to Anil Burra from Intelligent Memory for this insightful article via Electronic Specifier Ltd with more background and insights via the link below 💡🙏👇 - A very good read to an important TOPIC 🤩 https://lnkd.in/eqdH7-N2 #semiconductorindustry #semiconductormanufacturing #innovation #it #ai #ssd #datastorage #automotiveindustry #embeddedsystems #ic #computer #computing #iot #memory #chip #chips #technology #tech

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How to Select a Data Acquisition Device? Here's a list of important factors to look for: 1. Number of Channels Analog Input/Output Channels: The number of input/output channels you need depends on how many signals you'll be measuring or controlling. DAQ devices can range from a few channels to hundreds. Digital Channels: If you’re dealing with digital signals, ensure the DAQ has sufficient digital I/O channels. 2. Sampling Rate The sampling rate determines how fast the device can capture data. It’s measured in samples per second (S/s). Higher sampling rates are necessary for fast-changing signals, while slower rates are fine for stable, low-frequency signals. 3. Resolution The resolution of the DAQ device indicates how precisely the analog-to-digital converter (ADC) can digitize the signal, measured in bits (e.g., 12-bit, 16-bit, 24-bit). Higher resolution allows for more accurate signal representation, especially for small signal changes. 4. Input Range The input range defines the voltage or current range that the DAQ device can measure. It should match the expected range of the signals you'll be measuring. Devices with a wide input range provide more flexibility but might sacrifice accuracy for lower-magnitude signals. 5. Accuracy Accuracy is critical to ensure the DAQ system provides reliable data. It’s usually expressed as a percentage of the full-scale reading and includes errors from the ADC, amplifiers, and noise. 6. Signal Conditioning Some DAQ devices include built-in signal conditioning for amplification, filtering, or isolation. This can be important if you’re working with noisy environments or specific sensor types that need conditioning to improve signal quality. 7. Connectivity and Communication Check for interface options like USB, Ethernet, PCI, or wireless connectivity. Your choice depends on the distance from the computer, the data throughput needed, and your system's configuration. 8. Latency and Throughput If you need real-time data, ensure the device has low latency (the delay between data acquisition and availability for analysis) and high throughput (the volume of data the device can process over time). 9. Power Supply and Portability Some DAQ devices are portable and powered by batteries or USB, while others are larger and require external power. Choose a device that fits your work environment, especially if you need mobility. 10. Software Compatibility Ensure the DAQ device is compatible with the software you plan to use for data acquisition, control, and analysis. Popular options include LabVIEW, MATLAB, or custom-built applications. 11. Cost and Scalability Consider the cost and whether you may need to scale your system in the future. If your requirements may grow, ensure the DAQ system can expand with additional channels or more robust features without replacing the entire setup. Find this helpful? I can help you configure or choose your next DAQ device. Contact me at [email protected]

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In the last post I wrote about how the authors of “The RISC-V Reader” posed the BCD (Binary Coded Decimal) operations of the x86 as a mistake of the past. I countered this supposition and argued that it is a useful feature for certain applications. But I didn't want to leave the reader with the impression that I thought that there were no features that I would regard as design mistakes. That is certainly not the case. The 8051 was an early design by Intel and was copied by many other manufacturers. It has features that are truly design mistakes that should never have happened. It is an architecture which should have been left to die an early death but was perpetuated by hardware people who are deficient in their software capabilities. One of its design mistakes is its upward-growing stack. What this does is to reverse the order of the bytes so that they don't appear like they should in memory. They are useless as local variables. Advanced programming languages like C heavily use variables stored in the stack for active temporary storage. But because of the deficiency of the 8051's stack-relative address modes, it is a moot point. It is akin to a blind person finding himself without binoculars when they would be useful for identifying birds for example. The Motorola HC08 has a downward-growing stack and it has good stack relative addressing modes. But even this architecture has a minor design mistake. It uses post-decrement instead of pre-decrement for pushes and pre-increment instead of post-increment for pulls. This flaw was corrected in the HC12. But Motorola decided to keep the flaw in the HC08 to maintain software compatibility. All-in-all, the HC08 is still far superior to the 8051. The x86 got it right when it comes to push and pull stack operations. Intel just used the wrong key word for "pull". RISC-V doesn't have built-in push and pull operations. It is a raw primitive architecture like IBM's mainframes. #Intel8051 #ISA #assembly #programming #computers #microcontrollers

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🔍It’s no mystery: there's no #AI without #hardware. As AI continues to help solve great mysteries from the ocean to space, here’s one I can help solve: custom chip #tech is mission-critical for the #future of AI. Unpack more insights in #ConnectingAI: https://lnkd.in/gw3jBcuJ #artificialintelligence #machinelearning

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Dual-core ARM Cortex-A55 SoM starting from $34 https://lnkd.in/eC4M4PUa

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total power will need to include power of digital layers also but PHY power is impressive

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#DataCenter #Storage to Reach $103 Billion by 2028 Original Design Manufacturer vendors lead with 32% revenue share followed by Dell EMC (20%), Huawei (7%), NetApp (5%) and Lenovo (4%) New forecasts from Omdia predict that #datacenter (DC) #storage revenue will climb to $103 billion by 2028, reflecting robust growth and increased ASPs for storage. The forecast includes DC external storage revenue from both arrays and server expansions. The DC storage market in 2023 experienced a downturn, primarily due to economic challenges and decreased #IT spending. The full year of storage revenue registered $53 billion, down 16% Y/Y. The research from Omdia found that original design manufacturers (#ODMs) revenue decreased by over 30% in 2023, as DC equipment spending temporarily shifted away from storage. In contrast, OEM vendors focusing on traditional storage demonstrated greater resilience, despite a small single digit Y/Y decline. In 2023, #cloudstorage shipments faced constraints as #cloudservice providers allocated significant portions of their budgets to the purchase of costly #GPUs. However, the storage market is poised for a resurgence driven by several key factors. The ongoing #digitaltransformation, rapid growth in #datavolumes, advancements in #AI, and the urgent need for storage modernization are all expected to fuel renewed growth. As industries become increasingly data-dependent, the storage market’s downturn is likely to be short-lived. These factors will collectively revitalize the storage market, ensuring a return to a growth trajectory. Thanks again to StorageNewsletter and India for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/e6bMc37s #semiconductorindustry #semiconductors #semiconductor #technology #tech #it #innovation #samsung #micron #skhynix #westerndigital #chip #ssd #ssds #ai #server #computing #computer #cloudcomputing

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AMD  Radeon Instinct Mi50 32GB Server Graphic Card MPN : 100-506194 Stock Available : 3000 units Brand new and Factory sealed Key Features: High Performance: The AMD MI50 offers exceptional compute power with 13.4 TFLOPS FP32 and 26.8 TFLOPS FP16 performance. Large Memory: Equipped with 32GB HBM2, providing high bandwidth and low latency for handling large datasets and complex computations. Advanced Interface: PCIe 3.0 x16 ensures fast data transfer rates and efficient connectivity. Efficient Cooling: Designed with a passive heatsink for optimal integration in data centre environments. Applications: #DataCenter's: Boost computational capabilities with high-performance GPUs. #MachineLearning: Perfect for training complex AI models and performing data analytics. #HighPerformanceComputing: Supports demanding computational tasks and large-scale simulations. #ScientificResearch: Ideal for research requiring intensive computation and data processing. #Virtualisation: Enhances virtualised environments with powerful GPU resources. SKYPE : live:.cid.edced4c866f91564 E-mail : [email protected] #AI #HPC #H200 #GH200 #Server #HDD #NVMe #gpu #nvidia #Switches #GPU

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How is AMD supporting the #academic world? Here my 2 min. Interview with my colleagues Tom (Thomas Papatheodore ) at the AMD booth at #NeurIPS in #Vancouver. We talked about the AMD #University #Program and what the AI HPC Developer Cluster can support and how to get access to it. You can find more information about the AMD University Program here: https://lnkd.in/e7yh_FTV The AMD AI HPC Cluster can support longer research projects and includes resources like the AMD #MI210, #MI250 and #MI300x. Sign in the form with a short research project description here: https://lnkd.in/e4PvQQnU #ai #AMD #aiclouster #free #research #NeurIPS #gpu #Productivity #Innovation Cathal McCabe Hugo A. Andrade NeurIPS

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Mivium's Game-Changing Gallium Nitride Tech Seeks to Outperform Silicon, Reducing Toxicity and Enhancing Efficiency for Data Centers and AI Applications http://s4g.biz/14nov24 tl;dr: Eric Tsai’s Mivium focuses on gallium nitride (GaN) to replace silicon, improving efficiency and sustainability. GaN's fast-switching properties make devices smaller, more powerful, and less energy-intensive. Mivium’s unique, clean GaN production process avoids the toxic materials typical in semiconductors. Nevada’s tech-friendly policies support Mivium’s plans to establish a new “gallium valley” in Reno. By crowdfunding, Eric brings everyday investors into Mivium’s journey, making early-stage investing accessible. https://lnkd.in/e2nunP4g #ImpactCrowdfunding #DiverseFounders #SocialEntrepreneurs #CommunityCapital #ImpactInvestors #RIC #InvestmentCrowdfunding #SuperCrowd #gallium

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We are excited to share the recently published paper "A 45Gb/s Analog Multi-Tone Receiver Utilizing a 6-Tap MIMO-FFE in 22nm FDSOI". 📝 Authored by: Jhoan Salinas; Hossein Shakiba; Ali Sheikholeslami This paper describes an analog multi-tone receiver capable of processing three data streams running at 15 Gb/s, one in baseband and two in quadrature over carriers at 15GHz, achieving an aggregate rate of 45Gb/s over a single physical channel. 🔗 Read more here: https://loom.ly/Bz5Sbzs #OJCAS #OA #OpenAccess

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Great article with insights by Bernard Murphy at SemiWiki.com, "Arteris Frames Network-On-Chip Topologies in the Car." "... while there is plenty of complexity in evolving car architectures and the consequent impact on subsystem chip/chiplet designs, connected on-chip through both coherent and non-coherent networks, the intent behind these systems is quite clear. We just need to start thinking about total car system architecture rather than individual chip functions." #Arteris #NetworkOnChip #Automotive https://bit.ly/3UiKqls

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A deserializer for differential data, with a configurable 1:N ratio, SDR or DDR data rate, and independent positive and negative data polarity input delays and deserializers, which enable bit and word alignment training later on. This one is specific to AMD/Xilinx Series 7 FPGAs, but shouldn't be hard to adapt to other FPGA families. https://lnkd.in/gwdMncBB

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#HBM4 set to land sooner than expected 💡 Suppliers and JEDEC are bringing their HBM4 plans forward as they suspect the forecasted Gen #AI boom means incoming NVIDIA GPUs will need it sooner. High bandwidth memory (#HBM) bypasses #X86 socket-connected #DRAM capacity and bandwidth limits by having #memory dies stacked on top of a logic layer, with interconnecting TSV channels, all linked to a #GPU via an interposer component providing higher bandwidth than X86 sockets. The Joint Electron Device Engineering Council (JEDEC) confirms and issues HBM standards, with the current one being its fifth, HBM3E (extended). JEDEC has said it will issue a completed HBM4 spec by the end of this year – just few months ago the schedule was for a 2025 delivery. Preliminary HBM4 characteristics are emerging already. Thanks again to Chris Mellor and Blocks and Files for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eZp_wyHB #semiconductorindustry #semiconductors #semiconductor #technology #tech #innovation #semiconductormanufacturing #it #chip #chips #ic #it

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