SiSS5108DN

[Link]
Vishay Siliconix
N-Channel 100 V (D-S) MOSFET
FEATURES
PowerPAK® 1212-8S D
D • TrenchFET® Gen V power MOSFET
D 7 8
D 6 • Very low RDS x Qg figure-of-merit (FOM)
5
• Tuned for the lowest RDS x Qoss FOM
• 100 % Rg and UIS tested
• Material categorization: for definitions of
3. 1
3
m 2 compliance please see [Link]/doc?99912
m S
3 S
1 mm 4 S
3.3 G APPLICATIONS D
Top View Bottom View
• Synchronous rectification
PRODUCT SUMMARY • Primary side switch
VDS (V) 100 • DC/DC converters
RDS(on) max. () at VGS = 10 V 0.0105 G
• Power supplies
RDS(on) max. () at VGS = 7.5 V 0.0124
• Motor drive control
Qg typ. (nC) 11.2 N-Channel MOSFET
ID (A) a 55.9 S
Configuration Single

ORDERING INFORMATION
Package PowerPAK 1212-8S
Lead (Pb)-free and halogen-free SiSS5108DN-T1-GE3

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 100
V
Gate-source voltage VGS ± 20
TC = 25 °C 55.9
TC = 70 °C 44.7
Continuous drain current (TJ = 150 °C) ID
TA = 25 °C 15.4 b, c
TA = 70 °C 12.3 b, c
A
Pulsed drain current (t = 100 μs) IDM 120
TC = 25 °C 59.8
Continuous source-drain diode current IS
TA = 25 °C 4.5 b, c
Single pulse avalanche current IAS 20
L = 0.1 mH
Single pulse avalanche energy EAS 20 mJ
TC = 25 °C 65.7
TC = 70 °C 42.1
Maximum power dissipation PD W
TA = 25 °C 5 b, c
TA = 70 °C 3.2 b, c
Operating junction and storage temperature range TJ, Tstg -55 to +150
°C
Soldering recommendations (peak temperature) d, e 260

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYPICAL MAXIMUM UNIT
Maximum junction to ambient b t  10 s RthJA 20 25
°C/W
Maximum junction to case (drain) Steady state RthJC 1.5 1.9
Notes
a. TC = 25 °C
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile ([Link]/doc?73257). The PowerPAK 1212-8S is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 63 °C/W

S22-0892-Rev. A, 07-Nov-2022 1 Document Number: 62128

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiSS5108DN
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Vishay Siliconix

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = 1 mA 100 - - V
VDS temperature coefficient VDS/TJ ID = 10 mA - 54 -
mV/°C
VGS(th) temperature coefficient VGS(th)/TJ ID = 250 μA - -7.8 -
Gate-source threshold voltage VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V
Gate-source leakage IGSS VDS = 0 V, VGS = ± 20 V - - ± 100 nA
VDS = 80 V, VGS = 0 V - - 1
Zero gate voltage drain current IDSS μA
VDS = 80 V, VGS = 0 V, TJ = 70 °C - - 15
VGS = 10 V, ID = 10 A - 0.0087 0.0105
Drain-source on-state resistance a RDS(on) 
VGS = 7.5 V, ID = 10 A - 0.0102 0.0124
Forward transconductance a gfs VDS = 10 V, ID = 10 A - 34 - S
Dynamic b
Input capacitance Ciss - 1150 -
Output capacitance Coss VDS = 50 V, VGS = 0 V, f = 1 MHz - 480 - pF
Reverse transfer capacitance Crss - 8.4 -
VDS = 50 V, VGS = 10 V, ID = 10 A - 14.8 23
Total gate charge Qg
- 11.2 17
Gate-source charge Qgs VDS = 50 V, VGS = 7.5 V, ID = 10 A - 6.3 - nC
Gate-drain charge Qgd - 1.3 -
Output charge Qoss VDS = 50 V, VGS = 0 V - 44 -
Gate resistance Rg f = 1 MHz 0.4 1.0 1.7 
Turn-on delay time td(on) - 11 22
Rise time tr VDD = 50 V, RL = 5.0  - 6 12
Turn-off delay time td(off) ID  10 A, VGEN = 10 V, Rg = 1  - 16 32
Fall time tf - 7 14
ns
Turn-on delay time td(on) - 14 28
Rise time tr VDD = 50 V, RL = 5.0  - 6 12
Turn-off delay time td(off) ID  10 A, VGEN = 7.5 V, Rg = 1  - 16 32
Fall time tf - 7 14
Drain-Source Body Diode Characteristics
Continuous source-drain diode current IS TC = 25 °C - - 59.8
A
Pulse diode forward current (tp = 100 μs) ISM - - 120
Body diode voltage VSD IS = 5 A - 0.77 1.1 V
Body diode reverse recovery time trr - 40 80 ns
Body diode reverse recovery charge Qrr IF = 10 A, di/dt = 100 A/μs, - 43 86 nC
Reverse recovery fall time ta TJ = 25 °C - 20 -
ns
Reverse recovery rise time tb - 20 -
Notes
a. Pulse test; pulse width  300 μs, duty cycle  2 %
b. Guaranteed by design, not subject to production testing



Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

S22-0892-Rev. A, 07-Nov-2022 2 Document Number: 62128

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiSS5108DN
[Link]
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title Axis Title

150 10000 100 10000

120 VGS = 10 V thru 7 V

80
ID - Drain Current (A)

ID - Drain Current (A)

1000 1000
90 60

2nd line

2nd line
1st line
2nd line

1st line
2nd line
VGS = 6 V

60 40 TC = 25 °C
100 100

30 VGS = 5 V thru 0 V 20
TC = 125 °C TC = -55 °C

0 10 0 10
0 1.0 2.0 3.0 4.0 5.0 0 2 4 6 8 10
VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V)

Output Characteristics Transfer Characteristics

Axis Title Axis Title

0.015 10000 10 000 10000

0.013 Ciss
RDS(on) - On-Resistance (Ω)

1000
C - Capacitance (pF)

VGS = 7.5 V 1000 Coss 1000

0.011
2nd line

2nd line
1st line
2nd line

1st line
2nd line

100
0.009
100 100
Crss
VGS = 10 V 10
0.007

0.005 10 1 10
0 10 20 30 40 50 0 20 40 60 80 100
ID - Drain Current (A) VDS - Drain-to-Source Voltage (V)

On-Resistance vs. Drain Current Capacitance

Axis Title Axis Title

10 10000 2.4 10000
RDS(on) - On-Resistance (Normalized)
VGS - Gate-to-Source Voltage (V)

ID = 10 A
8 2.0
VGS = 10 V, 10 A
1000 1000
6 1.6
2nd line

2nd line
1st line

1st line
2nd line

2nd line

VDS =50 V, 75 V, 100 V

4 1.2
100 100
VGS = 7.5 V, 10 A

2 0.8

0 10 0.4 10
0 3 6 9 12 15 -50 -25 0 25 50 75 100 125 150
Qg - Total Gate Charge (nC) TJ - Junction Temperature (°C)

Gate Charge On-Resistance vs. Junction Temperature

S22-0892-Rev. A, 07-Nov-2022 3 Document Number: 62128

For technical questions, contact: pmostechsupport@[Link]
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiSS5108DN
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Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title Axis Title

100 10000 0.05 10000

ID = 10 A
0.04

RDS(on) - On-Resistance (Ω)

10
IS - Source Current (A)

TJ = 150 °C 1000 1000

0.03

2nd line
2nd line

1st line
2nd line
1st line
2nd line

1 TJ = 25 °C
TJ = 125 °C
0.02
100 100
0.1
0.01
TJ = 25 °C

0.01 10 0 10
0 0.2 0.4 0.6 0.8 1.0 1.2 5 6 7 8 9 10
VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V)

Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage

Axis Title Axis Title

0.6 10000 500 10000

0.2 400
VGS(th) - Variance (V)

1000 1000
P - Power (W)

-0.2 ID = 5 mA 300
2nd line

2nd line
2nd line
1st line
2nd line

1st line
-0.6 200
ID = 250 μA
100 100

-1.0 100

-1.4 10 0 10
-50 -25 0 25 50 75 100 125 150 0.0001 0.001 0.01 0.1 1 10
TJ - Junction Temperature (°C) t - Time (s)

Threshold Voltage Single Pulse Power, Junction-to-Ambient

Axis Title
1000 10000
IDM
100
ID - Drain Current (A)

ID limited 1000
10
2nd line
1st line
2nd line

100 μs

Limited by RDS(on) a
1 1 ms
10 ms 100
100 ms
0.1
1s
TA = 25 °C,
10s
single pulse
BVDSS limited DC
0.01 10
0.01 0.1 1 10 100 1000
VDS - Drain-to-Source Voltage (V)

Safe Operating Area

Note
a. VGS > minimum VGS at which RDS(on) is specified

S22-0892-Rev. A, 07-Nov-2022 4 Document Number: 62128

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiSS5108DN
[Link]
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title
65 10000

52

ID - Drain Current (A)

1000
39

2nd line
1st line
2nd line
26
100

13

0 10
0 25 50 75 100 125 150
TC - Case Temperature (°C)

Power, Junction-to-Case

Axis Title Axis Title

80 10000 2.5 10000

64 2.0

1000 1000
P - Power (W)

P - Power (W)

48 1.5
2nd line

2nd line
1st line

1st line
2nd line

2nd line

32 1.0
100 100

16 0.5

0 10 0 10
0 25 50 75 100 125 150 0 25 50 75 100 125 150
TC - Case Temperature (°C) TA - Ambient Temperature (°C)

Current Derating a Power, Junction-to-Ambient

Note
a. The power dissipation PD is based on TJ max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit

S22-0892-Rev. A, 07-Nov-2022 5 Document Number: 62128

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiSS5108DN
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Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title
1 10000

Duty cycle = 0.5

Normalized Effective Transient

Notes
Thermal Impedance

0.2 1000
PDM

2nd line
1st line
0.1
0.1 t1
0.05 t2 t1
1. Duty cycle, D = t2
0.02 100
2. Per unit base = RthJA = 63 °C/W

3. TJM - TA = PDMZthJA (t)

Single pulse

4. Surface mounted
0.01 10
0.0001 0.001 0.01 0.1 1 10 100 1000
Square Wave Pulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Ambient

Axis Title
1 10000

Duty cycle = 0.5

Normalized Effective Transient
Thermal Impedance

1000
0.2

2nd line
1st line
0.1
0.05
100
0.02

Single pulse

0.1 10
0.0001 0.001 0.01 0.1 1
Square Wave Pulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Case

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see [Link]/ppg?62128.

S22-0892-Rev. A, 07-Nov-2022 6 Document Number: 62128

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 Package Information
[Link]
Vishay Siliconix
Case Outline for PowerPAK® 1212-8S

A
D Z D1
0.10 C
2x 8 7 6 5 5 6 7 8

K1

E1
E

K
B
L
0.10 C b e
2x 1 2 3 4 4 3 2 1
Pin 1 dot 0.10 M C A B
0.05 M C

0.10 C

A C
A3
0.08 C
A1

MILLIMETERS INCHES
DIM.
MIN. NOM. MAX. MIN. NOM. MAX.
A 0.67 0.75 0.83 0.026 0.030 0.033
A1 0.00 - 0.05 0.000 - 0.002
A3 0.20 ref. 0.008 ref
b 0.25 0.30 0.35 0.010 0.012 0.014
D 3.20 3.30 3.40 0.126 0.130 0.134
D1 2.15 2.25 2.35 0.085 0.089 0.093
E 3.20 3.30 3.40 0.126 0.130 0.134
E1 1.60 1.70 1.80 0.063 0.067 0.071
e 0.65 bsc. 0.026 bsc.
K 0.76 ref. 0.030 ref.
K1 0.41 ref. 0.016 ref.
L 0.33 0.43 0.53 0.013 0.017 0.021
Z 0.525 ref. 0.021 ref.
ECN: C20-0862-Rev. B, 20-Jul-2020
DWG: 6008

Revision: 20-Jul-2020 1 Document Number: 63919

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
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Revision: 01-Jan-2025 1 Document Number: 91000

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