Department of Electrical Engineering

Faculty Member: Dr. Sajjad Hussain Dated: 25-04-2025

Lab Engineer: M. Ali Khalid

Course/Section: BEE 14-A Semester: Spring 2025

EE-351 Communication Systems

Lab 10: PLL Circuit & Operation

PLO3-CLO4 PLO5- PLO8- PLO9-

CLO5 CLO6 CLO7
Name Reg. No Viva / Quiz Analysis Modern Ethics and Individual
/ Lab of data in Tool Safety and Team
Performan Lab Usage Work
ce Report

5 Marks 5 Marks 5 Marks 5 Marks 5 Marks

Huzaifa Ahmed 424981

Muhammad Hashir 407209

Aslam

Muhammad Ishaq 412908

Aneeq ur Rehman 418794

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Table of Contents
Lab 10: PLL Circuit & Operation ................................................................................................................. 1
Exercise Objective: ....................................................................................................................................... 3
Introduction:.................................................................................................................................................. 3
Methodology: ................................................................................................................................................ 3
Tasks: ............................................................................................................................................................ 4
Exercise 7.1:.............................................................................................................................................. 4
Exercise 7.2:.............................................................................................................................................. 9
Conclusion: ................................................................................................................................................. 16

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Lab 10: PLL CIRCUIT & OPERATION
Exercise 7.1 & 7.2:

Exercise Objective:
When you have completed this exercise, you will be able to:
• Describe the operation and components of a Phase-Locked Loop (PLL) circuit
• Determine the free-running frequency of the Voltage-Controlled Oscillator (VCO)
• Explain the capture range and lock range of the PLL
• Use an oscilloscope to observe and measure PLL circuit signals
• Use a DC voltmeter to take relevant voltage measurements in the PLL circuit

Introduction:
A Phase-Locked Loop (PLL) is an essential electronic system used for synchronizing an output
signal’s phase and frequency with a reference signal. The PLL circuit is composed of a phase
detector, a low-pass filter, an amplifier, and a voltage-controlled oscillator (VCO). The phase
detector compares the phase of the input reference frequency with the VCO output and produces
a voltage representing their difference. This voltage, after filtering and amplification, is fed back
to the VCO to adjust its frequency, enabling the loop to lock onto the input frequency. The PLL
maintains synchronization as long as the input signal remains within its capture and lock ranges.

Methodology:
To study the behavior and operation of the PLL, the circuit is assembled with all functional
blocks interconnected, including the use of a two-post connector to close the loop between the
filter and amplifier. An oscilloscope is used to observe signal waveforms, while a DC voltmeter
measures the control voltage changes affecting the VCO. The VCO’s free-running frequency is
first noted with the loop open, then the loop is closed to observe how the PLL responds to
changes in the input frequency. The phase detector’s output, after low-pass filtering, is monitored
to understand how the feedback voltage adjusts the VCO to maintain lock within the defined
frequency range of approximately 400 kHz to 480 kHz.

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Tasks:
Exercise 7.1:
1. On oscilloscope channel 2, the VCO signal should appear, as shown in Figure 7-6. Accurately
measure the period (T) between the peaks of the waveform. Each horizontal division is 0.5 us.
Record your answer below.

𝒕 = 𝟐. 𝟏𝟏𝟔 𝝁𝒔
2. From the period (T) of the VCO output signal, calculate the free- running frequency (fo = 1/T).
Record your answer in kHz
𝟏
𝒇= = 𝟒𝟕𝟐. 𝟓𝟖 𝒌𝑯𝒛
𝒕
3. Set the voltmeter to measure volts dc. Measure and record the VCO dc input voltage (VI).

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 𝑽𝑫𝑪 = 𝟓. 𝟏 𝑽
4. Does V, control the VCO output's amplitude or its frequency?
Yes
5. Set oscilloscope channel 1 to 50 mV/DIV. Connect the channel 1 probe to RF. Adjust the
potentiometer knob on the VCO-LO circuit block for a 150 mVpk-pk signa at RF
6. Set the oscilloscope vertical mode to ALT, and trigger on ALT. The signals should appear, as
shown in Figure 7-8.

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 7. Did the change in the RF frequency (f) on channel 1 affect the VCO frequency (fvco) on channel
2? Why or why not?
No, fco is not affected by the changing f; because there is no feedback from the PHASE
DETECTOR to the VCO. There is an open loop; the FILTER and AMP are not connected.
8. While observing the RF and VCO signals on the oscilloscope, slowly increase f, (channel 1) by
turning the NEGATIVE SUPPLY Knob CW. When the VCO signal starts to track (follow) the
RF signal, stop turning the NEGATIVE SUPPLY knob CW. The signals should appear, as shown
in Figure 7-9.

9. What is the name of the frequency range in which the VCO signal starts to track the RF input
signal?
When the RF input signal is in the capture range, fuco tracks fi
10. What determines the capture range of the PLL?
The cutoff frequency of the low-pass FILTER determines the PLL'S capture range. When
the PHASE DETECTOR's difference frequency output is within the bandwidth of the low-
pass FILTER. the FILTER, passes a feedback signal to the VCO thai causes fvco to track fj
11. On the oscilloscope screen, compare f_vco and f, by overlaying the signal traces. Are the
frequencies about equal?
Yes

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 12. While observing the oscilloscope screen, turn the NEGATIVE SUPPLY knob slightly CCW, and
then slightly CW. Does fuca track f,?
Yes
13. While observing the VCO's dc input voltage (Vi), vary f, by turning the NEGATIVE SUPPLY
knob slightly CCW, and then slightly CW. When foco tracks fi, does V, change?
Yes. V, is the feedback signal that controls fvco so that it equals f;
14. What is the name of the frequency range over which fuco tracks f,?
fvco tracks fj over the lock range, which is wider than the capture range.

15. On the oscilloscope screen, compare foco to f; by overlaying the signal trace. Are the frequencies
equal?
No, They are not equal.
16. On channel 1, accurately measure the period (T) between peaks of the RF input signal waveform.
Each horizontal division is 0.5 us. Record your answer below.

𝑻 = 𝟐. 𝟐𝟑 𝝁𝒔
17. From T, calculate the frequency of the RF input signal (f, = 1/T). Record your answer in kHz.
𝟏
𝒇= = 𝟒𝟒𝟖. 𝟒𝟑 𝒌𝑯𝒛
𝑻

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 18. On the oscilloscope screen, compare fco and f, by overlaying the signal traces. Are the
frequencies about equal?

Yes, Equal
19. Turn the NEGATIVE SUPPLY knob slightly CW, and then slightly CCW. Does fuco track f?
Yes
20. On channel 1, accurately measure the period (T) between peaks of the RF input signal waveform.
Each horizontal division is 0.5 us.

𝑻 = 𝟐. 𝟒𝟖𝟓 𝒖𝒔

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 21. From T, calculate the frequency of the RF input signal (f, = 1/T). Record your answer in kHz.
𝟏
𝒇= = 𝟒𝟎𝟐 𝒌𝑯𝒛
𝑻

Exercise 7.2:
1. Set the voltmeter to measure volts dc. Connect the voltmeter to the VCO input, and connect the
voltmeter common lead to a ground terminal on the circuit board. During the next step, you will
observe the RF and VCO signals on the oscilloscope and the VCO input voltage (Vi) on the
voltmeter.

2. Slowly increase (f) (channel 1) by turning the NEGATIVE SUPPLY knob CW. When the foca
signal starts to track f, and Vi is -4.0 Vdc, stop turning the NEGATIVE SUPPLY knob CW. The
signals should appear, as shown in Figure 7-18

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 3. On the oscilloscope screen, compare fuco and f; by overlaying the signal traces. Are the
frequencies equal?
Yes
4. Trigger the oscilloscope on channel 1. The signals should appear as shown in Figure 7-19. Is f,
(channel 1) about 90° out of phase with foca (channel 2)?

Yes

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 5. When the RF input frequency (f) equals the VCO output frequency (fven), what signals are in the
PHASE DETECTOR's output? Connect the channel 2 probe to the PHASE DETECTOR's output.
Se channel 2 to 1.0 V/DIV (see Figure 7-20). Is the frequency of the signal on channel 2 twice the
frequency of the RF signal on channel 1?
Because fi equals fuco, the PHASE DETECTOR's output contains a dc voltage difference
component and the sum trequency (fi + fuco).

6. Connect the channel 2 probe to the PHASE DETECTOR's output. Set channel 2 to 1.0 V/DIV
(see Figure 7-20). Is the frequency of the signal on channel 2 twice the frequency of the RF signal
on channel 1?

Yes

7. Is the PHASE DETECTOR's output signal, shown on channel 2, the sum frequency or the
difference frequency?
When the PHASE DETECTOR's output signal frequencies are equal, the sum frequency is
twice the input frequency
8. Connect the channel 2 probe to the FILTER's output. Set channel 2 to de and trigger on channel 1
(see Figure 7-21). While observing the FILTER's output on channel 2, slightly vary f, by slowly
turning the NEGATIVE SUPPLY knob CCW and then CW. When f, varies, does the FILTER's
de output voltage level change?

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 Yes

9. Is the FILTER's output signal, shown on channel 2, the PHASE DETECTOR's sum frequency or
difference component?
When the input frequencies are equal, the PHASE DETECTOR'S difference component is
a de voltage.
10. Does an amplitude difference between f, and fco cause the PHASE DETECTOR's de difference
component to change with a varying f?
No. A changing phase difference between fi and fuco causes the FILTER's de output voltage
to change.
11. Does the change in the FILTER's de output voltage cause V to change?
Yes. The FILTER's dc output voltage is amplified and input to the VCO.
12. Does V control fuco or fi?
fvco
13. Connect the channel 2 probe to the VCO output. Set channel 2 to 200 mV/DIV and to ac. Trigger
on ALT.
14. While observing fuca on channel 2 and Vi on the voltmeter, vary f, by slightly turning the
NEGATIVE SUPPLY knob CW and then CCW. When V, changes, what does fuco do?

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 Yes

15. Slowly increase f, (channel 1) by turning the NEGATIVE SUPPLY knob CW. When the foco
signal starts to track f, and V, is about -4.0 Vdc, stop turning the NEGATIVE SUPPLY knob
CW. The signals should appear, as shown in Figure 7-23.

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 16. Connect the channel 1 probe to (M) on the VCO-LO circuit block. and trigger on channel 1.
Connect the channel 2 probe to the PHASE DETECTOR output. Set channel 2 to 1.0 V/DIV and
the oscilloscope sweep to 0.2 ms/DIV. The oscilloscope signals should appear, as shown in
Figure 7-24

17. What signals compose the PHASE DETECTOR output signal on channel 2?
The sum frequency and the varying do voltage difference component
18. Is the varying de voltage difference component the FM carrier signal or the recovered message
signal?
The recovered message signal.

19. Connect the channel 2 probe to the FILTER output on the PHASE- LOCKED LOOP circuit
block. Set channel 2 to 500 mV/DIV.

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 20. Is the signal at the FILTER's output on channel 2 the recovered message signal or the error
signal?
The FILTER's output is the recovered message signal and the error signal, and it is fed
back to the VCO.
21. Slightly vary the frequency and amplitude of the message signal from the SIGNAL
GENERATOR. Do the frequency and amplitude of the recovered message signal vary with the
message signal?
Yes. This process demonstrates that the PLL can function as an FM discriminator.

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Conclusion:
The Phase-Locked Loop (PLL) circuit effectively synchronizes the VCO output with a reference
input frequency by utilizing a closed-loop system involving a phase detector, low-pass filter,
amplifier, and VCO. Through experimental observation using an oscilloscope and DC voltmeter,
the PLL’s ability to lock onto and track input frequencies within the specified capture and lock
ranges was demonstrated. The study confirmed the role of the DC feedback voltage in
maintaining synchronization and highlighted the importance of proper filtering and amplification
in achieving stable loop operation.

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