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This study investigates the impact of terrestrial neutron irradiation on various commercial SiC power MOSFET technologies, including planar, trench, and double-trench architectures. The research highlights the observed failure mechanisms, such as enhanced gate and drain leakage, and calculates failure cross sections and failure-in-time (FIT) rates at sea level. The findings emphasize the differences in radiation sensitivity among the different MOSFET designs and their operational reliability under neutron exposure.

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0% found this document useful (0 votes)
35 views8 pages

Fulltext From Publisher

This study investigates the impact of terrestrial neutron irradiation on various commercial SiC power MOSFET technologies, including planar, trench, and double-trench architectures. The research highlights the observed failure mechanisms, such as enhanced gate and drain leakage, and calculates failure cross sections and failure-in-time (FIT) rates at sea level. The findings emphasize the differences in radiation sensitivity among the different MOSFET designs and their operational reliability under neutron exposure.

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Alberto Gonzalez
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

634 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 68, NO.

5, MAY 2021

Impact of Terrestrial Neutrons on the Reliability of


SiC VD-MOSFET Technologies
C. Martinella , Member, IEEE, R. G. Alia , Member, IEEE, R. Stark , Student Member, IEEE,
A. Coronetti , Member, IEEE, C. Cazzaniga , Member, IEEE, M. Kastriotou , Member, IEEE,
Y. Kadi , Member, IEEE, R. Gaillard, Senior Member, IEEE, U. Grossner , Member, IEEE,
and A. Javanainen , Member, IEEE

Abstract— Accelerated terrestrial neutron irradiations were


performed on different commercial SiC power MOSFETs with
planar, trench, and double-trench architectures. The results were
used to calculate the failure cross sections and the failure-in-time
(FIT) rates at sea level. Enhanced gate and drain leakage were
observed in some devices which did not exhibit a destructive fail-
ure during the exposure. In particular, a different mechanism was
observed for planar and trench gate MOSFETs, the first showing
a partial gate rupture with a leakage path mostly between the
drain and the gate, similar to what was previously observed with
heavy ions, while the second exhibiting a complete gate rupture.
The observed failure mechanisms and the postirradiation gate
stress (PIGS) tests are discussed for different technologies.
Index Terms— Gate damage, neutrons, power MOSFETs, sili- Fig. 1. By the elastic and inelastic scattering with the 4H-SiC lattice, the
con carbide (SiC), single-event burnout (SEB), single-event effects atmospheric neutrons produce recoiling atoms (i.e., α, C, Si, Mg, and Al)
which generate ionizing tracks inside the power MOSFET.
(SEEs).
I. I NTRODUCTION
mature technology and has become a viable alternative to
W IDE-BANDGAP materials such as silicon car-
bide (SiC) and gallium nitride (GaN) have gained
popularity in recent years. Between them, SiC is the most
silicon-based power devices in high-efficiency and high-power
density applications [1], [2]. The higher breakdown field and
thermal conductivity make SiC a very attractive material for
Manuscript received January 14, 2021; revised January 24, 2021, different ground applications, such as automotive and solar
February 6, 2021, and February 18, 2021; accepted February 22, 2021. Date inverters, but also for the avionic and space industries [3],
of publication March 10, 2021; date of current version May 20, 2021. This
work was supported in part by the European Space Agency ESA/ESTEC [4]. Moreover, SiC is considered as a promising technology
under Contract 4000124504/18/NL/KML/zk and in part by the European for accelerator applications [5], [6]. However, SiC devices are
Union’s Horizon 2020 Research and Innovation Programme under the MSC known to be susceptible to single-event burnout (SEB), single-
Grant 721624.
C. Martinella is with the Department of Physics, University of Jyväskylä, event gate rupture (SEGR), and single-event leakage current
40014 Jyväskylä, Finland, also with the Engineering Department, CERN, (SELC). SEB and SEGR are caused, among others, by high-
1211 Geneva, Switzerland, and also with the Advanced Power Semicon- energy neutrons [7]–[15], while SELC has been reported only
ductor Laboratory (APS), ETH Zurich, 8092 Zurich, Switzerland (e-mail:
[Link]@[Link]). with heavy ions [16]–[20].
R. G. Alia and Y. Kadi are with the Engineering Department, The high-energy neutrons originate from cosmic-ray interac-
CERN, 1211 Geneva, Switzerland (e-mail: [Link]@[Link]; tions with the atmosphere. These include solar event particles
[Link]@[Link]).
R. Stark and U. Grossner are with the Advanced Power Semiconduc- (SEPs) originated by dynamic solar activity and galactic
tor Laboratory (APS), ETH Zurich, 8092 Zurich, Switzerland (e-mail: cosmic rays (GCRs) created by events outside the solar system,
stark@[Link]; [Link]@[Link]). such as the explosion of galactic nuclei and supernova, pulsars,
A. Coronetti is with the Department of Physics, University of Jyväskylä,
40014 Jyväskylä, Finland, and also with the Engineering Department, CERN, and stellar flares [21]–[23]. These particles (i.e., 92% protons,
1211 Geneva, Switzerland (e-mail: [Link]@[Link]). 6% alpha particles, and 2% heavier atomic nuclei) are respon-
C. Cazzaniga and M. Kastriotou are with the ISIS Facility, STFC, sible for single-event effects (SEEs) observed in electronics
Rutherford Appleton Laboratory, Didcot OX11 0QX, U.K. (e-mail:
[Link]@[Link]; [Link]@[Link]). used in space. The particles that are not deviated or trapped
R. Galliard is Consultant with Saint-Arnoult en Yvelines France (e-mail: by the magnetic field enter the Earth’s atmosphere and, upon
remi-gaillard@[Link]). interacting with, for example, oxygen and nitrogen atoms,
A. Javanainen is with the Department of Physics, University of Jyväskylä,
40014 Jyväskylä, Finland, and also with the Electrical Engineering and create a shower of secondary particles. These interactions
Computer Science Department, Vanderbilt University, Nashville, TN 37235 result in neutrons, protons, muons, pions, and electromagnetic
USA (e-mail: [Link]@[Link]). waves [22]. Some particles decay or are absorbed, while
Color versions of one or more figures in this article are available at
[Link] others travel further in the atmosphere, causing a cascade
Digital Object Identifier 10.1109/TNS.2021.3065122 through spallation reactions. Due to the charge neutrality and
This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see [Link]
MARTINELLA et al.: IMPACT OF TERRESTRIAL NEUTRONS ON THE RELIABILITY OF SiC VD-MOSFET TECHNOLOGIES 635

TABLE I
L IST OF DUT S

the abundance, this gives rise to a high flux of secondary by different manufacturers. The devices were selected with
neutrons traveling vast distances in the atmosphere. The peak three different types of designs: planar gate, trench gate, and
of neutron intensity occurs at about 10–25 km, which is double trench, where the last has a trench gate and a trench
critical for avionic applications, being the altitude of many source [30]. The schematics of the three architectures are
commercial airplane flights [21]. Below, there is a net loss of shown in Fig. 2. The radiation sensitivity is discussed for
total particles in the cascades, having a flux which drops two the different technologies. Experiments were performed at
orders of magnitude at sea level, with a neutron flux of less ChipIr, the beamline at the Rutherford Appleton Laboratory,
than 25 n/(cm2 h) for energies higher than 1 MeV [22]. Data Didcot, U.K. providing an atmospheric-like neutron environ-
centers and the Si power electronics community have reported ment. During irradiations, destructive failures were observed
failures and upsets at sea level [24]–[27]. In addition, due and the failure cross sections and failure-in-time (FIT) rates
to the exponential increase of neutron flux with increasing are presented for the tested references. In addition, from the
altitudes, problems can be encountered for applications at post-irradiation analysis, the latent damage and the impact of
higher altitudes, for example, on a mountain top [23]. gate rupture in planar and trench gate design are discussed,
Furthermore, neutrons can cause issues for electronic highlighting the differences among these device types and the
systems installed in high-energy accelerators, such as the dependence of the failure type on the technology. Finally, the
Large Hadron Collider (LHC) complex and its future results for the post-irradiation gate stress (PIGS), performed as
upgrade High Luminosity LHC (HL-LHC) at CERN, Geneva, recommended by the MIL-STD-750, test method 1080 [31],
Switzerland [28]. Here, commercial SiC power MOSFETs are also presented.
have been considered for the design of a prototype inductive
adder (IA) to be used as a pulse generator for the injection II. N EUTRON I RRADIATION E XPERIMENT
kicker magnets [5], [6]. A. ChipIr Terrestrial Neutron Facility
The physics of neutron-induced SEB in SiC power devices ChipIr is a beamline built at the second target station (TS2)
has been previously studied, and an explanation for this of the ISIS spallation source at the Rutherford Appleton Labo-
destructive effect was suggested in [7]. Although neutrons ratory [32]–[34]. The facility is specifically tailored for testing
are non-ionizing particles, the recoiling atoms, generated from radiation effects on electronic components and systems. The
their elastic or inelastic scattering with the lattice atoms, can beamline design is optimized to mimic the atmospheric neu-
indirectly give rise to ionization and create a large number tron spectrum (up to 800 MeV) with an acceleration factor of
of electron and hole (e–h) pairs along their trajectories. This up to 109 for ground-level applications. The neutrons delivered
event is followed by a hole impact ionization with associated to the ChipIr facility are emitted from the spallation of high-
multiplication factors and a consequent thermal transient and energy protons with a tungsten target (i.e., 800-MeV protons
excessive lattice temperatures. This leads to local lattice subli- extracted from the synchrotron with a beam current of 40 μA
mation and formation of voids, resulting in the loss of device and pulsed at 10 Hz). The neutrons are delivered to ChipIr
blocking ability, hence a destructive failure. A schematic of the according to the time structure of the ISIS source, i.e., in
neutron interaction with the 4H-SiC lattice is shown in Fig. 1. 10-Hz pulses, with two 70-ns-wide bunches separated 360 ns
Finally, it was reported that no consistent differences have been apart. A silicon diode, placed in front of the testing position,
observed in the SEB tolerance for SiC MOSFETs and SiC measures the energy distribution of single pulses. This is used
diodes [8]. This supports the hypothesis that the conventional to retrieve the neutron fluence at the device under test (DUT)
mechanisms underlying SEB in Si MOSFETs, such as par- location knowing the detection efficiency and, by means of a
asitic bipolar junction transistor (BJT) and tunneling-assisted correction factor function of the distance between the diode
avalanche multiplication mechanisms [29], may be suppressed and the DUT position, which takes into account the beam
in SiC devices, where the current gain of the parasitic BJT is divergence. During the test campaign, the measured flux of
lower. Indeed, there is no similar parasitic BJT structure in the neutrons above 10 MeV was 5.6 × 106 cm−2 s−1 at the testing
diode design. position. A collimator system allows for selecting beams of
In this work, we investigate the effect of neutron irradia- different sizes. For the current experiment, a beam size of
tion on different commercial SiC power MOSFETs produced 10 × 10 cm2 was used.
636 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 68, NO. 5, MAY 2021

Fig. 2. Schematics of the three architectures of SiC power MOSFETs tested in this work. (a) Planar gate, (b) trench gate from Infineon, and (c) double
trench (a trench source and a trench gate) from Rohm. Image remake after the original from Siemieniec et al. [30].

B. Experimental Method

The aim of this study is to investigate the effect


of atmospheric-like neutrons on different commercial SiC
MOSFET technologies. Accelerated testing of SEB by using
terrestrial neutrons was performed. The obtained data were
used to calculate the effect cross sections and FIT rates at
ground level. In addition, the devices that did not exhibit
destructive failure during exposure were characterized, and
their operational reliability was studied.
Several samples were selected from the commercially avail-
able SiC VD-MOSFET technologies. The references and the
corresponding technical information are listed in Table I. All Fig. 3. Schematic layout of the setup. Only two DUTs out of 12 hosted by
a single board are illustrated here for brevity.
the devices are rated for 1.2 kV, and they are mounted in a
TO-247 package. The devices were irradiated in their original
packaging. The first three devices were selected with similar tive event. Moreover, it also limited the momentary voltage
values of RDS (ON) among them, and the same was done for the drop at the SMU output during current transients. The devices
last two devices. The references were selected with different were connected in parallel to the high voltage, but each of them
designs: planar, trench, and double trench. In particular, the had an individual current-limiting resistor of 860 k between
DUTs from Infineon have a trench gate structure [35], whereas the drain and the SMU output. This guaranteed the isolation
the Rohm have a double trench design, with a trench gate and of the device after a failure and the continuous application
a trench source. For the trench gate devices, the channel is of high voltage to all other devices. Each step increase in
formed vertically, which allows the vertical flow of current the total current measured by the SMU was accounted as a
while reducing RDS(ON) [36]. All the other references have a failure (I DS = 1.27 mA). This value corresponds to a short
planar gate structure. circuit on the DUT, having the total voltage applied across
The test setup was designed following the military stan- the protection resistor. In Fig. 4, an example of the online
dard specifications (MIL-STD-750E M1080.1) [31]. Each measurements recorded during an exposure run is shown. The
test board can host a maximum of 12 devices in parallel. results are presented for Rohm SCT3030KL devices exposed
A schematic layout of the setup is presented in Fig. 3, where at 1100 V. Here, the measured drain current was divided by
two DUTs are illustrated for brevity. Two boards were stacked the failure step size (I DS = 1.27 mA) in order to highlight
to test up to 24 DUTs for each run. They were installed at a the number of failures during the run.
distance of 58 and 76 cm from the beam aperture, respectively. For each reference, three irradiations were performed on
The attenuation of the neutron beam in the first board was pristine devices at VDS of 1100, 976, and 846 V, which
estimated to be negligible for the material used in the tested are ∼92%, ∼81%, and 72% of the maximum rated voltage
boards [37]. Two Keithley Source Measurement Unit (SMU) (1.2 kV), respectively. During irradiation, VGS = 0 V to keep
model 2410 s (one channel, up to 1100 V), one for each board, the device in OFF-state. The gate current was not monitored
were used to bias the drain and to monitor the total leakage during the run. The test was stopped when 50%–70% of
currents as a sum of all devices. The gates were grounded devices failed or when a fluence of 2.8 × 1010 n/cm2 was
directly on the board. A stiffening capacitor of 10 nF was reached.
installed between the drain and the ground for each DUT, Some of the DUTs were characterized after the irradiation
in order to supply sufficient amount of charge during a destruc- using a Keithley Parametric Curve Tracer PCT-4B in order to
MARTINELLA et al.: IMPACT OF TERRESTRIAL NEUTRONS ON THE RELIABILITY OF SiC VD-MOSFET TECHNOLOGIES 637

TABLE II
FAILURE A NALYSIS

expected, as representative of random events. The mean time


between failures (MTBFs) and SEB cross sections (σSEB ) were
calculated as follows:
1
MTBF = η × (1 + ) when β = 1
β
MTBF = η when β = 1
1
σSEB = . (1)
MTBF
The error bars were calculated considering a Poisson distribu-
tion dominated by the count statistics. The uncertainty over the
Fig. 4. Example of online measurement for Rohm devices (SCT3030KL)
fluence was considered negligible with respect to the number
exposed at 1100 V. The drain current measured during the exposure is divided of events. The upper and lower limits were calculated as in the
by the failure step size in order to highlight the number of failures during the following equation, where Nlow and Nhigh were obtained from
run.
the chi-square distribution with a confidence level of 95%:
investigate the radiation-induced damage. In addition, break- Nhigh
Errhigh =
down voltage (BVDSS ) measurements were conducted using a NSEB ∗MTBF
Keithley SMU 2657A on the drain and a Keithley SMU 2636B Nlow
Errlow = . (2)
on the gate and the source terminals. For a pristine device, NSEB ∗MTBF
BVDSS is the voltage at which the reverse-biased body-drift
diode breaks down causing significant current to flow between The FIT rates were calculated considering 109 h of opera-
the source and the drain due to the avalanche multiplication tions and a cosmic-ray-induced neutron flux of 13 n/(cm2 · h)
process. for energies above 10 MeV (reference conditions at sea level in
NYC from JEDEC JESD89A standard). The same conversion
factor was also used for the error bars as described above for
III. E XPERIMENTAL R ESULTS
cross sections.
A. Weibull Distribution Analysis and FIT Rates In Table II, the parameters extracted from the analysis are
In order to calculate the SEB cross sections and the FIT listed for the tested references. In the case of Rohm, the
rates, reliability parameters were determined using a stan- tests were performed only at 1100 V and 976 V. In some
dard two-parameter Weibull distribution [23]. The cumulative runs, multiple SEBs were observed at the same time. For the
fraction of failed devices was calculated as a function of analysis, they were considered as a single event, in order to
the neutron fluence; a two-parameter Weibull distribution assure the independence between the SEB events. Therefore,
was fit to the data using a maximum likelihood estimation the total number of tested DUTs was reduced.
(MLE) method [38]. Two parameters were extracted from this The failure cross sections are shown in Fig. 5(a) as a
analysis: β, called the shape parameter, which is an indicator function of the bias during irradiation. In Fig. 5(b), the FIT
of the failure mechanism, and η, which is the scale parameter. rates are shown for the tested references, while in Fig. 5(c),
Weibull distributions with β < 1 have an early-life failure, the FIT rates are normalized with the active area and scaled by
which decreases with time, while distributions with β > 1 the avalanche breakdown voltage, such that a ratio of 1 would
have a failure rate that increases with time, also known as indicate that the critical field was reached. This approach was
wear-out failures. For stochastic neutron failures β = 1 is suggested and previously discussed in [9]. A common trend
638 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 68, NO. 5, MAY 2021

planar gate from Cree/Wolfspeed (i.e., C2M0025120D), trench


gate from Infineon (i.e., IMW120R090M1H), and double
trench from Rohm (i.e., SCT3030KL). As an example, the
results are compared for the references tested at 976 V.
BVDSS measurements of the irradiated devices were per-
formed at VGS = 0 V and stopped at VDS corresponding to
ID = 1.00 mA, which is defined as the breakdown voltage.
At this current level, the device is still protected from a perma-
nent breakdown of the body diode. Three different responses
were identified for all the studied references: i) no damage
observed with respect to a pristine device; ii) partial degra-
dation of the device, which exhibited higher gate and drain
leakage currents; and iii) ohmic trend of the leakage current
caused by SEB. Examples of the leakage currents (ID , IG , and
IS ) are reported as a function of the drain–source bias (VDS ) for
the three references in Fig. 6. The top and the bottom panels
show, respectively, the measurements for (i) and (ii) scenarios
described above. A measurement of a pristine device for each
reference is given in gray for comparison. In Fig. 6(a)–(c),
the measurements are all in the same range as the pristine
device, and the small differences observed are caused by part-
to-part variations (i.e., the pristine device is not the same part
as the irradiated one, but belongs to the same lot). For these
devices, no damage was induced by the neutron exposure and
no leakage current increase is observed, neither degradation of
the blocking capability of the MOSFETs. Differently, a clear
degradation was induced by the neutron exposure in the
devices reported in Fig. 6(d)–(f). The leakage currents are
orders of magnitudes higher with respect to the pristine level
for all the three devices; however, the current paths (drain-to-
gate versus drain-to-source contributions) differ among them.
Finally, the measurements for (iii) are not reported, but from
the ohmic trend of the leakage current, it was concluded that
the devices failed through an SEB during the exposure.

C. Postirradiation Measurements: Gate Damage


In order to investigate the different leakage path observed
for (ii), ID –VGS and IG –VGS measurements were performed
at VDS = 1 V. The results are presented in Fig. 7, which
shows that the gate oxide is still operable for the planar
device (C2M0025120D) and the channel is still controlled
Fig. 5. (a) Failure cross sections of SiC MOSFETs from different suppliers by the gate voltage, but the gate leakage is higher with
as a function of the bias during the terrestrial neutron irradiations. (b) FIT respect to the pristine level. The device exhibits a partial
rates for 109 h of operation. (c) FIT rates scaled by avalanche voltage and gate rupture with very high gate and drain leakage current
normalized with the active area.
and a gate–drain current path. This effect is similar to the
is observed for all the devices and highlighted by the gray degradation induced by heavy-ion exposure (i.e., SELC), pre-
shadow. The trench MOSFETs (i.e., IMW120R090M1H and viously reported in [18] and [19]. Conversely, repeating the
SCT3030KL) appear to have lower FIT rates if compared to measurement for the double-trench (SCT3030KL) and the
the planar architecture. In particular, the double-trench device trench (IMW120R090M1H) devices, the gate oxide was found
(SCT3030KL), which has the highest avalanche breakdown to be heavily damaged and not operable anymore. Indeed,
voltage, has the best performance. the channel is in OFF-state for these devices and no positive
drain current flows. From these observations, it was concluded
that the damage in the trench devices has the signature of a
B. Postirradiation Measurements: Breakdown Voltage complete gate rupture.
Postirradiation measurements were performed for some
devices, which showed more or less severe effects depending D. Latent Damage: PIGS Test
on the technology. In this and Sections III-C and III-D, the Even though a device may not show any measurable damage
measurements are discussed for the three tested architectures: during irradiation, as for category (i), the integrity of its
MARTINELLA et al.: IMPACT OF TERRESTRIAL NEUTRONS ON THE RELIABILITY OF SiC VD-MOSFET TECHNOLOGIES 639

Fig. 6. Different responses were observed in the devices exposed to neutrons: i) no failure observed and no damage with respect to a pristine device, as in
(a), (b), and (c) and ii) no failure observed, but partial degradation of the device, as in (d), (e), and (f). The measurements of the leakage currents (ID , IG ,
and IS ) were performed at VGS = 0V and with a maximum ID current of 1 mA.

gate oxide might be affected. In order to study the effect of


latent damage on the gate oxide integrity and on the blocking
capability, breakdown voltage measurements were repeated
after applying positive and negative voltage bias at the gate
oxide, following the PIGS test as recommended in MIL-STD-
750, test method 1080 [31]. VGS was first swept positively
up to the rated value for each reference (i.e., +15 V for
Cree/Wolfspeed, +18 V for Infineon, and +22 V for Rohm)
or until a leakage current of 1 mA was measured. Second, a
VGS = −5 V was then applied at the gate oxide. The results
are shown in Fig. 8(a)–(c) for the three devices discussed
before in Fig. 6(a)–(c), respectively, which did not exhibit any
measurable damage after the exposure (i). No difference was
observed in the breakdown point and in the leakage currents Fig. 7. ID –VGS and IG –VGS measurements performed at VDS = 1 V. The gate
oxide is still operable for the planar Cree/Wolfspeed device (C2M0025120D)
after these cycles. The small differences in the gate leakage and the channel is still controlled by the gate voltage. Conversely, the gate
current might be due to the instrument sensitivity. Hence, these oxide is heavily damaged and not operable anymore for the trench and double-
devices are operable after the neutron irradiation, the leakage trench structures.
current is still within the specification (i.e., IG < 100 nA), IV. D ISCUSSION
and no latent damage is observed after applying the gate bias.
However, for the degraded device (ii) previously presented From the results presented, three different scenarios were
in Fig. 6(d), after the stress at negative VGS , IS decreased, commonly observed for the different architectures analyzed.
meaning that higher current is flowing to the drain–gate path, Considering the FIT normalized with the active area and scaled
rather than into the source pad, as shown in Fig. 8(d). This is by the breakdown voltage, the trench devices showed a better
evidence of an increased gate damage induced by the negative performance to SEB with respect to the planar ones, with the
gate bias. double-trench architecture as the most robust. However, part
640 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 68, NO. 5, MAY 2021

for the planar reference analyzed, which exhibited a current


leakage path between the gate and the drain as previously
observed for planar gate devices suffering from SELC after
heavy-ion irradiation. In addition, for the device with the gate
partially ruptured, the gate damage increased after the PIGS
test, which was already reported for devices suffering from
SELC after heavy-ion experiments [39].
A model for an enhanced gate current associated with a
leakage was previously presented for Si devices and heavy-ion
irradiation. It states that the oxide defects from displacement
damage caused by the ions create a significant number of
damage sites at which there is a reduced potential barrier,
permitting the tunneling of electrons from trapping sites in
the oxide into the conduction band [40]. Similarly, a model
for early defects in SiO2 /SiC was discussed in [41] and
attributed to the presence of defects in the oxide bulk. It is
hypothesized that, through displacement damage, neutrons are
inducing defects in the gate oxide, which are responsible for
the increased gate leakage current. Furthermore, the density
and distribution of oxide defects in a pristine device depend
on the oxide process and can be considered as a by-product of
the SiO2 oxide growth on SiC, and therefore different among
devices produced by different manufacturers.
Finally, it should be noted that the setup used during the
experiment was counting as a failure event all the devices
whose ID leakage current in OFF-state exceeded 1.27 mA.
Therefore, the FITs and the failure cross section analysis
include both the failure mechanism indicated as SEB (iii) and
degradation with partial or complete gate rupture (ii), with the
latter also considered not operable from an application point
of view due to the very high leakage currents.

V. C ONCLUSION
Results from accelerated terrestrial neutron experiments
were presented for different commercial SiC technologies with
planar, trench, and double-trench architectures.
Different failure mechanisms were observed from the postir-
radiation analysis of the irradiated devices, and three different
responses were commonly identified for each of the three
architectures: (i) no damage observed with respect to a pristine
device, (ii) partial degradation of the device, which exhibited
high leakage currents, and (iii) SEB (i.e., ohmic trend of
the leakage current). Categories (ii) and (iii) were considered
failed devices from an application point of view. Failure cross
sections and FIT rates were calculated for these devices.
MOSFETs with a trench structure appear to be less sensitive
to neutron-induced failures with respect to the planar ones.
The double trench architecture, which also has the higher
breakdown voltage, was observed to be the most robust.
Examples were reported and discussed for the degraded
Fig. 8. Breakdown voltage measurements after the PIGS test. The results devices (ii) and the impact of gate rupture was discussed
are reported for (a) planar, (b) trench, and (c) double-trench DUTs, which did for the three designs. The planar-gate architecture exhibited a
not show any damage during the exposure (i), and for (d) planar DUT which
was partially degraded (ii). The first cycle reports the measurement just after
partial gate rupture mechanism, probably induced by displace-
the irradiation, while the second and the third represent the measurements ment damage and characterized by very high leakage currents
repeated after applying a positive VGS up to the rated voltage and a negative with a gate–drain current path. This effect was observed
VGS of −5 V, respectively.
to be similar to the SELC degradation induced by heavy
of the trench and double-trench devices exhibited a complete ions, already discussed for the same reference, but reported
gate rupture. Conversely, a partial gate rupture was observed here for neutron irradiation. The trench and double-trench
MARTINELLA et al.: IMPACT OF TERRESTRIAL NEUTRONS ON THE RELIABILITY OF SiC VD-MOSFET TECHNOLOGIES 641

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