# Title :
Study of shift register ( SISO , SIPO , PISO , PISO )
# objective :
to study Various shift registers and it’s applications
# statement :
To design and implement following registers
1: SISO
2: SIPO
3:PISO
4:PIPO
# software and hardware requirements:
flop , clock , 4 bit register , IC 7495
# theory :
Serial shift left register :
Diagram :
Table :
Serial shift right Register :
Principle :
Diagram :
Table :
# 1 : serial in serial out shift register (SISO ) :
In serial – in – serial out shift register ( right shift ) , the data bits are shifted from left to right
by 1 position during each clock cycle
In serial – in – serial out left shift register, the data bits are shifted from right to left by 1 position
during each clock cycle .
Mode control is made low
Click 1 (pin 9 ) of 7495 is connected to the pulser ( mono shift )
The serial input to be converted to serial outputis given to serial input DS ( pin 1 )
After 4 clock pulses the serial input data appear in parallel form as Q3 , Q2 , Q1 ,Q0 As Shown
The next 4 clock pulses move the data out of the shift register, serially as Q0
Timing graph :
Applications of serial- in – serial shift register ( SISO ) :
1 : The serial-in parallel-out shift register is used to convert serial data into parallel data
2 : they are used in communication lines where demultiplexing of a data line into several
parallel line is required
# 2 : serial in parallel out shift Register ( SIPO ) :
In Serial – in – parallel – out shift register , all the output will be available after 4 clock
pulses for a 4 – bit shift register
To perform SIPO operation, consider a 4 bit data 1101
Mode control is made 0
Clock 1 ( pin 9 ) of 7495 is connected to the pulser ( mono shot )
The serial input to be converted to parallel output is given to serial input D5 ( pin 1)
After 4 clock pulses the serial input data appears in parallel form as Q3 ,Q2,Q1 Q0 As
shown in fig
Timing graph :
Applications of serial- in – parallel out shift register ( SIPO ) :
1 : The main application of Serial in Parallel out shift register is to convert serial data into parallel
data.
2 : They are used in communication lines where demultiplexing of a data line into several
parallel line is required.
# 3 : parallel – in – serial out shift register ( PISO ) :
In – parallel – in - serial out shift register, all the inputs are simultaneously loaded but the shift
register outputs bit – by – bit , serially
Mode control is made 1
The parallel inputs to be loaded in to the shift register are given to D3 , D2 ,D1 ,D0 inputs
Clock 2 ( pin 8 ) is pulsed once . Now D3, D2 , D1 , Do parallel inputs appears on Q3 , Q2 ,Q1 , Q0
lines
CLK 1 ( pin 9) is connected to the pulser
Mode control is made 0
With each clock pulse , data shifting right by 1 bit and hence after 4 clock pulses, parallel inputs
data is converted into serial output data at Q0
Timing graph :
Applications of parallel- in serial – out shift register :
1 : A PISO shift register is used for converting parallel to serial data
2 : PIPO shift registers are used for generating time delay toward digital circuits. These
registers are used for data transfer, manipulation and data ststorag
# 4 : parallel – in – parallel shift out register ( PIPO ) :
In parallel – in – parallel out shift register all the shift register, inputs are loaded simultaneously
and all the inputs will be available simultaneously , i.e . only one clock pulse is required to load all
the bits
Mode control is made HIGH
The parallel input to be loaded in the shift register are given to D3 D2 , D1 , D0 inputs
Clock 2 ( pin 8 ) is pulsed once , now D3, D2, D1, D0. Parallel input appears on Q3, Q2, Q1, Q0
lines
Timing graph
Applications of parallel – in – parallel out shift register ( PIPO ) :
1 : PIPO shift registers are used for generating time delay toward digital circuits.
# outcome :
Successfully designed and implemented SISO , SIPO , PISO , PIPO
