Analogue and Digital Communication Lab
(EL-323)
LABORATORY MANUAL
ENGR. IHTISHAM KHALID & ENGR. MUHAMMAD ASIM
IMPLEMENTATION OF FREQUENCY DEMODULATOR
(LAB # 07)
Student Name: ______________________________________________
Roll No: ________________ Section: ____
Date performed: _____________, 2016
____________________________________________________________________________________________________________________________________________________________
NATIONAL UNIVERSITY OF COMPUTER AND EMERGING SCIENCES, ISLAMABAD
Prepared by: Engr. M. Asim, Engr. Ihtisham Khalid Version: 2.01
Last Edited by: Engr. M. Asim, Engr. Ihtisham Khalid
Verified by: Dr. Shahzad Saleem Updated: Fall 2016
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Lab # 07: IMPLEMENTATION OF FREQUENCY DEMODULATOR
Learning Objectives:
1. To understand the operation theory of phase locked loop
2. To understand the basic characteristics of LM565 phase locked loop
3. To design & implement the phase locked loop to demodulate the modulated signal
4. To design & implement the frequency discriminator to demodulate the modulated signal
Equipment Required:
1. ETEK Function Generator Board
2. ETEK DA-2000-03 Board
3. Oscilloscope
The Operation Theory of Phase Locked Loop
Frequency demodulator is also called frequency discriminator, which can convert the variation of
frequency to the variation of linear voltage. Normally we use FM to AM conversion circuit,
balanced discriminator circuit and PLL synthesizer for the FM demodulator.
PLL is a feedback circuit. In the feedback loop, the feedback signal will lock the output signal
frequency and phase with the same frequency and phase of the input signal. So, for wireless
communication, if the frequency of the carrier signal deviate during transmission, then PLL in the
receiver will operate and lock the carrier signal. In this experiment, there are two ways of using PLL
the first type is demodulator, which is used for demodulation by following the variation of phase &
frequency. The second is carrier frequency tracking which is used to track the changes of the
frequency of the carrier signal and to synchronize the oscillation.
Normally phase locked loop can be divided into three sections as follows:
1. Phase detector (PD)
2. Low pass filter (LPF)
3. Voltage controlled oscillator (VCO)
From figure-1, the function of phase detector is to receive input signal and VCO signal, then the
two signals are compared by phase detector and provide an output signal, which is a pulse signal.
After that, this signal is then sent to a low-pass filter also known as loop filter, to remove the
unwanted signal and left the DC voltage.
Figure-1: The block diagram of phase locked loop
This DC voltage can be used to control the output signal frequency of VCO. Figure-1 is the block
diagram of PLL, where
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Page 2 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Kd = The gain of phase detector (Volt/Radian)
Ka = The gain of amplifier (Volt/Volt)
Ko = The gain of VCO (KHz/Volt)
KL = KdKaKo = The gain of closed loop (KHz/Radian)
We use a simple circuit to explain the basic concept of phase detector. Figure-2(a) shows that the
phase difference between two input signals is the smallest, so the output signal pulse width is the
narrowest. The figure-2(b) shows that the phase difference between two input signals is larger than
figure-2(a), so the output signal pulse width is wider than in figure-2(a). Figure-2(c) shows that the
phase difference between two input signals is the largest and therefore the output signal pulse width
is the widest.
Figure-2: The theory of phase detector
If these three output signals pass through the low pass filter to remove the AC signal, then the
magnitude of DC voltage in figure-2 is as follows: 1. Figure-2(c) has the highest DC voltage, 2.
Figure-2(b) is the second highest and 3. Figure-2(a) is the lowest. The relation of DC voltage and
the phase difference of A,B input signals is shown in figure-2(d).
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Page 3 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
From figure-3, assume that the free running frequency of a VCO is set to 1 KHz (assume the bias
voltage is 2 V) if input signal A is below 1 KHz and a signal B is higher than 1 KHz. From figure-3,
we found that when input signal A frequency is lower than the free running frequency of VCO, then
the output of low-pass filter will receive a lower voltage level (assume its 1 V), this lower voltage
level will adjust the oscillation frequency of VCO, so that the oscillation frequency will decrease
until the frequency of output signal of VCO and the frequency of signal A become equal to each
other. When input signal B frequency is higher than the basic frequency of VCO, the output
terminal of low-pass filter will receive a higher voltage (assume its 3 V), so the oscillation
frequency of VCO and the frequency of signal B become equal to each other. Normally the time
needed for VCO locked frequency is very short.
Figure-3: The theory of locked frequency
The Basic Characteristics of LM565 PLL Circuit
1. Free-running frequency
Figure-4 is a LM565 phase locked loop circuit diagram, from figure-4, when input terminal does not
input any signal, the output signal frequency of VCO is called free-running frequency. Where C2 is
timing capacitor and VR1 is timing variable resistor, the free running frequency (fo) of LM565 is
decided by C2 and VR1.
1
Free-running frequency: f o= 3.7 VR C
1 2
33.6 f o
Closed loop gain: K L=K d K a K o=
Vc
Where Vc = Total voltage supply = Vcc – (-Vcc) = 5 - ( - 5) = 10V
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Page 4 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Figure-4: LM566 phase locked loop
2. Locked Range
When PLL circuit is at already locked situation, assume that the input signal frequency (fi) slowly
move away from fo, when fi reaches at a certain frequency, the PLL will leave the locked situation.
At this moment, the maximum frequency difference for fi and fo is called locked range (refer to
figure-5). The locked-range of LM565 is
8f
f L= o
Vc
3. Captured Range
At the beginning, PLL is at not locked situation, and then let the input signal frequency fi slowly
move close to fo, when fi reaches at a certain frequency, PLL will be at already-locked situation.
Then at this moment, the frequency difference between fi and fo is called captured range (refer to
figure-5). LM565 captured range is
1 2π fL
f c =(
√
)
2 π 3.6 x 10¿3∗C2
Figure-5: Lock range and capture range diagram
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Page 5 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Implementation of FM demodulator by using LM565 PLL
Figure-4 is the circuit diagram of LM565 phase-locked loop, we can use this circuit as a FM
demodulator. When the input signal frequency increases, then the output signal voltage decreases
and vice versa. Therefore, we can utilize the relationship between the voltage of PLL and frequency
to design the FM demodulator.
LM565 phase detector and VCO are designed in the IC package, this VCO and LM565 are the
same. The free running frequency fo of VCO is decided by the external C2 and VR1. The low-pass
filter is comprised by the internal resistor R3 at pin 7 and external capacitor C3. The objective of
capacitor C4, which is connected between pin 7 and 8 is to reduce the parasitic oscillation.
FM to AM Conversion Discriminator
Figure-6 is the block diagram of FM to AM frequency discriminator, which is used to convert the
FM signal through a differentiator to AM signal, then use an AM envelop detector to demodulate.
Figure-6: The block diagram of FM to AM frequency discriminator
From figure-6, the input signal XFM(t) is
u FM ( t )= Ac cosθ ( t )= A c cos ¿
After passing through a differentiator, the output signal is
u ' FM ( t )=− A c θ ' ( t ) sinθ ( t )=2 πA c [ f c +k f m ( t ) ] sin [θ ( t ) +180o ]
From above equation, we know that u ' FM ( t ) amplitude is varied from m ( t ) . Therefore, this signal is
an amplitude modulated signal, and when this signal is sent to an envelop detector, then we can
obtain the demodulated signal. The actual circuit diagram is shown in figure-7. Here U1, C1, C2,
R1 & R2 comprise a differentitator, U2, R3 and R4 comprise an inverting amplifier, D1, R5, R6, C4
& C5 comprise AM peak detector. Capacitor C6 is used to block the DC voltage signal. U1 and U2
need operation frequency near 1.5 MHz, so uA741 is not suitable to use in this case, therefore, we
choose LM318 which provides better frequency response.
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Page 6 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Figure-7: The circuit diagram of FM to AM frequency discriminator
Experiment 1: The basic characteristics measurement of LM565 phase locked loop
1. Refer to figure 6-4 on ETEK DA-2000-03 module, let J2 short circuit and J3 open circuit, then C2
is 0.1 uF
2. Let J1 open circuit, which let SW1 open circuit
3. Adjust the variable resistor VR1, then measure the output signal of LM565 VCO at pin 4 under the
largest free running frequency foh and the smallest free running frequency fol (refer to figure-5) and
record the measured results in table-1
4. Adjust the variable resistor VR1 until the free running frequency of VCO output (fo) is 2 KHz
5. Let J1 short circuit, and from the input port, input 0.25 V amplitude and 2KHz square wave
frequency
6. By using oscilloscope, observe on the input signal and output signal of LM565 VCO (pin 4).
Slightly adjust the input signal frequency, when VCO output signal frequency is stable and cannot
lock input signal, record the signal frequency fLh at this moment in table-1
7. Readjust the input signal frequency to the free running frequency (fo) of VCO. Then decrease the
input signal frequency, when the output signal frequency of VCO cannot lock the input signal,
record the input signal frequency fLl at this moment in table 6-1
8. By using equation fL=(fLh - fLl)/2, then calculate the locked range
9. Increase the input signal frequency, so that the output signal frequency of VCO cannot lock the
input signal. Then slightly decrease the input signal frequency until the PLL locks the input signal.
Observe on the input signal frequency fCh and record the measured result in table-1
10. Decrease the input signal frequency so that the output signal frequency of VCO cannot lock the
input signal. Then slighthly increase the input signal frequency until the PLL locks the input signal.
Observe on the input signal frequency fCl and record the measured result in table-1
11. By using equation fC=(fCh - fCl)/2, then calculate the captured range
12. Let J1 and J2 open circuit, J3 short circuit, which means that C2 changes to C5. i.e. 0.1 uF changes
to 0.01 uF, then repeat step 3
13. Adjust the variable resistor VR1, so that the free running frequency (fo) of the VCO output signal is
20 KHz. Let J1 short circuit and from the input terminal, input 0.25 V amplitude and 20 KHz square
wave frequency, then repeat step 6 to 11
Table-1:
The measured results of the basic characteristics of LM565 PLL
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Page 7 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
C2 fo Free-running Locked Range fL Captured Range fC
Frequency Range
0.1 uF 2 KHz Foh = fLh = fCh =
Fol = fLl = fCl =
fL = fC =
0.01 uF 20 KHz Foh = fLh = fCh =
Fol = fLl = fCl =
fL = fC =
Experiment 2: The characteristics of voltage and frequency conversion of LM565 PLL
1. Refer to figure 6-4 on ETEK DA 2000-03 module. Let J2 short circuit and J3 open circuit, i.e. C2 is
0.1 uF
2. Let J1 open circuit, adjust the variable resistor VR1 so that the free running (fo) of the output signal
of VCO LM565 at pin 4 is 2 KHz.
3. Let J1 short circuit, which means SW1 is short circuit
4. From the signal input terminal, input 0.25 V amplitude and 2 KHz square wave frequency, then
measure the voltage of output terminal (LM565 pin 7) and record the measured result in table-2
5. Change the input signals to 0.5 KHz, 1 KHz, 1.5 KHz, 2 KHz, 2.5 KHz, 3 KHz & 3.5 KHz
respectively and measure the voltage of output terminal and record them in table-2
6. Plot the characteristic curve of voltage versus frequency in the space provided below table-2
7. Let J3 short circuit and J2 open circuit, which means that C2 changes to C5. i.e. 0.1 uF changes to
0.01 uF
8. Let J1 open circuit, adjust the variable resistor VR1 so that the free running (fo) of the output signal
of VCO LM565 at pin 4 is 20 KHz.
9. Let J1 short circuit, which means SW1 is short circuit
10. From the signal input terminal, input 0.25 V amplitude and 20 KHz square wave frequency, then
measure the voltage of output terminal (LM565 pin 7) and record the measured result in table-3
11. Change the input signals to 16.5 KHz, 17.5 KHz, 18.5 KHz, 20 KHz, 21.5 KHz, 22.5 KHz & 23.5
KHz respectively and measure the voltage of output terminal and record them in table-3
12. Plot the characteristic curve of voltage versus frequency in the space provided below table-3
Table-2:
The measured results of voltage and frequency conversion characteristics of LM566 PLL (Vm = 0.25 V, fo
= 2 KHz, C2 = 0.1 uF)
Input 0.5 1 1.5 2 2.5 3 3.5
Signal
Frequencie
s (KHz)
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Page 8 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Output
Voltages
(V)
Characteristic curve of voltage versus frequency
Table-3:
The measured results of voltage and frequency conversion characteristics of LM566 PLL (Vm = 0.25 V, fo
= 20 KHz, C3 = 0.01 uF)
Input 16.5 17.5 18.5 20 21.5 22.5 23.5
Signal
Frequencie
s (KHz)
Output
Voltages
(V)
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Page 9 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Characteristic curve of voltage versus frequency
Experiment 3: PLL frequency demodulator
1. Refer to figure 5-5 on ETEK DA-2000-03 module, let J1 short circuit. Next let J3 short circuit and
J2 open circuit, which means C4 is 0.01 uF. Adjust VR1 so that the free running frequency (fo) of
the output signal is 20 KHz.
2. Refer to figure 6-4 on ETEK DA 2000-03 module, let J3 short circuit, J1 and J2 open circuit, which
means C5 is 0.01 uF, then adust the free running frequency (fo) of the VCO output to 20KHz
3. Let output terminal of LM565 VCO frequency modulator connects to the input terminal of LM565
PLL frequency demodulator
4. Adjust the function generator to output 250 mV amplitude and 1 KHz square wave frequency, then
input this signal to the input terminal of LM565 VCO frequency modulator (refer to figure 5-5). Bu
using oscilloscope, observe on the output signal waveform of LM565 PLL frequency demodulator
and record the measured results in table-4
5. Change the input signal frequencies to 3 KHz and 4 KHz, repeat step 4
6. Adjust he amplitude of signal to 500 mV and, the others remain the same. Repeat step 4 and 5, then
record the measured results in table-4
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Page 10 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Table-4:
The measured results of the input and output signal waveforms of PLL frequency demodulator (Vm = 250
mV, fo = 20 KHz)
Input Signal Input Signal Waveforms Output Signal Waveforms
Frequencies
1 KHz
2 KHz
3 KHz
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Page 11 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Table-5:
The measured results of the input and output signal waveforms of PLL frequency demodulator (Vm = 500
mV, fo = 20 KHz)
Input Signal Input Signal Waveforms Output Signal Waveforms
Frequencies
1 KHz
2 KHz
3 KHz
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Page 12 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Experiment 4: FM to AM conversion frequency demodulator
1. Refer to figure 5-3 on ETEK DA-2000-03 module, let J1 short circuit, which means the operation
bias voltage of varactor diode D1 is 5 V. Then let J2 open circuit and J3 short circuit, i.e. L1 is 220
uH
2. From the input terminal of the audio signal of MC1648 frequency modulator in figure 5-3, input 1
V amplitude and 1 KHz square wave frequency, then adjust VR1 so that the output signal amplitude
is 700 mV
3. Refer to figure 6-7 on ETEK DA 2000-03 module, connect the output terminal of MC1648
frequency modulator in figure 5-3 to the input terminal of figure 6-7
4. By using oscilloscope, observe on the input signal waveform of frequency modulation and the
output signal waveform of frequency demodulator, then record the measured reults in table-6
5. Change the audio signal in step 2 to 2 KHz and 3 KHz, repeat step 4
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Page 13 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Table-6:
The measured results of the input and output signal waveforms of FM to AM conversion frequency
demodulator (Vm = 1 V)
Input Signal Frequency Demodulator Input Signal Frequency Demodulator Output
Frequencies Waveforms Signal Waveforms
1 KHz
2 KHz
3 KHz
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Page 14 of 15
Lab #
Analogue and Digital National University Roll No: __________
Communication Lab
(EL323)
of Computer and Emerging Sciences
Islamabad Fall 2016
07
____________________________________________________________________________________
Student's feedback (Try giving useful feedback, e.g. did this lab session help you in learning, how to
improve student's learning experience, was the staff helpful, etc):
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Student's Signature: _________________________________
Correctness of
TOTAL
AWARDED
Attitude
Neatness
Conclusion
Originality
Initiative
MARKS
TOTAL 10 10 10 20 20 30 100
EARNED
Lab Instructor's Comments:_______________________________________________________
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Lab Instructor's Signature: _________________________________
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