Virtutech Simics 1.

6
April 2003

Virtutech® Simics™ is a full system simulation

platform, capable of simulating high-end target
systems with sufficient fidelity and speed to boot and
run operating systems and commercial workloads.
Simics provides a controlled, deterministic, and fully
virtualized environment. Our customers and partners
use Simics for a variety of tasks, including support
for the development of future commercial
microprocessors, multiprocessor server memory
architectures, high-performance fault-tolerant
operating systems, testing of large networks, and for
hardware/software co-development.
Academic groups use Simics to support education
and advanced research in computer architecture and
operating systems. Simics is today in use at over
300 universities and research institutes worldwide.
Simics can simulate a variety of target systems,
including uniprocessor and multiprocessor
configurations, as well as clusters and networks of
systems.
Simics can boot and run unmodified and realistically
scaled operating systems and commercial workloads,
including Linux (ARM, Alpha, Itanium, MIPS,
The screenshot depicts multiple instances of Simics simulating target systems based on a variety of different PowerPC, SPARC, x86, and x86-64 versions),
processor architectures, each running a corresponding operating system: an x86 (Pentium II) machine running NetBSD (x86 and x86-64), Solaris 7, 8, and 9, Tru64
RedHat 6.2 and a KDE desktop; a second x86 machine showing the Windows NT login screen; an 5.0 (Alpha), VxWorks (PowerPC), Windows NT 4.0,
UltraSPARC II machine running Solaris 8 and MySQL; a Simics command line for an UltraSPARC III model Windows 2000 Server, and Windows XP.
before "powering on"; an IPF (Itanium) model running RedHat 7.2; a PowerPC machine running VxWorks; and
an x86-64 (Hammer) machine running Windows XP (the simulated processor is running in 32-bit legacy mode).

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Full-System Simulation Hardware/Software Co-Development
Virtutech Simics simulates all the hardware of a computer system, Since the simulated target system is represented completely in software when using
allowing you to run unmodified operating systems, firmware, device Simics, each design phase can be compressed and staged in parallel, thus reducing
drivers, middleware layers, network stacks, and application software. time-to-market and design risk.
Applications can be developed and tested on the Simics platform just like The figure below depicts the design dependencies that are typically required when
they would be on the real hardware. Stimulus can be provided via designing an embedded system. Dependencies can be relaxed by working with a
simulated user-interface devices like keyboards, or via (simulated) common simulation platform, such as Simics. Each group can move gradually and in
networks (potentially interfaced to a real network). parallel from a standard system to a full custom platform. Operating-system bringup
and software development is accelerated thanks to the early availability of a stable
Custom devices can be included in the simulation, mixed freely with the platform, and hardware development completion is no longer blocking software
standard devices provided with Simics. In this fashion, device behavior development.
and programming interfaces can be tested using the real system software
and application programs. This also offers a platform for developing Simics can be used in validating and verifying RTL-level hardware models by
software-intensive system-on-a-chip solutions. Software teams can use interfacing with external simulators for Verilog, VHDL, or SystemC. This makes
Simics instead of development boards, reducing capital expenditure and is possible to test the hardware in a realistic environment containing other
reducing time to market. devices, processors, and significant amounts of software.

[Link] Copyright © 2003 Virtutech AB All Rights Reserved April 2003

 Virtutech Simics 1.6 Feature Set Summary
Feature Simics 1.6 Comments
Target Hardware Restrictions
Alpha: 21164 (EV5) , PC 21264 (EV6); ARM: Intel StrongARM; Intel IA64: Itanium, Itanium 2; MIPS:
Target CPU architectures
MIPS32 4Kc; PowerPC: PPC 405GP, PPC 750, MPC 7450; SPARC: UltraSPARC II, UltraSPARC III/III Cu; Intel
supported
IA32: 486sx, Pentium, Pentium II, Pentium III, Pentium 4; AMD x86-64 “Hammer”: Athlon 64, Opteron.
Simics is portable, and can be made available on any reasonable host platform, allowing
Red Hat Linux, Solaris,
Hosts leveraging of compute resources. Most common Linux flavors in addition to Red Hat are
Windows 2000 & XP
supported.
Simics’ restrictions are governed by target architecture and restrictions in the operating
Number of processors Unlimited system running on the target. For example, the interrupt controller may only support a
specific number of processors for sending inter-processor interrupts.
Simics was designed from the start to support multiprocessor models, including
Multiprocessor targets? Yes
distributed multi-node and shared memory (SMP) systems.
Simics can simulate clusters, either within one Simics session, or with each node of the
Cluster targets? Yes
cluster running in a separate Simics process.
Simics supports simulating multiple independent targets, communicating over networks
Networks? Yes
(such as Ethernet), all within the same deterministic and synchronized virtual time.
Hyperthreading/SMT Yes Simics supports multi-threaded processor core models.
Accessibility of State
The entire state of the simulated machine can be viewed and modified from the command
Visibility Full line or scripts. This, of course, includes reading or writing user registers, control
registers, and any memory location.
Target Software Restrictions
Simics simulates the correct system-level state and functionality of the target processor
Unmodified operating
Yes (interrupt model, memory translation, protection, control registers, etc.), allowing
systems?
unmodified operating system kernel code to run.
Simics includes binary-compatible models for most common devices (Ethernet, SCSI,
Unmodified drivers? Yes VGA, etc.), allowing unmodified device drivers and firmware to be used. Obviously
Simics also supports the addition of “pseudo” devices.
Large Workload Support
Distributed simulation? Yes Simics can simulate clusters or networks on a parallel host, either MP or network.
16-way SMP running:
DB2/TPC-C, DB2/TPC- This Simics setup (Sunfire) was carried out by University of Wisconsin-Madison:
Demonstrated setup
H, Apache/SURGE, [Link]
AltaVista
“Debugger” features
Simics code breakpoints are non-intrusive. For example, this allows setting breakpoints
Code breakpoints? Yes
on run-time-generated code, and in interrupt functions.
Breakpoints can be set on read, write, and execute (instruction fetch) over arbitrary
Memory breakpoints? Yes
memory ranges and combinations thereof.
Simics allows setting breakpoints on the number of issued instructions or the number of
Time breakpoints? Yes
simulated cycles.
Control register
Yes Simics can break separately on reads from or writes to any specified control register.
breakpoints?
Simics can break on an arbitrary masked bit pattern and arbitrary sub-string of the
Instruction type? Yes
disassembled instruction (e.g., break on instructions with the sub-string “%g7”).
Device access? Yes Simics can break on an arbitrary device, regardless of how it is mapped into memory.
Breakpoints impact on In general, neither code breakpoints nor memory watchpoints have a discernible effect on
Minimal
performance simulator performance.
Code profiling? Yes Available on some targets.
Memory profiling? Yes For the main physical memory.
Simics supports the remote gdb protocol. This allows external gdb sessions to debug
Gdb interface? Yes
applications running on Simics.
Simics can read symbolic information in the stabs format. It supports multiple active
Symbolic debugging? Yes
symbolic contexts.
Performance: Examples
Boot Linux on MIPS to 5.1 sec Host: AMD Athlon XP 3000+ workstation with 512 Mbyte of RAM, running Red
prompt (127 Mops, 25 MIPS) Hat Linux 8.0
Dhrystone on PPC Linux 58 MIPS As above. Dhrystone 2.1 as user app running 10 million iterations.
MP boot: 30-processor 27 min 32 sec As above. System boots full Solaris 9 including boot prom. Workload is until multi-user
UltraSPARC II system. (19.5 Gops, 12 MIPS) prompt.

[Link] Copyright © 2003 Virtutech AB All Rights Reserved April 2003