A half adder is a basic combinational circuit that adds two single-bit binary inputs (A and B) to produce a SUM using an XOR gate and a CARRY using an AND gate, without considering any carry-in from a previous stage.
- Performs binary addition of two single-bit inputs, generating a SUM (A ⊕ B) and CARRY (A · B).
- Cannot handle carry-in from a previous stage, making it suitable only for the first stage of multi-bit addition.
Truth Table of Half Adder
| A | B | Sum | Carry |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
Logical Expression of Half Adder
The Half Adder performs two operations, Sum and Carry. Therefore, two K-maps are used to derive their Boolean expressions.
Sum
Sum = A XOR B
Carry
Carry = A AND B
Advantages
- Simple Design: A half adder has a simple circuit design that uses only two logic gates (XOR and AND), making it easy to implement and understand.
- Fast Operation: Since it contains only a few logic gates, it produces the Sum and Carry outputs with very little delay.
- Low Hardware Requirement: It requires fewer hardware components, reducing circuit complexity and implementation cost.
Disadvantages
- No Carry Input: A half adder cannot accept a carry input from a previous stage, limiting its use in larger arithmetic operations.
- Limited Functionality: It can add only two single-bit binary numbers and cannot perform multi-bit addition by itself.
- Requires Full Adders: For multi-bit binary addition, half adders must be combined with full adders to handle carry propagation.
Applications
- Binary Addition: It is used to add two single-bit binary numbers and generate the corresponding Sum and Carry outputs.
- Building Block for Full Adders: Half adders are commonly used as the basic building blocks in the design of full adders.
- Digital Arithmetic Circuits: They are used in arithmetic units, calculators, processors, and other digital systems where simple binary addition is required.