Bits&Chips

ASML should not overplay its hand with opportunistic price increases During the presentation of ASML's half-year results a UBS analyst asked if it might be a good idea to raise the price of the low-NA machines. “Is there any scope for pricing adjustments for low-NA over time to ensure that the system pricing remains aligned with the incremental value you give to customers?”, added the analyst. CFO Rogier Dassen's answered (in shortened form): “In the current environment, the value for ASML’s customers is higher and provides more flexibility for pricing. Given the long order lead times, that doesn't translate into pricing effects tomorrow. But clearly, the value that our products bring is substantial. It gives us flexibility on pricing more so than what you would have seen in the past. And of course, we're executing on that as well.” News site The Information concluded that ASML was considering raising prices for low-NA—something Bloomberg eagerly picked up afterwards. The latter immediately gave it a bit more punch: ”ASML plans to raise prices for its chipmaking equipment, which may lead to a clash with its biggest customer TSMC.” A lot of noise, but the words “may lead” of course take the sting out of the story. Tinkering with existing agreements is dangerous, as ASMLs executives have repeatedly said in the past. Even in these exceptional times, it would not be wise to use its monopoly position as leverage to raise system prices. Not even in exceptionally good times. ASML is a monopolist and AI has created these exceptional times, but the company is currently not in a position to unilaterally raise the prices of its systems. Over the coming years, it would be better off focusing on cost savings, improving the reliability and performance of its systems. That way, under the existing deals, it will automatically capture a larger share of the pie. With opportunistic pricing, the company could overplay its hand. For those who think ASML can currently ask what it wants as a monopolist, I’ll give some examples of its vulnerability tomorrow. Photo from 2025 results meeting last January.

TSMC and now also Samsung Electronics are happy to keep using only 0.33-NA EUV for the remainder of the decade, rather than inserting High-NA. TSMC cites cost, Samsung insufficient maturity of the technology (in particular, the supporting infrastructure). Intel, meanwhile, is running limited High-NA production already. It's no surprise that the market leader opts for the most conservative route: its position has enabled it to perfect low-NA (multi)patterning. What is interesting is that two close followers who have both struggled take different approaches. Apparently, High-NA doesn't offer an overwhelming economic advantage today, but the hit in cost is not so big that strategic early adoption is out of the question. https://lnkd.in/eUcc6Ckz

The Match Act aims to put additional curbs on ASML's exports and service operations to China. While some consider the bill to be so outrageous that it will never be adopted by US Congress or that it ranks pretty low on the list of grievances of US allies, Bits&Chips editor Paul van Gerven takes a different view. At some point, the EU must put a stop to the death of a thousand cuts. The Greenland episode showed that Europe can close ranks when one member state’s sovereignty is challenged. Will we do it again when it’s not our territory, but our technological sovereignty and geopolitical relevance that are under threat? https://lnkd.in/eG9dsAqS

Almost every major chip manufacturer has raised 2026 capex guidance since the start of the year, which for most was already a step up from 2025: 2025 -> start of 2026 -> current guidance TSMC: $41B -> $52-56B -> $60-64B SK hynix: $18B -> $28B -> $34B Micron Technology: $14B -> $18B -> $27B Intel: $18B -> $18B -> >$20B Samsung Semiconductor: $33B -> $74B -> $74B (no new announcement) We're halfway through the year. Will these numbers grow even higher?

Besi secured a hybrid bonding order from a hyperscaler during the first half of the year. That might look remarkable, since Apple, Amazon, Microsoft and their peers are not known as electronics manufacturers. They have the chips and advanced packages for their smartphones, computers and data centers manufactured by TSMC, after which the products are assembled and tested by OSATs such as Amkor and ASE. After CEO Richard Blickman mentioned the term "hyperscaler," the very first analyst to ask a question, @Yu Shi of Needham, wanted to know more. Publicly listed companies always prepare the presentation of their financial results with great care. They review their achievements in detail and provide a realistic outlook for the future. Dropping a term such as "hyperscaler" in that setting is never accidental. Hyperscalers are currently investing hundreds of billions of dollars in artificial intelligence, and hybrid bonding equipment is an enabler for producing AI systems that deliver high performance while consuming less power. However, Besi’s hybrid bonder is not destined for a factory producing data center chips, but rather for edge AI, namely smart glasses. Blickman referred to "wearable products, glasses." A handful of the hyperscalers are working on them. The Samsung-Google partnership will launch its first smart glasses in a few months, Apple is still in the early stages of development, and Amazon is testing them for its delivery personnel. Meta is leading the field. Five years ago, it began collaborating with optics giant EssilorLuxottica, resulting in the launch of Ray-Ban Stories in 2021. Reuters reported that Meta and EssilorLuxottica are now considering doubling output to an annual production capacity of about 20 million units. Production in Italy is scheduled to begin in early 2027. Meta is also launching a lower-cost product line under its own brand. This increased activity may well have led to the order for a hybrid bonder from Besi. Using the technology is expensive—something that smart glasses priced between €300 and €600 can absorb—but it delivers higher performance and extends battery life by several tens of percent. It is also worth mentioning that, in 2023, Meta acquired the Belgian-Dutch company Luxexcel, which developed machines capable of printing optical-quality prescription lenses that can embed the vision technologie for things like augmented reality. Photo: Meta "Classic Black" smart glasses.

Investors are a weird bunch. When what can only be described as a rumor about a Chinese advance in semiconductor lithography popped up, ASML's stock dropped like a stone. An existing and arguably much bigger threat to the firm's sales from the US, however, has barely made any waves. Let's review, shall we? A Chinese entity is rumored to supply five DUV immersion machines this ⁠year and roughly 20 in 2027. We don't know anything about these tools' capabilities, throughput and compatibility with the existing fleet of litho tools. If an incumbent like Nikon can't gain market share, why would a newcomer be an immediate problem for ASML? No one is saying China can't ever pose a serious threat, so come on... The US Match Act, meanwhile, aims to ban all of ASML's shipments of immersion systems to China. The Middle Kingdom accounts for approximately 20 percent of the firm's sales, with immersion tools likely making up a significant portion of this figure. This threat is very real, as recently underlined by US Commerce Secretary Howard Lutnick producing unsubstantiated rumors about an EUV tool standing on Chinese soil. This is clearly intended to justify more export restrictions. https://lnkd.in/dkcQAwSs #chips #semiconductors #lithography #semicon #China #MatchAct

The report that a Chinese equipment manufacturer will build five immersion lithography scanners this year immediately wiped tens of billions off the market value of semiconductor equipment companies. Is China about to overcome another major technological barrier? Is the country that is rapidly advancing in atomic layer deposition and hybrid bonding may now also be entering immersion lithography? The reports almost certainly are about SMEE. Western media already reported in late 2023 that SMEE had completed development of its 28 nm immersion scanner, the SSA800-10W. Working systems may already have been delivered to SMIC and Chinese research institutes. If the current reports refer to five machines, they are most likely working prototypes. They may already be capable of printing 28 nm patterns and even achieve respectable overlay. That does not automatically make them commercially viable production tools. When ASML introduced immersion lithography, it still took years before the technology became suitable for high-volume manufacturing. Early prototype wafers reportedly contained more than 30,000 defects. Solving issues such as bubble formation between the projection lens and the wafer required years of engineering and resulted in an extensive patent portfolio. Another point receives surprisingly little attention: throughput. Chinese publications often emphasize nanometer resolution, critical dimensions and overlay. Those metrics are important—but they are only part of the story. A production scanner must also print fast. A prototype capable of exposing only a handful of wafers per hour is scientifically impressive but commercially almost irrelevant. A competitive immersion scanner needs roughly one hundred wafers per hour. ASML's most advanced immersion systems process well over 300 wafers per hour. Then there is the broader ecosystem. Machine-matched overlay is not simply a hardware specification. It requires years of calibration, process optimization, software development and customer learning. That accumulated experience is one of the reasons Nikon has never managed to seriously challenge ASML in immersion lithography despite offering less expensive systems. But we do need to pay SMEE some respect. It has already demonstrated that it can build reliable i-line lithography systems, and its AMIES spin-off claims an installed base of around 500 steppers. Progress is clearly real. But there remains a huge gap between demonstrating immersion lithography and competing with ASML in high-volume manufacturing. My conclusion? Don't underestimate China and don't overestimate five prototype machines either. ASML's greatest competitive advantage is not only its optics or precision engineering. It is more than two decades of manufacturing experience, debugging, process control, productivity optimization and customer learning. For Veldhoven, the message remains simple: keep a cool head—but remain relentlessly vigilant.

"I believe every customer tells me the truth, everyone. [But if] you put all the truths together, it's not the truth." This quote from TSMC CEO CC Wei summarizes how his firm is dealing with sizing up demand from AI, about which the entire world is wondering whether it is sustainable or a bubble. TSMC's customers tend to be aggressive with their projections for capacity needs, for example believing they will capture additional market share. So if you add up their demand, it's too much. So what does TSMC do? "We are checking the data centers progress, the building, the location, the demand, the racks, we're checking all that to make sure that TSMC chips will not be put in inventory." With these checks and balances in place, Wei is confident AI-driven demand "is very strong all the way to probably 2029, 2030." That's about as reassuring as it gets. Follow Bits&Chips for regular updates about the high-tech industry. https://lnkd.in/eDF5HEzt

Our first keynote speaker for the Bits&Chips Event 2026 has been confirmed. We're proud to welcome Koen ten Hove, CTO of Thales Netherlands. In his keynote, "On our radar – navigating the future of defense technology," Koen will explore how AI, systems engineering and European collaboration are shaping the next generation of defense technology. And why innovation requires more than breakthrough technologies alone. Join us on 26 November  in Eindhoven for a day of insights, networking and discussions on the future of complex software and high-tech systems. 🎟️ Register here: https://lnkd.in/e6J5EdYV #BitsAndChipsEvent #DeepTech #SystemsEngineering #SoftwareEngineering #HighTech #DefenseTechnology

My colleague Paul van Gerven and I interviewed Marco Pieters five days before ASML announced its half-year results, for the Bits&Chips print special that will be published in October. We did not get detailed answers to all our questions. The timing may of course have been unfortunate, but for now I’ll assume that ASML’s chief technology officer is a diplomat by nature. So I’m not giving anything away from the interview we are going to publish when I discuss here what Pieters did not say about hybrid bonding. It was already known that ASML is seriously looking at the technology. Bits&Chips has also written about what ASML could bring to this market. I wanted to know how Pieters views die-to-wafer and wafer-to-wafer hybrid bonding. It was too early for Pieters to discuss this in detail, but I will take the liberty of speculating here. Hybrid bonding is the best way to connect chips to wafers or wafers to each other. My estimate is that ASML is still in the pre-development phase. Whether the company will actually ship systems depends on the margins it can achieve. There has to be a business opportunity. That means, roughly speaking, margins above 50 preferably 60 percent. Both die-to-wafer and wafer-to-wafer hybrid bonding are interesting for ASML. High-precision die-to-wafer bonding for logic is a major growth market. ASML’s largest customer, TSMC, completely dominates this market with systems for customers such as Apple, AMD, Broadcom and Nvidia. AI is placing ever greater demands on systems for AI accelerators and application processors. Hybrid bonding offers solutions for higher performance, lower energy consumption and the integration of optical communication through co-packaged optics. Wafer-to-wafer bonding is needed in the middle of the frontend process to enable backside power delivery, starting with the A16 (1.6 nm) generation. The current market, with around twenty equipment players, is not very attractive to ASML. But as requirements increase, so does the added value — making the market increasingly interesting for ASML. On Besi's latest Investor Day, 'Mr Hybrid' Peter Wiedner, senior VP sub-micron Die Attach at the hybrid bonding pioneer, presented an aggressive roadmap for die-to-wafer bonding. This year, it is moving to placement accuracy of 50 nanometers with bump pitches of 3 micrometers. A machine with 25-nanometer accuracy is under development, while chipmakers — read TSMC — ultimately want to move toward pitches of 1 micrometer. If ASML decides to enter the market, it then becomes a matter of timing. The company is capable of delivering highly productive precision technology that others cannot match. In the lithography market the machine builder has proven two things (with platforms for 248 nm, 193 nm, 300 mm and immersion): it is a champion of timing and it is capable of entering a market late and still win . By René Raaijmakers Picture of Marco Pieters, chief technology officer ASML