From ce9ae97da2d96eafe39d6f151bb86c292ec60fb3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 3 Mar 2011 14:17:17 -0800 Subject: [PATCH 001/411] Add Repo Notes and Merge Notes --- 00_Repo_Notes | 69 ++++++++++++++++++++++++++++++++++++++++++++++++++ 01_Merge_Notes | 0 2 files changed, 69 insertions(+) create mode 100644 00_Repo_Notes create mode 100644 01_Merge_Notes diff --git a/00_Repo_Notes b/00_Repo_Notes new file mode 100644 index 0000000000..6bfa72cd5a --- /dev/null +++ b/00_Repo_Notes @@ -0,0 +1,69 @@ + +* Repo Structure + +The msp430.git repo is located at: + +git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git (r/w) +git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git (read-only) + +The msp430.git repo on hinrg belongs to group cire-git. Users that need to +write access to this repo need to belong to the cire-git group. + +The msp430.git repo tracks the hinrg t2 git repo which in turn imports from the +main svn T2 trunk. + + +svn t2 mainline ---| + | hourly + | + v (git) +------------------ hinrg t2 ----------------------- + + master + | + | + - master_vhsb + | + | + ------ mm-z1 + | + | + --- mm-z1-next + | + | + --- mm-z1-pu + +master: is the main branch coming from the svn t2 mainline. It gets updated manually. + +master_vhsb: (vogon hyper-spatial bypass) This branch tracks master but has the superfluous + Z1 commit removed as it conflicts with the collapsed msp430 x2xxx work done in mm_core. + +mm-z1: main consolidation branch for the mm-z1 integration. It is the currently released + version of the branch. + +mm-z1-next: As changes get accepted they get brought back into -next. When all is good + next gets integrated into mm-z1. + +mm-z1-pu: proposed updates. After new code has been worked on for a bit and is ready to + be integrated with other code in the mm-z1 area, mm-z1-pu is the place to put it. + Some code from pu will go into next. When enough stuff is ready to go in next, it + is brought over to main (mm-z1). + + +To pull a working branch based on the mm-z1-pu branch (a reasonable place to fork a working +branch), do the following: + + cd ~/mm # make sure at top level, we call it mm + git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git # grab from ro place + cd msp430 + git config --add push.default matching # make sure only existing branches get pushed. + # only effects rw repos + git checkout -t origin/mm-z1-pu # start with proposed updates + git checkout -b work # local working branch + + +To start with a read-write copy of the repo replace the clone with: + + git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git # grab from ro place + +You need to have a login on hinrg and belong to group cire-git. diff --git a/01_Merge_Notes b/01_Merge_Notes new file mode 100644 index 0000000000..e69de29bb2 From cd6d8ac8d17c6b178cbea4f2bd83e614fa464cef Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 3 Mar 2011 16:45:36 -0800 Subject: [PATCH 002/411] clean up Repo_Notes --- 00_Repo_Notes | 36 ++++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/00_Repo_Notes b/00_Repo_Notes index 6bfa72cd5a..b7e5abfe2a 100644 --- a/00_Repo_Notes +++ b/00_Repo_Notes @@ -6,8 +6,8 @@ The msp430.git repo is located at: git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git (r/w) git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git (read-only) -The msp430.git repo on hinrg belongs to group cire-git. Users that need to -write access to this repo need to belong to the cire-git group. +The msp430.git repo on hinrg belongs to group cire-git. Users needing +repo write access need to belong to the cire-git group. The msp430.git repo tracks the hinrg t2 git repo which in turn imports from the main svn T2 trunk. @@ -33,32 +33,36 @@ svn t2 mainline ---| | --- mm-z1-pu -master: is the main branch coming from the svn t2 mainline. It gets updated manually. +master: is the main branch coming from the svn t2 mainline. Updated manually. -master_vhsb: (vogon hyper-spatial bypass) This branch tracks master but has the superfluous - Z1 commit removed as it conflicts with the collapsed msp430 x2xxx work done in mm_core. +master_vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main + trunk. This branch tracks master but has the superfluous Z1 commit + removed as it conflicts with the collapsed msp430 x2xxx work done in + mm_core. This collapsage forms the majority of the work of merging + the trees and there isn't much sense in reinventing the wheel. -mm-z1: main consolidation branch for the mm-z1 integration. It is the currently released - version of the branch. +mm-z1: main consolidation branch for the mm-z1 integration. It represents the + current released version of the branch. -mm-z1-next: As changes get accepted they get brought back into -next. When all is good - next gets integrated into mm-z1. +mm-z1-next: As changes get accepted they get brought back into -next. When + all is good, next gets integrated into mm-z1. -mm-z1-pu: proposed updates. After new code has been worked on for a bit and is ready to - be integrated with other code in the mm-z1 area, mm-z1-pu is the place to put it. - Some code from pu will go into next. When enough stuff is ready to go in next, it - is brought over to main (mm-z1). +mm-z1-pu: proposed updates. After new code has been worked on for a bit and + is ready to be integrated with other code in the mm-z1 area, mm-z1-pu + is the place to put it. Some code from pu will go into next. When + enough stuff is ready to go in next, it is brought over to main + (mm-z1). -To pull a working branch based on the mm-z1-pu branch (a reasonable place to fork a working -branch), do the following: +To pull a working branch based on the mm-z1-pu branch (a reasonable place to +fork a working branch), do the following: cd ~/mm # make sure at top level, we call it mm git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git # grab from ro place cd msp430 git config --add push.default matching # make sure only existing branches get pushed. # only effects rw repos - git checkout -t origin/mm-z1-pu # start with proposed updates + git checkout -t origin/mm-z1-pu # start with proposed updates, tracking branch git checkout -b work # local working branch From 978a1d9181749920b9e9b1a6ee9005cd42633ece Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 3 Mar 2011 18:49:14 -0800 Subject: [PATCH 003/411] Remove extra Z1 commit. Reverse 5446 (e50ad32) and 5445 (4496245) Compilation settings for Zolertia Z1 mote Added support to the MSP430X MCU (MSP430F2617) for Zolertia Z1 mote --- support/make/z1.target | 19 - tos/chips/msp430X/McuSleepC.nc | 137 ---- tos/chips/msp430X/adc12/AdcP.nc | 194 ------ tos/chips/msp430X/adc12/AdcReadClientC.nc | 73 -- tos/chips/msp430X/adc12/AdcReadNowClientC.nc | 78 --- .../msp430X/adc12/AdcReadStreamClientC.nc | 71 -- tos/chips/msp430X/adc12/AdcStreamP.nc | 321 --------- tos/chips/msp430X/adc12/HplAdc12.nc | 136 ---- tos/chips/msp430X/adc12/HplAdc12P.nc | 133 ---- tos/chips/msp430X/adc12/Msp430Adc12.h | 182 ----- .../adc12/Msp430Adc12ClientAutoDMAC.nc | 66 -- .../adc12/Msp430Adc12ClientAutoDMA_RVGC.nc | 74 -- .../adc12/Msp430Adc12ClientAutoRVGC.nc | 68 -- tos/chips/msp430X/adc12/Msp430Adc12ClientC.nc | 63 -- .../msp430X/adc12/Msp430Adc12ConfAlertC.nc | 51 -- tos/chips/msp430X/adc12/Msp430Adc12DMAP.nc | 196 ------ .../msp430X/adc12/Msp430Adc12DMAWireC.nc | 43 -- tos/chips/msp430X/adc12/Msp430Adc12ImplP.nc | 649 ------------------ .../msp430X/adc12/Msp430Adc12MultiChannel.nc | 108 --- .../msp430X/adc12/Msp430Adc12Overflow.nc | 56 -- tos/chips/msp430X/adc12/Msp430Adc12P.nc | 81 --- .../msp430X/adc12/Msp430Adc12SingleChannel.nc | 230 ------- .../adc12/Msp430RefVoltArbiterImplP.nc | 178 ----- .../msp430X/adc12/Msp430RefVoltArbiterP.nc | 73 -- .../msp430X/adc12/Msp430RefVoltGenerator.h | 47 -- .../msp430X/adc12/Msp430RefVoltGeneratorP.nc | 281 -------- tos/chips/msp430X/adc12/README.txt | 182 ----- tos/chips/msp430X/adc12/WireAdcStreamP.nc | 40 -- tos/chips/msp430X/dma/HplMsp430DmaC.nc | 103 --- tos/chips/msp430X/dma/HplMsp430DmaChannel.nc | 75 -- tos/chips/msp430X/dma/HplMsp430DmaControl.nc | 40 -- .../msp430X/dma/HplMsp430DmaInterrupt.nc | 29 - tos/chips/msp430X/dma/HplMsp430DmaP.nc | 121 ---- tos/chips/msp430X/dma/HplMsp430DmaXP.nc | 283 -------- tos/chips/msp430X/dma/Msp430Dma.h | 231 ------- tos/chips/msp430X/dma/Msp430DmaC.nc | 97 --- tos/chips/msp430X/dma/Msp430DmaChannel.nc | 98 --- tos/chips/msp430X/dma/Msp430DmaChannelP.nc | 149 ---- tos/chips/msp430X/dma/Msp430DmaControl.nc | 33 - tos/chips/msp430X/dma/Msp430DmaControlP.nc | 100 --- tos/chips/msp430X/msp430hardware.h | 245 ------- tos/chips/msp430X/msp430regtypes.h | 595 ---------------- tos/chips/msp430X/pins/HplMsp430GeneralIO.nc | 100 --- tos/chips/msp430X/pins/HplMsp430GeneralIOC.nc | 522 -------------- tos/chips/msp430X/pins/HplMsp430GeneralIOP.nc | 58 -- tos/chips/msp430X/pins/HplMsp430Interrupt.nc | 63 -- tos/chips/msp430X/pins/HplMsp430InterruptC.nc | 106 --- .../msp430X/pins/HplMsp430InterruptNMIC.nc | 41 -- .../msp430X/pins/HplMsp430InterruptNMIP.nc | 102 --- tos/chips/msp430X/pins/HplMsp430InterruptP.nc | 340 --------- tos/chips/msp430X/pins/Msp430GpioC.nc | 46 -- tos/chips/msp430X/pins/Msp430InterruptC.nc | 71 -- .../sensors/Msp430InternalTemperatureC.nc | 58 -- .../sensors/Msp430InternalTemperatureP.nc | 54 -- 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$(BUILD_DEPS) - @: diff --git a/tos/chips/msp430X/McuSleepC.nc b/tos/chips/msp430X/McuSleepC.nc deleted file mode 100755 index 93a7544c32..0000000000 --- a/tos/chips/msp430X/McuSleepC.nc +++ /dev/null @@ -1,137 +0,0 @@ -/* - * "Copyright (c) 2005 Stanford University. All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose, without fee, and without written - * agreement is hereby granted, provided that the above copyright - * notice, the following two paragraphs and the author appear in all - * copies of this software. - * - * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES - * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN - * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE - * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY - * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, - * ENHANCEMENTS, OR MODIFICATIONS." - * - */ - -/** - * Implementation of TEP 112 (Microcontroller Power Management) for - * the MSP430. Code for low power calculation copied from older - * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp. - * - * - * @author Philip Levis - * @author Vlado Handziski - * @author Joe Polastre - * @author Cory Sharp - * @date October 26, 2005 - * @see Please refer to TEP 112 for more information about this component and its - * intended use. - * - * Added modifications to support msp430X architecture and DXNRG - * @author Xavier Orduna - */ - -module McuSleepC @safe() { - provides { - interface McuSleep; - interface McuPowerState; - } - uses { - interface McuPowerOverride; - } -} -implementation { - bool dirty = TRUE; - mcu_power_t powerState = MSP430_POWER_ACTIVE; - - /* Note that the power values are maintained in an order - * based on their active components, NOT on their values.*/ - // NOTE: This table should be in progmem. - const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = { - 0, // ACTIVE - SR_CPUOFF, // LPM0 - SR_SCG0+SR_CPUOFF, // LPM1 - SR_SCG1+SR_CPUOFF, // LPM2 - SR_SCG1+SR_SCG0+SR_CPUOFF, // LPM3 - SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF, // LPM4 - }; - - mcu_power_t getPowerState() { - mcu_power_t pState = MSP430_POWER_LPM3; - // TimerA, USCI check - if ((((TACCTL0 & CCIE) || (TACCTL1 & CCIE) || (TACCTL2 & CCIE)) && - ((TACTL & TASSEL_3) == TASSEL_2)) || - ((UCA0CTL1 & UCSSEL_3) != UCSSEL_0) || - ((UCA1CTL1 & UCSSEL_3) != UCSSEL_0) || - ((UCB0CTL1 & UCSSEL_3) != UCSSEL_0) || - ((UCB1CTL1 & UCSSEL_3) != UCSSEL_0) - ) - pState = MSP430_POWER_LPM1; - - -#ifdef __msp430_have_adc12 - // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE - if (ADC12CTL0 & ADC12ON){ - if (ADC12CTL1 & ADC12SSEL_2){ - // sample or conversion operation with MCLK or SMCLK - if (ADC12CTL1 & ADC12SSEL_1) - pState = MSP430_POWER_LPM1; - else - pState = MSP430_POWER_ACTIVE; - } else if ((ADC12CTL1 & SHS0) && ((TACTL & TASSEL_3) == TASSEL_2)){ - // Timer A is used as sample-and-hold source and SMCLK sources Timer A - // (Timer A interrupts are always disabled when it is used by the - // ADC subsystem, that's why the Timer check above is not enough) - pState = MSP430_POWER_LPM1; - } - } -#endif - - return pState; - } - - void computePowerState() { - powerState = mcombine(getPowerState(), - call McuPowerOverride.lowestState()); - } - - async command void McuSleep.sleep() { - uint16_t temp; - if (dirty) { - computePowerState(); - //dirty = 0; - } - #ifdef DXNRG - if(powerState == MSP430_POWER_LPM1){ - dxnrg_off(DXNRG_LPM); - } - else if(powerState == MSP430_POWER_LPM3){ - dxnrg_on(DXNRG_LPM); - } - #endif - - temp = msp430PowerBits[powerState] | SR_GIE; - __asm__ __volatile__( "bis %0, r2" : : "m" (temp) ); - // All of memory may change at this point... - asm volatile ("" : : : "memory"); - __nesc_disable_interrupt(); - } - - async command void McuPowerState.update() { - atomic dirty = 1; - } - - default async command mcu_power_t McuPowerOverride.lowestState() { - return MSP430_POWER_LPM4; - } - -} diff --git a/tos/chips/msp430X/adc12/AdcP.nc b/tos/chips/msp430X/adc12/AdcP.nc deleted file mode 100644 index fe5d06433d..0000000000 --- a/tos/chips/msp430X/adc12/AdcP.nc +++ /dev/null @@ -1,194 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.8 $ - * $Date: 2008/06/27 18:05:23 $ - * @author: Jan Hauer - * ======================================================================== - */ - -module AdcP @safe() { - provides { - interface Read as Read[uint8_t client]; - interface ReadNow as ReadNow[uint8_t client]; - interface Resource as ResourceReadNow[uint8_t client]; - } - uses { - // for Read only: - interface Resource as ResourceRead[uint8_t client]; - // for ReadNow only: - interface Resource as SubResourceReadNow[uint8_t client]; - // for Read and ReadNow: - interface AdcConfigure as Config[uint8_t client]; - interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client]; - } -} -implementation -{ - enum { - STATE_READ, - STATE_READNOW, - STATE_READNOW_INVALID_CONFIG, - }; - - // Resource interface / arbiter makes norace declaration safe - norace uint8_t state; - norace uint8_t owner; - norace uint16_t value; - - error_t configure(uint8_t client) - { - error_t result = EINVAL; - const msp430adc12_channel_config_t * ONE config; - config = call Config.getConfiguration[client](); - if (config->inch != INPUT_CHANNEL_NONE) - result = call SingleChannel.configureSingle[client](config); - return result; - } - - command error_t Read.read[uint8_t client]() - { - return call ResourceRead.request[client](); - } - - event void ResourceRead.granted[uint8_t client]() - { - // signalled only for Read.read() - error_t result = configure(client); - if (result == SUCCESS){ - state = STATE_READ; - result = call SingleChannel.getData[client](); - } else { - call ResourceRead.release[client](); - signal Read.readDone[client](result, 0); - } - } - - async command error_t ResourceReadNow.request[uint8_t nowClient]() - { - return call SubResourceReadNow.request[nowClient](); - } - - event void SubResourceReadNow.granted[uint8_t nowClient]() - { - if (configure(nowClient) == SUCCESS) - state = STATE_READNOW; - else - state = STATE_READNOW_INVALID_CONFIG; - signal ResourceReadNow.granted[nowClient](); - } - - async command error_t ResourceReadNow.immediateRequest[uint8_t nowClient]() - { - error_t result = call SubResourceReadNow.immediateRequest[nowClient](); - if (result == SUCCESS){ - result = configure(nowClient); - if (result == SUCCESS) - state = STATE_READNOW; - } - return result; - } - - async command error_t ResourceReadNow.release[uint8_t nowClient]() - { - return call SubResourceReadNow.release[nowClient](); - } - - async command bool ResourceReadNow.isOwner[uint8_t nowClient]() - { - return call SubResourceReadNow.isOwner[nowClient](); - } - - async command error_t ReadNow.read[uint8_t nowClient]() - { - if (state == STATE_READNOW_INVALID_CONFIG) - return EINVAL; - else - return call SingleChannel.getData[nowClient](); - } - - void task readDone() - { - call ResourceRead.release[owner](); - signal Read.readDone[owner](SUCCESS, value); - } - - async event error_t SingleChannel.singleDataReady[uint8_t client](uint16_t data) - { - switch (state) - { - case STATE_READ: - owner = client; - value = data; - post readDone(); - break; - case STATE_READNOW: - signal ReadNow.readDone[client](SUCCESS, data); - break; - default: - // error ! - break; - } - return SUCCESS; - } - - async event uint16_t* SingleChannel.multipleDataReady[uint8_t client]( - uint16_t *buf, uint16_t numSamples) - { - // error ! - return 0; - } - - default async command error_t ResourceRead.request[uint8_t client]() { return FAIL; } - default async command error_t ResourceRead.immediateRequest[uint8_t client]() { return FAIL; } - default async command error_t ResourceRead.release[uint8_t client]() { return FAIL; } - default async command bool ResourceRead.isOwner[uint8_t client]() { return FALSE; } - default event void Read.readDone[uint8_t client]( error_t result, uint16_t val ){} - - default async command error_t SubResourceReadNow.release[uint8_t nowClient](){ return FAIL;} - default async command error_t SubResourceReadNow.request[uint8_t nowClient](){ return FAIL; } - default async command bool SubResourceReadNow.isOwner[uint8_t client]() { return FALSE; } - default event void ResourceReadNow.granted[uint8_t nowClient](){} - default async event void ReadNow.readDone[uint8_t client]( error_t result, uint16_t val ){} - default async command error_t SubResourceReadNow.immediateRequest[uint8_t nowClient]() { return FAIL; } - default async command error_t SingleChannel.getData[uint8_t client]() - { - return EINVAL; - } - - const msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; - default async command const msp430adc12_channel_config_t* - Config.getConfiguration[uint8_t client]() - { - return &defaultConfig; - } - default async command error_t SingleChannel.configureSingle[uint8_t client]( - const msp430adc12_channel_config_t *config){ return FAIL; } - -} diff --git a/tos/chips/msp430X/adc12/AdcReadClientC.nc b/tos/chips/msp430X/adc12/AdcReadClientC.nc deleted file mode 100644 index 35a8fa6ebc..0000000000 --- a/tos/chips/msp430X/adc12/AdcReadClientC.nc +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.4 $ - * $Date: 2006/12/12 18:23:06 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * This component virtualizes the HIL of ADC12 on MSP430. A client must wire - * AdcConfigure to a component that returns the client's adc - * configuration data. - * - * @author Jan Hauer - * @see Please refer to the README.txt and TEP 101 for more information about - * this component and its intended use. - */ - -#include -generic configuration AdcReadClientC() { - provides interface Read; - uses interface AdcConfigure; -} implementation { - components AdcP, -#ifdef REF_VOLT_AUTO_CONFIGURE - // if the client configuration requires a stable - // reference voltage, the reference voltage generator - // is automatically enabled - new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient; -#else - new Msp430Adc12ClientC() as Msp430AdcClient; -#endif - - enum { - CLIENT = unique(ADCC_SERVICE), - }; - - Read = AdcP.Read[CLIENT]; - AdcConfigure = AdcP.Config[CLIENT]; - AdcP.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel; - AdcP.ResourceRead[CLIENT] -> Msp430AdcClient.Resource; -#ifdef REF_VOLT_AUTO_CONFIGURE - AdcConfigure = Msp430AdcClient.AdcConfigure; -#endif -} - diff --git a/tos/chips/msp430X/adc12/AdcReadNowClientC.nc b/tos/chips/msp430X/adc12/AdcReadNowClientC.nc deleted file mode 100644 index 01618eb707..0000000000 --- a/tos/chips/msp430X/adc12/AdcReadNowClientC.nc +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.4 $ - * $Date: 2006/12/12 18:23:07 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * This component virtualizes the HIL of ADC12 on MSP430. A client must wire - * AdcConfigure to a component that returns the client's adc - * configuration data. - * - * @author Jan Hauer - * @see Please refer to the README.txt and TEP 101 for more information about - * this component and its intended use. - */ - -#include -generic configuration AdcReadNowClientC() { - provides { - interface Resource; - interface ReadNow; - } - uses interface AdcConfigure; -} implementation { - components AdcP, -#ifdef REF_VOLT_AUTO_CONFIGURE - // if the client configuration requires a stable - // reference voltage, the reference voltage generator - // is automatically enabled - new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient; -#else - new Msp430Adc12ClientC() as Msp430AdcClient; -#endif - - enum { - CLIENT = unique(ADCC_SERVICE), - }; - - ReadNow = AdcP.ReadNow[CLIENT]; - AdcConfigure = AdcP.Config[CLIENT]; - AdcP.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel; - Resource = AdcP.ResourceReadNow[CLIENT]; - - AdcP.SubResourceReadNow[CLIENT] -> Msp430AdcClient.Resource; -#ifdef REF_VOLT_AUTO_CONFIGURE - AdcConfigure = Msp430AdcClient.AdcConfigure; -#endif -} - diff --git a/tos/chips/msp430X/adc12/AdcReadStreamClientC.nc b/tos/chips/msp430X/adc12/AdcReadStreamClientC.nc deleted file mode 100644 index c15cc52982..0000000000 --- a/tos/chips/msp430X/adc12/AdcReadStreamClientC.nc +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2008/04/07 09:41:55 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * This component virtualizes the HIL of ADC12 on MSP430. A client must wire - * AdcConfigure to a component that returns the client's adc - * configuration data. - * - * @author Jan Hauer - * @see Please refer to the README.txt and TEP 101 for more information about - * this component and its intended use. - */ - -#include -generic configuration AdcReadStreamClientC() { - provides interface ReadStream; - uses interface AdcConfigure; -} implementation { - components WireAdcStreamP, -#ifdef REF_VOLT_AUTO_CONFIGURE - // if the client configuration requires a stable - // reference voltage, the reference voltage generator - // is automatically enabled - new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient; - AdcConfigure = Msp430AdcClient.AdcConfigure; -#else - new Msp430Adc12ClientC() as Msp430AdcClient; -#endif - - enum { - RSCLIENT = unique(ADCC_READ_STREAM_SERVICE), - }; - - ReadStream = WireAdcStreamP.ReadStream[RSCLIENT]; - AdcConfigure = WireAdcStreamP.AdcConfigure[RSCLIENT]; - WireAdcStreamP.Resource[RSCLIENT] -> Msp430AdcClient.Resource; - WireAdcStreamP.Msp430Adc12SingleChannel[RSCLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel; -} - diff --git a/tos/chips/msp430X/adc12/AdcStreamP.nc b/tos/chips/msp430X/adc12/AdcStreamP.nc deleted file mode 100644 index ca35ed3469..0000000000 --- a/tos/chips/msp430X/adc12/AdcStreamP.nc +++ /dev/null @@ -1,321 +0,0 @@ -/* $Id: AdcStreamP.nc,v 1.5 2008/06/25 16:36:29 regehr Exp $ - * Copyright (c) 2005 Intel Corporation - * All rights reserved. - * - * This file is distributed under the terms in the attached INTEL-LICENSE - * file. If you do not find these files, copies can be found by writing to - * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, - * 94704. Attention: Intel License Inquiry. - * - * Copyright (c) 2004, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Convert MSP430 HAL A/D interface to the HIL interfaces (adapted atmega code). - * @author David Gay - * @author Jan Hauer - */ -#include "Timer.h" - -module AdcStreamP @safe() { - provides { - interface Init @atleastonce(); - interface ReadStream[uint8_t client]; - } - uses { - interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client]; - interface AdcConfigure[uint8_t client]; - interface Alarm; - } -} -implementation { - enum { - NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE) - }; - - /* Resource reservation is required, and it's incorrect to call getData - again before dataReady is signaled, so there are no races in correct - programs */ - norace uint8_t client = NSTREAM; - - /* Stream data */ - struct list_entry_t { - uint16_t count; - struct list_entry_t * ONE_NOK next; - }; - struct list_entry_t *bufferQueue[NSTREAM]; - struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM]; - uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount; - - norace uint16_t count; - norace uint16_t * COUNT_NOK(count) buffer; - norace uint16_t * BND_NOK(buffer, buffer+count) pos; - norace uint32_t now, period; - norace bool periodModified; - - - command error_t Init.init() { - uint8_t i; - - for (i = 0; i != NSTREAM; i++) - bufferQueueEnd[i] = &bufferQueue[i]; - - return SUCCESS; - } - - void sampleSingle() { - call SingleChannel.getData[client](); - } - - command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) { - if (n < sizeof(struct list_entry_t)) - return ESIZE; - atomic - { - struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf); - - if (!bufferQueueEnd[c]) // Can't post right now. - return FAIL; - - newEntry->count = n; - newEntry->next = NULL; - *bufferQueueEnd[c] = newEntry; - bufferQueueEnd[c] = &newEntry->next; - } - return SUCCESS; - } - - task void readStreamDone() { - uint8_t c = client; - uint32_t actualPeriod = period; - if (periodModified) - actualPeriod = period - (period % 1000); - - atomic - { - bufferQueue[c] = NULL; - bufferQueueEnd[c] = &bufferQueue[c]; - } - - client = NSTREAM; - signal ReadStream.readDone[c](SUCCESS, actualPeriod); - } - - task void readStreamFail() { - /* By now, the pending bufferDone has been signaled (see readStream). */ - struct list_entry_t *entry; - uint8_t c = client; - - atomic entry = bufferQueue[c]; - for (; entry; entry = entry->next) { - uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count; - signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count); - } - - atomic - { - bufferQueue[c] = NULL; - bufferQueueEnd[c] = &bufferQueue[c]; - } - - client = NSTREAM; - signal ReadStream.readDone[c](FAIL, 0); - } - - task void bufferDone() { - uint16_t *b, c; - atomic - { - b = lastBuffer; - c = lastCount; - lastBuffer = NULL; - } - - signal ReadStream.bufferDone[client](SUCCESS, b, c); - } - - void nextAlarm() { - call Alarm.startAt(now, period); - now += period; - } - - async event void Alarm.fired() { - sampleSingle(); - } - - error_t nextBuffer(bool startNextAlarm) { - atomic - { - struct list_entry_t *entry = bufferQueue[client]; - - if (!entry) - { - // all done - bufferQueueEnd[client] = NULL; // prevent post - post readStreamDone(); - return FAIL; - } - else - { - uint16_t tmp_count; - bufferQueue[client] = entry->next; - if (!bufferQueue[client]) - bufferQueueEnd[client] = &bufferQueue[client]; - pos = buffer = NULL; - count = entry->count; - tmp_count = count; - pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry); - if (startNextAlarm) - nextAlarm(); - return SUCCESS; - } - } - } - - void nextMultiple(uint8_t c) - { - if (nextBuffer(FALSE) == SUCCESS){ - msp430adc12_channel_config_t config = *call AdcConfigure.getConfiguration[c](); - config.sampcon_ssel = SAMPCON_SOURCE_SMCLK; // assumption: SMCLK runs at 1 MHz - config.sampcon_id = SAMPCON_CLOCK_DIV_1; - call SingleChannel.configureMultiple[c]( &config, pos, count, period); - call SingleChannel.getData[c](); - } - } - - command error_t ReadStream.read[uint8_t c](uint32_t usPeriod) - { - if (usPeriod & 0xFFFF0000){ - // "manual" sampling - period = usPeriod / 1000; - periodModified = TRUE; - client = c; - now = call Alarm.getNow(); - call SingleChannel.configureSingle[c](call AdcConfigure.getConfiguration[c]()); - if (nextBuffer(FALSE) == SUCCESS) - sampleSingle(); - } else { - period = usPeriod; - periodModified = FALSE; - client = c; - nextMultiple(c); - } - return SUCCESS; - } - - - async event error_t SingleChannel.singleDataReady[uint8_t streamClient](uint16_t data) - { - if (client == NSTREAM) - return FAIL; - - if (count == 0) - { - now = call Alarm.getNow(); - nextBuffer(TRUE); - } - else - { - *pos++ = data; - if (pos == buffer + count) - { - atomic - { - if (lastBuffer) - { - /* We failed to signal bufferDone in time. Fail. */ - bufferQueueEnd[client] = NULL; // prevent post - post readStreamFail(); - return FAIL; - } - else - { - lastCount = count; - lastBuffer = buffer; - } - } - post bufferDone(); - nextBuffer(TRUE); - } - else - nextAlarm(); - } - return FAIL; - } - - async event uint16_t* SingleChannel.multipleDataReady[uint8_t streamClient]( - uint16_t *buf, uint16_t length) - { - atomic - { - if (lastBuffer) - { - /* We failed to signal bufferDone in time. Fail. */ - bufferQueueEnd[client] = NULL; // prevent post - post readStreamFail(); - return 0; - } - else - { - lastBuffer = buffer; - lastCount = pos - buffer; - } - } - post bufferDone(); - nextMultiple(streamClient); - return 0; - } - - const msp430adc12_channel_config_t defaultConfig = { - inch: SUPPLY_VOLTAGE_HALF_CHANNEL, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_1_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - default async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration[uint8_t c]() - { - return &defaultConfig; - } - default async command error_t SingleChannel.configureMultiple[uint8_t c]( - const msp430adc12_channel_config_t *config, uint16_t b[], - uint16_t numSamples, uint16_t jiffies) - { - return FAIL; - } - default async command error_t SingleChannel.getData[uint8_t c]() - { - return FAIL; - } - default async command error_t SingleChannel.configureSingle[uint8_t c]( - const msp430adc12_channel_config_t *config){ return FAIL; } -} diff --git a/tos/chips/msp430X/adc12/HplAdc12.nc b/tos/chips/msp430X/adc12/HplAdc12.nc deleted file mode 100644 index 86866f6ee8..0000000000 --- a/tos/chips/msp430X/adc12/HplAdc12.nc +++ /dev/null @@ -1,136 +0,0 @@ -/* - * Copyright (c) 2004, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2008/05/22 17:45:00 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * The HplAdc12 interface exports low-level access to the ADC12 registers - * of the MSP430 MCU. - * - * @author Jan Hauer - * @see Please refer to TEP 101 for more information about this component and its - * intended use. - */ -#include -interface HplAdc12 -{ - /** - * Sets the ADC12 control register ADC12CTL0. - * @param control0 ADC12CTL0 register data. - **/ - async command void setCtl0(adc12ctl0_t control0); - - /** - * Sets the ADC12 control register ADC12CTL1. - * @param control1 ADC12CTL1 register data. - **/ - async command void setCtl1(adc12ctl1_t control1); - - /** - * Returns the ADC12 control register ADC12CTL0. - * @return ADC12CTL0 - **/ - async command adc12ctl0_t getCtl0(); - - /** Returns the ADC12 control register ADC12CTL1. - * @return ADC12CTL1 - **/ - async command adc12ctl1_t getCtl1(); - - /** - * Sets the ADC12 conversion memory control register ADC12MCTLx. - * @param idx The register index (the 'x' in ADC12MCTLx) [0..15] - * @param memControl ADC12MCTLx register data. - */ - async command void setMCtl(uint8_t idx, adc12memctl_t memControl); - - /** - * Returns the ADC12 conversion memory control register ADC12MCTLx. - * @param idx The register index (the 'x' in ADC12MCTLx) [0..15] - * @return memControl ADC12MCTLx register data. - */ - async command adc12memctl_t getMCtl(uint8_t idx); - - /** - * Returns the ADC12 conversion memory register ADC12MEMx. - * @param idx The register index (the 'x' in ADC12MEMx) [0..15] - * @return ADC12MEMx - */ - async command uint16_t getMem(uint8_t idx); - - /** - * Sets the ADC12 interrupt enable register, ADC12IE. - * @param mask Bitmask (0 means interrupt disabled, 1 menas interrupt enabled) - */ - async command void setIEFlags(uint16_t mask); - - /** - * Returns the ADC12 interrupt enable register, ADC12IE. - * @return ADC12IE - */ - async command uint16_t getIEFlags(); - - /** - * Resets the ADC12 interrupt flag register, ADC12IFG. - */ - async command void resetIFGs(); - - /** - * Signals a conversion result. - * @param iv ADC12 interrupt vector value 0x6, 0x8, ... , 0x24 - */ - async event void conversionDone(uint16_t iv); - - /** - * Returns the ADC12 BUSY flag. - * @return ADC12BUSY - */ - async command bool isBusy(); - - /** - * Stops a conversion. - */ - async command void stopConversion(); - - /** - * Starts a conversion. - */ - async command void startConversion(); - - /** - * Enables conversion (sets the ENC bit). - */ - async command void enableConversion(); - -} - diff --git a/tos/chips/msp430X/adc12/HplAdc12P.nc b/tos/chips/msp430X/adc12/HplAdc12P.nc deleted file mode 100644 index 5bcdad5eda..0000000000 --- a/tos/chips/msp430X/adc12/HplAdc12P.nc +++ /dev/null @@ -1,133 +0,0 @@ -/* - * Copyright (c) 2004, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.8 $ - * $Date: 2008/06/20 10:30:28 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * The HplAdc12 interface exports low-level access to the ADC12 registers - * of the MSP430 MCU. - * - * @author Jan Hauer - * @see Please refer to TEP 101 for more information about this component and its - * intended use. - */ - -module HplAdc12P { - provides interface HplAdc12; -} -implementation -{ - - MSP430REG_NORACE(ADC12CTL0); - MSP430REG_NORACE(ADC12CTL1); - MSP430REG_NORACE(ADC12IFG); - MSP430REG_NORACE(ADC12IE); - MSP430REG_NORACE(ADC12IV); - - // SFRs are accessed directly or cast to a pointer, both works fine - // (we don't access all SFRs directly, because that would result in - // much higher memory footprint) - - async command void HplAdc12.setCtl0(adc12ctl0_t control0){ - ADC12CTL0 = *((uint16_t*) &control0); - } - - async command void HplAdc12.setCtl1(adc12ctl1_t control1){ - ADC12CTL1 = *((uint16_t*) &control1); - } - - async command adc12ctl0_t HplAdc12.getCtl0(){ - return *((adc12ctl0_t*) &ADC12CTL0); - } - - async command adc12ctl1_t HplAdc12.getCtl1(){ - return *((adc12ctl1_t*) &ADC12CTL1); - } - - async command void HplAdc12.setMCtl(uint8_t i, adc12memctl_t memControl){ - uint8_t *memCtlPtr = (uint8_t*) ADC12MCTL; - memCtlPtr += i; - *memCtlPtr = *(uint8_t*)&memControl; - } - - async command adc12memctl_t HplAdc12.getMCtl(uint8_t i){ - adc12memctl_t x = {inch: 0, sref: 0, eos: 0 }; - uint8_t *memCtlPtr = (uint8_t*) ADC12MCTL; - memCtlPtr += i; - x = *(adc12memctl_t*) memCtlPtr; - return x; - } - - async command uint16_t HplAdc12.getMem(uint8_t i){ - return *((uint16_t*) ADC12MEM + i); - } - - async command void HplAdc12.setIEFlags(uint16_t mask){ ADC12IE = mask; } - async command uint16_t HplAdc12.getIEFlags(){ return (uint16_t) ADC12IE; } - - async command void HplAdc12.resetIFGs(){ - ADC12IV = 0; - ADC12IFG = 0; - } - - async command void HplAdc12.startConversion(){ - ADC12CTL0 |= ADC12ON; - ADC12CTL0 |= (ADC12SC + ENC); - } - - async command void HplAdc12.stopConversion(){ - // stop conversion mode immediately, conversion data is unreliable - uint16_t ctl1 = ADC12CTL1; - ADC12CTL1 &= ~(CONSEQ0 | CONSEQ1); - ADC12CTL0 &= ~(ADC12SC + ENC); - ADC12CTL0 &= ~(ADC12ON); - ADC12CTL1 |= (ctl1 & (CONSEQ0 | CONSEQ1)); - } - - async command void HplAdc12.enableConversion(){ - ADC12CTL0 |= ENC; - } - - async command bool HplAdc12.isBusy(){ return ADC12CTL1 & ADC12BUSY; } - - TOSH_SIGNAL(ADC_VECTOR) { - #ifdef DXNRG - dxnrg_on(DXNRG_IRQ); - #endif - signal HplAdc12.conversionDone(ADC12IV); - #ifdef DXNRG - dxnrg_off(DXNRG_IRQ); - #endif - } -} - diff --git a/tos/chips/msp430X/adc12/Msp430Adc12.h b/tos/chips/msp430X/adc12/Msp430Adc12.h deleted file mode 100644 index 54a9e462a2..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12.h +++ /dev/null @@ -1,182 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2007/06/25 15:47:14 $ - * @author: Jan Hauer - * ======================================================================== - */ - -#ifndef MSP430ADC12_H -#define MSP430ADC12_H -#include "Msp430RefVoltGenerator.h" - -//#define ADC12_TIMERA_ENABLED -#define ADC12_P6PIN_AUTO_CONFIGURE -#define ADC12_CHECK_ARGS -//#define ADC12_ONLY_WITH_DMA - -// for HIL clients -#define REF_VOLT_AUTO_CONFIGURE - -typedef struct { - // see README.txt - unsigned int inch: 4; // input channel - unsigned int sref: 3; // reference voltage - unsigned int ref2_5v: 1; // reference voltage level - unsigned int adc12ssel: 2; // clock source sample-hold-time - unsigned int adc12div: 3; // clock divider sample-hold-time - unsigned int sht: 4; // sample-hold-time - unsigned int sampcon_ssel: 2; // clock source sampcon signal - unsigned int sampcon_id: 2; // clock divider sampcon - unsigned int : 0; // align to a word boundary -} msp430adc12_channel_config_t; - -typedef struct -{ - // see README.txt - volatile unsigned - inch: 4, // input channel - sref: 3, // reference voltage - eos: 1; // end of sequence flag -} __attribute__ ((packed)) adc12memctl_t; - -enum inch_enum -{ - // see device specific data sheet which pin Ax is mapped to - INPUT_CHANNEL_A0 = 0, // input channel A0 - INPUT_CHANNEL_A1 = 1, // input channel A1 - INPUT_CHANNEL_A2 = 2, // input channel A2 - INPUT_CHANNEL_A3 = 3, // input channel A3 - INPUT_CHANNEL_A4 = 4, // input channel A4 - INPUT_CHANNEL_A5 = 5, // input channel A5 - INPUT_CHANNEL_A6 = 6, // input channel A6 - INPUT_CHANNEL_A7 = 7, // input channel A7 - EXTERNAL_REF_VOLTAGE_CHANNEL = 8, // VeREF+ (input channel 8) - REF_VOLTAGE_NEG_TERMINAL_CHANNEL = 9, // VREF-/VeREF- (input channel 9) - TEMPERATURE_DIODE_CHANNEL = 10, // Temperature diode (input channel 10) - SUPPLY_VOLTAGE_HALF_CHANNEL = 11, // (AVcc-AVss)/2 (input channel 11-15) - INPUT_CHANNEL_NONE = 12 // illegal (identifies invalid settings) -}; - -enum sref_enum -{ - REFERENCE_AVcc_AVss = 0, // VR+ = AVcc and VR-= AVss - REFERENCE_VREFplus_AVss = 1, // VR+ = VREF+ and VR-= AVss - REFERENCE_VeREFplus_AVss = 2, // VR+ = VeREF+ and VR-= AVss - REFERENCE_AVcc_VREFnegterm = 4, // VR+ = AVcc and VR-= VREF-/VeREF- - REFERENCE_VREFplus_VREFnegterm = 5, // VR+ = VREF+ and VR-= VREF-/VeREF- - REFERENCE_VeREFplus_VREFnegterm = 6 // VR+ = VeREF+ and VR-= VREF-/VeREF- -}; - -enum ref2_5v_enum -{ - REFVOLT_LEVEL_1_5 = 0, // reference voltage of 1.5 V - REFVOLT_LEVEL_2_5 = 1, // reference voltage of 2.5 V - REFVOLT_LEVEL_NONE = 0, // if e.g. AVcc is chosen -}; - -enum adc12ssel_enum -{ - SHT_SOURCE_ADC12OSC = 0, // ADC12OSC - SHT_SOURCE_ACLK = 1, // ACLK - SHT_SOURCE_MCLK = 2, // MCLK - SHT_SOURCE_SMCLK = 3 // SMCLK -}; - -enum adc12div_enum -{ - SHT_CLOCK_DIV_1 = 0, // ADC12 clock divider of 1 - SHT_CLOCK_DIV_2 = 1, // ADC12 clock divider of 2 - SHT_CLOCK_DIV_3 = 2, // ADC12 clock divider of 3 - SHT_CLOCK_DIV_4 = 3, // ADC12 clock divider of 4 - SHT_CLOCK_DIV_5 = 4, // ADC12 clock divider of 5 - SHT_CLOCK_DIV_6 = 5, // ADC12 clock divider of 6 - SHT_CLOCK_DIV_7 = 6, // ADC12 clock divider of 7 - SHT_CLOCK_DIV_8 = 7, // ADC12 clock divider of 8 -}; - -enum sht_enum -{ - SAMPLE_HOLD_4_CYCLES = 0, // sampling duration is 4 clock cycles - SAMPLE_HOLD_8_CYCLES = 1, // ... - SAMPLE_HOLD_16_CYCLES = 2, - SAMPLE_HOLD_32_CYCLES = 3, - SAMPLE_HOLD_64_CYCLES = 4, - SAMPLE_HOLD_96_CYCLES = 5, - SAMPLE_HOLD_123_CYCLES = 6, - SAMPLE_HOLD_192_CYCLES = 7, - SAMPLE_HOLD_256_CYCLES = 8, - SAMPLE_HOLD_384_CYCLES = 9, - SAMPLE_HOLD_512_CYCLES = 10, - SAMPLE_HOLD_768_CYCLES = 11, - SAMPLE_HOLD_1024_CYCLES = 12 -}; - -enum sampcon_ssel_enum -{ - SAMPCON_SOURCE_TACLK = 0, // Timer A clock source is (external) TACLK - SAMPCON_SOURCE_ACLK = 1, // Timer A clock source ACLK - SAMPCON_SOURCE_SMCLK = 2, // Timer A clock source SMCLK - SAMPCON_SOURCE_INCLK = 3, // Timer A clock source is (external) INCLK -}; - -enum sampcon_id_enum -{ - SAMPCON_CLOCK_DIV_1 = 0, // SAMPCON clock divider of 1 - SAMPCON_CLOCK_DIV_2 = 1, // SAMPCON clock divider of 2 - SAMPCON_CLOCK_DIV_3 = 2, // SAMPCON clock divider of 3 - SAMPCON_CLOCK_DIV_4 = 3, // SAMPCON clock divider of 4 -}; - -// The unique string for allocating ADC resource interfaces -#define MSP430ADC12_RESOURCE "Msp430Adc12C.Resource" - -// The unique string for accessing HAL2 -#define ADCC_SERVICE "AdcC.Service" - -// The unique string for accessing HAL2 via ReadStream -#define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client" - -/* Test for GCC bug (bitfield access) - only version 3.2.3 is known to be stable */ -// TODO: check whether this is still relevant... -#define GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__ * 10 + __GNUC_PATCHLEVEL__) -#if GCC_VERSION == 332 -#error "The msp430-gcc version (3.3.2) contains a bug which results in false accessing \ -of bitfields in structs and makes MSP430ADC12M.nc fail ! Use version 3.2.3 instead." -#elif GCC_VERSION != 323 -#warning "This version of msp430-gcc might contain a bug which results in false accessing \ -of bitfields in structs (MSP430ADC12M.nc would fail). Use version 3.2.3 instead." -#endif - -#ifndef __msp430_have_adc12 -#error MSP430ADC12C: Target msp430 device does not have ADC12 module -#endif - -#endif diff --git a/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoDMAC.nc b/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoDMAC.nc deleted file mode 100644 index 9dc716ca9d..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoDMAC.nc +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.7 $ - * $Date: 2008/06/11 00:42:13 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * This component virtualizes access to the HAL of the MSP430 ADC12. ADC - * conversion results are copied using DMA. - * - * @author Jan Hauer - * - * @see Please refer to the README.txt and TEP 101 for more information about - * this component and its intended use. - */ -#include -generic configuration Msp430Adc12ClientAutoDMAC() -{ - provides { - interface Resource; - interface Msp430Adc12SingleChannel; - interface Msp430Adc12Overflow; - } -} implementation { - components Msp430DmaC, Msp430Adc12DMAP, Msp430Adc12P, Msp430Adc12DMAWireC; - - enum { - ID = unique(MSP430ADC12_RESOURCE), - }; - Resource = Msp430Adc12P.Resource[ID]; - Msp430Adc12SingleChannel = Msp430Adc12DMAP.SingleChannel[ID]; - Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID]; - - Msp430Adc12DMAP.SubSingleChannel[ID] -> Msp430Adc12P.SingleChannel[ID]; - Msp430Adc12DMAP.AsyncAdcControl[ID] -> Msp430Adc12P.DMAExtension[ID]; - -} diff --git a/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoDMA_RVGC.nc b/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoDMA_RVGC.nc deleted file mode 100644 index 12d15abbd6..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoDMA_RVGC.nc +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - Redistributions in - * binary form must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - Neither the name of the - * Technische Universitaet Berlin nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.8 $ $Date: 2008/06/11 00:42:13 $ @author: Jan Hauer - * - * ======================================================================== - */ - - -/** - * This component virtualizes access to the HAL of the MSP430 ADC12. ADC - * conversion results are copied using DMA and reference voltage is enabled as - * required by the configuration. - * - * @author Jan Hauer - * - * @see Please refer to the README.txt and TEP 101 for more information about - * this component and its intended use. - */ -#include -generic configuration Msp430Adc12ClientAutoDMA_RVGC() -{ - provides { - interface Resource; - interface Msp430Adc12SingleChannel; - interface Msp430Adc12Overflow; - } - uses interface AdcConfigure; -} implementation { - components Msp430Adc12P, Msp430RefVoltArbiterP, Msp430Adc12DMAWireC; - - enum { - ID = unique(MSP430ADC12_RESOURCE), - }; - Resource = Msp430RefVoltArbiterP.ClientResource[ID]; - Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID]; - - Msp430RefVoltArbiterP.AdcResource[ID] -> Msp430Adc12P.Resource[ID]; - - components new Msp430Adc12ConfAlertC(); - AdcConfigure = Msp430Adc12ConfAlertC.ConfUp; - Msp430RefVoltArbiterP.Config[ID] -> Msp430Adc12ConfAlertC.ConfSub; - - components Msp430DmaC, Msp430Adc12DMAP; - - Msp430Adc12SingleChannel = Msp430Adc12DMAP.SingleChannel[ID]; - - Msp430Adc12DMAP.SubSingleChannel[ID] -> Msp430Adc12P.SingleChannel[ID]; - Msp430Adc12DMAP.AsyncAdcControl[ID] -> Msp430Adc12P.DMAExtension[ID]; -} diff --git a/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoRVGC.nc b/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoRVGC.nc deleted file mode 100644 index a6ded1c613..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12ClientAutoRVGC.nc +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - Redistributions in - * binary form must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - Neither the name of the - * Technische Universitaet Berlin nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.8 $ $Date: 2008/06/11 00:42:13 $ @author: Jan Hauer - * - * ======================================================================== - */ - -/** - * This component virtualizes access to the HAL of the MSP430 ADC12. - * Reference voltage is enabled automatically as required by the configuration. - * - * @author Jan Hauer - * - * @see Please refer to the README.txt and TEP 101 for more information about - * this component and its intended use. - */ -#include -generic configuration Msp430Adc12ClientAutoRVGC() -{ - provides { - interface Resource; - interface Msp430Adc12SingleChannel; - interface Msp430Adc12MultiChannel; - interface Msp430Adc12Overflow; - } - uses interface AdcConfigure; -} implementation { - components Msp430Adc12P, Msp430RefVoltArbiterP; - - enum { - ID = unique(MSP430ADC12_RESOURCE), - }; - Resource = Msp430RefVoltArbiterP.ClientResource[ID]; - Msp430Adc12SingleChannel = Msp430Adc12P.SingleChannel[ID]; - Msp430Adc12MultiChannel = Msp430Adc12P.MultiChannel[ID]; - Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID]; - - Msp430RefVoltArbiterP.AdcResource[ID] -> Msp430Adc12P.Resource[ID]; - - components new Msp430Adc12ConfAlertC(); - AdcConfigure = Msp430Adc12ConfAlertC.ConfUp; - Msp430RefVoltArbiterP.Config[ID] -> Msp430Adc12ConfAlertC.ConfSub; -} diff --git a/tos/chips/msp430X/adc12/Msp430Adc12ClientC.nc b/tos/chips/msp430X/adc12/Msp430Adc12ClientC.nc deleted file mode 100644 index 7e6b135468..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12ClientC.nc +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.6 $ - * $Date: 2008/06/11 00:42:13 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * This component virtualizes access to the HAL of the MSP430 ADC12. - * - * @author Jan Hauer - * - * @see Please refer to the README.txt and TEP 101 for more information about - * this component and its intended use. - */ -#include -generic configuration Msp430Adc12ClientC() -{ - provides { - interface Resource; - interface Msp430Adc12SingleChannel; - interface Msp430Adc12MultiChannel; - interface Msp430Adc12Overflow; - } -} implementation { - components Msp430Adc12P; - - enum { - ID = unique(MSP430ADC12_RESOURCE), - }; - Resource = Msp430Adc12P.Resource[ID]; - Msp430Adc12SingleChannel = Msp430Adc12P.SingleChannel[ID]; - Msp430Adc12MultiChannel = Msp430Adc12P.MultiChannel[ID]; - Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID]; -} diff --git a/tos/chips/msp430X/adc12/Msp430Adc12ConfAlertC.nc b/tos/chips/msp430X/adc12/Msp430Adc12ConfAlertC.nc deleted file mode 100644 index 15db6df904..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12ConfAlertC.nc +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - Redistributions in - * binary form must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - Neither the name of the - * Technische Universitaet Berlin nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.2 $ $Date: 2008/06/11 00:42:13 $ @author: Jan Hauer - * - * ======================================================================== - */ - -/** - * The only purpose of this component is to generate a nesC warning - * if someone has wired to Msp430Adc12ClientAutoRVGC or - * Msp430Adc12ClientAutoDMA_RVGC and forgotten to wire to AdcConfigure. - * (nesC optimizes all of its code away). - * - * @author: Jan Hauer - */ -#include -generic module Msp430Adc12ConfAlertC() -{ - provides interface AdcConfigure as ConfSub; - uses interface AdcConfigure as ConfUp; -} implementation { - async command const msp430adc12_channel_config_t* ConfSub.getConfiguration() - { - return call ConfUp.getConfiguration(); - } -} diff --git a/tos/chips/msp430X/adc12/Msp430Adc12DMAP.nc b/tos/chips/msp430X/adc12/Msp430Adc12DMAP.nc deleted file mode 100644 index 1286ae0a13..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12DMAP.nc +++ /dev/null @@ -1,196 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2008/06/23 20:25:15 $ - * @author: Jan Hauer - * ======================================================================== - */ - -#include -#include -module Msp430Adc12DMAP @safe() -{ - provides { - interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; - } - uses { - interface Msp430DmaControl as DMAControl; - interface Msp430DmaChannel as DMAChannel; - interface Msp430Adc12SingleChannel as SubSingleChannel[uint8_t id]; - interface AsyncStdControl as AsyncAdcControl[uint8_t id]; - } -} -implementation -{ - enum { - MULTIPLE_SINGLE, - MULTIPLE_REPEAT, - MULTIPLE_SINGLE_AGAIN, - }; - - // norace declarations are safe here, because Msp430Adc12P.nc implements - // a lock mechanism which guarantees that no two clients can access the ADC - // and the module variables below are only changed after the lock was acquired - norace uint8_t client; - norace uint8_t mode; - norace uint16_t *buffer; - norace uint16_t numSamples; - - async command error_t SingleChannel.configureSingle[uint8_t id]( - const msp430adc12_channel_config_t *config) - { - // don't use DMA for single conversions - return call SubSingleChannel.configureSingle[id](config); - } - - async command error_t SingleChannel.configureSingleRepeat[uint8_t id]( - const msp430adc12_channel_config_t *config, - uint16_t jiffies) - { - // don't use DMA for single conversions - return call SubSingleChannel.configureSingleRepeat[id](config, jiffies); - } - - error_t configure(uint8_t id, const msp430adc12_channel_config_t *config, - uint16_t *buf, uint16_t length, uint16_t jiffies, uint8_t _mode) - { - // for multiple samples single-channel repat-conversion mode - // is used, because then there is only one interrupt at the - // the end of the whole sequence and DMA has done all the copying - error_t result = call SubSingleChannel.configureSingleRepeat[id](config, jiffies); - if (result == SUCCESS){ - call DMAControl.init(); - call DMAControl.setFlags(ENABLE_NMI, NOT_ROUND_ROBIN, ON_FETCH); - call DMAChannel.setupTransfer( - DMA_REPEATED_SINGLE_TRANSFER, - DMA_TRIGGER_ADC12IFGx, - DMA_EDGE_SENSITIVE, - ADC12MEM, - buf, - length, - DMA_WORD, - DMA_WORD, - DMA_ADDRESS_UNCHANGED, - DMA_ADDRESS_INCREMENTED - ); - call DMAChannel.startTransfer(); - client = id; - mode = _mode; - buffer = buf; - numSamples = length; - call AsyncAdcControl.start[id](); - } - return result; - } - - async command error_t SingleChannel.configureMultiple[uint8_t id]( - const msp430adc12_channel_config_t *config, - uint16_t *buf, uint16_t length, uint16_t jiffies) - { - return configure(id, config, buf, length, jiffies, MULTIPLE_SINGLE); - } - - async command error_t SingleChannel.configureMultipleRepeat[uint8_t id]( - const msp430adc12_channel_config_t *config, - uint16_t *buf, uint8_t length, uint16_t jiffies) - { - return configure(id, config, buf, length, jiffies, MULTIPLE_REPEAT); - } - - async command error_t SingleChannel.getData[uint8_t id]() - { - if (mode == MULTIPLE_SINGLE_AGAIN) - call DMAChannel.repeatTransfer(ADC12MEM, buffer, numSamples); - return call SubSingleChannel.getData[id](); - } - - async event error_t SubSingleChannel.singleDataReady[uint8_t id](uint16_t data) - { - // forward (only signalled if not in DMA mode) - return signal SingleChannel.singleDataReady[id](data); - } - - async event uint16_t* SubSingleChannel.multipleDataReady[uint8_t id](uint16_t buf[], uint16_t num) - { - // will never get here - return 0; - } - - async event void DMAChannel.transferDone(error_t success) - { - uint16_t* next; - uint8_t oldMode = mode; - if (oldMode != MULTIPLE_REPEAT){ - call AsyncAdcControl.stop[client](); - mode = MULTIPLE_SINGLE_AGAIN; - } - next = signal SingleChannel.multipleDataReady[client](buffer, numSamples); - if (oldMode == MULTIPLE_REPEAT) - if (next){ - call DMAChannel.repeatTransfer(ADC12MEM, next, numSamples); - call AsyncAdcControl.start[client](); - } else - call AsyncAdcControl.stop[client](); - } - - default async command error_t SubSingleChannel.configureSingle[uint8_t id]( - const msp430adc12_channel_config_t *config) - { return FAIL; } - - default async command error_t SubSingleChannel.configureSingleRepeat[uint8_t id]( - const msp430adc12_channel_config_t *config, uint16_t jiffies) - { return FAIL; } - - default async command error_t SubSingleChannel.configureMultiple[uint8_t id]( - const msp430adc12_channel_config_t - *config, uint16_t buf[], uint16_t num, uint16_t jiffies) - { return FAIL; } - - default async command error_t SubSingleChannel.configureMultipleRepeat[uint8_t id]( - const msp430adc12_channel_config_t *config, uint16_t buf[], uint8_t - num, uint16_t jiffies) - { return FAIL; } - - default async command error_t SubSingleChannel.getData[uint8_t id]() - { return FAIL;} - - default async event error_t SingleChannel.singleDataReady[uint8_t id]( - uint16_t data) - { return FAIL; } - - default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id]( - uint16_t buf[], uint16_t num) - { return 0;} - - default async command error_t AsyncAdcControl.stop[uint8_t id]() - { return FAIL; } - default async command error_t AsyncAdcControl.start[uint8_t id]() - { return FAIL; } -} diff --git a/tos/chips/msp430X/adc12/Msp430Adc12DMAWireC.nc b/tos/chips/msp430X/adc12/Msp430Adc12DMAWireC.nc deleted file mode 100644 index 074d5280e0..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12DMAWireC.nc +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.1 $ - * $Date: 2008/04/07 09:41:55 $ - * @author: Jan Hauer - * ======================================================================== - */ - -configuration Msp430Adc12DMAWireC -{ -} implementation { - components Msp430DmaC, Msp430Adc12DMAP; - Msp430Adc12DMAP.DMAControl -> Msp430DmaC.Control; - Msp430Adc12DMAP.DMAChannel -> Msp430DmaC.Channel2; -#warning Accessing DMA.channel2 for ADC12 -} diff --git a/tos/chips/msp430X/adc12/Msp430Adc12ImplP.nc b/tos/chips/msp430X/adc12/Msp430Adc12ImplP.nc deleted file mode 100644 index bb7304290f..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12ImplP.nc +++ /dev/null @@ -1,649 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.12 $ - * $Date: 2008/06/27 18:05:23 $ - * @author: Jan Hauer - * ======================================================================== - */ - -#include -module Msp430Adc12ImplP @safe() -{ - provides { - interface Init; - interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; - interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; - interface Msp430Adc12Overflow as Overflow[uint8_t id]; - interface AsyncStdControl as DMAExtension[uint8_t id]; - } - uses { - interface ArbiterInfo as ADCArbiterInfo; - interface HplAdc12; - interface Msp430Timer as TimerA; - interface Msp430TimerControl as ControlA0; - interface Msp430TimerControl as ControlA1; - interface Msp430Compare as CompareA0; - interface Msp430Compare as CompareA1; - interface HplMsp430GeneralIO as Port60; - interface HplMsp430GeneralIO as Port61; - interface HplMsp430GeneralIO as Port62; - interface HplMsp430GeneralIO as Port63; - interface HplMsp430GeneralIO as Port64; - interface HplMsp430GeneralIO as Port65; - interface HplMsp430GeneralIO as Port66; - interface HplMsp430GeneralIO as Port67; - } -} -implementation -{ -#warning Accessing TimerA for ADC12 - enum { - SINGLE_DATA = 1, - SINGLE_DATA_REPEAT = 2, - MULTIPLE_DATA = 4, - MULTIPLE_DATA_REPEAT = 8, - MULTI_CHANNEL = 16, - CONVERSION_MODE_MASK = 0x1F, - - ADC_BUSY = 32, /* request pending */ - USE_TIMERA = 64, /* TimerA used for SAMPCON signal */ - ADC_OVERFLOW = 128, - }; - - uint8_t state; /* see enum above */ - - uint16_t resultBufferLength; /* length of buffer */ - uint16_t *COUNT_NOK(resultBufferLength) resultBufferStart; - uint16_t resultBufferIndex; /* offset into buffer */ - uint8_t numChannels; /* number of channels (multi-channel conversion) */ - uint8_t clientID; /* ID of client that called getData() */ - - command error_t Init.init() - { - adc12ctl0_t ctl0; - call HplAdc12.stopConversion(); - ctl0 = call HplAdc12.getCtl0(); - ctl0.adc12tovie = 1; - ctl0.adc12ovie = 1; - call HplAdc12.setCtl0(ctl0); - return SUCCESS; - } - - void prepareTimerA(uint16_t interval, uint16_t csSAMPCON, uint16_t cdSAMPCON) - { -#ifdef ADC12_TIMERA_ENABLED - #warning timera enabled in adc - msp430_compare_control_t ccResetSHI = { - ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, - outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; - - call TimerA.setMode(MSP430TIMER_STOP_MODE); - call TimerA.clear(); - call TimerA.disableEvents(); - call TimerA.setClockSource(csSAMPCON); - call TimerA.setInputDivider(cdSAMPCON); - call ControlA0.setControl(ccResetSHI); - call CompareA0.setEvent(interval-1); - call CompareA1.setEvent((interval-1)/2); -#endif - } - - void startTimerA() - { -#ifdef ADC12_TIMERA_ENABLED - msp430_compare_control_t ccSetSHI = { - ccifg : 0, cov : 0, out : 1, cci : 0, ccie : 0, - outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; - msp430_compare_control_t ccResetSHI = { - ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, - outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; - msp430_compare_control_t ccRSOutmod = { - ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, - outmod : 7, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; - // manually trigger first conversion, then switch to Reset/set conversionMode - call ControlA1.setControl(ccResetSHI); - call ControlA1.setControl(ccSetSHI); - //call ControlA1.setControl(ccResetSHI); - call ControlA1.setControl(ccRSOutmod); - call TimerA.setMode(MSP430TIMER_UP_MODE); // go! - - -#endif - } - - void configureAdcPin( uint8_t inch ) - { -#ifdef ADC12_P6PIN_AUTO_CONFIGURE - switch (inch) - { - case 0: call Port60.selectModuleFunc(); call Port60.makeInput(); break; - case 1: call Port61.selectModuleFunc(); call Port61.makeInput(); break; - case 2: call Port62.selectModuleFunc(); call Port62.makeInput(); break; - case 3: call Port63.selectModuleFunc(); call Port63.makeInput(); break; - case 4: call Port64.selectModuleFunc(); call Port64.makeInput(); break; - case 5: call Port65.selectModuleFunc(); call Port65.makeInput(); break; - case 6: call Port66.selectModuleFunc(); call Port66.makeInput(); break; - case 7: call Port67.selectModuleFunc(); call Port67.makeInput(); break; - } -#endif - } - - void resetAdcPin( uint8_t inch ) - { -#ifdef ADC12_P6PIN_AUTO_CONFIGURE - switch (inch) - { - case 0: call Port60.selectIOFunc(); break; - case 1: call Port61.selectIOFunc(); break; - case 2: call Port62.selectIOFunc(); break; - case 3: call Port63.selectIOFunc(); break; - case 4: call Port64.selectIOFunc(); break; - case 5: call Port65.selectIOFunc(); break; - case 6: call Port66.selectIOFunc(); break; - case 7: call Port67.selectIOFunc(); break; - } -#endif - } - - async command error_t SingleChannel.configureSingle[uint8_t id]( - const msp430adc12_channel_config_t *config) - { - error_t result = ERESERVE; -#ifdef ADC12_CHECK_ARGS - if (!config) - return EINVAL; -#endif - atomic { - if (state & ADC_BUSY) - return EBUSY; - if (call ADCArbiterInfo.userId() == id){ - adc12ctl1_t ctl1 = { - adc12busy: 0, - conseq: 0, - adc12ssel: config->adc12ssel, - adc12div: config->adc12div, - issh: 0, - shp: 1, - shs: 0, - cstartadd: 0 - }; - adc12memctl_t memctl = { - inch: config->inch, - sref: config->sref, - eos: 1 - }; - adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); - ctl0.msc = 1; - ctl0.sht0 = config->sht; - ctl0.sht1 = config->sht; - - //hack to enable reference - //ctl0.refon = 1; - //ctl0.r2_5v = 0; - - state = SINGLE_DATA; - call HplAdc12.setCtl0(ctl0); - call HplAdc12.setCtl1(ctl1); - call HplAdc12.setMCtl(0, memctl); - call HplAdc12.setIEFlags(0x01); - result = SUCCESS; - - } - } - return result; - } - - async command error_t SingleChannel.configureSingleRepeat[uint8_t id]( - const msp430adc12_channel_config_t *config, - uint16_t jiffies) - { - error_t result = ERESERVE; -#ifdef ADC12_CHECK_ARGS - if (!config || jiffies == 1 || jiffies == 2) - return EINVAL; -#endif - atomic { - if (state & ADC_BUSY) - return EBUSY; - if (call ADCArbiterInfo.userId() == id) { - adc12ctl1_t ctl1 = { - adc12busy: 0, - conseq: 2, - adc12ssel: config->adc12ssel, - adc12div: config->adc12div, - issh: 0, - shp: 1, - shs: (jiffies == 0) ? 0 : 1, - cstartadd: 0 - }; - adc12memctl_t memctl = { - inch: config->inch, - sref: config->sref, - eos: 1 - }; - adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); - ctl0.msc = (jiffies == 0) ? 1 : 0; - ctl0.sht0 = config->sht; - ctl0.sht1 = config->sht; - - //hack to enable reference - //ctl0.refon = 1; - //ctl0.r2_5v = 0; - - state = SINGLE_DATA_REPEAT; - call HplAdc12.setCtl0(ctl0); - call HplAdc12.setCtl1(ctl1); - call HplAdc12.setMCtl(0, memctl); - call HplAdc12.setIEFlags(0x01); - if (jiffies){ - state |= USE_TIMERA; - prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id); - } - result = SUCCESS; - } - } - return result; - } - - async command error_t SingleChannel.configureMultiple[uint8_t id]( - const msp430adc12_channel_config_t *config, - uint16_t *buf, uint16_t length, uint16_t jiffies) - { - error_t result = ERESERVE; -#ifdef ADC12_CHECK_ARGS - if (!config || !buf || !length || jiffies == 1 || jiffies == 2) - return EINVAL; -#endif - atomic { - if (state & ADC_BUSY) - return EBUSY; - if (call ADCArbiterInfo.userId() == id){ - adc12ctl1_t ctl1 = { - adc12busy: 0, - conseq: (length > 16) ? 3 : 1, - adc12ssel: config->adc12ssel, - adc12div: config->adc12div, - issh: 0, - shp: 1, - shs: (jiffies == 0) ? 0 : 1, - cstartadd: 0 - }; - adc12memctl_t memctl = { - inch: config->inch, - sref: config->sref, - eos: 0 - }; - uint16_t i, mask = 1; - adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); - ctl0.msc = (jiffies == 0) ? 1 : 0; - ctl0.sht0 = config->sht; - ctl0.sht1 = config->sht; - - state = MULTIPLE_DATA; - resultBufferStart = NULL; - resultBufferLength = length; - resultBufferStart = buf; - resultBufferIndex = 0; - call HplAdc12.setCtl0(ctl0); - call HplAdc12.setCtl1(ctl1); - for (i=0; i<(length-1) && i < 15; i++) - call HplAdc12.setMCtl(i, memctl); - memctl.eos = 1; - call HplAdc12.setMCtl(i, memctl); - call HplAdc12.setIEFlags(mask << i); - - if (jiffies){ - state |= USE_TIMERA; - prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id); - } - result = SUCCESS; - } - } - return result; - } - - async command error_t SingleChannel.configureMultipleRepeat[uint8_t id]( - const msp430adc12_channel_config_t *config, - uint16_t *buf, uint8_t length, uint16_t jiffies) - { - error_t result = ERESERVE; -#ifdef ADC12_CHECK_ARGS - if (!config || !buf || !length || length > 16 || jiffies == 1 || jiffies == 2) - return EINVAL; -#endif - atomic { - if (state & ADC_BUSY) - return EBUSY; - if (call ADCArbiterInfo.userId() == id){ - adc12ctl1_t ctl1 = { - adc12busy: 0, - conseq: 3, - adc12ssel: config->adc12ssel, - adc12div: config->adc12div, - issh: 0, - shp: 1, - shs: (jiffies == 0) ? 0 : 1, - cstartadd: 0 - }; - adc12memctl_t memctl = { - inch: config->inch, - sref: config->sref, - eos: 0 - }; - uint16_t i, mask = 1; - adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); - ctl0.msc = (jiffies == 0) ? 1 : 0; - ctl0.sht0 = config->sht; - ctl0.sht1 = config->sht; - - state = MULTIPLE_DATA_REPEAT; - resultBufferStart = NULL; - resultBufferLength = length; - resultBufferStart = buf; - resultBufferIndex = 0; - - call HplAdc12.setCtl0(ctl0); - call HplAdc12.setCtl1(ctl1); - for (i=0; i<(length-1) && i < 15; i++) - call HplAdc12.setMCtl(i, memctl); - memctl.eos = 1; - call HplAdc12.setMCtl(i, memctl); - call HplAdc12.setIEFlags(mask << i); - - if (jiffies){ - state |= USE_TIMERA; - prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id); - } - result = SUCCESS; - } - } - return result; - } - - async command error_t SingleChannel.getData[uint8_t id]() - { - atomic { - if (call ADCArbiterInfo.userId() == id){ - if (state & MULTIPLE_DATA_REPEAT && !resultBufferStart) - return EINVAL; - if (state & ADC_BUSY) - return EBUSY; - state |= ADC_BUSY; - clientID = id; - configureAdcPin((call HplAdc12.getMCtl(0)).inch); - call HplAdc12.startConversion(); - if (state & USE_TIMERA) - startTimerA(); - return SUCCESS; - } - } - return FAIL; - } - - async command error_t MultiChannel.configure[uint8_t id]( - const msp430adc12_channel_config_t *config, - adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buf, - uint16_t numSamples, uint16_t jiffies) - { - error_t result = ERESERVE; -#ifdef ADC12_CHECK_ARGS - if (!config || !memctl || !numMemctl || numMemctl > 15 || !numSamples || - !buf || jiffies == 1 || jiffies == 2 || numSamples % (numMemctl+1) != 0) - return EINVAL; -#endif - atomic { - if (state & ADC_BUSY) - return EBUSY; - if (call ADCArbiterInfo.userId() == id){ - adc12ctl1_t ctl1 = { - adc12busy: 0, - conseq: (numSamples > numMemctl+1) ? 3 : 1, - adc12ssel: config->adc12ssel, - adc12div: config->adc12div, - issh: 0, - shp: 1, - shs: (jiffies == 0) ? 0 : 1, - cstartadd: 0 - }; - adc12memctl_t firstMemctl = { - inch: config->inch, - sref: config->sref, - eos: 0 - }; - uint16_t i, mask = 1; - adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); - ctl0.msc = (jiffies == 0) ? 1 : 0; - ctl0.sht0 = config->sht; - ctl0.sht1 = config->sht; - - state = MULTI_CHANNEL; - resultBufferStart = NULL; - resultBufferLength = numSamples; - resultBufferStart = buf; - resultBufferIndex = 0; - numChannels = numMemctl+1; - call HplAdc12.setCtl0(ctl0); - call HplAdc12.setCtl1(ctl1); - call HplAdc12.setMCtl(0, firstMemctl); - for (i=0; i<(numMemctl-1) && i < 14; i++){ - memctl[i].eos = 0; - call HplAdc12.setMCtl(i+1, memctl[i]); - } - memctl[i].eos = 1; - call HplAdc12.setMCtl(i+1, memctl[i]); - call HplAdc12.setIEFlags(mask << (i+1)); - - if (jiffies){ - state |= USE_TIMERA; - prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id); - } - result = SUCCESS; - } - } - return result; - } - - async command error_t MultiChannel.getData[uint8_t id]() - { - uint8_t i; - atomic { - if (call ADCArbiterInfo.userId() == id){ - if (!resultBufferStart) - return EINVAL; - if (state & ADC_BUSY) - return EBUSY; - state |= ADC_BUSY; - clientID = id; - for (i=0; i 16) - length = 16; - else - length = resultBufferLength - resultBufferIndex; - do { - *resultBuffer++ = call HplAdc12.getMem(i); - } while (++i < length); - resultBufferIndex += length; - if (overflow || resultBufferLength == resultBufferIndex){ - stopConversion(); - resultBuffer -= resultBufferIndex; - k = resultBufferIndex - length; - resultBufferIndex = 0; - signal SingleChannel.multipleDataReady[clientID](resultBuffer, - overflow ? k : resultBufferLength); - } else if (resultBufferLength - resultBufferIndex > 15) - return; - else { - // last sequence < 16 samples - adc12memctl_t memctl = call HplAdc12.getMCtl(0); - memctl.eos = 1; - call HplAdc12.setMCtl(resultBufferLength - resultBufferIndex, memctl); - } - } - break; - case MULTIPLE_DATA_REPEAT: - { - uint8_t i = 0; - resultBuffer = resultBufferStart; - do { - *resultBuffer++ = call HplAdc12.getMem(i); - } while (++i < resultBufferLength); - - resultBufferStart = signal SingleChannel.multipleDataReady[clientID]( - resultBuffer-resultBufferLength, - overflow ? 0 : resultBufferLength); - if (!resultBufferStart) - stopConversion(); - break; - } -#endif - } // switch - } - - default async event error_t SingleChannel.singleDataReady[uint8_t id](uint16_t data) - { - return FAIL; - } - - default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id]( - uint16_t *buf, uint16_t numSamples) - { - return 0; - } - - default async event void MultiChannel.dataReady[uint8_t id](uint16_t *buffer, uint16_t numSamples) {}; - - default async event void Overflow.memOverflow[uint8_t id](){} - default async event void Overflow.conversionTimeOverflow[uint8_t id](){} - -} - diff --git a/tos/chips/msp430X/adc12/Msp430Adc12MultiChannel.nc b/tos/chips/msp430X/adc12/Msp430Adc12MultiChannel.nc deleted file mode 100644 index 794bf0c60c..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12MultiChannel.nc +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.3 $ - * $Date: 2008/04/07 09:41:55 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * This interface provides access to the ADC12 on the level of HAL. It can be - * used to sample up to 16 (different) ADC channels. It separates between - * configuration and data collection: every time a client has been granted - * access to the ADC subsystem (via the Resource interface), it first has to - * configure the ADC. Afterwards the client may call getData() more than once - * without reconfiguring the ADC in between (if the client has not released the - * ADC via the Resource interface), i.e.

- * - * configure() -> ( getData() -> dataReady() )* - * - * @author Jan Hauer - */ - -#include "Msp430Adc12.h" -interface Msp430Adc12MultiChannel -{ - - /** - * Configures the ADC to perform conversion(s) on multiple channels. Any - * previous configuration will be overwritten. If SUCCESS is returned - * calling getData() will start the conversion immediately and a - * dataReady() event will be signalled with the conversion - * result when the conversion has finished. - * - * @param config Main ADC12 configuration and configuration of the first - * channel - * - * @param memctl List of additional channels and respective reference - * voltages - * - * @param numMemctl Number of entries in the list - * - * @param buffer Buffer to store the conversion results, it must have - * numSamples entries. Results will be stored in the order the channels where - * specified. - * - * @param numSamples Total number of samples. Note: numSamples % - * (numMemctl+1) must be zero. For example, to sample every channel twice use - * numSamples = (numMemctl+1) * 2 - * - * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" - * and input divider "sampcon_id". - * - * @return SUCCESS means that the ADC was configured successfully and - * getData() can be called to start the conversion. - */ - - async command error_t configure(const msp430adc12_channel_config_t *config, - adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buffer, - uint16_t numSamples, uint16_t jiffies); - - /** - * Starts sampling the adc channels using the configuration as specified by - * the last call to configure(). - * - * @return SUCCESS means that the conversion was started successfully and an - * event dataReady() will be signalled. Otherwise no event will be signalled. - */ - async command error_t getData(); - - /** - * Conversion results are ready. Results are stored in the buffer in the - * order the channels where specified in the configure() - * command, i.e. every (numMemctl+1)-th entry maps to the same channel. - * - * @param buffer Conversion results (lower 12 bit are valid, respectively). - * @param numSamples Number of results stored in buffer - */ - async event void dataReady(uint16_t *buffer, uint16_t numSamples); - -} - diff --git a/tos/chips/msp430X/adc12/Msp430Adc12Overflow.nc b/tos/chips/msp430X/adc12/Msp430Adc12Overflow.nc deleted file mode 100644 index 0ec81999e4..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12Overflow.nc +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.2 $ - * $Date: 2006/12/12 18:23:07 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * Signals an ADC12MEMx overflow or conversion time overflow condition to the - * client. - * - * @author Jan Hauer - */ - -#include "Msp430Adc12.h" -interface Msp430Adc12Overflow -{ - /** - * An ADC12MEMx overflow condition has occured. - */ - async event void memOverflow(); - - /** - * A conversion time overflow condition has occured. - */ - async event void conversionTimeOverflow(); -} - diff --git a/tos/chips/msp430X/adc12/Msp430Adc12P.nc b/tos/chips/msp430X/adc12/Msp430Adc12P.nc deleted file mode 100644 index b6e0046465..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12P.nc +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.7 $ - * $Date: 2008/05/15 23:57:13 $ - * @author: Jan Hauer - * ======================================================================== - */ - -#include -configuration Msp430Adc12P -{ - provides { - interface Resource[uint8_t id]; - interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; - interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; - interface Msp430Adc12Overflow as Overflow[uint8_t id]; - interface AsyncStdControl as DMAExtension[uint8_t id]; - } -} implementation { - components Msp430Adc12ImplP, HplAdc12P, MainC, - new SimpleRoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter; - - Resource = Arbiter; - SingleChannel = Msp430Adc12ImplP.SingleChannel; - MultiChannel= Msp430Adc12ImplP.MultiChannel; - Overflow = Msp430Adc12ImplP.Overflow; - DMAExtension = Msp430Adc12ImplP.DMAExtension; - - Msp430Adc12ImplP.Init <- MainC; - Msp430Adc12ImplP.ADCArbiterInfo -> Arbiter; - Msp430Adc12ImplP.HplAdc12 -> HplAdc12P; - -#ifdef ADC12_P6PIN_AUTO_CONFIGURE - components HplMsp430GeneralIOC; - Msp430Adc12ImplP.Port60 -> HplMsp430GeneralIOC.Port60; - Msp430Adc12ImplP.Port61 -> HplMsp430GeneralIOC.Port61; - Msp430Adc12ImplP.Port62 -> HplMsp430GeneralIOC.Port62; - Msp430Adc12ImplP.Port63 -> HplMsp430GeneralIOC.Port63; - Msp430Adc12ImplP.Port64 -> HplMsp430GeneralIOC.Port64; - Msp430Adc12ImplP.Port65 -> HplMsp430GeneralIOC.Port65; - Msp430Adc12ImplP.Port66 -> HplMsp430GeneralIOC.Port66; - Msp430Adc12ImplP.Port67 -> HplMsp430GeneralIOC.Port67; -#endif - -#ifdef ADC12_TIMERA_ENABLED - components Msp430TimerC; - Msp430Adc12ImplP.TimerA -> Msp430TimerC.TimerA; - Msp430Adc12ImplP.ControlA0 -> Msp430TimerC.ControlA0; - Msp430Adc12ImplP.ControlA1 -> Msp430TimerC.ControlA1; - Msp430Adc12ImplP.CompareA0 -> Msp430TimerC.CompareA0; - Msp430Adc12ImplP.CompareA1 -> Msp430TimerC.CompareA1; -#endif -} - diff --git a/tos/chips/msp430X/adc12/Msp430Adc12SingleChannel.nc b/tos/chips/msp430X/adc12/Msp430Adc12SingleChannel.nc deleted file mode 100644 index 68b6d2c640..0000000000 --- a/tos/chips/msp430X/adc12/Msp430Adc12SingleChannel.nc +++ /dev/null @@ -1,230 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.6 $ - * $Date: 2008/06/27 18:05:23 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * - * This interface provides access to the ADC12 on the level of HAL. It can be - * used to sample a single adc channel once or repeatedly (one event is - * signalled per conversion result) or perform multiple conversions for a - * single channel once or repeatedly (one event is signalled per multiple - * conversion results). It cannot be used to sample different adc channels with - * a single command (use the Msp430Adc12MultiChannel interface instead). - * Sampling a channel requires calling a sequence of two commands, configureX() - * and getData(), where X is either 'Single', 'SingleRepeat', 'Multiple' or - * 'MultipleRepeat'. Conversion results will be signalled by the - * dataReadySingle() or dataReadyMultiple() event, depending on the previous - * configuration, i.e. there are four possible sequences: - * - *

configureSingle() -> ( getData() -> singleDataReady() )* - *

configureSingleRepeat() -> ( getData() -> singleDataReady() )* - *

configureMultiple() -> ( getData() -> multipleDataReady() )* - *

configureMultipleRepeat() -> getData() -> multipleDataReady() - * - *

where configureX() and getData() are commands called by the client and - * singleDataReady() and multipleDataReady() are events signalled back to the - * client by the adc subsystem. Note that a configuration is valid until the - * client reconfigures or releases the ADC (using the Resource interface), - * except for configureMultipleRepeat(), which is only valid for a single call - * to getData(). This means that after a successful configuration with, for - * example, configureSingle() the client may call getData() more than once - * without reconfiguring the ADC in between (if the client has not released the - * ADC via the Resource interface). - * - * @author Jan Hauer - */ - -#include "Msp430Adc12.h" -interface Msp430Adc12SingleChannel -{ - - /** - * Configures the ADC to perform a single conversion. Any previous - * configuration will be overwritten. If SUCCESS is returned calling - * getData() will start the conversion immediately and a - * singleDataReady() event will be signalled with the conversion - * result when the conversion has finished. - * - * @param config ADC12 configuration data. - * - * @return SUCCESS means that the ADC was configured successfully and - * getData() can be called to start the conversion. - */ - async command error_t configureSingle(const msp430adc12_channel_config_t *ONE config); - - /** - * Configures the ADC for repeated single channel conversion mode. Any - * previous configuration will be overwritten. If SUCCESS is returned calling - * getData() will start sampling the adc channel periodically - * (the first conversion is started immediately). The sampling period is - * specified by the jiffies parameter, which defines the time - * between successive conversions in terms of clock ticks of clock source - * "sampcon_ssel" and clock input divider "sampcon_id" as specified in the - * config parameter. If jiffies is zero successive conversions - * are performed as quickly as possible. Conversion result are signalled - * until the client returns FAIL in the - * singleDataReady() event handler. - * - * @param config ADC12 configuration data. - * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" and - * input divider "sampcon_id". - * - * @return SUCCESS means that the ADC was configured successfully and - * getData() can be called to start with the first conversion. - */ - async command error_t configureSingleRepeat(const msp430adc12_channel_config_t *ONE config, uint16_t jiffies); - - - /** - * Configures the ADC for sampling a channel numSamples times - * with a given sampling period. Any previous configuration will be - * overwritten. In contrast to the configureSingleRepeat() - * command, this configuration means that only one event will be signalled - * after all samples have been taken (which is useful for high-frequency - * sampling). If SUCCESS is returned calling getData() will - * start sampling the adc channel numSamples times and the first - * conversion is started immediately. Conversion results are stored in a - * buffer allocated by the client (the buffer - * parameter). The sampling period is specified by the jiffies - * parameter, which defines the time between successive conversions in terms - * of clock ticks of clock source "sampcon_ssel" and clock input divider - * "sampcon_id" as specified in the config parameter. If jiffies - * is zero successive conversions are performed as quickly as possible. After - * numSamples conversions an event - * multipleDataReady() is signalled with the conversion results. - * - * @param config ADC12 configuration data. - * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" - * and input divider "sampcon_id". - * @param buffer The user-allocated buffer in which the conversion results - * will be stored. It must have at least numSamples entries, - * i.e. it must have a size of at least numSamples * 2 byte. - * @param numSamples Number of adc samples - * - * @return SUCCESS means that the ADC was configured successfully and - * getData() can be called to start with the first conversion. - */ - async command error_t configureMultiple( const msp430adc12_channel_config_t *ONE config, uint16_t *COUNT(numSamples) buffer, uint16_t numSamples, uint16_t jiffies); - - /** - * - * Configures the ADC for sampling a channel multiple times repeatedly. Any - * previous configuration will be overwritten. In contrast to the - * configureSingleRepeat() command this configuration means that - * an event with numSamples conversion results will be - * signalled, where 0 < numSamples <= 16. In contrast to the - * configureMultiple() command, this configuration means that - * numSamples conversion results will be signalled repeatedly - * until the client returns FAIL in the - * multipleDataReady() event handler. - * - * If configureMultipleRepeat() returns SUCCESS calling - * getData() will start the the first conversion immediately. - * The sampling period is specified by the jiffies parameter, - * which defines the time between successive conversions in terms of clock - * ticks of clock source "sampcon_ssel" and clock input divider "sampcon_id" - * as specified in the config parameter. If jiffies is zero - * successive conversions are performed as quickly as possible. After - * numSamples conversions an event - * multipleDataReady() is signalled with numSamples - * conversion results. If the client returns SUCCESS in the - * multipleDataReady() event handler, numSamples - * new conversions will be performed, otherwise not. - * - * @param config ADC12 configuration data. - * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" - * and input divider "sampcon_id". - * @param buffer The user-allocated buffer in which the conversion results - * will be stored. It must have at least numSamples entries, - * i.e. it must have a size of at least numSamples * 2 byte. - * @param numSamples Number of adc samples to take, 0 < - * numSamples <= 16 - * - * @return SUCCESS means that the ADC was configured successfully and - * getData() can be called to start with the first conversion. - */ - async command error_t configureMultipleRepeat(const msp430adc12_channel_config_t *ONE config, uint16_t *COUNT(numSamples) buffer, uint8_t numSamples, uint16_t jiffies); - - - /** - * Starts sampling an adc channel using the configuration as specified by - * the last call to any of the four available configuration commands. - * - * @return SUCCESS means that the conversion was started successfully and an - * event singleDataReady() or multipleDataReady() will be signalled - * (depending on the previous configuration). Otherwise no such event will be - * signalled. - */ - async command error_t getData(); - - /** - * A single ADC conversion result is ready. If the ADC was configured with - * the configureSingle() command, then the return value is - * ignored. If the ADC was configured with the - * configureSingleRepeat() command then the return value tells - * whether another conversion should be performed (SUCCESS()) or - * not (FAIL). - * - * @param data Conversion result (lower 12 bit). - * - * @return If this event is signalled as response to a call to - * configureSingleRepeat() then SUCCESS results in - * another sampling and FAIL stops the repeated sampling. - * Otherwise the return value is ignored. - */ - async event error_t singleDataReady(uint16_t data); - - /** - * Multiple ADC conversion results are ready. If the ADC was configured - * with the configureMultiple() command, then the return value - * is ignored. If the ADC was configured with the - * configureMultipleRepeat() command then the returned pointer - * defines where to store the next numSamples - * conversion results (the client must make sure that the buffer is big - * enough!). Returning a null pointer means that the repeated conversion - * mode will be stopped. - * - * @param buffer Conversion results (lower 12 bit are valid, respectively). - * @param numSamples Number of samples stored in buffer - * - * @return - * A null pointer stops a repeated conversion mode. Any non-zero value is - * interpreted as the next buffer, which must have at least - * numSamples entries. The return value is ignored if the ADC - * was configured with configureMultiple(). - */ - async event uint16_t * COUNT_NOK(numSamples) multipleDataReady(uint16_t *COUNT(numSamples) buffer, uint16_t numSamples); - -} - diff --git a/tos/chips/msp430X/adc12/Msp430RefVoltArbiterImplP.nc b/tos/chips/msp430X/adc12/Msp430RefVoltArbiterImplP.nc deleted file mode 100644 index adc8be20a6..0000000000 --- a/tos/chips/msp430X/adc12/Msp430RefVoltArbiterImplP.nc +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universität Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universität Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2007/04/05 13:42:36 $ - * @author: Jan Hauer - * ======================================================================== - */ - -module Msp430RefVoltArbiterImplP -{ - provides interface Resource as ClientResource[uint8_t client]; - uses { - interface Resource as AdcResource[uint8_t client]; - interface SplitControl as RefVolt_1_5V; - interface SplitControl as RefVolt_2_5V; - interface AdcConfigure as Config[uint8_t client]; - } -} implementation { - enum { - NO_OWNER = 0xFF, - }; - norace uint8_t syncOwner = NO_OWNER; - - task void switchOff(); - - async command error_t ClientResource.request[uint8_t client]() - { - return call AdcResource.request[client](); - } - - async command error_t ClientResource.immediateRequest[uint8_t client]() - { - const msp430adc12_channel_config_t* settings = call Config.getConfiguration[client](); - if (settings->sref == REFERENCE_VREFplus_AVss || - settings->sref == REFERENCE_VREFplus_VREFnegterm) - // always fails, because of the possible start-up delay (and async-sync transition) - return FAIL; - else { - return call AdcResource.immediateRequest[client](); - } - } - - event void AdcResource.granted[uint8_t client]() - { - const msp430adc12_channel_config_t* settings = call Config.getConfiguration[client](); - if (settings->sref == REFERENCE_VREFplus_AVss || - settings->sref == REFERENCE_VREFplus_VREFnegterm){ - error_t started; - if (syncOwner != NO_OWNER){ - // very rare case, which can only occur - // if no FIFO task scheduler - // is used (see comment below) - call AdcResource.release[client](); - call AdcResource.request[client](); - return; - } - syncOwner = client; - if (settings->ref2_5v == REFVOLT_LEVEL_1_5) - started = call RefVolt_1_5V.start(); - else - started = call RefVolt_2_5V.start(); - if (started != SUCCESS){ - syncOwner = NO_OWNER; - call AdcResource.release[client](); - call AdcResource.request[client](); - } - } else - signal ClientResource.granted[client](); - } - - event void RefVolt_1_5V.startDone(error_t error) - { - if (syncOwner != NO_OWNER){ - // assumption: a client which has called request() must - // not call release() before it gets the granted() - signal ClientResource.granted[syncOwner](); - } - } - - event void RefVolt_2_5V.startDone(error_t error) - { - if (syncOwner != NO_OWNER){ - // assumption: a client which has called request() must - // not call release() before it gets the granted() - signal ClientResource.granted[syncOwner](); - } - } - - async command error_t ClientResource.release[uint8_t client]() - { - error_t error; - if (syncOwner == client) - post switchOff(); - error = call AdcResource.release[client](); - // If syncOwner == client then now there is an inconsistency between - // the state of syncOwner and the actual owner of the Resource - // (which is not owned by anyone, because it was just released). - // The switchOff() task will resolve this incosistency, but a - // client can call ClientResource.request() before this task is - // posted. However, since Resource.granted is signalled in task context, - // with a FIFO task scheduler we can be sure that switchOff() will - // always be executed before the next Resource.granted event is - // signalled. Unfortunately "TinyOS components MUST NOT assume a - // FIFO policy" (TEP106), that's why there is some additional check - // in AdcResource.granted above. - return error; - } - - task void switchOff() - { - // update internal state - if (syncOwner != NO_OWNER){ - if (call RefVolt_1_5V.stop() == SUCCESS){ - syncOwner = NO_OWNER; - } else - post switchOff(); - } - } - - event void RefVolt_1_5V.stopDone(error_t error) - { - } - - event void RefVolt_2_5V.stopDone(error_t error) - { - } - - async command uint8_t ClientResource.isOwner[uint8_t client]() - { - return call AdcResource.isOwner[client](); - } - - default event void ClientResource.granted[uint8_t client](){} - default async command error_t AdcResource.request[uint8_t client]() - { - return FAIL; - } - default async command error_t AdcResource.immediateRequest[uint8_t client]() - { - return FAIL; - } - default async command bool AdcResource.isOwner[uint8_t client]() { return FALSE; } - default async command error_t AdcResource.release[uint8_t client](){return FAIL;} - const msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; - default async command const msp430adc12_channel_config_t* - Config.getConfiguration[uint8_t client]() - { - return &defaultConfig; - } -} - diff --git a/tos/chips/msp430X/adc12/Msp430RefVoltArbiterP.nc b/tos/chips/msp430X/adc12/Msp430RefVoltArbiterP.nc deleted file mode 100644 index bd74d881e8..0000000000 --- a/tos/chips/msp430X/adc12/Msp430RefVoltArbiterP.nc +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (c) 2006, Technische Universität Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universität Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.4 $ - * $Date: 2006/12/12 18:23:07 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** - * This component is meant to intercept requests to the Resource - * interface on their way to the adc arbiter. It checks whether the client's - * adc configuration requires the internal reference voltage generator of the - * MSP430 to be enabled during the conversion by inspecting the client's - * configuration data (using the AdcConfigure interface). If so it - * makes sure that Resource.granted() is held back until the reference voltage - * is stable. Clients SHOULD NOT wire to Msp430RefVoltArbiterP but - * to the Resource interface provided by - * Msp430Adc12ClientAutoRVGC. - * - * @author Jan Hauer - */ - -configuration Msp430RefVoltArbiterP -{ - provides interface Resource as ClientResource[uint8_t client]; - uses { - interface Resource as AdcResource[uint8_t client]; - interface AdcConfigure as Config[uint8_t client]; - } -} implementation { - components Msp430RefVoltGeneratorP, Msp430RefVoltArbiterImplP, - new TimerMilliC() as SwitchOnDelayTimer, - new TimerMilliC() as SwitchOffDelayTimer, - HplAdc12P; - - ClientResource = Msp430RefVoltArbiterImplP.ClientResource; - AdcResource = Msp430RefVoltArbiterImplP.AdcResource; - Config = Msp430RefVoltArbiterImplP; - - Msp430RefVoltArbiterImplP.RefVolt_1_5V -> Msp430RefVoltGeneratorP.RefVolt_1_5V; - Msp430RefVoltArbiterImplP.RefVolt_2_5V -> Msp430RefVoltGeneratorP.RefVolt_2_5V; - Msp430RefVoltGeneratorP.SwitchOnTimer -> SwitchOnDelayTimer; - Msp430RefVoltGeneratorP.SwitchOffTimer -> SwitchOffDelayTimer; - Msp430RefVoltGeneratorP.HplAdc12 -> HplAdc12P; -} - diff --git a/tos/chips/msp430X/adc12/Msp430RefVoltGenerator.h b/tos/chips/msp430X/adc12/Msp430RefVoltGenerator.h deleted file mode 100644 index 4e075d6592..0000000000 --- a/tos/chips/msp430X/adc12/Msp430RefVoltGenerator.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2004, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2007/03/14 18:14:06 $ - * @author: Jan Hauer - * ======================================================================== - */ - -#ifndef REFVOLTGENERATOR_H -#define REFVOLTGENERATOR_H - -// Time for generator to become stable (don't change). -#define STABILIZE_INTERVAL 17 - -// Delay before generator is switched off after it has been stopped (in ms). -// This avoids having to wait the 17ms in case the generator is needed again -// shortly after it has been stopped (value may be modified). -#define SWITCHOFF_INTERVAL 20 - -#endif diff --git a/tos/chips/msp430X/adc12/Msp430RefVoltGeneratorP.nc b/tos/chips/msp430X/adc12/Msp430RefVoltGeneratorP.nc deleted file mode 100644 index 4fb1e1c7f5..0000000000 --- a/tos/chips/msp430X/adc12/Msp430RefVoltGeneratorP.nc +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Copyright (c) 2004, Technische Universität Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universität Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - Revision ------------------------------------------------------------- - * $Revision: 1.4 $ - * $Date: 2006/12/12 18:23:07 $ - * @author: Jan Hauer - * ======================================================================== - */ -#include -module Msp430RefVoltGeneratorP -{ - provides interface SplitControl as RefVolt_1_5V; - provides interface SplitControl as RefVolt_2_5V; - uses { - interface HplAdc12; - interface Timer as SwitchOnTimer; - interface Timer as SwitchOffTimer; - } -} implementation { - - enum - { - GENERATOR_OFF, - REFERENCE_1_5V_PENDING, - REFERENCE_2_5V_PENDING, - REFERENCE_1_5V_STABLE, - REFERENCE_2_5V_STABLE, - }; - - uint8_t state; - - error_t switchOn(uint8_t level) - { - atomic { - if (call HplAdc12.isBusy()) - return FAIL; - else { - adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); - ctl0.enc = 0; - call HplAdc12.setCtl0(ctl0); - ctl0.refon = 1; - if (level == REFERENCE_1_5V_PENDING) - ctl0.r2_5v = 0; - else - ctl0.r2_5v = 1; - call HplAdc12.setCtl0(ctl0); - return SUCCESS; - } - } - } - - error_t switchOff() - { - atomic { - if (call HplAdc12.isBusy()) - return FAIL; - else { - adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); - ctl0.enc = 0; - call HplAdc12.setCtl0(ctl0); - ctl0.refon = 0; - call HplAdc12.setCtl0(ctl0); - return SUCCESS; - } - } - } - - command error_t RefVolt_1_5V.start() - { - switch (state) - { - case REFERENCE_1_5V_STABLE: - call SwitchOffTimer.stop(); - signal RefVolt_1_5V.startDone(SUCCESS); - return SUCCESS; - case GENERATOR_OFF: - if (switchOn(REFERENCE_1_5V_PENDING) == SUCCESS){ - call SwitchOnTimer.startOneShot(STABILIZE_INTERVAL); - state = REFERENCE_1_5V_PENDING; - return SUCCESS; - } else - return FAIL; - case REFERENCE_2_5V_STABLE: - if (switchOn(REFERENCE_1_5V_PENDING) == SUCCESS){ - call SwitchOffTimer.stop(); - state = REFERENCE_1_5V_STABLE; - signal RefVolt_1_5V.startDone(SUCCESS); - return SUCCESS; - } else - return FAIL; - case REFERENCE_1_5V_PENDING: - // fall through - case REFERENCE_2_5V_PENDING: - // fall through - default: - // illegal state - return FAIL; - } - } - - command error_t RefVolt_1_5V.stop() - { - switch (state) - { - case REFERENCE_1_5V_PENDING: - // fall through - case REFERENCE_2_5V_PENDING: - if (switchOff() == SUCCESS){ - call SwitchOnTimer.stop(); - state = GENERATOR_OFF; - if (state == REFERENCE_1_5V_PENDING) - signal RefVolt_1_5V.stopDone(SUCCESS); - else - signal RefVolt_2_5V.stopDone(SUCCESS); - return SUCCESS; - } else - return FAIL; - case REFERENCE_1_5V_STABLE: - // fall through - case REFERENCE_2_5V_STABLE: - call SwitchOffTimer.startOneShot(SWITCHOFF_INTERVAL); - return SUCCESS; - case GENERATOR_OFF: - // fall through - default: - // illegal state - return FAIL; - } - } - - command error_t RefVolt_2_5V.start() - { - switch (state) - { - case REFERENCE_2_5V_STABLE: - call SwitchOffTimer.stop(); - signal RefVolt_2_5V.startDone(SUCCESS); - return SUCCESS; - case GENERATOR_OFF: - if (switchOn(REFERENCE_2_5V_PENDING) == SUCCESS){ - call SwitchOnTimer.startOneShot(STABILIZE_INTERVAL); - state = REFERENCE_2_5V_PENDING; - return SUCCESS; - } else - return FAIL; - case REFERENCE_1_5V_STABLE: - if (switchOn(REFERENCE_2_5V_PENDING) == SUCCESS){ - call SwitchOffTimer.stop(); - state = REFERENCE_2_5V_STABLE; - signal RefVolt_2_5V.startDone(SUCCESS); - return SUCCESS; - } else - return FAIL; - case REFERENCE_2_5V_PENDING: - // fall through - case REFERENCE_1_5V_PENDING: - // fall through - default: - // illegal state - return FAIL; - } - } - - command error_t RefVolt_2_5V.stop() - { - switch (state) - { - case REFERENCE_2_5V_PENDING: - // fall through - case REFERENCE_1_5V_PENDING: - if (switchOff() == SUCCESS){ - call SwitchOnTimer.stop(); - state = GENERATOR_OFF; - if (state == REFERENCE_2_5V_PENDING) - signal RefVolt_2_5V.stopDone(SUCCESS); - else - signal RefVolt_1_5V.stopDone(SUCCESS); - return SUCCESS; - } else - return FAIL; - case REFERENCE_2_5V_STABLE: - // fall through - case REFERENCE_1_5V_STABLE: - call SwitchOffTimer.startOneShot(SWITCHOFF_INTERVAL); - return SUCCESS; - case GENERATOR_OFF: - // fall through - default: - // illegal state - return FAIL; - } - } - - event void SwitchOnTimer.fired() - { - switch (state) - { - case REFERENCE_1_5V_PENDING: - state = REFERENCE_1_5V_STABLE; - signal RefVolt_1_5V.startDone(SUCCESS); - break; - case REFERENCE_2_5V_PENDING: - state = REFERENCE_2_5V_STABLE; - signal RefVolt_2_5V.startDone(SUCCESS); - break; - case REFERENCE_1_5V_STABLE: - // fall through - case GENERATOR_OFF: - // fall through - case REFERENCE_2_5V_STABLE: - // fall through - default: - // illegal state - return; - } - } - - event void SwitchOffTimer.fired() - { - switch (state) - { - case REFERENCE_1_5V_STABLE: - if (switchOff() == SUCCESS){ - state = GENERATOR_OFF; - signal RefVolt_1_5V.stopDone(SUCCESS); - } else - call SwitchOffTimer.startOneShot(SWITCHOFF_INTERVAL); - break; - case REFERENCE_2_5V_STABLE: - if (switchOff() == SUCCESS){ - state = GENERATOR_OFF; - signal RefVolt_2_5V.stopDone(SUCCESS); - } else - call SwitchOffTimer.startOneShot(SWITCHOFF_INTERVAL); - break; - case GENERATOR_OFF: - // fall through - case REFERENCE_1_5V_PENDING: - // fall through - case REFERENCE_2_5V_PENDING: - // fall through - default: - // illegal state - return; - } - } - - async event void HplAdc12.conversionDone(uint16_t iv){} - - default event void RefVolt_1_5V.startDone(error_t error){} - default event void RefVolt_2_5V.startDone(error_t error){} - default event void RefVolt_1_5V.stopDone(error_t error){} - default event void RefVolt_2_5V.stopDone(error_t error){} -} - diff --git a/tos/chips/msp430X/adc12/README.txt b/tos/chips/msp430X/adc12/README.txt deleted file mode 100644 index 1bdd796f5e..0000000000 --- a/tos/chips/msp430X/adc12/README.txt +++ /dev/null @@ -1,182 +0,0 @@ -The implementation of the 12-bit ADC stack on the MSP430 is in compliance -with TEP 101 (tinyos-2.x/doc/txt/tep101.txt) and provides virtualized access -to the ADC12 by seven different components: AdcReadClientC, AdcReadNowClientC, -AdcReadStreamClientC, Msp430Adc12ClientC, Msp430Adc12ClientAutoDMAC, -Msp430Adc12ClientAutoRVGC and Msp430Adc12ClientAutoDMA_RVGC. A client -component may wire to any of these components and it SHOULD NOT wire to any -other components in 'tinyos-2.x/tos/chips/msp430/adc12'. This document -explains the difference between the seven components. - - -1. HIL -==================================================================== - - -A platform-independent application (an application like 'Oscilloscope' that is -supposed to run on, for example, the 'telosb' and 'micaz' platform at the same -time) cannot wire to an MSP430-specific interface like Msp430Adc12SingleChannel -(there is no MSP430 on micaz). Instead such an application may access the -MSP430 ADC through any of the three following components: - - * AdcReadClientC: to read single ADC values - * AdcReadNowClientC: to read single ADC values asynchronously (fast) - * AdcReadStreamClientC: to read multiple ADC values - -These components are less efficient than the MSP430-specific ADC components -(described below), but they provide standard TinyOS interfaces for reading ADC -values. Thus, if a client component does not care so much about efficiency but -rather about portability it should wire to any of these components. - - -2. HAL -==================================================================== - -An application that is written for an MSP430-based platform like 'eyesIFX' or -'telosb' can access the ADC12 in a more efficient way via two interfaces: (1) -the Msp430Adc12SingleChannel allows to perform one or more ADC conversions on a -single channel with a specified sampling frequency and (2) the -Msp430Adc12MultiChannel allows to sample a group of up to 16 different ADC -channels. - -On the MSP430 two additional hardware modules may play a role when the ADC12 is -used: the internal reference voltage generator and the DMA controller. - -The voltage generator outputs stabilized voltage of 1.5 V or 2.5 V, which may -be used as reference voltage in the conversion process. Whether the internal -reference voltage generator should be enabled during the conversion is -platform-specific (e.g. the light sensor on the 'eyesIFX' requires a stable -reference voltage). When an application requires a stable reference voltage -during the sampling process it should wire to the Msp430Adc12ClientAutoRVGC -component. This assures that when the app is signalled the Resource.granted() -event the reference voltage generator outputs a stable voltage (the level is -defined in the configuration data supplied by the application). There are two -more things to note: first, the generator is not switched off immediately, when -the client calls Resource.release(), but only after some pre-defined interval -(see Msp430RefVoltGenerator.h). This can avoid a power-up delay when multiple -clients are present. Second, one must not forget to wire the AdcConfigure -interface to the Msp430Adc12ClientAutoRVGC or Msp430Adc12ClientAutoDMA_RVGC -component in addition to configuring the ADC through the -Msp430Adc12SingleChannel interface (a nesC warning will be signalled). - -The DMA controller can be used to copy conversion data from the ADC registers -to the application buffer. DMA is only present on MSP430x15x and MSP430x16x -devices. When an application wants to use the DMA it can wire to the -Msp430Adc12ClientAutoDMAC component and then conversion results are transferred -using DMA. Both, enabling the reference generator and using the DMA, therefore -happens transparent to the app. There are four possible combinations reflected -by the following components that an MSP430-based application may wire to: - - * Msp430Adc12ClientC: no DMA, no automatic reference voltage - * Msp430Adc12ClientAutoRVGC: automatic reference voltage, but no DMA - * Msp430Adc12ClientAutoDMAC: DMA, but no automatic reference voltage - * Msp430Adc12ClientAutoDMA_RVGC: DMA and automatic reference voltage - -Currently Msp430Adc12MultiChannel is only provided by the first two components. - -I/O PINs --------------------------------------------------------------------- - -During a conversion the respective ADC port pin (ports 6.0 - 6.7) must be -configured such that the peripheral module function is selected and the port -pin is switched to input direction. By default, for every client this is done -**automatically** in the ADC stack (Msp430Adc12ImplP), i.e. just before the -conversion starts the respective pin is switched to peripheral module function -and input direction and immediately after the conversion has finished it is -switched to I/O function mode. To disable this feature please comment out the -"ADC12_P6PIN_AUTO_CONFIGURE" macro in Msp430Adc12.h. - - -Configuration for single channel conversions --------------------------------------------------------------------- - -The msp430adc12_channel_config_t struct holds all information needed to -configure the ADC12 for single channel conversions. The flags come from the -following MSP430 registers: ADC12CTL0, ADC12CTL1, ADC12MCTLx and TACTL and are -named according to the "MSP430x1xx Family User's Guide". Their meaning is as -follows: - - .inch: ADC12 input channel (ADC12MCTLx register). An (external) input - channel maps to one of msp430's A0-A7 pins (see device specific data sheet). - - .sref: reference voltage (ADC12MCTLx register). If REFERENCE_VREFplus_AVss - or REFERENCE_VREFplus_VREFnegterm is chosen AND the client wires to the - Msp430Adc12ClientAutoRVGC or Msp430Adc12ClientAutoDMA_RVGC component then - the reference voltage generator has automatically been enabled to the - voltage level defined by the "ref2_5v" flag (see below) when the - Resource.granted() event is signalled to the client. Otherwise this flag is - ignored. - - .ref2_5v: Reference generator voltage level (ADC12CTL0 register). See - "sref". - - .adc12ssel: ADC12 clock source select for the sample-hold-time (ADC12CTL1 - register). In combination the "adc12ssel", "adc12div" and "sht" define the - sample-hold-time: "adc12ssel" defines the clock source, "adc12div" defines - the ADC12 clock divider and "sht" define the time expressed in jiffies. - (the sample-hold-time depends on the resistence of the attached sensor, and - is calculated using to the formula in section 17.2.4 of the user guide) - - .adc12div: ADC12 clock divider (ADC12CTL1 register). See "adc12ssel". - - .sht: Sample-and-hold time (ADC12CTL1 register). See "adc12ssel". - - .sampcon_ssel: Clock source for the sampling period (TASSEL for TimerA). - When an ADC client specifies a non-zero "jiffies" parameter (using the - Msp430Adc12SingleChannel.configureX commands), the ADC - implementation will automatically configure TimerA to be sourced from - "sampcon_ssel" with an input divider of "sampcon_id". During the sampling - process TimerA will be used to trigger a single - (Msp430Adc12SingleChannel interface) or a sequence of (Msp430Adc12MultiChannel - interface) conversions every "jiffies" clock ticks. - - .sampcon_id: Input divider for "sampcon_ssel" (IDx in TACTL register, - TimerA). See "sampcon_ssel". - - -Example: Assuming that SMCLK runs at 1 MHz the following code snippet -performs 2000 ADC conversions on channel A2 with a sampling period of 4000 Hz. -The sampling period is defined by the combination of SAMPCON_SOURCE_SMCLK, -SAMPCON_CLOCK_DIV_1 and a "jiffies" parameter of (1000000 / 4000) = 250. - - - #define NUM_SAMPLES 2000 - uint16_t buffer[NUM_SAMPLES]; - - const msp430adc12_channel_config_t config = { - INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_NONE, - SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES, - SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 - }; - - event void Boot.booted() - { - call Resource.request(); - } - - event void Resource.granted() - { - error_t result; - result = call SingleChannel.configureMultiple(&config, buffer, BUFFER_SIZE, 250); - if (result == SUCCESS) - call SingleChannel.getData(); - } - - async event uint16_t* SingleChannel.multipleDataReady(uint16_t *buf, uint16_t length) - { - // buffer contains conversion results - } - - -3. Implementation -==================================================================== - -The ADC12 stack is located at tinyos-2.x/tos/chips/msp430/adc12. Sensor -wrappers for the msp430 internal sensors are in -tinyos-2.x/tos/chips/msp430/sensors, an HAL test app can be found in -tinyos-2.x/apps/tests/msp430/Adc12. - ------ - -$Date: 2008/04/07 09:41:55 $ -@author: Jan Hauer - diff --git a/tos/chips/msp430X/adc12/WireAdcStreamP.nc b/tos/chips/msp430X/adc12/WireAdcStreamP.nc deleted file mode 100644 index 20fd3a8297..0000000000 --- a/tos/chips/msp430X/adc12/WireAdcStreamP.nc +++ /dev/null @@ -1,40 +0,0 @@ -/* $Id: WireAdcStreamP.nc,v 1.1 2008/04/07 09:41:55 janhauer Exp $ - * Copyright (c) 2005 Intel Corporation - * All rights reserved. - * - * This file is distributed under the terms in the attached INTEL-LICENSE - * file. If you do not find these files, copies can be found by writing to - * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, - * 94704. Attention: Intel License Inquiry. - */ -/** - * Support component for AdcReadStreamClientC. - * - * @author David Gay - * @author Jan Hauer - */ - -#include "Msp430Adc12.h" - -configuration WireAdcStreamP { - provides interface ReadStream[uint8_t client]; - uses { - interface AdcConfigure[uint8_t client]; - interface Msp430Adc12SingleChannel[uint8_t client]; - interface Resource[uint8_t client]; - } -} -implementation { - components AdcStreamP, MainC, new AlarmMilli32C() as Alarm, - new ArbitratedReadStreamC(uniqueCount(ADCC_READ_STREAM_SERVICE), uint16_t) as ArbitrateReadStream; - - ReadStream = ArbitrateReadStream; - AdcConfigure = AdcStreamP; - Resource = ArbitrateReadStream; - - ArbitrateReadStream.Service -> AdcStreamP; - - AdcStreamP.Init <- MainC; - Msp430Adc12SingleChannel = AdcStreamP.SingleChannel; - AdcStreamP.Alarm -> Alarm; -} diff --git a/tos/chips/msp430X/dma/HplMsp430DmaC.nc b/tos/chips/msp430X/dma/HplMsp430DmaC.nc deleted file mode 100644 index 594e4efb86..0000000000 --- a/tos/chips/msp430X/dma/HplMsp430DmaC.nc +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @version $Revision: 1.6 $ $Date: 2008/05/15 23:57:13 $ - */ - -configuration HplMsp430DmaC { - - provides interface HplMsp430DmaControl as Control; - provides interface HplMsp430DmaChannel as Channel0; - provides interface HplMsp430DmaChannel as Channel1; - provides interface HplMsp430DmaChannel as Channel2; - -} - -implementation { - - components HplMsp430DmaP; - - components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_, - DMA0SZ_, DMA0TSEL_MASK, - DMA0TSEL_SHIFT ) as Dma0; - components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_, - DMA1SZ_, DMA1TSEL_MASK, - DMA1TSEL_SHIFT ) as Dma1; - components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_, - DMA2SZ_, DMA2TSEL_MASK, - DMA2TSEL_SHIFT ) as Dma2; - -/* - components new HplMsp430DmaXP( DMA0CTL, DMA0SA, DMA0DA, - DMA0SZ, DMA0TSEL_MASK, - DMA0TSEL_SHIFT ) as Dma0; - components new HplMsp430DmaXP( DMA1CTL, DMA1SA, DMA1DA, - DMA1SZ, DMA1TSEL_MASK, - DMA1TSEL_SHIFT ) as Dma1; - components new HplMsp430DmaXP( DMA2CTL, DMA2SA, DMA2DA, - DMA2SZ, DMA2TSEL_MASK, - DMA2TSEL_SHIFT ) as Dma2; - -*/ - Control = HplMsp430DmaP; - Channel0 = Dma0; - Channel1 = Dma1; - Channel2 = Dma2; - Dma0.Interrupt -> HplMsp430DmaP; - Dma1.Interrupt -> HplMsp430DmaP; - Dma2.Interrupt -> HplMsp430DmaP; - -} - diff --git a/tos/chips/msp430X/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430X/dma/HplMsp430DmaChannel.nc deleted file mode 100644 index 761cb192af..0000000000 --- a/tos/chips/msp430X/dma/HplMsp430DmaChannel.nc +++ /dev/null @@ -1,75 +0,0 @@ -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:07 $ - */ - -interface HplMsp430DmaChannel { - async command error_t setTrigger(dma_trigger_t trigger); - async command void clearTrigger(); - async command void setSingleMode(); - async command void setBlockMode(); - async command void setBurstMode(); - async command void setRepeatedSingleMode(); - async command void setRepeatedBlockMode(); - async command void setRepeatedBurstMode(); - async command void setSrcNoIncrement(); - async command void setSrcDecrement(); - async command void setSrcIncrement(); - async command void setDstNoIncrement(); - async command void setDstDecrement(); - async command void setDstIncrement(); - async command void setWordToWord(); - async command void setByteToWord(); - async command void setWordToByte(); - async command void setByteToByte(); - async command void setEdgeSensitive(); - async command void setLevelSensitive(); - - async command void enableDMA(); - async command void disableDMA(); - - async command void enableInterrupt() ; - async command void disableInterrupt() ; - - async command bool interruptPending(); - - async command bool aborted(); - async command void triggerDMA(); - - async command void setSrc(void *saddr); - async command void setDst(void *daddr); - async command void setSize(uint16_t sz); - - async command void setState(dma_channel_state_t s, dma_channel_trigger_t t, void* src, void* dest, uint16_t size); - async command void setStateRaw(uint16_t state, uint16_t trigger, void* src, void* dest, uint16_t size); - async command dma_channel_state_t getState(); - async command void* getSource(); - async command void* getDestination(); - async command uint16_t getSize(); - async command dma_channel_trigger_t getTrigger(); - - async command void reset(); - - async event void transferDone(error_t success); -} diff --git a/tos/chips/msp430X/dma/HplMsp430DmaControl.nc b/tos/chips/msp430X/dma/HplMsp430DmaControl.nc deleted file mode 100644 index 50ffbf3bb9..0000000000 --- a/tos/chips/msp430X/dma/HplMsp430DmaControl.nc +++ /dev/null @@ -1,40 +0,0 @@ -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:07 $ - */ - -#include "Msp430Dma.h" - -interface HplMsp430DmaControl { - - async command void setOnFetch(); - async command void clearOnFetch(); - async command void setRoundRobin(); - async command void clearRoundRobin(); - async command void setENNMI(); - async command void clearENNMI(); - async command void setState(dma_state_t s); - async command dma_state_t getState(); - async command void reset(); -} diff --git a/tos/chips/msp430X/dma/HplMsp430DmaInterrupt.nc b/tos/chips/msp430X/dma/HplMsp430DmaInterrupt.nc deleted file mode 100644 index 0bd674f4bc..0000000000 --- a/tos/chips/msp430X/dma/HplMsp430DmaInterrupt.nc +++ /dev/null @@ -1,29 +0,0 @@ -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:07 $ - */ - -interface HplMsp430DmaInterrupt { - async event void fired(); -} diff --git a/tos/chips/msp430X/dma/HplMsp430DmaP.nc b/tos/chips/msp430X/dma/HplMsp430DmaP.nc deleted file mode 100644 index de14ab1e03..0000000000 --- a/tos/chips/msp430X/dma/HplMsp430DmaP.nc +++ /dev/null @@ -1,121 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @version $Revision: 1.7 $ $Date: 2008/05/15 23:57:13 $ - */ - -module HplMsp430DmaP { - - provides interface HplMsp430DmaControl as DmaControl; - provides interface HplMsp430DmaInterrupt as Interrupt; - -} - -implementation { - - MSP430REG_NORACE( DMACTL0 ); - MSP430REG_NORACE( DMACTL1 ); - - TOSH_SIGNAL( DMA_VECTOR ) { - #ifdef DXNRG - dxnrg_on(DXNRG_IRQ); - #endif - signal Interrupt.fired(); - #ifdef DXNRG - dxnrg_off(DXNRG_IRQ); - #endif - } - - async command void DmaControl.setOnFetch(){ - DMACTL1 |= DMAONFETCH; - } - - async command void DmaControl.clearOnFetch(){ - DMACTL1 &= ~DMAONFETCH; - } - - async command void DmaControl.setRoundRobin(){ - DMACTL1 |= ROUNDROBIN; - } - async command void DmaControl.clearRoundRobin(){ - DMACTL1 &= ~ROUNDROBIN; - } - - async command void DmaControl.setENNMI(){ - DMACTL1 |= ENNMI; - } - - async command void DmaControl.clearENNMI(){ - DMACTL1 &= ~ENNMI; - } - - async command void DmaControl.setState(dma_state_t s){ - DMACTL1 = *(int*)&s; - } - - async command dma_state_t DmaControl.getState(){ - dma_state_t s; - s = *(dma_state_t*)&DMACTL1; - return s; - } - - async command void DmaControl.reset(){ - DMACTL0 = 0; - DMACTL1 = 0; - } - -} - diff --git a/tos/chips/msp430X/dma/HplMsp430DmaXP.nc b/tos/chips/msp430X/dma/HplMsp430DmaXP.nc deleted file mode 100644 index b87cf2e8bd..0000000000 --- a/tos/chips/msp430X/dma/HplMsp430DmaXP.nc +++ /dev/null @@ -1,283 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @author Mark Hays - * @version $Revision: 1.6 $ $Date: 2008/06/23 20:25:15 $ - */ - -generic module HplMsp430DmaXP( uint16_t DMAxCTL_addr, - uint16_t DMAxSA_addr, - uint16_t DMAxDA_addr, - uint16_t DMAxSZ_addr, - uint16_t DMAxTSEL_mask, - uint16_t DMAxTSEL_shift ) @safe() { - - provides interface HplMsp430DmaChannel as DMA; - uses interface HplMsp430DmaInterrupt as Interrupt; - -} - -implementation { - - MSP430REG_NORACE( DMACTL0 ); - -#define DMAxCTL (*(volatile TYPE_DMA0CTL*)DMAxCTL_addr) -#define DMAxSA (*(volatile TYPE_DMA0SA*)DMAxSA_addr) -#define DMAxDA (*(volatile TYPE_DMA0DA*)DMAxDA_addr) -#define DMAxSZ (*(volatile TYPE_DMA0SZ*)DMAxSZ_addr) - - async event void Interrupt.fired() { - error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS; - if ( DMAxCTL & DMAIFG ) { - DMAxCTL &= ~DMAIFG; - DMAxCTL &= ~DMAABORT; - signal DMA.transferDone( error ); - } - } - - async error_t command DMA.setTrigger( dma_trigger_t trigger ) { - - if ( DMAxCTL & DMAEN ) - return FAIL; - - DMACTL0 = ( ( DMACTL0 & ~DMAxTSEL_mask ) | - ( ( trigger << DMAxTSEL_shift ) & DMAxTSEL_mask ) ); - - return SUCCESS; - - } - - async command void DMA.clearTrigger() { - DMACTL0 &= ~DMAxTSEL_mask; - } - - async command void DMA.setSingleMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_SINGLE_TRANSFER; - } - - async command void DMA.setBlockMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_BLOCK_TRANSFER; - } - - async command void DMA.setBurstMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_BURST_BLOCK_TRANSFER; - } - - async command void DMA.setRepeatedSingleMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_SINGLE_TRANSFER; - } - - async command void DMA.setRepeatedBlockMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_BLOCK_TRANSFER; - } - - async command void DMA.setRepeatedBurstMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_BURST_BLOCK_TRANSFER; - } - - async command void DMA.setSrcNoIncrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_UNCHANGED; - } - - async command void DMA.setSrcDecrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_DECREMENTED; - } - - async command void DMA.setSrcIncrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_INCREMENTED; - } - - async command void DMA.setDstNoIncrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_UNCHANGED; - } - - async command void DMA.setDstDecrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_DECREMENTED; - } - - async command void DMA.setDstIncrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_INCREMENTED; - } - - async command void DMA.setWordToWord() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASWDW; - } - - async command void DMA.setByteToWord() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASBDW; - } - - async command void DMA.setWordToByte() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASWDB; - } - - async command void DMA.setByteToByte() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASBDB; - } - - async command void DMA.setEdgeSensitive() { - DMAxCTL &= ~DMALEVEL; - } - - async command void DMA.setLevelSensitive() { - DMAxCTL |= DMALEVEL; - } - - async command void DMA.enableDMA() { - DMAxCTL |= DMAEN; - } - - async command void DMA.disableDMA() { - DMAxCTL &= ~DMAEN; - } - - async command void DMA.enableInterrupt() { - DMAxCTL |= DMAIE; - } - - async command void DMA.disableInterrupt() { - DMAxCTL &= ~DMAIE; - } - - async command bool DMA.interruptPending() { - return !!( DMAxCTL & DMAIFG ); - } - - async command bool DMA.aborted() { - return !!( DMAxCTL & DMAABORT ); - } - - async command void DMA.triggerDMA() { - DMAxCTL |= DMAREQ; - } - - async command void DMA.setSrc( void *saddr ) { - DMAxSA = (uint16_t)saddr; - } - - async command void DMA.setDst( void *daddr ) { - DMAxDA = (uint16_t)daddr; - } - - async command void DMA.setSize( uint16_t sz ) { - DMAxSZ = sz; - } - - async command void DMA.setState( dma_channel_state_t s, - dma_channel_trigger_t t, - void* src, void* dest, - uint16_t size ) { - call DMA.setStateRaw( *(uint16_t*)&s, *(uint16_t*)&t, - src, dest, size); - } - - async command void DMA.setStateRaw( uint16_t s, uint16_t t, - void* src, void* dest, - uint16_t size ) { - DMAxSA = (uint16_t)src; - DMAxDA = (uint16_t)dest; - DMAxSZ = size; - call DMA.setTrigger((dma_trigger_t) t); - DMAxCTL = s; - } - - async command dma_channel_state_t DMA.getState() { - dma_channel_state_t s = *(dma_channel_state_t*) &DMAxCTL; - return s; - } - - async command void* DMA.getSource() { - return (void*)DMAxSA; - } - - async command void* DMA.getDestination() { - return (void*)DMAxDA; - } - - async command uint16_t DMA.getSize() { - return DMAxSZ; - } - - async command dma_channel_trigger_t DMA.getTrigger() { - dma_channel_trigger_t t; - t.trigger = ( DMACTL0 & DMAxTSEL_mask ) >> DMAxTSEL_shift; - return t; - } - - async command void DMA.reset() { - DMAxCTL = 0; - DMAxSA = 0; - DMAxDA = 0; - DMAxSZ = 0; - } -} - diff --git a/tos/chips/msp430X/dma/Msp430Dma.h b/tos/chips/msp430X/dma/Msp430Dma.h deleted file mode 100644 index 838a024620..0000000000 --- a/tos/chips/msp430X/dma/Msp430Dma.h +++ /dev/null @@ -1,231 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Mark Hays - * @author Xavier Orduna - * $Revision: 1.5 $ $Date: 2007/11/08 21:34:42 $ - */ - -#ifndef MSP430DMA_H -#define MSP430DMA_H - -// General stuff -enum { - DMA_CHANNELS = 3 -}; - -enum { - DMA_CHANNEL0 = 0, - DMA_CHANNEL1 = 1, - DMA_CHANNEL2 = 2, - DMA_CHANNEL_UNKNOWN = 3 -}; - -enum { - DMA_CHANNEL_AVAILABLE = 0, - DMA_CHANNEL_IN_USE = 1 -}; - -//////////////////////////////////////// -// Per-channel fields in DMACTL0 -enum { - DMA0TSEL_SHIFT = 0, - DMA1TSEL_SHIFT = 4, - DMA2TSEL_SHIFT = 8, - DMATSEL_MASK = (uint16_t)0xf, - DMA0TSEL_MASK = ( 0xf ), - DMA1TSEL_MASK = ( 0xf0 ), - DMA2TSEL_MASK = ( 0xf00 ), -}; - -// Per-field (channel) in DMACTL0 -typedef enum { - DMA_TRIGGER_DMAREQ = 0x0, // software trigger - DMA_TRIGGER_TACCR2 = 0x1, - DMA_TRIGGER_TBCCR2 = 0x2, - DMA_TRIGGER_UCA0RXIFG = 0x3, // RX on USCIA0 (UART/SPI) - DMA_TRIGGER_UCA0TXIFG = 0x4, // TX on USCIA0 (UART/SPI) - DMA_TRIGGER_DAC12IFG = 0x5, // DAC12_0CTL DAC12IFG bit - DMA_TRIGGER_ADC12IFGx = 0x6, - DMA_TRIGGER_TACCR0 = 0x7, // CCIFG bit - DMA_TRIGGER_TBCCR0 = 0x8, // CCIFG bit - DMA_TRIGGER_UCB0RXIFG = 0x9, // RX on USCIB0 (UART/SPI) - DMA_TRIGGER_UCB0TXIFG = 0xa, // TX on USCIB0 (UART/SPI) - DMA_TRIGGER_MULT = 0xb, // Hardware Multiplier Ready - DMA_TRIGGER_DMAxIFG = 0xe, // DMA0IFG triggers DMA channel 1 - // DMA1IFG triggers DMA channel 2 - // DMA2IFG triggers DMA channel 0 - DMA_TRIGGER_DMAE0 = 0xf // External Trigger DMAE0 -} dma_trigger_t; - -typedef struct dma_channel_trigger_s { - unsigned int trigger : 4; - unsigned int reserved : 12; -} __attribute__ ((packed)) dma_channel_trigger_t; - -//////////////////////////////////////// -// Bits in DMACTL1 -enum { - DISABLE_NMI = 0, - ENABLE_NMI = 1, -}; - -enum { - NOT_ROUND_ROBIN = 0, - ROUND_ROBIN = 1, -}; - -enum { - NOT_ON_FETCH = 0, - ON_FETCH = 1, -}; - -typedef struct dma_state_s { - unsigned int enableNMI : 1; - unsigned int roundRobin : 1; - unsigned int onFetch : 1; - unsigned int reserved : 13; -} __attribute__ ((packed)) dma_state_t; - -//////////////////////////////////////// -// Stuff in DMAxCTL - -// DMADTx -enum { - DMADT_SHIFT = 12, - DMADT_MASK = 0x7, -}; - -typedef enum { - DMA_SINGLE_TRANSFER = 0x0, - DMA_BLOCK_TRANSFER = 0x1, - DMA_BURST_BLOCK_TRANSFER = 0x2, - DMA_REPEATED_SINGLE_TRANSFER = 0x4, - DMA_REPEATED_BLOCK_TRANSFER = 0x5, - DMA_REPEATED_BURST_BLOCK_TRANSFER = 0x7 -} dma_transfer_mode_t; - -// DMA{SRC,DST}INCRx -enum { - DMASRCINCR_SHIFT = 8, - DMADSTINCR_SHIFT = 10, - DMAINCR_MASK = 0x3, -}; - -typedef enum { - DMA_ADDRESS_UNCHANGED = 0x0, - DMA_ADDRESS_DECREMENTED = 0x2, - DMA_ADDRESS_INCREMENTED = 0x3 -} dma_incr_t; - -typedef enum { - DMA_WORD = 0x0, - DMA_BYTE = 0x1 -} dma_byte_t; - -// DMALEVEL -typedef enum { - DMA_EDGE_SENSITIVE = 0x0, - DMA_LEVEL_SENSITIVE = 0x1 -} dma_level_t; - -typedef struct dma_channel_state_s { - unsigned int request : 1; - unsigned int abort : 1; - unsigned int interruptEnable : 1; - unsigned int interruptFlag : 1; - unsigned int enable : 1; - unsigned int level : 1; /* or edge- triggered */ - unsigned int srcByte : 1; /* or word */ - unsigned int dstByte : 1; - unsigned int srcIncrement : 2; /* or no-increment, decrement */ - unsigned int dstIncrement : 2; - unsigned int transferMode : 3; - unsigned int reserved2 : 1; -} __attribute__ ((packed)) dma_channel_state_t; - -#endif - diff --git a/tos/chips/msp430X/dma/Msp430DmaC.nc b/tos/chips/msp430X/dma/Msp430DmaC.nc deleted file mode 100644 index f8515e7aaa..0000000000 --- a/tos/chips/msp430X/dma/Msp430DmaC.nc +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Implementation of the HAL level component for the MSP430 DMA module. - * This configuration provides the available DMA channels through the - * MSP430DMA parameterized interface. If more channels are requested - * than available through unique("DMA"), there will be no mapping for - * that channel and compilation will fail. - * - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:07 $ - */ - -configuration Msp430DmaC { - - provides interface Msp430DmaControl as Control; - provides interface Msp430DmaChannel as Channel0; - provides interface Msp430DmaChannel as Channel1; - provides interface Msp430DmaChannel as Channel2; - -} -implementation { - - components HplMsp430DmaC as HplDmaC; - - components new Msp430DmaChannelP() as Channel0P; - Channel0 = Channel0P; - Channel0P.HplChannel -> HplDmaC.Channel0; - - components new Msp430DmaChannelP() as Channel1P; - Channel1 = Channel1P; - Channel1P.HplChannel -> HplDmaC.Channel1; - - components new Msp430DmaChannelP() as Channel2P; - Channel2 = Channel2P; - Channel2P.HplChannel -> HplDmaC.Channel2; - - components Msp430DmaControlP as ControlP; - Control = ControlP; - ControlP.HplControl -> HplDmaC; - ControlP.HplChannel0 -> HplDmaC.Channel0; - ControlP.HplChannel1 -> HplDmaC.Channel1; - ControlP.HplChannel2 -> HplDmaC.Channel2; - -} diff --git a/tos/chips/msp430X/dma/Msp430DmaChannel.nc b/tos/chips/msp430X/dma/Msp430DmaChannel.nc deleted file mode 100644 index 4d7d7165e1..0000000000 --- a/tos/chips/msp430X/dma/Msp430DmaChannel.nc +++ /dev/null @@ -1,98 +0,0 @@ -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @author Joe Polastre - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:07 $ - */ - -#include "Msp430Dma.h" - -interface Msp430DmaChannel { - - /** - * Setup a transfer using explicit argument (most robust and simple - * mechanism and recommended for novice users) - * - * See MSP430DMA.h for parameter options - */ - async command error_t setupTransfer( dma_transfer_mode_t transfer_mode, - dma_trigger_t trigger, - dma_level_t level, - void *src_addr, - void *dst_addr, - uint16_t size, - dma_byte_t src_byte, - dma_byte_t dst_byte, - dma_incr_t src_incr, - dma_incr_t dst_incr ); - - /** - * Raw interface for setting up a DMA transfer. This function is - * intended to provide as much raw performance as possible but - * sacrifices type checking in the process. Recommended ONLY for - * advanced users that have very intricate knowledge of the MSP430 - * DMA module described in the user's guide. - * - * @param state The control register value, as specified by - * dma_control_state_t in MSP430DMA.h - * @param trigger The trigger for the DMA transfer. Should be one - * of the options from dma_trigger_t in MSP430DMA.h - * @param src Pointer to the source address - * @param dest Pointer to the destination address - * @param size Size of the DMA transfer - * - * See MSP430DMA.h for parameter options - */ - async command void setupTransferRaw( uint16_t state, uint16_t trigger, - void* src, void* dest, int size ); - - /** - * Enable the DMA module. Equivalent to setting the DMA enable bit. - * This function does not force a transfer. - */ - async command error_t startTransfer(); - - /** - * Repeat a DMA transfer using previous settings but new pointers - * and transfer size. Automatically starts the transfer (sets the - * enable bit). - */ - async command error_t repeatTransfer( void *src_addr, void *dst_addr, - uint16_t size ); - - /** - * Trigger a DMA transfer using software - */ - async command error_t softwareTrigger(); - - /** - * Stop a DMA transfer in progress - */ - async command error_t stopTransfer(); - - /** - * Notification that the transfer has completed - */ - async event void transferDone(error_t success); - -} diff --git a/tos/chips/msp430X/dma/Msp430DmaChannelP.nc b/tos/chips/msp430X/dma/Msp430DmaChannelP.nc deleted file mode 100644 index beb5a463b7..0000000000 --- a/tos/chips/msp430X/dma/Msp430DmaChannelP.nc +++ /dev/null @@ -1,149 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:10 $ - */ - -#include "Msp430Dma.h" - -generic module Msp430DmaChannelP() { - - provides interface Msp430DmaChannel as Channel; - uses interface HplMsp430DmaChannel as HplChannel; - -} - -implementation { - - norace dma_channel_state_t gChannelState; - norace dma_channel_trigger_t gChannelTrigger; - - async command void Channel.setupTransferRaw( uint16_t s, uint16_t t, - void* src, void* dest, - int size ) { - call HplChannel.setStateRaw( s, t, src, dest, size ); - } - - async command error_t Channel.setupTransfer( dma_transfer_mode_t transfer_mode, - dma_trigger_t trigger, - dma_level_t level, - void *src_addr, - void *dst_addr, - uint16_t size, - dma_byte_t src_byte, - dma_byte_t dst_byte, - dma_incr_t src_incr, - dma_incr_t dst_incr ) { - - gChannelState.request = 0; - gChannelState.abort = 0; - gChannelState.interruptEnable = 1; - gChannelState.interruptFlag = 0; - gChannelState.enable = 0; /* don't start an xfer */ - gChannelState.level = level; - gChannelState.srcByte = src_byte; - gChannelState.dstByte = dst_byte; - gChannelState.srcIncrement = src_incr; - gChannelState.dstIncrement = dst_incr; - gChannelState.transferMode = transfer_mode; - - gChannelTrigger.trigger = trigger; - - call HplChannel.setState( gChannelState, gChannelTrigger, - src_addr, dst_addr, size ); - - return SUCCESS; - - } - - async command error_t Channel.startTransfer() { - call HplChannel.enableDMA(); - return SUCCESS; - } - - async command error_t Channel.repeatTransfer( void *src_addr, - void *dst_addr, - uint16_t size ) { - call HplChannel.setSrc( src_addr ); - call HplChannel.setDst(dst_addr); - call HplChannel.setSize(size); - call HplChannel.enableDMA(); - return SUCCESS; - } - - async command error_t Channel.softwareTrigger() { - if (gChannelTrigger.trigger != DMA_TRIGGER_DMAREQ) - return FAIL; - call HplChannel.triggerDMA(); - return SUCCESS; - } - - async command error_t Channel.stopTransfer() { - if ( gChannelState.transferMode != DMA_BURST_BLOCK_TRANSFER || - gChannelState.transferMode != DMA_REPEATED_BURST_BLOCK_TRANSFER) - return FAIL; - call HplChannel.disableDMA(); - return SUCCESS; - - } - - async event void HplChannel.transferDone( error_t error ) { - signal Channel.transferDone( error ); - } - - default async event void Channel.transferDone( error_t error ) {} - -} diff --git a/tos/chips/msp430X/dma/Msp430DmaControl.nc b/tos/chips/msp430X/dma/Msp430DmaControl.nc deleted file mode 100644 index ce5d2fddc7..0000000000 --- a/tos/chips/msp430X/dma/Msp430DmaControl.nc +++ /dev/null @@ -1,33 +0,0 @@ -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:10 $ - */ - -#include "Msp430Dma.h" - -interface Msp430DmaControl { - async command void init(); - async command void setFlags( bool enable_nmi, bool round_robin, - bool on_fetch); -} diff --git a/tos/chips/msp430X/dma/Msp430DmaControlP.nc b/tos/chips/msp430X/dma/Msp430DmaControlP.nc deleted file mode 100644 index daecd606da..0000000000 --- a/tos/chips/msp430X/dma/Msp430DmaControlP.nc +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:10 $ - */ - -#include "Msp430Dma.h" - -module Msp430DmaControlP { - - provides interface Msp430DmaControl as Control; - - uses interface HplMsp430DmaControl as HplControl; - uses interface HplMsp430DmaChannel as HplChannel0; - uses interface HplMsp430DmaChannel as HplChannel1; - uses interface HplMsp430DmaChannel as HplChannel2; - -} - -implementation { - - async command void Control.init() { - call HplControl.reset(); - call HplChannel0.reset(); - call HplChannel1.reset(); - call HplChannel2.reset(); - } - - async command void Control.setFlags( bool enable_nmi, bool round_robin, - bool on_fetch ) { - - // NOTE: on_fetch must be true when dst addr is flash - - if (enable_nmi) call HplControl.setENNMI(); - else call HplControl.clearENNMI(); - if (round_robin) call HplControl.setRoundRobin(); - else call HplControl.clearRoundRobin(); - if (on_fetch) call HplControl.setOnFetch(); - else call HplControl.clearOnFetch(); - - } - - async event void HplChannel0.transferDone( error_t error ) {} - async event void HplChannel1.transferDone( error_t error ) {} - async event void HplChannel2.transferDone( error_t error ) {} - -} diff --git a/tos/chips/msp430X/msp430hardware.h b/tos/chips/msp430X/msp430hardware.h deleted file mode 100755 index 2fa3f4c782..0000000000 --- a/tos/chips/msp430X/msp430hardware.h +++ /dev/null @@ -1,245 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -// @author Vlado Handziski -// @author Joe Polastre -// @author Cory Sharp - -#ifndef _H_msp430hardware_h -#define _H_msp430hardware_h - -#include -#include -#include "msp430regtypes.h" - - -// CPU memory-mapped register access will cause nesc to issue race condition -// warnings. Race conditions are a significant conern when accessing CPU -// memory-mapped registers, because they can change even while interrupts -// are disabled. This means that the standard nesc tools for resolving race -// conditions, atomic statements that disable interrupt handling, do not -// resolve CPU register race conditions. So, CPU registers access must be -// treated seriously and carefully. - -// The macro MSP430REG_NORACE allows individual modules to internally -// redeclare CPU registers as norace, eliminating nesc's race condition -// warnings for their access. This macro should only be used after the -// specific CPU register use has been verified safe and correct. Example -// use: -// -// module MyLowLevelModule -// { -// // ... -// } -// implementation -// { -// MSP430REG_NORACE(TACCTL0); -// // ... -// } - -#undef norace - -#define MSP430REG_NORACE_EXPAND(type,name,addr) \ -norace static volatile type name asm(#addr) - -#define MSP430REG_NORACE3(type,name,addr) \ -MSP430REG_NORACE_EXPAND(type,name,addr) - -// MSP430REG_NORACE and MSP430REG_NORACE2 presume naming conventions among -// type, name, and addr, which are defined in the local header -// msp430regtypes.h and mspgcc's header io.h and its children. - -#define MSP430REG_NORACE2(rename,name) \ -MSP430REG_NORACE3(TYPE_##name,rename,name##_) - -#define MSP430REG_NORACE(name) \ -MSP430REG_NORACE3(TYPE_##name,name,name##_) - -// Avoid the type-punned pointer warnings from gcc 3.3, which are warning about -// creating potentially broken object code. Union casts are the appropriate work -// around. Unfortunately, they require a function definiton. -#define DEFINE_UNION_CAST(func_name,to_type,from_type) \ -to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f:x}; return c.t; } - -// redefine ugly defines from msp-gcc -#ifndef DONT_REDEFINE_SR_FLAGS -#undef C -#undef Z -#undef N -#undef V -#undef GIE -#undef CPUOFF -#undef OSCOFF -#undef SCG0 -#undef SCG1 -#undef LPM0_bits -#undef LPM1_bits -#undef LPM2_bits -#undef LPM3_bits -#undef LPM4_bits -#define SR_C 0x0001 -#define SR_Z 0x0002 -#define SR_N 0x0004 -#define SR_V 0x0100 -#define SR_GIE 0x0008 -#define SR_CPUOFF 0x0010 -#define SR_OSCOFF 0x0020 -#define SR_SCG0 0x0040 -#define SR_SCG1 0x0080 -#define LPM0_bits SR_CPUOFF -#define LPM1_bits SR_SCG0+SR_CPUOFF -#define LPM2_bits SR_SCG1+SR_CPUOFF -#define LPM3_bits SR_SCG1+SR_SCG0+SR_CPUOFF -#define LPM4_bits SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF -#endif//DONT_REDEFINE_SR_FLAGS - -#ifdef interrupt -#undef interrupt -#endif - -#ifdef wakeup -#undef wakeup -#endif - -#ifdef signal -#undef signal -#endif - - -// Re-definitions for safe tinyOS -// These rely on io.h being included at the top of this file -// thus pulling the affected header files before the re-definitions -#ifdef SAFE_TINYOS -#undef ADC12MEM -#define ADC12MEM TCAST(int* ONE, ADC12MEM_) /* ADC12 Conversion Memory (for C) */ -#undef ADC12MCTL -#define ADC12MCTL TCAST(char * ONE, ADC12MCTL_) -#endif - -// define platform constants that can be changed for different compilers -// these are all msp430-gcc specific (add as necessary) - -#ifdef __msp430_headers_adc10_h -#define __msp430_have_adc10 -#endif - -#ifdef __msp430_headers_adc12_h -#define __msp430_have_adc12 -#endif - -/* -// backwards compatibility to older versions of the header files -#ifdef __MSP430_HAS_I2C__ -#define __msp430_have_usart0_with_i2c -#endif - -// I2CBusy flag is not defined by current MSP430-GCC -#ifdef __msp430_have_usart0_with_i2c -#ifndef I2CBUSY -#define I2CBUSY (0x01 << 5) -#endif -MSP430REG_NORACE2(U0CTLnr,U0CTL); -MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL); -MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL); -#endif -*/ - -// The signal attribute has opposite meaning in msp430-gcc than in avr-gcc -#define TOSH_SIGNAL(signame) \ - void sig_##signame() __attribute__((interrupt (signame), wakeup)) @C() - -// TOSH_INTERRUPT allows nested interrupts -#define TOSH_INTERRUPT(signame) \ - void isr_##signame() __attribute__((interrupt (signame), signal, wakeup)) @C() - - -#define SET_FLAG(port, flag) ((port) |= (flag)) -#define CLR_FLAG(port, flag) ((port) &= ~(flag)) -#define READ_FLAG(port, flag) ((port) & (flag)) - -// TOSH_ASSIGN_PIN creates functions that are effectively marked as -// "norace". This means race conditions that result from their use will not -// be detectde by nesc. - -#define TOSH_ASSIGN_PIN_HEX(name, port, hex) \ -void TOSH_SET_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \ -void TOSH_CLR_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r &= ~hex; } \ -void TOSH_TOGGLE_##name##_PIN() @safe(){ MSP430REG_NORACE2(r,P##port##OUT); r ^= hex; } \ -uint8_t TOSH_READ_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##IN); return (r & hex); } \ -void TOSH_MAKE_##name##_OUTPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r |= hex; } \ -void TOSH_MAKE_##name##_INPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r &= ~hex; } \ -void TOSH_SEL_##name##_MODFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r |= hex; } \ -void TOSH_SEL_##name##_IOFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r &= ~hex; } - -#define TOSH_ASSIGN_PIN(name, port, bit) \ -TOSH_ASSIGN_PIN_HEX(name,port,(1<<(bit))) - -typedef uint8_t mcu_power_t @combine("mcombine"); -mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() { - return (m1 < m2) ? m1: m2; -} -enum { - MSP430_POWER_ACTIVE = 0, - MSP430_POWER_LPM0 = 1, - MSP430_POWER_LPM1 = 2, - MSP430_POWER_LPM2 = 3, - MSP430_POWER_LPM3 = 4, - MSP430_POWER_LPM4 = 5 -}; - -void __nesc_disable_interrupt(void) @safe() -{ - dint(); - nop(); -} - -void __nesc_enable_interrupt(void) @safe() -{ - eint(); -} - -typedef bool __nesc_atomic_t; -__nesc_atomic_t __nesc_atomic_start(void); -void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts); - -#ifndef NESC_BUILD_BINARY -/* @spontaneous() functions should not be included when NESC_BUILD_BINARY - is #defined, to avoid duplicate functions definitions wheb binary - components are used. Such functions do need a prototype in all cases, - though. */ -__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() -{ - __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0); - __nesc_disable_interrupt(); - asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ - return result; -} - -void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe() -{ - asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ - if( reenable_interrupts ) - __nesc_enable_interrupt(); -} -#endif - -#endif//_H_msp430hardware_h - diff --git a/tos/chips/msp430X/msp430regtypes.h b/tos/chips/msp430X/msp430regtypes.h deleted file mode 100644 index dc3c48f3e5..0000000000 --- a/tos/chips/msp430X/msp430regtypes.h +++ /dev/null @@ -1,595 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/* - * @author Cory Sharp - * @author Xavier Orduna -*/ - -#ifndef _H_msp430regtypes_h -#define _H_msp430regtypes_h - -/* - To generate the primary contents of this file seen below, in - mspgcc/msp430/include/, execute the following command: - - find . | xargs perl -ne ' - BEGIN { %t = qw(b uint8_t w uint16_t); } - if( /\bsfr([bw])\s*\(\s*(\w+)/ && length($2) > 1 ) { - $r{$2} = $t{$1}; - print "#define TYPE_$2 $t{$1}\n" if /\bsfr([bw])\s*\(\s*(\w+)/; - } elsif( /^#define\s+(\w+)\s+(\w+)\s+$/ ) { - print "#define TYPE_$1 $r{$2}\n" if $r{$2}; - } - ' | sort -u -*/ - -#define TYPE_ACTL uint16_t -#define TYPE_ADAT uint16_t -#define TYPE_ADC10AE uint8_t -#define TYPE_ADC10CTL0 uint16_t -#define TYPE_ADC10CTL1 uint16_t -#define TYPE_ADC10DTC0 uint8_t -#define TYPE_ADC10DTC1 uint8_t -#define TYPE_ADC10MEM uint16_t -#define TYPE_ADC10SA uint16_t -#define TYPE_ADC12CTL0 uint16_t -#define TYPE_ADC12CTL1 uint16_t -#define TYPE_ADC12IE uint16_t -#define TYPE_ADC12IFG uint16_t -#define TYPE_ADC12IV uint16_t -#define TYPE_ADC12MCTL0 uint8_t -#define TYPE_ADC12MCTL10 uint8_t -#define TYPE_ADC12MCTL11 uint8_t -#define TYPE_ADC12MCTL12 uint8_t -#define TYPE_ADC12MCTL13 uint8_t -#define TYPE_ADC12MCTL14 uint8_t -#define TYPE_ADC12MCTL15 uint8_t -#define TYPE_ADC12MCTL1 uint8_t -#define TYPE_ADC12MCTL2 uint8_t -#define TYPE_ADC12MCTL3 uint8_t -#define TYPE_ADC12MCTL4 uint8_t -#define TYPE_ADC12MCTL5 uint8_t -#define TYPE_ADC12MCTL6 uint8_t -#define TYPE_ADC12MCTL7 uint8_t -#define TYPE_ADC12MCTL8 uint8_t -#define TYPE_ADC12MCTL9 uint8_t -#define TYPE_ADC12MEM0 uint16_t -#define TYPE_ADC12MEM10 uint16_t -#define TYPE_ADC12MEM11 uint16_t -#define TYPE_ADC12MEM12 uint16_t -#define TYPE_ADC12MEM13 uint16_t -#define TYPE_ADC12MEM14 uint16_t -#define TYPE_ADC12MEM15 uint16_t -#define TYPE_ADC12MEM1 uint16_t -#define TYPE_ADC12MEM2 uint16_t -#define TYPE_ADC12MEM3 uint16_t -#define TYPE_ADC12MEM4 uint16_t -#define TYPE_ADC12MEM5 uint16_t -#define TYPE_ADC12MEM6 uint16_t -#define TYPE_ADC12MEM7 uint16_t -#define TYPE_ADC12MEM8 uint16_t -#define TYPE_ADC12MEM9 uint16_t -#define TYPE_AEN uint16_t -#define TYPE_AIN uint16_t -#define TYPE_BCSCTL1 uint8_t -#define TYPE_BCSCTL2 uint8_t -#define TYPE_BCSCTL3 uint8_t -#define TYPE_BTCNT1 uint8_t -#define TYPE_BTCNT2 uint8_t -#define TYPE_BTCTL uint8_t -#define TYPE_CACTL1 uint8_t -#define TYPE_CACTL2 uint8_t -#define TYPE_CALBC1_12MHZ uint8_t -#define TYPE_CALBC1_16MHZ uint8_t -#define TYPE_CALBC1_1MHZ uint8_t -#define TYPE_CALBC1_8MHZ uint8_t -#define TYPE_CALDCO_12MHZ uint8_t -#define TYPE_CALDCO_16MHZ uint8_t -#define TYPE_CALDCO_1MHZ uint8_t -#define TYPE_CALDCO_8MHZ uint8_t -#define TYPE_CAPD uint8_t -#define TYPE_CBCTL uint8_t -#define TYPE_CCR0 uint16_t -#define TYPE_CCR1 uint16_t -#define TYPE_CCR2 uint16_t -#define TYPE_CCTL0 uint16_t -#define TYPE_CCTL1 uint16_t -#define TYPE_CCTL2 uint16_t -#define TYPE_DAC12_0CTL uint16_t -#define TYPE_DAC12_0DAT uint16_t -#define TYPE_DAC12_1CTL uint16_t -#define TYPE_DAC12_1DAT uint16_t -#define TYPE_DCOCTL uint8_t -#define TYPE_DMA0CTL uint16_t -#define TYPE_DMA0DAL uint16_t -#define TYPE_DMA0DA uint16_t -#define TYPE_DMA0SAL uint16_t -#define TYPE_DMA0SA uint16_t -#define TYPE_DMA0SZ uint16_t -#define TYPE_DMA1CTL uint16_t -#define TYPE_DMA1DAL uint16_t -#define TYPE_DMA1DA uint16_t -#define TYPE_DMA1SAL uint16_t -#define TYPE_DMA1SA uint16_t -#define TYPE_DMA1SZ uint16_t -#define TYPE_DMA2CTL uint16_t -#define TYPE_DMA2DAL uint16_t -#define TYPE_DMA2DA uint16_t -#define TYPE_DMA2SAL uint16_t -#define TYPE_DMA2SA uint16_t -#define TYPE_DMA2SZ uint16_t -#define TYPE_DMACTL0 uint16_t -#define TYPE_DMACTL1 uint16_t -#define TYPE_EPCTL uint8_t -#define TYPE_ESPCTL uint16_t -#define TYPE_FCTL1 uint16_t -#define TYPE_FCTL2 uint16_t -#define TYPE_FCTL3 uint16_t -#define TYPE_FLL_CTL0 uint8_t -#define TYPE_FLL_CTL1 uint8_t -#define TYPE_I2CDCTL uint8_t -#define TYPE_I2CDRB uint8_t -#define TYPE_I2CDR uint8_t -#define TYPE_I2CDRW uint16_t -#define TYPE_I2CIE uint8_t -#define TYPE_I2CIFG uint8_t -#define TYPE_I2CIV uint16_t -#define TYPE_I2CNDAT uint8_t -#define TYPE_I2COA uint16_t -#define TYPE_I2CPSC uint8_t -#define TYPE_I2CSA uint16_t -#define TYPE_I2CSCLH uint8_t -#define TYPE_I2CSCLL uint8_t -#define TYPE_I2CTCTL uint8_t -#define TYPE_IE1 uint8_t -#define TYPE_IE2 uint8_t -#define TYPE_IFG1 uint8_t -#define TYPE_IFG2 uint8_t -#define TYPE_LCDACTL uint8_t -#define TYPE_LCDAPCTL0 uint8_t -#define TYPE_LCDAPCTL1 uint8_t -#define TYPE_LCDAVCTL0 uint8_t -#define TYPE_LCDAVCTL1 uint8_t -#define TYPE_LCDCTL uint8_t -#define TYPE_LCDM10 uint8_t -#define TYPE_LCDM11 uint8_t -#define TYPE_LCDM12 uint8_t -#define TYPE_LCDM13 uint8_t -#define TYPE_LCDM14 uint8_t -#define TYPE_LCDM15 uint8_t -#define TYPE_LCDM16 uint8_t -#define TYPE_LCDM17 uint8_t -#define TYPE_LCDM18 uint8_t -#define TYPE_LCDM19 uint8_t -#define TYPE_LCDM1 uint8_t -#define TYPE_LCDM20 uint8_t -#define TYPE_LCDM2 uint8_t -#define TYPE_LCDM3 uint8_t -#define TYPE_LCDM4 uint8_t -#define TYPE_LCDM5 uint8_t -#define TYPE_LCDM6 uint8_t -#define TYPE_LCDM7 uint8_t -#define TYPE_LCDM8 uint8_t -#define TYPE_LCDM9 uint8_t -#define TYPE_LCDMA uint8_t -#define TYPE_LCDMB uint8_t -#define TYPE_LCDMC uint8_t -#define TYPE_LCDMD uint8_t -#define TYPE_LCDME uint8_t -#define TYPE_LCDMF uint8_t -#define TYPE_MACS uint16_t -#define TYPE_MAC uint16_t -#define TYPE_MBCTL uint16_t -#define TYPE_MBIN0 uint16_t -#define TYPE_MBIN1 uint16_t -#define TYPE_MBOUT0 uint16_t -#define TYPE_MBOUT1 uint16_t -#define TYPE_ME1 uint8_t -#define TYPE_ME2 uint8_t -#define TYPE_MPYS uint16_t -#define TYPE_MPY uint16_t -#define TYPE_OA0CTL0 uint8_t -#define TYPE_OA0CTL1 uint8_t -#define TYPE_OA1CTL0 uint8_t -#define TYPE_OA1CTL1 uint8_t -#define TYPE_OA2CTL0 uint8_t -#define TYPE_OA2CTL1 uint8_t -#define TYPE_OP2 uint16_t -#define TYPE_PORT_OUT uint8_t -#define TYPE_PORT_IN uint8_t -#define TYPE_PORT_DIR uint8_t -#define TYPE_PORT_SEL uint8_t -#define TYPE_P0DIR uint8_t -#define TYPE_P0IES uint8_t -#define TYPE_P0IE uint8_t -#define TYPE_P0IFG uint8_t -#define TYPE_P0IN uint8_t -#define TYPE_P0OUT uint8_t -#define TYPE_P10DIR uint8_t -#define TYPE_P10IN uint8_t -#define TYPE_P10OUT uint8_t -#define TYPE_P10SEL uint8_t -#define TYPE_P1DIR uint8_t -#define TYPE_P1IES uint8_t -#define TYPE_P1IE uint8_t -#define TYPE_P1IFG uint8_t -#define TYPE_P1IN uint8_t -#define TYPE_P1OUT uint8_t -#define TYPE_P1REN uint8_t -#define TYPE_P1SEL uint8_t -#define TYPE_P2DIR uint8_t -#define TYPE_P2IES uint8_t -#define TYPE_P2IE uint8_t -#define TYPE_P2IFG uint8_t -#define TYPE_P2IN uint8_t -#define TYPE_P2OUT uint8_t -#define TYPE_P2REN uint8_t -#define TYPE_P2SEL uint8_t -#define TYPE_P3DIR uint8_t -#define TYPE_P3IN uint8_t -#define TYPE_P3OUT uint8_t -#define TYPE_P3REN uint8_t -#define TYPE_P3SEL uint8_t -#define TYPE_P4DIR uint8_t -#define TYPE_P4IN uint8_t -#define TYPE_P4OUT uint8_t -#define TYPE_P4REN uint8_t -#define TYPE_P4SEL uint8_t -#define TYPE_P5DIR uint8_t -#define TYPE_P5IN uint8_t -#define TYPE_P5OUT uint8_t -#define TYPE_P5REN uint8_t -#define TYPE_P5SEL uint8_t -#define TYPE_P6DIR uint8_t -#define TYPE_P6IN uint8_t -#define TYPE_P6OUT uint8_t -#define TYPE_P6REN uint8_t -#define TYPE_P6SEL uint8_t -#define TYPE_P7DIR uint8_t -#define TYPE_P7IN uint8_t -#define TYPE_P7OUT uint8_t -#define TYPE_P7SEL uint8_t -#define TYPE_P8DIR uint8_t -#define TYPE_P8IN uint8_t -#define TYPE_P8OUT uint8_t -#define TYPE_P8SEL uint8_t -#define TYPE_P9DIR uint8_t -#define TYPE_P9IN uint8_t -#define TYPE_P9OUT uint8_t -#define TYPE_P9SEL uint8_t -#define TYPE_PAIN uint8_t -#define TYPE_PBIN uint8_t -#define TYPE_RESHI uint16_t -#define TYPE_RESLO uint16_t -#define TYPE_RET0 uint16_t -#define TYPE_RET10 uint16_t -#define TYPE_RET11 uint16_t -#define TYPE_RET12 uint16_t -#define TYPE_RET13 uint16_t -#define TYPE_RET14 uint16_t -#define TYPE_RET15 uint16_t -#define TYPE_RET16 uint16_t -#define TYPE_RET17 uint16_t -#define TYPE_RET18 uint16_t -#define TYPE_RET19 uint16_t -#define TYPE_RET1 uint16_t -#define TYPE_RET20 uint16_t -#define TYPE_RET21 uint16_t -#define TYPE_RET22 uint16_t -#define TYPE_RET23 uint16_t -#define TYPE_RET24 uint16_t -#define TYPE_RET25 uint16_t -#define TYPE_RET26 uint16_t -#define TYPE_RET27 uint16_t -#define TYPE_RET28 uint16_t -#define TYPE_RET29 uint16_t -#define TYPE_RET2 uint16_t -#define TYPE_RET30 uint16_t -#define TYPE_RET31 uint16_t -#define TYPE_RET3 uint16_t -#define TYPE_RET4 uint16_t -#define TYPE_RET5 uint16_t -#define TYPE_RET6 uint16_t -#define TYPE_RET7 uint16_t -#define TYPE_RET8 uint16_t -#define TYPE_RET9 uint16_t -#define TYPE_RTCCTL uint8_t -#define TYPE_RTCDAY uint8_t -#define TYPE_RTCDOW uint8_t -#define TYPE_RTCHOUR uint8_t -#define TYPE_RTCMIN uint8_t -#define TYPE_RTCMON uint8_t -#define TYPE_RTCNT1 uint8_t -#define TYPE_RTCNT2 uint8_t -#define TYPE_RTCNT3 uint8_t -#define TYPE_RTCNT4 uint8_t -#define TYPE_RTCSEC uint8_t -#define TYPE_RTCTL uint8_t -#define TYPE_RTCYEARH uint8_t -#define TYPE_RTCYEARL uint8_t -#define TYPE_RXBUF_0 uint8_t -#define TYPE_RXBUF0 uint8_t -#define TYPE_RXBUF_1 uint8_t -#define TYPE_RXBUF1 uint8_t -#define TYPE_RXBUF uint8_t -#define TYPE_SCFI0 uint8_t -#define TYPE_SCFI1 uint8_t -#define TYPE_SCFQCTL uint8_t -#define TYPE_SD16AE uint8_t -#define TYPE_SD16CCTL0 uint16_t -#define TYPE_SD16CCTL1 uint16_t -#define TYPE_SD16CCTL2 uint16_t -#define TYPE_SD16CONF0 uint8_t -#define TYPE_SD16CONF1 uint8_t -#define TYPE_SD16CTL uint16_t -#define TYPE_SD16INCTL0 uint8_t -#define TYPE_SD16INCTL1 uint8_t -#define TYPE_SD16INCTL2 uint8_t -#define TYPE_SD16IV uint16_t -#define TYPE_SD16MEM0 uint16_t -#define TYPE_SD16MEM1 uint16_t -#define TYPE_SD16MEM2 uint16_t -#define TYPE_SD16PRE0 uint8_t -#define TYPE_SD16PRE1 uint8_t -#define TYPE_SD16PRE2 uint8_t -#define TYPE_SIFCNT uint16_t -#define TYPE_SIFCTL0 uint16_t -#define TYPE_SIFCTL1 uint16_t -#define TYPE_SIFCTL2 uint16_t -#define TYPE_SIFCTL3 uint16_t -#define TYPE_SIFCTL4 uint16_t -#define TYPE_SIFDACR0 uint16_t -#define TYPE_SIFDACR1 uint16_t -#define TYPE_SIFDACR2 uint16_t -#define TYPE_SIFDACR3 uint16_t -#define TYPE_SIFDACR4 uint16_t -#define TYPE_SIFDACR5 uint16_t -#define TYPE_SIFDACR6 uint16_t -#define TYPE_SIFDACR7 uint16_t -#define TYPE_SIFDEBUG uint16_t -#define TYPE_SIFTPSMV uint16_t -#define TYPE_SIFTSM0 uint16_t -#define TYPE_SIFTSM10 uint16_t -#define TYPE_SIFTSM11 uint16_t -#define TYPE_SIFTSM12 uint16_t -#define TYPE_SIFTSM13 uint16_t -#define TYPE_SIFTSM14 uint16_t -#define TYPE_SIFTSM15 uint16_t -#define TYPE_SIFTSM16 uint16_t -#define TYPE_SIFTSM17 uint16_t -#define TYPE_SIFTSM18 uint16_t -#define TYPE_SIFTSM19 uint16_t -#define TYPE_SIFTSM1 uint16_t -#define TYPE_SIFTSM20 uint16_t -#define TYPE_SIFTSM21 uint16_t -#define TYPE_SIFTSM22 uint16_t -#define TYPE_SIFTSM23 uint16_t -#define TYPE_SIFTSM2 uint16_t -#define TYPE_SIFTSM3 uint16_t -#define TYPE_SIFTSM4 uint16_t -#define TYPE_SIFTSM5 uint16_t -#define TYPE_SIFTSM6 uint16_t -#define TYPE_SIFTSM7 uint16_t -#define TYPE_SIFTSM8 uint16_t -#define TYPE_SIFTSM9 uint16_t -#define TYPE_SUMEXT uint16_t -#define TYPE_SVSCTL uint8_t -#define TYPE_SWCTL uint8_t -#define TYPE_TA0CCR0 uint16_t -#define TYPE_TA0CCR1 uint16_t -#define TYPE_TA0CCR2 uint16_t -#define TYPE_TA0CCTL0 uint16_t -#define TYPE_TA0CCTL1 uint16_t -#define TYPE_TA0CCTL2 uint16_t -#define TYPE_TA0CTL uint16_t -#define TYPE_TA0IV uint16_t -#define TYPE_TA0R uint16_t -#define TYPE_TA1CCR0 uint16_t -#define TYPE_TA1CCR1 uint16_t -#define TYPE_TA1CCR2 uint16_t -#define TYPE_TA1CCR3 uint16_t -#define TYPE_TA1CCR4 uint16_t -#define TYPE_TA1CCTL0 uint16_t -#define TYPE_TA1CCTL1 uint16_t -#define TYPE_TA1CCTL2 uint16_t -#define TYPE_TA1CCTL3 uint16_t -#define TYPE_TA1CCTL4 uint16_t -#define TYPE_TA1CTL uint16_t -#define TYPE_TA1IV uint16_t -#define TYPE_TACCR0 uint16_t -#define TYPE_TACCR1 uint16_t -#define TYPE_TACCR2 uint16_t -#define TYPE_TACCTL0 uint16_t -#define TYPE_TACCTL1 uint16_t -#define TYPE_TACCTL2 uint16_t -#define TYPE_TACTL uint16_t -#define TYPE_TAIV uint16_t -#define TYPE_TAR1 uint16_t -#define TYPE_TAR uint16_t -#define TYPE_TBCCR0 uint16_t -#define TYPE_TBCCR1 uint16_t -#define TYPE_TBCCR2 uint16_t -#define TYPE_TBCCR3 uint16_t -#define TYPE_TBCCR4 uint16_t -#define TYPE_TBCCR5 uint16_t -#define TYPE_TBCCR6 uint16_t -#define TYPE_TBCCTL0 uint16_t -#define TYPE_TBCCTL1 uint16_t -#define TYPE_TBCCTL2 uint16_t -#define TYPE_TBCCTL3 uint16_t -#define TYPE_TBCCTL4 uint16_t -#define TYPE_TBCCTL5 uint16_t -#define TYPE_TBCCTL6 uint16_t -#define TYPE_TBCTL uint16_t -#define TYPE_TBIV uint16_t -#define TYPE_TBR uint16_t -#define TYPE_TCCTL uint8_t -#define TYPE_TLV_ADC12_1_LEN uint8_t -#define TYPE_TLV_ADC12_1_TAG uint8_t -#define TYPE_TLV_CHECKSUM uint16_t -#define TYPE_TLV_DCO_30_LEN uint8_t -#define TYPE_TLV_DCO_30_TAG uint8_t -#define TYPE_TPCNT1 uint8_t -#define TYPE_TPCNT2 uint8_t -#define TYPE_TPCTL uint8_t -#define TYPE_TPD uint8_t -#define TYPE_TPE uint8_t -#define TYPE_TXBUF_0 uint8_t -#define TYPE_TXBUF0 uint8_t -#define TYPE_TXBUF_1 uint8_t -#define TYPE_TXBUF1 uint8_t -#define TYPE_TXBUF uint8_t -#define TYPE_U0BR0 uint8_t -#define TYPE_U0BR1 uint8_t -#define TYPE_U0CTL uint8_t -#define TYPE_U0MCTL uint8_t -#define TYPE_U0RCTL uint8_t -#define TYPE_U0RXBUF uint8_t -#define TYPE_U0TCTL uint8_t -#define TYPE_U0TXBUF uint8_t -#define TYPE_U1BR0 uint8_t -#define TYPE_U1BR1 uint8_t -#define TYPE_U1CTL uint8_t -#define TYPE_U1MCTL uint8_t -#define TYPE_U1RCTL uint8_t -#define TYPE_U1RXBUF uint8_t -#define TYPE_U1TCTL uint8_t -#define TYPE_U1TXBUF uint8_t -#define TYPE_UBR0_0 uint8_t -#define TYPE_UBR00 uint8_t -#define TYPE_UBR0_1 uint8_t -#define TYPE_UBR01 uint8_t -#define TYPE_UBR0 uint8_t -#define TYPE_UBR1_0 uint8_t -#define TYPE_UBR10 uint8_t -#define TYPE_UBR1_1 uint8_t -#define TYPE_UBR11 uint8_t -#define TYPE_UBR1 uint8_t -#define TYPE_UC0IE uint8_t -#define TYPE_UC0IFG uint8_t -#define TYPE_UC1IE uint8_t -#define TYPE_UC1IFG uint8_t -#define TYPE_UCA0ABCTL uint8_t -#define TYPE_UCA0BR0 uint8_t -#define TYPE_UCA0BR1 uint8_t -#define TYPE_UCA0CTL0 uint8_t -#define TYPE_UCA0CTL1 uint8_t -#define TYPE_UCA0IRRCTL uint8_t -#define TYPE_UCA0IRTCTL uint8_t -#define TYPE_UCA0MCTL uint8_t -#define TYPE_UCA0RXBUF uint8_t -#define TYPE_UCA0STAT uint8_t -#define TYPE_UCA0TXBUF uint8_t -#define TYPE_UCA1ABCTL uint8_t -#define TYPE_UCA1BR0 uint8_t -#define TYPE_UCA1BR1 uint8_t -#define TYPE_UCA1CTL0 uint8_t -#define TYPE_UCA1CTL1 uint8_t -#define TYPE_UCA1IRRCTL uint8_t -#define TYPE_UCA1IRTCTL uint8_t -#define TYPE_UCA1MCTL uint8_t -#define TYPE_UCA1RXBUF uint8_t -#define TYPE_UCA1STAT uint8_t -#define TYPE_UCA1TXBUF uint8_t -#define TYPE_UCB0BR0 uint8_t -#define TYPE_UCB0BR1 uint8_t -#define TYPE_UCB0CTL0 uint8_t -#define TYPE_UCB0CTL1 uint8_t -#define TYPE_UCB0I2CIE uint8_t -#define TYPE_UCB0I2COA uint16_t -#define TYPE_UCB0I2CSA uint16_t -#define TYPE_UCB0RXBUF uint8_t -#define TYPE_UCB0STAT uint8_t -#define TYPE_UCB0TXBUF uint8_t -#define TYPE_UCB1BR0 uint8_t -#define TYPE_UCB1BR1 uint8_t -#define TYPE_UCB1CTL0 uint8_t -#define TYPE_UCB1CTL1 uint8_t -#define TYPE_UCB1I2CIE uint8_t -#define TYPE_UCB1I2COA uint16_t -#define TYPE_UCB1I2CSA uint16_t -#define TYPE_UCB1RXBUF uint8_t -#define TYPE_UCB1STAT uint8_t -#define TYPE_UCB1TXBUF uint8_t -#define TYPE_UCTL_0 uint8_t -#define TYPE_UCTL0 uint8_t -#define TYPE_UCTL_1 uint8_t -#define TYPE_UCTL1 uint8_t -#define TYPE_UCTL uint8_t -#define TYPE_UMCTL_0 uint8_t -#define TYPE_UMCTL0 uint8_t -#define TYPE_UMCTL_1 uint8_t -#define TYPE_UMCTL1 uint8_t -#define TYPE_UMCTL uint8_t -#define TYPE_URCTL_0 uint8_t -#define TYPE_URCTL0 uint8_t -#define TYPE_URCTL_1 uint8_t -#define TYPE_URCTL1 uint8_t -#define TYPE_URCTL uint8_t -#define TYPE_USICCTL uint16_t -#define TYPE_USICKCTL uint8_t -#define TYPE_USICNT uint8_t -#define TYPE_USICTL0 uint8_t -#define TYPE_USICTL1 uint8_t -#define TYPE_USICTL uint16_t -#define TYPE_USISRH uint8_t -#define TYPE_USISRL uint8_t -#define TYPE_USISR uint16_t -#define TYPE_UTCTL_0 uint8_t -#define TYPE_UTCTL0 uint8_t -#define TYPE_UTCTL_1 uint8_t -#define TYPE_UTCTL1 uint8_t -#define TYPE_UTCTL uint8_t -#define TYPE_WDTCTL uint16_t - -#endif//_H_msp430regtypes_h - diff --git a/tos/chips/msp430X/pins/HplMsp430GeneralIO.nc b/tos/chips/msp430X/pins/HplMsp430GeneralIO.nc deleted file mode 100644 index d4d2cabeb1..0000000000 --- a/tos/chips/msp430X/pins/HplMsp430GeneralIO.nc +++ /dev/null @@ -1,100 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * HPL for the TI MSP430 family of microprocessors. This provides an - * abstraction for general-purpose I/O. - * - * @author Cory Sharp - */ - -interface HplMsp430GeneralIO -{ - /** - * Set pin to high. - */ - async command void set(); - - /** - * Set pin to low. - */ - async command void clr(); - - /** - * Toggle pin status. - */ - async command void toggle(); - - /** - * Get the port status that contains the pin. - * - * @return Status of the port that contains the given pin. The x'th - * pin on the port will be represented in the x'th bit. - */ - async command uint8_t getRaw(); - - /** - * Read pin value. - * - * @return TRUE if pin is high, FALSE otherwise. - */ - async command bool get(); - - /** - * Set pin direction to input. - */ - async command void makeInput(); - - async command bool isInput(); - - /** - * Set pin direction to output. - */ - async command void makeOutput(); - - async command bool isOutput(); - - /** - * Set pin for module specific functionality. - */ - async command void selectModuleFunc(); - - async command bool isModuleFunc(); - - /** - * Set pin for I/O functionality. - */ - async command void selectIOFunc(); - - async command bool isIOFunc(); - - /** - * Set pin pullup / pull down resistor. - */ - /* - async command void makeOutput(); - - async command bool isOutput(); - */ - - -} - diff --git a/tos/chips/msp430X/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430X/pins/HplMsp430GeneralIOC.nc deleted file mode 100644 index 861dc85fd4..0000000000 --- a/tos/chips/msp430X/pins/HplMsp430GeneralIOC.nc +++ /dev/null @@ -1,522 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * HPL for the TI MSP430 family of microprocessors. This provides an - * abstraction for general-purpose I/O. - * - * Added support for msp430X family - * @author Joe Polastre - * @author Xavier Orduna - */ - -configuration HplMsp430GeneralIOC -{ - // provides all the ports as raw ports -#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1_R__) - provides interface HplMsp430GeneralIO as Port10; - provides interface HplMsp430GeneralIO as Port11; - provides interface HplMsp430GeneralIO as Port12; - provides interface HplMsp430GeneralIO as Port13; - provides interface HplMsp430GeneralIO as Port14; - provides interface HplMsp430GeneralIO as Port15; - provides interface HplMsp430GeneralIO as Port16; - provides interface HplMsp430GeneralIO as Port17; -#endif - -#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2_R__) - provides interface HplMsp430GeneralIO as Port20; - provides interface HplMsp430GeneralIO as Port21; - provides interface HplMsp430GeneralIO as Port22; - provides interface HplMsp430GeneralIO as Port23; - provides interface HplMsp430GeneralIO as Port24; - provides interface HplMsp430GeneralIO as Port25; - provides interface HplMsp430GeneralIO as Port26; - provides interface HplMsp430GeneralIO as Port27; -#endif - -#if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3_R__) - provides interface HplMsp430GeneralIO as Port30; - provides interface HplMsp430GeneralIO as Port31; - provides interface HplMsp430GeneralIO as Port32; - provides interface HplMsp430GeneralIO as Port33; - provides interface HplMsp430GeneralIO as Port34; - provides interface HplMsp430GeneralIO as Port35; - provides interface HplMsp430GeneralIO as Port36; - provides interface HplMsp430GeneralIO as Port37; -#endif - -#if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4_R__) - provides interface HplMsp430GeneralIO as Port40; - provides interface HplMsp430GeneralIO as Port41; - provides interface HplMsp430GeneralIO as Port42; - provides interface HplMsp430GeneralIO as Port43; - provides interface HplMsp430GeneralIO as Port44; - provides interface HplMsp430GeneralIO as Port45; - provides interface HplMsp430GeneralIO as Port46; - provides interface HplMsp430GeneralIO as Port47; -#endif - -#if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5_R__) - provides interface HplMsp430GeneralIO as Port50; - provides interface HplMsp430GeneralIO as Port51; - provides interface HplMsp430GeneralIO as Port52; - provides interface HplMsp430GeneralIO as Port53; - provides interface HplMsp430GeneralIO as Port54; - provides interface HplMsp430GeneralIO as Port55; - provides interface HplMsp430GeneralIO as Port56; - provides interface HplMsp430GeneralIO as Port57; -#endif - -#if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6_R__) - provides interface HplMsp430GeneralIO as Port60; - provides interface HplMsp430GeneralIO as Port61; - provides interface HplMsp430GeneralIO as Port62; - provides interface HplMsp430GeneralIO as Port63; - provides interface HplMsp430GeneralIO as Port64; - provides interface HplMsp430GeneralIO as Port65; - provides interface HplMsp430GeneralIO as Port66; - provides interface HplMsp430GeneralIO as Port67; -#endif - - // provides special ports explicitly - // this section of HplMsp430GeneralIOC supports the F14x series -#ifdef __msp430x14x - provides interface HplMsp430GeneralIO as STE0; - provides interface HplMsp430GeneralIO as SIMO0; - provides interface HplMsp430GeneralIO as SOMI0; - provides interface HplMsp430GeneralIO as UCLK0; - provides interface HplMsp430GeneralIO as UTXD0; - provides interface HplMsp430GeneralIO as URXD0; - - provides interface HplMsp430GeneralIO as STE1; - provides interface HplMsp430GeneralIO as SIMO1; - provides interface HplMsp430GeneralIO as SOMI1; - provides interface HplMsp430GeneralIO as UCLK1; - provides interface HplMsp430GeneralIO as UTXD1; - provides interface HplMsp430GeneralIO as URXD1; - - provides interface HplMsp430GeneralIO as ADC0; - provides interface HplMsp430GeneralIO as ADC1; - provides interface HplMsp430GeneralIO as ADC2; - provides interface HplMsp430GeneralIO as ADC3; - provides interface HplMsp430GeneralIO as ADC4; - provides interface HplMsp430GeneralIO as ADC5; - provides interface HplMsp430GeneralIO as ADC6; - provides interface HplMsp430GeneralIO as ADC7; -#endif - - // this section of HplMsp430GeneralIOC supports the F16x series -#ifdef __msp430x16x - provides interface HplMsp430GeneralIO as STE0; - provides interface HplMsp430GeneralIO as SIMO0; - provides interface HplMsp430GeneralIO as SDA; - provides interface HplMsp430GeneralIO as SOMI0; - provides interface HplMsp430GeneralIO as UCLK0; - provides interface HplMsp430GeneralIO as SCL; - provides interface HplMsp430GeneralIO as UTXD0; - provides interface HplMsp430GeneralIO as URXD0; - - provides interface HplMsp430GeneralIO as STE1; - provides interface HplMsp430GeneralIO as SIMO1; - provides interface HplMsp430GeneralIO as SOMI1; - provides interface HplMsp430GeneralIO as UCLK1; - provides interface HplMsp430GeneralIO as UTXD1; - provides interface HplMsp430GeneralIO as URXD1; - - provides interface HplMsp430GeneralIO as ADC0; - provides interface HplMsp430GeneralIO as ADC1; - provides interface HplMsp430GeneralIO as ADC2; - provides interface HplMsp430GeneralIO as ADC3; - provides interface HplMsp430GeneralIO as ADC4; - provides interface HplMsp430GeneralIO as ADC5; - provides interface HplMsp430GeneralIO as ADC6; - provides interface HplMsp430GeneralIO as ADC7; - - provides interface HplMsp430GeneralIO as DAC0; - provides interface HplMsp430GeneralIO as DAC1; - - provides interface HplMsp430GeneralIO as SVSIN; - provides interface HplMsp430GeneralIO as SVSOUT; -#endif - -#ifdef __msp430x261x - provides interface HplMsp430GeneralIO as UCA0CLK; - provides interface HplMsp430GeneralIO as UCA0STE; - provides interface HplMsp430GeneralIO as UCA0TXD; - provides interface HplMsp430GeneralIO as UCA0RXD; - provides interface HplMsp430GeneralIO as UCA0SIMO; - provides interface HplMsp430GeneralIO as UCA0SOMI; - - provides interface HplMsp430GeneralIO as UCB0CLK; - provides interface HplMsp430GeneralIO as UCB0STE; - provides interface HplMsp430GeneralIO as UCB0SIMO; - provides interface HplMsp430GeneralIO as UCB0SOMI; - provides interface HplMsp430GeneralIO as UCB0SDA; - provides interface HplMsp430GeneralIO as UCB0SCL; - - - provides interface HplMsp430GeneralIO as UCA1CLK; - provides interface HplMsp430GeneralIO as UCA1STE; - provides interface HplMsp430GeneralIO as UCA1TXD; - provides interface HplMsp430GeneralIO as UCA1RXD; - provides interface HplMsp430GeneralIO as UCA1SIMO; - provides interface HplMsp430GeneralIO as UCA1SOMI; - - provides interface HplMsp430GeneralIO as UCB1CLK; - provides interface HplMsp430GeneralIO as UCB1STE; - provides interface HplMsp430GeneralIO as UCB1SIMO; - provides interface HplMsp430GeneralIO as UCB1SOMI; - provides interface HplMsp430GeneralIO as UCB1SDA; - provides interface HplMsp430GeneralIO as UCB1SCL; - - provides interface HplMsp430GeneralIO as ADC0; - provides interface HplMsp430GeneralIO as ADC1; - provides interface HplMsp430GeneralIO as ADC2; - provides interface HplMsp430GeneralIO as ADC3; - provides interface HplMsp430GeneralIO as ADC4; - provides interface HplMsp430GeneralIO as ADC5; - provides interface HplMsp430GeneralIO as ADC6; - provides interface HplMsp430GeneralIO as ADC7; - - provides interface HplMsp430GeneralIO as DAC0; - provides interface HplMsp430GeneralIO as DAC1; - - provides interface HplMsp430GeneralIO as SVSIN; - provides interface HplMsp430GeneralIO as SVSOUT; -#endif - -#ifdef __msp430x241x - provides interface HplMsp430GeneralIO as UCA0CLK; - provides interface HplMsp430GeneralIO as UCA0STE; - provides interface HplMsp430GeneralIO as UCA0TXD; - provides interface HplMsp430GeneralIO as UCA0RXD; - provides interface HplMsp430GeneralIO as UCA0SIMO; - provides interface HplMsp430GeneralIO as UCA0SOMI; - - provides interface HplMsp430GeneralIO as UCB0CLK; - provides interface HplMsp430GeneralIO as UCB0STE; - provides interface HplMsp430GeneralIO as UCB0SIMO; - provides interface HplMsp430GeneralIO as UCB0SOMI; - provides interface HplMsp430GeneralIO as UCB0SDA; - provides interface HplMsp430GeneralIO as UCB0SCL; - - - provides interface HplMsp430GeneralIO as UCA1CLK; - provides interface HplMsp430GeneralIO as UCA1STE; - provides interface HplMsp430GeneralIO as UCA1TXD; - provides interface HplMsp430GeneralIO as UCA1RXD; - provides interface HplMsp430GeneralIO as UCA1SIMO; - provides interface HplMsp430GeneralIO as UCA1SOMI; - - provides interface HplMsp430GeneralIO as UCB1CLK; - provides interface HplMsp430GeneralIO as UCB1STE; - provides interface HplMsp430GeneralIO as UCB1SIMO; - provides interface HplMsp430GeneralIO as UCB1SOMI; - provides interface HplMsp430GeneralIO as UCB1SDA; - provides interface HplMsp430GeneralIO as UCB1SCL; - - provides interface HplMsp430GeneralIO as ADC0; - provides interface HplMsp430GeneralIO as ADC1; - provides interface HplMsp430GeneralIO as ADC2; - provides interface HplMsp430GeneralIO as ADC3; - provides interface HplMsp430GeneralIO as ADC4; - provides interface HplMsp430GeneralIO as ADC5; - provides interface HplMsp430GeneralIO as ADC6; - provides interface HplMsp430GeneralIO as ADC7; - - provides interface HplMsp430GeneralIO as SVSIN; - provides interface HplMsp430GeneralIO as SVSOUT; -#endif - -} -implementation -{ - components -#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1_R__) - new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 0) as P10, - new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 1) as P11, - new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 2) as P12, - new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 3) as P13, - new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 4) as P14, - new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 5) as P15, - new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 6) as P16, - new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 7) as P17, -#endif - -#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2_R__) - new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 0) as P20, - new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 1) as P21, - new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 2) as P22, - new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 3) as P23, - new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 4) as P24, - new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 5) as P25, - new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 6) as P26, - new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 7) as P27, -#endif - -#if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3_R__) - new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 0) as P30, - new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 1) as P31, - new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 2) as P32, - new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 3) as P33, - new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 4) as P34, - new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 5) as P35, - new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 6) as P36, - new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 7) as P37, -#endif - -#if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4_R__) - new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 0) as P40, - new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 1) as P41, - new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 2) as P42, - new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 3) as P43, - new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 4) as P44, - new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 5) as P45, - new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 6) as P46, - new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 7) as P47, -#endif - -#if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5_R__) - new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 0) as P50, - new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 1) as P51, - new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 2) as P52, - new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 3) as P53, - new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 4) as P54, - new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 5) as P55, - new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 6) as P56, - new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 7) as P57, -#endif - -#if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6_R__) - new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 0) as P60, - new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 1) as P61, - new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 2) as P62, - new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 3) as P63, - new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 4) as P64, - new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 5) as P65, - new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 6) as P66, - new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 7) as P67 -#endif - ; - -#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1_R__) - Port10 = P10; - Port11 = P11; - Port12 = P12; - Port13 = P13; - Port14 = P14; - Port15 = P15; - Port16 = P16; - Port17 = P17; -#endif - -#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2_R__) - Port20 = P20; - Port21 = P21; - Port22 = P22; - Port23 = P23; - Port24 = P24; - Port25 = P25; - Port26 = P26; - Port27 = P27; -#endif - -#if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3_R__) - Port30 = P30; - Port31 = P31; - Port32 = P32; - Port33 = P33; - Port34 = P34; - Port35 = P35; - Port36 = P36; - Port37 = P37; -#endif - -#if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4_R__) - Port40 = P40; - Port41 = P41; - Port42 = P42; - Port43 = P43; - Port44 = P44; - Port45 = P45; - Port46 = P46; - Port47 = P47; -#endif - -#if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5_R__) - Port50 = P50; - Port51 = P51; - Port52 = P52; - Port53 = P53; - Port54 = P54; - Port55 = P55; - Port56 = P56; - Port57 = P57; -#endif - -#if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6_R__) - Port60 = P60; - Port61 = P61; - Port62 = P62; - Port63 = P63; - Port64 = P64; - Port65 = P65; - Port66 = P66; - Port67 = P67; -#endif - -#ifdef __msp430x14x - STE0 = P30; - SIMO0 = P31; - SOMI0 = P32; - UCLK0 = P33; - UTXD0 = P34; - URXD0 = P35; - - STE1 = P50; - SIMO1 = P51; - SOMI1 = P52; - UCLK1 = P53; - UTXD1 = P36; - URXD1 = P37; - - ADC0 = P60; - ADC1 = P61; - ADC2 = P62; - ADC3 = P63; - ADC4 = P64; - ADC5 = P65; - ADC6 = P66; - ADC7 = P67; -#endif - -#ifdef __msp430x16x - STE0 = P30; - SIMO0 = P31; - SDA = P31; - SOMI0 = P32; - UCLK0 = P33; - SCL = P33; - UTXD0 = P34; - URXD0 = P35; - - STE1 = P50; - SIMO1 = P51; - SOMI1 = P52; - UCLK1 = P53; - UTXD1 = P36; - URXD1 = P37; - - ADC0 = P60; - ADC1 = P61; - ADC2 = P62; - ADC3 = P63; - ADC4 = P64; - ADC5 = P65; - ADC6 = P66; - ADC7 = P67; - - DAC0 = P66; - DAC1 = P67; - - SVSIN = P67; - SVSOUT = P57; -#endif - -#ifdef __msp430x261x - UCA0CLK = P30; - UCA0STE = P33; - UCA0TXD = P34; - UCA0RXD = P35; - UCA0SIMO = P34; - UCA0SOMI = P35; - - UCB0CLK = P33; - UCB0STE = P30; - UCB0SIMO = P31; - UCB0SOMI = P32; - UCB0SDA = P31; - UCB0SCL = P32; - - UCA1CLK = P50; - UCA1STE = P53; - UCA1TXD = P36; - UCA1RXD = P37; - UCA1SIMO = P36; - UCA1SOMI = P37; - - UCB1CLK = P53; - UCB1STE = P50; - UCB1SIMO = P51; - UCB1SOMI = P52; - UCB1SDA = P51; - UCB1SCL = P52; - - ADC0 = P60; - ADC1 = P61; - ADC2 = P62; - ADC3 = P63; - ADC4 = P64; - ADC5 = P65; - ADC6 = P66; - ADC7 = P67; - - DAC0 = P66; - DAC1 = P67; - - SVSIN = P67; - SVSOUT = P57; -#endif - -} - diff --git a/tos/chips/msp430X/pins/HplMsp430GeneralIOP.nc b/tos/chips/msp430X/pins/HplMsp430GeneralIOP.nc deleted file mode 100644 index 38f6f4b576..0000000000 --- a/tos/chips/msp430X/pins/HplMsp430GeneralIOP.nc +++ /dev/null @@ -1,58 +0,0 @@ - -/* "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Joe Polastre - */ - -#include "msp430regtypes.h" - -generic module HplMsp430GeneralIOP( - uint8_t port_in_addr, - uint8_t port_out_addr, - uint8_t port_dir_addr, - uint8_t port_sel_addr, - uint8_t pin - ) @safe() -{ - provides interface HplMsp430GeneralIO as IO; -} -implementation -{ - #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* ONE, port_in_addr)) - #define PORTx (*TCAST(volatile TYPE_PORT_OUT* ONE, port_out_addr)) - #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* ONE, port_dir_addr)) - #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* ONE, port_sel_addr)) - - async command void IO.set() { atomic PORTx |= (0x01 << pin); } - async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); } - async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); } - async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); } - async command bool IO.get() { return (call IO.getRaw() != 0); } - async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); } - async command bool IO.isInput() { return (PORTxDIR & (0x01 << pin)) == 0; } - async command void IO.makeOutput() { atomic PORTxDIR |= (0x01 << pin); } - async command bool IO.isOutput() { return (PORTxDIR & (0x01 << pin)) != 0; } - async command void IO.selectModuleFunc() { atomic PORTxSEL |= (0x01 << pin); } - async command bool IO.isModuleFunc() { return (PORTxSEL & (0x01< - */ -configuration HplMsp430InterruptC -{ -#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1_R__) - provides interface HplMsp430Interrupt as Port10; - provides interface HplMsp430Interrupt as Port11; - provides interface HplMsp430Interrupt as Port12; - provides interface HplMsp430Interrupt as Port13; - provides interface HplMsp430Interrupt as Port14; - provides interface HplMsp430Interrupt as Port15; - provides interface HplMsp430Interrupt as Port16; - provides interface HplMsp430Interrupt as Port17; -#endif -#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2_R__) - provides interface HplMsp430Interrupt as Port20; - provides interface HplMsp430Interrupt as Port21; - provides interface HplMsp430Interrupt as Port22; - provides interface HplMsp430Interrupt as Port23; - provides interface HplMsp430Interrupt as Port24; - provides interface HplMsp430Interrupt as Port25; - provides interface HplMsp430Interrupt as Port26; - provides interface HplMsp430Interrupt as Port27; -#endif -} -implementation -{ - components HplMsp430InterruptP as HplInterruptP; -#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1_R__) - Port10 = HplInterruptP.Port10; - Port11 = HplInterruptP.Port11; - Port12 = HplInterruptP.Port12; - Port13 = HplInterruptP.Port13; - Port14 = HplInterruptP.Port14; - Port15 = HplInterruptP.Port15; - Port16 = HplInterruptP.Port16; - Port17 = HplInterruptP.Port17; -#endif -#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2_R__) - Port20 = HplInterruptP.Port20; - Port21 = HplInterruptP.Port21; - Port22 = HplInterruptP.Port22; - Port23 = HplInterruptP.Port23; - Port24 = HplInterruptP.Port24; - Port25 = HplInterruptP.Port25; - Port26 = HplInterruptP.Port26; - Port27 = HplInterruptP.Port27; -#endif -} diff --git a/tos/chips/msp430X/pins/HplMsp430InterruptNMIC.nc b/tos/chips/msp430X/pins/HplMsp430InterruptNMIC.nc deleted file mode 100644 index 0acdbbb0ec..0000000000 --- a/tos/chips/msp430X/pins/HplMsp430InterruptNMIC.nc +++ /dev/null @@ -1,41 +0,0 @@ - -/* "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * HPL for the TI MSP430 family of microprocessors. This provides an - * abstraction for non-maskable interrupts. - * - * @author Joe Polastre - */ -configuration HplMsp430InterruptNMIC -{ - provides interface HplMsp430Interrupt as NMI; - provides interface HplMsp430Interrupt as OF; - provides interface HplMsp430Interrupt as ACCV; -} -implementation -{ - components HplMsp430InterruptNMIP as HplInterruptP; - - NMI = HplInterruptP.NMI; - OF = HplInterruptP.OF; - ACCV = HplInterruptP.ACCV; -} diff --git a/tos/chips/msp430X/pins/HplMsp430InterruptNMIP.nc b/tos/chips/msp430X/pins/HplMsp430InterruptNMIP.nc deleted file mode 100644 index 26392ee68a..0000000000 --- a/tos/chips/msp430X/pins/HplMsp430InterruptNMIP.nc +++ /dev/null @@ -1,102 +0,0 @@ - -/* "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Joe Polastre - */ -module HplMsp430InterruptNMIP -{ - provides interface HplMsp430Interrupt as NMI; - provides interface HplMsp430Interrupt as OF; - provides interface HplMsp430Interrupt as ACCV; -} -implementation -{ - TOSH_SIGNAL(NMI_VECTOR) - { - volatile int n = IFG1; - if (n & NMIIFG) { - signal NMI.fired(); - return; - } - if (n & OFIFG) { - signal OF.fired(); - return; - } - if (FCTL3 & ACCVIFG) { - signal ACCV.fired(); - return; - } - } - - default async event void NMI.fired() { call NMI.clear(); } - default async event void OF.fired() { call OF.clear(); } - default async event void ACCV.fired() { call ACCV.clear(); } - - async command void NMI.enable() { - volatile uint16_t _watchdog; - atomic { - _watchdog = WDTCTL; - _watchdog = WDTPW | (_watchdog & 0x0FF); - _watchdog |= WDTNMI; - WDTCTL = _watchdog; - IE1 |= NMIIE; - } - } - async command void OF.enable() { atomic IE1 |= OFIE; } - async command void ACCV.enable() { atomic IE1 |= ACCVIE; } - - async command void NMI.disable() { - volatile uint16_t _watchdog; - atomic { - _watchdog = WDTCTL; - _watchdog = WDTPW | (_watchdog & 0x0FF); - _watchdog &= ~WDTNMI; - WDTCTL = _watchdog; - IE1 &= ~NMIIE; - } - } - async command void OF.disable() { atomic IE1 &= ~OFIE; } - async command void ACCV.disable() { atomic IE1 &= ~ACCVIE; } - - async command void NMI.clear() { atomic IFG1 &= ~NMIIFG; } - async command void OF.clear() { atomic IFG1 &= ~OFIFG; } - async command void ACCV.clear() { atomic FCTL3 &= ~ACCVIFG; } - - async command bool NMI.getValue() { bool b; atomic b=(IFG1 & NMIIFG) & 0x01; return b; } - async command bool OF.getValue() { bool b; atomic b=(IFG1 & OFIFG) & 0x01; return b; } - async command bool ACCV.getValue() { bool b; atomic b=(FCTL3 & ACCVIFG) & 0x01; return b; } - - async command void NMI.edge(bool l2h) { - volatile uint16_t _watchdog; - atomic { - _watchdog = WDTCTL; - _watchdog = WDTPW | (_watchdog & 0x0FF); - if (l2h) _watchdog &= ~(WDTNMIES); - else _watchdog |= (WDTNMIES); - WDTCTL = _watchdog; - } - } - // edge does not apply to oscillator faults - async command void OF.edge(bool l2h) { } - // edge does not apply to flash access violations - async command void ACCV.edge(bool l2h) { } -} diff --git a/tos/chips/msp430X/pins/HplMsp430InterruptP.nc b/tos/chips/msp430X/pins/HplMsp430InterruptP.nc deleted file mode 100644 index 46e8448c5f..0000000000 --- a/tos/chips/msp430X/pins/HplMsp430InterruptP.nc +++ /dev/null @@ -1,340 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Joe Polastre - * @author Xavier Orduna - */ -module HplMsp430InterruptP @safe() -{ -#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1_R__) - provides interface HplMsp430Interrupt as Port10; - provides interface HplMsp430Interrupt as Port11; - provides interface HplMsp430Interrupt as Port12; - provides interface HplMsp430Interrupt as Port13; - provides interface HplMsp430Interrupt as Port14; - provides interface HplMsp430Interrupt as Port15; - provides interface HplMsp430Interrupt as Port16; - provides interface HplMsp430Interrupt as Port17; -#endif -#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2_R__) - provides interface HplMsp430Interrupt as Port20; - provides interface HplMsp430Interrupt as Port21; - provides interface HplMsp430Interrupt as Port22; - provides interface HplMsp430Interrupt as Port23; - provides interface HplMsp430Interrupt as Port24; - provides interface HplMsp430Interrupt as Port25; - provides interface HplMsp430Interrupt as Port26; - provides interface HplMsp430Interrupt as Port27; -#endif - -} -implementation -{ - -#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1_R__) - TOSH_SIGNAL(PORT1_VECTOR) - { - volatile int n = P1IFG & P1IE; - if (n & (1 << 0)) { - signal Port10.fired(); - return; - } - if (n & (1 << 1)) { - signal Port11.fired(); - return; - } - if (n & (1 << 2)) { - signal Port12.fired(); - return; - } - if (n & (1 << 3)) { - signal Port13.fired(); - return; - } - if (n & (1 << 4)) { - signal Port14.fired(); - return; - } - if (n & (1 << 5)) { - signal Port15.fired(); - return; - } - if (n & (1 << 6)) { - signal Port16.fired(); - return; - } - if (n & (1 << 7)) { - signal Port17.fired(); - return; - } - - } - - default async event void Port10.fired() { call Port10.clear(); } - default async event void Port11.fired() { call Port11.clear(); } - default async event void Port12.fired() { call Port12.clear(); } - default async event void Port13.fired() { call Port13.clear(); } - default async event void Port14.fired() { call Port14.clear(); } - default async event void Port15.fired() { call Port15.clear(); } - default async event void Port16.fired() { call Port16.clear(); } - default async event void Port17.fired() { call Port17.clear(); } - async command void Port10.enable() { P1IE |= (1 << 0); } - async command void Port11.enable() { P1IE |= (1 << 1); } - async command void Port12.enable() { P1IE |= (1 << 2); } - async command void Port13.enable() { P1IE |= (1 << 3); } - async command void Port14.enable() { P1IE |= (1 << 4); } - async command void Port15.enable() { P1IE |= (1 << 5); } - async command void Port16.enable() { P1IE |= (1 << 6); } - async command void Port17.enable() { P1IE |= (1 << 7); } - async command void Port10.disable() { P1IE &= ~(1 << 0); } - async command void Port11.disable() { P1IE &= ~(1 << 1); } - async command void Port12.disable() { P1IE &= ~(1 << 2); } - async command void Port13.disable() { P1IE &= ~(1 << 3); } - async command void Port14.disable() { P1IE &= ~(1 << 4); } - async command void Port15.disable() { P1IE &= ~(1 << 5); } - async command void Port16.disable() { P1IE &= ~(1 << 6); } - async command void Port17.disable() { P1IE &= ~(1 << 7); } - async command void Port10.clear() { P1IFG &= ~(1 << 0); } - async command void Port11.clear() { P1IFG &= ~(1 << 1); } - async command void Port12.clear() { P1IFG &= ~(1 << 2); } - async command void Port13.clear() { P1IFG &= ~(1 << 3); } - async command void Port14.clear() { P1IFG &= ~(1 << 4); } - async command void Port15.clear() { P1IFG &= ~(1 << 5); } - async command void Port16.clear() { P1IFG &= ~(1 << 6); } - async command void Port17.clear() { P1IFG &= ~(1 << 7); } - async command bool Port10.getValue() { bool b; atomic b=(P1IN >> 0) & 1; return b; } - async command bool Port11.getValue() { bool b; atomic b=(P1IN >> 1) & 1; return b; } - async command bool Port12.getValue() { bool b; atomic b=(P1IN >> 2) & 1; return b; } - async command bool Port13.getValue() { bool b; atomic b=(P1IN >> 3) & 1; return b; } - async command bool Port14.getValue() { bool b; atomic b=(P1IN >> 4) & 1; return b; } - async command bool Port15.getValue() { bool b; atomic b=(P1IN >> 5) & 1; return b; } - async command bool Port16.getValue() { bool b; atomic b=(P1IN >> 6) & 1; return b; } - async command bool Port17.getValue() { bool b; atomic b=(P1IN >> 7) & 1; return b; } - async command void Port10.edge(bool l2h) { - atomic { - if (l2h) P1IES &= ~(1 << 0); - else P1IES |= (1 << 0); - } - } - async command void Port11.edge(bool l2h) { - atomic { - if (l2h) P1IES &= ~(1 << 1); - else P1IES |= (1 << 1); - } - } - async command void Port12.edge(bool l2h) { - atomic { - if (l2h) P1IES &= ~(1 << 2); - else P1IES |= (1 << 2); - } - } - async command void Port13.edge(bool l2h) { - atomic { - if (l2h) P1IES &= ~(1 << 3); - else P1IES |= (1 << 3); - } - } - async command void Port14.edge(bool l2h) { - atomic { - if (l2h) P1IES &= ~(1 << 4); - else P1IES |= (1 << 4); - } - } - async command void Port15.edge(bool l2h) { - atomic { - if (l2h) P1IES &= ~(1 << 5); - else P1IES |= (1 << 5); - } - } - async command void Port16.edge(bool l2h) { - atomic { - if (l2h) P1IES &= ~(1 << 6); - else P1IES |= (1 << 6); - } - } - async command void Port17.edge(bool l2h) { - atomic { - if (l2h) P1IES &= ~(1 << 7); - else P1IES |= (1 << 7); - } - } -#endif - -#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2_R__) - TOSH_SIGNAL(PORT2_VECTOR) - { - volatile int n = P2IFG & P2IE; - if (n & (1 << 0)) { - signal Port20.fired(); - return; - } - if (n & (1 << 1)) { - signal Port21.fired(); - return; - } - if (n & (1 << 2)) { - signal Port22.fired(); - return; - } - if (n & (1 << 3)) { - signal Port23.fired(); - return; - } - if (n & (1 << 4)) { - signal Port24.fired(); - return; - } - if (n & (1 << 5)) { - signal Port25.fired(); - return; - } - if (n & (1 << 6)) { - signal Port26.fired(); - return; - } - if (n & (1 << 7)) { - signal Port27.fired(); - return; - } - } - default async event void Port20.fired() { call Port20.clear(); } - default async event void Port21.fired() { call Port21.clear(); } - default async event void Port22.fired() { call Port22.clear(); } - default async event void Port23.fired() { call Port23.clear(); } - default async event void Port24.fired() { call Port24.clear(); } - default async event void Port25.fired() { call Port25.clear(); } - default async event void Port26.fired() { call Port26.clear(); } - default async event void Port27.fired() { call Port27.clear(); } - async command void Port20.enable() { P2IE |= (1 << 0); } - async command void Port21.enable() { P2IE |= (1 << 1); } - async command void Port22.enable() { P2IE |= (1 << 2); } - async command void Port23.enable() { P2IE |= (1 << 3); } - async command void Port24.enable() { P2IE |= (1 << 4); } - async command void Port25.enable() { P2IE |= (1 << 5); } - async command void Port26.enable() { P2IE |= (1 << 6); } - async command void Port27.enable() { P2IE |= (1 << 7); } - async command void Port20.disable() { P2IE &= ~(1 << 0); } - async command void Port21.disable() { P2IE &= ~(1 << 1); } - async command void Port22.disable() { P2IE &= ~(1 << 2); } - async command void Port23.disable() { P2IE &= ~(1 << 3); } - async command void Port24.disable() { P2IE &= ~(1 << 4); } - async command void Port25.disable() { P2IE &= ~(1 << 5); } - async command void Port26.disable() { P2IE &= ~(1 << 6); } - async command void Port27.disable() { P2IE &= ~(1 << 7); } - async command void Port20.clear() { P2IFG &= ~(1 << 0); } - async command void Port21.clear() { P2IFG &= ~(1 << 1); } - async command void Port22.clear() { P2IFG &= ~(1 << 2); } - async command void Port23.clear() { P2IFG &= ~(1 << 3); } - async command void Port24.clear() { P2IFG &= ~(1 << 4); } - async command void Port25.clear() { P2IFG &= ~(1 << 5); } - async command void Port26.clear() { P2IFG &= ~(1 << 6); } - async command void Port27.clear() { P2IFG &= ~(1 << 7); } - async command bool Port20.getValue() { bool b; atomic b=(P2IN >> 0) & 1; return b; } - async command bool Port21.getValue() { bool b; atomic b=(P2IN >> 1) & 1; return b; } - async command bool Port22.getValue() { bool b; atomic b=(P2IN >> 2) & 1; return b; } - async command bool Port23.getValue() { bool b; atomic b=(P2IN >> 3) & 1; return b; } - async command bool Port24.getValue() { bool b; atomic b=(P2IN >> 4) & 1; return b; } - async command bool Port25.getValue() { bool b; atomic b=(P2IN >> 5) & 1; return b; } - async command bool Port26.getValue() { bool b; atomic b=(P2IN >> 6) & 1; return b; } - async command bool Port27.getValue() { bool b; atomic b=(P2IN >> 7) & 1; return b; } - async command void Port20.edge(bool l2h) { - atomic { - if (l2h) P2IES &= ~(1 << 0); - else P2IES |= (1 << 0); - } - } - async command void Port21.edge(bool l2h) { - atomic { - if (l2h) P2IES &= ~(1 << 1); - else P2IES |= (1 << 1); - } - } - async command void Port22.edge(bool l2h) { - atomic { - if (l2h) P2IES &= ~(1 << 2); - else P2IES |= (1 << 2); - } - } - async command void Port23.edge(bool l2h) { - atomic { - if (l2h) P2IES &= ~(1 << 3); - else P2IES |= (1 << 3); - } - } - async command void Port24.edge(bool l2h) { - atomic { - if (l2h) P2IES &= ~(1 << 4); - else P2IES |= (1 << 4); - } - } - async command void Port25.edge(bool l2h) { - atomic { - if (l2h) P2IES &= ~(1 << 5); - else P2IES |= (1 << 5); - } - } - async command void Port26.edge(bool l2h) { - atomic { - if (l2h) P2IES &= ~(1 << 6); - else P2IES |= (1 << 6); - } - } - async command void Port27.edge(bool l2h) { - atomic { - if (l2h) P2IES &= ~(1 << 7); - else P2IES |= (1 << 7); - } - } -#endif - - -} diff --git a/tos/chips/msp430X/pins/Msp430GpioC.nc b/tos/chips/msp430X/pins/Msp430GpioC.nc deleted file mode 100644 index dc4995d489..0000000000 --- a/tos/chips/msp430X/pins/Msp430GpioC.nc +++ /dev/null @@ -1,46 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Implementation of the general-purpose I/O abstraction - * for the TI MSP430 microcontroller. - * - * @author Joe Polastre - * @see Please refer to TEP 117 for more information about this component and its - * intended use. - */ - -generic module Msp430GpioC() @safe() { - provides interface GeneralIO; - uses interface HplMsp430GeneralIO as HplGeneralIO; -} -implementation { - - async command void GeneralIO.set() { call HplGeneralIO.set(); } - async command void GeneralIO.clr() { call HplGeneralIO.clr(); } - async command void GeneralIO.toggle() { call HplGeneralIO.toggle(); } - async command bool GeneralIO.get() { return call HplGeneralIO.get(); } - async command void GeneralIO.makeInput() { call HplGeneralIO.makeInput(); } - async command bool GeneralIO.isInput() { return call HplGeneralIO.isInput(); } - async command void GeneralIO.makeOutput() { call HplGeneralIO.makeOutput(); } - async command bool GeneralIO.isOutput() { return call HplGeneralIO.isOutput(); } - -} diff --git a/tos/chips/msp430X/pins/Msp430InterruptC.nc b/tos/chips/msp430X/pins/Msp430InterruptC.nc deleted file mode 100644 index 2e4087da49..0000000000 --- a/tos/chips/msp430X/pins/Msp430InterruptC.nc +++ /dev/null @@ -1,71 +0,0 @@ - -/* "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Implementation of the GPIO interrupt abstraction for - * the TI MSP430 microcontroller. - * - * @author Jonathan Hui - * @author Joe Polastre - * @see Please refer to TEP 117 for more information about this component and its - * intended use. - */ - -generic module Msp430InterruptC() @safe() { - - provides interface GpioInterrupt as Interrupt; - uses interface HplMsp430Interrupt as HplInterrupt; - -} - -implementation { - - error_t enable( bool rising ) { - atomic { - call Interrupt.disable(); - call HplInterrupt.edge( rising ); - call HplInterrupt.enable(); - } - return SUCCESS; - } - - async command error_t Interrupt.enableRisingEdge() { - return enable( TRUE ); - } - - async command error_t Interrupt.enableFallingEdge() { - return enable( FALSE ); - } - - async command error_t Interrupt.disable() { - atomic { - call HplInterrupt.disable(); - call HplInterrupt.clear(); - } - return SUCCESS; - } - - async event void HplInterrupt.fired() { - call HplInterrupt.clear(); - signal Interrupt.fired(); - } - -} diff --git a/tos/chips/msp430X/sensors/Msp430InternalTemperatureC.nc b/tos/chips/msp430X/sensors/Msp430InternalTemperatureC.nc deleted file mode 100644 index 273a9577c5..0000000000 --- a/tos/chips/msp430X/sensors/Msp430InternalTemperatureC.nc +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Msp430InternalTemperatureC is the temperature sensor available on - * the msp430-based platforms. - * - * To convert from ADC counts to temperature, convert to voltage by - * dividing by 4096 and multiplying by Vref (1.5V). Then subtract - * 0.986 from voltage and divide by 0.00355 to get degrees C. - * - * @author Gilman Tolle - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:10 $ - */ - -generic configuration Msp430InternalTemperatureC() { - provides interface Read; - provides interface ReadStream; -} -implementation { - components new AdcReadClientC(); - Read = AdcReadClientC; - - components new AdcReadStreamClientC(); - ReadStream = AdcReadStreamClientC; - - components Msp430InternalTemperatureP; - AdcReadClientC.AdcConfigure -> Msp430InternalTemperatureP; - AdcReadStreamClientC.AdcConfigure -> Msp430InternalTemperatureP; -} diff --git a/tos/chips/msp430X/sensors/Msp430InternalTemperatureP.nc b/tos/chips/msp430X/sensors/Msp430InternalTemperatureP.nc deleted file mode 100644 index d669d55237..0000000000 --- a/tos/chips/msp430X/sensors/Msp430InternalTemperatureP.nc +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -#include "Msp430Adc12.h" - -module Msp430InternalTemperatureP { - provides interface AdcConfigure; -} -implementation { - - const msp430adc12_channel_config_t config = { - inch: TEMPERATURE_DIODE_CHANNEL, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_1_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() - { - return &config; - } -} diff --git a/tos/chips/msp430X/sensors/Msp430InternalVoltageC.nc b/tos/chips/msp430X/sensors/Msp430InternalVoltageC.nc deleted file mode 100644 index 54ac4ca5ef..0000000000 --- a/tos/chips/msp430X/sensors/Msp430InternalVoltageC.nc +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Msp430InternalVoltageC is the voltage sensor available on the - * msp430-based platforms. - * - * To convert from ADC counts to actual voltage, divide by 4096 and - * multiply by 3. - * - * @author Gilman Tolle - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:10 $ - */ - -generic configuration Msp430InternalVoltageC() { - provides interface Read; - provides interface ReadStream; - - provides interface Resource; - provides interface ReadNow; -} -implementation { - components new AdcReadClientC(); - Read = AdcReadClientC; - - components new AdcReadStreamClientC(); - ReadStream = AdcReadStreamClientC; - - components Msp430InternalVoltageP; - AdcReadClientC.AdcConfigure -> Msp430InternalVoltageP; - AdcReadStreamClientC.AdcConfigure -> Msp430InternalVoltageP; - - components new AdcReadNowClientC(); - Resource = AdcReadNowClientC; - ReadNow = AdcReadNowClientC; - - AdcReadNowClientC.AdcConfigure -> Msp430InternalVoltageP; -} diff --git a/tos/chips/msp430X/sensors/Msp430InternalVoltageP.nc b/tos/chips/msp430X/sensors/Msp430InternalVoltageP.nc deleted file mode 100644 index 6340267805..0000000000 --- a/tos/chips/msp430X/sensors/Msp430InternalVoltageP.nc +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -#include "Msp430Adc12.h" - -module Msp430InternalVoltageP { - provides interface AdcConfigure; -} -implementation { - - const msp430adc12_channel_config_t config = { - inch: SUPPLY_VOLTAGE_HALF_CHANNEL, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_1_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() - { - return &config; - } -} diff --git a/tos/chips/msp430X/timer/Alarm32khz16C.nc b/tos/chips/msp430X/timer/Alarm32khz16C.nc deleted file mode 100644 index 463d0a82ed..0000000000 --- a/tos/chips/msp430X/timer/Alarm32khz16C.nc +++ /dev/null @@ -1,47 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Alarm32khzC is the alarm for async 32khz alarms - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -generic configuration Alarm32khz16C() -{ - provides interface Init; - provides interface Alarm; -} -implementation -{ - components new Msp430Timer32khzC() as Msp430Timer; - components new Msp430AlarmC(T32khz) as Msp430Alarm; - - Init = Msp430Alarm; - Alarm = Msp430Alarm; - - Msp430Alarm.Msp430Timer -> Msp430Timer; - Msp430Alarm.Msp430TimerControl -> Msp430Timer; - Msp430Alarm.Msp430Compare -> Msp430Timer; -} - diff --git a/tos/chips/msp430X/timer/Alarm32khz32C.nc b/tos/chips/msp430X/timer/Alarm32khz32C.nc deleted file mode 100644 index be9ca2dd16..0000000000 --- a/tos/chips/msp430X/timer/Alarm32khz32C.nc +++ /dev/null @@ -1,47 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Alarm32khzC is the alarm for async 32khz alarms - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -generic configuration Alarm32khz32C() -{ - provides interface Init; - provides interface Alarm; -} -implementation -{ - components new Alarm32khz16C() as AlarmC; - components Counter32khz32C as Counter; - components new TransformAlarmC(T32khz,uint32_t,T32khz,uint16_t,0) as Transform; - - Init = AlarmC; - Alarm = Transform; - - Transform.AlarmFrom -> AlarmC; - Transform.Counter -> Counter; -} - diff --git a/tos/chips/msp430X/timer/AlarmMilli16C.nc b/tos/chips/msp430X/timer/AlarmMilli16C.nc deleted file mode 100644 index 4fec742d92..0000000000 --- a/tos/chips/msp430X/timer/AlarmMilli16C.nc +++ /dev/null @@ -1,47 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * AlarmMilliC is the alarm for async millisecond alarms - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -generic configuration AlarmMilli16C() -{ - provides interface Init; - provides interface Alarm; -} -implementation -{ - components new Alarm32khz16C() as AlarmFrom; - components CounterMilli16C as Counter; - components new TransformAlarmC(TMilli,uint16_t,T32khz,uint16_t,5) as Transform; - - Init = AlarmFrom; - Alarm = Transform; - - Transform.AlarmFrom -> AlarmFrom; - Transform.Counter -> Counter; -} - diff --git a/tos/chips/msp430X/timer/AlarmMilli32C.nc b/tos/chips/msp430X/timer/AlarmMilli32C.nc deleted file mode 100644 index d222764995..0000000000 --- a/tos/chips/msp430X/timer/AlarmMilli32C.nc +++ /dev/null @@ -1,47 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * AlarmMilliC is the alarm for async millisecond alarms - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -generic configuration AlarmMilli32C() -{ - provides interface Init; - provides interface Alarm; -} -implementation -{ - components new Alarm32khz16C() as AlarmFrom; - components CounterMilli32C as Counter; - components new TransformAlarmC(TMilli,uint32_t,T32khz,uint16_t,5) as Transform; - - Init = AlarmFrom; - Alarm = Transform; - - Transform.AlarmFrom -> AlarmFrom; - Transform.Counter -> Counter; -} - diff --git a/tos/chips/msp430X/timer/BusyWait32khzC.nc b/tos/chips/msp430X/timer/BusyWait32khzC.nc deleted file mode 100644 index d4b7cf89d9..0000000000 --- a/tos/chips/msp430X/timer/BusyWait32khzC.nc +++ /dev/null @@ -1,41 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration BusyWait32khzC -{ - provides interface BusyWait; -} -implementation -{ - components new BusyWaitCounterC(T32khz,uint16_t) - , Msp430Counter32khzC - ; - - BusyWait = BusyWaitCounterC; - BusyWaitCounter.Counter -> Msp430Counter32khzC; -} - diff --git a/tos/chips/msp430X/timer/BusyWaitMicroC.nc b/tos/chips/msp430X/timer/BusyWaitMicroC.nc deleted file mode 100644 index cfcdfd4232..0000000000 --- a/tos/chips/msp430X/timer/BusyWaitMicroC.nc +++ /dev/null @@ -1,41 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration BusyWaitMicroC -{ - provides interface BusyWait; -} -implementation -{ - components new BusyWaitCounterC(TMicro,uint16_t) - , Msp430CounterMicroC - ; - - BusyWait = BusyWaitCounterC; - BusyWaitCounterC.Counter -> Msp430CounterMicroC; -} - diff --git a/tos/chips/msp430X/timer/Counter32khz16C.nc b/tos/chips/msp430X/timer/Counter32khz16C.nc deleted file mode 100644 index 3d272f2333..0000000000 --- a/tos/chips/msp430X/timer/Counter32khz16C.nc +++ /dev/null @@ -1,40 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Counter32khz16C provides at 16-bit counter at 32768 ticks per second. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration Counter32khz16C -{ - provides interface Counter; -} -implementation -{ - components Msp430Counter32khzC as CounterFrom; - - Counter = CounterFrom; -} - diff --git a/tos/chips/msp430X/timer/Counter32khz32C.nc b/tos/chips/msp430X/timer/Counter32khz32C.nc deleted file mode 100644 index e391624740..0000000000 --- a/tos/chips/msp430X/timer/Counter32khz32C.nc +++ /dev/null @@ -1,43 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Counter32khz32C provides at 32-bit counter at 32768 ticks per second. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration Counter32khz32C -{ - provides interface Counter; -} -implementation -{ - components Msp430Counter32khzC as CounterFrom; - components new TransformCounterC(T32khz,uint32_t,T32khz,uint16_t,0,uint16_t) as Transform; - - Counter = Transform; - - Transform.CounterFrom -> CounterFrom; -} - diff --git a/tos/chips/msp430X/timer/CounterMilli16C.nc b/tos/chips/msp430X/timer/CounterMilli16C.nc deleted file mode 100644 index ee3b880fb2..0000000000 --- a/tos/chips/msp430X/timer/CounterMilli16C.nc +++ /dev/null @@ -1,43 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * CounterMilli16C provides at 16-bit counter at 1024 ticks per second. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration CounterMilli16C -{ - provides interface Counter; -} -implementation -{ - components Msp430Counter32khzC as CounterFrom; - components new TransformCounterC(TMilli,uint16_t,T32khz,uint16_t,5,uint8_t) as Transform; - - Counter = Transform.Counter; - - Transform.CounterFrom -> CounterFrom; -} - diff --git a/tos/chips/msp430X/timer/CounterMilli32C.nc b/tos/chips/msp430X/timer/CounterMilli32C.nc deleted file mode 100644 index e8de47e0c7..0000000000 --- a/tos/chips/msp430X/timer/CounterMilli32C.nc +++ /dev/null @@ -1,43 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * CounterMilli32C provides at 32-bit counter at 1024 ticks per second. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration CounterMilli32C -{ - provides interface Counter; -} -implementation -{ - components Msp430Counter32khzC as CounterFrom; - components new TransformCounterC(TMilli,uint32_t,T32khz,uint16_t,5,uint32_t) as Transform; - - Counter = Transform.Counter; - - Transform.CounterFrom -> CounterFrom; -} - diff --git a/tos/chips/msp430X/timer/GpioCaptureC.nc b/tos/chips/msp430X/timer/GpioCaptureC.nc deleted file mode 100644 index caf9c2bdbd..0000000000 --- a/tos/chips/msp430X/timer/GpioCaptureC.nc +++ /dev/null @@ -1,71 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Jonathan Hui - * @author Joe Polastre - */ - -generic module GpioCaptureC() @safe() { - - provides interface GpioCapture as Capture; - uses interface Msp430TimerControl; - uses interface Msp430Capture; - uses interface HplMsp430GeneralIO as GeneralIO; - -} - -implementation { - - error_t enableCapture( uint8_t mode ) { - atomic { - call Msp430TimerControl.disableEvents(); - call GeneralIO.selectModuleFunc(); - call Msp430TimerControl.clearPendingInterrupt(); - call Msp430Capture.clearOverflow(); - call Msp430TimerControl.setControlAsCapture( mode ); - call Msp430TimerControl.enableEvents(); - } - return SUCCESS; - } - - async command error_t Capture.captureRisingEdge() { - return enableCapture( MSP430TIMER_CM_RISING ); - } - - async command error_t Capture.captureFallingEdge() { - return enableCapture( MSP430TIMER_CM_FALLING ); - } - - async command void Capture.disable() { - atomic { - call Msp430TimerControl.disableEvents(); - call GeneralIO.selectIOFunc(); - } - } - - async event void Msp430Capture.captured( uint16_t time ) { - call Msp430TimerControl.clearPendingInterrupt(); - call Msp430Capture.clearOverflow(); - signal Capture.captured( time ); - } - -} diff --git a/tos/chips/msp430X/timer/HilTimerMilliC.nc b/tos/chips/msp430X/timer/HilTimerMilliC.nc deleted file mode 100644 index 9028414f98..0000000000 --- a/tos/chips/msp430X/timer/HilTimerMilliC.nc +++ /dev/null @@ -1,53 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * HilTimerMilliC provides a parameterized interface to a virtualized - * millisecond timer. TimerMilliC in tos/system/ uses this component to - * allocate new timers. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration HilTimerMilliC -{ - provides interface Init; - provides interface Timer as TimerMilli[ uint8_t num ]; - provides interface LocalTime; -} -implementation -{ - components new AlarmMilli32C(); - components new AlarmToTimerC(TMilli); - components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI)); - components new CounterToLocalTimeC(TMilli); - components CounterMilli32C; - - Init = AlarmMilli32C; - TimerMilli = VirtualizeTimerC; - LocalTime = CounterToLocalTimeC; - - VirtualizeTimerC.TimerFrom -> AlarmToTimerC; - AlarmToTimerC.Alarm -> AlarmMilli32C; - CounterToLocalTimeC.Counter -> CounterMilli32C; -} diff --git a/tos/chips/msp430X/timer/Msp430AlarmC.nc b/tos/chips/msp430X/timer/Msp430AlarmC.nc deleted file mode 100644 index 636abfcb10..0000000000 --- a/tos/chips/msp430X/timer/Msp430AlarmC.nc +++ /dev/null @@ -1,107 +0,0 @@ -//$Id: Msp430AlarmC.nc,v 1.5 2008/06/24 04:07:29 regehr Exp $ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Msp430Alarm is a generic component that wraps the MSP430 HPL timers and - * compares into a TinyOS Alarm. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -generic module Msp430AlarmC(typedef frequency_tag) @safe() -{ - provides interface Init; - provides interface Alarm as Alarm; - uses interface Msp430Timer; - uses interface Msp430TimerControl; - uses interface Msp430Compare; -} -implementation -{ - command error_t Init.init() - { - call Msp430TimerControl.disableEvents(); - call Msp430TimerControl.setControlAsCompare(); - return SUCCESS; - } - - async command void Alarm.start( uint16_t dt ) - { - call Alarm.startAt( call Alarm.getNow(), dt ); - } - - async command void Alarm.stop() - { - call Msp430TimerControl.disableEvents(); - } - - async event void Msp430Compare.fired() - { - call Msp430TimerControl.disableEvents(); - signal Alarm.fired(); - } - - async command bool Alarm.isRunning() - { - return call Msp430TimerControl.areEventsEnabled(); - } - - async command void Alarm.startAt( uint16_t t0, uint16_t dt ) - { - atomic - { - uint16_t now = call Msp430Timer.get(); - uint16_t elapsed = now - t0; - if( elapsed >= dt ) - { - call Msp430Compare.setEventFromNow(2); - } - else - { - uint16_t remaining = dt - elapsed; - if( remaining <= 2 ) - call Msp430Compare.setEventFromNow(2); - else - call Msp430Compare.setEvent( now+remaining ); - } - call Msp430TimerControl.clearPendingInterrupt(); - call Msp430TimerControl.enableEvents(); - } - } - - async command uint16_t Alarm.getNow() - { - return call Msp430Timer.get(); - } - - async command uint16_t Alarm.getAlarm() - { - return call Msp430Compare.getEvent(); - } - - async event void Msp430Timer.overflow() - { - } -} - diff --git a/tos/chips/msp430X/timer/Msp430Capture.nc b/tos/chips/msp430X/timer/Msp430Capture.nc deleted file mode 100644 index 1dd39c1d8c..0000000000 --- a/tos/chips/msp430X/timer/Msp430Capture.nc +++ /dev/null @@ -1,78 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Joe Polastre - */ - -#include "Msp430Timer.h" - -interface Msp430Capture -{ - /** - * Reads the value of the last capture event in TxCCRx - */ - async command uint16_t getEvent(); - - /** - * Set the edge that the capture should occur - * - * @param cm Capture Mode for edge capture. - * enums exist for: - * MSP430TIMER_CM_NONE is no capture. - * MSP430TIMER_CM_RISING is rising edge capture. - * MSP430TIMER_CM_FALLING is a falling edge capture. - * MSP430TIMER_CM_BOTH captures on both rising and falling edges. - */ - async command void setEdge(uint8_t cm); - - /** - * Determine if a capture overflow is pending. - * - * @return TRUE if the capture register has overflowed - */ - async command bool isOverflowPending(); - - /** - * Clear the capture overflow flag for when multiple captures occur - */ - async command void clearOverflow(); - - /** - * Set whether the capture should occur synchronously or asynchronously. - * TinyOS default is synchronous captures. - * WARNING: if the capture signal is asynchronous to the timer clock, - * it could case a race condition (see Timer documentation - * in MSP430F1xx user guide) - * @param synchronous TRUE to synchronize the timer capture with the - * next timer clock instead of occurring asynchronously. - */ - async command void setSynchronous(bool synchronous); - - /** - * Signalled when an event is captured. - * - * @param time The time of the capture event - */ - async event void captured(uint16_t time); - -} - diff --git a/tos/chips/msp430X/timer/Msp430ClockC.nc b/tos/chips/msp430X/timer/Msp430ClockC.nc deleted file mode 100644 index 5249fbe0ac..0000000000 --- a/tos/chips/msp430X/timer/Msp430ClockC.nc +++ /dev/null @@ -1,38 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ - -configuration Msp430ClockC -{ - provides interface Init; - provides interface Msp430ClockInit; -} -implementation -{ - components Msp430ClockP, Msp430TimerC; - - Init = Msp430ClockP; - Msp430ClockInit = Msp430ClockP; -} - diff --git a/tos/chips/msp430X/timer/Msp430ClockInit.nc b/tos/chips/msp430X/timer/Msp430ClockInit.nc deleted file mode 100644 index e78caf1826..0000000000 --- a/tos/chips/msp430X/timer/Msp430ClockInit.nc +++ /dev/null @@ -1,39 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - * @author Vlado Handziski - */ - -interface Msp430ClockInit -{ - event void setupDcoCalibrate(); - event void initClocks(); - event void initTimerA(); - event void initTimerB(); - - command void defaultSetupDcoCalibrate(); - command void defaultInitClocks(); - command void defaultInitTimerA(); - command void defaultInitTimerB(); -} - diff --git a/tos/chips/msp430X/timer/Msp430ClockP.nc b/tos/chips/msp430X/timer/Msp430ClockP.nc deleted file mode 100644 index b16889bfa3..0000000000 --- a/tos/chips/msp430X/timer/Msp430ClockP.nc +++ /dev/null @@ -1,286 +0,0 @@ -//$Id: Msp430ClockP.nc,v 1.7 2008/06/24 05:32:31 regehr Exp $ - -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - * @author Vlado Handziski - * @author Xavier Orduna - */ - -#include -#include "Msp430XDcoCalib.h" - -#include "Msp430Timer.h" - -module Msp430ClockP @safe() -{ - provides interface Init; - provides interface Msp430ClockInit; -} -implementation -{ - MSP430REG_NORACE(IE1); - MSP430REG_NORACE(TACTL); - MSP430REG_NORACE(TAIV); - MSP430REG_NORACE(TBCTL); - MSP430REG_NORACE(TBIV); - - enum - { - ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, - }; - - - command void Msp430ClockInit.defaultSetupDcoCalibrate() - { - - // --- setup --- - - TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0 - TBCTL = TBSSEL0 | MC1; - BCSCTL1 = XT2OFF | RSEL2; - BCSCTL2 = 0; - TBCCTL0 = CM0; - } - - command void Msp430ClockInit.defaultInitClocks() - { - //check if calib tables are OK - - if(CALBC1_8MHZ != 0xFF) { - DCOCTL = 0x00; - BCSCTL1 = CALBC1_8MHZ; //Set DCO to 8MHz - DCOCTL = CALDCO_8MHZ; - } else { //start using reasonable values at 8 Mhz - DCOCTL = 0x00; - BCSCTL1 = 0x8D; - DCOCTL = 0x88; - } - - // BCSCTL1 - // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK - // .XTS = 0; set low frequency mode for LXFT1 - // .DIVA = 0; set the divisor on ACLK to 1 - // .RSEL, do not modify - //BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0)); - BCSCTL1 = XT2OFF | (BCSCTL1); - - // BCSCTL2 - // .SELM = 0; select DCOCLK as source for MCLK - // .DIVM = 0; set the divisor of MCLK to 1 - // .SELS = 0; select DCOCLK as source for SCLK - // .DIVS = 2; set the divisor of SCLK to 4 - // .DCOR = 0; select internal resistor for DCO - //BCSCTL2 = DIVS1; - //BCSCTL2 = DIVS1 | 0x01; - - // IE1.OFIE = 0; no interrupt for oscillator fault - CLR_FLAG( IE1, OFIE ); - } - - command void Msp430ClockInit.defaultInitTimerA() - { - TAR = 0; - - // TACTL - // .TACLGRP = 0; each TACL group latched independently - // .CNTL = 0; 16-bit counter - // .TASSEL = 2; source SMCLK = DCO/4 - // .ID = 0; input divisor of 1 - // .MC = 0; initially disabled - // .TACLR = 0; reset timer A - // .TAIE = 1; enable timer A interrupts - TACTL = TASSEL1 | TAIE; - } - - command void Msp430ClockInit.defaultInitTimerB() - { - TBR = 0; - - // TBCTL - // .TBCLGRP = 0; each TBCL group latched independently - // .CNTL = 0; 16-bit counter - // .TBSSEL = 1; source ACLK - // .ID = 0; input divisor of 1 - // .MC = 0; initially disabled - // .TBCLR = 0; reset timer B - // .TBIE = 1; enable timer B interrupts - TBCTL = TBSSEL0 | TBIE; - } - - default event void Msp430ClockInit.setupDcoCalibrate() - { - call Msp430ClockInit.defaultSetupDcoCalibrate(); - } - - default event void Msp430ClockInit.initClocks() - { - call Msp430ClockInit.defaultInitClocks(); - } - - default event void Msp430ClockInit.initTimerA() - { - call Msp430ClockInit.defaultInitTimerA(); - } - - default event void Msp430ClockInit.initTimerB() - { - call Msp430ClockInit.defaultInitTimerB(); - } - - - void startTimerA() - { - // TACTL.MC = 2; continuous mode - TACTL = MC1 | (TACTL & ~(MC1|MC0)); - } - - void stopTimerA() - { - //TACTL.MC = 0; stop timer B - TACTL = TACTL & ~(MC1|MC0); - } - - void startTimerB() - { - // TBCTL.MC = 2; continuous mode - TBCTL = MC1 | (TBCTL & ~(MC1|MC0)); - } - - void stopTimerB() - { - //TBCTL.MC = 0; stop timer B - TBCTL = TBCTL & ~(MC1|MC0); - } - - void set_dco_calib( int calib ) - { - BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07); - DCOCTL = calib & 0xff; - } - - uint16_t test_calib_busywait_delta( int calib ) - { - int8_t aclk_count = 2; - uint16_t dco_prev = 0; - uint16_t dco_curr = 0; - - set_dco_calib( calib ); - - while( aclk_count-- > 0 ) - { - TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt - TBCCTL0 &= ~CCIFG; // clear pending interrupt - while( (TBCCTL0 & CCIFG) == 0 ); // busy wait - dco_prev = dco_curr; - dco_curr = TAR; - } - - return dco_curr - dco_prev; - } - - // busyCalibrateDCO - // Should take about 9ms if ACLK_CALIB_PERIOD=8. - // DCOCTL and BCSCTL1 are calibrated when done. - void busyCalibrateDco() - { - // --- variables --- - int calib; - int step; - - // --- calibrate --- - - // Binary search for RSEL,DCO,DCOMOD. - // It's okay that RSEL isn't monotonic. - - for( calib=0,step=0x800; step!=0; step>>=1 ) - { - // if the step is not past the target, commit it - if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA ) - calib |= step; - } - - // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0 - if( (calib & 0x0e0) == 0x0e0 ) - calib &= ~0x01f; - - set_dco_calib( calib ); - } - - command error_t Init.init() - { - // Reset timers and clear interrupt vectors - //Set_DCO(DELTA_8MHZ); - TACTL = TACLR; - TAIV = 0; - TBCTL = TBCLR; - TBIV = 0; - - atomic - { - //signal Msp430ClockInit.setupDcoCalibrate(); - //busyCalibrateDco(); - - signal Msp430ClockInit.initClocks(); - signal Msp430ClockInit.initTimerA(); - signal Msp430ClockInit.initTimerB(); - startTimerA(); - startTimerB(); - } - - return SUCCESS; - } -} - diff --git a/tos/chips/msp430X/timer/Msp430Compare.nc b/tos/chips/msp430X/timer/Msp430Compare.nc deleted file mode 100644 index 5c2571fd4a..0000000000 --- a/tos/chips/msp430X/timer/Msp430Compare.nc +++ /dev/null @@ -1,37 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ -#include "Msp430Timer.h" - -interface Msp430Compare -{ - async command uint16_t getEvent(); - async command void setEvent( uint16_t time ); - async command void setEventFromPrev( uint16_t delta ); - async command void setEventFromNow( uint16_t delta ); - - async event void fired(); - -} - diff --git a/tos/chips/msp430X/timer/Msp430Counter32khzC.nc b/tos/chips/msp430X/timer/Msp430Counter32khzC.nc deleted file mode 100644 index 3d72f726f6..0000000000 --- a/tos/chips/msp430X/timer/Msp430Counter32khzC.nc +++ /dev/null @@ -1,42 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Msp430Counter32khC provides the standard 32khz counter for the MSP430. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration Msp430Counter32khzC -{ - provides interface Counter as Msp430Counter32khz; -} -implementation -{ - components Msp430TimerC; - components new Msp430CounterC(T32khz) as Counter; - - Msp430Counter32khz = Counter; - Counter.Msp430Timer -> Msp430TimerC.TimerB; -} - diff --git a/tos/chips/msp430X/timer/Msp430CounterC.nc b/tos/chips/msp430X/timer/Msp430CounterC.nc deleted file mode 100644 index e380f359dc..0000000000 --- a/tos/chips/msp430X/timer/Msp430CounterC.nc +++ /dev/null @@ -1,58 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Msp430Counter is a generic component that wraps the MSP430 HPL timers into a - * TinyOS Counter. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -generic module Msp430CounterC( typedef frequency_tag ) @safe() -{ - provides interface Counter as Counter; - uses interface Msp430Timer; -} -implementation -{ - async command uint16_t Counter.get() - { - return call Msp430Timer.get(); - } - - async command bool Counter.isOverflowPending() - { - return call Msp430Timer.isOverflowPending(); - } - - async command void Counter.clearOverflow() - { - call Msp430Timer.clearOverflow(); - } - - async event void Msp430Timer.overflow() - { - signal Counter.overflow(); - } -} - diff --git a/tos/chips/msp430X/timer/Msp430CounterMicroC.nc b/tos/chips/msp430X/timer/Msp430CounterMicroC.nc deleted file mode 100644 index d43f22f463..0000000000 --- a/tos/chips/msp430X/timer/Msp430CounterMicroC.nc +++ /dev/null @@ -1,43 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Msp430Counter32khC provides the standard 32khz counter for the MSP430. - * - * @author Cory Sharp - * @see Please refer to TEP 102 for more information about this component and its - * intended use. - */ - -configuration Msp430CounterMicroC -{ - provides interface Counter as Msp430CounterMicro; -} -implementation -{ - components Msp430TimerC - , new Msp430CounterC(TMicro) as Counter - ; - - Msp430CounterMicro = Counter; - Counter.Msp430Timer -> Msp430TimerC.TimerA; -} - diff --git a/tos/chips/msp430X/timer/Msp430DcoCalibC.nc b/tos/chips/msp430X/timer/Msp430DcoCalibC.nc deleted file mode 100644 index 78e4e9e428..0000000000 --- a/tos/chips/msp430X/timer/Msp430DcoCalibC.nc +++ /dev/null @@ -1,36 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ - -configuration Msp430DcoCalibC -{ -} -implementation -{ - components Msp430DcoCalibP, Msp430TimerC; - - Msp430DcoCalibP.TimerMicro -> Msp430TimerC.TimerA; - Msp430DcoCalibP.Timer32khz -> Msp430TimerC.TimerB; -} - diff --git a/tos/chips/msp430X/timer/Msp430DcoCalibP.nc b/tos/chips/msp430X/timer/Msp430DcoCalibP.nc deleted file mode 100644 index d75e9aadc0..0000000000 --- a/tos/chips/msp430X/timer/Msp430DcoCalibP.nc +++ /dev/null @@ -1,82 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ - -#error "Msp430DcoCalibP is broken and will incorrectly adjust TimerA because it does not take into account MCU sleep." - -module Msp430DcoCalibP -{ - uses interface Msp430Timer as TimerMicro; - uses interface Msp430Timer as Timer32khz; -} -implementation -{ - uint16_t m_prev; - - enum - { - TARGET_DELTA = 2048, // number of 32khz ticks during 65536 ticks at 1mhz - MAX_DEVIATION = 7, // about 0.35% error - }; - - // this gets executed 32 times a second - async event void TimerMicro.overflow() - { - uint16_t now = call Timer32khz.get(); - uint16_t delta = now - m_prev; - m_prev = now; - - if( delta > (TARGET_DELTA+MAX_DEVIATION) ) - { - // too many 32khz ticks means the DCO is running too slow, speed it up - if( DCOCTL < 0xe0 ) - { - DCOCTL++; - } - else if( (BCSCTL1 & 7) < 7 ) - { - BCSCTL1++; - DCOCTL = 96; - } - } - else if( delta < (TARGET_DELTA-MAX_DEVIATION) ) - { - // too few 32khz ticks means the DCO is running too fast, slow it down - if( DCOCTL > 0 ) - { - DCOCTL--; - } - else if( (BCSCTL1 & 7) > 0 ) - { - BCSCTL1--; - DCOCTL = 128; - } - } - } - - async event void Timer32khz.overflow() - { - } -} - diff --git a/tos/chips/msp430X/timer/Msp430DcoSpec.h b/tos/chips/msp430X/timer/Msp430DcoSpec.h deleted file mode 100644 index 84ce060ac3..0000000000 --- a/tos/chips/msp430X/timer/Msp430DcoSpec.h +++ /dev/null @@ -1,49 +0,0 @@ -/* -*- mode:c++; indent-tabs-mode: nil -*- - * Copyright (c) 2007, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, - * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Specify the target cpu clock speed of your platform by overriding this file. - * - * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some - * platforms have an external high frequency oscilator to generate the SMCLK - * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These - * oscillators provide metric frequencies, but may not run in power down - * modes. Here, we need to switch the SMCLK source, which is easier if - * the external and thd DCO source frequency are the same. - * - * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) - */ - - -#ifndef MS430DCOSPEC_H -#define MS430DCOSPEC_H - -#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz -#define ACLK_KHZ 32 // the ACLK rate in binary kHz -#endif diff --git a/tos/chips/msp430X/timer/Msp430Timer.h b/tos/chips/msp430X/timer/Msp430Timer.h deleted file mode 100644 index 24641b0d45..0000000000 --- a/tos/chips/msp430X/timer/Msp430Timer.h +++ /dev/null @@ -1,94 +0,0 @@ -//$Id: Msp430Timer.h,v 1.4 2006/12/12 18:23:11 vlahan Exp $ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -//@author Cory Sharp - -#ifndef _H_Msp430Timer_h -#define _H_Msp430Timer_h - -enum { - MSP430TIMER_CM_NONE = 0, - MSP430TIMER_CM_RISING = 1, - MSP430TIMER_CM_FALLING = 2, - MSP430TIMER_CM_BOTH = 3, - - MSP430TIMER_STOP_MODE = 0, - MSP430TIMER_UP_MODE = 1, - MSP430TIMER_CONTINUOUS_MODE = 2, - MSP430TIMER_UPDOWN_MODE = 3, - - MSP430TIMER_TACLK = 0, - MSP430TIMER_TBCLK = 0, - MSP430TIMER_ACLK = 1, - MSP430TIMER_SMCLK = 2, - MSP430TIMER_INCLK = 3, - - MSP430TIMER_CLOCKDIV_1 = 0, - MSP430TIMER_CLOCKDIV_2 = 1, - MSP430TIMER_CLOCKDIV_4 = 2, - MSP430TIMER_CLOCKDIV_8 = 3, -}; - -typedef struct -{ - int ccifg : 1; // capture/compare interrupt flag - int cov : 1; // capture overflow flag - int out : 1; // output value - int cci : 1; // capture/compare input value - int ccie : 1; // capture/compare interrupt enable - int outmod : 3; // output mode - int cap : 1; // 1=capture mode, 0=compare mode - int clld : 2; // compare latch load - int scs : 1; // synchronize capture source - int ccis : 2; // capture/compare input select: 0=CCIxA, 1=CCIxB, 2=GND, 3=VCC - int cm : 2; // capture mode: 0=none, 1=rising, 2=falling, 3=both -} msp430_compare_control_t; - -typedef struct -{ - int taifg : 1; // timer A interrupt flag - int taie : 1; // timer A interrupt enable - int taclr : 1; // timer A clear: resets TAR, .id, and .mc - int _unused0 : 1; // unused - int mc : 2; // mode control: 0=stop, 1=up, 2=continuous, 3=up/down - int id : 2; // input divisor: 0=/1, 1=/2, 2=/4, 3=/8 - int tassel : 2; // timer A source select: 0=TxCLK, 1=ACLK, 2=SMCLK, 3=INCLK - int _unused1 : 6; // unused -} msp430_timer_a_control_t; - -typedef struct -{ - int tbifg : 1; // timer B interrupt flag - int tbie : 1; // timer B interrupt enable - int tbclr : 1; // timer B clear: resets TAR, .id, and .mc - int _unused0 : 1; // unused - int mc : 2; // mode control: 0=stop, 1=up, 2=continuous, 3=up/down - int id : 2; // input divisor: 0=/1, 1=/2, 2=/4, 3=/8 - int tbssel : 2; // timer B source select: 0=TxCLK, 1=ACLK, 2=SMCLK, 3=INCLK - int _unused1 : 1; // unused - int cntl : 2; // counter length: 0=16-bit, 1=12-bit, 2=10-bit, 3=8-bit - int tbclgrp : 2; // tbclx group: 0=independent, 1=0/12/34/56, 2=0/123/456, 3=all - int _unused2 : 1; // unused -} msp430_timer_b_control_t; - -#endif//_H_Msp430Timer_h - diff --git a/tos/chips/msp430X/timer/Msp430Timer.nc b/tos/chips/msp430X/timer/Msp430Timer.nc deleted file mode 100644 index d9ba87c3b1..0000000000 --- a/tos/chips/msp430X/timer/Msp430Timer.nc +++ /dev/null @@ -1,48 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - * @author Jan Hauer - */ - -//@author Cory Sharp -//@author Jan Hauer - -#include "Msp430Timer.h" - -interface Msp430Timer -{ - async command uint16_t get(); - async command bool isOverflowPending(); - async command void clearOverflow(); - async event void overflow(); - - async command void setMode( int mode ); - async command int getMode(); - async command void clear(); - async command void enableEvents(); - async command void disableEvents(); - async command void setClockSource( uint16_t clockSource ); - async command void setInputDivider( uint16_t inputDivider ); - // partial timer management, add more commands here as appropriate -} - diff --git a/tos/chips/msp430X/timer/Msp430Timer32khzC.nc b/tos/chips/msp430X/timer/Msp430Timer32khzC.nc deleted file mode 100644 index e4b723a4ab..0000000000 --- a/tos/chips/msp430X/timer/Msp430Timer32khzC.nc +++ /dev/null @@ -1,42 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ - -generic configuration Msp430Timer32khzC() -{ - provides interface Msp430Timer; - provides interface Msp430TimerControl; - provides interface Msp430Compare; -} -implementation -{ - components Msp430Timer32khzMapC as Map; - - enum { ALARM_ID = unique("Msp430Timer32khzMapC") }; - - Msp430Timer = Map.Msp430Timer[ ALARM_ID ]; - Msp430TimerControl = Map.Msp430TimerControl[ ALARM_ID ]; - Msp430Compare = Map.Msp430Compare[ ALARM_ID ]; -} - diff --git a/tos/chips/msp430X/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430X/timer/Msp430Timer32khzMapC.nc deleted file mode 100644 index 05d7a0851f..0000000000 --- a/tos/chips/msp430X/timer/Msp430Timer32khzMapC.nc +++ /dev/null @@ -1,73 +0,0 @@ -//$Id: Msp430Timer32khzMapC.nc,v 1.4 2006/12/12 18:23:11 vlahan Exp $ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz - * hardware timers on the MSP430 that are available for compile time allocation - * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. - * - * Platforms based on the MSP430 are encouraged to copy in and override this - * file, presenting only the hardware timers that are available for allocation - * on that platform. - * - * @author Cory Sharp - */ - -configuration Msp430Timer32khzMapC -{ - provides interface Msp430Timer[ uint8_t id ]; - provides interface Msp430TimerControl[ uint8_t id ]; - provides interface Msp430Compare[ uint8_t id ]; -} -implementation -{ - components Msp430TimerC; - - Msp430Timer[0] = Msp430TimerC.TimerB; - Msp430TimerControl[0] = Msp430TimerC.ControlB0; - Msp430Compare[0] = Msp430TimerC.CompareB0; - - Msp430Timer[1] = Msp430TimerC.TimerB; - Msp430TimerControl[1] = Msp430TimerC.ControlB1; - Msp430Compare[1] = Msp430TimerC.CompareB1; - - Msp430Timer[2] = Msp430TimerC.TimerB; - Msp430TimerControl[2] = Msp430TimerC.ControlB2; - Msp430Compare[2] = Msp430TimerC.CompareB2; - - Msp430Timer[3] = Msp430TimerC.TimerB; - Msp430TimerControl[3] = Msp430TimerC.ControlB3; - Msp430Compare[3] = Msp430TimerC.CompareB3; - - Msp430Timer[4] = Msp430TimerC.TimerB; - Msp430TimerControl[4] = Msp430TimerC.ControlB4; - Msp430Compare[4] = Msp430TimerC.CompareB4; - - Msp430Timer[5] = Msp430TimerC.TimerB; - Msp430TimerControl[5] = Msp430TimerC.ControlB5; - Msp430Compare[5] = Msp430TimerC.CompareB5; - - Msp430Timer[6] = Msp430TimerC.TimerB; - Msp430TimerControl[6] = Msp430TimerC.ControlB6; - Msp430Compare[6] = Msp430TimerC.CompareB6; -} - diff --git a/tos/chips/msp430X/timer/Msp430TimerC.nc b/tos/chips/msp430X/timer/Msp430TimerC.nc deleted file mode 100644 index 65b23cd8df..0000000000 --- a/tos/chips/msp430X/timer/Msp430TimerC.nc +++ /dev/null @@ -1,163 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ - -configuration Msp430TimerC -{ - provides interface Msp430Timer as TimerA; - provides interface Msp430TimerControl as ControlA0; - provides interface Msp430TimerControl as ControlA1; - provides interface Msp430TimerControl as ControlA2; - provides interface Msp430Compare as CompareA0; - provides interface Msp430Compare as CompareA1; - provides interface Msp430Compare as CompareA2; - provides interface Msp430Capture as CaptureA0; - provides interface Msp430Capture as CaptureA1; - provides interface Msp430Capture as CaptureA2; - - provides interface Msp430Timer as TimerB; - provides interface Msp430TimerControl as ControlB0; - provides interface Msp430TimerControl as ControlB1; - provides interface Msp430TimerControl as ControlB2; - provides interface Msp430TimerControl as ControlB3; - provides interface Msp430TimerControl as ControlB4; - provides interface Msp430TimerControl as ControlB5; - provides interface Msp430TimerControl as ControlB6; - provides interface Msp430Compare as CompareB0; - provides interface Msp430Compare as CompareB1; - provides interface Msp430Compare as CompareB2; - provides interface Msp430Compare as CompareB3; - provides interface Msp430Compare as CompareB4; - provides interface Msp430Compare as CompareB5; - provides interface Msp430Compare as CompareB6; - provides interface Msp430Capture as CaptureB0; - provides interface Msp430Capture as CaptureB1; - provides interface Msp430Capture as CaptureB2; - provides interface Msp430Capture as CaptureB3; - provides interface Msp430Capture as CaptureB4; - provides interface Msp430Capture as CaptureB5; - provides interface Msp430Capture as CaptureB6; -} -implementation -{ - components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE, - TASSEL0, TASSEL1, FALSE ) as Msp430TimerA - , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE, - TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB - , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0 - , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1 - , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2 - , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0 - , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1 - , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2 - , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3 - , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4 - , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5 - , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6 - , Msp430TimerCommonP as Common - ; - - // Timer A - TimerA = Msp430TimerA.Timer; - Msp430TimerA.Overflow -> Msp430TimerA.Event[5]; - Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0; - Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1; - - // Timer A0 - ControlA0 = Msp430TimerA0.Control; - CompareA0 = Msp430TimerA0.Compare; - CaptureA0 = Msp430TimerA0.Capture; - Msp430TimerA0.Timer -> Msp430TimerA.Timer; - Msp430TimerA0.Event -> Msp430TimerA.Event[0]; - - // Timer A1 - ControlA1 = Msp430TimerA1.Control; - CompareA1 = Msp430TimerA1.Compare; - CaptureA1 = Msp430TimerA1.Capture; - Msp430TimerA1.Timer -> Msp430TimerA.Timer; - Msp430TimerA1.Event -> Msp430TimerA.Event[1]; - - // Timer A2 - ControlA2 = Msp430TimerA2.Control; - CompareA2 = Msp430TimerA2.Compare; - CaptureA2 = Msp430TimerA2.Capture; - Msp430TimerA2.Timer -> Msp430TimerA.Timer; - Msp430TimerA2.Event -> Msp430TimerA.Event[2]; - - // Timer B - TimerB = Msp430TimerB.Timer; - Msp430TimerB.Overflow -> Msp430TimerB.Event[7]; - Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0; - Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1; - - // Timer B0 - ControlB0 = Msp430TimerB0.Control; - CompareB0 = Msp430TimerB0.Compare; - CaptureB0 = Msp430TimerB0.Capture; - Msp430TimerB0.Timer -> Msp430TimerB.Timer; - Msp430TimerB0.Event -> Msp430TimerB.Event[0]; - - // Timer B1 - ControlB1 = Msp430TimerB1.Control; - CompareB1 = Msp430TimerB1.Compare; - CaptureB1 = Msp430TimerB1.Capture; - Msp430TimerB1.Timer -> Msp430TimerB.Timer; - Msp430TimerB1.Event -> Msp430TimerB.Event[1]; - - // Timer B2 - ControlB2 = Msp430TimerB2.Control; - CompareB2 = Msp430TimerB2.Compare; - CaptureB2 = Msp430TimerB2.Capture; - Msp430TimerB2.Timer -> Msp430TimerB.Timer; - Msp430TimerB2.Event -> Msp430TimerB.Event[2]; - - // Timer B3 - ControlB3 = Msp430TimerB3.Control; - CompareB3 = Msp430TimerB3.Compare; - CaptureB3 = Msp430TimerB3.Capture; - Msp430TimerB3.Timer -> Msp430TimerB.Timer; - Msp430TimerB3.Event -> Msp430TimerB.Event[3]; - - // Timer B4 - ControlB4 = Msp430TimerB4.Control; - CompareB4 = Msp430TimerB4.Compare; - CaptureB4 = Msp430TimerB4.Capture; - Msp430TimerB4.Timer -> Msp430TimerB.Timer; - Msp430TimerB4.Event -> Msp430TimerB.Event[4]; - - // Timer B5 - ControlB5 = Msp430TimerB5.Control; - CompareB5 = Msp430TimerB5.Compare; - CaptureB5 = Msp430TimerB5.Capture; - Msp430TimerB5.Timer -> Msp430TimerB.Timer; - Msp430TimerB5.Event -> Msp430TimerB.Event[5]; - - // Timer B6 - ControlB6 = Msp430TimerB6.Control; - CompareB6 = Msp430TimerB6.Compare; - CaptureB6 = Msp430TimerB6.Capture; - Msp430TimerB6.Timer -> Msp430TimerB.Timer; - Msp430TimerB6.Event -> Msp430TimerB.Event[6]; -} - diff --git a/tos/chips/msp430X/timer/Msp430TimerCapComP.nc b/tos/chips/msp430X/timer/Msp430TimerCapComP.nc deleted file mode 100644 index 548aecc301..0000000000 --- a/tos/chips/msp430X/timer/Msp430TimerCapComP.nc +++ /dev/null @@ -1,189 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ - -#include "Msp430Timer.h" - -generic module Msp430TimerCapComP( - uint16_t TxCCTLx_addr, - uint16_t TxCCRx_addr - ) @safe() -{ - provides interface Msp430TimerControl as Control; - provides interface Msp430Compare as Compare; - provides interface Msp430Capture as Capture; - uses interface Msp430Timer as Timer; - uses interface Msp430TimerEvent as Event; -} -implementation -{ - #define TxCCTLx (*TCAST(volatile TYPE_TACCTL0* ONE, TxCCTLx_addr)) - #define TxCCRx (*TCAST(volatile TYPE_TACCR0* ONE, TxCCRx_addr)) - - typedef msp430_compare_control_t cc_t; - - DEFINE_UNION_CAST(CC2int,uint16_t,cc_t) - DEFINE_UNION_CAST(int2CC,cc_t,uint16_t) - - uint16_t compareControl() - { - cc_t x = { - cm : 1, // capture on rising edge - ccis : 0, // capture/compare input select - clld : 0, // TBCL1 loads on write to TBCCR1 - cap : 0, // compare mode - ccie : 0, // capture compare interrupt enable - }; - return CC2int(x); - } - - uint16_t captureControl(uint8_t l_cm) - { - cc_t x = { - cm : l_cm & 0x03, // capture on none, rising, falling or both edges - ccis : 0, // capture/compare input select - clld : 0, // TBCL1 loads on write to TBCCR1 - cap : 1, // compare mode - scs : 1, // synchronous capture mode - ccie : 0, // capture compare interrupt enable - }; - return CC2int(x); - } - - async command cc_t Control.getControl() - { - return int2CC(TxCCTLx); - } - - async command bool Control.isInterruptPending() - { - return TxCCTLx & CCIFG; - } - - async command void Control.clearPendingInterrupt() - { - CLR_FLAG(TxCCTLx,CCIFG); - } - - async command void Control.setControl( cc_t x ) - { - TxCCTLx = CC2int(x); - } - - async command void Control.setControlAsCompare() - { - TxCCTLx = compareControl(); - } - - async command void Control.setControlAsCapture( uint8_t cm ) - { - TxCCTLx = captureControl( cm ); - } - - async command void Capture.setEdge(uint8_t cm) - { - cc_t t = call Control.getControl(); - t.cm = cm & 0x03; - TxCCTLx = CC2int(t); - } - - async command void Capture.setSynchronous( bool sync ) - { - if( sync ) - SET_FLAG( TxCCTLx, SCS ); - else - CLR_FLAG( TxCCTLx, SCS ); - } - - async command void Control.enableEvents() - { - SET_FLAG( TxCCTLx, CCIE ); - } - - async command void Control.disableEvents() - { - CLR_FLAG( TxCCTLx, CCIE ); - } - - async command bool Control.areEventsEnabled() - { - return READ_FLAG( TxCCTLx, CCIE ); - } - - async command uint16_t Compare.getEvent() - { - return TxCCRx; - } - - async command uint16_t Capture.getEvent() - { - return TxCCRx; - } - - async command void Compare.setEvent( uint16_t x ) - { - TxCCRx = x; - } - - async command void Compare.setEventFromPrev( uint16_t x ) - { - TxCCRx += x; - } - - async command void Compare.setEventFromNow( uint16_t x ) - { - TxCCRx = call Timer.get() + x; - } - - async command bool Capture.isOverflowPending() - { - return READ_FLAG( TxCCTLx, COV ); - } - - async command void Capture.clearOverflow() - { - CLR_FLAG( TxCCTLx, COV ); - } - - async event void Event.fired() - { - if( (call Control.getControl()).cap ) - signal Capture.captured( call Capture.getEvent() ); - else - signal Compare.fired(); - } - - default async event void Capture.captured( uint16_t n ) - { - } - - default async event void Compare.fired() - { - } - - async event void Timer.overflow() - { - } -} - diff --git a/tos/chips/msp430X/timer/Msp430TimerCommonP.nc b/tos/chips/msp430X/timer/Msp430TimerCommonP.nc deleted file mode 100644 index deb95aedc5..0000000000 --- a/tos/chips/msp430X/timer/Msp430TimerCommonP.nc +++ /dev/null @@ -1,51 +0,0 @@ - -module Msp430TimerCommonP @safe() -{ - provides interface Msp430TimerEvent as VectorTimerA0; - provides interface Msp430TimerEvent as VectorTimerA1; - provides interface Msp430TimerEvent as VectorTimerB0; - provides interface Msp430TimerEvent as VectorTimerB1; -} -implementation -{ - TOSH_SIGNAL(TIMERA0_VECTOR) { - #ifdef DXNRG - dxnrg_on(DXNRG_IRQ); - #endif - signal VectorTimerA0.fired(); - #ifdef DXNRG - dxnrg_off(DXNRG_IRQ); - #endif - } - - TOSH_SIGNAL(TIMERA1_VECTOR) { - #ifdef DXNRG - dxnrg_on(DXNRG_IRQ); - #endif - signal VectorTimerA1.fired(); - #ifdef DXNRG - dxnrg_off(DXNRG_IRQ); - #endif - } - - TOSH_SIGNAL(TIMERB0_VECTOR) { - #ifdef DXNRG - dxnrg_on(DXNRG_IRQ); - #endif - signal VectorTimerB0.fired(); - #ifdef DXNRG - dxnrg_off(DXNRG_IRQ); - #endif - } - - TOSH_SIGNAL(TIMERB1_VECTOR) { - #ifdef DXNRG - dxnrg_on(DXNRG_IRQ); - #endif - signal VectorTimerB1.fired(); - #ifdef DXNRG - dxnrg_off(DXNRG_IRQ); - #endif - } -} - diff --git a/tos/chips/msp430X/timer/Msp430TimerControl.nc b/tos/chips/msp430X/timer/Msp430TimerControl.nc deleted file mode 100644 index fdc64c576f..0000000000 --- a/tos/chips/msp430X/timer/Msp430TimerControl.nc +++ /dev/null @@ -1,51 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - * @author Joe Polastre - */ - -#include "Msp430Timer.h" - -interface Msp430TimerControl -{ - async command msp430_compare_control_t getControl(); - async command bool isInterruptPending(); - async command void clearPendingInterrupt(); - - async command void setControl(msp430_compare_control_t control); - async command void setControlAsCompare(); - - /** - * Sets the timer in capture mode. - * @param cm configures the capture to occur on none, rising, falling or rising_and_falling edges - * Msp430Timer.h has convenience definitions: - * MSP430TIMER_CM_NONE, MSP430TIMER_CM_RISING, MSP430TIMER_CM_FALLING, MSP430TIMER_CM_BOTH - */ - async command void setControlAsCapture(uint8_t cm); - - async command void enableEvents(); - async command void disableEvents(); - async command bool areEventsEnabled(); - -} - diff --git a/tos/chips/msp430X/timer/Msp430TimerEvent.nc b/tos/chips/msp430X/timer/Msp430TimerEvent.nc deleted file mode 100644 index 2aa0e85668..0000000000 --- a/tos/chips/msp430X/timer/Msp430TimerEvent.nc +++ /dev/null @@ -1,30 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ - -interface Msp430TimerEvent -{ - async event void fired(); -} - diff --git a/tos/chips/msp430X/timer/Msp430TimerP.nc b/tos/chips/msp430X/timer/Msp430TimerP.nc deleted file mode 100644 index 949654201a..0000000000 --- a/tos/chips/msp430X/timer/Msp430TimerP.nc +++ /dev/null @@ -1,139 +0,0 @@ - -/* "Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * @author Cory Sharp - */ - -#include "msp430regtypes.h" - -generic module Msp430TimerP( - uint16_t TxIV_addr, - uint16_t TxR_addr, - uint16_t TxCTL_addr, - uint16_t TxIFG, - uint16_t TxCLR, - uint16_t TxIE, - uint16_t TxSSEL0, - uint16_t TxSSEL1, - bool isClockSourceAsync ) @safe() -{ - provides interface Msp430Timer as Timer; - provides interface Msp430TimerEvent as Event[uint8_t n]; - uses interface Msp430TimerEvent as Overflow; - uses interface Msp430TimerEvent as VectorTimerX0; - uses interface Msp430TimerEvent as VectorTimerX1; -} -implementation -{ - #define TxIV (*TCAST(volatile TYPE_TAIV* ONE, TxIV_addr)) - #define TxR (*TCAST(volatile TYPE_TAR* ONE, TxR_addr)) - #define TxCTL (*TCAST(volatile TYPE_TACTL* ONE, TxCTL_addr)) - - async command uint16_t Timer.get() - { - // CSS 10 Feb 2006: Brano Kusy notes MSP430 User's Guide, Section 12.2.1, - // Note says reading a counter may return garbage if its clock source is - // async. The noted work around is to take a majority vote. - - if( isClockSourceAsync ) { - atomic { - uint16_t t0; - uint16_t t1=TxR; - do { t0=t1; t1=TxR; } while( t0 != t1 ); - return t1; - } - } - else { - return TxR; - } - } - - async command bool Timer.isOverflowPending() - { - return TxCTL & TxIFG; - } - - async command void Timer.clearOverflow() - { - CLR_FLAG(TxCTL,TxIFG); - } - - async command void Timer.setMode( int mode ) - { - TxCTL = (TxCTL & ~(MC1|MC0)) | ((mode<<4) & (MC1|MC0)); - } - - async command int Timer.getMode() - { - return (TxCTL & (MC1|MC0)) >> 4; - } - - async command void Timer.clear() - { - TxCTL |= TxCLR; - } - - async command void Timer.enableEvents() - { - TxCTL |= TxIE; - } - - async command void Timer.disableEvents() - { - TxCTL &= ~TxIE; - } - - async command void Timer.setClockSource( uint16_t clockSource ) - { - TxCTL = (TxCTL & ~(TxSSEL0|TxSSEL1)) | ((clockSource << 8) & (TxSSEL0|TxSSEL1)); - } - - async command void Timer.setInputDivider( uint16_t inputDivider ) - { - TxCTL = (TxCTL & ~(ID0|ID1)) | ((inputDivider << 6) & (ID0|ID1)); - } - - async event void VectorTimerX0.fired() - { - signal Event.fired[0](); - } - - async event void VectorTimerX1.fired() - { - uint8_t n = TxIV; - signal Event.fired[ n >> 1 ](); - } - - async event void Overflow.fired() - { - signal Timer.overflow(); - } - - default async event void Timer.overflow() - { - } - - default async event void Event.fired[uint8_t n]() - { - } -} - diff --git a/tos/chips/msp430X/timer/Msp430XDcoCalib.h b/tos/chips/msp430X/timer/Msp430XDcoCalib.h deleted file mode 100755 index 3301446b35..0000000000 --- a/tos/chips/msp430X/timer/Msp430XDcoCalib.h +++ /dev/null @@ -1,148 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - -/** - * This code is extracted from code examples at TI website. - * - * - * @author: Xavier Orduña (xorduna@dexmatech.com) - */ - - -#ifndef MS430XDCOCALIB_H -#define MS430XDCOCALIB_H - -#define DELTA_1MHZ 244 -#define DELTA_8MHZ 1953 -#define DELTA_12MHZ 2930 -#define DELTA_16MHZ 3906 - - -unsigned char CAL_DATA[8]; -//volatile unsigned int k; -int dcoj; - -char *Flash_ptrA; -void Set_DCO(unsigned int Delta); - - -void dco_flash() -{ - //WDTCTL = WDTPW + WDTHOLD; - for (dcoj = 0; dcoj < 0xfffe; dcoj++); - P5OUT=0x00; - - P5DIR=0x21; - //P5DIR=0x20; - P5OUT=0x01; - - - P2SEL |= 0x02; - P2DIR |= 0x02; - - - - dcoj = 0; - Set_DCO(DELTA_16MHZ); // Set DCO and obtain constants - CAL_DATA[dcoj++] = DCOCTL; - CAL_DATA[dcoj++] = BCSCTL1; - - Set_DCO(DELTA_12MHZ); // Set DCO and obtain constants - CAL_DATA[dcoj++] = DCOCTL; - CAL_DATA[dcoj++] = BCSCTL1; - - Set_DCO(DELTA_8MHZ); // Set DCO and obtain constants - CAL_DATA[dcoj++] = DCOCTL; - CAL_DATA[dcoj++] = BCSCTL1; - - Set_DCO(DELTA_1MHZ); // Set DCO and obtain constants - CAL_DATA[dcoj++] = DCOCTL; - CAL_DATA[dcoj++] = BCSCTL1; - - Flash_ptrA = (char *)0x10C0; // Point to beginning of seg A - FCTL2 = FWKEY + FSSEL0 + FN1; // MCLK/3 for Flash Timing Generator - FCTL1 = FWKEY + ERASE; // Set Erase bit - FCTL3 = FWKEY + LOCKA; // Clear LOCK & LOCKA bits - - *Flash_ptrA = 0x00; // Dummy write to erase Flash seg A - FCTL1 = FWKEY + WRT; // Set WRT bit for write operation - Flash_ptrA = (char *)0x10F8; // Point to beginning of cal consts - - for (dcoj = 0; dcoj < 8; dcoj++) - *Flash_ptrA++ = CAL_DATA[dcoj]; // re-flash DCO calibration data - - FCTL1 = FWKEY; // Clear WRT bit - FCTL3 = FWKEY + LOCKA + LOCK; // Set LOCK & LOCKA bit - - P5OUT ^= 0x20; // Toggle LED - //P5OUT ^= 0x20; // Toggle LED - -} - -void Set_DCO(unsigned int Delta) // Set DCO to selected frequency -{ - unsigned int Compare, Oldcapture = 0; - - BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8 - TACCTL2 = CM_1 + CCIS_1 + CAP; // CAP, ACLK - TACTL = TASSEL_2 + MC_2 + TACLR; // SMCLK, cont-mode, clear - - while (1) - { - while (!(CCIFG & TACCTL2)); // Wait until capture occured - TACCTL2 &= ~CCIFG; // Capture occured, clear flag - Compare = TACCR2; // Get current captured SMCLK - Compare = Compare - Oldcapture; // SMCLK difference - Oldcapture = TACCR2; // Save current captured SMCLK - - if (Delta == Compare) - break; // If equal, leave "while(1)" - else if (Delta < Compare) - { - DCOCTL--; // DCO is too fast, slow it down - if (DCOCTL == 0xFF) // Did DCO roll under? - if (BCSCTL1 & 0x0f) - BCSCTL1--; // Select lower RSEL - } - else - { - DCOCTL++; // DCO is too slow, speed it up - if (DCOCTL == 0x00) // Did DCO roll over? - if ((BCSCTL1 & 0x0f) != 0x0f) - BCSCTL1++; // Sel higher RSEL - } - } - TACCTL2 = 0; // Stop TACCR2 - TACTL = 0; // Stop Timer_A - BCSCTL1 &= ~DIVA_3; // ACLK = LFXT1CLK -} -#endif diff --git a/tos/chips/msp430X/usci/HplMsp430UsciA.nc b/tos/chips/msp430X/usci/HplMsp430UsciA.nc deleted file mode 100755 index 57b802f67a..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciA.nc +++ /dev/null @@ -1,166 +0,0 @@ -/** - * Copyright (c) 2010 Eric B. Decker - * All rights reserved. - * - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Copyright (c) 2004-2005, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the DEXMA SENSORS SL, Eric B. Decker, Technische - * Universitaet Berlin nor the names of its contributors may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL, Eric B. Decker, Technische Universitaet Berlin, OR - * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Byte-level interface to control Usci based modules (MSP430X), msp430f2618 etc. - * USCI_A supports Uart, SPI, and irDA modes. USCI_B SPI and I2C. Stateless - * interface modeled after HplMsp430Usart of the MSP430 family. - * - * @author Vlado Handziski (handzisk@tkn.tu-berlin.de) - * @author Jan Hauer (hauer@tkn.tu-berlin.de) - * @author Joe Polastre - * @author Xavier Orduna - * @author Eric B. Decker - * - * see msp430usci.h for basic definitions. - * See TI MSP430x2xx Family User's Guide SLAU144E for details. - */ - -#include "msp430usci.h" - -interface HplMsp430UsciA { - - /* UCxxCTL0 */ - async command void setUctl0(msp430_uctl0_t control); - async command msp430_uctl0_t getUctl0(); - - /* UCxxCTL1 */ - async command void setUctl1(msp430_uctl1_t control); - async command msp430_uctl1_t getUctl1(); - - /* UCxxBR1 UCxxBR0 */ - async command void setUbr(uint16_t ubr); - async command uint16_t getUbr(); - - /* UCxxMCTL */ - async command void setUmctl(uint8_t umctl); - async command uint8_t getUmctl(); - - /* - * access usci status registers. yes there are control - * bits in the status register. - */ - /* UCxxSTAT */ - async command void setUstat(uint8_t ustat); - async command uint8_t getUstat(); - - /* - * resetUsci() - reset or unreset module port - * - * reset: TRUE (set UCSWRST) - * FALSE (unset UCSWRST), let the port run - */ - async command void resetUsci(bool reset); - - /* - * return enum indicating what mode the usci port in in. - */ - async command msp430_uscimode_t getMode(); - - /* - * configure or deconfigure gpio pins for SPI mode - * - * switches io pins between port and module function. - */ - async command void enableSpi(); - async command void disableSpi(); - - /* - * Returns TRUE if the Usci is in SPI mode - */ - async command bool isSpi(); - - /* - * configure usci as spi using config. - * leaves interrupts disabled. - */ - async command void setModeSpi(msp430_spi_union_config_t* config); - - /* Interrupt control */ - async command void disableRxIntr(); - async command void disableTxIntr(); - async command void disableIntr(); - async command void enableRxIntr(); - async command void enableTxIntr(); - async command void enableIntr(); - - async command bool isTxIntrPending(); - async command bool isRxIntrPending(); - async command void clrTxIntr(); - async command void clrRxIntr(); - async command void clrIntr(); - - async command bool isTxEmpty(); - - /** - * Transmit a byte of data. When the transmission is completed, - * txDone is generated. Only then a new byte may be - * transmitted, otherwise the previous byte will be overwritten. - */ - async command void tx(uint8_t data); - - /** - * Get current value from RX-buffer. - * - * return: byte received. - */ - async command uint8_t rx(); - - /* - * Returns TRUE if the Usci is in Uart mode - */ - async command bool isUart(); - - /* - * configure or deconfigure gpio pins for UART mode - * - * switches io pins between port and module function. - */ - async command void enableUart(); - async command void disableUart(); - - /* - * configure usci as uart using config. - * leaves interrupts disabled. - */ - async command void setModeUart(msp430_uart_union_config_t* config); -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciA0C.nc b/tos/chips/msp430X/usci/HplMsp430UsciA0C.nc deleted file mode 100755 index 86a728c7cf..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciA0C.nc +++ /dev/null @@ -1,124 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose, without fee, and without written - * agreement is hereby granted, provided that the above copyright - * notice, the following two paragraphs and the author appear in all - * copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY - * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL - * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS - * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE - * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF - * CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, - * UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * An HPL abstraction of USCIA0 on the MSP430X. - * - * @author Jonathan Hui - * @author Joe Polastre - * @author Xavier Orduna - * @version $Revision: 1.6 $ $Date: 2008/05/15 23:57:13 $ - */ - -#include "msp430usci.h" - -#define USING_USCIA0 1 - - -configuration HplMsp430UsciA0C { - - provides interface HplMsp430UsciA; - provides interface HplMsp430UsciInterrupts; - -} - -implementation { - - components HplMsp430UsciA0P as HplUsciP; - HplMsp430UsciA = HplUsciP; - HplMsp430UsciInterrupts = HplUsciP; - - components HplMsp430GeneralIOC as GIO; - HplUsciP.SIMO -> GIO.UCA0SIMO; - HplUsciP.SOMI -> GIO.UCA0SOMI; - HplUsciP.UCLK -> GIO.UCA0CLK; - HplUsciP.URXD -> GIO.UCA0RXD; - HplUsciP.UTXD -> GIO.UCA0TXD; - - components HplMsp430UsciAB0RawInterruptsP as UsciRawInterrupts; - HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciA; - -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430X/usci/HplMsp430UsciA0P.nc deleted file mode 100755 index 66caf77512..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciA0P.nc +++ /dev/null @@ -1,334 +0,0 @@ -/** - * Copyright (c) 2010 Eric B. Decker - * All rights reserved. - * - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Copyright (c) 2004-2005, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the DEXMA SENSORS SL, ARCHED ROCK, Technische - * Universitaet Berlin nor the names of its contributors may be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Eric B. - * Decker, DEXMA SENSORS SL, ARCHED ROCK, Technische Universitaet Berlin, - * OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -#include "msp430usci.h" -/** - * Implementation of usci A0 (uart or spi) low level functionality - stateless. - * Setting a mode will by default disable USCI-Interrupts. - * - * @author: Jan Hauer - * @author: Jonathan Hui - * @author: Vlado Handziski - * @author: Joe Polastre - * @author: Philipp Huppertz - * @author: Xavier Orduna - * @author: Eric B. Decker - * - * A0, A1: uart, spi, irda. - * B0, B1: spi, i2c. - * - * This module interfaces to usciA0: uart or spi. - */ - -module HplMsp430UsciA0P @safe() { - provides interface HplMsp430UsciA as Usci; - provides interface HplMsp430UsciInterrupts as Interrupts; - - uses interface HplMsp430GeneralIO as SIMO; - uses interface HplMsp430GeneralIO as SOMI; - uses interface HplMsp430GeneralIO as UCLK; - uses interface HplMsp430GeneralIO as URXD; - uses interface HplMsp430GeneralIO as UTXD; - - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; -} - -implementation -{ - MSP430REG_NORACE(IE2); - MSP430REG_NORACE(IFG2); - MSP430REG_NORACE(UCA0CTL0); - MSP430REG_NORACE(UCA0CTL1); - MSP430REG_NORACE(UCA0TXBUF); - - async event void UsciRawInterrupts.rxDone(uint8_t temp) { - signal Interrupts.rxDone(temp); - } - - async event void UsciRawInterrupts.txDone() { - signal Interrupts.txDone(); - } - - /* Control registers */ - async command void Usci.setUctl0(msp430_uctl0_t control) { - UCA0CTL0=uctl02int(control); - } - - async command msp430_uctl0_t Usci.getUctl0() { - return int2uctl0(UCA0CTL0); - } - - async command void Usci.setUctl1(msp430_uctl1_t control) { - UCA0CTL1=uctl12int(control); - } - - async command msp430_uctl1_t Usci.getUctl1() { - return int2uctl1(UCA0CTL0); - } - - async command void Usci.setUbr(uint16_t control) { - atomic { - UCA0BR0 = control & 0x00FF; - UCA0BR1 = (control >> 8) & 0x00FF; - } - } - - async command uint16_t Usci.getUbr() { - return (UCA0BR1 << 8) + UCA0BR0; - } - - async command void Usci.setUmctl(uint8_t control) { - UCA0MCTL=control; - } - - async command uint8_t Usci.getUmctl() { - return UCA0MCTL; - } - - async command void Usci.setUstat(uint8_t control) { - UCA0STAT=control; - } - - async command uint8_t Usci.getUstat() { - return UCA0STAT; - } - - /* Operations */ - async command void Usci.resetUsci(bool reset) { - if (reset) - SET_FLAG(UCA0CTL1, UCSWRST); - else - CLR_FLAG(UCA0CTL1, UCSWRST); - } - - bool isSpi() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCA0CTL0); - return (tmp.ucsync && tmp.ucmode != 3); - } - - bool isI2C() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCA0CTL0); - return (tmp.ucsync && tmp.ucmode == 3); - } - - bool isUart() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCA0CTL0); - return (tmp.ucsync == 0); - } - - async command bool Usci.isSpi() { - return isSpi(); - } - - async command msp430_uscimode_t Usci.getMode() { - if (isSpi()) - return USCI_SPI; - if (isI2C()) - return USCI_I2C; - if (isUart()) - return USCI_UART; - else - return USCI_NONE; - } - - async command void Usci.enableSpi() { - atomic { - call SIMO.selectModuleFunc(); - call SOMI.selectModuleFunc(); - call UCLK.selectModuleFunc(); - } - } - - async command void Usci.disableSpi() { - atomic { - call SIMO.selectIOFunc(); - call SOMI.selectIOFunc(); - call UCLK.selectIOFunc(); - } - } - - void configSpi(msp430_spi_union_config_t* config) { - UCA0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); - UCA0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); - call Usci.setUbr(config->spiRegisters.ubr); - call Usci.setUmctl(0); /* MCTL <- 0 if spi */ - } - - async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); - call Usci.enableSpi(); - configSpi(config); - call Usci.resetUsci(FALSE); - } - } - - async command bool Usci.isTxIntrPending(){ - if (IFG2 & UCA0TXIFG) - return TRUE; - return FALSE; - } - - async command bool Usci.isRxIntrPending(){ - if (IFG2 & UCA0RXIFG) - return TRUE; - return FALSE; - } - - async command void Usci.clrTxIntr(){ - IFG2 &= ~UCA0TXIFG; - } - - async command void Usci.clrRxIntr() { - IFG2 &= ~UCA0RXIFG; - } - - async command void Usci.clrIntr() { - IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); - } - - async command void Usci.disableRxIntr() { - IE2 &= ~UCA0RXIE; - } - - async command void Usci.disableTxIntr() { - IE2 &= ~UCA0TXIE; - } - - async command void Usci.disableIntr() { - IE2 &= ~(UCA0TXIE | UCA0RXIE); - } - - async command void Usci.enableRxIntr() { - atomic { - IFG2 &= ~UCA0RXIFG; - IE2 |= UCA0RXIE; - } - } - - async command void Usci.enableTxIntr() { - atomic { - IFG2 &= ~UCA0TXIFG; - IE2 |= UCA0TXIE; - } - } - - async command void Usci.enableIntr() { - atomic { - IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); - IE2 |= (UCA0TXIE | UCA0RXIE); - } - } - - /* - * Returns true if the transmit path is empty. - * - * in the usart hardware there was a seperate bit that indicated - * both parts of the transmitter path were empty. The TXBUF and - * the outgoing shift register. - * - * Unfortunately, TI changed this in the USCI h/w to a single busy - * bit that indcates that either the tx or the rx path is busy. - * So if the transmitter is idle but we are receiving a character - * then we still think the transmitter is busy. TI sucks. - */ - async command bool Usci.isTxEmpty() { - if (UCA0STAT & UCBUSY) - return FALSE; - return TRUE; - } - - async command void Usci.tx(uint8_t data) { - UCA0TXBUF = data; - } - - async command uint8_t Usci.rx() { - return UCA0RXBUF; - } - - async command bool Usci.isUart() { - return isUart(); - } - - async command void Usci.enableUart() { - atomic { - call UTXD.selectModuleFunc(); - call URXD.selectModuleFunc(); - } - } - - async command void Usci.disableUart() { - atomic { - call UTXD.selectIOFunc(); - call URXD.selectIOFunc(); - } - } - - void configUart(msp430_uart_union_config_t* config) { - UCA0CTL1 = (config->uartRegisters.uctl1 | UCSWRST); - UCA0CTL0 = config->uartRegisters.uctl0; /* ucsync should be off */ - call Usci.setUbr(config->uartRegisters.ubr); - call Usci.setUmctl(config->uartRegisters.umctl); - } - - async command void Usci.setModeUart(msp430_uart_union_config_t* config) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); - call Usci.enableUart(); - configUart(config); - call Usci.resetUsci(FALSE); - } - } -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciA1C.nc b/tos/chips/msp430X/usci/HplMsp430UsciA1C.nc deleted file mode 100755 index cbb4091684..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciA1C.nc +++ /dev/null @@ -1,124 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose, without fee, and without written - * agreement is hereby granted, provided that the above copyright - * notice, the following two paragraphs and the author appear in all - * copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY - * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL - * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS - * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE - * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF - * CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, - * UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * An HPL abstraction of USCIA1 on the MSP430X. - * - * @author Jonathan Hui - * @author Joe Polastre - * @author Xavier Orduna - * @version $Revision: 1.6 $ $Date: 2008/05/15 23:57:13 $ - */ - -#include "msp430usci.h" - -#define USING_USCIA1 1 - - -configuration HplMsp430UsciA1C { - - provides interface HplMsp430UsciA; - provides interface HplMsp430UsciInterrupts; - -} - -implementation { - - components HplMsp430UsciA1P as HplUsciP; - HplMsp430UsciA = HplUsciP; - HplMsp430UsciInterrupts = HplUsciP; - - components HplMsp430GeneralIOC as GIO; - HplUsciP.SIMO -> GIO.UCA1SIMO; - HplUsciP.SOMI -> GIO.UCA1SOMI; - HplUsciP.UCLK -> GIO.UCA1CLK; - HplUsciP.URXD -> GIO.UCA1RXD; - HplUsciP.UTXD -> GIO.UCA1TXD; - - components HplMsp430UsciAB1RawInterruptsP as UsciRawInterrupts; - HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciA; - -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430X/usci/HplMsp430UsciA1P.nc deleted file mode 100755 index cd8b97fe2f..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciA1P.nc +++ /dev/null @@ -1,336 +0,0 @@ -/** - * Copyright (c) 2010 Eric B. Decker - * All rights reserved. - * - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Copyright (c) 2004-2005, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the DEXMA SENSORS SL, ARCHED ROCK, Technische - * Universitaet Berlin nor the names of its contributors may be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Eric B. - * Decker, DEXMA SENSORS SL, ARCHED ROCK, Technische Universitaet Berlin, - * OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -#include "msp430usci.h" -/** - * Implementation of usci A1 (uart or spi) low level functionality - stateless. - * Setting a mode will by default disable USCI-Interrupts. - * - * @author: Jan Hauer - * @author: Jonathan Hui - * @author: Vlado Handziski - * @author: Joe Polastre - * @author: Philipp Huppertz - * @author: Xavier Orduna - * @author: Eric B. Decker - * - * A0, A1: uart, spi, irda. - * B0, B1: spi, i2c. - * - * This module interfaces to usciA1: uart or spi. - */ - -module HplMsp430UsciA1P @safe() { - provides interface HplMsp430UsciA as Usci; - provides interface HplMsp430UsciInterrupts as Interrupts; - - uses interface HplMsp430GeneralIO as SIMO; - uses interface HplMsp430GeneralIO as SOMI; - uses interface HplMsp430GeneralIO as UCLK; - uses interface HplMsp430GeneralIO as URXD; - uses interface HplMsp430GeneralIO as UTXD; - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; - -} -implementation -{ - MSP430REG_NORACE(UC1IE); - MSP430REG_NORACE(UC1IFG); - MSP430REG_NORACE(UCA1CTL0); - MSP430REG_NORACE(UCA1CTL1); - MSP430REG_NORACE(UCA1TXBUF); - - async event void UsciRawInterrupts.rxDone(uint8_t temp) { - signal Interrupts.rxDone(temp); - } - - async event void UsciRawInterrupts.txDone() { - signal Interrupts.txDone(); - } - - /* Control registers */ - async command void Usci.setUctl0(msp430_uctl0_t control) { - UCA1CTL0=uctl02int(control); - } - - async command msp430_uctl0_t Usci.getUctl0() { - return int2uctl0(UCA1CTL0); - } - - async command void Usci.setUctl1(msp430_uctl1_t control) { - UCA1CTL1=uctl12int(control); - } - - async command msp430_uctl1_t Usci.getUctl1() { - return int2uctl1(UCA1CTL0); - } - - async command void Usci.setUbr(uint16_t control) { - atomic { - UCA1BR0 = control & 0x00FF; - UCA1BR1 = (control >> 8) & 0x00FF; - } - } - - async command uint16_t Usci.getUbr() { - return (UCA1BR1 << 8) + UCA1BR0; - } - - async command void Usci.setUmctl(uint8_t control) { - UCA1MCTL=control; - } - - async command uint8_t Usci.getUmctl() { - return UCA1MCTL; - } - - async command void Usci.setUstat(uint8_t control) { - UCA1STAT=control; - } - - async command uint8_t Usci.getUstat() { - return UCA1STAT; - } - - /* Operations */ - async command void Usci.resetUsci(bool reset) { - if (reset) - SET_FLAG(UCA1CTL1, UCSWRST); - else - CLR_FLAG(UCA1CTL1, UCSWRST); - } - - bool isSpi() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCA1CTL0); - return (tmp.ucsync && tmp.ucmode != 3); - } - - bool isI2C() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCA1CTL0); - return (tmp.ucsync && tmp.ucmode == 3); - } - - bool isUart() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCA1CTL0); - return (tmp.ucsync == 0); - } - - /* - * Is this used? - */ - async command bool Usci.isSpi() { - return isSpi(); - } - - async command msp430_uscimode_t Usci.getMode() { - if (isSpi()) - return USCI_SPI; - if (isI2C()) - return USCI_I2C; - if (isUart()) - return USCI_UART; - else - return USCI_NONE; - } - - async command void Usci.enableSpi() { - atomic { - call SIMO.selectModuleFunc(); - call SOMI.selectModuleFunc(); - call UCLK.selectModuleFunc(); - } - } - - async command void Usci.disableSpi() { - atomic { - call SIMO.selectIOFunc(); - call SOMI.selectIOFunc(); - call UCLK.selectIOFunc(); - } - } - - void configSpi(msp430_spi_union_config_t* config) { - UCA1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); - UCA1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); - call Usci.setUbr(config->spiRegisters.ubr); - call Usci.setUmctl(0); /* MCTL <- 0 if spi */ - } - - async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); - call Usci.enableSpi(); - configSpi(config); - call Usci.resetUsci(FALSE); - } - } - - async command bool Usci.isTxIntrPending(){ - if (UC1IFG & UCA1TXIFG) - return TRUE; - return FALSE; - } - - async command bool Usci.isRxIntrPending(){ - if (UC1IFG & UCA1RXIFG) - return TRUE; - return FALSE; - } - - async command void Usci.clrTxIntr(){ - UC1IFG &= ~UCA1TXIFG; - } - - async command void Usci.clrRxIntr() { - UC1IFG &= ~UCA1RXIFG; - } - - async command void Usci.clrIntr() { - UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); - } - - async command void Usci.disableRxIntr() { - UC1IE &= ~UCA1RXIE; - } - - async command void Usci.disableTxIntr() { - UC1IE &= ~UCA1TXIE; - } - - async command void Usci.disableIntr() { - UC1IE &= ~(UCA1TXIE | UCA1RXIE); - } - - async command void Usci.enableRxIntr() { - atomic { - UC1IFG &= ~UCA1RXIFG; - UC1IE |= UCA1RXIE; - } - } - - async command void Usci.enableTxIntr() { - atomic { - UC1IFG &= ~UCA1TXIFG; - UC1IE |= UCA1TXIE; - } - } - - async command void Usci.enableIntr() { - atomic { - UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); - UC1IE |= (UCA1TXIE | UCA1RXIE); - } - } - - /* - * Returns true if the transmit path is empty. - * - * in the usart hardware there was a seperate bit that indicated - * both parts of the transmitter path were empty. The TXBUF and - * the outgoing shift register. - * - * Unfortunately, TI changed this in the USCI h/w to a single busy - * bit that indcates that either the tx or the rx path is busy. - * So if the transmitter is idle but we are receiving a character - * then we still think the transmitter is busy. TI sucks. - */ - async command bool Usci.isTxEmpty() { - if (UCA1STAT & UCBUSY) - return FALSE; - return TRUE; - } - - async command void Usci.tx(uint8_t data) { - UCA1TXBUF = data; - } - - async command uint8_t Usci.rx() { - return UCA1RXBUF; - } - - async command bool Usci.isUart() { - return isUart(); - } - - async command void Usci.enableUart() { - atomic { - call UTXD.selectModuleFunc(); - call URXD.selectModuleFunc(); - } - } - - async command void Usci.disableUart() { - atomic { - call UTXD.selectIOFunc(); - call URXD.selectIOFunc(); - } - } - - void configUart(msp430_uart_union_config_t* config) { - UCA1CTL1 = (config->uartRegisters.uctl1 | UCSWRST); - UCA1CTL0 = config->uartRegisters.uctl0; /* ucsync should be off */ - call Usci.setUbr(config->uartRegisters.ubr); - call Usci.setUmctl(config->uartRegisters.umctl); - } - - async command void Usci.setModeUart(msp430_uart_union_config_t* config) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); - call Usci.enableUart(); - configUart(config); - call Usci.resetUsci(FALSE); - } - } -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciAB0RawInterruptsP.nc b/tos/chips/msp430X/usci/HplMsp430UsciAB0RawInterruptsP.nc deleted file mode 100755 index 0de081ff2e..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciAB0RawInterruptsP.nc +++ /dev/null @@ -1,85 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * An HPL abstraction for USCI A/B shared vector interrupt on the MSP430X. - * - * @author Xavier Orduna - */ -#include "msp430usci.h" - -module HplMsp430UsciAB0RawInterruptsP @safe() { - provides interface HplMsp430UsciRawInterrupts as UsciA; - provides interface HplMsp430UsciRawInterrupts as UsciB; -} - -implementation -{ - TOSH_SIGNAL(USCIAB0RX_VECTOR) { - uint8_t temp; - if (IFG2 & UCA0RXIFG){ - temp = UCA0RXBUF; - signal UsciA.rxDone(temp); - } - if (IFG2 & UCB0RXIFG){ - temp = UCB0RXBUF; - signal UsciB.rxDone(temp); - } - } - - TOSH_SIGNAL(USCIAB0TX_VECTOR) { - if ((IFG2 & UCA0TXIFG) | (IFG2 & UCA0RXIFG)){ - signal UsciA.txDone(); - } - if ((IFG2 & UCB0TXIFG) | (IFG2 & UCB0RXIFG)){ - signal UsciB.txDone(); - } - } - - - /* default handlers */ - default async event void UsciA.txDone(){ - return; - } - - default async event void UsciA.rxDone(uint8_t temp){ - return; - } - - default async event void UsciB.txDone(){ - return; - } - - default async event void UsciB.rxDone(uint8_t temp){ - return; - } - -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciAB1RawInterruptsP.nc b/tos/chips/msp430X/usci/HplMsp430UsciAB1RawInterruptsP.nc deleted file mode 100755 index 87fa917cbc..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciAB1RawInterruptsP.nc +++ /dev/null @@ -1,85 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * An HPL abstraction for USCI A/B shared vector interrupt on the MSP430X. - * - * @author Xavier Orduna - */ -#include "msp430usci.h" - -module HplMsp430UsciAB1RawInterruptsP @safe() { - provides interface HplMsp430UsciRawInterrupts as UsciA; - provides interface HplMsp430UsciRawInterrupts as UsciB; -} - -implementation -{ - TOSH_SIGNAL(USCIAB1RX_VECTOR) { - uint8_t temp; - if (UC1IFG & UCA1RXIFG){ - temp = UCA1RXBUF; - signal UsciA.rxDone(temp); - } - if (UC1IFG & UCB1RXIFG){ - temp = UCB1RXBUF; - signal UsciB.rxDone(temp); - } - } - - TOSH_SIGNAL(USCIAB1TX_VECTOR) { - if ((UC1IFG & UCA1TXIFG) | (UC1IFG & UCA1RXIFG)){ - signal UsciA.txDone(); - } - if ((UC1IFG & UCB1TXIFG) | (UC1IFG & UCB1RXIFG)){ - signal UsciB.txDone(); - } - } - - - /* default handlers */ - default async event void UsciA.txDone(){ - return; - } - - default async event void UsciA.rxDone(uint8_t temp){ - return; - } - - default async event void UsciB.txDone(){ - return; - } - - default async event void UsciB.rxDone(uint8_t temp){ - return; - } - -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciB.nc b/tos/chips/msp430X/usci/HplMsp430UsciB.nc deleted file mode 100755 index 9eae6da5a0..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciB.nc +++ /dev/null @@ -1,211 +0,0 @@ -/** - * Copyright (c) 2010 Eric B. Decker - * All rights reserved. - * - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Copyright (c) 2004-2005, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the DEXMA SENSORS SL, Eric B. Decker, Technische - * Universitaet Berlin nor the names of its contributors may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL, Eric B. Decker, Technische Universitaet Berlin, OR - * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Byte-level interface to control Usci based modules (MSP430X), msp430f2618 etc. - * USCI_B supports SPI and i2c modes. Stateless interface modeled after - * HplMsp430Usart of the MSP430 family. - * - * @author Vlado Handziski (handzisk@tkn.tu-berlin.de) - * @author Jan Hauer (hauer@tkn.tu-berlin.de) - * @author Joe Polastre - * @author Xavier Orduna - * @author Eric B. Decker - * - * see msp430usci.h for basic definitions. - * See TI MSP430x2xx Family User's Guide SLAU144E for details. - */ - -#include "msp430usci.h" - -interface HplMsp430UsciB { - - /* UCxxCTL0 */ - async command void setUctl0(msp430_uctl0_t control); - async command msp430_uctl0_t getUctl0(); - - /* UCxxCTL1 */ - async command void setUctl1(msp430_uctl1_t control); - async command msp430_uctl1_t getUctl1(); - - /* UCxxBR1 UCxxBR0 */ - async command void setUbr(uint16_t ubr); - async command uint16_t getUbr(); - - /* - * access usci status registers. yes there are control - * bits in the status register. - */ - /* UCxxSTAT */ - async command void setUstat(uint8_t ustat); - async command uint8_t getUstat(); - - /* - * resetUsci() - reset or unreset module port - * - * reset: TRUE (set UCSWRST) - * FALSE (unset UCSWRST), let the port run - */ - async command void resetUsci(bool reset); - - /* - * return enum indicating what mode the usci port in in. - */ - async command msp430_uscimode_t getMode(); - - - /* Interrupt control */ - async command void disableRxIntr(); - async command void disableTxIntr(); - async command void disableIntr(); - async command void enableRxIntr(); - async command void enableTxIntr(); - async command void enableIntr(); - - async command bool isTxIntrPending(); - async command bool isRxIntrPending(); - async command void clrRxIntr(); - async command void clrTxIntr(); - async command void clrIntr(); - - /** - * Transmit a byte of data. When the transmission is completed, - * txDone is generated. Only then a new byte may be - * transmitted, otherwise the previous byte will be overwritten. - */ - async command void tx(uint8_t data); - - /** - * Get current value from RX-buffer. - * - * return: byte received. - */ - async command uint8_t rx(); - - - /*********************************************************************** - * - * SPI Mode interface - * - ***********************************************************************/ - - /* - * configure or deconfigure gpio pins for SPI mode - * - * switches io pins between port and module function. - */ - async command void enableSpi(); - async command void disableSpi(); - - /* - * Returns TRUE if the Usci is in SPI mode - */ - async command bool isSpi(); - - /* - * configure usci as spi using config. - * leaves interrupts disabled. - */ - async command void setModeSpi(msp430_spi_union_config_t* config); - - - /*********************************************************************** - * - * I2C Mode interface - * - ***********************************************************************/ - - /* - * Returns TRUE if the Usci is in i2c mode - */ - async command bool isI2C(); - async command void enableI2C(); - async command void disableI2C(); - - /* - * configure usci as i2c using config. - * leaves interrupts disabled. - */ - async command void setModeI2C( msp430_i2c_union_config_t* config ); - - /* control which direction the bus is in */ - async command void setTransmitMode(); - async command void setReceiveMode(); - - /* h/w bits for controlling what to send next when master */ - async command void setTXNACK(); - async command void setTXStop(); - async command void setTXStart(); - - async command uint16_t getOwnAddress(); - async command void setOwnAddress( uint16_t addr ); - - /* GeneralCall Response control, set/clear */ - async command void clearGeneralCall(); - async command void setGeneralCall(); - - /* set master/slave mode, i2c */ - async command void setSlaveMode(); - async command void setMasterMode(); - - /* get bits of uctl1 in i2c mode */ - async command bool getStopBit(); - async command bool getTransmitReceiveMode(); - - /* when master the SLA (slave address register says who we - are talking to. - */ - async command uint16_t getSlaveAddress(); - async command void setSlaveAddress(uint16_t addr); - - async command void disableNACKInt(); - async command void enableNACKInt(); - - async command void disableStopInt(); - async command void enableStopInt(); - - async command void disableStartInt(); - async command void enableStartInt(); - - async command void disableArbLostInt(); - async command void enableArbLostInt(); -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciB0C.nc b/tos/chips/msp430X/usci/HplMsp430UsciB0C.nc deleted file mode 100755 index 31dd7cfae6..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciB0C.nc +++ /dev/null @@ -1,118 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose, without fee, and without written - * agreement is hereby granted, provided that the above copyright - * notice, the following two paragraphs and the author appear in all - * copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY - * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL - * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS - * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE - * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF - * CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, - * UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * An HPL abstraction of USCIB0 on the MSP430. - * - * @author Jonathan Hui - * @author Joe Polastre - * @author Xavier Orduna - * @version $Revision: 1.6 $ $Date: 2008/05/15 23:57:13 $ - */ - -#include "msp430usci.h" - -configuration HplMsp430UsciB0C { - - provides interface HplMsp430UsciB; - provides interface HplMsp430UsciInterrupts; -} - -implementation { - - components HplMsp430UsciB0P as HplUsciP; - HplMsp430UsciB = HplUsciP; - HplMsp430UsciInterrupts = HplUsciP; - - components HplMsp430GeneralIOC as GIO; - HplUsciP.SIMO -> GIO.UCB0SIMO; - HplUsciP.SOMI -> GIO.UCB0SOMI; - HplUsciP.UCLK -> GIO.UCB0CLK; - - components HplMsp430UsciAB0RawInterruptsP as UsciRawInterrupts; - HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciB; - -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430X/usci/HplMsp430UsciB0P.nc deleted file mode 100755 index 39b8d1571b..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciB0P.nc +++ /dev/null @@ -1,373 +0,0 @@ -/** - * Copyright (c) 2010 Eric B. Decker - * All rights reserved. - * - * Copyright (c) 2009-2010 DEXMA SENSORS SL - * All rights reserved. - * - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Copyright (c) 2004-2005, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the DEXMA SENSORS SL, ARCHED ROCK, Technische - * Universitaet Berlin nor the names of its contributors may be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Eric B. - * Decker, DEXMA SENSORS SL, ARCHED ROCK, Technische Universitaet Berlin, - * OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -#include "msp430usci.h" - -/** - * Implementation of USCIB0 lowlevel functionality - stateless. - * Setting a mode will by default disable USCIB0 interrupts. - * - * @author: Jan Hauer - * @author: Jonathan Hui - * @author: Vlado Handziski - * @author: Joe Polastre - * @author: Philipp Huppertz - * @author: Xavier Orduna - * @author: Eric B. Decker - * @author: Jordi Soucheiron - * - * A0, A1: uart, spi, irda. - * B0, B1: spi, i2c. - * - * This module interfaces to usciB0: spi or i2c. - */ - -module HplMsp430UsciB0P @safe() { - provides interface HplMsp430UsciB as Usci; - provides interface HplMsp430UsciInterrupts as Interrupts; - - uses interface HplMsp430GeneralIO as SIMO; - uses interface HplMsp430GeneralIO as SOMI; - uses interface HplMsp430GeneralIO as UCLK; - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; -} - -implementation -{ - MSP430REG_NORACE(IE2); - MSP430REG_NORACE(IFG2); - MSP430REG_NORACE(UCB0CTL0); - MSP430REG_NORACE(UCB0CTL1); - MSP430REG_NORACE(UCB0RXBUF); - MSP430REG_NORACE(UCB0TXBUF); - MSP430REG_NORACE(UCB0I2COA); - MSP430REG_NORACE(UCB0I2CIE); - - async event void UsciRawInterrupts.rxDone(uint8_t temp) { - signal Interrupts.rxDone(temp); - } - - async event void UsciRawInterrupts.txDone() { - signal Interrupts.txDone(); - } - - /* Control registers */ - async command void Usci.setUctl0(msp430_uctl0_t control) { - UCB0CTL0=uctl02int(control); - } - - async command msp430_uctl0_t Usci.getUctl0() { - return int2uctl0(UCB0CTL0); - } - - async command void Usci.setUctl1(msp430_uctl1_t control) { - UCB0CTL1=uctl12int(control); - } - - async command msp430_uctl1_t Usci.getUctl1() { - return int2uctl1(UCB0CTL1); - } - - async command void Usci.setUbr(uint16_t control) { - atomic { - UCB0BR0 = control & 0x00FF; - UCB0BR1 = (control >> 8) & 0x00FF; - } - } - - async command uint16_t Usci.getUbr() { - return (UCB0BR1 << 8) + UCB0BR0; - } - - async command void Usci.setUstat(uint8_t control) { - UCB0STAT = control; - } - - async command uint8_t Usci.getUstat() { - return UCB0STAT; - } - - /* Operations */ - async command void Usci.resetUsci(bool reset) { - if (reset) - SET_FLAG(UCB0CTL1, UCSWRST); - else - CLR_FLAG(UCB0CTL1, UCSWRST); - } - - bool isSpi() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCB0CTL0); - return (tmp.ucsync && tmp.ucmode != 3); - } - - bool isI2C() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCB0CTL0); - return (tmp.ucsync && tmp.ucmode == 3); - } - - async command bool Usci.isSpi() { - return isSpi(); - } - - async command msp430_uscimode_t Usci.getMode() { - if (isSpi()) - return USCI_SPI; - if (isI2C()) - return USCI_I2C; - return USCI_NONE; - } - - async command void Usci.enableSpi() { - atomic { - call SIMO.selectModuleFunc(); - call SOMI.selectModuleFunc(); - call UCLK.selectModuleFunc(); - } - } - - async command void Usci.disableSpi() { - atomic { - call SIMO.selectIOFunc(); - call SOMI.selectIOFunc(); - call UCLK.selectIOFunc(); - } - } - - void configSpi(msp430_spi_union_config_t* config) { - UCB0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); - UCB0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); - call Usci.setUbr(config->spiRegisters.ubr); - } - - async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); - call Usci.enableSpi(); - configSpi(config); - call Usci.resetUsci(FALSE); - } - } - - async command bool Usci.isTxIntrPending(){ - if (IFG2 & UCB0TXIFG) - return TRUE; - return FALSE; - } - - async command bool Usci.isRxIntrPending() { - if (IFG2 & UCB0RXIFG) - return TRUE; - return FALSE; - } - - async command void Usci.clrTxIntr(){ - IFG2 &= ~UCB0TXIFG; - } - - async command void Usci.clrRxIntr() { - IFG2 &= ~UCB0RXIFG; - } - - async command void Usci.clrIntr() { - IFG2 &= ~(UCB0TXIFG | UCB0RXIFG); - } - - async command void Usci.disableRxIntr() { - IE2 &= ~UCB0RXIE; - } - - async command void Usci.disableTxIntr() { - IE2 &= ~UCB0TXIE; - } - - async command void Usci.disableIntr() { - IE2 &= ~(UCB0TXIE | UCB0RXIE); - } - - async command void Usci.enableRxIntr() { - atomic { - IFG2 &= ~UCB0RXIFG; - IE2 |= UCB0RXIE; - } - } - - async command void Usci.enableTxIntr() { - atomic { - IFG2 &= ~UCB0TXIFG; - IE2 |= UCB0TXIE; - } - } - - async command void Usci.enableIntr() { - atomic { - IFG2 &= ~(UCB0TXIFG | UCB0RXIFG); - IE2 |= (UCB0TXIE | UCB0RXIE); - } - } - - async command void Usci.tx(uint8_t data) { - UCB0TXBUF = data; - } - - async command uint8_t Usci.rx() { - return UCB0RXBUF; - } - - /* - * i2c operations - */ - async command bool Usci.isI2C(){ - return isI2C(); - } - - - /* CHECK ME! - * b1p messes with usda and uscl. shouldn't b0p do the same? - */ - async command void Usci.enableI2C() { - atomic { - call SIMO.selectModuleFunc(); - call SOMI.selectModuleFunc(); - call UCLK.selectModuleFunc(); - } - } - - async command void Usci.disableI2C() { - atomic { - call SIMO.selectIOFunc(); - call SOMI.selectIOFunc(); - call UCLK.selectIOFunc(); - } - } - - void configI2C(msp430_i2c_union_config_t* config) { - UCB0CTL1 = (config->i2cRegisters.uctl1 | UCSWRST); - UCB0CTL0 = (config->i2cRegisters.uctl0 | UCSYNC); - call Usci.setUbr(config->i2cRegisters.ubr); - UCB0I2COA = config->i2cRegisters.ui2coa; - UCB0I2CSA = 0; - UCB0I2CIE = 0; - } - - async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); - call Usci.enableI2C(); - configI2C(config); - call Usci.resetUsci(FALSE); - } - } - - async command uint16_t Usci.getOwnAddress(){ - return (UCB0I2COA & ~UCGCEN); - } - - async command void Usci.setOwnAddress( uint16_t addr ){ - UCB0I2COA &= UCGCEN; - UCB0I2COA |= (addr & ~UCGCEN); - } - - /* - * commands subsummed into config structure. - * - * setMasterMode, setSlaveMode, getTransmitReceiveMode, setTransmitMode, - * setReceiveMode, getStopBit, setStopBit, getStartBit, - * setStartBit, - * - * the get commands can be replaced by .getUctl0 etc. - * - * similar things should be done for the other registers. It keeps things - * simple and consise. - */ - - /* set direction of the bus */ - async command void Usci.setTransmitMode() { UCB0CTL1 |= UCTR; } - async command void Usci.setReceiveMode() { UCB0CTL1 &= ~UCTR; } - - /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ - async command void Usci.setTXNACK() { UCB0CTL1 |= UCTXNACK; } - async command void Usci.setTXStop() { UCB0CTL1 |= UCTXSTP; } - async command void Usci.setTXStart() { UCB0CTL1 |= UCTXSTT; } - - /* set whether to respond to GeneralCall. */ - async command void Usci.clearGeneralCall() { UCB0I2COA &= ~UCGCEN; } - async command void Usci.setGeneralCall() { UCB0I2COA |= UCGCEN; } - - /* set master/slave mode, i2c */ - async command void Usci.setSlaveMode() { UCB0CTL0 |= UCMST; } - async command void Usci.setMasterMode() { UCB0CTL0 &= ~UCMST; } - - /* get stop bit in i2c mode */ - async command bool Usci.getStopBit() { return (UCB0CTL1 & UCTXSTP); } - async command bool Usci.getTransmitReceiveMode() { return (UCB0CTL1 & UCTR); } - - /* get/set Slave Address, i2cSA */ - async command uint16_t Usci.getSlaveAddress() { return UCB0I2CSA; } - async command void Usci.setSlaveAddress( uint16_t addr ) { UCB0I2CSA = addr; } - - /* enable/disable NACK interrupt */ - async command void Usci.disableNACKInt() { UCB0I2CIE &= ~UCNACKIE; } - async command void Usci.enableNACKInt() { UCB0I2CIE |= UCNACKIE; } - - /* enable/disable stop condition interrupt */ - async command void Usci.disableStopInt() { UCB0I2CIE &= ~UCSTPIE; } - async command void Usci.enableStopInt() { UCB0I2CIE |= UCSTPIE; } - - /* enable/disable start condition interrupt */ - async command void Usci.disableStartInt() { UCB0I2CIE &= ~UCSTTIE; } - async command void Usci.enableStartInt() { UCB0I2CIE |= UCSTTIE; } - - /* enable/disable arbitration lost interrupt */ - async command void Usci.disableArbLostInt() { UCB0I2CIE &= ~UCALIE; } - async command void Usci.enableArbLostInt() { UCB0I2CIE |= UCALIE; } -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciB1C.nc b/tos/chips/msp430X/usci/HplMsp430UsciB1C.nc deleted file mode 100755 index ead42e6663..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciB1C.nc +++ /dev/null @@ -1,120 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose, without fee, and without written - * agreement is hereby granted, provided that the above copyright - * notice, the following two paragraphs and the author appear in all - * copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY - * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL - * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS - * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE - * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF - * CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, - * UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** - * An HPL abstraction of USCIB1 on the MSP430. - * - * @author Jonathan Hui - * @author Joe Polastre - * @author Xavier Orduna - * @version $Revision: 1.6 $ $Date: 2008/05/15 23:57:13 $ - */ - -#include "msp430usci.h" - -configuration HplMsp430UsciB1C { - - provides interface HplMsp430UsciB; - provides interface HplMsp430UsciInterrupts; -} - -implementation { - - components HplMsp430UsciB1P as HplUsciP; - HplMsp430UsciB = HplUsciP; - HplMsp430UsciInterrupts = HplUsciP; - - components HplMsp430GeneralIOC as GIO; - HplUsciP.SIMO -> GIO.UCB1SIMO; - HplUsciP.SOMI -> GIO.UCB1SOMI; - HplUsciP.UCLK -> GIO.UCB1CLK; - HplUsciP.USDA -> GIO.UCB1SDA; - HplUsciP.USCL -> GIO.UCB1SCL; - - components HplMsp430UsciAB1RawInterruptsP as UsciRawInterrupts; - HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciB; - -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430X/usci/HplMsp430UsciB1P.nc deleted file mode 100755 index eba12b23c7..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciB1P.nc +++ /dev/null @@ -1,373 +0,0 @@ -/** - * Copyright (c) 2010 Eric B. Decker - * All rights reserved. - * - * Copyright (c) 2009-2010 DEXMA SENSORS SL - * All rights reserved. - * - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Copyright (c) 2004-2005, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the DEXMA SENSORS SL, ARCHED ROCK, Technische - * Universitaet Berlin nor the names of its contributors may be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Eric B. - * Decker, DEXMA SENSORS SL, ARCHED ROCK, Technische Universitaet Berlin, - * OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -#include "msp430usci.h" - -/** - * Implementation of USCIB1 lowlevel functionality - stateless. - * Setting a mode will by default disable USCIB1 interrupts. - * - * @author: Jan Hauer - * @author: Jonathan Hui - * @author: Vlado Handziski - * @author: Joe Polastre - * @author: Philipp Huppertz - * @author: Xavier Orduna - * @author: Eric B. Decker - * @author: Jordi Soucheiron - * - * A0, A1: uart, spi, irda. - * B0, B1: spi, i2c. - * - * This module interfaces to usciB1: spi or i2c. - */ - -module HplMsp430UsciB1P @safe() { - provides interface HplMsp430UsciB as Usci; - provides interface HplMsp430UsciInterrupts as Interrupts; - - uses interface HplMsp430GeneralIO as SIMO; - uses interface HplMsp430GeneralIO as SOMI; - uses interface HplMsp430GeneralIO as UCLK; - uses interface HplMsp430GeneralIO as USDA; - uses interface HplMsp430GeneralIO as USCL; - - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; -} - -implementation -{ - MSP430REG_NORACE(UC1IE); - MSP430REG_NORACE(UC1IFG); - MSP430REG_NORACE(UCB1CTL0); - MSP430REG_NORACE(UCB1CTL1); - MSP430REG_NORACE(UCB1RXBUF); - MSP430REG_NORACE(UCB1TXBUF); - MSP430REG_NORACE(UCB1I2COA); - MSP430REG_NORACE(UCB1I2CIE); - - async event void UsciRawInterrupts.rxDone(uint8_t temp) { - signal Interrupts.rxDone(temp); - } - - async event void UsciRawInterrupts.txDone() { - signal Interrupts.txDone(); - } - - /* Control registers */ - async command void Usci.setUctl0(msp430_uctl0_t control) { - UCB1CTL0=uctl02int(control); - } - - async command msp430_uctl0_t Usci.getUctl0() { - return int2uctl0(UCB1CTL0); - } - - async command void Usci.setUctl1(msp430_uctl1_t control) { - UCB1CTL1=uctl12int(control); - } - - async command msp430_uctl1_t Usci.getUctl1() { - return int2uctl1(UCB1CTL1); - } - - async command void Usci.setUbr(uint16_t control) { - atomic { - UCB1BR0 = control & 0x00FF; - UCB1BR1 = (control >> 8) & 0x00FF; - } - } - - async command uint16_t Usci.getUbr() { - return (UCB1BR1 << 8) + UCB1BR0; - } - - async command void Usci.setUstat(uint8_t control) { - UCB1STAT = control; - } - - async command uint8_t Usci.getUstat() { - return UCB1STAT; - } - - /* Operations */ - async command void Usci.resetUsci(bool reset) { - if (reset) - SET_FLAG(UCB1CTL1, UCSWRST); - else - CLR_FLAG(UCB1CTL1, UCSWRST); - } - - bool isSpi() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCB1CTL0); - return (tmp.ucsync && tmp.ucmode != 3); - } - - bool isI2C() { - msp430_uctl0_t tmp; - - tmp = int2uctl0(UCB1CTL0); - return (tmp.ucsync && tmp.ucmode == 3); - } - - async command bool Usci.isSpi() { - return isSpi(); - } - - async command msp430_uscimode_t Usci.getMode() { - if (isSpi()) - return USCI_SPI; - if (isI2C()) - return USCI_I2C; - return USCI_NONE; - } - - async command void Usci.enableSpi() { - atomic { - call SIMO.selectModuleFunc(); - call SOMI.selectModuleFunc(); - call UCLK.selectModuleFunc(); - } - } - - async command void Usci.disableSpi() { - atomic { - call SIMO.selectIOFunc(); - call SOMI.selectIOFunc(); - call UCLK.selectIOFunc(); - } - } - - void configSpi(msp430_spi_union_config_t* config) { - UCB1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); - UCB1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); - call Usci.setUbr(config->spiRegisters.ubr); - } - - async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); - call Usci.enableSpi(); - configSpi(config); - call Usci.resetUsci(FALSE); - } - } - - async command bool Usci.isTxIntrPending(){ - if (UC1IFG & UCB1TXIFG) - return TRUE; - return FALSE; - } - - async command bool Usci.isRxIntrPending() { - if (UC1IFG & UCB1RXIFG) - return TRUE; - return FALSE; - } - - async command void Usci.clrTxIntr(){ - UC1IFG &= ~UCB1TXIFG; - } - - async command void Usci.clrRxIntr() { - UC1IFG &= ~UCB1RXIFG; - } - - async command void Usci.clrIntr() { - UC1IFG &= ~(UCB1TXIFG | UCB1RXIFG); - } - - async command void Usci.disableRxIntr() { - UC1IE &= ~UCB1RXIE; - } - - async command void Usci.disableTxIntr() { - UC1IE &= ~UCB1TXIE; - } - - async command void Usci.disableIntr() { - UC1IE &= ~(UCB1TXIE | UCB1RXIE); - } - - async command void Usci.enableRxIntr() { - atomic { - UC1IFG &= ~UCB1RXIFG; - UC1IE |= UCB1RXIE; - } - } - - async command void Usci.enableTxIntr() { - atomic { - UC1IFG &= ~UCB1TXIFG; - UC1IE |= UCB1TXIE; - } - } - - async command void Usci.enableIntr() { - atomic { - UC1IFG &= ~(UCB1TXIFG | UCB1RXIFG); - UC1IE |= (UCB1TXIE | UCB1RXIE); - } - } - - async command void Usci.tx(uint8_t data) { - UCB1TXBUF = data; - } - - async command uint8_t Usci.rx() { - return UCB1RXBUF; - } - - /* - * i2c operations - */ - async command bool Usci.isI2C(){ - return isI2C(); - } - - async command void Usci.enableI2C() { - atomic { - //this should be removed, only for z1 - P5OUT |= 0x06; - P5REN |= 0x06; - call USDA.selectModuleFunc(); - call USCL.selectModuleFunc(); - } - } - - async command void Usci.disableI2C() { - atomic { - call USDA.selectIOFunc(); - call USCL.selectIOFunc(); - } - } - - void configI2C(msp430_i2c_union_config_t* config) { - UCB1CTL1 = (config->i2cRegisters.uctl1 | UCSWRST); - UCB1CTL0 = (config->i2cRegisters.uctl0 | UCSYNC); - call Usci.setUbr(config->i2cRegisters.ubr); - UCB1I2COA = config->i2cRegisters.ui2coa; - UCB1I2CSA = 0; - UCB1I2CIE = 0; - } - - async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); - call Usci.enableI2C(); - configI2C(config); - call Usci.resetUsci(FALSE); - } - } - - async command uint16_t Usci.getOwnAddress(){ - return UCB1I2COA & ~UCGCEN; - } - - async command void Usci.setOwnAddress( uint16_t addr ){ - UCB1I2COA &= UCGCEN; - UCB1I2COA |= (addr & ~UCGCEN); - } - - /* - * commands subsummed into config structure. - * - * setMasterMode, setSlaveMode, getTransmitReceiveMode, setTransmitMode, - * setReceiveMode, getStopBit, setStopBit, getStartBit, - * setStartBit, - * - * the get commands can be replaced by .getUctl0 etc. - * - * similar things should be done for the other registers. It keeps things - * simple and consise. - */ - - /* set direction of the bus */ - async command void Usci.setTransmitMode() { UCB1CTL1 |= UCTR; } - async command void Usci.setReceiveMode() { UCB1CTL1 &= ~UCTR; } - - /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ - async command void Usci.setTXNACK() { UCB1CTL1 |= UCTXNACK; } - async command void Usci.setTXStop() { UCB1CTL1 |= UCTXSTP; } - async command void Usci.setTXStart() { UCB1CTL1 |= UCTXSTT; } - - /* set whether to respond to GeneralCall. */ - async command void Usci.clearGeneralCall() { UCB1I2COA &= ~UCGCEN; } - async command void Usci.setGeneralCall() { UCB1I2COA |= UCGCEN; } - - /* set master/slave mode, i2c */ - async command void Usci.setSlaveMode() { UCB1CTL0 |= UCMST; } - async command void Usci.setMasterMode() { UCB1CTL0 &= ~UCMST; } - - /* get stop bit in i2c mode */ - async command bool Usci.getStopBit() { return (UCB1CTL1 & UCTXSTP); } - async command bool Usci.getTransmitReceiveMode() { return (UCB1CTL1 & UCTR); } - - /* get/set Slave Address, i2cSA */ - async command uint16_t Usci.getSlaveAddress() { atomic { return UCB1I2CSA; } } - async command void Usci.setSlaveAddress( uint16_t addr ) { atomic { UCB1I2CSA = addr; } } - - /* enable/disable NACK interrupt */ - async command void Usci.disableNACKInt() { UCB1I2CIE &= ~UCNACKIE; } - async command void Usci.enableNACKInt() { UCB1I2CIE |= UCNACKIE; } - - /* enable/disable stop condition interrupt */ - async command void Usci.disableStopInt() { UCB1I2CIE &= ~UCSTPIE; } - async command void Usci.enableStopInt() { UCB1I2CIE |= UCSTPIE; } - - /* enable/disable start condition interrupt */ - async command void Usci.disableStartInt() { UCB1I2CIE &= ~UCSTTIE; } - async command void Usci.enableStartInt() { UCB1I2CIE |= UCSTTIE; } - - /* enable/disable arbitration lost interrupt */ - async command void Usci.disableArbLostInt() { UCB1I2CIE &= ~UCALIE; } - async command void Usci.enableArbLostInt() { UCB1I2CIE |= UCALIE; } -} diff --git a/tos/chips/msp430X/usci/HplMsp430UsciInterrupts.nc b/tos/chips/msp430X/usci/HplMsp430UsciInterrupts.nc deleted file mode 100755 index e5b7688b21..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciInterrupts.nc +++ /dev/null @@ -1,88 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /* - * Copyright (c) 2004-2005, Technische Universität Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universität Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Byte-level interface to control a USCI. - *

The USCI can be switched to SPI, UART or I2C mode. The interface follows - * the convention of being stateless, thus a higher layer has to maintain - * state information. - * - * @author Jan Hauer (hauer@tkn.tu-berlin.de) - * @author Joe Polastre - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -#include "msp430usci.h" - -interface HplMsp430UsciInterrupts { - - /** - * A byte of data is about to be transmitted, ie. the TXBuffer is - * empty and ready to accept next byte. - */ - async event void txDone(); - - /** - * A byte of data has been received. - */ - async event void rxDone(uint8_t data); - -} - diff --git a/tos/chips/msp430X/usci/HplMsp430UsciRawInterrupts.nc b/tos/chips/msp430X/usci/HplMsp430UsciRawInterrupts.nc deleted file mode 100755 index 229ebfff20..0000000000 --- a/tos/chips/msp430X/usci/HplMsp430UsciRawInterrupts.nc +++ /dev/null @@ -1,88 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /* - * Copyright (c) 2004-2005, Technische Universität Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universität Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Byte-level interface to control a USART. - *

The USCI can be switched to SPI- or UART-mode. The interface follows - * the convention of being stateless, thus a higher layer has to maintain - * state information. - * - * @author Jan Hauer (hauer@tkn.tu-berlin.de) - * @author Joe Polastre - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -#include "msp430usci.h" - -interface HplMsp430UsciRawInterrupts { - - /** - * A byte of data is about to be transmitted, ie. the TXBuffer is - * empty and ready to accept next byte. - */ - async event void txDone(); - - /** - * A byte of data has been received. - */ - async event void rxDone(uint8_t data); - -} - diff --git a/tos/chips/msp430X/usci/Msp430I2C1C.nc b/tos/chips/msp430X/usci/Msp430I2C1C.nc deleted file mode 100644 index 93fa981b84..0000000000 --- a/tos/chips/msp430X/usci/Msp430I2C1C.nc +++ /dev/null @@ -1,99 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -#include -#include "msp430usci.h" - -generic configuration Msp430I2C1C() { - - provides interface Resource; - provides interface ResourceRequested; - provides interface I2CPacket as I2CBasicAddr; - - uses interface Msp430I2CConfigure; - -} - -implementation { - - enum { - CLIENT_ID = unique( MSP430_I2C1_BUS ), - }; - - components Msp430I2C1P as I2CP; - Resource = I2CP.Resource[ CLIENT_ID ]; - I2CBasicAddr = I2CP.I2CBasicAddr; - Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ]; - - components new Msp430UsciB1C() as UsciC; - ResourceRequested = UsciC; - I2CP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; - I2CP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; - I2CP.Interrupts -> UsciC.HplMsp430UsciInterrupts; - -} diff --git a/tos/chips/msp430X/usci/Msp430I2C1P.nc b/tos/chips/msp430X/usci/Msp430I2C1P.nc deleted file mode 100644 index 5e063d714b..0000000000 --- a/tos/chips/msp430X/usci/Msp430I2C1P.nc +++ /dev/null @@ -1,94 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -configuration Msp430I2C1P { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[uint8_t id ]; - provides interface I2CPacket as I2CBasicAddr; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430I2CConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as Interrupts; - -} - -implementation { - - components new Msp430I2CP() as I2CP; - Resource = I2CP.Resource; - ResourceConfigure = I2CP.ResourceConfigure; - Msp430I2CConfigure = I2CP.Msp430I2CConfigure; - I2CBasicAddr = I2CP.I2CBasicAddr; - UsciResource = I2CP.UsciResource; - Interrupts = I2CP.Interrupts; - - components HplMsp430UsciB1C as UsciC; - I2CP.UsciB -> UsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430I2CConfigure.nc b/tos/chips/msp430X/usci/Msp430I2CConfigure.nc deleted file mode 100644 index 1fe7df8087..0000000000 --- a/tos/chips/msp430X/usci/Msp430I2CConfigure.nc +++ /dev/null @@ -1,72 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /* - * Copyright (c) 2004-2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Interface used by Msp430I2C clients to reconfigure the I2C before use - * @author Vlado Handziski - * @author Xavier Orduna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -#include "msp430usci.h" - -interface Msp430I2CConfigure { - async command msp430_i2c_union_config_t* getConfig(); -} diff --git a/tos/chips/msp430X/usci/Msp430I2CP.nc b/tos/chips/msp430X/usci/Msp430I2CP.nc deleted file mode 100644 index d2e1cf04c5..0000000000 --- a/tos/chips/msp430X/usci/Msp430I2CP.nc +++ /dev/null @@ -1,284 +0,0 @@ -/** - * Copyright (c) 2009-2010 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduña - * @author Jordi Soucheiron - */ - -#include - -generic module Msp430I2CP() { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface I2CPacket as I2CBasicAddr; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430I2CConfigure[ uint8_t id ]; - uses interface HplMsp430UsciB as UsciB; - uses interface HplMsp430UsciInterrupts as Interrupts; - -} - -implementation { - - enum { - TIMEOUT = 256, - }; - - norace uint8_t* m_buf; - norace uint8_t m_len; - norace uint8_t m_pos; - norace i2c_flags_t m_flags; - - void nextRead(); - void nextWrite(); - void signalDone( error_t error ); - - async command error_t Resource.immediateRequest[ uint8_t id ]() { - return call UsciResource.immediateRequest[ id ](); - } - - async command error_t Resource.request[ uint8_t id ]() { - return call UsciResource.request[ id ](); - } - - async command uint8_t Resource.isOwner[ uint8_t id ]() { - return call UsciResource.isOwner[ id ](); - } - - async command error_t Resource.release[ uint8_t id ]() { - return call UsciResource.release[ id ](); - } - - async command void ResourceConfigure.configure[ uint8_t id ]() { - call UsciB.setModeI2C(call Msp430I2CConfigure.getConfig[id]()); - } - - async command void ResourceConfigure.unconfigure[ uint8_t id ]() { - call UsciB.disableI2C(); - } - - event void UsciResource.granted[ uint8_t id ]() { - signal Resource.granted[ id ](); - } - - default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.release[ uint8_t id ]() {return FAIL;} - default event void Resource.granted[ uint8_t id ]() {} - default async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { - return (msp430_i2c_union_config_t *) &msp430_i2c_default_config; - } - - async command error_t I2CBasicAddr.read( i2c_flags_t flags, - uint16_t addr, uint8_t len, - uint8_t* buf ) { - uint16_t i = 0; - m_buf = buf; - m_len = len; - m_flags = flags; - m_pos = 0; - - call UsciB.setReceiveMode(); - - - call UsciB.setSlaveAddress( addr ); - call UsciB.enableRxIntr(); - - if ( flags & I2C_START ) { - while(call UsciB.getStopBit()){ - if(i>=TIMEOUT) { - return EBUSY; - } - i++; - } - call UsciB.setTXStart(); - } - else { - nextRead(); - } - - return SUCCESS; - - } - - async command error_t I2CBasicAddr.write( i2c_flags_t flags, - uint16_t addr, uint8_t len, - uint8_t* buf ) { - uint16_t i = 0; - m_buf = buf; - m_len = len; - m_flags = flags; - m_pos = 0; - while((call UsciB.getUstat()) & UCBBUSY) { - if(i>=TIMEOUT) { - return FAIL; - } - i++; - } - - call UsciB.setTransmitMode(); - - call UsciB.setSlaveAddress( addr ); - call UsciB.enableTxIntr(); - - if ( flags & I2C_START ) { - while(call UsciB.getStopBit()){ - if(i>=TIMEOUT) { - return EBUSY; - } - i++; - } - i=0; - while((call UsciB.getUstat()) & UCBBUSY) { - if(i>=TIMEOUT) { - return FAIL; - } - i++; - } - call UsciB.setTXStart(); - } - else { - nextWrite(); - } - - return SUCCESS; - - } - - void nextRead() { - uint16_t i=0; - for(i=0xffff;i!=0;i--); //software delay (aprox 25msec on z1) - if ( m_pos == m_len ) { - if ( m_flags & I2C_STOP ) { - call UsciB.setTXStop(); - while(!call UsciB.getStopBit()){ - if(i>=TIMEOUT) { - signalDone( EBUSY ); - return; - } - i++; - } - signalDone( SUCCESS ); - } - else { - signalDone( SUCCESS ); - } - } else { - m_buf[ m_pos++ ] = call UsciB.rx(); - } - } - -void nextWrite() { - uint16_t i = 0; - for(i=0xffff;i!=0;i--); //software delay (aprox 25msec on z1) - if ( ( m_pos == m_len) && ( m_flags & I2C_STOP ) ) { - call UsciB.setTXStop(); - while(call UsciB.getStopBit()){ - if(i>=TIMEOUT) { - signalDone( EBUSY ); - return; - } - i++; - } - signalDone( SUCCESS ); - } else { - if((call UsciB.getUstat()) == ( UCBBUSY | UCNACKIFG | UCSCLLOW)) { - signal I2CBasicAddr.writeDone( FAIL, call UsciB.getSlaveAddress(), m_len, m_buf ); - return; - } - call UsciB.tx( m_buf[ m_pos++ ] ); - } -} - - - async event void Interrupts.txDone(){ - call UsciB.clrTxIntr(); - if ( call UsciB.getTransmitReceiveMode() ) - nextWrite(); - else - nextRead(); - } - - async event void Interrupts.rxDone(uint8_t data){ - call UsciB.clrRxIntr(); - if ( call UsciB.getTransmitReceiveMode() ) - nextWrite(); - else - nextRead(); - } - - void signalDone( error_t error ) { - call UsciB.clrIntr(); - call UsciB.disableIntr(); - if ( call UsciB.getTransmitReceiveMode() ) - signal I2CBasicAddr.writeDone( error, call UsciB.getSlaveAddress(), m_len, m_buf ); - else - signal I2CBasicAddr.readDone( error, call UsciB.getSlaveAddress(), m_len, m_buf ); - } - - default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } - -} diff --git a/tos/chips/msp430X/usci/Msp430SpiB0C.nc b/tos/chips/msp430X/usci/Msp430SpiB0C.nc deleted file mode 100755 index 4f0bbab27e..0000000000 --- a/tos/chips/msp430X/usci/Msp430SpiB0C.nc +++ /dev/null @@ -1,111 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * An implementation of the SPI on USCIB0 for the MSP430. The current - * implementation defaults not using the DMA and performing the SPI - * transfers in software. To utilize the DMA, use Msp430SpiDma0P in - * place of Msp430SpiNoDma0P. - * - * @author Jonathan Hui - * @author Mark Hays - * @author Xavier Orduna - * @version $Revision: 1.6 $ $Date: 2008/05/21 22:11:57 $ - */ - -#include "msp430usci.h" - -generic configuration Msp430SpiB0C() { - - provides interface Resource; - provides interface ResourceRequested; - provides interface SpiByte; - provides interface SpiPacket; - - uses interface Msp430SpiConfigure; -} - -implementation { - - enum { - CLIENT_ID = unique( MSP430_SPI0_BUS ), - }; - -#ifdef ENABLE_SPIB0_DMA -#warning "Enabling SPI DMA on USCIB0" - components Msp430SpiDmaB0P as SpiP; -#else - components Msp430SpiNoDmaB0P as SpiP; -#endif - - Resource = SpiP.Resource[ CLIENT_ID ]; - SpiByte = SpiP.SpiByte; - SpiPacket = SpiP.SpiPacket[ CLIENT_ID ]; - Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ]; - - components new Msp430UsciB0C() as UsciC; - ResourceRequested = UsciC; - SpiP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; - SpiP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; - SpiP.UsciInterrupts -> UsciC.HplMsp430UsciInterrupts; - -} diff --git a/tos/chips/msp430X/usci/Msp430SpiConfigure.nc b/tos/chips/msp430X/usci/Msp430SpiConfigure.nc deleted file mode 100755 index 76b98cc541..0000000000 --- a/tos/chips/msp430X/usci/Msp430SpiConfigure.nc +++ /dev/null @@ -1,72 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * Copyright (c) 2004-2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Interface used by Msp430Spi clients to reconfigure the SPI before use - * @author Vlado Handziski - * @author Xavier Orduna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -#include "msp430usci.h" - -interface Msp430SpiConfigure { - async command msp430_spi_union_config_t* getConfig(); -} diff --git a/tos/chips/msp430X/usci/Msp430SpiDmaB0P.nc b/tos/chips/msp430X/usci/Msp430SpiDmaB0P.nc deleted file mode 100755 index 715f4961de..0000000000 --- a/tos/chips/msp430X/usci/Msp430SpiDmaB0P.nc +++ /dev/null @@ -1,112 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Mark Hays - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2007/11/08 21:34:42 $ - */ - -configuration Msp430SpiDmaB0P { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; - -} - -implementation { - -#include "Msp430Dma.h" - - components new Msp430SpiDmaBP(IFG2_, - UCB0TXBUF_, - UCB0TXIFG, - (uint16_t) DMA_TRIGGER_UCB0TXIFG, - UCB0RXBUF_, - UCB0RXIFG, - (uint16_t) DMA_TRIGGER_UCB0RXIFG) as SpiP; - Resource = SpiP.Resource; - ResourceConfigure = SpiP.ResourceConfigure; - Msp430SpiConfigure = SpiP.Msp430SpiConfigure; - SpiByte = SpiP.SpiByte; - SpiPacket = SpiP.SpiPacket; - UsciResource = SpiP.UsciResource; - UsciInterrupts = SpiP.UsciInterrupts; - - components HplMsp430UsciB0C as UsciC; - SpiP.Usci -> UsciC; - - components Msp430DmaC as DmaC; - SpiP.DmaChannel1 -> DmaC.Channel1; - SpiP.DmaChannel2 -> DmaC.Channel2; - - components LedsC as Leds; - SpiP.Leds -> Leds; - -} diff --git a/tos/chips/msp430X/usci/Msp430SpiDmaBP.nc b/tos/chips/msp430X/usci/Msp430SpiDmaBP.nc deleted file mode 100755 index 10312e9dee..0000000000 --- a/tos/chips/msp430X/usci/Msp430SpiDmaBP.nc +++ /dev/null @@ -1,231 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Mark Hays - * @author Roman Lim - * @author Xavier Orduna - * @version $Revision: 1.6 $ $Date: 2008/02/28 17:28:12 $ - */ - - -generic module Msp430SpiDmaBP( uint16_t IFG_addr, - uint16_t TXBUF_addr, - uint8_t TXIFG, - uint16_t TXTRIG, - uint16_t RXBUF_addr, - uint8_t RXIFG, - uint16_t RXTRIG ) { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; - - uses interface Msp430DmaChannel as DmaChannel1; - uses interface Msp430DmaChannel as DmaChannel2; - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[uint8_t id ]; - uses interface HplMsp430UsciB as Usci; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; - uses interface Leds; - -} - -implementation { - -#define IFG (*(volatile uint8_t*)IFG_addr) - - uint8_t* m_tx_buf; - uint8_t* m_rx_buf; - uint16_t m_len; - uint8_t m_client; - uint8_t m_dump; - - void signalDone( error_t error ); - task void signalDone_task(); - - async command error_t Resource.immediateRequest[ uint8_t id ]() { - return call UsciResource.immediateRequest[ id ](); - } - - async command error_t Resource.request[ uint8_t id ]() { - return call UsciResource.request[ id ](); - } - - async command error_t Resource.release[ uint8_t id ]() { - return call UsciResource.release[ id ](); - } - - async command void ResourceConfigure.configure[ uint8_t id ]() { - call Usci.setModeSpi(call Msp430SpiConfigure.getConfig[id]()); - } - - async command void ResourceConfigure.unconfigure[ uint8_t id ]() { - call Usci.resetUsci(TRUE); - call Usci.disableSpi(); - call Usci.resetUsci(FALSE); - } - - event void UsciResource.granted[ uint8_t id ]() { - signal Resource.granted[ id ](); - } - - async command uint8_t Resource.isOwner[ uint8_t id ]() { - return call UsciResource.isOwner[ id ](); - } - - default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { - return &msp430_spi_default_config; - } - - default event void Resource.granted[ uint8_t id ]() {} - - async command uint8_t SpiByte.write( uint8_t tx ) { - - call Usci.tx( tx ); - while( !call Usci.isRxIntrPending() ); - call Usci.clrRxIntr(); - return call Usci.rx(); - - } - - async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, - uint8_t* rx_buf, - uint16_t len ) { - - atomic { - m_client = id; - m_tx_buf = tx_buf; - m_rx_buf = rx_buf; - m_len = len; - } - - if ( len ) { - // clear the interrupt flags - IFG &= ~( TXIFG | RXIFG ); - - // set up the RX xfer - call DmaChannel1.setupTransfer(DMA_SINGLE_TRANSFER, - RXTRIG, - DMA_EDGE_SENSITIVE, - (void *) RXBUF_addr, - rx_buf ? rx_buf : &m_dump, - len, - DMA_BYTE, - DMA_BYTE, - DMA_ADDRESS_UNCHANGED, - rx_buf ? - DMA_ADDRESS_INCREMENTED : - DMA_ADDRESS_UNCHANGED); - // this doesn't start a transfer; it simply enables the channel - call DmaChannel1.startTransfer(); - - // set up the TX xfer - call DmaChannel2.setupTransfer(DMA_SINGLE_TRANSFER, - TXTRIG, - DMA_EDGE_SENSITIVE, - tx_buf, - (void *) TXBUF_addr, - len, - DMA_BYTE, - DMA_BYTE, - DMA_ADDRESS_INCREMENTED, - DMA_ADDRESS_UNCHANGED); - // this doesn't start a transfer; it simply enables the channel - call DmaChannel2.startTransfer(); - - // pong the tx flag to get things rolling - IFG |= TXIFG; - } else { - post signalDone_task(); - } - - return SUCCESS; - - } - - task void signalDone_task() { - atomic signalDone( SUCCESS ); - } - - async event void DmaChannel1.transferDone( error_t error ) { - signalDone( error ); - } - - async event void DmaChannel2.transferDone( error_t error ) {} - - void signalDone( error_t error ) { - signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, error ); - } - - async event void UsciInterrupts.txDone() {} - async event void UsciInterrupts.rxDone( uint8_t data ) {} - - default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {} - -} diff --git a/tos/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc b/tos/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc deleted file mode 100755 index eff28de464..0000000000 --- a/tos/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc +++ /dev/null @@ -1,99 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -configuration Msp430SpiNoDmaB0P { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; - -} - -implementation { - - components new Msp430SpiNoDmaBP() as SpiP; - Resource = SpiP.Resource; - ResourceConfigure = SpiP.ResourceConfigure; - Msp430SpiConfigure = SpiP.Msp430SpiConfigure; - SpiByte = SpiP.SpiByte; - SpiPacket = SpiP.SpiPacket; - UsciResource = SpiP.UsciResource; - UsciInterrupts = SpiP.UsciInterrupts; - - components HplMsp430UsciB0C as UsciC; - SpiP.Usci -> UsciC; - - components LedsC as Leds; - SpiP.Leds -> Leds; - -} diff --git a/tos/chips/msp430X/usci/Msp430SpiNoDmaBP.nc b/tos/chips/msp430X/usci/Msp430SpiNoDmaBP.nc deleted file mode 100755 index 0ccb450730..0000000000 --- a/tos/chips/msp430X/usci/Msp430SpiNoDmaBP.nc +++ /dev/null @@ -1,224 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Jan Hauer (bugfix in continueOp()) - * @author Xavier Orduna - * @version $Revision: 1.6 $ $Date: 2008/06/16 07:31:21 $ - */ - - -generic module Msp430SpiNoDmaBP() { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[ uint8_t id ]; - uses interface HplMsp430UsciB as Usci; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; - uses interface Leds; - -} - -implementation { - - enum { - SPI_ATOMIC_SIZE = 2, - }; - - norace uint16_t m_len; - norace uint8_t* COUNT_NOK(m_len) m_tx_buf; - norace uint8_t* COUNT_NOK(m_len) m_rx_buf; - norace uint16_t m_pos; - norace uint8_t m_client; - - void signalDone(); - task void signalDone_task(); - - async command error_t Resource.immediateRequest[ uint8_t id ]() { - return call UsciResource.immediateRequest[ id ](); - } - - async command error_t Resource.request[ uint8_t id ]() { - return call UsciResource.request[ id ](); - } - - async command uint8_t Resource.isOwner[ uint8_t id ]() { - return call UsciResource.isOwner[ id ](); - } - - async command error_t Resource.release[ uint8_t id ]() { - return call UsciResource.release[ id ](); - } - - async command void ResourceConfigure.configure[ uint8_t id ]() { - call Usci.setModeSpi(call Msp430SpiConfigure.getConfig[id]()); - } - - async command void ResourceConfigure.unconfigure[ uint8_t id ]() { - call Usci.resetUsci(TRUE); - call Usci.disableSpi(); - call Usci.resetUsci(FALSE); - } - - event void UsciResource.granted[ uint8_t id ]() { - signal Resource.granted[ id ](); - } - - async command uint8_t SpiByte.write( uint8_t tx ) { - uint8_t byte; - // we are in spi mode which is configured to have turned off interrupts - //call Usart.disableRxIntr(); - call Usci.tx( tx ); - while( !call Usci.isRxIntrPending() ); - call Usci.clrRxIntr(); - byte = call Usci.rx(); - //call Usart.enableRxIntr(); - return byte; - } - - default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { - return (msp430_spi_union_config_t*) &msp430_spi_default_config; - } - - default event void Resource.granted[ uint8_t id ]() {} - - void continueOp() { - - uint8_t end; - uint8_t tmp; - - atomic { - call Usci.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); - - end = m_pos + SPI_ATOMIC_SIZE; - if ( end > m_len ) - end = m_len; - - while ( ++m_pos < end ) { - while( !call Usci.isRxIntrPending() ); - tmp = call Usci.rx(); - if ( m_rx_buf ) - m_rx_buf[ m_pos - 1 ] = tmp; - call Usci.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); - } - } - - } - - async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, - uint8_t* rx_buf, - uint16_t len ) { - - m_client = id; - m_tx_buf = tx_buf; - m_rx_buf = rx_buf; - m_len = len; - m_pos = 0; - - if ( len ) { - call Usci.enableRxIntr(); - continueOp(); - } - else { - post signalDone_task(); - } - - return SUCCESS; - - } - - task void signalDone_task() { - atomic signalDone(); - } - - async event void UsciInterrupts.rxDone( uint8_t data ) { - - if ( m_rx_buf ) - m_rx_buf[ m_pos-1 ] = data; - - if ( m_pos < m_len ) - continueOp(); - else { - call Usci.disableRxIntr(); - signalDone(); - } - } - - void signalDone() { - signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, - SUCCESS ); - } - - async event void UsciInterrupts.txDone() {} - - default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {} - -} diff --git a/tos/chips/msp430X/usci/Msp430Uart0C.nc b/tos/chips/msp430X/usci/Msp430Uart0C.nc deleted file mode 100644 index f4ce43612d..0000000000 --- a/tos/chips/msp430X/usci/Msp430Uart0C.nc +++ /dev/null @@ -1,101 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * An implementation of the UART on USCIA0 for the MSP430. - * @author Vlado Handziski - * @author Jonathan Hui - * @author Eric B. Decker - * @author Xavier Orduna - * @version $Revision: 1.6 $ $Date: 2008/05/21 22:11:57 $ - */ - -#include "msp430usci.h" - -generic configuration Msp430Uart0C() { - - provides interface Resource; - provides interface ResourceRequested; - provides interface UartStream; - provides interface UartByte; - - uses interface Msp430UartConfigure; -} - -implementation { - - enum { - CLIENT_ID = unique( MSP430_UART0_BUS ), - }; - - components Msp430Uart0P as UartP; - Resource = UartP.Resource[ CLIENT_ID ]; - UartStream = UartP.UartStream[ CLIENT_ID ]; - UartByte = UartP.UartByte[ CLIENT_ID ]; - Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; - - components new Msp430UsciA0C() as UsciC; - ResourceRequested = UsciC; - UartP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; - UartP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; - UartP.UsciInterrupts[ CLIENT_ID ] -> UsciC.HplMsp430UsciInterrupts; -} diff --git a/tos/chips/msp430X/usci/Msp430Uart0P.nc b/tos/chips/msp430X/usci/Msp430Uart0P.nc deleted file mode 100644 index 40b7d21717..0000000000 --- a/tos/chips/msp430X/usci/Msp430Uart0P.nc +++ /dev/null @@ -1,102 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Vlado Handziski - * @author Eric B. Decker - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -configuration Msp430Uart0P { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface UartStream[ uint8_t id ]; - provides interface UartByte[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430UartConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; -} - -implementation { - components new Msp430UartP() as UartP; - Resource = UartP.Resource; - ResourceConfigure = UartP.ResourceConfigure; - Msp430UartConfigure = UartP.Msp430UartConfigure; - UartStream = UartP.UartStream; - UartByte = UartP.UartByte; - UsciResource = UartP.UsciResource; - UsciInterrupts = UartP.UsciInterrupts; - - components HplMsp430UsciA0C as UsciC; - UartP.Usci -> UsciC; - - components Counter32khz16C as CounterC; - UartP.Counter -> CounterC; - - components LedsC as Leds; - UartP.Leds -> Leds; - -} diff --git a/tos/chips/msp430X/usci/Msp430Uart1C.nc b/tos/chips/msp430X/usci/Msp430Uart1C.nc deleted file mode 100644 index d7e3d21fde..0000000000 --- a/tos/chips/msp430X/usci/Msp430Uart1C.nc +++ /dev/null @@ -1,101 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * An implementation of the UART on USCIA1 for the MSP430. - * @author Vlado Handziski - * @author Jonathan Hui - * @author Eric B. Decker - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -#include "msp430usci.h" - -generic configuration Msp430Uart1C() { - - provides interface Resource; - provides interface ResourceRequested; - provides interface UartStream; - provides interface UartByte; - - uses interface Msp430UartConfigure; -} - -implementation { - - enum { - CLIENT_ID = unique( MSP430_UART1_BUS ), - }; - - components Msp430Uart1P as UartP; - Resource = UartP.Resource[ CLIENT_ID ]; - UartStream = UartP.UartStream[ CLIENT_ID ]; - UartByte = UartP.UartByte[ CLIENT_ID ]; - Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; - - components new Msp430UsciA1C() as UsciC; - ResourceRequested = UsciC; - UartP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; - UartP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; - UartP.UsciInterrupts[ CLIENT_ID ] -> UsciC.HplMsp430UsciInterrupts; -} diff --git a/tos/chips/msp430X/usci/Msp430Uart1P.nc b/tos/chips/msp430X/usci/Msp430Uart1P.nc deleted file mode 100644 index a14dd36cf4..0000000000 --- a/tos/chips/msp430X/usci/Msp430Uart1P.nc +++ /dev/null @@ -1,104 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Vlado Handziski - * @author Eric B. Decker - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -configuration Msp430Uart1P { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface UartStream[ uint8_t id ]; - provides interface UartByte[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430UartConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; - -} - -implementation { - - components new Msp430UartP() as UartP; - Resource = UartP.Resource; - ResourceConfigure = UartP.ResourceConfigure; - Msp430UartConfigure = UartP.Msp430UartConfigure; - UartStream = UartP.UartStream; - UartByte = UartP.UartByte; - UsciResource = UartP.UsciResource; - UsciInterrupts = UartP.UsciInterrupts; - - components HplMsp430UsciA1C as UsciC; - UartP.Usci -> UsciC; - - components Counter32khz16C as CounterC; - UartP.Counter -> CounterC; - - components LedsC as Leds; - UartP.Leds -> Leds; - -} diff --git a/tos/chips/msp430X/usci/Msp430UartConfigure.nc b/tos/chips/msp430X/usci/Msp430UartConfigure.nc deleted file mode 100644 index 5511baafed..0000000000 --- a/tos/chips/msp430X/usci/Msp430UartConfigure.nc +++ /dev/null @@ -1,72 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /* - * Copyright (c) 2004-2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Interface used by Msp430Uart clients to reconfigure the UART before use - * @author Vlado Handziski - * @author Xavier Orduna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -#include "msp430usci.h" - -interface Msp430UartConfigure { - async command msp430_uart_union_config_t* getConfig(); -} diff --git a/tos/chips/msp430X/usci/Msp430UartP.nc b/tos/chips/msp430X/usci/Msp430UartP.nc deleted file mode 100644 index 14d56ba242..0000000000 --- a/tos/chips/msp430X/usci/Msp430UartP.nc +++ /dev/null @@ -1,254 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Vlado Handziski - * @author Eric B. Decker - * @author Xavier Orduna - * @version $Revision: 1.7 $ $Date: 2008/06/04 05:31:15 $ - */ - -#include - -generic module Msp430UartP() { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface UartStream[ uint8_t id ]; - provides interface UartByte[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430UartConfigure[ uint8_t id ]; - uses interface HplMsp430UsciA as Usci; - uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; - uses interface Counter; - uses interface Leds; - -} - -implementation { - - norace uint16_t m_tx_len, m_rx_len; - norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; - norace uint16_t m_tx_pos, m_rx_pos; - norace uint8_t m_byte_time; - norace uint8_t current_owner; - - async command error_t Resource.immediateRequest[ uint8_t id ]() { - return call UsciResource.immediateRequest[ id ](); - } - - async command error_t Resource.request[ uint8_t id ]() { - return call UsciResource.request[ id ](); - } - - async command uint8_t Resource.isOwner[ uint8_t id ]() { - return call UsciResource.isOwner[ id ](); - } - - async command error_t Resource.release[ uint8_t id ]() { - if (call UsciResource.isOwner[id]() == FALSE) - return FAIL; - if ( m_rx_buf || m_tx_buf ) - return EBUSY; - return call UsciResource.release[ id ](); - } - - async command void ResourceConfigure.configure[ uint8_t id ]() { - msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); - m_byte_time = config->uartConfig.ubr / 2; //pot donar problemes - call Usci.setModeUart(config); - call Usci.enableIntr(); - } - - async command void ResourceConfigure.unconfigure[ uint8_t id ]() { - call Usci.resetUsci(TRUE); - call Usci.disableIntr(); - call Usci.disableUart(); - } - - event void UsciResource.granted[ uint8_t id ]() { - signal Resource.granted[ id ](); - } - - async command error_t UartStream.enableReceiveInterrupt[ uint8_t id ]() { - if (call UsciResource.isOwner[id]() == FALSE) - return FAIL; - call Usci.enableRxIntr(); - return SUCCESS; - } - - async command error_t UartStream.disableReceiveInterrupt[ uint8_t id ]() { - if (call UsciResource.isOwner[id]() == FALSE) - return FAIL; - call Usci.disableRxIntr(); - return SUCCESS; - } - - async command error_t UartStream.receive[ uint8_t id ]( uint8_t* buf, uint16_t len ) { - if (call UsciResource.isOwner[id]() == FALSE) - return FAIL; - if ( len == 0 ) - return FAIL; - atomic { - if ( m_rx_buf ) - return EBUSY; - m_rx_buf = buf; - m_rx_len = len; - m_rx_pos = 0; - } - return SUCCESS; - } - - async event void UsciInterrupts.rxDone[uint8_t id]( uint8_t data ) { - //call Usci.clrRxIntr(); - if ( m_rx_buf ) { - m_rx_buf[ m_rx_pos++ ] = data; - if ( m_rx_pos >= m_rx_len ) { - uint8_t* buf = m_rx_buf; - m_rx_buf = NULL; - signal UartStream.receiveDone[id]( buf, m_rx_len, SUCCESS ); - } - } else { - signal UartStream.receivedByte[id]( data ); - } - } - - async command error_t UartStream.send[ uint8_t id ]( uint8_t* buf, uint16_t len ) { - if (call UsciResource.isOwner[id]() == FALSE) - return FAIL; - if ( len == 0 ) - return FAIL; - else if ( m_tx_buf ) - return EBUSY; - m_tx_buf = buf; - m_tx_len = len; - m_tx_pos = 0; - current_owner = id; - call Usci.tx( buf[ m_tx_pos++ ] ); - return SUCCESS; - } - - async event void UsciInterrupts.txDone[uint8_t id]() { - call Usci.clrTxIntr(); - if(current_owner != id) { - uint8_t* buf = m_tx_buf; - m_tx_buf = NULL; - signal UartStream.sendDone[id]( buf, m_tx_len, FAIL ); - } - else if ( m_tx_pos < m_tx_len ) { - call Usci.tx( m_tx_buf[ m_tx_pos++ ] ); - } - else { - uint8_t* buf = m_tx_buf; - m_tx_buf = NULL; - signal UartStream.sendDone[id]( buf, m_tx_len, SUCCESS ); - } - } - - async command error_t UartByte.send[ uint8_t id ]( uint8_t data ) { - if (call UsciResource.isOwner[id]() == FALSE) - return FAIL; - call Usci.clrTxIntr(); - call Usci.disableTxIntr (); - call Usci.tx( data ); - while( !call Usci.isTxIntrPending() ); - call Usci.clrTxIntr(); - call Usci.enableTxIntr(); - return SUCCESS; - } - - async command error_t UartByte.receive[ uint8_t id ]( uint8_t* byte, uint8_t timeout ) { - - uint16_t timeout_micro = m_byte_time * timeout + 1; - uint16_t start; - - if (call UsciResource.isOwner[id]() == FALSE) - return FAIL; - start = call Counter.get(); - while( !call Usci.isRxIntrPending() ) { - if ( ( call Counter.get() - start ) >= timeout_micro ) - return FAIL; - } - *byte = call Usci.rx(); - - return SUCCESS; - - } - - async event void Counter.overflow() {} - - default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } - default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() { - return (msp430_uart_union_config_t *) &msp430_uart_default_config; - } - - default event void Resource.granted[ uint8_t id ]() {} - - default async event void UartStream.sendDone[ uint8_t id ](uint8_t* buf, uint16_t len, error_t error) {} - default async event void UartStream.receivedByte[ uint8_t id ](uint8_t byte) {} - default async event void UartStream.receiveDone[ uint8_t id ]( uint8_t* buf, uint16_t len, error_t error ) {} -} diff --git a/tos/chips/msp430X/usci/Msp430UsciA0C.nc b/tos/chips/msp430X/usci/Msp430UsciA0C.nc deleted file mode 100755 index a79fb2df4f..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciA0C.nc +++ /dev/null @@ -1,100 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Provides an interface for USART0 on the MSP430. - * - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -generic configuration Msp430UsciA0C() { - - provides interface Resource; - provides interface ResourceRequested; - provides interface ArbiterInfo; - provides interface HplMsp430UsciA; - provides interface HplMsp430UsciInterrupts; - - uses interface ResourceConfigure; - -} - -implementation { - - enum { - CLIENT_ID = unique( MSP430_HPLUSCIA0_RESOURCE ), - }; - - components Msp430UsciShareA0P as UsciShareP; - - Resource = UsciShareP.Resource[ CLIENT_ID ]; - ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; - ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; - ArbiterInfo = UsciShareP.ArbiterInfo; - HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; - - components HplMsp430UsciA0C as HplUsciC; - HplMsp430UsciA = HplUsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430UsciA1C.nc b/tos/chips/msp430X/usci/Msp430UsciA1C.nc deleted file mode 100755 index c41c823a8e..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciA1C.nc +++ /dev/null @@ -1,100 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Provides an interface for USART0 on the MSP430. - * - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -generic configuration Msp430UsciA1C() { - - provides interface Resource; - provides interface ResourceRequested; - provides interface ArbiterInfo; - provides interface HplMsp430UsciA; - provides interface HplMsp430UsciInterrupts; - - uses interface ResourceConfigure; - -} - -implementation { - - enum { - CLIENT_ID = unique( MSP430_HPLUSCIA1_RESOURCE ), - }; - - components Msp430UsciShareA1P as UsciShareP; - - Resource = UsciShareP.Resource[ CLIENT_ID ]; - ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; - ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; - ArbiterInfo = UsciShareP.ArbiterInfo; - HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; - - components HplMsp430UsciA1C as HplUsciC; - HplMsp430UsciA = HplUsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430UsciB0C.nc b/tos/chips/msp430X/usci/Msp430UsciB0C.nc deleted file mode 100755 index 43d9878c27..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciB0C.nc +++ /dev/null @@ -1,100 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Provides an interface for USART0 on the MSP430. - * - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -generic configuration Msp430UsciB0C() { - - provides interface Resource; - provides interface ResourceRequested; - provides interface ArbiterInfo; - provides interface HplMsp430UsciB; - provides interface HplMsp430UsciInterrupts; - - uses interface ResourceConfigure; - -} - -implementation { - - enum { - CLIENT_ID = unique( MSP430_HPLUSCIB0_RESOURCE ), - }; - - components Msp430UsciShareB0P as UsciShareP; - - Resource = UsciShareP.Resource[ CLIENT_ID ]; - ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; - ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; - ArbiterInfo = UsciShareP.ArbiterInfo; - HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; - - components HplMsp430UsciB0C as HplUsciC; - HplMsp430UsciB = HplUsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430UsciB1C.nc b/tos/chips/msp430X/usci/Msp430UsciB1C.nc deleted file mode 100755 index aee487e229..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciB1C.nc +++ /dev/null @@ -1,68 +0,0 @@ -/** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Provides an interface for USART0 on the MSP430. - * - * @author Jonathan Hui - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -generic configuration Msp430UsciB1C() { - - provides interface Resource; - provides interface ResourceRequested; - provides interface ArbiterInfo; - provides interface HplMsp430UsciB; - provides interface HplMsp430UsciInterrupts; - - uses interface ResourceConfigure; - -} - -implementation { - - enum { - CLIENT_ID = unique( MSP430_HPLUSCIB1_RESOURCE ), - }; - - components Msp430UsciShareB1P as UsciShareP; - - Resource = UsciShareP.Resource[ CLIENT_ID ]; - ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; - ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; - ArbiterInfo = UsciShareP.ArbiterInfo; - HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; - - components HplMsp430UsciB1C as HplUsciC; - HplMsp430UsciB = HplUsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430UsciShareA0P.nc b/tos/chips/msp430X/usci/Msp430UsciShareA0P.nc deleted file mode 100755 index 9bd83d1a68..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciShareA0P.nc +++ /dev/null @@ -1,94 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -configuration Msp430UsciShareA0P { - - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - provides interface Resource[ uint8_t id ]; - provides interface ResourceRequested[ uint8_t id ]; - provides interface ArbiterInfo; - - uses interface ResourceConfigure[ uint8_t id ]; -} - -implementation { - - components new Msp430UsciShareP() as UsciShareP; - Interrupts = UsciShareP; - - components new FcfsArbiterC( MSP430_HPLUSCIA0_RESOURCE ) as ArbiterC; - Resource = ArbiterC; - ResourceRequested = ArbiterC; - ResourceConfigure = ArbiterC; - ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; - - components HplMsp430UsciA0C as HplUsciC; - UsciShareP.RawInterrupts -> HplUsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430UsciShareA1P.nc b/tos/chips/msp430X/usci/Msp430UsciShareA1P.nc deleted file mode 100755 index c10b0850c6..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciShareA1P.nc +++ /dev/null @@ -1,63 +0,0 @@ -/** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -configuration Msp430UsciShareA1P { - - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - provides interface Resource[ uint8_t id ]; - provides interface ResourceRequested[ uint8_t id ]; - provides interface ArbiterInfo; - - uses interface ResourceConfigure[ uint8_t id ]; -} - -implementation { - - components new Msp430UsciShareP() as UsciShareP; - Interrupts = UsciShareP; - - components new FcfsArbiterC( MSP430_HPLUSCIA1_RESOURCE ) as ArbiterC; - Resource = ArbiterC; - ResourceRequested = ArbiterC; - ResourceConfigure = ArbiterC; - ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; - - components HplMsp430UsciA1C as HplUsciC; - UsciShareP.RawInterrupts -> HplUsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430UsciShareB0P.nc b/tos/chips/msp430X/usci/Msp430UsciShareB0P.nc deleted file mode 100755 index 9a99eaed13..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciShareB0P.nc +++ /dev/null @@ -1,94 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -configuration Msp430UsciShareB0P { - - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - provides interface Resource[ uint8_t id ]; - provides interface ResourceRequested[ uint8_t id ]; - provides interface ArbiterInfo; - - uses interface ResourceConfigure[ uint8_t id ]; -} - -implementation { - - components new Msp430UsciShareP() as UsciShareP; - Interrupts = UsciShareP; - - components new FcfsArbiterC( MSP430_HPLUSCIB0_RESOURCE ) as ArbiterC; - Resource = ArbiterC; - ResourceRequested = ArbiterC; - ResourceConfigure = ArbiterC; - ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; - - components HplMsp430UsciB0C as HplUsciC; - UsciShareP.RawInterrupts -> HplUsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430UsciShareB1P.nc b/tos/chips/msp430X/usci/Msp430UsciShareB1P.nc deleted file mode 100755 index 5fbb4ba63d..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciShareB1P.nc +++ /dev/null @@ -1,94 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ - */ - -configuration Msp430UsciShareB1P { - - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - provides interface Resource[ uint8_t id ]; - provides interface ResourceRequested[ uint8_t id ]; - provides interface ArbiterInfo; - - uses interface ResourceConfigure[ uint8_t id ]; -} - -implementation { - - components new Msp430UsciShareP() as UsciShareP; - Interrupts = UsciShareP; - - components new FcfsArbiterC( MSP430_HPLUSCIB1_RESOURCE ) as ArbiterC; - Resource = ArbiterC; - ResourceRequested = ArbiterC; - ResourceConfigure = ArbiterC; - ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; - - components HplMsp430UsciB1C as HplUsciC; - UsciShareP.RawInterrupts -> HplUsciC; - -} diff --git a/tos/chips/msp430X/usci/Msp430UsciShareP.nc b/tos/chips/msp430X/usci/Msp430UsciShareP.nc deleted file mode 100755 index af2d060009..0000000000 --- a/tos/chips/msp430X/usci/Msp430UsciShareP.nc +++ /dev/null @@ -1,91 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - /* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -generic module Msp430UsciShareP() @safe() { - - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as RawInterrupts; - uses interface ArbiterInfo; - -} - -implementation { - - async event void RawInterrupts.txDone() { - if ( call ArbiterInfo.inUse() ) - signal Interrupts.txDone[ call ArbiterInfo.userId() ](); - } - - async event void RawInterrupts.rxDone( uint8_t data ) { - if ( call ArbiterInfo.inUse() ) - signal Interrupts.rxDone[ call ArbiterInfo.userId() ]( data ); - } - - default async event void Interrupts.txDone[ uint8_t id ]() {} - default async event void Interrupts.rxDone[ uint8_t id ]( uint8_t data ) {} - -} diff --git a/tos/chips/msp430X/usci/PrintfUART.h b/tos/chips/msp430X/usci/PrintfUART.h deleted file mode 100644 index e56a49e3d2..0000000000 --- a/tos/chips/msp430X/usci/PrintfUART.h +++ /dev/null @@ -1,417 +0,0 @@ -/* - * "Copyright (c) 2010 Dexma Sensors S.L. - * All rights reserved." - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL Dexma Sensors S.L. BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE Dexma Sensors S.L. - * HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Dexma Sensors S.L. SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND Dexma Sensors S.L. HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - * - * - * - * "Copyright (c) 2008 The Regents of the University of California. - * All rights reserved." - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - * - * Copyright (c) 2005 - * The President and Fellows of Harvard College. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Writes printf like output to the UART. - * This works only on the AVR and MSP430 Microcontrollers! - *

- * Note: For AVR we explicitly place the print statements in ROM; for - * MSP430 this is done by default! For AVR, if we don't place it - * explicitely in ROM, the statements will go in RAM, which will - * quickly cause a descent size program to run out of RAM. By default - * it doesn't disable the interupts; disabling the interupts when - * writing to the UART, slows down/makes the mote quite unresponsive, - * and can lead to problems! If you wish to disable all printfs to - * the UART, then comment the flag: PRINTFUART_ENABLED. - - * 

- * How to use:
- *   // (0) In your Makefile, define PRINTFUART_ENABLED
- *   CFLAGS += -DPRINTFUART_ENABLED
- *   // (1) Call printfUART_init() from your initialization function 
- *   //     to initialize the UART
- *   printfUART_init();
- *   // (2) Set your UART client to the correct baud rate.  Look at 
- *   //     the comments in printfUART_init(), to figure out what 
- *   //     baud to use for your particular mote
- *
- *   // (3) Send printf statements like this:
- *   printfUART("Hello World, we are in year= %u\n", 2004);
- *   printfUART("Printing uint32_t variable, value= %lu\n", 4294967295);
- *
- * Examples and caveats:
- *   // (1) - Must use curly braces in single section statements.  
- *            (Look in the app.c to see why -- hint: it's a macro)
- *   if (x < 3)
- *       {printfUART("The value of x is %i\n", x);}
- *   // (2) - Otherwise it more or less works like regular printf
- *   printfUART("\nThe value of x=%u, and y=%u\n", x, y); 
- *
- * 
URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack
- * @author Konrad Lorincz - * @author Xavier Orduña - * @author Jordi Soucheiron - */ - -#ifndef PRINTFZ1_H -#define PRINTFZ1_H -#ifndef PRINTFUART_H -#define PRINTFUART_H -#include -#include - -#warning including printfZ1 - -// ------------------------------------------------------------------- -#ifdef PRINTFUART_ENABLED - #define DEBUGBUF_SIZE 256 - char debugbuf[DEBUGBUF_SIZE]; - char debugbufROMtoRAM[DEBUGBUF_SIZE]; - - #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) - #define printfUART(__format...) { \ - static const char strROM[] PROGMEM = __format; \ - strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM); \ - sprintf(debugbuf, debugbufROMtoRAM); \ - writedebug(); \ - } - #else // assume MSP430 architecture (e.g. TelosA, TelosB, etc.) - #define printfUART(__format...) { \ - sprintf(debugbuf, __format); \ - writedebug(); \ - } - #define printfz1(__format...) { \ - snprintf(debugbuf,DEBUGBUF_SIZE, __format); \ - writedebug(); \ - } - #endif -#else - #define printfz1(X, args...) dbg("printf", X, ## args) - #define printfUART(X, args...) dbg("printf", X, ## args) -// #define printfUART(__format...) {} - void printfz1_init() {} - void printfUART_init() {} -#endif - -#define NOprintfUART(__format...) - - -// ------------------------------------------------------------------- -#ifdef PRINTFUART_ENABLED - -/** - * Initialize the UART port. Call this from your startup routine. - */ -#define printfz1_init() {atomic printfUART_init_private();} -#define printfUART_init() {atomic printfUART_init_private();} -void printfUART_init_private() -{ - #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) - // 56K baud - outp(0,UBRR0H); - outp(15, UBRR0L); //set baud rate - outp((1< = STDRXD = ALT2(in) - GPIO<47> = STDTXD = ALT1(out) - *********/ - //atomic{ - - //configure the GPIO Alt functions and directions - _GPIO_setaltfn(46,2); // STD_RXD - _GPIO_setaltfn(47,1); // STD_TXD - - _GPDR(46) &= ~_GPIO_bit(46); // input - _GPDR(47) |= _GPIO_bit(47); // output - - STLCR |=LCR_DLAB; //turn on DLAB so we can change the divisor - STDLL = 8; //configure to 115200; - STDLH = 0; - STLCR &= ~(LCR_DLAB); //turn off DLAB - - STLCR |= 0x3; //configure to 8 bits - - STMCR &= ~MCR_LOOP; - STMCR |= MCR_OUT2; - STIER |= IER_RAVIE; - STIER |= IER_TIE; - STIER |= IER_UUE; //enable the UART - - //STMCR |= MCR_AFE; //Auto flow control enabled; - //STMCR |= MCR_RTS; - - STFCR |= FCR_TRFIFOE; //enable the fifos - -// call Interrupt.allocate(); -// call Interrupt.enable(); - //configure all the interrupt stuff - //make sure that the interrupt causes an IRQ not an FIQ - // __REG(0x40D00008) &= ~(1<<21); - //configure the priority as IPR1 - //__REG(0x40D00020) = (1<<31 | 21); - //unmask the interrupt - //__REG(0x40D00004) |= (1<<21); - - CKEN |= CKEN5_STUART; //enable the UART's clk - #else - #if defined(PLATFORM_Z1) - P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD - UCA0CTL1 |= UCSSEL_2; // CLK = ACLK - UCA0BR0 = 0x45; // 32kHz/9600 = 3.41 - UCA0BR1 = 0x00; // - UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 - UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** - - #else // assume TelosA, TelosB, etc. - // Variabel baud - // To change the baud rate, see /tos/platform/msp430/msp430baudrates.h - uint8_t source = SSEL_SMCLK; - uint16_t baudrate = 0x0012; // UBR_SMCLK_57600=0x0012 - uint8_t mctl = 0x84; // UMCTL_SMCLK_57600=0x84 - //uint16_t baudrate = 0x0009; // UBR_SMCLK_115200=0x0009 - //uint8_t mctl = 0x10; // UMCTL_SMCLK_115200=0x10 - - - uint16_t l_br = 0; - uint8_t l_mctl = 0; - uint8_t l_ssel = 0; - - TOSH_SEL_UTXD1_MODFUNC(); - TOSH_SEL_URXD1_MODFUNC(); - - - UCTL1 = SWRST; - UCTL1 |= CHAR; // 8-bit char, UART-mode - - U1RCTL &= ~URXEIE; // even erroneous characters trigger interrupts - - UCTL1 = SWRST; - UCTL1 |= CHAR; // 8-bit char, UART-mode - - if (l_ssel & 0x80) { - U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); - U1TCTL |= (l_ssel & 0x7F); - } - else { - U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); - U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz - } - - if ((l_mctl != 0) || (l_br != 0)) { - U1BR0 = l_br & 0x0FF; - U1BR1 = (l_br >> 8) & 0x0FF; - U1MCTL = l_mctl; - } - else { - U1BR0 = 0x03; // 9600 baud - U1BR1 = 0x00; - U1MCTL = 0x4A; - } - - ME2 &= ~USPIE1; // USART1 SPI module disable - ME2 |= (UTXE1 | URXE1); // USART1 UART module enable - - U1CTL &= ~SWRST; - - IFG2 &= ~(UTXIFG1 | URXIFG1); - IE2 &= ~(UTXIE1 | URXIE1); // interrupt disabled - - - - //async command void USARTControl.setClockSource(uint8_t source) { - // atomic { - l_ssel = source | 0x80; - U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); - U1TCTL |= (l_ssel & 0x7F); - // } - //} - //async command void USARTControl.setClockRate(uint16_t baudrate, uint8_t mctl) { - //atomic { - l_br = baudrate; - l_mctl = mctl; - U1BR0 = baudrate & 0x0FF; - U1BR1 = (baudrate >> 8) & 0x0FF; - U1MCTL = mctl; - //} - //} - - //async command result_t USARTControl.enableRxIntr(){ - //atomic { - IFG2 &= ~URXIFG1; - IE2 |= URXIE1; - //} - //return SUCCESS; - //} - - //async command result_t USARTControl.enableTxIntr(){ - //atomic { - IFG2 &= ~UTXIFG1; - IE2 |= UTXIE1; - //} - //return SUCCESS; - //} - - #endif - #endif - #endif - #endif -} - -#if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) -#else -#if defined(PLATFORM_IMOTE2) -#else -#if defined(PLATFORM_Z1) -#else // assume AVR architecture (e.g. TelosA, TelosB) - bool isTxIntrPending() - { - if (U1TCTL & TXEPT) { - return TRUE; - } - return FALSE; - } -#endif -#endif -#endif - -/** - * Outputs a char to the UART. - */ -void UARTPutChar(char c) -{ - if (c == '\n') - UARTPutChar('\r'); - - - #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) - loop_until_bit_is_set(UCSR0A, UDRE); - outb(UDR0,c); - - #else - #if defined(PLATFORM_IMOTE2) - STTHR = c; - #else - #if defined(PLATFORM_Z1) - while (!(IFG2&UCA0TXIFG)); - atomic UCA0TXBUF = c; - - #else // assume AVR architecture (e.g. TelosA, TelosB) - U1TXBUF = c; - while( !isTxIntrPending() ) - continue; - #endif - #endif - #endif -} - -/** - * Outputs the entire debugbuf to the UART, or until it encounters '\0'. - */ -void writedebug() -{ - uint16_t i = 0; - - while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE) - UARTPutChar(debugbuf[i++]); -} - -#endif // PRINTFUART_ENABLED -// ------------------------------------------------------------------- - -#if 0 -// -------------------------------------------------------------- -#define assertUART(x) if (!(x)) { __assertUART(__FILE__, __LINE__); } -void __assertUART(const char* file, int line) -{ - printfUART("ASSERT FAILED: file= %s, lineNbr= %i\n", file, line); - // for some reason, CLR means on - TOSH_MAKE_RED_LED_OUTPUT(); - TOSH_MAKE_YELLOW_LED_OUTPUT(); - TOSH_MAKE_GREEN_LED_OUTPUT(); - TOSH_CLR_RED_LED_PIN(); - TOSH_CLR_YELLOW_LED_PIN(); - TOSH_CLR_GREEN_LED_PIN(); - exit(1); -} -// -------------------------------------------------------------- -#endif - -#endif // PRINTFUART_H -#endif // PRINTFZ1_H - diff --git a/tos/chips/msp430X/usci/msp430usci.h b/tos/chips/msp430X/usci/msp430usci.h deleted file mode 100755 index 8d8b08a4dc..0000000000 --- a/tos/chips/msp430X/usci/msp430usci.h +++ /dev/null @@ -1,381 +0,0 @@ -/** - * Copyright (c) 2010 Eric B. Decker - * All rights reserved. - * - * Copyright (c) 2009-2010 DEXMA SENSORS SL - * All rights reserved. - * - * Copyright (c) 2004-2006, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * - Neither the name of Eric Decker, DEXMA SENSORS SL, the Technische - * Universitaet Berlin nor the names of its contributors may be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -/** - * @author Vlado Handziski - * @author Philipp Huppertz - * @author Xavier Orduna - * @author Eric B. Decker - * @author Jordi Soucheiron - * - * Fix to reflect the MSP430X as documented in Users guide - * slau144e, msp430f2618. - */ - -#ifndef _H_MSP430USCI_H -#define _H_MSP430USCI_H - -/* - * The MSP430X architecture at least the msp430f2618 family - * has a total of four ports that can be used independently - * usciA0, A1 (uart, spi) and usciB0, B1 (i2c, spi only). - * - * We set the resources up so multiple use of a given port - * can be arbritrated. - * - * UART0 -> usciA0 SPI2 -> usciA0 - * UART1 -> usciA1 SPI3 -> usciA1 - * SPI0 -> usciB0 I2C0 - * SPI1 -> usciB1 I2C1 - * - * spi2,3 are mapped to usciA0,A1 because the typical - * configuration is to use dual uarts and dual spis - * so the less used configuration maps as 2 and 3. - */ - -//USCI A0, A1: UART, SPI -#define MSP430_HPLUSCIA0_RESOURCE "Msp430UsciA0.Resource" -#define MSP430_HPLUSCIA1_RESOURCE "Msp430UsciA1.Resource" -#define MSP430_UART0_BUS MSP430_HPLUSCIA0_RESOURCE -#define MSP430_UART1_BUS MSP430_HPLUSCIA1_RESOURCE -#define MSP430_SPI2_BUS MSP430_HPLUSCIA0_RESOURCE -#define MSP430_SPI3_BUS MSP430_HPLUSCIA1_RESOURCE - -//USCI B0, B1: SPI, I2C -#define MSP430_HPLUSCIB0_RESOURCE "Msp430UsciB0.Resource" -#define MSP430_HPLUSCIB1_RESOURCE "Msp430UsciB1.Resource" -#define MSP430_SPI0_BUS MSP430_HPLUSCIB0_RESOURCE -#define MSP430_SPI1_BUS MSP430_HPLUSCIB1_RESOURCE -#define MSP430_I2C0_BUS MSP430_HPLUSCIB0_RESOURCE -#define MSP430_I2C1_BUS MSP430_HPLUSCIB1_RESOURCE - -typedef enum { - USCI_NONE = 0, - USCI_UART = 1, - USCI_SPI = 2, - USCI_I2C = 3 -} msp430_uscimode_t; - - -/************************************************************************************************************ - * - * UART mode definitions - * - */ - -/* - * UCAxCTL0, UART control 0, uart mode - */ - -typedef struct { - unsigned int ucsync : 1; // Synchronous mode enable (0=Asynchronous; 1:Synchronous) - unsigned int ucmode : 2; // USCI Mode (00=UART Mode; 01=Idle-Line; 10=Addres-Bit; 11=UART Mode, auto baud rate detection) - unsigned int ucspb : 1; // Stop bit select. Number of stop bits (0=One stop bit; 1=Two stop bits) - unsigned int uc7bit : 1; // Charactaer lenght, (0=8-bit data; 1=7-bit data) - unsigned int ucmsb : 1; // endian. Direction of the rx and tx shift (0=LSB first, 1=MSB first) - unsigned int ucpar : 1; // Parity Select (0=odd parity; 1=Even parity) - unsigned int ucpen : 1; // Parity enable (0=Parity disable; 1=Parity enabled) -} __attribute__ ((packed)) msp430_uctl0_t ; - - -/* - * UCAxCTL1, UART control 1, uart mode - */ - -typedef struct { - unsigned int ucswrst : 1; //Software reset enable (0=disabled; 1=enabled) - unsigned int uctxbrk : 1; //Transmit break. (0 = no brk; 1 = tx break next frame - unsigned int uctxaddr : 1; //Transmit address. (0=next frame transmitted is data; 1=next frame transmitted is an address) - unsigned int ucdorm : 1; //Dormant. (0 = not dormant; 1 = Dormant, only some chars will set UCAxRXIFG) - unsigned int ucbrkie : 1; //rx break interrupt -enable, 1 = enabled - unsigned int ucrxeie : 1; //rx error interrupt-enable - unsigned int ucssel : 2; //USCI clock source select: (00=UCKL; 01=ACLK; 10=SMCLK; 11=SMCLK -} __attribute__ ((packed)) msp430_uctl1_t ; - - -//converts from typedefstructs to uint8_t -DEFINE_UNION_CAST(uctl02int,uint8_t,msp430_uctl0_t) -DEFINE_UNION_CAST(int2uctl0,msp430_uctl0_t,uint8_t) -DEFINE_UNION_CAST(uctl12int,uint8_t,msp430_uctl1_t) -DEFINE_UNION_CAST(int2uctl1,msp430_uctl1_t,uint8_t) - - -/* - * The usci/uart baud rate mechanism is significantly different - * than the msp430 usart uart. See section 15.3.9 of the TI - * MSP430x2xx Family User's Guide, slau144e for details. - * - * For 32768Hz and 1048576Hz, we use UCOS16=0. - * For higher cpu dco speeds we use oversampling, UCOS16=1. - */ - -typedef enum { - UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x04, - UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x0c, - UBR_32KHZ_4800=0x0006, UMCTL_32KHZ_4800=0x0e, - UBR_32KHZ_9600=0x0003, UMCTL_32KHZ_9600=0x06, - - UBR_1048MHZ_9600=0x006D, UMCTL_1048MHZ_9600=0x04, - UBR_1048MHZ_19200=0x0036, UMCTL_1048MHZ_19200=0x0a, - UBR_1048MHZ_38400=0x001B, UMCTL_1048MHZ_38400=0x04, - UBR_1048MHZ_57600=0x0012, UMCTL_1048MHZ_57600=0x0c, - UBR_1048MHZ_115200=0x0009, UMCTL_1048MHZ_115200=0x02, - UBR_1048MHZ_128000=0x0008, UMCTL_1048MHZ_128000=0x02, - UBR_1048MHZ_256000=0x0004, UMCTL_1048MHZ_230400=0x02, - - /* 1MHz = 1000000 Hz, 4MHz 4000000, 8MHz 8000000 - * 16MHz 16000000. use UCOS16 for oversampling, - * use both UCBRF and UCBRS. - * - * Settings for 1MHz, 8Mhz, and 16MHz are taken from - * a table on page 15-22 of slau144e. - */ - UBR_1MHZ_9600=0x6, UMCTL_1MHZ_9600=0x81, - UBR_1MHZ_19200=0x3, UMCTL_1MHZ_19200=0x41, - UBR_1MHZ_57600=0x1, UMCTL_1MHZ_57600=0x0F, - - UBR_8MHZ_4800=0x68, UMCTL_8MHZ_4800=0x31, - UBR_8MHZ_9600=0x34, UMCTL_8MHZ_9600=0x11, - UBR_8MHZ_19200=0x1A, UMCTL_8MHZ_19200=0x11, - UBR_8MHZ_38400=0x0D, UMCTL_8MHZ_38400=0x01, - UBR_8MHZ_57600=0x08, UMCTL_8MHZ_57600=0xB1, - UBR_8MHZ_115200=0x04, UMCTL_8MHZ_115200=0x3B, - UBR_8MHZ_230400=0x02, UMCTL_8MHZ_230400=0x27, - - UBR_16MHZ_4800=0xD0, UMCTL_16MHZ_4800=0x51, - UBR_16MHZ_9600=0x68, UMCTL_16MHZ_9600=0x31, - UBR_16MHZ_19200=0x34, UMCTL_16MHZ_19200=0x11, - UBR_16MHZ_38400=0x1A, UMCTL_16MHZ_38400=0x11, - UBR_16MHZ_57600=0x11, UMCTL_16MHZ_57600=0x61, - UBR_16MHZ_115200=0x8, UMCTL_16MHZ_115200=0xB1, - UBR_16MHZ_230400=0x4, UMCTL_16MHZ_230400=0x3B, -} msp430_uart_rate_t; - - -typedef struct { - unsigned int ubr: 16; // Baud rate (use enum msp430_uart_rate_t for predefined rates) - unsigned int umctl: 8; // Modulation (use enum msp430_uart_rate_t for predefined rates) - - /* start of ctl0 */ - unsigned int : 1; // ucsync, should be 0 for uart - unsigned int ucmode: 2; // mode: 00 - uart, 01 - Idle, 10 - addr bit, 11 - auto baud. - unsigned int ucspb: 1; // stop: 0 - one, 1 - two - unsigned int uc7bit: 1; // 7 or 8 bit - unsigned int : 1; // msb or lsb first, 0 says lsb, uart should be 0 - unsigned int ucpar: 1; // par, 0 odd, 1 even - unsigned int ucpen: 1; // par enable, 0 disabled - - /* start of ctl1 */ - unsigned int : 5; // not specified, defaults to 0. - unsigned int ucrxeie: 1; // rx err int enable - unsigned int ucssel: 2; // clock select, 00 uclk, 01 aclk, 10/11 smclk - - /* ume, not a control register, backward compatible with usart? - * should be okay to nuke. Is this actually used? - */ - unsigned int utxe:1; // 1:enable tx module - unsigned int urxe:1; // 1:enable rx module -} msp430_uart_config_t; - -typedef struct { - uint16_t ubr; - uint8_t umctl; - uint8_t uctl0; - uint8_t uctl1; - uint8_t ume; -} msp430_uart_registers_t; - -typedef union { - msp430_uart_config_t uartConfig; - msp430_uart_registers_t uartRegisters; -} msp430_uart_union_config_t; - - -const msp430_uart_union_config_t msp430_uart_default_config = { { - ubr : UBR_8MHZ_115200, - umctl : UMCTL_8MHZ_115200, - ucmode : 0, // uart - ucspb : 0, // one stop - uc7bit : 0, // 8 bit - ucpar : 0, // odd parity (but no parity) - ucpen : 0, // parity disabled - ucrxeie : 0, // err int off - ucssel : 2, // smclk - utxe : 1, // enable tx - urxe : 1, // enable rx - } }; - - -/************************************************************************************************************ - * - * SPI mode definitions - * - */ - -typedef struct { - unsigned int ubr : 16; // Clock division factor (> = 1) - - /* ctl0 */ - unsigned int : 1; // ucsync, forced to 1 by initilization code. - unsigned int ucmode : 2; // 00 3pin spi, 01 4pin ste ah, 10 ste al, 11 i2c - unsigned int ucmst : 1; // 0 slave, 1 master - unsigned int uc7bit : 1; // 0 8 bit, 1 7 bit. - unsigned int ucmsb : 1; // 0 lsb first, 1 msb first - unsigned int ucckpl : 1; // 0 inactive low, 1 inactive high - unsigned int ucckph : 1; // 0 tx rising uclk, captured falling - // 1 captured rising, sent falling edge. - - /* ctl1 */ - unsigned int : 1; // ucswrst, forced to 1 on init - unsigned int : 5; // unused. - unsigned int ucssel : 2; // BRCLK src, 00 NA, 01 ACLK, 10/11 SMCLK -} msp430_spi_config_t; - - -typedef struct { - uint16_t ubr; - uint8_t uctl0; - uint8_t uctl1; -} msp430_spi_registers_t; - -typedef union { - msp430_spi_config_t spiConfig; - msp430_spi_registers_t spiRegisters; -} msp430_spi_union_config_t; - - -const msp430_spi_union_config_t msp430_spi_default_config = { { - ubr : 2, /* smclk/2 */ - ucmode : 0, /* 3 pin, no ste */ - ucmst : 1, /* master */ - uc7bit : 0, /* 8 bit */ - ucmsb : 1, /* msb first, compatible with msp430 usart */ - ucckpl : 0, /* inactive state low */ - ucckph : 1, /* data captured on rising, changed falling */ - ucssel : 2, /* smclk */ - } }; - - -/************************************************************************************************************ - * - * I2C mode definitions - * - */ - -typedef struct { - unsigned int : 1; // Sync mode enable, 1 = sync, must be 1 for i2c - unsigned int ucmode : 2; // 11 for i2c - unsigned int ucmst : 1; // 0 slave, 1 master - unsigned int : 1; // unused - unsigned int ucmm : 1; // multi master mode - unsigned int ucsla10 : 1; // slave addr 7 or 10 bit - unsigned int uca10 : 1; // own addr 7 or 10 bit -} __attribute__ ((packed)) msp430_i2cctl0_t ; - - -DEFINE_UNION_CAST(i2cctl02int,uint8_t,msp430_i2cctl0_t) -DEFINE_UNION_CAST(int2i2cctl0,msp430_i2cctl0_t,uint8_t) - - -typedef struct { - unsigned int ucswrst : 1; // Software reset (1 = reset) - unsigned int uctxstt : 1; // Transmit start in master. - unsigned int uctxstp : 1; // Transmit stop in master. - unsigned int uctxnack : 1; // transmit nack - unsigned int uctr : 1; // 0 rx, 1 tx - unsigned int : 1; // unused - unsigned int ucssel : 2; // USCI clock source: (00 UCLKI; 01 ACLK; 10/11 SMCLK -} __attribute__ ((packed)) msp430_i2cctl1_t ; - - -typedef struct { - uint16_t ubr : 16; /* baud rate divisor */ - - /* ctl0 */ - uint8_t : 1; /* ucsync, forced to 1 by init code */ - uint8_t ucmode : 2; /* mode, must be 3 for i2c */ - uint8_t ucmst : 1; /* master if 1 */ - uint8_t : 1; /* unused */ - uint8_t ucmm : 1; /* mult-master mode */ - uint8_t ucsla10 : 1; /* slave addr 10 bits vs. 7 */ - uint8_t uca10 : 1; /* own addressing mode 10 bits vs. 7 */ - - /* ctl1 */ - uint8_t : 1; /* software reset */ - uint8_t : 1; /* gen tx start */ - uint8_t : 1; /* gen tx stop */ - uint8_t : 1; /* gen nack */ - uint8_t uctr : 1; /* tx/rx mode, 1 = tx */ - uint8_t : 1; /* unused */ - uint8_t ucssel : 2; /* clock src, 00 uclk, 01 aclk, 10/11 smclk */ - - /* own addr */ - uint16_t i2coa : 10; /* own address */ - uint8_t : 5; /* unused */ - uint8_t ucgcen : 1; /* general call response enable */ -} msp430_i2c_config_t; - -typedef struct { - uint16_t ubr; /* 16 bit baud rate */ - uint8_t uctl0; /* control word 0 */ - uint8_t uctl1; /* control word 1 */ - uint16_t ui2coa; /* own address, ucgcen */ -} msp430_i2c_registers_t; - -typedef union { - msp430_i2c_config_t i2cConfig; - msp430_i2c_registers_t i2cRegisters; -} msp430_i2c_union_config_t; - - -const msp430_i2c_union_config_t msp430_i2c_default_config = { { - ubr : 2, /* smclk/2 */ - ucmode : 3, /* i2c mode */ - ucmst : 1, /* master */ - ucmm : 0, /* single master */ - ucsla10 : 1, /* 10 bit slave */ - uca10 : 1, /* 10 bit us */ - uctr : 1, /* tx mode to start */ - ucssel : 2, /* smclk */ - i2coa : 1, /* our address is 1 */ - ucgcen : 1, /* respond to general call */ - } }; - -#endif /* _H_MSP430USCI_H */ From 272490286a9ea653866ae03537ad4dc3aa90b25a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 3 Mar 2011 19:01:04 -0800 Subject: [PATCH 004/411] Remove extra Z1 commit. Reverse 5444 (33fcc13) and 5443 (7c460e2) Remove support for TMP102 sensor built-in Zolertia Z1 mote Remove support for ADXL345 sensor built-in Zolertia Z1 mote --- tos/chips/adxl345/ADXL345.h | 102 --- tos/chips/adxl345/ADXL345C.nc | 42 -- tos/chips/adxl345/ADXL345Control.nc | 27 - tos/chips/adxl345/ADXL345P.nc | 1030 --------------------------- tos/chips/tmp102/SimpleTMP102C.nc | 20 - tos/chips/tmp102/SimpleTMP102P.nc | 95 --- tos/chips/tmp102/TMP102.h | 10 - 7 files changed, 1326 deletions(-) delete mode 100644 tos/chips/adxl345/ADXL345.h delete mode 100644 tos/chips/adxl345/ADXL345C.nc delete mode 100644 tos/chips/adxl345/ADXL345Control.nc delete mode 100644 tos/chips/adxl345/ADXL345P.nc delete mode 100644 tos/chips/tmp102/SimpleTMP102C.nc delete mode 100644 tos/chips/tmp102/SimpleTMP102P.nc delete mode 100644 tos/chips/tmp102/TMP102.h diff --git a/tos/chips/adxl345/ADXL345.h b/tos/chips/adxl345/ADXL345.h deleted file mode 100644 index fa8b0270e4..0000000000 --- a/tos/chips/adxl345/ADXL345.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef ADXL345_H - -#define ADXL345_H - -#define ADXL345_ADDRESS 0x53 - -//ADXL345 Registers Start -#define ADXL345_DEVID 0x00 // R // Device ID. -#define ADXL345_THRESH_TAP 0x1D // RW // Tap Threshold 62.5mg/LSB (0xFF = +16g) -#define ADXL345_OFSX 0x1E // RW // X-axis Offset 15.6mg/LSB -#define ADXL345_OFSY 0x1F // RW // Y-axis Offset 15.6mg/LSB -#define ADXL345_OFSZ 0x20 // RW // Z-axis Offset 15.6mg/LSB -#define ADXL345_DUR 0x21 // RW // Tap Duration 625us/LSB -#define ADXL345_LATENT 0x22 // RW // Tap Latency 1.25ms/LSB -#define ADXL345_WINDOW 0x23 // RW // Tap Window 1.25ms/LSB -#define ADXL345_THRESH_ACT 0x24 // RW // Activity threshold 62.5mg/LSB -#define ADXL345_THRESH_INACT 0x25 // RW // Inactivity Threshold 62.5mg/LSB -#define ADXL345_TIME_INACT 0x26 // RW // Inactivity Time. 1s/LSB -#define ADXL345_ACT_INACT_CTL 0x27 // RW // xis enable control for activity and inactivity detection. -#define ADXL345_THRESH_FF 0x28 // RW // Free-fall threshold. 62.5mg/LSB -#define ADXL345_TIME_FF 0x29 // RW // Free-fall Time 5ms/LSB (values 0x14 to 0x46 are recommended) -#define ADXL345_TAP_AXES 0x2A // RW // Axis control for tap/double tap -#define ADXL345_ACT_TAP_STATUS 0x2B // R // Source of tap/double tap -#define ADXL345_BW_RATE 0x2C // RW // Data rate and power control mode (default 0xA) -#define ADXL345_POWER_CTL 0x2D // RW // Power saving features control -#define ADXL345_INT_ENABLE 0x2E // RW // Interrupt enable control -#define ADXL345_INT_MAP 0x2F // RW // Interrupt mapping control -#define ADXL345_INT_SOURCE 0x30 // R // Source of interrupts -#define ADXL345_DATAFORMAT 0x31 // RW // Data format control -#define ADXL345_DATAX0 0x32 // R // X-Axis -#define ADXL345_DATAY0 0x34 // R // Y-Axis -#define ADXL345_DATAZ0 0x36 // R // Z-Axis -#define ADXL345_FIFO_CTL 0x38 // RW // FIFO control -#define ADXL345_FIFO_STATE 0x39 // R // FIFO status -//ADXL Registers End - - -#define ADXL345_MEASURE_MODE 0x08 -#define ADXL345_STANDBY_MODE 0xF7 -#define ADXL345_SLEEP_MODE 0x04 - -#define ADXL345_RANGE_2G 0 -#define ADXL345_RANGE_4G 1 -#define ADXL345_RANGE_8G 2 -#define ADXL345_RANGE_16G 3 - -#define ADXL345_LOWRES 0 -#define ADXL345_FULLRES 1 - -#define ADXL345_START_TIMEOUT 2000 - -//ADXL345 Driver States States - -typedef enum { - ADXLCMD_START, - ADXLCMD_READ_REGISTER, - ADXLCMD_READ_DURATION, - ADXLCMD_READ_LATENT, - ADXLCMD_READ_WINDOW, - ADXLCMD_READ_THRESH_ACT, //TODO - ADXLCMD_READ_THRESH_INACT, //TODO - ADXLCMD_READ_TIME_INACT, //TODO - ADXLCMD_READ_ACT_INACT_CTL, //TODO - ADXLCMD_READ_THRESH_FF, //TODO - ADXLCMD_READ_TIME_FF, //TODO - ADXLCMD_READ_TAP_AXES, //TODO - ADXLCMD_READ_ACT_TAP_STATUS, //TODO - ADXLCMD_READ_BW_RATE, //TODO - ADXLCMD_READ_POWER_CTL, //TODO - ADXLCMD_READ_INT_ENABLE, - ADXLCMD_READ_INT_MAP, - ADXLCMD_READ_INT_SOURCE, - ADXLCMD_READ_X, - ADXLCMD_READ_Y, - ADXLCMD_READ_Z, - ADXLCMD_SET_RANGE, - ADXLCMD_STOP, - ADXLCMD_SLEEP, - ADXLCMD_INT, - ADXLCMD_SET_REGISTER, - ADXLCMD_SET_DURATION, - ADXLCMD_SET_LATENT, - ADXLCMD_SET_WINDOW, - ADXLCMD_SET_INT_MAP, -} adxl345_commands; - -//ADXL345 Interruptions - - -typedef enum { - ADXLINT_NONE = 0x00, - ADXLINT_OVERRUN = 0x01, - ADXLINT_WATERMARK = 0x02, - ADXLINT_FREE_FALL = 0x04, - ADXLINT_INACTIVITY = 0x08, - ADXLINT_ACTIVITY = 0x10, - ADXLINT_DOUBLE_TAP = 0x20, - ADXLINT_SINGLE_TAP = 0x40, - ADXLINT_DATA_READY = 0x80, -} adxlint_state_t; - -#endif diff --git a/tos/chips/adxl345/ADXL345C.nc b/tos/chips/adxl345/ADXL345C.nc deleted file mode 100644 index 50d3f7b690..0000000000 --- a/tos/chips/adxl345/ADXL345C.nc +++ /dev/null @@ -1,42 +0,0 @@ -#include "ADXL345.h" - -generic configuration ADXL345C() { - provides interface SplitControl; - provides interface Read as X; - provides interface Read as Y; - provides interface Read as Z; - provides interface Read as IntSource; - provides interface Read as Register; - provides interface ADXL345Control; - provides interface Notify as Int1; - provides interface Notify as Int2; -} -implementation { - components ADXL345P; - X = ADXL345P.X; - Y = ADXL345P.Y; - Z = ADXL345P.Z; - IntSource = ADXL345P.IntSource; - SplitControl = ADXL345P; - ADXL345Control = ADXL345P; - Register = ADXL345P.Register; - - components new Msp430I2C1C() as I2C; - ADXL345P.Resource -> I2C; - ADXL345P.ResourceRequested -> I2C; - ADXL345P.I2CBasicAddr -> I2C; - - components HplADXL345C; - - Int1 = ADXL345P.Int1; - Int2 = ADXL345P.Int2; - - ADXL345P.GpioInterrupt1 -> HplADXL345C.GpioInterrupt1; - ADXL345P.GpioInterrupt2 -> HplADXL345C.GpioInterrupt2; - ADXL345P.GeneralIO1 -> HplADXL345C.GeneralIO1; - ADXL345P.GeneralIO2 -> HplADXL345C.GeneralIO2; - - components new TimerMilliC() as TimeoutAlarm; - ADXL345P.TimeoutAlarm -> TimeoutAlarm; - -} diff --git a/tos/chips/adxl345/ADXL345Control.nc b/tos/chips/adxl345/ADXL345Control.nc deleted file mode 100644 index 7f0d074019..0000000000 --- a/tos/chips/adxl345/ADXL345Control.nc +++ /dev/null @@ -1,27 +0,0 @@ -interface ADXL345Control -{ - command error_t setRange(uint8_t range, uint8_t resolution); - event void setRangeDone(error_t error); - - command error_t setInterrups(uint8_t interrupt_vector); - event void setInterruptsDone(error_t error); - - command error_t setIntMap(uint8_t int_map_vector); - event void setIntMapDone(error_t error); - - command error_t setRegister(uint8_t reg, uint8_t value); - event void setRegisterDone(error_t error); - - command error_t setDuration(uint8_t duration); - event void setDurationDone(error_t error); - - command error_t setLatent(uint8_t latent); - event void setLatentDone(error_t error); - - command error_t setWindow(uint8_t window); - event void setWindowDone(error_t error); - - command error_t setReadAddress(uint8_t address); - event void setReadAddressDone(error_t error); - -} diff --git a/tos/chips/adxl345/ADXL345P.nc b/tos/chips/adxl345/ADXL345P.nc deleted file mode 100644 index 00559fda2b..0000000000 --- a/tos/chips/adxl345/ADXL345P.nc +++ /dev/null @@ -1,1030 +0,0 @@ -#include "ADXL345.h" - -module ADXL345P { - provides { - interface SplitControl; - interface Read as Register; - interface Read as Duration; - interface Read as Latent; - interface Read as Window; - interface Read as BwRate; - interface Read as PowerCtl; - interface Read as IntEnable; - interface Read as IntMap; - interface Read as IntSource; - interface Read as X; - interface Read as Y; - interface Read as Z; - interface ADXL345Control; - interface Notify as Int1; - interface Notify as Int2; - } - uses { - interface Resource; - interface ResourceRequested; - interface I2CPacket as I2CBasicAddr; - interface GeneralIO as GeneralIO1; - interface GeneralIO as GeneralIO2; - interface GpioInterrupt as GpioInterrupt1; - interface GpioInterrupt as GpioInterrupt2; - interface Timer as TimeoutAlarm; - } - -} -implementation { - - norace bool lock=FALSE; - norace uint8_t state; - norace uint8_t adxlcmd; - norace uint8_t databuf[20]; - norace uint8_t set_reg[2]; - norace uint8_t pointer; - norace uint8_t readAddress=0; - norace uint8_t regData; - norace uint8_t duration; - norace uint8_t latent; - norace uint8_t window; - norace uint8_t bw_rate; - norace uint8_t power_ctl=0x0; - norace uint8_t int_enable; - norace uint8_t int_map; - norace uint8_t int_source; - norace uint8_t dataformat; - norace error_t error_return= SUCCESS; - norace uint16_t x_axis; - norace uint16_t y_axis; - norace uint16_t z_axis; - - - task void sendEvent1(); - task void sendEvent2(); - - task void started(){ - if(call TimeoutAlarm.isRunning()) call TimeoutAlarm.stop(); - lock = FALSE; - signal SplitControl.startDone(error_return); - } - - task void stopped(){ - lock = FALSE; - signal SplitControl.stopDone(error_return); - } - - task void calculatePowerCtl() { - lock = FALSE; - signal PowerCtl.readDone(error_return, power_ctl); - } - - task void calculateBwRate() { - lock = FALSE; - signal BwRate.readDone(error_return, bw_rate); - } - - task void calculateIntMap() { - lock = FALSE; - signal IntMap.readDone(error_return, int_map); - } - - task void calculateIntEnable() { - lock = FALSE; - signal IntEnable.readDone(error_return, int_enable); - } - - task void calculateIntSource() { - lock = FALSE; - signal IntSource.readDone(error_return, int_source); - } - - task void calculateX(){ - lock = FALSE; - signal X.readDone(error_return, x_axis); - } - - task void calculateY(){ - lock = FALSE; - signal Y.readDone(error_return, y_axis); - } - - task void calculateZ(){ - lock = FALSE; - signal Z.readDone(error_return, z_axis); - } - - task void calculateRegister() { - lock = FALSE; - signal Register.readDone(error_return, regData); - } - - task void rangeDone(){ - lock = FALSE; - signal ADXL345Control.setRangeDone(error_return); - } - - task void setRegisterDone(){ - lock = FALSE; - signal ADXL345Control.setRegisterDone(error_return); - } - - task void setIntMapDone(){ - lock = FALSE; - signal ADXL345Control.setIntMapDone(error_return); - } - - task void interruptsDone(){ - lock = FALSE; - signal ADXL345Control.setInterruptsDone(error_return); - } - - task void durationDone(){ - lock = FALSE; - signal ADXL345Control.setDurationDone(error_return); - } - - task void latentDone(){ - lock = FALSE; - signal ADXL345Control.setLatentDone(error_return); - } - task void windowDone(){ - lock = FALSE; - signal ADXL345Control.setWindowDone(error_return); - } - - task void readDurationDone(){ - lock = FALSE; - signal Duration.readDone(error_return, duration); - } - - task void readLatentDone(){ - lock = FALSE; - signal Latent.readDone(error_return, latent); - } - - task void readWindowDone(){ - lock = FALSE; - signal Window.readDone(error_return, window); - } - - task void setReadAddressDone() { - signal ADXL345Control.setReadAddressDone(SUCCESS); - } - - - command error_t SplitControl.start(){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_START; - e = call Resource.request(); - if (e==SUCCESS) { - call TimeoutAlarm.startOneShot(ADXL345_START_TIMEOUT); - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t SplitControl.stop(){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_STOP; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t ADXL345Control.setReadAddress(uint8_t address){ - if(lock) return EBUSY; - lock = TRUE; - if( address >= 0x01 && address <= 0x1C) return EINVAL; //reserved, do not access - if( address >= 0x3A) return EINVAL; //to big - readAddress = address; - lock=FALSE; - return SUCCESS; - } - - command error_t ADXL345Control.setRange(uint8_t range, uint8_t resolution){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_SET_RANGE; - e=call Resource.request(); - if(e==SUCCESS) { - dataformat = resolution << 3; - dataformat = dataformat + range; - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t ADXL345Control.setRegister(uint8_t reg, uint8_t value){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_SET_REGISTER; - e=call Resource.request(); - if(e==SUCCESS) { - set_reg[0] = reg; - set_reg[1] = value; - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t ADXL345Control.setInterrups(uint8_t int_enable_par) { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_INT; - e = call Resource.request(); - if (e==SUCCESS) { - int_enable = int_enable_par; - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t ADXL345Control.setDuration(uint8_t duration_par) { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_SET_DURATION; - e = call Resource.request(); - if (e==SUCCESS) { - duration = duration_par; - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t ADXL345Control.setLatent(uint8_t latent_par) { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_SET_LATENT; - e = call Resource.request(); - if (e==SUCCESS) { - latent = latent_par; - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t ADXL345Control.setWindow(uint8_t window_par) { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_SET_WINDOW; - e = call Resource.request(); - if (e==SUCCESS) { - window = window_par; - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t ADXL345Control.setIntMap(uint8_t int_map_par) { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_SET_INT_MAP; - e = call Resource.request(); - if (e==SUCCESS) { - int_map = int_map_par; - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t PowerCtl.read() { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_POWER_CTL; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t BwRate.read() { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_BW_RATE; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t IntEnable.read() { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_INT_ENABLE; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t IntMap.read() { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_INT_MAP; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t IntSource.read() { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_INT_SOURCE; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t Register.read() { - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_REGISTER; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t X.read(){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_X; - if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { - lock=FALSE; - return FAIL; - } - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t Y.read(){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_Y; - if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { - lock=FALSE; - return FAIL; - } - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t Z.read(){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_Z; - if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { - lock=FALSE; - return FAIL; - } - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t Duration.read(){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_DURATION; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t Latent.read(){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_LATENT; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - command error_t Window.read(){ - error_t e; - if(lock) return EBUSY; - lock = TRUE; - adxlcmd = ADXLCMD_READ_WINDOW; - e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } - lock = FALSE; - return e; - } - - event void Resource.granted(){ - error_t e; - switch(adxlcmd){ - case ADXLCMD_START: - power_ctl = power_ctl | ADXL345_MEASURE_MODE; - databuf[0] = ADXL345_THRESH_TAP; - databuf[1] = 0x40; //ADXL345_THRESH_TAP - databuf[2] = 0x0; //ADXL345_OFSX - databuf[3] = 0x0; //ADXL345_OFSY - databuf[4] = 0x0; //ADXL345_OFSZ - databuf[5] = 0x7F; //ADXL345_DUR - databuf[6] = 0x30; //ADXL345_LATENT - databuf[7] = 0x7F; //ADXL345_WINDOW - databuf[8] = 0x2; //ADXL345_THRESH_ACT - databuf[9] = 0x1; //ADXL345_THRESH_INACT - databuf[10] = 0xFF; //ADXL345_TIME_INACT - databuf[11] = 0xFF; //ADXL345_ACT_INACT_CTL - databuf[12] = 0x05; //ADXL345_THRESH_FF - databuf[13] = 0x14; //ADXL345_TIME_FF - databuf[14] = 0x7; //ADXL345_TAP_AXES - databuf[15] = 0x0; //ADXL345_ACT_TAP_STATUS(read only) - databuf[16] = 0x0A; //ADXL345_BW_RATE - databuf[17] = power_ctl; //ADXL345_POWER_CTL - databuf[18] = 0x0; //ADXL345_INT_ENABLE (all disabled by default) - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 19, databuf); - if (e!= SUCCESS) { - error_return = e; - post started(); - } - break; - - case ADXLCMD_READ_DURATION: - pointer = ADXL345_DUR; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post readDurationDone(); - } - break; - - case ADXLCMD_READ_LATENT: - pointer = ADXL345_LATENT; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post readLatentDone(); - } - break; - - case ADXLCMD_READ_WINDOW: - pointer = ADXL345_WINDOW; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post readWindowDone(); - } - break; - - case ADXLCMD_READ_POWER_CTL: - pointer = ADXL345_POWER_CTL; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculatePowerCtl(); - } - break; - - case ADXLCMD_READ_BW_RATE: - pointer = ADXL345_BW_RATE; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculateBwRate(); - } - break; - - case ADXLCMD_READ_INT_ENABLE: - pointer = ADXL345_INT_ENABLE; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculateIntEnable(); - } - break; - - case ADXLCMD_READ_INT_MAP: - pointer = ADXL345_INT_MAP; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculateIntMap(); - } - break; - - case ADXLCMD_READ_INT_SOURCE: - pointer = ADXL345_INT_SOURCE; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculateIntSource(); - } - break; - - case ADXLCMD_READ_X: - pointer = ADXL345_DATAX0; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculateX(); - } - break; - - case ADXLCMD_READ_Y: - pointer = ADXL345_DATAY0; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculateY(); - } - break; - - case ADXLCMD_READ_Z: - pointer = ADXL345_DATAZ0; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculateZ(); - } - break; - - case ADXLCMD_READ_REGISTER: - pointer = readAddress; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - if (e!= SUCCESS) { - error_return = e; - post calculateRegister(); - } - break; - - case ADXLCMD_SET_REGISTER: - databuf[0] = set_reg[0]; - databuf[1] = set_reg[1]; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - if (e!= SUCCESS) { - error_return = e; - post setRegisterDone(); - } - break; - - case ADXLCMD_SET_INT_MAP: - databuf[0] = ADXL345_INT_MAP; - databuf[1] = int_map; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - if (e!= SUCCESS) { - error_return = e; - post setIntMapDone(); - } - break; - - case ADXLCMD_SET_RANGE: - databuf[0] = ADXL345_DATAFORMAT; - databuf[1] = dataformat; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - if (e!= SUCCESS) { - error_return = e; - post rangeDone(); - } - break; - - case ADXLCMD_STOP: - power_ctl = power_ctl & ADXL345_STANDBY_MODE; - databuf[0] = ADXL345_POWER_CTL; - databuf[1] = power_ctl; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - if (e!= SUCCESS) { - error_return = e; - post stopped(); - } - break; - - case ADXLCMD_INT: - databuf[0] = ADXL345_INT_ENABLE; - databuf[1] = int_enable; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - if (e!= SUCCESS) { - error_return = e; - post interruptsDone(); - } - break; - - case ADXLCMD_SET_DURATION: - databuf[0] = ADXL345_DUR; - databuf[1] = duration; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - if (e!= SUCCESS) { - error_return = e; - post durationDone(); - } - break; - - case ADXLCMD_SET_LATENT: - databuf[0] = ADXL345_LATENT; - databuf[1] = latent; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - if (e!= SUCCESS) { - error_return = e; - post latentDone(); - } - break; - - case ADXLCMD_SET_WINDOW: - databuf[0] = ADXL345_WINDOW; - databuf[1] = window; - e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - if (e!= SUCCESS) { - error_return = e; - post windowDone(); - } - break; - - } - } - - async event void ResourceRequested.requested(){ - - } - - async event void ResourceRequested.immediateRequested(){ - - } - - async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ - uint16_t tmp=0; - if(call Resource.isOwner()) { - error_return=error; - for(tmp=0;tmp<0x8fff;tmp++); //delay - tmp= call Resource.release(); - if(adxlcmd == ADXLCMD_READ_X || adxlcmd == ADXLCMD_READ_Y || adxlcmd == ADXLCMD_READ_Z) - { - tmp = data[1]; - tmp = tmp << 8; - tmp = tmp + data[0]; - } - switch(adxlcmd){ - case ADXLCMD_READ_REGISTER: - regData=data[0]; - post calculateRegister(); - break; - case ADXLCMD_READ_DURATION: - duration=data[0]; - post readDurationDone(); - break; - case ADXLCMD_READ_LATENT: - latent=data[0]; - post readLatentDone(); - break; - case ADXLCMD_READ_WINDOW: - window=data[0]; - post readWindowDone(); - break; - case ADXLCMD_READ_POWER_CTL: - power_ctl=data[0]; - post calculatePowerCtl(); - break; - case ADXLCMD_READ_BW_RATE: - bw_rate=data[0]; - post calculateBwRate(); - break; - case ADXLCMD_READ_INT_ENABLE: - int_enable=data[0]; - post calculateIntEnable(); - break; - case ADXLCMD_READ_INT_MAP: - int_map=data[0]; - post calculateIntMap(); - break; - case ADXLCMD_READ_INT_SOURCE: - int_source=data[0]; - post calculateIntSource(); - break; - case ADXLCMD_READ_X: - x_axis = tmp; - post calculateX(); - break; - case ADXLCMD_READ_Y: - y_axis = tmp; - post calculateY(); - break; - case ADXLCMD_READ_Z: - z_axis = tmp; - post calculateZ(); - break; - } - } - } - - async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ - if(call Resource.isOwner()) { - error_return=error; - if( adxlcmd != ADXLCMD_READ_REGISTER - && adxlcmd != ADXLCMD_READ_DURATION - && adxlcmd != ADXLCMD_READ_LATENT - && adxlcmd != ADXLCMD_READ_WINDOW - && adxlcmd != ADXLCMD_READ_INT_ENABLE - && adxlcmd != ADXLCMD_READ_INT_MAP - && adxlcmd != ADXLCMD_READ_INT_SOURCE - && adxlcmd != ADXLCMD_READ_X - && adxlcmd != ADXLCMD_READ_Y - && adxlcmd != ADXLCMD_READ_Z - ) - { - call Resource.release(); - } - switch(adxlcmd){ - case ADXLCMD_START: - post started(); - break; - case ADXLCMD_READ_REGISTER: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post calculateRegister(); - break; - case ADXLCMD_READ_DURATION: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post readDurationDone(); - break; - case ADXLCMD_READ_LATENT: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post readLatentDone(); - break; - case ADXLCMD_READ_WINDOW: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post readWindowDone(); - break; - case ADXLCMD_READ_POWER_CTL: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post calculatePowerCtl(); - break; - case ADXLCMD_READ_BW_RATE: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post calculateBwRate(); - break; - case ADXLCMD_READ_INT_ENABLE: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post calculateIntEnable(); - break; - case ADXLCMD_READ_INT_MAP: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post calculateIntMap(); - break; - case ADXLCMD_READ_INT_SOURCE: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); - else - post calculateIntSource(); - break; - case ADXLCMD_READ_X: - if (error==SUCCESS) - call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - else - post calculateX(); - break; - case ADXLCMD_READ_Y: - if (error==SUCCESS) - call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - else - post calculateY(); - break; - case ADXLCMD_READ_Z: - if (error==SUCCESS) - call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - else - post calculateZ(); - break; - case ADXLCMD_SET_REGISTER: - post setRegisterDone(); - break; - case ADXLCMD_SET_INT_MAP: - post setIntMapDone(); - break; - case ADXLCMD_SET_RANGE: - post rangeDone(); - break; - case ADXLCMD_STOP: - post stopped(); - break; - case ADXLCMD_INT: - post interruptsDone(); - break; - case ADXLCMD_SET_DURATION: - post durationDone(); - break; - case ADXLCMD_SET_LATENT: - post latentDone(); - break; - case ADXLCMD_SET_WINDOW: - post windowDone(); - break; - } - } - } - - /* default handlers */ - default event void Register.readDone(error_t error, uint8_t data) { - return; - } - - default event void Duration.readDone(error_t error, uint8_t data){ - return; - } - - default event void Latent.readDone(error_t error, uint8_t data) { - return; - } - - default event void Window.readDone(error_t error, uint8_t data) { - return; - } - - default event void PowerCtl.readDone(error_t error, uint8_t data) { - return; - } - - default event void BwRate.readDone(error_t error, uint8_t data) { - return; - } - - default event void IntEnable.readDone(error_t error, uint8_t data) { - return; - } - - default event void IntMap.readDone(error_t error, uint8_t data) { - return; - } - - default event void IntSource.readDone(error_t error, uint8_t data){ - return; - } - - default event void X.readDone(error_t error, uint16_t data){ - return; - } - - default event void Y.readDone(error_t error, uint16_t data){ - return; - } - - default event void Z.readDone(error_t error, uint16_t data){ - return; - } - - default event void ADXL345Control.setRangeDone(error_t error){ - return; - } - - default event void ADXL345Control.setInterruptsDone(error_t error){ - return; - } - - default event void ADXL345Control.setRegisterDone(error_t error){ - return; - } - - default event void ADXL345Control.setDurationDone(error_t error){ - return; - } - - default event void ADXL345Control.setLatentDone(error_t error){ - return; - } - - default event void ADXL345Control.setWindowDone(error_t error){ - return; - } - - default event void ADXL345Control.setIntMapDone(error_t error){ - return; - } - - default event void ADXL345Control.setReadAddressDone(error_t error){ - return; - } - - default event void Int1.notify(adxlint_state_t val) { - } - - default event void Int2.notify(adxlint_state_t val) { - } - /*defaut handlers end*/ - - event void TimeoutAlarm.fired() { - if(lock && (adxlcmd == ADXLCMD_START)) - { - lock = FALSE; - - signal SplitControl.startDone(EOFF); - } - } - - command error_t Int1.enable() { - call GeneralIO1.makeInput(); - return call GpioInterrupt1.enableRisingEdge(); - } - - command error_t Int2.enable() { - call GeneralIO2.makeInput(); - return call GpioInterrupt2.enableRisingEdge(); - } - - command error_t Int1.disable() { - return call GpioInterrupt1.disable(); - } - - command error_t Int2.disable() { - return call GpioInterrupt2.disable(); - } - - task void sendEvent1() { - signal Int1.notify( 1 ); - call GpioInterrupt1.enableRisingEdge(); - } - - task void sendEvent2() { - signal Int2.notify( 1 ); - call GpioInterrupt2.enableRisingEdge(); - } - - async event void GpioInterrupt1.fired() { - call GpioInterrupt1.disable(); - - post sendEvent1(); - } - - async event void GpioInterrupt2.fired() { - call GpioInterrupt2.disable(); - post sendEvent2(); - } - -} diff --git a/tos/chips/tmp102/SimpleTMP102C.nc b/tos/chips/tmp102/SimpleTMP102C.nc deleted file mode 100644 index 25b0a1cdaa..0000000000 --- a/tos/chips/tmp102/SimpleTMP102C.nc +++ /dev/null @@ -1,20 +0,0 @@ - -generic configuration SimpleTMP102C() { - provides interface Read; -} -implementation { - components SimpleTMP102P; - Read = SimpleTMP102P; - - components new TimerMilliC() as TimerSensor; - SimpleTMP102P.TimerSensor -> TimerSensor; - - components new TimerMilliC() as TimerFail; - SimpleTMP102P.TimerFail -> TimerFail; - - components new Msp430I2C1C() as I2C; - SimpleTMP102P.Resource -> I2C; - SimpleTMP102P.ResourceRequested -> I2C; - SimpleTMP102P.I2CBasicAddr -> I2C; - -} diff --git a/tos/chips/tmp102/SimpleTMP102P.nc b/tos/chips/tmp102/SimpleTMP102P.nc deleted file mode 100644 index 102c679ffe..0000000000 --- a/tos/chips/tmp102/SimpleTMP102P.nc +++ /dev/null @@ -1,95 +0,0 @@ -#include "TMP102.h" - - -module SimpleTMP102P { - provides interface Read; - uses { - interface Timer as TimerSensor; - interface Timer as TimerFail; - interface Resource; - interface ResourceRequested; - interface I2CPacket as I2CBasicAddr; - } - -} -implementation { - - uint16_t temp; - uint8_t pointer; - uint8_t temperaturebuff[2]; - uint16_t tmpaddr; - - norace uint8_t tempcmd; - - task void calculateTemp(){ - uint16_t tmp; - atomic tmp = temp; - signal Read.readDone(SUCCESS, tmp); - } - - command error_t Read.read(){ - atomic P5DIR |= 0x01; - atomic P5OUT |= 0x01; - call TimerSensor.startOneShot(100); - //call TimerFail.startOneShot(1024); - return SUCCESS; - } - - event void TimerSensor.fired() { - call Resource.request(); - } - - event void TimerFail.fired() { - signal Read.readDone(SUCCESS, 0); - } - - event void Resource.granted(){ - error_t error; - pointer = TMP102_TEMPREG; - tempcmd = TMP_READ_TMP; - error= call I2CBasicAddr.write((I2C_START | I2C_STOP), TMP102_ADDRESS, 1, &pointer); - if(error) - { - call Resource.release(); - signal Read.readDone(error, 0); - } - } - - async event void ResourceRequested.requested(){ - - } - - async event void ResourceRequested.immediateRequested(){ - - } - - async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ - if(call Resource.isOwner()) { - uint16_t tmp; - for(tmp=0;tmp<0xffff;tmp++); //delay - call Resource.release(); - tmp = data[0]; - tmp = tmp << 8; - tmp = tmp + data[1]; - tmp = tmp >> 4; - atomic temp = tmp; - post calculateTemp(); - } - } - - async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ - //printfUART("write done in temp\n"); - if(call Resource.isOwner()){ - error_t e; - e = call I2CBasicAddr.read((I2C_START | I2C_STOP), TMP102_ADDRESS, 2, temperaturebuff); - if(e) - { - call Resource.release(); - signal Read.readDone(error, 0); - } - } - } - - - -} diff --git a/tos/chips/tmp102/TMP102.h b/tos/chips/tmp102/TMP102.h deleted file mode 100644 index 77b1fe0cb7..0000000000 --- a/tos/chips/tmp102/TMP102.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef TMP102_H - -#define TMP102_H - -#define TMP102_ADDRESS 0x48 -#define TMP102_TEMPREG 0x00 - -#define TMP_READ_TMP 1 - -#endif \ No newline at end of file From c2e52bd4ab52cfc2bbe1984f83604cc782e6faec Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 3 Mar 2011 19:12:08 -0800 Subject: [PATCH 005/411] Remove extra Z1 commit. Reverse 5442 (95e34ad) Remove Zolertia Z1 platform directory. --- tos/platforms/z1/.platform | 48 --- tos/platforms/z1/ActiveMessageC.nc | 80 ---- tos/platforms/z1/DemoSensorC.nc | 25 -- tos/platforms/z1/HplUserButtonC.nc | 54 --- tos/platforms/z1/Ieee154MessageC.nc | 60 --- tos/platforms/z1/LedsIntensity.nc | 5 - tos/platforms/z1/LedsIntensityC.nc | 15 - tos/platforms/z1/LedsIntensityP.nc | 111 ----- tos/platforms/z1/Msp430Timer32khzMapC.nc | 75 ---- tos/platforms/z1/PlatformC.nc | 14 - tos/platforms/z1/PlatformLedsC.nc | 32 -- tos/platforms/z1/PlatformP.nc | 17 - tos/platforms/z1/PlatformSerialC.nc | 21 - tos/platforms/z1/SwitchToggleC.nc | 91 ---- tos/platforms/z1/UserButton.h | 44 -- tos/platforms/z1/UserButtonC.nc | 63 --- tos/platforms/z1/UserButtonP.nc | 77 ---- tos/platforms/z1/chips/adxl345/HplADXL345C.nc | 28 -- .../z1/chips/cc2420/HplCC2420AlarmC.nc | 54 --- .../z1/chips/cc2420/HplCC2420InterruptsC.nc | 67 --- .../z1/chips/cc2420/HplCC2420PinsC.nc | 91 ---- .../z1/chips/cc2420/HplCC2420SpiC.nc | 57 --- .../z1/chips/msp430X/adc12/BatteryC.nc | 17 - .../z1/chips/msp430X/adc12/BatteryP.nc | 26 -- .../z1/chips/msp430X/usci/Msp430I2C1P.nc | 96 ----- .../chips/msp430X/usci/Msp430SpiNoDmaB0P.nc | 101 ----- .../z1/chips/msp430X/usci/Z1SerialP.nc | 29 -- .../z1/chips/msp430X/usci/Z1UsciP.nc | 39 -- .../z1/chips/msp430X/usci/printfZ1.h | 396 ------------------ .../z1/chips/stm25p/HplStm25pPinsC.nc | 59 --- .../z1/chips/stm25p/HplStm25pSpiC.nc | 55 --- .../z1/chips/tmp102/HalTMP102Advanced.nc | 69 --- .../z1/chips/tmp102/HalTMP102ControlP.nc | 277 ------------ .../z1/chips/tmp102/HalTMP102ReaderP.nc | 94 ----- tos/platforms/z1/chips/tmp102/HplTMP102.nc | 81 ---- .../z1/chips/tmp102/HplTMP102LogicP.nc | 289 ------------- tos/platforms/z1/chips/tmp102/TMP102.h | 77 ---- tos/platforms/z1/chips/tmp102/TMP102C.nc | 61 --- .../z1/chips/tmp102/TMP102InternalC.nc | 73 ---- .../z1/chips/tmp102/TMP102InternalP.nc | 84 ---- tos/platforms/z1/hardware.h | 24 -- tos/platforms/z1/platform.h | 0 tos/platforms/z1/platform_message.h | 59 --- 43 files changed, 3135 deletions(-) delete mode 100644 tos/platforms/z1/.platform delete mode 100644 tos/platforms/z1/ActiveMessageC.nc delete mode 100644 tos/platforms/z1/DemoSensorC.nc delete mode 100644 tos/platforms/z1/HplUserButtonC.nc delete mode 100644 tos/platforms/z1/Ieee154MessageC.nc delete mode 100644 tos/platforms/z1/LedsIntensity.nc delete mode 100644 tos/platforms/z1/LedsIntensityC.nc delete mode 100644 tos/platforms/z1/LedsIntensityP.nc delete mode 100644 tos/platforms/z1/Msp430Timer32khzMapC.nc delete mode 100644 tos/platforms/z1/PlatformC.nc delete mode 100644 tos/platforms/z1/PlatformLedsC.nc delete mode 100644 tos/platforms/z1/PlatformP.nc delete mode 100644 tos/platforms/z1/PlatformSerialC.nc delete mode 100644 tos/platforms/z1/SwitchToggleC.nc delete mode 100644 tos/platforms/z1/UserButton.h delete mode 100644 tos/platforms/z1/UserButtonC.nc delete mode 100644 tos/platforms/z1/UserButtonP.nc delete mode 100644 tos/platforms/z1/chips/adxl345/HplADXL345C.nc delete mode 100644 tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc delete mode 100644 tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc delete mode 100644 tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc delete mode 100644 tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc delete mode 100644 tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc delete mode 100644 tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc delete mode 100644 tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc delete mode 100644 tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc delete mode 100644 tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc delete mode 100644 tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc delete mode 100644 tos/platforms/z1/chips/msp430X/usci/printfZ1.h delete mode 100644 tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc delete mode 100644 tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc delete mode 100644 tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc delete mode 100644 tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc delete mode 100644 tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc delete mode 100644 tos/platforms/z1/chips/tmp102/HplTMP102.nc delete mode 100644 tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc delete mode 100644 tos/platforms/z1/chips/tmp102/TMP102.h delete mode 100644 tos/platforms/z1/chips/tmp102/TMP102C.nc delete mode 100644 tos/platforms/z1/chips/tmp102/TMP102InternalC.nc delete mode 100644 tos/platforms/z1/chips/tmp102/TMP102InternalP.nc delete mode 100644 tos/platforms/z1/hardware.h delete mode 100644 tos/platforms/z1/platform.h delete mode 100644 tos/platforms/z1/platform_message.h diff --git a/tos/platforms/z1/.platform b/tos/platforms/z1/.platform deleted file mode 100644 index aade4f5a7c..0000000000 --- a/tos/platforms/z1/.platform +++ /dev/null @@ -1,48 +0,0 @@ -push( @includes, qw( - %T/platforms/z1 - %T/platforms/z1/chips/adxl345 - %T/platforms/z1/chips/cc2420 - %T/platforms/z1/chips/lis302 - %T/platforms/z1/chips/mma7455 - %T/platforms/z1/chips/m25p80 - %T/platforms/z1/chips/msp430X/adc12 - %T/platforms/z1/chips/msp430X/usci - %T/platforms/z1/chips/pic12f519 - %T/platforms/z1/chips/stm25p - %T/platforms/z1/chips/sht11 - %T/chips/cc2420 - %T/chips/cc2420/alarm - %T/chips/cc2420/control - %T/chips/cc2420/csma - %T/chips/cc2420/interfaces - %T/chips/cc2420/link - %T/chips/cc2420/lowpan - %T/chips/cc2420/lpl - %T/chips/cc2420/packet - %T/chips/cc2420/receive - %T/chips/cc2420/spi - %T/chips/cc2420/transmit - %T/chips/cc2420/unique - %T/chips/msp430X - %T/chips/msp430X/adc12 - %T/chips/msp430X/dma - %T/chips/msp430X/pins - %T/chips/msp430X/timer - %T/chips/msp430X/usci - %T/chips/msp430X/sensors - %T/chips/stm25p - %T/chips/sht11 - %T/chips/tmp102 - %T/chips/adxl345 - %T/lib/timer - %T/lib/serial - %T/lib/power -) ); - -@opts = qw( - -gcc=msp430-gcc - -mmcu=msp430x2617 - -fnesc-target=msp430 - -fnesc-no-debug - -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask -); diff --git a/tos/platforms/z1/ActiveMessageC.nc b/tos/platforms/z1/ActiveMessageC.nc deleted file mode 100644 index d38886e05d..0000000000 --- a/tos/platforms/z1/ActiveMessageC.nc +++ /dev/null @@ -1,80 +0,0 @@ -// $Id: ActiveMessageC.nc,v 1.8 2009/09/16 00:51:51 razvanm Exp $ - -/* - * "Copyright (c) 2004-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - * - * Copyright (c) 2004-2005 Intel Corporation - * All rights reserved. - * - * This file is distributed under the terms in the attached INTEL-LICENSE - * file. If you do not find these files, copies can be found by writing to - * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, - * 94704. Attention: Intel License Inquiry. - */ -/* - * - * Authors: Philip Levis - * Date last modified: $Id: ActiveMessageC.nc,v 1.8 2009/09/16 00:51:51 razvanm Exp $ - * - */ - -/** - * - * The Active Message layer on the Telos platform. This is a naming wrapper - * around the CC2420 Active Message layer. - * - * @author Philip Levis - * @version $Revision: 1.8 $ $Date: 2009/09/16 00:51:51 $ - */ -#include "Timer.h" - -configuration ActiveMessageC { - provides { - interface SplitControl; - - interface AMSend[am_id_t id]; - interface Receive[am_id_t id]; - interface Receive as Snoop[am_id_t id]; - - interface Packet; - interface AMPacket; - interface PacketAcknowledgements; - interface PacketTimeStamp as PacketTimeStamp32khz; - interface PacketTimeStamp as PacketTimeStampMilli; - interface LowPowerListening; - } -} -implementation { - components CC2420ActiveMessageC as AM; - - SplitControl = AM; - - AMSend = AM; - Receive = AM.Receive; - Snoop = AM.Snoop; - Packet = AM; - AMPacket = AM; - PacketAcknowledgements = AM; - LowPowerListening = AM; - - components CC2420PacketC; - PacketTimeStamp32khz = CC2420PacketC; - PacketTimeStampMilli = CC2420PacketC; -} diff --git a/tos/platforms/z1/DemoSensorC.nc b/tos/platforms/z1/DemoSensorC.nc deleted file mode 100644 index 9d6592ae7b..0000000000 --- a/tos/platforms/z1/DemoSensorC.nc +++ /dev/null @@ -1,25 +0,0 @@ -/** - * DemoSensorC is a generic sensor device that provides a 16-bit - * value. The platform author chooses which sensor actually sits - * behind DemoSensorC, and though it's probably Voltage, Light, or - * Temperature, there are no guarantees. - * - * This particular DemoSensorC on the z1 platform provides a - * voltage reading, using BatteryC. - * - * - * @author Jordi Soucheiron - * @version $Revision: 1.0 $ $Date: 2010/04/28 10:51:45 $ - * - */ - - -generic configuration DemoSensorC() -{ - provides interface Read; -} -implementation -{ - components new BatteryC() as DemoSensor; - Read = DemoSensor; -} diff --git a/tos/platforms/z1/HplUserButtonC.nc b/tos/platforms/z1/HplUserButtonC.nc deleted file mode 100644 index 3d7407fc4e..0000000000 --- a/tos/platforms/z1/HplUserButtonC.nc +++ /dev/null @@ -1,54 +0,0 @@ -/** - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Implementation of the user button for the telos platform - * - * @author Gilman Tolle - * @version $Revision: 1.1 $ - */ - -configuration HplUserButtonC { - provides interface GeneralIO; - provides interface GpioInterrupt; -} -implementation { - components HplMsp430GeneralIOC as GeneralIOC; - components HplMsp430InterruptC as InterruptC; - - components new Msp430GpioC() as UserButtonC; - UserButtonC -> GeneralIOC.Port25; - GeneralIO = UserButtonC; - - components new Msp430InterruptC() as InterruptUserButtonC; - InterruptUserButtonC.HplInterrupt -> InterruptC.Port25; - GpioInterrupt = InterruptUserButtonC.Interrupt; -} diff --git a/tos/platforms/z1/Ieee154MessageC.nc b/tos/platforms/z1/Ieee154MessageC.nc deleted file mode 100644 index 2099d1b13b..0000000000 --- a/tos/platforms/z1/Ieee154MessageC.nc +++ /dev/null @@ -1,60 +0,0 @@ -/* - * "Copyright (c) 2008 The Regents of the University of California. - * All rights reserved." - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - * - */ - - -/** - * - * @author Stephen Dawson-Haggerty - */ - -configuration Ieee154MessageC { - provides { - interface SplitControl; - - interface Resource as SendResource[uint8_t clientId]; - interface Ieee154Send; - interface Receive as Ieee154Receive; - - interface Ieee154Packet; - interface Packet; - - interface PacketAcknowledgements; - interface LinkPacketMetadata; - interface LowPowerListening; - interface PacketLink; - } - -} implementation { - components CC2420Ieee154MessageC as Msg; - - SplitControl = Msg; - SendResource = Msg; - Ieee154Send = Msg; - Ieee154Receive = Msg; - Ieee154Packet = Msg; - Packet = Msg; - - PacketAcknowledgements = Msg; - LinkPacketMetadata = Msg; - LowPowerListening = Msg; - PacketLink = Msg; -} diff --git a/tos/platforms/z1/LedsIntensity.nc b/tos/platforms/z1/LedsIntensity.nc deleted file mode 100644 index 9e2f93bdda..0000000000 --- a/tos/platforms/z1/LedsIntensity.nc +++ /dev/null @@ -1,5 +0,0 @@ -interface LedsIntensity -{ - command void set( uint8_t ledNum, uint8_t intensity ); - command void glow(uint8_t a, uint8_t b); -} diff --git a/tos/platforms/z1/LedsIntensityC.nc b/tos/platforms/z1/LedsIntensityC.nc deleted file mode 100644 index 9013330f30..0000000000 --- a/tos/platforms/z1/LedsIntensityC.nc +++ /dev/null @@ -1,15 +0,0 @@ -configuration LedsIntensityC -{ - provides interface StdControl; - provides interface LedsIntensity; -} -implementation -{ - components new LedsIntensityP(), LedsC, MainC; - - StdControl = LedsIntensityP; - LedsIntensity = LedsIntensityP; - - LedsIntensityP.Leds -> LedsC; - LedsIntensityP.Boot -> MainC; -} diff --git a/tos/platforms/z1/LedsIntensityP.nc b/tos/platforms/z1/LedsIntensityP.nc deleted file mode 100644 index 3dc9ba8bce..0000000000 --- a/tos/platforms/z1/LedsIntensityP.nc +++ /dev/null @@ -1,111 +0,0 @@ -generic module LedsIntensityP() { - provides interface StdControl; - provides interface LedsIntensity; - uses interface Leds; - uses interface Boot; -} -implementation -{ - enum - { - NUM_LEDS = 3, - NUM_INTENSITY = 32, - RESOLUTION = 128, - }; - - bool m_run; - int8_t m_intensity[NUM_LEDS]; - int8_t m_accum[NUM_LEDS]; - static const int8_t m_exp[NUM_INTENSITY] = { - 0, 0, 0, 1, 1, 1, 2, 2, 2, 3, 4, 5, 6, 7, 8, 9, - 11, 13, 16, 19, 22, 26, 30, 36, 42, 49, 58, 67, 79, 93, 108, 127, - }; - - - void wait(uint16_t t) { - for ( ; t > 0; t-- ); - } - - void longwait( uint16_t t ) { - for( ; t > 0; t-- ) - wait(0xa0); - } - - task void dimleds() - { - if( m_run ) - { - int i; - int ledval = 0; - for( i=NUM_LEDS-1; i>=0; i-- ) - { - ledval <<= 1; - if( (m_accum[i] += m_intensity[i]) >= 0 ) - { - m_accum[i] -= (RESOLUTION-1); - ledval |= 1; - } - } - call Leds.set( ledval ); - post dimleds(); - } - else - { - call Leds.set( 0 ); - } - } - - command void LedsIntensity.set( uint8_t ledNum, uint8_t intensity ) - { - if( ledNum < NUM_LEDS ) - { - intensity >>= 3; - if( intensity >= (NUM_INTENSITY-1) ) - { - m_intensity[ledNum] = m_exp[NUM_INTENSITY-1]; - m_accum[ledNum] = 0; - } - else - { - m_intensity[ledNum] = m_exp[intensity]; - if( m_intensity[ledNum] == 0 ) - m_accum[ledNum] = -1; - } - } - } - - command void LedsIntensity.glow(uint8_t a, uint8_t b) { - int i; - for (i = 1536; i > 0; i -= 4) { - call Leds.set(a); - longwait(i); - call Leds.set(b); - longwait(1536-i); - } - } - - - event void Boot.booted() - { - int i; - for( i=0; i - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ - */ - -configuration Msp430Timer32khzMapC -{ - provides interface Msp430Timer[ uint8_t id ]; - provides interface Msp430TimerControl[ uint8_t id ]; - provides interface Msp430Compare[ uint8_t id ]; -} -implementation -{ - components Msp430TimerC; - - Msp430Timer[0] = Msp430TimerC.TimerB; - Msp430TimerControl[0] = Msp430TimerC.ControlB0; - Msp430Compare[0] = Msp430TimerC.CompareB0; - - // Timer pin B1 is used by the CC2420 radio's SFD pin - // this is the only difference between the default 32khz map - // and the map on telos - - Msp430Timer[1] = Msp430TimerC.TimerB; - Msp430TimerControl[1] = Msp430TimerC.ControlB2; - Msp430Compare[1] = Msp430TimerC.CompareB2; - - Msp430Timer[2] = Msp430TimerC.TimerB; - Msp430TimerControl[2] = Msp430TimerC.ControlB3; - Msp430Compare[2] = Msp430TimerC.CompareB3; - - Msp430Timer[3] = Msp430TimerC.TimerB; - Msp430TimerControl[3] = Msp430TimerC.ControlB4; - Msp430Compare[3] = Msp430TimerC.CompareB4; - - Msp430Timer[4] = Msp430TimerC.TimerB; - Msp430TimerControl[4] = Msp430TimerC.ControlB5; - Msp430Compare[4] = Msp430TimerC.CompareB5; - - Msp430Timer[5] = Msp430TimerC.TimerB; - Msp430TimerControl[5] = Msp430TimerC.ControlB6; - Msp430Compare[5] = Msp430TimerC.CompareB6; -} - diff --git a/tos/platforms/z1/PlatformC.nc b/tos/platforms/z1/PlatformC.nc deleted file mode 100644 index 50f7c60f7f..0000000000 --- a/tos/platforms/z1/PlatformC.nc +++ /dev/null @@ -1,14 +0,0 @@ -#include "hardware.h" - -configuration PlatformC -{ - provides interface Init; -} -implementation -{ - components PlatformP, Msp430ClockC; - - Init = PlatformP; - PlatformP.Msp430ClockInit -> Msp430ClockC.Init; - -} diff --git a/tos/platforms/z1/PlatformLedsC.nc b/tos/platforms/z1/PlatformLedsC.nc deleted file mode 100644 index 746a9c2999..0000000000 --- a/tos/platforms/z1/PlatformLedsC.nc +++ /dev/null @@ -1,32 +0,0 @@ -#include "hardware.h" - -configuration PlatformLedsC { - provides interface GeneralIO as Led0; - provides interface GeneralIO as Led1; - provides interface GeneralIO as Led2; - uses interface Init; -} -implementation -{ - components - HplMsp430GeneralIOC as GeneralIOC - , new Msp430GpioC() as Led0Impl - , new Msp430GpioC() as Led1Impl - , new Msp430GpioC() as Led2Impl - ; - components PlatformP; - - Init = PlatformP.LedsInit; - - Led0 = Led0Impl; - //THIS IS FOR THE ZOLERTIA OR TMOTE, CHANGED FOR THE FET LED - //Led0Impl -> GeneralIOC.Port54; - Led0Impl -> GeneralIOC.Port54; - - Led1 = Led1Impl; - Led1Impl -> GeneralIOC.Port56; - - Led2 = Led2Impl; - Led2Impl -> GeneralIOC.Port55; - -} diff --git a/tos/platforms/z1/PlatformP.nc b/tos/platforms/z1/PlatformP.nc deleted file mode 100644 index 6fd27f44cb..0000000000 --- a/tos/platforms/z1/PlatformP.nc +++ /dev/null @@ -1,17 +0,0 @@ -#include "hardware.h" - -module PlatformP{ - provides interface Init; - uses interface Init as Msp430ClockInit; - uses interface Init as LedsInit; -} -implementation { - command error_t Init.init() { - call Msp430ClockInit.init(); - call LedsInit.init(); - return SUCCESS; - } - - default command error_t LedsInit.init() { return SUCCESS; } - -} diff --git a/tos/platforms/z1/PlatformSerialC.nc b/tos/platforms/z1/PlatformSerialC.nc deleted file mode 100644 index 9bac747b53..0000000000 --- a/tos/platforms/z1/PlatformSerialC.nc +++ /dev/null @@ -1,21 +0,0 @@ - -configuration PlatformSerialC { - - provides interface StdControl; - provides interface UartStream; - provides interface UartByte; - -} - -implementation { - - components new Msp430Uart0C() as UartC; - UartStream = UartC; - UartByte = UartC; - - components Z1SerialP; - StdControl = Z1SerialP; - Z1SerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure; - Z1SerialP.Resource -> UartC.Resource; - -} diff --git a/tos/platforms/z1/SwitchToggleC.nc b/tos/platforms/z1/SwitchToggleC.nc deleted file mode 100644 index 02762e64ca..0000000000 --- a/tos/platforms/z1/SwitchToggleC.nc +++ /dev/null @@ -1,91 +0,0 @@ -/** - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Generic layer to translate a GIO into a toggle switch - * - * @author Gilman Tolle - * @version $Revision: 1.1 $ - */ - -#include - -generic module SwitchToggleC() { - provides interface Get; - provides interface Notify; - - uses interface GeneralIO; - uses interface GpioInterrupt; -} -implementation { - norace bool m_pinHigh; - - task void sendEvent(); - - command bool Get.get() { return call GeneralIO.get(); } - - command error_t Notify.enable() { - call GeneralIO.makeInput(); - - if ( call GeneralIO.get() ) { - m_pinHigh = TRUE; - return call GpioInterrupt.enableFallingEdge(); - } else { - m_pinHigh = FALSE; - return call GpioInterrupt.enableRisingEdge(); - } - } - - command error_t Notify.disable() { - return call GpioInterrupt.disable(); - } - - async event void GpioInterrupt.fired() { - call GpioInterrupt.disable(); - - m_pinHigh = !m_pinHigh; - - post sendEvent(); - } - - task void sendEvent() { - bool pinHigh; - pinHigh = m_pinHigh; - - signal Notify.notify( pinHigh ); - - if ( pinHigh ) { - call GpioInterrupt.enableFallingEdge(); - } else { - call GpioInterrupt.enableRisingEdge(); - } - } -} diff --git a/tos/platforms/z1/UserButton.h b/tos/platforms/z1/UserButton.h deleted file mode 100644 index 726d14d762..0000000000 --- a/tos/platforms/z1/UserButton.h +++ /dev/null @@ -1,44 +0,0 @@ -/** - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Implementation of the user button for the telosb platform - * - * @author Gilman Tolle - * @version $Revision: 1.1 $ - */ - -#ifndef USERBUTTON_H -#define USERBUTTON_H - -typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t; - -#endif diff --git a/tos/platforms/z1/UserButtonC.nc b/tos/platforms/z1/UserButtonC.nc deleted file mode 100644 index f3b21c9690..0000000000 --- a/tos/platforms/z1/UserButtonC.nc +++ /dev/null @@ -1,63 +0,0 @@ -/** - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Implementation of the user button for the telosb platform. Get - * returns the current state of the button by reading the pin, - * regardless of whether enable() or disable() has been called on the - * Interface. Notify.enable() and Notify.disable() modify the - * underlying interrupt state of the pin, and have the effect of - * enabling or disabling notifications that the button has changed - * state. - * - * @author Gilman Tolle - * @version $Revision: 1.1 $ - */ - -#include - -configuration UserButtonC { - provides interface Get; - provides interface Notify; -} -implementation { - components HplUserButtonC; - components new SwitchToggleC(); - SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt; - SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO; - - components UserButtonP; - Get = UserButtonP; - Notify = UserButtonP; - - UserButtonP.GetLower -> SwitchToggleC.Get; - UserButtonP.NotifyLower -> SwitchToggleC.Notify; -} diff --git a/tos/platforms/z1/UserButtonP.nc b/tos/platforms/z1/UserButtonP.nc deleted file mode 100644 index b6523dd1f8..0000000000 --- a/tos/platforms/z1/UserButtonP.nc +++ /dev/null @@ -1,77 +0,0 @@ -/** - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Implementation of the user button for the telosb platform - * - * @author Gilman Tolle - * @version $Revision: 1.2 $ - */ - -#include - -module UserButtonP { - provides interface Get; - provides interface Notify; - - uses interface Get as GetLower; - uses interface Notify as NotifyLower; -} -implementation { - - command button_state_t Get.get() { - // telosb user button pin is high when released - invert state - if ( call GetLower.get() ) { - return BUTTON_RELEASED; - } else { - return BUTTON_PRESSED; - } - } - - command error_t Notify.enable() { - return call NotifyLower.enable(); - } - - command error_t Notify.disable() { - return call NotifyLower.disable(); - } - - event void NotifyLower.notify( bool val ) { - // telosb user button pin is high when released - invert state - if ( val ) { - signal Notify.notify( BUTTON_RELEASED ); - } else { - signal Notify.notify( BUTTON_PRESSED ); - } - } - - default event void Notify.notify( button_state_t val ) { } -} diff --git a/tos/platforms/z1/chips/adxl345/HplADXL345C.nc b/tos/platforms/z1/chips/adxl345/HplADXL345C.nc deleted file mode 100644 index 1e46ad1a30..0000000000 --- a/tos/platforms/z1/chips/adxl345/HplADXL345C.nc +++ /dev/null @@ -1,28 +0,0 @@ -configuration HplADXL345C { - provides interface GeneralIO as GeneralIO1; - provides interface GeneralIO as GeneralIO2; - provides interface GpioInterrupt as GpioInterrupt1; - provides interface GpioInterrupt as GpioInterrupt2; -} -implementation { - components HplMsp430GeneralIOC as GeneralIOC; - components HplMsp430InterruptC as InterruptC; - - components new Msp430GpioC() as ADXL345Int1C; - ADXL345Int1C -> GeneralIOC.Port16; - GeneralIO1 = ADXL345Int1C; - - components new Msp430GpioC() as ADXL345Int2C; - ADXL345Int2C -> GeneralIOC.Port17; - GeneralIO2 = ADXL345Int2C; - - components new Msp430InterruptC() as InterruptAccel1C; - InterruptAccel1C.HplInterrupt -> InterruptC.Port16; - GpioInterrupt1 = InterruptAccel1C.Interrupt; - - components new Msp430InterruptC() as InterruptAccel2C; - InterruptAccel2C.HplInterrupt -> InterruptC.Port17; - GpioInterrupt2 = InterruptAccel2C.Interrupt; - - -} \ No newline at end of file diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc deleted file mode 100644 index b5f2c7018f..0000000000 --- a/tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HPL implementation of 32khz alarms for the ChipCon CC2420 radio - * connected to a TI MSP430 processor. - * - * @author Jonathan Hui - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ - */ - -generic configuration HplCC2420AlarmC() { - - provides interface Init; - provides interface Alarm as Alarm32khz32; - -} - -implementation { - - components new Alarm32khz32C(); - - Init = Alarm32khz32C; - Alarm32khz32 = Alarm32khz32C; - -} diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc deleted file mode 100644 index c14de18e78..0000000000 --- a/tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HPL implementation of interrupts and captures for the ChipCon - * CC2420 radio connected to a TI MSP430 processor. - * - * @author Jonathan Hui - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ - */ - -configuration HplCC2420InterruptsC { - - provides interface GpioCapture as CaptureSFD; - provides interface GpioInterrupt as InterruptCCA; - provides interface GpioInterrupt as InterruptFIFOP; - -} - -implementation { - - components HplMsp430GeneralIOC as GeneralIOC; - components Msp430TimerC; - components new GpioCaptureC() as CaptureSFDC; - CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlB1; - CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureB1; - CaptureSFDC.GeneralIO -> GeneralIOC.Port41; - - components HplMsp430InterruptC; - components new Msp430InterruptC() as InterruptCCAC; - components new Msp430InterruptC() as InterruptFIFOPC; - InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port14; - InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port12; - - CaptureSFD = CaptureSFDC.Capture; - InterruptCCA = InterruptCCAC.Interrupt; - InterruptFIFOP = InterruptFIFOPC.Interrupt; - -} diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc deleted file mode 100644 index 27aec88b4f..0000000000 --- a/tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HPL implementation of general-purpose I/O for the ChipCon CC2420 - * radio connected to a TI MSP430 processor. - * - * @author Jonathan Hui - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ - */ - -configuration HplCC2420PinsC { - - provides interface GeneralIO as CCA; - provides interface GeneralIO as CSN; - provides interface GeneralIO as FIFO; - provides interface GeneralIO as FIFOP; - provides interface GeneralIO as RSTN; - provides interface GeneralIO as SFD; - provides interface GeneralIO as VREN; - -} - -implementation { - - components HplMsp430GeneralIOC as GeneralIOC; - components new Msp430GpioC() as CCAM; - components new Msp430GpioC() as CSNM; - components new Msp430GpioC() as FIFOM; - components new Msp430GpioC() as FIFOPM; - components new Msp430GpioC() as RSTNM; - components new Msp430GpioC() as SFDM; - components new Msp430GpioC() as VRENM; - -/* Zoul - CCAM -> GeneralIOC.Port14; - CSNM -> GeneralIOC.Port42; - FIFOM -> GeneralIOC.Port13; - FIFOPM -> GeneralIOC.Port10; - RSTNM -> GeneralIOC.Port46; - SFDM -> GeneralIOC.Port41; - VRENM -> GeneralIOC.Port45; -*/ -// Z1 - CCAM -> GeneralIOC.Port14; - CSNM -> GeneralIOC.Port30; - FIFOM -> GeneralIOC.Port13; - FIFOPM -> GeneralIOC.Port12; - RSTNM -> GeneralIOC.Port46; - SFDM -> GeneralIOC.Port41; - VRENM -> GeneralIOC.Port45; - - - CCA = CCAM; - CSN = CSNM; - FIFO = FIFOM; - FIFOP = FIFOPM; - RSTN = RSTNM; - SFD = SFDM; - VREN = VRENM; - -} - diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc deleted file mode 100644 index 3ab6e0b775..0000000000 --- a/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HPL implementation of the SPI bus for the ChipCon CC2420 radio - * connected to a TI MSP430 processor. - * - * @author Jonathan Hui - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ - */ - -generic configuration HplCC2420SpiC() { - - provides interface Resource; - provides interface SpiByte; - provides interface SpiPacket; - -} - -implementation { - - components new Msp430SpiB0C() as SpiC; - - Resource = SpiC; - SpiByte = SpiC; - SpiPacket = SpiC; - -} - diff --git a/tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc b/tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc deleted file mode 100644 index 6141df89d9..0000000000 --- a/tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc +++ /dev/null @@ -1,17 +0,0 @@ -generic configuration BatteryC() { - provides interface DeviceMetadata; - provides interface Read; - provides interface ReadStream; -} -implementation { - components new AdcReadClientC(); - Read = AdcReadClientC; - - components new AdcReadStreamClientC(); - ReadStream = AdcReadStreamClientC; - - components BatteryP; - DeviceMetadata = BatteryP; - AdcReadClientC.AdcConfigure -> BatteryP; - AdcReadStreamClientC.AdcConfigure -> BatteryP; -} diff --git a/tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc b/tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc deleted file mode 100644 index 7288e81fe2..0000000000 --- a/tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc +++ /dev/null @@ -1,26 +0,0 @@ -#include "Msp430Adc12.h" - - -module BatteryP { - provides interface DeviceMetadata; - provides interface AdcConfigure; -} -implementation { - - msp430adc12_channel_config_t config = { - inch: SUPPLY_VOLTAGE_HALF_CHANNEL, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_1_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - command uint8_t DeviceMetadata.getSignificantBits() { return 12; } - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() { - return &config; - } -} diff --git a/tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc b/tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc deleted file mode 100644 index f38612dfc0..0000000000 --- a/tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc +++ /dev/null @@ -1,96 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -configuration Msp430I2C1P { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[uint8_t id ]; - provides interface I2CPacket as I2CBasicAddr; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430I2CConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as Interrupts; - -} - -implementation { - - components new Msp430I2CP() as I2CP; - components new Z1UsciP() as Z1UsciP; - Resource = I2CP.Resource; - ResourceConfigure = I2CP.ResourceConfigure; - Msp430I2CConfigure = I2CP.Msp430I2CConfigure; - I2CP.Msp430I2CConfigure -> Z1UsciP.Msp430I2CConfigure; - I2CBasicAddr = I2CP.I2CBasicAddr; - UsciResource = I2CP.UsciResource; - Interrupts = I2CP.Interrupts; - - components HplMsp430UsciB1C as UsciC; - I2CP.UsciB -> UsciC; - -} diff --git a/tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc b/tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc deleted file mode 100644 index 1ef041fe9c..0000000000 --- a/tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc +++ /dev/null @@ -1,101 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the DEXMA SENSORS SL nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - /** - * Copyright (c) 2005-2006 Arched Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Jonathan Hui - * @author Xavier Orduna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ - */ - -configuration Msp430SpiNoDmaB0P { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; - -} - -implementation { - - components new Msp430SpiNoDmaBP() as SpiP; - components new Z1UsciP() as Z1UsciP; - Resource = SpiP.Resource; - ResourceConfigure = SpiP.ResourceConfigure; - Msp430SpiConfigure = SpiP.Msp430SpiConfigure; - SpiP.Msp430SpiConfigure -> Z1UsciP.Msp430SpiConfigure; - SpiByte = SpiP.SpiByte; - SpiPacket = SpiP.SpiPacket; - UsciResource = SpiP.UsciResource; - UsciInterrupts = SpiP.UsciInterrupts; - - components HplMsp430UsciB0C as UsciC; - SpiP.Usci -> UsciC; - - components LedsC as Leds; - SpiP.Leds -> Leds; - -} diff --git a/tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc b/tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc deleted file mode 100644 index 41a9cd2bff..0000000000 --- a/tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc +++ /dev/null @@ -1,29 +0,0 @@ -module Z1SerialP { - provides interface StdControl; - provides interface Msp430UartConfigure; - uses interface Resource; -} -implementation { - - msp430_uart_union_config_t msp430_uart_z1_config = { { - ubr: UBR_8MHZ_115200, - umctl: UMCTL_8MHZ_115200, - ucssel: 2, - } }; - -//, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1 - - command error_t StdControl.start(){ - return call Resource.immediateRequest(); - } - command error_t StdControl.stop(){ - call Resource.release(); - return SUCCESS; - } - event void Resource.granted(){} - - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { - return &msp430_uart_z1_config; - } - -} diff --git a/tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc b/tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc deleted file mode 100644 index 3bbac9b2e3..0000000000 --- a/tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc +++ /dev/null @@ -1,39 +0,0 @@ -generic module Z1UsciP() { - provides interface Msp430SpiConfigure[ uint8_t id ]; - provides interface Msp430I2CConfigure[ uint8_t id ]; -} -implementation { - - msp430_spi_union_config_t msp430_spi_z1_config = { { - ubr : 2, /* smclk/2 */ - ucmode : 0, /* 3 pin master, no ste */ - ucmst : 1, - uc7bit : 0, /* 8 bit */ - ucmsb : 1, /* msb first, compatible with msp430 usart */ - ucckpl : 1, /* inactive state low */ - ucckph : 0, /* data captured on rising, changed falling */ - ucssel : 2, /* smclk */ - } }; - - async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { - return (msp430_spi_union_config_t*) &msp430_spi_z1_config; - } - - msp430_i2c_union_config_t msp430_i2c_z1_config = { { - ucmode : 3, /* i2c mode */ - ucmst : 1, /* master */ - ucmm : 0, /* single master */ - ucsla10 : 0, /* 7 bit slave */ - uca10 : 0, /* 7 bit us */ - uctr : 0, /* rx mode to start */ - ucssel : 2, /* smclk */ - i2coa : 1, /* our address is 1 */ - ucgcen : 1, /* respond to general call */ - ubr : 800, /* smclk/2 */ - } }; - - async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { - return (msp430_i2c_union_config_t *) &msp430_i2c_z1_config; - } - -} diff --git a/tos/platforms/z1/chips/msp430X/usci/printfZ1.h b/tos/platforms/z1/chips/msp430X/usci/printfZ1.h deleted file mode 100644 index 434e07f2c4..0000000000 --- a/tos/platforms/z1/chips/msp430X/usci/printfZ1.h +++ /dev/null @@ -1,396 +0,0 @@ -/* - * "Copyright (c) 2008 The Regents of the University of California. - * All rights reserved." - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - * - */ -/* - * Copyright (c) 2005 - * The President and Fellows of Harvard College. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Writes printf like output to the UART. - * This works only on the AVR and MSP430 Microcontrollers! - *

- * Note: For AVR we explicitly place the print statements in ROM; for - * MSP430 this is done by default! For AVR, if we don't place it - * explicitely in ROM, the statements will go in RAM, which will - * quickly cause a descent size program to run out of RAM. By default - * it doesn't disable the interupts; disabling the interupts when - * writing to the UART, slows down/makes the mote quite unresponsive, - * and can lead to problems! If you wish to disable all printfs to - * the UART, then comment the flag: PRINTFUART_ENABLED. - - * 

- * How to use:
- *   // (0) In your Makefile, define PRINTFUART_ENABLED
- *   CFLAGS += -DPRINTFUART_ENABLED
- *   // (1) Call printfUART_init() from your initialization function 
- *   //     to initialize the UART
- *   printfUART_init();
- *   // (2) Set your UART client to the correct baud rate.  Look at 
- *   //     the comments in printfUART_init(), to figure out what 
- *   //     baud to use for your particular mote
- *
- *   // (3) Send printf statements like this:
- *   printfUART("Hello World, we are in year= %u\n", 2004);
- *   printfUART("Printing uint32_t variable, value= %lu\n", 4294967295);
- *
- * Examples and caveats:
- *   // (1) - Must use curly braces in single section statements.  
- *            (Look in the app.c to see why -- hint: it's a macro)
- *   if (x < 3)
- *       {printfUART("The value of x is %i\n", x);}
- *   // (2) - Otherwise it more or less works like regular printf
- *   printfUART("\nThe value of x=%u, and y=%u\n", x, y); 
- *
- * 
URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack
- * @author Konrad Lorincz - * @version 2.0, January 5, 2005 - */ -#ifndef PRINTFZ1_H -#define PRINTFZ1_H -#ifndef PRINTFUART_H -#define PRINTFUART_H -#include -#include - -#warning including printfZ1 - -// ------------------------------------------------------------------- -#ifdef PRINTFUART_ENABLED - #define DEBUGBUF_SIZE 256 - char debugbuf[DEBUGBUF_SIZE]; - char debugbufROMtoRAM[DEBUGBUF_SIZE]; - - #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) - #define printfUART(__format...) { \ - static const char strROM[] PROGMEM = __format; \ - strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM); \ - sprintf(debugbuf, debugbufROMtoRAM); \ - writedebug(); \ - } - #else // assume MSP430 architecture (e.g. TelosA, TelosB, etc.) - #define printfUART(__format...) { \ - sprintf(debugbuf, __format); \ - writedebug(); \ - } - #define printfz1(__format...) { \ - snprintf(debugbuf,DEBUGBUF_SIZE, __format); \ - writedebug(); \ - } - #endif -#else - #define printfz1(X, args...) dbg("printf", X, ## args) - #define printfUART(X, args...) dbg("printf", X, ## args) -// #define printfUART(__format...) {} - void printfz1_init() {} - void printfUART_init() {} -#endif - -#define NOprintfUART(__format...) - - -// ------------------------------------------------------------------- -#ifdef PRINTFUART_ENABLED - -/** - * Initialize the UART port. Call this from your startup routine. - */ -#define printfz1_init() {atomic printfUART_init_private();} -#define printfUART_init() {atomic printfUART_init_private();} -void printfUART_init_private() -{ - #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) - // 56K baud - outp(0,UBRR0H); - outp(15, UBRR0L); //set baud rate - outp((1< = STDRXD = ALT2(in) - GPIO<47> = STDTXD = ALT1(out) - *********/ - //atomic{ - - //configure the GPIO Alt functions and directions - _GPIO_setaltfn(46,2); // STD_RXD - _GPIO_setaltfn(47,1); // STD_TXD - - _GPDR(46) &= ~_GPIO_bit(46); // input - _GPDR(47) |= _GPIO_bit(47); // output - - STLCR |=LCR_DLAB; //turn on DLAB so we can change the divisor - STDLL = 8; //configure to 115200; - STDLH = 0; - STLCR &= ~(LCR_DLAB); //turn off DLAB - - STLCR |= 0x3; //configure to 8 bits - - STMCR &= ~MCR_LOOP; - STMCR |= MCR_OUT2; - STIER |= IER_RAVIE; - STIER |= IER_TIE; - STIER |= IER_UUE; //enable the UART - - //STMCR |= MCR_AFE; //Auto flow control enabled; - //STMCR |= MCR_RTS; - - STFCR |= FCR_TRFIFOE; //enable the fifos - -// call Interrupt.allocate(); -// call Interrupt.enable(); - //configure all the interrupt stuff - //make sure that the interrupt causes an IRQ not an FIQ - // __REG(0x40D00008) &= ~(1<<21); - //configure the priority as IPR1 - //__REG(0x40D00020) = (1<<31 | 21); - //unmask the interrupt - //__REG(0x40D00004) |= (1<<21); - - CKEN |= CKEN5_STUART; //enable the UART's clk - #else - #if defined(PLATFORM_Z1) - P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD - UCA0CTL1 |= UCSSEL_2; // CLK = ACLK - UCA0BR0 = 0x45; // 32kHz/9600 = 3.41 - UCA0BR1 = 0x00; // - UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 - UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** - - #else // assume TelosA, TelosB, etc. - // Variabel baud - // To change the baud rate, see /tos/platform/msp430/msp430baudrates.h - uint8_t source = SSEL_SMCLK; - uint16_t baudrate = 0x0012; // UBR_SMCLK_57600=0x0012 - uint8_t mctl = 0x84; // UMCTL_SMCLK_57600=0x84 - //uint16_t baudrate = 0x0009; // UBR_SMCLK_115200=0x0009 - //uint8_t mctl = 0x10; // UMCTL_SMCLK_115200=0x10 - - - uint16_t l_br = 0; - uint8_t l_mctl = 0; - uint8_t l_ssel = 0; - - TOSH_SEL_UTXD1_MODFUNC(); - TOSH_SEL_URXD1_MODFUNC(); - - - UCTL1 = SWRST; - UCTL1 |= CHAR; // 8-bit char, UART-mode - - U1RCTL &= ~URXEIE; // even erroneous characters trigger interrupts - - UCTL1 = SWRST; - UCTL1 |= CHAR; // 8-bit char, UART-mode - - if (l_ssel & 0x80) { - U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); - U1TCTL |= (l_ssel & 0x7F); - } - else { - U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); - U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz - } - - if ((l_mctl != 0) || (l_br != 0)) { - U1BR0 = l_br & 0x0FF; - U1BR1 = (l_br >> 8) & 0x0FF; - U1MCTL = l_mctl; - } - else { - U1BR0 = 0x03; // 9600 baud - U1BR1 = 0x00; - U1MCTL = 0x4A; - } - - ME2 &= ~USPIE1; // USART1 SPI module disable - ME2 |= (UTXE1 | URXE1); // USART1 UART module enable - - U1CTL &= ~SWRST; - - IFG2 &= ~(UTXIFG1 | URXIFG1); - IE2 &= ~(UTXIE1 | URXIE1); // interrupt disabled - - - - //async command void USARTControl.setClockSource(uint8_t source) { - // atomic { - l_ssel = source | 0x80; - U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); - U1TCTL |= (l_ssel & 0x7F); - // } - //} - //async command void USARTControl.setClockRate(uint16_t baudrate, uint8_t mctl) { - //atomic { - l_br = baudrate; - l_mctl = mctl; - U1BR0 = baudrate & 0x0FF; - U1BR1 = (baudrate >> 8) & 0x0FF; - U1MCTL = mctl; - //} - //} - - //async command result_t USARTControl.enableRxIntr(){ - //atomic { - IFG2 &= ~URXIFG1; - IE2 |= URXIE1; - //} - //return SUCCESS; - //} - - //async command result_t USARTControl.enableTxIntr(){ - //atomic { - IFG2 &= ~UTXIFG1; - IE2 |= UTXIE1; - //} - //return SUCCESS; - //} - - #endif - #endif - #endif - #endif -} - -#if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) -#else -#if defined(PLATFORM_IMOTE2) -#else -#if defined(PLATFORM_Z1) -#else // assume AVR architecture (e.g. TelosA, TelosB) - bool isTxIntrPending() - { - if (U1TCTL & TXEPT) { - return TRUE; - } - return FALSE; - } -#endif -#endif -#endif - -/** - * Outputs a char to the UART. - */ -void UARTPutChar(char c) -{ - if (c == '\n') - UARTPutChar('\r'); - - - #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) - loop_until_bit_is_set(UCSR0A, UDRE); - outb(UDR0,c); - - #else - #if defined(PLATFORM_IMOTE2) - STTHR = c; - #else - #if defined(PLATFORM_Z1) - while (!(IFG2&UCA0TXIFG)); - atomic UCA0TXBUF = c; - - #else // assume AVR architecture (e.g. TelosA, TelosB) - U1TXBUF = c; - while( !isTxIntrPending() ) - continue; - #endif - #endif - #endif -} - -/** - * Outputs the entire debugbuf to the UART, or until it encounters '\0'. - */ -void writedebug() -{ - uint16_t i = 0; - - while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE) - UARTPutChar(debugbuf[i++]); -} - -#endif // PRINTFUART_ENABLED -// ------------------------------------------------------------------- - -#if 0 -// -------------------------------------------------------------- -#define assertUART(x) if (!(x)) { __assertUART(__FILE__, __LINE__); } -void __assertUART(const char* file, int line) -{ - printfUART("ASSERT FAILED: file= %s, lineNbr= %i\n", file, line); - // for some reason, CLR means on - TOSH_MAKE_RED_LED_OUTPUT(); - TOSH_MAKE_YELLOW_LED_OUTPUT(); - TOSH_MAKE_GREEN_LED_OUTPUT(); - TOSH_CLR_RED_LED_PIN(); - TOSH_CLR_YELLOW_LED_PIN(); - TOSH_CLR_GREEN_LED_PIN(); - exit(1); -} -// -------------------------------------------------------------- -#endif - -#endif // PRINTFUART_H -#endif // PRINTFZ1_H - diff --git a/tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc b/tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc deleted file mode 100644 index e9da3ccef5..0000000000 --- a/tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HPL implementation of general-purpose I/O for a ST M25P chip - * connected to a TI MSP430. - * - * @author Jonathan Hui - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $ - */ - -configuration HplStm25pPinsC { - - provides interface GeneralIO as CSN; - provides interface GeneralIO as Hold; - -} - -implementation { - - components HplMsp430GeneralIOC as HplGeneralIOC; - components new Msp430GpioC() as CSNM; - components new Msp430GpioC() as HoldM; - - CSNM -> HplGeneralIOC.Port44; - HoldM -> HplGeneralIOC.Port57; - - CSN = CSNM; - Hold = HoldM; - -} diff --git a/tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc b/tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc deleted file mode 100644 index 4d43aa2f26..0000000000 --- a/tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HPL implementation of the Spi bus for a ST M25P chip connected to a - * TI MSP430. - * - * @author Jonathan Hui - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $ - */ - -configuration HplStm25pSpiC { - - provides interface Resource; - provides interface SpiByte; - provides interface SpiPacket; - -} - -implementation { - - components new Msp430SpiB0C() as SpiC; - Resource = SpiC; - SpiByte = SpiC; - SpiPacket = SpiC; - -} diff --git a/tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc b/tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc deleted file mode 100644 index 8437010864..0000000000 --- a/tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HalTMP175Advanced is the HAL control interface for the TI TMP175 - * Digital Temperature Sensor. - * - * @author Phil Buonadonna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ - */ - -#include "TMP102.h" - -interface HalTMP102Advanced { - - command error_t setThermostatMode(bool useInt); - event void setThermostatModeDone(error_t error); - command error_t setPolarity(bool polarity); - event void setPolarityDone(error_t error); - command error_t setFaultQueue(tmp102_fqd_t depth); - event void setFaultQueueDone(error_t error); - command error_t setTLow(uint16_t val); - event void setTLowDone(error_t error); - command error_t setTHigh(uint16_t val); - event void setTHighDone(error_t error); - - //it is not possible to configure sensor resolution - - - event void alertThreshold(); - - /* We must include following modes for TMP102 */ - //conversion rate - //extended mode - command error_t setExtendedMode(bool extendedmode); - event void setExtendedModeDone(error_t error); - command error_t setConversionRate(tmp102_cr_t rate); - event void setConversionRateDone(error_t error); - - -} diff --git a/tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc b/tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc deleted file mode 100644 index 3d437df62d..0000000000 --- a/tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc +++ /dev/null @@ -1,277 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HalTMP175ControlP device specific Hal interfaces for the TI TMP175 Chip. - * - * Note that only the data path uses split phase resource arbitration - * - * @author Phil Buonadonna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ - */ - -module HalTMP102ControlP -{ - provides interface HalTMP102Advanced; - - uses interface HplTMP102; - uses interface Resource as TMP102Resource; -} - -implementation { - - enum { - STATE_SET_MODE, - STATE_SET_POLARITY, - STATE_SET_FQ, - STATE_SET_CR, - STATE_SET_EM - STATE_NONE, - - STATE_SET_TLOW, - STATE_SET_THIGH, - }; - - uint8_t mState = STATE_NONE; - uint8_t mConfigRegVal = 0; - error_t mHplError; - - task void complete_Alert() { - signal HalTMP102Advanced.alertThreshold(); - } - - static error_t setCfg(uint8_t nextState, uint32_t val) { - error_t error; - - mState = nextState; - - error = call HplTMP102.setConfigReg(val); - - if (error) { - call TMP102Resource.release(); - } - else { - mConfigRegVal = val; - } - - return error; - } - - static error_t setThresh(uint8_t nextState, uint32_t val) { - error_t error; - - mState = nextState; - - if(mState == STATE_SET_TLOW) - error = call HplTMP102.setTLowReg(val << 4); - else - error = call HplTMP102.setTHighReg(val << 4); - - if (error) { - call TMP102Resource.release(); - } - - return error; - } - - command error_t HalTMP102Advanced.setThermostatMode(bool useInt) { - error_t error; - uint8_t newRegVal; - - error = call TMP102Resource.immediateRequest(); - if (error) { - return error; - } - - newRegVal = (useInt) ? (mConfigRegVal | TMP102_CFG_TM) : (mConfigRegVal & ~TMP102_CFG_TM); - error = setCfg(STATE_SET_MODE, newRegVal); - - return error; - } - - - command error_t HalTMP175Advanced.setPolarity(bool polarity) { - error_t error; - uint8_t newRegVal; - - error = call TMP102Resource.immediateRequest(); - if (error) { - return error; - } - - newRegVal = (polarity) ? (mConfigRegVal | TMP102_CFG_POL) : (mConfigRegVal & ~TMP102_CFG_POL); - error = setCfg(STATE_SET_POLARITY, newRegVal); - - return error; - } - - command error_t HalTMP175Advanced.setFaultQueue(tmp102_fqd_t depth) { - error_t error; - uint8_t newRegVal; - - if ((uint8_t)depth > 3) { - error = EINVAL; - return error; - } - - error = call TMP102Resource.immediateRequest(); - if (error) { - return error; - } - - newRegVal = (mConfigRegVal & ~TMP102_CFG_FQ(3)) | (TMP102_CFG_FQ(depth)); - error = setCfg(STATE_SET_FQ, newRegVal); - - return error; - } - - command error_t HalTMP102Advanced.setTLow(uint16_t val) { - error_t error; - - error = call TMP102Resource.immediateRequest(); - if (error) { - return error; - } - - error = setThresh(STATE_SET_TLOW, val); - - if (error) { - call TMP102Resource.release(); - } - - return error; - } - - command error_t HalTMP102Advanced.setTHigh(uint16_t val) { - error_t error; - - error = call TMP102Resource.immediateRequest(); - if (error) { - return error; - } - - error = setThresh(STATE_SET_THIGH, val); - - if (error) { - call TMP102Resource.release(); - } - - return error; - } - - task void handleConfigReg() { - error_t lasterror; - atomic lasterror = mHplError; - call TMP102Resource.release(); - switch (mState) { - case STATE_SET_MODE: - mState = STATE_NONE; - signal HalTMP102Advanced.setThermostatModeDone(lasterror); - break; - case STATE_SET_POLARITY: - mState = STATE_NONE; - signal HalTMP102Advanced.setPolarityDone(lasterror); - break; - case STATE_SET_FQ: - mState = STATE_NONE; - signal HalTMP102Advanced.setFaultQueueDone(lasterror); - break; - case STATE_SET_RES: - mState = STATE_NONE; - signal HalTMP102Advanced.setResolutionDone(lasterror); - break; - default: - break; - } - //mState = STATE_NONE; - return; - } - - task void handleTReg() { - error_t lasterror; - atomic lasterror = mHplError; - call TMP102Resource.release(); - switch (mState) { - case STATE_SET_TLOW: - mState = STATE_NONE; - signal HalTMP102Advanced.setTLowDone(lasterror); - break; - case STATE_SET_THIGH: - mState = STATE_NONE; - signal HalTMP102Advanced.setTHighDone(lasterror); - break; - default: - mState = STATE_NONE; - break; - } - //mState = STATE_NONE; - } - - event void TMP102Resource.granted() { - // intentionally left blank - } - - async event void HplTMP102.setConfigRegDone(error_t error) { - mHplError = error; - post handleConfigReg(); - return; - } - - async event void HplTMP102.setTLowRegDone(error_t error) { - mHplError = error; - post handleTReg(); - - } - - async event void HplTMP102.setTHighRegDone(error_t error) { - mHplError = error; - post handleTReg(); - } - - async event void HplTMP102.alertThreshold() { - post complete_Alert(); - } - - async event void HplTMP102.measureTemperatureDone(error_t error, uint16_t val) { - // intentionally left blank - } - - default event void HalTMP102Advanced.setTHighDone(error_t error) { return; } - default event void HalTMP102Advanced.setThermostatModeDone(error_t error){ return; } - default event void HalTMP102Advanced.setPolarityDone(error_t error){ return; } - default event void HalTMP102Advanced.setFaultQueueDone(error_t error){ return; } - default event void HalTMP102Advanced.setResolutionDone(error_t error){ return; } - default event void HalTMP102Advanced.setTLowDone(error_t error){ return; } - default event void HalTMP102Advanced.alertThreshold(){ return; } - - //we must include other functions for tmp102. - -} diff --git a/tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc b/tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc deleted file mode 100644 index 1863d0cfd6..0000000000 --- a/tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HalTMP102ReaderP provides the service level HIL and device - * specific Hal interfaces for the TI TMP102 Chip. - * - * Note that only the data path uses split phase resource arbitration - * - * @author Phil Buonadonna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ - */ - -generic module HalTMP102ReaderP() -{ - provides interface Read as Temperature; - - uses interface HplTMP102; - uses interface Resource as TMP102Resource; -} - -implementation { - - enum { - STATE_SET_MODE, - STATE_SET_POLARITY, - STATE_SET_FQ, - STATE_SET_CR, - STATE_SET_EM, - STATE_NONE - }; - - uint8_t mState = STATE_NONE; - uint8_t mConfigRegVal = 0; - error_t mHplError; - - command error_t Temperature.read() { - return call TMP102Resource.request(); - } - - event void TMP102Resource.granted() { - error_t error; - - error = call HplTMP102.measureTemperature(); - if (error) { - call TMP102Resource.release(); - signal Temperature.readDone(error,0); - } - return; - } - - async event void HplTMP102.measureTemperatureDone(error_t tmp102_error, uint16_t val) { - call TMP102Resource.release(); - signal Temperature.readDone(tmp102_error,(val >> 4)); - return; - } - - // intentionally left empty - async event void HplTMP102.setTLowRegDone(error_t error) {} - async event void HplTMP102.setTHighRegDone(error_t error) {} - async event void HplTMP102.setConfigRegDone(error_t error) {} - async event void HplTMP102.alertThreshold() {} - - default event void Temperature.readDone(error_t error, uint16_t val) {return ;} - -} diff --git a/tos/platforms/z1/chips/tmp102/HplTMP102.nc b/tos/platforms/z1/chips/tmp102/HplTMP102.nc deleted file mode 100644 index bfa3d5c9a4..0000000000 --- a/tos/platforms/z1/chips/tmp102/HplTMP102.nc +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HplTMP102 is the HPL inteface to the Texas Instrument TMP102 - * Digital Temperature Sensor. - * - * @author Phil Buonadonna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ - */ - -interface HplTMP102 { - - /** - * Starts a temperature measurement. - * - * @return SUCCESS if the measurement will be made - */ - command error_t measureTemperature(); - - /** - * Presents the result of a temperature measurement. - * - * @param error SUCCESS if the measurement was successful - * @param val the temperature reading - */ - async event void measureTemperatureDone( error_t error, uint16_t val ); - - /** - * Sets a new value to the TMP102 configuration register. - * - * @param val the new value to be written - * - * @return SUCCESS if the set will be performed - */ - command error_t setConfigReg( uint16_t val ); - - /** - * Signals the completion of the configuration register set. - * - * @param error SUCCESS if the set was successful - */ - async event void setConfigRegDone( error_t error ); - - command error_t setTLowReg(uint16_t val); - async event void setTLowRegDone(error_t error); - - command error_t setTHighReg(uint16_t val); - async event void setTHighRegDone(error_t error); - - async event void alertThreshold(); - -} diff --git a/tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc b/tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc deleted file mode 100644 index ce61338793..0000000000 --- a/tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc +++ /dev/null @@ -1,289 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * HplTMP175LogicP is the driver for the TI TMP175. It requires an - * I2C packet interface and provides the HplTMP175 HPL interface. - * This module DOES NOT apply any specific configuration to the GpioInterrupt - * pin associated with the theshold alerts. This must be handled by an - * outside configuration/module according to the host platform. - * - * @author Phil Buonadonna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ - */ - -#include "TMP102.h" -#include "I2C.h" - -generic module HplTMP102LogicP(uint16_t devAddr) -{ - provides interface Init; - provides interface SplitControl; - provides interface HplTMP102; - - uses interface I2CPacket; - uses interface GpioInterrupt as AlertInterrupt; - uses interface GeneralIO as InterruptPin; -} - -implementation { - - enum { - STATE_IDLE, - STATE_STARTING, - STATE_STOPPING, - STATE_STOPPED, - STATE_READTEMP, - STATE_SETCONFIG, - STATE_SETTHIGH, - STATE_SETTLOW, - }; - - bool mfPtrReset; - uint8_t mI2CBuffer[4]; - uint8_t mState; - uint8_t mConfigRegVal; - norace error_t mSSError; - - static error_t doSetReg(uint8_t nextState, uint8_t reg, uint8_t val) { - error_t error = SUCCESS; - - atomic { - if (mState == STATE_IDLE) { - mState = nextState; - } - else { - error = EBUSY; - } - } - if (error) - return error; - - mI2CBuffer[0] = reg; - mI2CBuffer[1] = val; - - error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); - - if (error) - atomic mState = STATE_IDLE; - - return error; - } - - static error_t doSetRegWord(uint8_t nextState, uint8_t reg, uint16_t val) { - error_t error = SUCCESS; - - atomic { - if (mState == STATE_IDLE) { - mState = nextState; - } - else { - error = EBUSY; - } - } - if (error) - return error; - - mI2CBuffer[0] = reg; - mI2CBuffer[1] = (val >> 8) & 0xFF; - mI2CBuffer[2] = val & 0xFF; - - error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,3,mI2CBuffer); - - if (error) - atomic mState = STATE_IDLE; - - return error; - } - - task void StartDone() { - atomic mState = STATE_IDLE; - signal SplitControl.startDone(mSSError); - return; - } - - task void StopDone() { - atomic mState = STATE_STOPPED; - signal SplitControl.stopDone(mSSError); - return; - } - - command error_t Init.init() { - // careful! this can be changed via polarity I believe - call InterruptPin.makeInput(); - call AlertInterrupt.enableRisingEdge(); - mfPtrReset = FALSE; - mConfigRegVal = 0; - mState = STATE_STOPPED; - return SUCCESS; - } - - command error_t SplitControl.start() { - error_t error = SUCCESS; - atomic { - if (mState == STATE_STOPPED) { - mState = STATE_IDLE; - } - else { - error = EBUSY; - } - } - - if (error) - return error; - - return doSetReg(STATE_STARTING,TMP102_PTR_CFG,(mConfigRegVal & ~TMP175_CFG_SD)); - } - - command error_t SplitControl.stop() { - return doSetReg(STATE_STOPPING,TMP102_PTR_CFG,(mConfigRegVal | TMP175_CFG_SD)); - } - - command error_t HplTMP102.measureTemperature() { - error_t error = SUCCESS; - - atomic { - if (mState == STATE_IDLE) { - mState = STATE_READTEMP; - } - else { - error = EBUSY; - } - } - if (error) - return error; - - mI2CBuffer[0] = mI2CBuffer[1] = 0; - - error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,2,mI2CBuffer); - - if (error) - atomic mState = STATE_IDLE; - - return error; - - } - - command error_t HplTMP102.setConfigReg( uint16_t val ){ - return doSetReg(STATE_SETCONFIG,TMP102_PTR_CFG,val); - } - - command error_t HplTMP102.setTLowReg(uint16_t val){ - return doSetRegWord(STATE_SETTLOW,TMP102_PTR_TLOW,val); - } - - command error_t HplTMP102.setTHighReg(uint16_t val){ - return doSetRegWord(STATE_SETTHIGH,TMP102_PTR_THIGH,val); - } - - async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { - uint16_t tempVal; - - switch (mState) { - case STATE_READTEMP: - tempVal = buf[0]; - tempVal = ((tempVal << 8) | buf[1]); - mState = STATE_IDLE; - signal HplTMP175.measureTemperatureDone(i2c_error,tempVal); - break; - default: - break; - } - - return; - } - - async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { - error_t error = i2c_error; - - if (mfPtrReset) { - mfPtrReset = FALSE; - switch (mState) { - case STATE_STARTING: - mSSError = error; - post StartDone(); - break; - - case STATE_STOPPING: - mSSError = error; - post StopDone(); - break; - - case STATE_READTEMP: - // Should never get here. - break; - - case STATE_SETCONFIG: - mState = STATE_IDLE; - signal HplTMP102.setConfigRegDone(error); - break; - - case STATE_SETTHIGH: - mState = STATE_IDLE; - signal HplTMP102.setTHighRegDone(error); - break; - - case STATE_SETTLOW: - mState = STATE_IDLE; - signal HplTMP102.setTLowRegDone(error); - break; - - default: - mState = STATE_IDLE; - break; - } - } - else { - // Reset the PTR register back to the temperature register - mI2CBuffer[0] = TMP102_PTR_TEMP; - mfPtrReset = TRUE; - call I2CPacket.write(I2C_START | I2C_STOP, devAddr,1,mI2CBuffer); - } - - return; - } - - async event void AlertInterrupt.fired() { - // This alert is decoupled from whatever state the TMP102 is in. - // Upper layers must handle dealing with this alert appropriately. - signal HplTMP102.alertThreshold(); - return; - } - - default event void SplitControl.startDone( error_t error ) { return; } - default event void SplitControl.stopDone( error_t error ) { return; } - default async event void HplTMP102.measureTemperatureDone( error_t error, uint16_t val ){ return; } - default async event void HplTMP102.setConfigRegDone( error_t error ){ return; } - default async event void HplTMP102.setTHighRegDone(error_t error){ return; } - default async event void HplTMP102.setTLowRegDone(error_t error){ return; } - default async event void HplTMP102.alertThreshold(){ return; } - -} diff --git a/tos/platforms/z1/chips/tmp102/TMP102.h b/tos/platforms/z1/chips/tmp102/TMP102.h deleted file mode 100644 index 7a48009258..0000000000 --- a/tos/platforms/z1/chips/tmp102/TMP102.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Types and definitions for the TI TMP175 - * - * @author Phil Buonadonna - * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ - */ - -#ifndef _TMP102_H -#define _TMP102_H - -#define TMP102_SLAVE_ADDR (0x48) - -#define TMP102_PTR_TEMP (0x0) -#define TMP102_PTR_CFG (0x1) -#define TMP102_PTR_TLOW (0x2) -#define TMP102_PTR_THIGH (0x3) - -#define TMP102_CFG_OS ((1 << 7) << 8) -#define TMP102_CFG_RES(_x) ((((_x) & 0x3) << 5) << 8) -#define TMP102_CFG_FQ(_x) ((((_x) & 0x3) << 3) << 8) -#define TMP102_CFG_POL ((1 << 2) << 8) -#define TMP102_CFG_TM ((1 << 1) << 8) -#define TMP102_CFG_SD ((1 << 0) << 8) - -#define TMP102_CFG_CR(_x) (((_x) & 0x3) << 6) -#define TMP102_CFG_AL (1 << 5) -#define TMP102_CFG_EM (1 << 4) - - -typedef enum { - TMP102_FQD_1 = 0, - TMP102_FQD_2 = 1, - TMP102_FQD_4 = 2, - TMP102_FQD_6 = 3 -} tmp102_fqd_t; - -typedef enum { - TMP102_CR_025HZ, - TMP102_RES_1HZ, - TMP102_RES_4HZ, - TMP102_RES_8HZ -} tmp102_cr_t; - - - -#endif /* _TMP102_H */ diff --git a/tos/platforms/z1/chips/tmp102/TMP102C.nc b/tos/platforms/z1/chips/tmp102/TMP102C.nc deleted file mode 100644 index c4363960b2..0000000000 --- a/tos/platforms/z1/chips/tmp102/TMP102C.nc +++ /dev/null @@ -1,61 +0,0 @@ -/* $Id: TMP175C.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */ -/* - * Copyright (c) 2005 Arch Rock Corporation - * All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * Neither the name of the Arch Rock Corporation nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED - * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - */ -/** - * - * @author Kaisen Lin - * @author Phil Buonadonna - */ -//#include "im2sb.h" - -generic configuration TMP102C() { - provides interface Read as Temperature; - provides interface HalTMP102Advanced; - provides interface SplitControl; -} - -implementation { - components new HalTMP102ReaderP(); - components HalTMP102ControlP; - Temperature = HalTMP102ReaderP.Temperature; - - enum { TMP_KEY = unique("TMP102.Resource"), - ADV_KEY = unique("TMP102.Resource"), - READER_ID = unique("TMP102.HplAccess"), - }; - - components TMP102InternalC; - HalTMP102ReaderP.TMP102Resource -> TMP102InternalC.Resource[TMP_KEY]; - HalTMP102ControlP.TMP102Resource -> TMP102InternalC.Resource[ADV_KEY]; - HalTMP102ReaderP.HplTMP175 -> TMP102InternalC.HplTMP102[READER_ID]; - HalTMP102Advanced = HalTMP102ControlP.HalTMP102Advanced; - - SplitControl = TMP102InternalC; -} diff --git a/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc b/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc deleted file mode 100644 index 5507a700cf..0000000000 --- a/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc +++ /dev/null @@ -1,73 +0,0 @@ -/* $Id: TMP175InternalC.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */ -/* - * Copyright (c) 2005 Arch Rock Corporation - * All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * Neither the name of the Arch Rock Corporation nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED - * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - */ -/** - * - * @author Kaisen Lin - * @author Phil Buonadonna - */ -//#include "im2sb.h" - -configuration TMP102InternalC { - provides interface Resource[uint8_t id]; - provides interface HplTMP102[uint8_t id]; - provides interface SplitControl; -} - -implementation { - enum { - ADV_ID = unique("TMP102.HplAccess"), - }; - - components new SimpleFcfsArbiterC( "TMP102.Resource" ) as Arbiter; - components MainC; - Resource = Arbiter; - - components new HplTMP102LogicP(TMP102_SLAVE_ADDR) as Logic; - MainC.SoftwareInit -> Logic; - - /* dubtos */ - components GeneralIOC; - Logic.AlertInterrupt -> GeneralIOC.GpioInterrupt[GPIO_TMP102_TEMP_ALERT]; - Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TMP102_TEMP_ALERT]; - - components new Msp430I2CC() as I2CBus; - Logic.I2CPacket -> I2CBus; - - components TMP102InternalP as Internal; - HplTMP102 = Internal.HplTMP102; - Internal.ToHPLC -> Logic.HplTMP102; - - SplitControl = Logic; - - components HalTMP102ControlP; - HalTMP102ControlP.HplTMP102 -> Logic; - -} diff --git a/tos/platforms/z1/chips/tmp102/TMP102InternalP.nc b/tos/platforms/z1/chips/tmp102/TMP102InternalP.nc deleted file mode 100644 index 1745627222..0000000000 --- a/tos/platforms/z1/chips/tmp102/TMP102InternalP.nc +++ /dev/null @@ -1,84 +0,0 @@ -/* $Id: TMP175InternalP.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */ -/* - * Copyright (c) 2005 Arch Rock Corporation - * All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * Neither the name of the Arch Rock Corporation nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED - * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - */ -/** - * - * @author Kaisen Lin - * @author Phil Buonadonna - */ -module TMP102InternalP { - provides interface HplTMP102[uint8_t id]; - uses interface HplTMP102 as ToHPLC; -} - -implementation { - uint8_t currentId; - - command error_t HplTMP102.measureTemperature[uint8_t id]() { - currentId = id; - return call ToHPLC.measureTemperature(); - } - - // configuration register of TMP102 is 16 bit - command error_t HplTMP102.setConfigReg[uint8_t id](uint16_t val) { - currentId = id; - return call ToHPLC.setConfigReg(val); - } - command error_t HplTMP102.setTLowReg[uint8_t id](uint16_t val) { - currentId = id; - return call ToHPLC.setTLowReg(val); - } - command error_t HplTMP102.setTHighReg[uint8_t id](uint16_t val) { - currentId = id; - return call ToHPLC.setTHighReg(val); - } - - async event void ToHPLC.measureTemperatureDone(error_t error, uint16_t val) { - signal HplTMP102.measureTemperatureDone[currentId](error, val); - } - async event void ToHPLC.setConfigRegDone(error_t error) { - signal HplTMP102.setConfigRegDone[currentId](error); - } - async event void ToHPLC.setTLowRegDone(error_t error) { - signal HplTMP102.setTLowRegDone[currentId](error); - } - async event void ToHPLC.setTHighRegDone(error_t error) { - signal HplTMP102.setTHighRegDone[currentId](error); - } - async event void ToHPLC.alertThreshold() { - signal HplTMP102.alertThreshold[currentId](); - } - - default async event void HplTMP102.measureTemperatureDone[uint8_t id](error_t error, uint16_t val) { return; } - default async event void HplTMP102.setConfigRegDone[uint8_t id](error_t error) { return; } - default async event void HplTMP102.setTLowRegDone[uint8_t id](error_t error) { return; } - default async event void HplTMP102.setTHighRegDone[uint8_t id](error_t error) { return; } - default async event void HplTMP102.alertThreshold[uint8_t id]() { return; } -} diff --git a/tos/platforms/z1/hardware.h b/tos/platforms/z1/hardware.h deleted file mode 100644 index 70d97b3180..0000000000 --- a/tos/platforms/z1/hardware.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _H_hardware_h -#define _H_hardware_h - -#include "msp430hardware.h" - -// LEDs -TOSH_ASSIGN_PIN(RED_LED, 5, 4); -TOSH_ASSIGN_PIN(GREEN_LED, 5, 6); -TOSH_ASSIGN_PIN(YELLOW_LED, 5, 5); - -// UART pins -TOSH_ASSIGN_PIN(SOMI0, 3, 2); -TOSH_ASSIGN_PIN(SIMO0, 3, 1); -TOSH_ASSIGN_PIN(UCLK0, 3, 3); -TOSH_ASSIGN_PIN(UTXD0, 3, 4); -TOSH_ASSIGN_PIN(URXD0, 3, 5); -TOSH_ASSIGN_PIN(UTXD1, 3, 6); -TOSH_ASSIGN_PIN(URXD1, 3, 7); -TOSH_ASSIGN_PIN(UCLK1, 5, 3); -TOSH_ASSIGN_PIN(SOMI1, 5, 2); -TOSH_ASSIGN_PIN(SIMO1, 5, 1); - - -#endif // _H_hardware_h diff --git a/tos/platforms/z1/platform.h b/tos/platforms/z1/platform.h deleted file mode 100644 index e69de29bb2..0000000000 diff --git a/tos/platforms/z1/platform_message.h b/tos/platforms/z1/platform_message.h deleted file mode 100644 index 9ea0e9575c..0000000000 --- a/tos/platforms/z1/platform_message.h +++ /dev/null @@ -1,59 +0,0 @@ -/* $Id: platform_message.h,v 1.5 2008/02/19 22:03:45 scipio Exp $ - * "Copyright (c) 2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - * - * Copyright (c) 2002-2005 Intel Corporation - * All rights reserved. - * - * This file is distributed under the terms in the attached INTEL-LICENSE - * file. If you do not find these files, copies can be found by writing to - * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, - * 94704. Attention: Intel License Inquiry. - */ - -/** - * Defining the platform-independently named packet structures to be the - * chip-specific CC1000 packet structures. - * - * @author Philip Levis - * @version $Revision: 1.5 $ $Date: 2008/02/19 22:03:45 $ - */ - - -#ifndef PLATFORM_MESSAGE_H -#define PLATFORM_MESSAGE_H - -#include -#include - -typedef union message_header { - cc2420_header_t cc2420; - serial_header_t serial; -} message_header_t; - -typedef union TOSRadioFooter { - cc2420_footer_t cc2420; -} message_footer_t; - -typedef union TOSRadioMetadata { - cc2420_metadata_t cc2420; - serial_metadata_t serial; -} message_metadata_t; - -#endif From 270f0cc4cc2c852a64e3540d1a5b9109fc95f731 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 5 Mar 2011 17:14:45 -0800 Subject: [PATCH 006/411] Z1 changes outside main z1 modifications (outside tos/{chips,platforms} --- 01_Merge_Notes | 16 ++ 02_To_Do | 4 + 03_Removed | 9 + apps/IPBaseStation/BaseStationP.nc | 54 +--- apps/IPBaseStation/Reset.h | 2 +- support/make/msp/bsl.extra | 7 +- support/make/z1.target | 19 ++ tools/platforms/msp430/motelist/motelist-z1 | 276 ++++++++++++++++++++ tos/lib/net/blip/PrintfUART.h | 128 ++++----- tos/lib/net/blip/ReadLqiC.nc | 8 +- tos/lib/net/blip/shell/UDPShellC.nc | 44 ++-- tos/lib/net/blip/shell/UDPShellP.nc | 50 ++-- 12 files changed, 469 insertions(+), 148 deletions(-) create mode 100644 02_To_Do create mode 100644 03_Removed create mode 100644 support/make/z1.target create mode 100755 tools/platforms/msp430/motelist/motelist-z1 diff --git a/01_Merge_Notes b/01_Merge_Notes index e69de29bb2..8bfe4c4ddb 100644 --- a/01_Merge_Notes +++ b/01_Merge_Notes @@ -0,0 +1,16 @@ + +1) removed extra Z1 commit into the trunk. Gets in the way of the collapse work already done. + +2) branched to master-vhsb (master with vogon hyper spatial bypass), ie trunk (master without + the extra Z1 code. + +3) brought in code from sourceforge z1-0.16 that changed things but didn't hit the main areas for + the Z1. ie. stuff outside of tos/chips/msp430. + +4) brought in z1 code that effects tos/chips/msp430. But avoided the duplicates. (z1-0.16 code + checked against the trunk Z1 code (removed above) to see if anything missing). + + +* In apps/IPBaseStation/BaseStationP.nc, Z1 brought in #include CC2420.h that is inside + an #ifndef SIM. Why the ifndef? + diff --git a/02_To_Do b/02_To_Do new file mode 100644 index 0000000000..cbe7049886 --- /dev/null +++ b/02_To_Do @@ -0,0 +1,4 @@ + +* apps/IPBaseStation: defines a reset in a particularily ugly way. Needs to be + fixed and mad part of the platform/cpu definition. + diff --git a/03_Removed b/03_Removed new file mode 100644 index 0000000000..815ed9b1dd --- /dev/null +++ b/03_Removed @@ -0,0 +1,9 @@ + +This is a list of files in the Z1 tree that are removed because they +are outdated and duplicates. + +* z1-0.16 had a tos/lib/net/blip/IPDispatch.h with lots of stuff in it that is removed in the + trunk. Does this need to get checked? + + The trunk version of IPDispatch.h is used in the msp430 (mm-z1) branch. + diff --git a/apps/IPBaseStation/BaseStationP.nc b/apps/IPBaseStation/BaseStationP.nc index 57902a110a..12d1d1cc3a 100644 --- a/apps/IPBaseStation/BaseStationP.nc +++ b/apps/IPBaseStation/BaseStationP.nc @@ -1,38 +1,6 @@ /* * Copyright (c) 2008 The Regents of the University of California. - * All rights reserved." - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -// $Id: BaseStationP.nc,v 1.8 2010-06-29 22:07:16 scipio Exp $ - -/* tab:4 + * Copyright (c) 2002-2005 Intel Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -42,11 +10,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the University of California nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -63,16 +33,11 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Copyright (c) 2002-2005 Intel Corporation - * All rights reserved. - * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. - */ - -/* + * * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay @@ -86,7 +51,9 @@ * serial will be filtered by that same group id. */ +/* why is this include inside of #ifndef SIM? */ #ifndef SIM +#include "CC2420.h" #endif #include "AM.h" #include "Serial.h" @@ -329,7 +296,7 @@ implementation bool reflectToken = FALSE; CHECK_NODE_ID msg; dbg("base", "uartreceive len %i of 0x%x\n", len, call SerialAMPacket.destination(msg)); -#if defined(BLIP_WATCHDOG) && (defined(PLATFORM_TELOS) || defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)) +#if defined(BLIP_WATCHDOG) && (defined(PLATFORM_TELOS) || defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1)) WDTCTL = WDT_ARST_1000; #endif atomic @@ -423,7 +390,7 @@ implementation uint8_t len) { config_cmd_t *cmd; uint8_t error = CONFIG_ERROR_OK; -#if defined(BLIP_WATCHDOG) && (defined(PLATFORM_TELOS) || defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)) +#if defined(BLIP_WATCHDOG) && (defined(PLATFORM_TELOS) || defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1)) WDTCTL = WDT_ARST_1000; #endif @@ -465,8 +432,7 @@ implementation #if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) event void RadioChannel.setChannelDone() { } #else - event void CC2420Config.syncDone(error_t error) { - } + event void CC2420Config.syncDone(error_t error) { } #endif event void ConfigureSend.sendDone(message_t *msg, error_t error) { diff --git a/apps/IPBaseStation/Reset.h b/apps/IPBaseStation/Reset.h index 683dee7424..a1d6a8d9da 100644 --- a/apps/IPBaseStation/Reset.h +++ b/apps/IPBaseStation/Reset.h @@ -61,7 +61,7 @@ void resetMote() while (1) { __asm__ __volatile__("nop" "\n\t" ::); } -#elif defined(PLATFORM_TELOS) || defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_SPAN) +#elif defined(PLATFORM_TELOS) || defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_SPAN) || defined(PLATFORM_Z1) WDTCTL = 0; #elif defined(PLATFORM_MULLE) PRCR.BIT.PRC0 = 1; // Turn off protection on CM registers. diff --git a/support/make/msp/bsl.extra b/support/make/msp/bsl.extra index a1e1b12f3e..bbd98e2a06 100644 --- a/support/make/msp/bsl.extra +++ b/support/make/msp/bsl.extra @@ -18,17 +18,18 @@ MSP_BSL ?= msp430-bsl # BSL is the comm port, can be specified as "bsl,2" when making BSL ?= auto MSP_BSL_FLAGS ?= --telos +MOTELIST ?= motelist ifeq ($(BSL),auto) -BSLTEST = $(shell motelist -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+)[^,]*)/; print $$1;' ) +BSLTEST = $(shell $(MOTELIST) -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+)[^,]*)/; print $$1;' ) BSLTEST_COMMENT = "using bsl,auto" -BSL = $(shell motelist -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+)[^,]*)/; ($$s,$$n)=($$1,$$2); if($$s=~/^com/i) { print $$n-1 } else { print $$s; };' ) +BSL = $(shell $(MOTELIST) -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+)[^,]*)/; ($$s,$$n)=($$1,$$2); if($$s=~/^com/i) { print $$n-1 } else { print $$s; };' ) BSL_TARGETS += bsltest else ifeq ($(BSL:ref,%=ref),ref) BSLREF := $(BSL:ref,%=%) BSLTEST_COMMENT = "using bsl,ref,$(BSLREF)" -BSLTEST := $(shell motelist -c | perl -e '$$r=shift; while(<>) { if(/^$$r,([^,]+)/) { print $$1; exit; } }' $(BSLREF)) +BSLTEST := $(shell $(MOTELIST) -c | perl -e '$$r=shift; while(<>) { if(/^$$r,([^,]+)/) { print $$1; exit; } }' $(BSLREF)) BSL = $(BSLTEST) BSL_TARGETS += bsltest endif diff --git a/support/make/z1.target b/support/make/z1.target new file mode 100644 index 0000000000..2e453acb4f --- /dev/null +++ b/support/make/z1.target @@ -0,0 +1,19 @@ +PLATFORM = z1 + +MSP_BSL ?= z1-bsl +MOTELIST ?= motelist-z1 + +MSP_BSL_FLAGS = --z1 +MSP_MCU ?= msp430x261 +MSP_GCC ?= msp430-gcc +MSP_NESC_TARGET ?= msp430 +PFLAGS += -mdisable-hwmul +PFLAGS += -mdata-64k + +VOLUME_FILE = volumes-stm25p.xml +VOLUME_ALLOCATOR ?= tos-storage-stm25p + +$(call TOSMake_include_platform,msp) + +z1: $(BUILD_DEPS) + @: diff --git a/tools/platforms/msp430/motelist/motelist-z1 b/tools/platforms/msp430/motelist/motelist-z1 new file mode 100755 index 0000000000..5fe7003e5b --- /dev/null +++ b/tools/platforms/msp430/motelist/motelist-z1 @@ -0,0 +1,276 @@ +#!/usr/bin/perl -w +use strict; +# $Id: motelist-linux,v 1.4 2006/12/12 18:23:01 vlahan Exp $ +# @author Cory Sharp +# @author Joe Polastre + +my $help = <<'EOF'; +usage: motelist [options] + + $Revision: 1.4 $ + +options: + -h display this help + -c compact format, not pretty but easier for parsing + -f specify the usb-serial file (for smote.cs) + -k kernel version: 2.4, 2.6, auto (default) + -m method to scan usb: procfs, sysfs, auto (default) + -dev_prefix force the device prefix for the serial device + -usb display extra usb information +EOF + +my %Opt = ( + compact => 0, + usb => 0, + method => "auto", + kernel => "auto", + dev_prefix => [ "/dev/usb/tts/", "/dev/ttyUSB", "/dev/tts/USB" ], + usbserial => "sudo cat /proc/tty/driver/usbserial |", +); + +while (@ARGV) { + last unless $ARGV[0] =~ /^-/; + my $opt = shift @ARGV; + if( $opt eq "-h" ) { print "$help\n"; exit 0; } + elsif( $opt eq "-c" ) { $Opt{compact} = 1; } + elsif( $opt eq "-f" ) { $Opt{usbserial} = shift @ARGV; } + elsif( $opt eq "-k" ) { $Opt{kernel} = shift @ARGV; } + elsif( $opt eq "-m" ) { $Opt{method} = shift @ARGV; } + elsif( $opt eq "-dev_prefix" ) { $Opt{dev_prefix} = shift @ARGV; } + elsif( $opt eq "-usb" ) { $Opt{usb} = 1; } + else { print STDERR "$help\nerror, unknown command line option $opt\n"; exit 1; } +} + +if( $Opt{kernel} eq "auto" ) { + $Opt{kernel} = "unknown"; + $Opt{kernel} = $1 if snarf("/proc/version") =~ /\bLinux version (\d+\.\d+)/; +} + +if( $Opt{method} eq "auto" ) { + $Opt{method} = ($Opt{kernel} eq "2.4") ? "procfs" : "sysfs"; +} + +my @devs = $Opt{method} eq "procfs" ? scan_procfs() : scan_sysfs(); +print_motelist( sort { cmp_usbdev($a,$b) } @devs ); + + +# +# SysFS +# +sub scan_sysfs { + + # Scan /sys/bus/usb/drivers/usb for FTDI devices + my @ftdidevs = + grep { ($_->{UsbVendor}||"") eq "10c4" && ($_->{UsbProduct}||"") eq "ea60" && ($_->{ProductString}||"") eq "Zolertia Z1" } + map { { + SysPath => $_, + UsbVendor => snarf("$_/idVendor",1), + UsbProduct => snarf("$_/idProduct",1), + ProductString => snarf("$_/product",1), + } } + glob("/sys/bus/usb/drivers/usb/*"); + + # Gather information about each FTDI device + for my $f (@ftdidevs) { + my $syspath = $f->{SysPath}; + + $f->{InfoManufacturer} = snarf("$syspath/manufacturer",1); + $f->{InfoProduct} = snarf("$syspath/product",1); + $f->{InfoSerial} = snarf("$syspath/serial",1); + $f->{UsbDevNum} = snarf("$syspath/devnum",1); + + my $devstr = readlink($syspath); + if( $devstr =~ m{([^/]+)/usb(\d+)/.*-([^/]+)$} ) { + $f->{UsbPath} = "usb-$1-$3"; + $f->{UsbBusNum} = $2; + } + ($f->{SysDev} = $syspath) =~ s{^.*/}{}; + + my $port = "$syspath/$f->{SysDev}:1.0"; + ($f->{DriverName} = readlink("$port/driver")) =~ s{^.*/}{} if -l "$port/driver"; + ($f->{SerialDevName} = (glob("$port/tty*"),undef)[0]) =~ s{^.*/}{}; + $f->{SerialDevNum} = $1 if $f->{SerialDevName} =~ /(\d+)/; + $f->{SerialDevName} = getSerialDevName( $f->{SerialDevNum} ) || " (none)"; + } + + return @ftdidevs; +} + + +# +# Scan Procfs +# +sub scan_procfs { + + my $text_devs = snarf("< /proc/bus/usb/devices"); + my $text_serial = snarf($Opt{usbserial}); + + my @usbdevs = map { {parse_usb_devices_text($_)} } + grep { !/^\s*$/ } split /\n+(?=T:)/, $text_devs; + my %usbtree = build_usb_tree( @usbdevs ); + my %usbserialtree = build_usbserial_tree( $text_serial ); + for my $tts ( values %usbserialtree ) { + $usbtree{usbkey($tts->{path})}{usbserial} = $tts if defined $tts->{path}; + } + + my @ftdidevs = map { { + UsbVendor => $_->{Vendor}, + UsbProduct => $_->{ProdID}, + InfoManufacturer => $_->{Manufacturer}, + InfoProduct => $_->{Product}, + InfoSerial => $_->{SerialNumber}, + UsbBusNum => $_->{nbus}, + UsbDevNum => $_->{ndev}, + UsbPath => (($Opt{kernel} eq "2.4") ? $_->{usbserial}{path} : $_->{usbpath}), + DriverName => $_->{driver}, + SerialDevNum => $_->{usbserial}{tts}, + SerialDevName => getSerialDevName($_->{usbserial}{tts}) || " (none)", + } } + grep { ($_->{Vendor}||"") eq "0403" && ($_->{ProdID}||"") eq "6001" } + values %usbtree; + + return @ftdidevs; +} + +sub build_usb_tree { + my @devs = @_; + my %tree = (); + for my $dev (sort { $a->{Lev} <=> $b->{Lev} } @devs) { + my ($bus,$lev,$prnt) = ( $dev->{Bus}+0, $dev->{Lev}+0, $dev->{Prnt}+0 ); + my $devnum = $dev->{"Dev#"}+0; + $dev->{nbus} = $bus; + $dev->{ndev} = $devnum; + $tree{"bus$bus"} = {} unless exists $tree{"bus$bus"}; + $tree{"bus$bus"}{"dev$devnum"} = $dev; + if( $lev == 0 ) { + $dev->{usbpath} = "usb-$dev->{SerialNumber}"; + } else { + my $sep = ($lev==1) ? "-" : "."; + $dev->{parent} = $tree{"bus$bus"}{"dev$prnt"}; + $dev->{usbpath} = $dev->{parent}{usbpath} . $sep . ($dev->{Port}+1); + } + $tree{usbkey($dev->{usbpath})} = $dev; + } + return %tree; +} + +sub parse_usb_devices_text { + my $text = shift; + $text =~ s/^\S+\s*//gm; + return ($text =~ m/([^\s=]+)=\s*(.*?\S)\s*(?=[^\s=]+=|$)/mg); +} + +sub build_usbserial_tree { + my $text = shift; + my %tree = (); + while( $text =~ /^([^:]+):(.*)/mg ) { + my ($tts,$params) = ($1,$2); + $tree{$tts} = { tts => $tts }; + while ($params =~ m/\s+([^:]+):(?:"([^"]*)"|(\S+))/g) { + $tree{$tts}{$1} = $2||$3; + } + } + return %tree; +} + +sub usbkey { + if( $Opt{kernel} eq "2.4" ) { + (my $key = $_[0]) =~ s/^.*-//; + return $key; + } + return $_[0]; +} + + +# +# getSerialDevName +# +# For each device, force to use dev_prefix if it's not an array. Otherwise, +# assume it's a list of candidate prefixes. Check them and commit to the +# first one that actually exists. +# +sub getSerialDevName { + my $devnum = shift; + my $devname = undef; + if( defined $devnum ) { + if( ref($Opt{dev_prefix}) eq "ARRAY" ) { + $devname = $devnum; + for my $prefix (@{$Opt{dev_prefix}}) { + my $file = $prefix . $devnum; + if( -e $file ) { $devname = $file; last; } + } + } else { + $devname = $Opt{dev_prefix} . $devnum; + } + } + return $devname; +} + + +# +# Print motelist +# +sub print_motelist { + my @devs = @_; + + # If none were found, quit + if( @devs == 0 ) { + print "No devices found.\n"; + return; + } + + # Print a header + if( !$Opt{compact} ) { + if( $Opt{usb} ) { + print << "EOF" unless $Opt{compact}; +Bus Dev USB Path Reference Device Description +--- --- ------------------------ ---------- ---------------- ------------------------------------- +EOF + } else { + print << "EOF" unless $Opt{compact}; +Reference Device Description +---------- ---------------- --------------------------------------------- +EOF + } + } + + # Print the usb information + for my $dev (sort { cmp_usbdev($a,$b) } @devs) { + my $desc = join( " ", $dev->{InfoManufacturer}||"", $dev->{InfoProduct}||"" ) || " (none)"; + my @output = ( $dev->{InfoSerial}||" (none)", $dev->{SerialDevName}, $desc ); + @output = ( $dev->{UsbBusNum}, $dev->{UsbDevNum}, $dev->{UsbPath}, @output ) if $Opt{usb}; + if( $Opt{compact} ) { + print join(",",@output) . "\n"; + } else { + printf( ($Opt{usb}?"%3d %3d %-24s ":"")."%-10s %-16s %s\n", @output ); + } + } +} + + +# +# Cmp Usbdev's +# +sub cmp_usbdev { + my ($a,$b) = @_; + if( defined $a->{SerialDevNum} ) { + if( defined $b->{SerialDevNum} ) { + return $a->{SerialDevNum} <=> $b->{SerialDevNum}; + } + return -1; + } + return 1 if defined $b->{SerialDevNum}; + return ($a->{InfoSerial}||"") cmp ($b->{InfoSerial}||""); +} + +# +# Read a file in +# +sub snarf { + open my $fh, $_[0] or return undef; + my $text = do{local $/;<$fh>}; + close $fh; + $text =~ s/\s+$// if $_[1]; + return $text; +} + diff --git a/tos/lib/net/blip/PrintfUART.h b/tos/lib/net/blip/PrintfUART.h index 7e4e594118..e05138caad 100644 --- a/tos/lib/net/blip/PrintfUART.h +++ b/tos/lib/net/blip/PrintfUART.h @@ -1,65 +1,50 @@ /* - * "Copyright (c) 2008 The Regents of the University of California. - * All rights reserved." - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - * - */ -/* - * Copyright (c) 2005 - * The President and Fellows of Harvard College. + * Copyright (c) 2008 The Regents of the University of California. + * Copyright (c) 2005 The President and Fellows of Harvard College. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Writes printf like output to the UART. - * This works only on the AVR and MSP430 Microcontrollers! + * This works only on the AVR and MSP430 based Microcontrollers! *

* Note: For AVR we explicitly place the print statements in ROM; for * MSP430 this is done by default! For AVR, if we don't place it - * explicitely in ROM, the statements will go in RAM, which will + * explicitly in ROM, the statements will go in RAM, which will * quickly cause a descent size program to run out of RAM. By default * it doesn't disable the interupts; disabling the interupts when * writing to the UART, slows down/makes the mote quite unresponsive, * and can lead to problems! If you wish to disable all printfs to - * the UART, then comment the flag: PRINTFUART_ENABLED. + * the UART, then comment out the flag: PRINTFUART_ENABLED. * 

  * How to use:
@@ -85,11 +70,14 @@
  *   printfUART("\nThe value of x=%u, and y=%u\n", x, y); 
  *
* 
URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack
+ * * @author Konrad Lorincz * @version 2.0, January 5, 2005 */ + #ifndef PRINTFUART_H #define PRINTFUART_H + #include #include @@ -139,8 +127,7 @@ void printfUART_init_private() inp(UDR0); outp((1 << TXEN) ,UCSR0B); // Enable uart reciever and transmitter - #else - #if defined(PLATFORM_MICA2DOT) + #elif defined(PLATFORM_MICA2DOT) // 19.2K baud outp(0,UBRR0H); // Set baudrate to 19.2 KBps outp(12, UBRR0L); @@ -149,8 +136,7 @@ void printfUART_init_private() inp(UDR0); outp((1 << TXEN) ,UCSR0B); - #else - #if defined(PLATFORM_IMOTE2) + #elif defined(PLATFORM_IMOTE2) //async command result_t UART.init() { /*** @@ -198,6 +184,13 @@ void printfUART_init_private() CKEN |= CKEN5_STUART; //enable the UART's clk + #elif defined(PLATFORM_Z1) + P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD + UCA0CTL1 |= UCSSEL_2; // CLK = ACLK + UCA0BR0 = 0x45; // 32kHz/9600 = 3.41 + UCA0BR1 = 0x00; // + UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 + UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** #else // assume TelosA, TelosB, etc. // Variabel baud @@ -253,8 +246,6 @@ void printfUART_init_private() IFG2 &= ~(UTXIFG1 | URXIFG1); IE2 &= ~(UTXIE1 | URXIE1); // interrupt disabled - - //async command void USARTControl.setClockSource(uint8_t source) { // atomic { l_ssel = source | 0x80; @@ -286,17 +277,14 @@ void printfUART_init_private() IE2 |= UTXIE1; //} //return SUCCESS; - //} - - #endif - #endif + //} #endif } #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) -#else -#if defined(PLATFORM_IMOTE2) -#else // assume AVR architecture (e.g. TelosA, TelosB) +#elif defined(PLATFORM_IMOTE2) +#elif defined(PLATFORM_Z1) +#else // assume AVR architecture (e.g. TelosA, TelosB, (this makes no sense, avr != telos)) bool isTxIntrPending() { if (U1TCTL & TXEPT) { @@ -305,7 +293,7 @@ void printfUART_init_private() return FALSE; } #endif -#endif + /** * Outputs a char to the UART. @@ -320,15 +308,18 @@ void UARTPutChar(char c) loop_until_bit_is_set(UCSR0A, UDRE); outb(UDR0,c); - #else - #if defined(PLATFORM_IMOTE2) + #elif defined(PLATFORM_IMOTE2) STTHR = c; + #elif defined(PLATFORM_Z1) + while (!(IFG2&UCA0TXIFG)); + atomic UCA0TXBUF = c; + #else // assume AVR architecture (e.g. TelosA, TelosB) U1TXBUF = c; while( !isTxIntrPending() ) continue; - #endif + #endif } @@ -352,7 +343,19 @@ void writedebug() void __assertUART(const char* file, int line) { printfUART("ASSERT FAILED: file= %s, lineNbr= %i\n", file, line); +#ifdef notdef // for some reason, CLR means on + // its because its low true logic as defined at the h/w. namely when the + // controlling bit gets set to 0 (clr), the diode is forward biased and the + // led starts to emit. + + TOSH_MAKE_RED_LED_OUTPUT(); + TOSH_MAKE_YELLOW_LED_OUTPUT(); + TOSH_MAKE_GREEN_LED_OUTPUT(); + TOSH_CLR_RED_LED_PIN(); + TOSH_CLR_YELLOW_LED_PIN(); + TOSH_CLR_GREEN_LED_PIN(); +#endif for (;;); } // -------------------------------------------------------------- @@ -394,4 +397,3 @@ void printfUART_in6addr(struct in6_addr *a) { #endif #endif // PRINTFUART_H - diff --git a/tos/lib/net/blip/ReadLqiC.nc b/tos/lib/net/blip/ReadLqiC.nc index cd6005ad9b..97b7fcd026 100644 --- a/tos/lib/net/blip/ReadLqiC.nc +++ b/tos/lib/net/blip/ReadLqiC.nc @@ -14,15 +14,19 @@ configuration ReadLqiC { #if defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || \ defined(PLATFORM_EPIC) || defined(PLATFORM_SHIMMER) || \ - defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) + defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || \ + defined(PLATFORM_Z1) + // cc2420 platforms components CC2420ReadLqiC, CC2420PacketC; ReadLqi = CC2420ReadLqiC; CC2420ReadLqiC.CC2420Packet -> CC2420PacketC; -#elif defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) + +#elif defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) components RF230ReadLqiC, RF230Ieee154MessageC; ReadLqi = RF230ReadLqiC; RF230ReadLqiC.SubLqi -> RF230Ieee154MessageC.PacketLinkQuality; + #else #error "No radio support is available for your platform" #endif diff --git a/tos/lib/net/blip/shell/UDPShellC.nc b/tos/lib/net/blip/shell/UDPShellC.nc index 2ebed3544d..b6250829a1 100644 --- a/tos/lib/net/blip/shell/UDPShellC.nc +++ b/tos/lib/net/blip/shell/UDPShellC.nc @@ -1,23 +1,35 @@ /* - * "Copyright (c) 2008 The Regents of the University of California. - * All rights reserved." + * Copyright (c) 2008 The Regents of the University of California. + * All rights reserved. * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. * + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include @@ -36,7 +48,7 @@ configuration UDPShellC { components ICMPPingC; UDPShellP.ICMPPing -> ICMPPingC.ICMPPing[unique("PING")]; -#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) +#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) components CounterMilli32C; UDPShellP.Uptime -> CounterMilli32C; #endif diff --git a/tos/lib/net/blip/shell/UDPShellP.nc b/tos/lib/net/blip/shell/UDPShellP.nc index 44aa5e9afd..0d2c6b8c4c 100644 --- a/tos/lib/net/blip/shell/UDPShellP.nc +++ b/tos/lib/net/blip/shell/UDPShellP.nc @@ -1,23 +1,35 @@ /* - * "Copyright (c) 2008 The Regents of the University of California. - * All rights reserved." + * Copyright (c) 2008 The Regents of the University of California. + * All rights reserved. * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. * + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include @@ -36,7 +48,7 @@ module UDPShellP { interface Leds; interface ICMPPing; -#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) +#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) interface Counter as Uptime; #endif @@ -82,7 +94,7 @@ module UDPShellP { int i; atomic { uptime = 0; -#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) +#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) boot_time = call Uptime.get(); #endif } @@ -175,7 +187,7 @@ module UDPShellP { void action_uptime(int argc, char **argv) { -#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) +#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) int len; uint64_t tval = call Uptime.get(); atomic @@ -277,7 +289,7 @@ module UDPShellP { call UDP.sendto(&session_endpoint, reply_buf, len); } -#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) +#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) async event void Uptime.overflow() { atomic uptime += 0xffffffff; From 4e89d73907c516bc469aa158df74e5ca35f301d6 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 5 Mar 2011 17:45:14 -0800 Subject: [PATCH 007/411] move z1-0.16 tos/platforms/z1 into msp430 (mm-z1) --- 00_CopyrightTemplate | 33 ++ 01_Merge_Notes | 2 + tos/platforms/z1/.platform | 49 +++ tos/platforms/z1/ActiveMessageC.nc | 84 ++++ tos/platforms/z1/DemoSensorC.nc | 21 + tos/platforms/z1/HplUserButtonC.nc | 54 +++ tos/platforms/z1/Ieee154MessageC.nc | 68 ++++ tos/platforms/z1/LedsIntensity.nc | 5 + tos/platforms/z1/LedsIntensityC.nc | 15 + tos/platforms/z1/LedsIntensityP.nc | 111 ++++++ tos/platforms/z1/Msp430Timer32khzMapC.nc | 86 ++++ tos/platforms/z1/PlatformC.nc | 14 + tos/platforms/z1/PlatformLedsC.nc | 32 ++ tos/platforms/z1/PlatformP.nc | 17 + tos/platforms/z1/PlatformSerialC.nc | 21 + tos/platforms/z1/SwitchToggleC.nc | 91 +++++ tos/platforms/z1/UserButton.h | 44 +++ tos/platforms/z1/UserButtonC.nc | 63 +++ tos/platforms/z1/UserButtonP.nc | 77 ++++ tos/platforms/z1/chips/adxl345/HplADXL345C.nc | 28 ++ .../z1/chips/cc2420/HplCC2420AlarmC.nc | 54 +++ .../z1/chips/cc2420/HplCC2420InterruptsC.nc | 67 ++++ .../z1/chips/cc2420/HplCC2420PinsC.nc | 91 +++++ .../z1/chips/cc2420/HplCC2420SpiC.nc | 56 +++ .../z1/chips/msp430X/adc12/BatteryC.nc | 17 + .../z1/chips/msp430X/adc12/BatteryP.nc | 26 ++ .../z1/chips/msp430X/usci/Msp430I2C1P.nc | 69 ++++ .../chips/msp430X/usci/Msp430SpiNoDmaB0P.nc | 73 ++++ .../z1/chips/msp430X/usci/Z1SerialP.nc | 29 ++ .../z1/chips/msp430X/usci/Z1UsciP.nc | 43 ++ .../z1/chips/msp430X/usci/printfZ1.h | 373 ++++++++++++++++++ .../z1/chips/sht11/HalSensirionSht11C.nc | 21 + .../z1/chips/sht11/HplSensirionSht11C.nc | 42 ++ .../z1/chips/sht11/HplSensirionSht11P.nc | 44 +++ .../z1/chips/sht11/SensirionSht11C.nc | 25 ++ .../z1/chips/stm25p/HplStm25pPinsC.nc | 26 ++ .../z1/chips/stm25p/HplStm25pSpiC.nc | 25 ++ .../z1/chips/tmp102/HalTMP102Advanced.nc | 36 ++ .../z1/chips/tmp102/HalTMP102ControlP.nc | 277 +++++++++++++ .../z1/chips/tmp102/HalTMP102ReaderP.nc | 94 +++++ tos/platforms/z1/chips/tmp102/HplTMP102.nc | 81 ++++ .../z1/chips/tmp102/HplTMP102LogicP.nc | 289 ++++++++++++++ tos/platforms/z1/chips/tmp102/TMP102.h | 77 ++++ tos/platforms/z1/chips/tmp102/TMP102C.nc | 61 +++ .../z1/chips/tmp102/TMP102InternalC.nc | 73 ++++ .../z1/chips/tmp102/TMP102InternalP.nc | 84 ++++ tos/platforms/z1/hardware.h | 24 ++ tos/platforms/z1/platform.h | 0 tos/platforms/z1/platform_message.h | 70 ++++ 49 files changed, 3162 insertions(+) create mode 100644 00_CopyrightTemplate create mode 100644 tos/platforms/z1/.platform create mode 100644 tos/platforms/z1/ActiveMessageC.nc create mode 100644 tos/platforms/z1/DemoSensorC.nc create mode 100644 tos/platforms/z1/HplUserButtonC.nc create mode 100644 tos/platforms/z1/Ieee154MessageC.nc create mode 100644 tos/platforms/z1/LedsIntensity.nc create mode 100644 tos/platforms/z1/LedsIntensityC.nc create mode 100644 tos/platforms/z1/LedsIntensityP.nc create mode 100644 tos/platforms/z1/Msp430Timer32khzMapC.nc create mode 100644 tos/platforms/z1/PlatformC.nc create mode 100644 tos/platforms/z1/PlatformLedsC.nc create mode 100644 tos/platforms/z1/PlatformP.nc create mode 100644 tos/platforms/z1/PlatformSerialC.nc create mode 100644 tos/platforms/z1/SwitchToggleC.nc create mode 100644 tos/platforms/z1/UserButton.h create mode 100644 tos/platforms/z1/UserButtonC.nc create mode 100644 tos/platforms/z1/UserButtonP.nc create mode 100644 tos/platforms/z1/chips/adxl345/HplADXL345C.nc create mode 100644 tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc create mode 100644 tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc create mode 100644 tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc create mode 100644 tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc create mode 100644 tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc create mode 100644 tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc create mode 100644 tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc create mode 100644 tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc create mode 100644 tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc create mode 100644 tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc create mode 100644 tos/platforms/z1/chips/msp430X/usci/printfZ1.h create mode 100644 tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc create mode 100644 tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc create mode 100644 tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc create mode 100644 tos/platforms/z1/chips/sht11/SensirionSht11C.nc create mode 100644 tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc create mode 100644 tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc create mode 100644 tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc create mode 100644 tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc create mode 100644 tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc create mode 100644 tos/platforms/z1/chips/tmp102/HplTMP102.nc create mode 100644 tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc create mode 100644 tos/platforms/z1/chips/tmp102/TMP102.h create mode 100644 tos/platforms/z1/chips/tmp102/TMP102C.nc create mode 100644 tos/platforms/z1/chips/tmp102/TMP102InternalC.nc create mode 100644 tos/platforms/z1/chips/tmp102/TMP102InternalP.nc create mode 100644 tos/platforms/z1/hardware.h create mode 100644 tos/platforms/z1/platform.h create mode 100644 tos/platforms/z1/platform_message.h diff --git a/00_CopyrightTemplate b/00_CopyrightTemplate new file mode 100644 index 0000000000..b445f398b7 --- /dev/null +++ b/00_CopyrightTemplate @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2011 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ diff --git a/01_Merge_Notes b/01_Merge_Notes index 8bfe4c4ddb..b23e361399 100644 --- a/01_Merge_Notes +++ b/01_Merge_Notes @@ -14,3 +14,5 @@ * In apps/IPBaseStation/BaseStationP.nc, Z1 brought in #include CC2420.h that is inside an #ifndef SIM. Why the ifndef? +* want to check tos/platforms/z1/ for duplicates vs. tos/chips/msp430 when done integrating + and collapsing. diff --git a/tos/platforms/z1/.platform b/tos/platforms/z1/.platform new file mode 100644 index 0000000000..788086a9b9 --- /dev/null +++ b/tos/platforms/z1/.platform @@ -0,0 +1,49 @@ + +push( @includes, qw( + %T/platforms/z1 + %T/platforms/z1/chips/adxl345 + %T/platforms/z1/chips/cc2420 + %T/platforms/z1/chips/lis302 + %T/platforms/z1/chips/mma7455 + %T/platforms/z1/chips/m25p80 + %T/platforms/z1/chips/msp430X/adc12 + %T/platforms/z1/chips/msp430X/usci + %T/platforms/z1/chips/pic12f519 + %T/platforms/z1/chips/stm25p + %T/platforms/z1/chips/sht11 + %T/chips/cc2420 + %T/chips/cc2420/alarm + %T/chips/cc2420/control + %T/chips/cc2420/csma + %T/chips/cc2420/interfaces + %T/chips/cc2420/link + %T/chips/cc2420/lowpan + %T/chips/cc2420/lpl + %T/chips/cc2420/packet + %T/chips/cc2420/receive + %T/chips/cc2420/spi + %T/chips/cc2420/transmit + %T/chips/cc2420/unique + %T/chips/msp430X + %T/chips/msp430X/adc12 + %T/chips/msp430X/dma + %T/chips/msp430X/pins + %T/chips/msp430X/timer + %T/chips/msp430X/usci + %T/chips/msp430X/sensors + %T/chips/stm25p + %T/chips/sht11 + %T/chips/tmp102 + %T/chips/adxl345 + %T/lib/timer + %T/lib/serial + %T/lib/power +) ); + +@opts = qw( + -gcc=msp430-gcc + -mmcu=msp430x2617 + -fnesc-target=msp430 + -fnesc-no-debug + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask +); diff --git a/tos/platforms/z1/ActiveMessageC.nc b/tos/platforms/z1/ActiveMessageC.nc new file mode 100644 index 0000000000..4cade99d95 --- /dev/null +++ b/tos/platforms/z1/ActiveMessageC.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2004-2005 The Regents of the University of California. + * Copyright (c) 2004-2005 Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + * + * @author Philip Levis + * @version $Id: ActiveMessageC.nc,v 1.8 2009/09/16 00:51:51 razvanm Exp $ + */ + +/** + * + * The Active Message layer on the Telos platform. This is a naming wrapper + * around the CC2420 Active Message layer. + * + */ +#include "Timer.h" + +configuration ActiveMessageC { + provides { + interface SplitControl; + + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; + interface PacketTimeStamp as PacketTimeStamp32khz; + interface PacketTimeStamp as PacketTimeStampMilli; + interface LowPowerListening; + } +} +implementation { + components CC2420ActiveMessageC as AM; + + SplitControl = AM; + + AMSend = AM; + Receive = AM.Receive; + Snoop = AM.Snoop; + Packet = AM; + AMPacket = AM; + PacketAcknowledgements = AM; + LowPowerListening = AM; + + components CC2420PacketC; + PacketTimeStamp32khz = CC2420PacketC; + PacketTimeStampMilli = CC2420PacketC; +} diff --git a/tos/platforms/z1/DemoSensorC.nc b/tos/platforms/z1/DemoSensorC.nc new file mode 100644 index 0000000000..85d57646fd --- /dev/null +++ b/tos/platforms/z1/DemoSensorC.nc @@ -0,0 +1,21 @@ +/** + * DemoSensorC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular DemoSensorC on the z1 platform provides a + * voltage reading, using BatteryC. + * + * @author Jordi Soucheiron + * @version $Revision: 1.0 $ $Date: 2010/04/28 10:51:45 $ + */ + +generic configuration DemoSensorC() { + provides interface Read; +} + +implementation { + components new BatteryC() as DemoSensor; + Read = DemoSensor; +} diff --git a/tos/platforms/z1/HplUserButtonC.nc b/tos/platforms/z1/HplUserButtonC.nc new file mode 100644 index 0000000000..3d7407fc4e --- /dev/null +++ b/tos/platforms/z1/HplUserButtonC.nc @@ -0,0 +1,54 @@ +/** + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Implementation of the user button for the telos platform + * + * @author Gilman Tolle + * @version $Revision: 1.1 $ + */ + +configuration HplUserButtonC { + provides interface GeneralIO; + provides interface GpioInterrupt; +} +implementation { + components HplMsp430GeneralIOC as GeneralIOC; + components HplMsp430InterruptC as InterruptC; + + components new Msp430GpioC() as UserButtonC; + UserButtonC -> GeneralIOC.Port25; + GeneralIO = UserButtonC; + + components new Msp430InterruptC() as InterruptUserButtonC; + InterruptUserButtonC.HplInterrupt -> InterruptC.Port25; + GpioInterrupt = InterruptUserButtonC.Interrupt; +} diff --git a/tos/platforms/z1/Ieee154MessageC.nc b/tos/platforms/z1/Ieee154MessageC.nc new file mode 100644 index 0000000000..145a3a8493 --- /dev/null +++ b/tos/platforms/z1/Ieee154MessageC.nc @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2008 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Stephen Dawson-Haggerty + */ + +configuration Ieee154MessageC { + provides { + interface SplitControl; + + interface Resource as SendResource[uint8_t clientId]; + interface Ieee154Send; + interface Receive as Ieee154Receive; + + interface Ieee154Packet; + interface Packet; + + interface PacketAcknowledgements; + interface LinkPacketMetadata; + interface LowPowerListening; + interface PacketLink; + } + +} implementation { + components CC2420Ieee154MessageC as Msg; + + SplitControl = Msg; + SendResource = Msg; + Ieee154Send = Msg; + Ieee154Receive = Msg; + Ieee154Packet = Msg; + Packet = Msg; + + PacketAcknowledgements = Msg; + LinkPacketMetadata = Msg; + LowPowerListening = Msg; + PacketLink = Msg; +} diff --git a/tos/platforms/z1/LedsIntensity.nc b/tos/platforms/z1/LedsIntensity.nc new file mode 100644 index 0000000000..9e2f93bdda --- /dev/null +++ b/tos/platforms/z1/LedsIntensity.nc @@ -0,0 +1,5 @@ +interface LedsIntensity +{ + command void set( uint8_t ledNum, uint8_t intensity ); + command void glow(uint8_t a, uint8_t b); +} diff --git a/tos/platforms/z1/LedsIntensityC.nc b/tos/platforms/z1/LedsIntensityC.nc new file mode 100644 index 0000000000..9013330f30 --- /dev/null +++ b/tos/platforms/z1/LedsIntensityC.nc @@ -0,0 +1,15 @@ +configuration LedsIntensityC +{ + provides interface StdControl; + provides interface LedsIntensity; +} +implementation +{ + components new LedsIntensityP(), LedsC, MainC; + + StdControl = LedsIntensityP; + LedsIntensity = LedsIntensityP; + + LedsIntensityP.Leds -> LedsC; + LedsIntensityP.Boot -> MainC; +} diff --git a/tos/platforms/z1/LedsIntensityP.nc b/tos/platforms/z1/LedsIntensityP.nc new file mode 100644 index 0000000000..3dc9ba8bce --- /dev/null +++ b/tos/platforms/z1/LedsIntensityP.nc @@ -0,0 +1,111 @@ +generic module LedsIntensityP() { + provides interface StdControl; + provides interface LedsIntensity; + uses interface Leds; + uses interface Boot; +} +implementation +{ + enum + { + NUM_LEDS = 3, + NUM_INTENSITY = 32, + RESOLUTION = 128, + }; + + bool m_run; + int8_t m_intensity[NUM_LEDS]; + int8_t m_accum[NUM_LEDS]; + static const int8_t m_exp[NUM_INTENSITY] = { + 0, 0, 0, 1, 1, 1, 2, 2, 2, 3, 4, 5, 6, 7, 8, 9, + 11, 13, 16, 19, 22, 26, 30, 36, 42, 49, 58, 67, 79, 93, 108, 127, + }; + + + void wait(uint16_t t) { + for ( ; t > 0; t-- ); + } + + void longwait( uint16_t t ) { + for( ; t > 0; t-- ) + wait(0xa0); + } + + task void dimleds() + { + if( m_run ) + { + int i; + int ledval = 0; + for( i=NUM_LEDS-1; i>=0; i-- ) + { + ledval <<= 1; + if( (m_accum[i] += m_intensity[i]) >= 0 ) + { + m_accum[i] -= (RESOLUTION-1); + ledval |= 1; + } + } + call Leds.set( ledval ); + post dimleds(); + } + else + { + call Leds.set( 0 ); + } + } + + command void LedsIntensity.set( uint8_t ledNum, uint8_t intensity ) + { + if( ledNum < NUM_LEDS ) + { + intensity >>= 3; + if( intensity >= (NUM_INTENSITY-1) ) + { + m_intensity[ledNum] = m_exp[NUM_INTENSITY-1]; + m_accum[ledNum] = 0; + } + else + { + m_intensity[ledNum] = m_exp[intensity]; + if( m_intensity[ledNum] == 0 ) + m_accum[ledNum] = -1; + } + } + } + + command void LedsIntensity.glow(uint8_t a, uint8_t b) { + int i; + for (i = 1536; i > 0; i -= 4) { + call Leds.set(a); + longwait(i); + call Leds.set(b); + longwait(1536-i); + } + } + + + event void Boot.booted() + { + int i; + for( i=0; i + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ + */ + +configuration Msp430Timer32khzMapC +{ + provides interface Msp430Timer[ uint8_t id ]; + provides interface Msp430TimerControl[ uint8_t id ]; + provides interface Msp430Compare[ uint8_t id ]; +} +implementation +{ + components Msp430TimerC; + + Msp430Timer[0] = Msp430TimerC.TimerB; + Msp430TimerControl[0] = Msp430TimerC.ControlB0; + Msp430Compare[0] = Msp430TimerC.CompareB0; + + // Timer pin B1 is used by the CC2420 radio's SFD pin + // this is the only difference between the default 32khz map + // and the map on telos + + Msp430Timer[1] = Msp430TimerC.TimerB; + Msp430TimerControl[1] = Msp430TimerC.ControlB2; + Msp430Compare[1] = Msp430TimerC.CompareB2; + + Msp430Timer[2] = Msp430TimerC.TimerB; + Msp430TimerControl[2] = Msp430TimerC.ControlB3; + Msp430Compare[2] = Msp430TimerC.CompareB3; + + Msp430Timer[3] = Msp430TimerC.TimerB; + Msp430TimerControl[3] = Msp430TimerC.ControlB4; + Msp430Compare[3] = Msp430TimerC.CompareB4; + + Msp430Timer[4] = Msp430TimerC.TimerB; + Msp430TimerControl[4] = Msp430TimerC.ControlB5; + Msp430Compare[4] = Msp430TimerC.CompareB5; + + Msp430Timer[5] = Msp430TimerC.TimerB; + Msp430TimerControl[5] = Msp430TimerC.ControlB6; + Msp430Compare[5] = Msp430TimerC.CompareB6; +} diff --git a/tos/platforms/z1/PlatformC.nc b/tos/platforms/z1/PlatformC.nc new file mode 100644 index 0000000000..33e7b80539 --- /dev/null +++ b/tos/platforms/z1/PlatformC.nc @@ -0,0 +1,14 @@ +#include "hardware.h" + +configuration PlatformC +{ + provides interface Init; +} +implementation +{ + components PlatformP, Msp430ClockC; + + Init = PlatformP; + PlatformP.Msp430ClockInit -> Msp430ClockC.Init; + +} diff --git a/tos/platforms/z1/PlatformLedsC.nc b/tos/platforms/z1/PlatformLedsC.nc new file mode 100644 index 0000000000..b00640e66d --- /dev/null +++ b/tos/platforms/z1/PlatformLedsC.nc @@ -0,0 +1,32 @@ +#include "hardware.h" + +configuration PlatformLedsC { + provides interface GeneralIO as Led0; + provides interface GeneralIO as Led1; + provides interface GeneralIO as Led2; + uses interface Init; +} +implementation +{ + components + HplMsp430GeneralIOC as GeneralIOC + , new Msp430GpioC() as Led0Impl + , new Msp430GpioC() as Led1Impl + , new Msp430GpioC() as Led2Impl + ; + components PlatformP; + + Init = PlatformP.LedsInit; + + Led0 = Led0Impl; + //THIS IS FOR THE ZOLERTIA OR TMOTE, CHANGED FOR THE FET LED + //Led0Impl -> GeneralIOC.Port54; + Led0Impl -> GeneralIOC.Port54; + + Led1 = Led1Impl; + Led1Impl -> GeneralIOC.Port56; + + Led2 = Led2Impl; + Led2Impl -> GeneralIOC.Port55; + +} diff --git a/tos/platforms/z1/PlatformP.nc b/tos/platforms/z1/PlatformP.nc new file mode 100644 index 0000000000..a761f5a63c --- /dev/null +++ b/tos/platforms/z1/PlatformP.nc @@ -0,0 +1,17 @@ +#include "hardware.h" + +module PlatformP{ + provides interface Init; + uses interface Init as Msp430ClockInit; + uses interface Init as LedsInit; +} +implementation { + command error_t Init.init() { + call Msp430ClockInit.init(); + call LedsInit.init(); + return SUCCESS; + } + + default command error_t LedsInit.init() { return SUCCESS; } + +} diff --git a/tos/platforms/z1/PlatformSerialC.nc b/tos/platforms/z1/PlatformSerialC.nc new file mode 100644 index 0000000000..9bac747b53 --- /dev/null +++ b/tos/platforms/z1/PlatformSerialC.nc @@ -0,0 +1,21 @@ + +configuration PlatformSerialC { + + provides interface StdControl; + provides interface UartStream; + provides interface UartByte; + +} + +implementation { + + components new Msp430Uart0C() as UartC; + UartStream = UartC; + UartByte = UartC; + + components Z1SerialP; + StdControl = Z1SerialP; + Z1SerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure; + Z1SerialP.Resource -> UartC.Resource; + +} diff --git a/tos/platforms/z1/SwitchToggleC.nc b/tos/platforms/z1/SwitchToggleC.nc new file mode 100644 index 0000000000..a23d2c1e26 --- /dev/null +++ b/tos/platforms/z1/SwitchToggleC.nc @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Generic layer to translate a GIO into a toggle switch + * + * @author Gilman Tolle + * @version $Revision: 1.1 $ + */ + +#include + +generic module SwitchToggleC() { + provides interface Get; + provides interface Notify; + + uses interface GeneralIO; + uses interface GpioInterrupt; +} +implementation { + norace bool m_pinHigh; + + task void sendEvent(); + + command bool Get.get() { return call GeneralIO.get(); } + + command error_t Notify.enable() { + call GeneralIO.makeInput(); + + if ( call GeneralIO.get() ) { + m_pinHigh = TRUE; + return call GpioInterrupt.enableFallingEdge(); + } else { + m_pinHigh = FALSE; + return call GpioInterrupt.enableRisingEdge(); + } + } + + command error_t Notify.disable() { + return call GpioInterrupt.disable(); + } + + async event void GpioInterrupt.fired() { + call GpioInterrupt.disable(); + + m_pinHigh = !m_pinHigh; + + post sendEvent(); + } + + task void sendEvent() { + bool pinHigh; + pinHigh = m_pinHigh; + + signal Notify.notify( pinHigh ); + + if ( pinHigh ) { + call GpioInterrupt.enableFallingEdge(); + } else { + call GpioInterrupt.enableRisingEdge(); + } + } +} diff --git a/tos/platforms/z1/UserButton.h b/tos/platforms/z1/UserButton.h new file mode 100644 index 0000000000..f9bc59247a --- /dev/null +++ b/tos/platforms/z1/UserButton.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + * @version $Revision: 1.1 $ + */ + +#ifndef USERBUTTON_H +#define USERBUTTON_H + +typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t; + +#endif diff --git a/tos/platforms/z1/UserButtonC.nc b/tos/platforms/z1/UserButtonC.nc new file mode 100644 index 0000000000..78c6642883 --- /dev/null +++ b/tos/platforms/z1/UserButtonC.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Implementation of the user button for the telosb platform. Get + * returns the current state of the button by reading the pin, + * regardless of whether enable() or disable() has been called on the + * Interface. Notify.enable() and Notify.disable() modify the + * underlying interrupt state of the pin, and have the effect of + * enabling or disabling notifications that the button has changed + * state. + * + * @author Gilman Tolle + * @version $Revision: 1.1 $ + */ + +#include + +configuration UserButtonC { + provides interface Get; + provides interface Notify; +} +implementation { + components HplUserButtonC; + components new SwitchToggleC(); + SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt; + SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO; + + components UserButtonP; + Get = UserButtonP; + Notify = UserButtonP; + + UserButtonP.GetLower -> SwitchToggleC.Get; + UserButtonP.NotifyLower -> SwitchToggleC.Notify; +} diff --git a/tos/platforms/z1/UserButtonP.nc b/tos/platforms/z1/UserButtonP.nc new file mode 100644 index 0000000000..97af271931 --- /dev/null +++ b/tos/platforms/z1/UserButtonP.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + * @version $Revision: 1.2 $ + */ + +#include + +module UserButtonP { + provides interface Get; + provides interface Notify; + + uses interface Get as GetLower; + uses interface Notify as NotifyLower; +} +implementation { + + command button_state_t Get.get() { + // telosb user button pin is high when released - invert state + if ( call GetLower.get() ) { + return BUTTON_RELEASED; + } else { + return BUTTON_PRESSED; + } + } + + command error_t Notify.enable() { + return call NotifyLower.enable(); + } + + command error_t Notify.disable() { + return call NotifyLower.disable(); + } + + event void NotifyLower.notify( bool val ) { + // telosb user button pin is high when released - invert state + if ( val ) { + signal Notify.notify( BUTTON_RELEASED ); + } else { + signal Notify.notify( BUTTON_PRESSED ); + } + } + + default event void Notify.notify( button_state_t val ) { } +} diff --git a/tos/platforms/z1/chips/adxl345/HplADXL345C.nc b/tos/platforms/z1/chips/adxl345/HplADXL345C.nc new file mode 100644 index 0000000000..e93629f7b3 --- /dev/null +++ b/tos/platforms/z1/chips/adxl345/HplADXL345C.nc @@ -0,0 +1,28 @@ + +configuration HplADXL345C { + provides interface GeneralIO as GeneralIO1; + provides interface GeneralIO as GeneralIO2; + provides interface GpioInterrupt as GpioInterrupt1; + provides interface GpioInterrupt as GpioInterrupt2; +} + +implementation { + components HplMsp430GeneralIOC as GeneralIOC; + components HplMsp430InterruptC as InterruptC; + + components new Msp430GpioC() as ADXL345Int1C; + ADXL345Int1C -> GeneralIOC.Port16; + GeneralIO1 = ADXL345Int1C; + + components new Msp430GpioC() as ADXL345Int2C; + ADXL345Int2C -> GeneralIOC.Port17; + GeneralIO2 = ADXL345Int2C; + + components new Msp430InterruptC() as InterruptAccel1C; + InterruptAccel1C.HplInterrupt -> InterruptC.Port16; + GpioInterrupt1 = InterruptAccel1C.Interrupt; + + components new Msp430InterruptC() as InterruptAccel2C; + InterruptAccel2C.HplInterrupt -> InterruptC.Port17; + GpioInterrupt2 = InterruptAccel2C.Interrupt; +} diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc new file mode 100644 index 0000000000..06c572c92b --- /dev/null +++ b/tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HPL implementation of 32khz alarms for the ChipCon CC2420 radio + * connected to a TI MSP430 processor. + * + * @author Jonathan Hui + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ + */ + +generic configuration HplCC2420AlarmC() { + + provides interface Init; + provides interface Alarm as Alarm32khz32; + +} + +implementation { + + components new Alarm32khz32C(); + + Init = Alarm32khz32C; + Alarm32khz32 = Alarm32khz32C; + +} diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc new file mode 100644 index 0000000000..5c01aaf3de --- /dev/null +++ b/tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HPL implementation of interrupts and captures for the ChipCon + * CC2420 radio connected to a TI MSP430 processor. + * + * @author Jonathan Hui + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ + */ + +configuration HplCC2420InterruptsC { + + provides interface GpioCapture as CaptureSFD; + provides interface GpioInterrupt as InterruptCCA; + provides interface GpioInterrupt as InterruptFIFOP; + +} + +implementation { + + components HplMsp430GeneralIOC as GeneralIOC; + components Msp430TimerC; + components new GpioCaptureC() as CaptureSFDC; + CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlB1; + CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureB1; + CaptureSFDC.GeneralIO -> GeneralIOC.Port41; + + components HplMsp430InterruptC; + components new Msp430InterruptC() as InterruptCCAC; + components new Msp430InterruptC() as InterruptFIFOPC; + InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port14; + InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port12; + + CaptureSFD = CaptureSFDC.Capture; + InterruptCCA = InterruptCCAC.Interrupt; + InterruptFIFOP = InterruptFIFOPC.Interrupt; + +} diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc new file mode 100644 index 0000000000..c295bf075a --- /dev/null +++ b/tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HPL implementation of general-purpose I/O for the ChipCon CC2420 + * radio connected to a TI MSP430 processor. + * + * @author Jonathan Hui + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ + */ + +configuration HplCC2420PinsC { + + provides interface GeneralIO as CCA; + provides interface GeneralIO as CSN; + provides interface GeneralIO as FIFO; + provides interface GeneralIO as FIFOP; + provides interface GeneralIO as RSTN; + provides interface GeneralIO as SFD; + provides interface GeneralIO as VREN; + +} + +implementation { + + components HplMsp430GeneralIOC as GeneralIOC; + components new Msp430GpioC() as CCAM; + components new Msp430GpioC() as CSNM; + components new Msp430GpioC() as FIFOM; + components new Msp430GpioC() as FIFOPM; + components new Msp430GpioC() as RSTNM; + components new Msp430GpioC() as SFDM; + components new Msp430GpioC() as VRENM; + +/* Zoul + CCAM -> GeneralIOC.Port14; + CSNM -> GeneralIOC.Port42; + FIFOM -> GeneralIOC.Port13; + FIFOPM -> GeneralIOC.Port10; + RSTNM -> GeneralIOC.Port46; + SFDM -> GeneralIOC.Port41; + VRENM -> GeneralIOC.Port45; +*/ +// Z1 + CCAM -> GeneralIOC.Port14; + CSNM -> GeneralIOC.Port30; + FIFOM -> GeneralIOC.Port13; + FIFOPM -> GeneralIOC.Port12; + RSTNM -> GeneralIOC.Port46; + SFDM -> GeneralIOC.Port41; + VRENM -> GeneralIOC.Port45; + + + CCA = CCAM; + CSN = CSNM; + FIFO = FIFOM; + FIFOP = FIFOPM; + RSTN = RSTNM; + SFD = SFDM; + VREN = VRENM; + +} + diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc new file mode 100644 index 0000000000..8b358fe183 --- /dev/null +++ b/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HPL implementation of the SPI bus for the ChipCon CC2420 radio + * connected to a TI MSP430 processor. + * + * @author Jonathan Hui + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $ + */ + +generic configuration HplCC2420SpiC() { + + provides interface Resource; + provides interface SpiByte; + provides interface SpiPacket; + +} + +implementation { + + components new Msp430SpiB0C() as SpiC; + + Resource = SpiC; + SpiByte = SpiC; + SpiPacket = SpiC; + +} diff --git a/tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc b/tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc new file mode 100644 index 0000000000..6141df89d9 --- /dev/null +++ b/tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc @@ -0,0 +1,17 @@ +generic configuration BatteryC() { + provides interface DeviceMetadata; + provides interface Read; + provides interface ReadStream; +} +implementation { + components new AdcReadClientC(); + Read = AdcReadClientC; + + components new AdcReadStreamClientC(); + ReadStream = AdcReadStreamClientC; + + components BatteryP; + DeviceMetadata = BatteryP; + AdcReadClientC.AdcConfigure -> BatteryP; + AdcReadStreamClientC.AdcConfigure -> BatteryP; +} diff --git a/tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc b/tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc new file mode 100644 index 0000000000..7288e81fe2 --- /dev/null +++ b/tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc @@ -0,0 +1,26 @@ +#include "Msp430Adc12.h" + + +module BatteryP { + provides interface DeviceMetadata; + provides interface AdcConfigure; +} +implementation { + + msp430adc12_channel_config_t config = { + inch: SUPPLY_VOLTAGE_HALF_CHANNEL, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_1_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + command uint8_t DeviceMetadata.getSignificantBits() { return 12; } + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() { + return &config; + } +} diff --git a/tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc b/tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc new file mode 100644 index 0000000000..5b990c783b --- /dev/null +++ b/tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc @@ -0,0 +1,69 @@ +/** + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the DEXMA SENSORS SL nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Jonathan Hui + * @author Xavier Orduna + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ + */ + +configuration Msp430I2C1P { + + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[uint8_t id ]; + provides interface I2CPacket as I2CBasicAddr; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430I2CConfigure[ uint8_t id ]; + uses interface HplMsp430UsciInterrupts as Interrupts; + +} + +implementation { + + components new Msp430I2CP() as I2CP; + components new Z1UsciP() as Z1UsciP; + Resource = I2CP.Resource; + ResourceConfigure = I2CP.ResourceConfigure; + Msp430I2CConfigure = I2CP.Msp430I2CConfigure; + I2CP.Msp430I2CConfigure -> Z1UsciP.Msp430I2CConfigure; + I2CBasicAddr = I2CP.I2CBasicAddr; + UsciResource = I2CP.UsciResource; + Interrupts = I2CP.Interrupts; + + components HplMsp430UsciB1C as UsciC; + I2CP.UsciB -> UsciC; + +} diff --git a/tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc b/tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc new file mode 100644 index 0000000000..5b28442fc6 --- /dev/null +++ b/tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc @@ -0,0 +1,73 @@ +/** + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the DEXMA SENSORS SL nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Jonathan Hui + * @author Xavier Orduna + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ + */ + +configuration Msp430SpiNoDmaB0P { + + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[uint8_t id ]; + provides interface SpiByte; + provides interface SpiPacket[ uint8_t id ]; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430SpiConfigure[ uint8_t id ]; + uses interface HplMsp430UsciInterrupts as UsciInterrupts; + +} + +implementation { + + components new Msp430SpiNoDmaBP() as SpiP; + components new Z1UsciP() as Z1UsciP; + Resource = SpiP.Resource; + ResourceConfigure = SpiP.ResourceConfigure; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure; + SpiP.Msp430SpiConfigure -> Z1UsciP.Msp430SpiConfigure; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket; + UsciResource = SpiP.UsciResource; + UsciInterrupts = SpiP.UsciInterrupts; + + components HplMsp430UsciB0C as UsciC; + SpiP.Usci -> UsciC; + + components LedsC as Leds; + SpiP.Leds -> Leds; + +} diff --git a/tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc b/tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc new file mode 100644 index 0000000000..41a9cd2bff --- /dev/null +++ b/tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc @@ -0,0 +1,29 @@ +module Z1SerialP { + provides interface StdControl; + provides interface Msp430UartConfigure; + uses interface Resource; +} +implementation { + + msp430_uart_union_config_t msp430_uart_z1_config = { { + ubr: UBR_8MHZ_115200, + umctl: UMCTL_8MHZ_115200, + ucssel: 2, + } }; + +//, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1 + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + command error_t StdControl.stop(){ + call Resource.release(); + return SUCCESS; + } + event void Resource.granted(){} + + async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { + return &msp430_uart_z1_config; + } + +} diff --git a/tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc b/tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc new file mode 100644 index 0000000000..89d46ce44c --- /dev/null +++ b/tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc @@ -0,0 +1,43 @@ + + +/* why is this generic? */ + +generic module Z1UsciP() { + provides interface Msp430SpiConfigure[ uint8_t id ]; + provides interface Msp430I2CConfigure[ uint8_t id ]; +} +implementation { + + msp430_spi_union_config_t msp430_spi_z1_config = { { + ubr : 2, /* smclk/2 */ + ucmode : 0, /* 3 pin master, no ste */ + ucmst : 1, + uc7bit : 0, /* 8 bit */ + ucmsb : 1, /* msb first, compatible with msp430 usart */ + ucckpl : 1, /* inactive state low */ + ucckph : 0, /* data captured on rising, changed falling */ + ucssel : 2, /* smclk */ + } }; + + async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + return (msp430_spi_union_config_t*) &msp430_spi_z1_config; + } + + msp430_i2c_union_config_t msp430_i2c_z1_config = { { + ucmode : 3, /* i2c mode */ + ucmst : 1, /* master */ + ucmm : 0, /* single master */ + ucsla10 : 0, /* 7 bit slave */ + uca10 : 0, /* 7 bit us */ + uctr : 0, /* rx mode to start */ + ucssel : 2, /* smclk */ + i2coa : 1, /* our address is 1 */ + ucgcen : 1, /* respond to general call */ + ubr : 800, /* smclk/2 */ + } }; + + async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { + return (msp430_i2c_union_config_t *) &msp430_i2c_z1_config; + } + +} diff --git a/tos/platforms/z1/chips/msp430X/usci/printfZ1.h b/tos/platforms/z1/chips/msp430X/usci/printfZ1.h new file mode 100644 index 0000000000..7b613fc485 --- /dev/null +++ b/tos/platforms/z1/chips/msp430X/usci/printfZ1.h @@ -0,0 +1,373 @@ +/* + * Copyright (c) 2008 The Regents of the University of California. + * Copyright (c) 2005 The President and Fellows of Harvard College. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Writes printf like output to the UART. + * This works only on the AVR and MSP430 Microcontrollers! + *

+ * Note: For AVR we explicitly place the print statements in ROM; for + * MSP430 this is done by default! For AVR, if we don't place it + * explicitely in ROM, the statements will go in RAM, which will + * quickly cause a descent size program to run out of RAM. By default + * it doesn't disable the interupts; disabling the interupts when + * writing to the UART, slows down/makes the mote quite unresponsive, + * and can lead to problems! If you wish to disable all printfs to + * the UART, then comment the flag: PRINTFUART_ENABLED. + + * 

+ * How to use:
+ *   // (0) In your Makefile, define PRINTFUART_ENABLED
+ *   CFLAGS += -DPRINTFUART_ENABLED
+ *   // (1) Call printfUART_init() from your initialization function 
+ *   //     to initialize the UART
+ *   printfUART_init();
+ *   // (2) Set your UART client to the correct baud rate.  Look at 
+ *   //     the comments in printfUART_init(), to figure out what 
+ *   //     baud to use for your particular mote
+ *
+ *   // (3) Send printf statements like this:
+ *   printfUART("Hello World, we are in year= %u\n", 2004);
+ *   printfUART("Printing uint32_t variable, value= %lu\n", 4294967295);
+ *
+ * Examples and caveats:
+ *   // (1) - Must use curly braces in single section statements.  
+ *            (Look in the app.c to see why -- hint: it's a macro)
+ *   if (x < 3)
+ *       {printfUART("The value of x is %i\n", x);}
+ *   // (2) - Otherwise it more or less works like regular printf
+ *   printfUART("\nThe value of x=%u, and y=%u\n", x, y); 
+ *
+ * 
URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack
+ * @author Konrad Lorincz + * @version 2.0, January 5, 2005 + */ + +#ifndef PRINTFZ1_H +#define PRINTFZ1_H + +#ifndef PRINTFUART_H +#define PRINTFUART_H + +#include +#include + +#warning including printfZ1 + +// ------------------------------------------------------------------- +#ifdef PRINTFUART_ENABLED + #define DEBUGBUF_SIZE 256 + char debugbuf[DEBUGBUF_SIZE]; + char debugbufROMtoRAM[DEBUGBUF_SIZE]; + + #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) + #define printfUART(__format...) { \ + static const char strROM[] PROGMEM = __format; \ + strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM); \ + sprintf(debugbuf, debugbufROMtoRAM); \ + writedebug(); \ + } + #else // assume MSP430 architecture (e.g. TelosA, TelosB, etc.) + #define printfUART(__format...) { \ + sprintf(debugbuf, __format); \ + writedebug(); \ + } + #define printfz1(__format...) { \ + snprintf(debugbuf,DEBUGBUF_SIZE, __format); \ + writedebug(); \ + } + #endif +#else + #define printfz1(X, args...) dbg("printf", X, ## args) + #define printfUART(X, args...) dbg("printf", X, ## args) +// #define printfUART(__format...) {} + void printfz1_init() {} + void printfUART_init() {} +#endif + +#define NOprintfUART(__format...) + + +// ------------------------------------------------------------------- +#ifdef PRINTFUART_ENABLED + +/** + * Initialize the UART port. Call this from your startup routine. + */ +#define printfz1_init() {atomic printfUART_init_private();} +#define printfUART_init() {atomic printfUART_init_private();} +void printfUART_init_private() +{ + #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) + // 56K baud + outp(0,UBRR0H); + outp(15, UBRR0L); //set baud rate + outp((1< = STDRXD = ALT2(in) + GPIO<47> = STDTXD = ALT1(out) + *********/ + //atomic{ + + //configure the GPIO Alt functions and directions + _GPIO_setaltfn(46,2); // STD_RXD + _GPIO_setaltfn(47,1); // STD_TXD + + _GPDR(46) &= ~_GPIO_bit(46); // input + _GPDR(47) |= _GPIO_bit(47); // output + + STLCR |=LCR_DLAB; //turn on DLAB so we can change the divisor + STDLL = 8; //configure to 115200; + STDLH = 0; + STLCR &= ~(LCR_DLAB); //turn off DLAB + + STLCR |= 0x3; //configure to 8 bits + + STMCR &= ~MCR_LOOP; + STMCR |= MCR_OUT2; + STIER |= IER_RAVIE; + STIER |= IER_TIE; + STIER |= IER_UUE; //enable the UART + + //STMCR |= MCR_AFE; //Auto flow control enabled; + //STMCR |= MCR_RTS; + + STFCR |= FCR_TRFIFOE; //enable the fifos + +// call Interrupt.allocate(); +// call Interrupt.enable(); + //configure all the interrupt stuff + //make sure that the interrupt causes an IRQ not an FIQ + // __REG(0x40D00008) &= ~(1<<21); + //configure the priority as IPR1 + //__REG(0x40D00020) = (1<<31 | 21); + //unmask the interrupt + //__REG(0x40D00004) |= (1<<21); + + CKEN |= CKEN5_STUART; //enable the UART's clk + #elif defined(PLATFORM_Z1) + P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD + UCA0CTL1 |= UCSSEL_2; // CLK = ACLK + UCA0BR0 = 0x45; // 32kHz/9600 = 3.41 + UCA0BR1 = 0x00; // + UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 + UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** + + #else // assume TelosA, TelosB, etc. + // Variabel baud + // To change the baud rate, see /tos/platform/msp430/msp430baudrates.h + uint8_t source = SSEL_SMCLK; + uint16_t baudrate = 0x0012; // UBR_SMCLK_57600=0x0012 + uint8_t mctl = 0x84; // UMCTL_SMCLK_57600=0x84 + //uint16_t baudrate = 0x0009; // UBR_SMCLK_115200=0x0009 + //uint8_t mctl = 0x10; // UMCTL_SMCLK_115200=0x10 + + + uint16_t l_br = 0; + uint8_t l_mctl = 0; + uint8_t l_ssel = 0; + + TOSH_SEL_UTXD1_MODFUNC(); + TOSH_SEL_URXD1_MODFUNC(); + + + UCTL1 = SWRST; + UCTL1 |= CHAR; // 8-bit char, UART-mode + + U1RCTL &= ~URXEIE; // even erroneous characters trigger interrupts + + UCTL1 = SWRST; + UCTL1 |= CHAR; // 8-bit char, UART-mode + + if (l_ssel & 0x80) { + U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); + U1TCTL |= (l_ssel & 0x7F); + } + else { + U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); + U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz + } + + if ((l_mctl != 0) || (l_br != 0)) { + U1BR0 = l_br & 0x0FF; + U1BR1 = (l_br >> 8) & 0x0FF; + U1MCTL = l_mctl; + } + else { + U1BR0 = 0x03; // 9600 baud + U1BR1 = 0x00; + U1MCTL = 0x4A; + } + + ME2 &= ~USPIE1; // USART1 SPI module disable + ME2 |= (UTXE1 | URXE1); // USART1 UART module enable + + U1CTL &= ~SWRST; + + IFG2 &= ~(UTXIFG1 | URXIFG1); + IE2 &= ~(UTXIE1 | URXIE1); // interrupt disabled + + + + //async command void USARTControl.setClockSource(uint8_t source) { + // atomic { + l_ssel = source | 0x80; + U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); + U1TCTL |= (l_ssel & 0x7F); + // } + //} + //async command void USARTControl.setClockRate(uint16_t baudrate, uint8_t mctl) { + //atomic { + l_br = baudrate; + l_mctl = mctl; + U1BR0 = baudrate & 0x0FF; + U1BR1 = (baudrate >> 8) & 0x0FF; + U1MCTL = mctl; + //} + //} + + //async command result_t USARTControl.enableRxIntr(){ + //atomic { + IFG2 &= ~URXIFG1; + IE2 |= URXIE1; + //} + //return SUCCESS; + //} + + //async command result_t USARTControl.enableTxIntr(){ + //atomic { + IFG2 &= ~UTXIFG1; + IE2 |= UTXIE1; + //} + //return SUCCESS; + //} + + #endif +} + +#if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) +#elif defined(PLATFORM_IMOTE2) +#elif defined(PLATFORM_Z1) +#else // assume AVR architecture (e.g. TelosA, TelosB) + bool isTxIntrPending() + { + if (U1TCTL & TXEPT) { + return TRUE; + } + return FALSE; + } +#endif + +/** + * Outputs a char to the UART. + */ +void UARTPutChar(char c) +{ + if (c == '\n') + UARTPutChar('\r'); + + + #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) + loop_until_bit_is_set(UCSR0A, UDRE); + outb(UDR0,c); + + #elif defined(PLATFORM_IMOTE2) + STTHR = c; + #elif defined(PLATFORM_Z1) + while (!(IFG2&UCA0TXIFG)); + atomic UCA0TXBUF = c; + + #else // assume AVR architecture (e.g. TelosA, TelosB) + U1TXBUF = c; + while( !isTxIntrPending() ) + continue; + #endif +} + +/** + * Outputs the entire debugbuf to the UART, or until it encounters '\0'. + */ +void writedebug() +{ + uint16_t i = 0; + + while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE) + UARTPutChar(debugbuf[i++]); +} + +#endif // PRINTFUART_ENABLED +// ------------------------------------------------------------------- + +#if 0 +// -------------------------------------------------------------- +#define assertUART(x) if (!(x)) { __assertUART(__FILE__, __LINE__); } +void __assertUART(const char* file, int line) +{ + printfUART("ASSERT FAILED: file= %s, lineNbr= %i\n", file, line); + // for some reason, CLR means on + // its because its low true logic as defined at the h/w. namely when the + // controlling bit gets set to 0 (clr), the diode is forward biased and the + // led starts to emit. + + TOSH_MAKE_RED_LED_OUTPUT(); + TOSH_MAKE_YELLOW_LED_OUTPUT(); + TOSH_MAKE_GREEN_LED_OUTPUT(); + TOSH_CLR_RED_LED_PIN(); + TOSH_CLR_YELLOW_LED_PIN(); + TOSH_CLR_GREEN_LED_PIN(); + for (;;); +} +// -------------------------------------------------------------- +#endif + +#endif // PRINTFUART_H +#endif // PRINTFZ1_H diff --git a/tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc b/tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc new file mode 100644 index 0000000000..cf5792e770 --- /dev/null +++ b/tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc @@ -0,0 +1,21 @@ + +configuration HalSensirionSht11C { + provides interface Resource[ uint8_t client ]; + provides interface SensirionSht11[ uint8_t client ]; +} +implementation { + components new SensirionSht11LogicP(); + SensirionSht11 = SensirionSht11LogicP; + + components HplSensirionSht11C; + Resource = HplSensirionSht11C.Resource; + SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA; + SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK; + SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA; + + components new TimerMilliC(); + SensirionSht11LogicP.Timer -> TimerMilliC; + + components LedsC; + SensirionSht11LogicP.Leds -> LedsC; +} diff --git a/tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc b/tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc new file mode 100644 index 0000000000..046b961012 --- /dev/null +++ b/tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc @@ -0,0 +1,42 @@ + +configuration HplSensirionSht11C { + provides interface Resource[ uint8_t id ]; + provides interface GeneralIO as DATA; + provides interface GeneralIO as SCK; + provides interface GpioInterrupt as InterruptDATA; +} +implementation { + components HplMsp430GeneralIOC; + + components new Msp430GpioC() as DATAM; + components new Msp430GpioC() as SCKM; + components new Msp430GpioC() as PWRM; + + DATAM -> HplMsp430GeneralIOC.Port10; + SCKM -> HplMsp430GeneralIOC.Port16; + PWRM -> HplMsp430GeneralIOC.Port21; + + DATA = DATAM; + SCK = SCKM; + + components HplSensirionSht11P; + HplSensirionSht11P.PWR -> PWRM; + HplSensirionSht11P.DATA -> DATAM; + HplSensirionSht11P.SCK -> SCKM; + + components new TimerMilliC(); + HplSensirionSht11P.Timer -> TimerMilliC; + + components HplMsp430InterruptC; + components new Msp430InterruptC() as InterruptDATAC; + InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port10; + InterruptDATA = InterruptDATAC.Interrupt; + + components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter; + Resource = Arbiter; + + components new SplitControlPowerManagerC(); + SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P; + SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo; + SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner; +} diff --git a/tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc b/tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc new file mode 100644 index 0000000000..02ab426d05 --- /dev/null +++ b/tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc @@ -0,0 +1,44 @@ + +#include "Timer.h" + +/** + * HplSensirionSht11P is a low-level component that controls power for + * the Sensirion SHT11 sensor on the telosb platform. + */ + +module HplSensirionSht11P { + provides interface SplitControl; + uses interface Timer; + uses interface GeneralIO as PWR; + uses interface GeneralIO as DATA; + uses interface GeneralIO as SCK; +} +implementation { + task void stopTask(); + + command error_t SplitControl.start() { + call PWR.makeOutput(); + call PWR.set(); + call Timer.startOneShot( 11 ); + return SUCCESS; + } + + event void Timer.fired() { + signal SplitControl.startDone( SUCCESS ); + } + + command error_t SplitControl.stop() { + call SCK.makeInput(); + call SCK.clr(); + call DATA.makeInput(); + call DATA.clr(); + call PWR.clr(); + post stopTask(); + return SUCCESS; + } + + task void stopTask() { + signal SplitControl.stopDone( SUCCESS ); + } +} + diff --git a/tos/platforms/z1/chips/sht11/SensirionSht11C.nc b/tos/platforms/z1/chips/sht11/SensirionSht11C.nc new file mode 100644 index 0000000000..094b003514 --- /dev/null +++ b/tos/platforms/z1/chips/sht11/SensirionSht11C.nc @@ -0,0 +1,25 @@ + +generic configuration SensirionSht11C() { + provides interface Read as Temperature; + provides interface DeviceMetadata as TemperatureMetadata; + provides interface Read as Humidity; + provides interface DeviceMetadata as HumidityMetadata; +} +implementation { + components new SensirionSht11ReaderP(); + + Temperature = SensirionSht11ReaderP.Temperature; + TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata; + Humidity = SensirionSht11ReaderP.Humidity; + HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata; + + components HalSensirionSht11C; + + enum { TEMP_KEY = unique("Sht11.Resource") }; + enum { HUM_KEY = unique("Sht11.Resource") }; + + SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ]; + SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ]; + SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ]; + SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ]; +} diff --git a/tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc b/tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc new file mode 100644 index 0000000000..f941d759ab --- /dev/null +++ b/tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc @@ -0,0 +1,26 @@ + +/** + * HPL implementation of general-purpose I/O for a ST M25P chip + * connected to a TI MSP430. + */ + +configuration HplStm25pPinsC { + + provides interface GeneralIO as CSN; + provides interface GeneralIO as Hold; + +} + +implementation { + + components HplMsp430GeneralIOC as HplGeneralIOC; + components new Msp430GpioC() as CSNM; + components new Msp430GpioC() as HoldM; + + CSNM -> HplGeneralIOC.Port44; + HoldM -> HplGeneralIOC.Port57; + + CSN = CSNM; + Hold = HoldM; + +} diff --git a/tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc b/tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc new file mode 100644 index 0000000000..8b06c741c2 --- /dev/null +++ b/tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc @@ -0,0 +1,25 @@ + +/** + * HPL implementation of the Spi bus for a ST M25P chip connected to a + * TI MSP430. + * + * @author Jonathan Hui + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $ + */ + +configuration HplStm25pSpiC { + + provides interface Resource; + provides interface SpiByte; + provides interface SpiPacket; + +} + +implementation { + + components new Msp430SpiB0C() as SpiC; + Resource = SpiC; + SpiByte = SpiC; + SpiPacket = SpiC; + +} diff --git a/tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc b/tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc new file mode 100644 index 0000000000..f79b8d2f2d --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc @@ -0,0 +1,36 @@ + +/** + * HalTMP175Advanced is the HAL control interface for the TI TMP175 + * Digital Temperature Sensor. + */ + +#include "TMP102.h" + +interface HalTMP102Advanced { + + command error_t setThermostatMode(bool useInt); + event void setThermostatModeDone(error_t error); + command error_t setPolarity(bool polarity); + event void setPolarityDone(error_t error); + command error_t setFaultQueue(tmp102_fqd_t depth); + event void setFaultQueueDone(error_t error); + command error_t setTLow(uint16_t val); + event void setTLowDone(error_t error); + command error_t setTHigh(uint16_t val); + event void setTHighDone(error_t error); + + //it is not possible to configure sensor resolution + + + event void alertThreshold(); + + /* We must include following modes for TMP102 */ + //conversion rate + //extended mode + command error_t setExtendedMode(bool extendedmode); + event void setExtendedModeDone(error_t error); + command error_t setConversionRate(tmp102_cr_t rate); + event void setConversionRateDone(error_t error); + + +} diff --git a/tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc b/tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc new file mode 100644 index 0000000000..3d437df62d --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc @@ -0,0 +1,277 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arched Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HalTMP175ControlP device specific Hal interfaces for the TI TMP175 Chip. + * + * Note that only the data path uses split phase resource arbitration + * + * @author Phil Buonadonna + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ + */ + +module HalTMP102ControlP +{ + provides interface HalTMP102Advanced; + + uses interface HplTMP102; + uses interface Resource as TMP102Resource; +} + +implementation { + + enum { + STATE_SET_MODE, + STATE_SET_POLARITY, + STATE_SET_FQ, + STATE_SET_CR, + STATE_SET_EM + STATE_NONE, + + STATE_SET_TLOW, + STATE_SET_THIGH, + }; + + uint8_t mState = STATE_NONE; + uint8_t mConfigRegVal = 0; + error_t mHplError; + + task void complete_Alert() { + signal HalTMP102Advanced.alertThreshold(); + } + + static error_t setCfg(uint8_t nextState, uint32_t val) { + error_t error; + + mState = nextState; + + error = call HplTMP102.setConfigReg(val); + + if (error) { + call TMP102Resource.release(); + } + else { + mConfigRegVal = val; + } + + return error; + } + + static error_t setThresh(uint8_t nextState, uint32_t val) { + error_t error; + + mState = nextState; + + if(mState == STATE_SET_TLOW) + error = call HplTMP102.setTLowReg(val << 4); + else + error = call HplTMP102.setTHighReg(val << 4); + + if (error) { + call TMP102Resource.release(); + } + + return error; + } + + command error_t HalTMP102Advanced.setThermostatMode(bool useInt) { + error_t error; + uint8_t newRegVal; + + error = call TMP102Resource.immediateRequest(); + if (error) { + return error; + } + + newRegVal = (useInt) ? (mConfigRegVal | TMP102_CFG_TM) : (mConfigRegVal & ~TMP102_CFG_TM); + error = setCfg(STATE_SET_MODE, newRegVal); + + return error; + } + + + command error_t HalTMP175Advanced.setPolarity(bool polarity) { + error_t error; + uint8_t newRegVal; + + error = call TMP102Resource.immediateRequest(); + if (error) { + return error; + } + + newRegVal = (polarity) ? (mConfigRegVal | TMP102_CFG_POL) : (mConfigRegVal & ~TMP102_CFG_POL); + error = setCfg(STATE_SET_POLARITY, newRegVal); + + return error; + } + + command error_t HalTMP175Advanced.setFaultQueue(tmp102_fqd_t depth) { + error_t error; + uint8_t newRegVal; + + if ((uint8_t)depth > 3) { + error = EINVAL; + return error; + } + + error = call TMP102Resource.immediateRequest(); + if (error) { + return error; + } + + newRegVal = (mConfigRegVal & ~TMP102_CFG_FQ(3)) | (TMP102_CFG_FQ(depth)); + error = setCfg(STATE_SET_FQ, newRegVal); + + return error; + } + + command error_t HalTMP102Advanced.setTLow(uint16_t val) { + error_t error; + + error = call TMP102Resource.immediateRequest(); + if (error) { + return error; + } + + error = setThresh(STATE_SET_TLOW, val); + + if (error) { + call TMP102Resource.release(); + } + + return error; + } + + command error_t HalTMP102Advanced.setTHigh(uint16_t val) { + error_t error; + + error = call TMP102Resource.immediateRequest(); + if (error) { + return error; + } + + error = setThresh(STATE_SET_THIGH, val); + + if (error) { + call TMP102Resource.release(); + } + + return error; + } + + task void handleConfigReg() { + error_t lasterror; + atomic lasterror = mHplError; + call TMP102Resource.release(); + switch (mState) { + case STATE_SET_MODE: + mState = STATE_NONE; + signal HalTMP102Advanced.setThermostatModeDone(lasterror); + break; + case STATE_SET_POLARITY: + mState = STATE_NONE; + signal HalTMP102Advanced.setPolarityDone(lasterror); + break; + case STATE_SET_FQ: + mState = STATE_NONE; + signal HalTMP102Advanced.setFaultQueueDone(lasterror); + break; + case STATE_SET_RES: + mState = STATE_NONE; + signal HalTMP102Advanced.setResolutionDone(lasterror); + break; + default: + break; + } + //mState = STATE_NONE; + return; + } + + task void handleTReg() { + error_t lasterror; + atomic lasterror = mHplError; + call TMP102Resource.release(); + switch (mState) { + case STATE_SET_TLOW: + mState = STATE_NONE; + signal HalTMP102Advanced.setTLowDone(lasterror); + break; + case STATE_SET_THIGH: + mState = STATE_NONE; + signal HalTMP102Advanced.setTHighDone(lasterror); + break; + default: + mState = STATE_NONE; + break; + } + //mState = STATE_NONE; + } + + event void TMP102Resource.granted() { + // intentionally left blank + } + + async event void HplTMP102.setConfigRegDone(error_t error) { + mHplError = error; + post handleConfigReg(); + return; + } + + async event void HplTMP102.setTLowRegDone(error_t error) { + mHplError = error; + post handleTReg(); + + } + + async event void HplTMP102.setTHighRegDone(error_t error) { + mHplError = error; + post handleTReg(); + } + + async event void HplTMP102.alertThreshold() { + post complete_Alert(); + } + + async event void HplTMP102.measureTemperatureDone(error_t error, uint16_t val) { + // intentionally left blank + } + + default event void HalTMP102Advanced.setTHighDone(error_t error) { return; } + default event void HalTMP102Advanced.setThermostatModeDone(error_t error){ return; } + default event void HalTMP102Advanced.setPolarityDone(error_t error){ return; } + default event void HalTMP102Advanced.setFaultQueueDone(error_t error){ return; } + default event void HalTMP102Advanced.setResolutionDone(error_t error){ return; } + default event void HalTMP102Advanced.setTLowDone(error_t error){ return; } + default event void HalTMP102Advanced.alertThreshold(){ return; } + + //we must include other functions for tmp102. + +} diff --git a/tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc b/tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc new file mode 100644 index 0000000000..1863d0cfd6 --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arched Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HalTMP102ReaderP provides the service level HIL and device + * specific Hal interfaces for the TI TMP102 Chip. + * + * Note that only the data path uses split phase resource arbitration + * + * @author Phil Buonadonna + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ + */ + +generic module HalTMP102ReaderP() +{ + provides interface Read as Temperature; + + uses interface HplTMP102; + uses interface Resource as TMP102Resource; +} + +implementation { + + enum { + STATE_SET_MODE, + STATE_SET_POLARITY, + STATE_SET_FQ, + STATE_SET_CR, + STATE_SET_EM, + STATE_NONE + }; + + uint8_t mState = STATE_NONE; + uint8_t mConfigRegVal = 0; + error_t mHplError; + + command error_t Temperature.read() { + return call TMP102Resource.request(); + } + + event void TMP102Resource.granted() { + error_t error; + + error = call HplTMP102.measureTemperature(); + if (error) { + call TMP102Resource.release(); + signal Temperature.readDone(error,0); + } + return; + } + + async event void HplTMP102.measureTemperatureDone(error_t tmp102_error, uint16_t val) { + call TMP102Resource.release(); + signal Temperature.readDone(tmp102_error,(val >> 4)); + return; + } + + // intentionally left empty + async event void HplTMP102.setTLowRegDone(error_t error) {} + async event void HplTMP102.setTHighRegDone(error_t error) {} + async event void HplTMP102.setConfigRegDone(error_t error) {} + async event void HplTMP102.alertThreshold() {} + + default event void Temperature.readDone(error_t error, uint16_t val) {return ;} + +} diff --git a/tos/platforms/z1/chips/tmp102/HplTMP102.nc b/tos/platforms/z1/chips/tmp102/HplTMP102.nc new file mode 100644 index 0000000000..bfa3d5c9a4 --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/HplTMP102.nc @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arched Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HplTMP102 is the HPL inteface to the Texas Instrument TMP102 + * Digital Temperature Sensor. + * + * @author Phil Buonadonna + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ + */ + +interface HplTMP102 { + + /** + * Starts a temperature measurement. + * + * @return SUCCESS if the measurement will be made + */ + command error_t measureTemperature(); + + /** + * Presents the result of a temperature measurement. + * + * @param error SUCCESS if the measurement was successful + * @param val the temperature reading + */ + async event void measureTemperatureDone( error_t error, uint16_t val ); + + /** + * Sets a new value to the TMP102 configuration register. + * + * @param val the new value to be written + * + * @return SUCCESS if the set will be performed + */ + command error_t setConfigReg( uint16_t val ); + + /** + * Signals the completion of the configuration register set. + * + * @param error SUCCESS if the set was successful + */ + async event void setConfigRegDone( error_t error ); + + command error_t setTLowReg(uint16_t val); + async event void setTLowRegDone(error_t error); + + command error_t setTHighReg(uint16_t val); + async event void setTHighRegDone(error_t error); + + async event void alertThreshold(); + +} diff --git a/tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc b/tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc new file mode 100644 index 0000000000..ce61338793 --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc @@ -0,0 +1,289 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arched Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HplTMP175LogicP is the driver for the TI TMP175. It requires an + * I2C packet interface and provides the HplTMP175 HPL interface. + * This module DOES NOT apply any specific configuration to the GpioInterrupt + * pin associated with the theshold alerts. This must be handled by an + * outside configuration/module according to the host platform. + * + * @author Phil Buonadonna + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ + */ + +#include "TMP102.h" +#include "I2C.h" + +generic module HplTMP102LogicP(uint16_t devAddr) +{ + provides interface Init; + provides interface SplitControl; + provides interface HplTMP102; + + uses interface I2CPacket; + uses interface GpioInterrupt as AlertInterrupt; + uses interface GeneralIO as InterruptPin; +} + +implementation { + + enum { + STATE_IDLE, + STATE_STARTING, + STATE_STOPPING, + STATE_STOPPED, + STATE_READTEMP, + STATE_SETCONFIG, + STATE_SETTHIGH, + STATE_SETTLOW, + }; + + bool mfPtrReset; + uint8_t mI2CBuffer[4]; + uint8_t mState; + uint8_t mConfigRegVal; + norace error_t mSSError; + + static error_t doSetReg(uint8_t nextState, uint8_t reg, uint8_t val) { + error_t error = SUCCESS; + + atomic { + if (mState == STATE_IDLE) { + mState = nextState; + } + else { + error = EBUSY; + } + } + if (error) + return error; + + mI2CBuffer[0] = reg; + mI2CBuffer[1] = val; + + error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); + + if (error) + atomic mState = STATE_IDLE; + + return error; + } + + static error_t doSetRegWord(uint8_t nextState, uint8_t reg, uint16_t val) { + error_t error = SUCCESS; + + atomic { + if (mState == STATE_IDLE) { + mState = nextState; + } + else { + error = EBUSY; + } + } + if (error) + return error; + + mI2CBuffer[0] = reg; + mI2CBuffer[1] = (val >> 8) & 0xFF; + mI2CBuffer[2] = val & 0xFF; + + error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,3,mI2CBuffer); + + if (error) + atomic mState = STATE_IDLE; + + return error; + } + + task void StartDone() { + atomic mState = STATE_IDLE; + signal SplitControl.startDone(mSSError); + return; + } + + task void StopDone() { + atomic mState = STATE_STOPPED; + signal SplitControl.stopDone(mSSError); + return; + } + + command error_t Init.init() { + // careful! this can be changed via polarity I believe + call InterruptPin.makeInput(); + call AlertInterrupt.enableRisingEdge(); + mfPtrReset = FALSE; + mConfigRegVal = 0; + mState = STATE_STOPPED; + return SUCCESS; + } + + command error_t SplitControl.start() { + error_t error = SUCCESS; + atomic { + if (mState == STATE_STOPPED) { + mState = STATE_IDLE; + } + else { + error = EBUSY; + } + } + + if (error) + return error; + + return doSetReg(STATE_STARTING,TMP102_PTR_CFG,(mConfigRegVal & ~TMP175_CFG_SD)); + } + + command error_t SplitControl.stop() { + return doSetReg(STATE_STOPPING,TMP102_PTR_CFG,(mConfigRegVal | TMP175_CFG_SD)); + } + + command error_t HplTMP102.measureTemperature() { + error_t error = SUCCESS; + + atomic { + if (mState == STATE_IDLE) { + mState = STATE_READTEMP; + } + else { + error = EBUSY; + } + } + if (error) + return error; + + mI2CBuffer[0] = mI2CBuffer[1] = 0; + + error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,2,mI2CBuffer); + + if (error) + atomic mState = STATE_IDLE; + + return error; + + } + + command error_t HplTMP102.setConfigReg( uint16_t val ){ + return doSetReg(STATE_SETCONFIG,TMP102_PTR_CFG,val); + } + + command error_t HplTMP102.setTLowReg(uint16_t val){ + return doSetRegWord(STATE_SETTLOW,TMP102_PTR_TLOW,val); + } + + command error_t HplTMP102.setTHighReg(uint16_t val){ + return doSetRegWord(STATE_SETTHIGH,TMP102_PTR_THIGH,val); + } + + async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { + uint16_t tempVal; + + switch (mState) { + case STATE_READTEMP: + tempVal = buf[0]; + tempVal = ((tempVal << 8) | buf[1]); + mState = STATE_IDLE; + signal HplTMP175.measureTemperatureDone(i2c_error,tempVal); + break; + default: + break; + } + + return; + } + + async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { + error_t error = i2c_error; + + if (mfPtrReset) { + mfPtrReset = FALSE; + switch (mState) { + case STATE_STARTING: + mSSError = error; + post StartDone(); + break; + + case STATE_STOPPING: + mSSError = error; + post StopDone(); + break; + + case STATE_READTEMP: + // Should never get here. + break; + + case STATE_SETCONFIG: + mState = STATE_IDLE; + signal HplTMP102.setConfigRegDone(error); + break; + + case STATE_SETTHIGH: + mState = STATE_IDLE; + signal HplTMP102.setTHighRegDone(error); + break; + + case STATE_SETTLOW: + mState = STATE_IDLE; + signal HplTMP102.setTLowRegDone(error); + break; + + default: + mState = STATE_IDLE; + break; + } + } + else { + // Reset the PTR register back to the temperature register + mI2CBuffer[0] = TMP102_PTR_TEMP; + mfPtrReset = TRUE; + call I2CPacket.write(I2C_START | I2C_STOP, devAddr,1,mI2CBuffer); + } + + return; + } + + async event void AlertInterrupt.fired() { + // This alert is decoupled from whatever state the TMP102 is in. + // Upper layers must handle dealing with this alert appropriately. + signal HplTMP102.alertThreshold(); + return; + } + + default event void SplitControl.startDone( error_t error ) { return; } + default event void SplitControl.stopDone( error_t error ) { return; } + default async event void HplTMP102.measureTemperatureDone( error_t error, uint16_t val ){ return; } + default async event void HplTMP102.setConfigRegDone( error_t error ){ return; } + default async event void HplTMP102.setTHighRegDone(error_t error){ return; } + default async event void HplTMP102.setTLowRegDone(error_t error){ return; } + default async event void HplTMP102.alertThreshold(){ return; } + +} diff --git a/tos/platforms/z1/chips/tmp102/TMP102.h b/tos/platforms/z1/chips/tmp102/TMP102.h new file mode 100644 index 0000000000..7a48009258 --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/TMP102.h @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arched Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Types and definitions for the TI TMP175 + * + * @author Phil Buonadonna + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $ + */ + +#ifndef _TMP102_H +#define _TMP102_H + +#define TMP102_SLAVE_ADDR (0x48) + +#define TMP102_PTR_TEMP (0x0) +#define TMP102_PTR_CFG (0x1) +#define TMP102_PTR_TLOW (0x2) +#define TMP102_PTR_THIGH (0x3) + +#define TMP102_CFG_OS ((1 << 7) << 8) +#define TMP102_CFG_RES(_x) ((((_x) & 0x3) << 5) << 8) +#define TMP102_CFG_FQ(_x) ((((_x) & 0x3) << 3) << 8) +#define TMP102_CFG_POL ((1 << 2) << 8) +#define TMP102_CFG_TM ((1 << 1) << 8) +#define TMP102_CFG_SD ((1 << 0) << 8) + +#define TMP102_CFG_CR(_x) (((_x) & 0x3) << 6) +#define TMP102_CFG_AL (1 << 5) +#define TMP102_CFG_EM (1 << 4) + + +typedef enum { + TMP102_FQD_1 = 0, + TMP102_FQD_2 = 1, + TMP102_FQD_4 = 2, + TMP102_FQD_6 = 3 +} tmp102_fqd_t; + +typedef enum { + TMP102_CR_025HZ, + TMP102_RES_1HZ, + TMP102_RES_4HZ, + TMP102_RES_8HZ +} tmp102_cr_t; + + + +#endif /* _TMP102_H */ diff --git a/tos/platforms/z1/chips/tmp102/TMP102C.nc b/tos/platforms/z1/chips/tmp102/TMP102C.nc new file mode 100644 index 0000000000..c4363960b2 --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/TMP102C.nc @@ -0,0 +1,61 @@ +/* $Id: TMP175C.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */ +/* + * Copyright (c) 2005 Arch Rock Corporation + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * Neither the name of the Arch Rock Corporation nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED + * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +/** + * + * @author Kaisen Lin + * @author Phil Buonadonna + */ +//#include "im2sb.h" + +generic configuration TMP102C() { + provides interface Read as Temperature; + provides interface HalTMP102Advanced; + provides interface SplitControl; +} + +implementation { + components new HalTMP102ReaderP(); + components HalTMP102ControlP; + Temperature = HalTMP102ReaderP.Temperature; + + enum { TMP_KEY = unique("TMP102.Resource"), + ADV_KEY = unique("TMP102.Resource"), + READER_ID = unique("TMP102.HplAccess"), + }; + + components TMP102InternalC; + HalTMP102ReaderP.TMP102Resource -> TMP102InternalC.Resource[TMP_KEY]; + HalTMP102ControlP.TMP102Resource -> TMP102InternalC.Resource[ADV_KEY]; + HalTMP102ReaderP.HplTMP175 -> TMP102InternalC.HplTMP102[READER_ID]; + HalTMP102Advanced = HalTMP102ControlP.HalTMP102Advanced; + + SplitControl = TMP102InternalC; +} diff --git a/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc b/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc new file mode 100644 index 0000000000..5507a700cf --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc @@ -0,0 +1,73 @@ +/* $Id: TMP175InternalC.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */ +/* + * Copyright (c) 2005 Arch Rock Corporation + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * Neither the name of the Arch Rock Corporation nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED + * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +/** + * + * @author Kaisen Lin + * @author Phil Buonadonna + */ +//#include "im2sb.h" + +configuration TMP102InternalC { + provides interface Resource[uint8_t id]; + provides interface HplTMP102[uint8_t id]; + provides interface SplitControl; +} + +implementation { + enum { + ADV_ID = unique("TMP102.HplAccess"), + }; + + components new SimpleFcfsArbiterC( "TMP102.Resource" ) as Arbiter; + components MainC; + Resource = Arbiter; + + components new HplTMP102LogicP(TMP102_SLAVE_ADDR) as Logic; + MainC.SoftwareInit -> Logic; + + /* dubtos */ + components GeneralIOC; + Logic.AlertInterrupt -> GeneralIOC.GpioInterrupt[GPIO_TMP102_TEMP_ALERT]; + Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TMP102_TEMP_ALERT]; + + components new Msp430I2CC() as I2CBus; + Logic.I2CPacket -> I2CBus; + + components TMP102InternalP as Internal; + HplTMP102 = Internal.HplTMP102; + Internal.ToHPLC -> Logic.HplTMP102; + + SplitControl = Logic; + + components HalTMP102ControlP; + HalTMP102ControlP.HplTMP102 -> Logic; + +} diff --git a/tos/platforms/z1/chips/tmp102/TMP102InternalP.nc b/tos/platforms/z1/chips/tmp102/TMP102InternalP.nc new file mode 100644 index 0000000000..1745627222 --- /dev/null +++ b/tos/platforms/z1/chips/tmp102/TMP102InternalP.nc @@ -0,0 +1,84 @@ +/* $Id: TMP175InternalP.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */ +/* + * Copyright (c) 2005 Arch Rock Corporation + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * Neither the name of the Arch Rock Corporation nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED + * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +/** + * + * @author Kaisen Lin + * @author Phil Buonadonna + */ +module TMP102InternalP { + provides interface HplTMP102[uint8_t id]; + uses interface HplTMP102 as ToHPLC; +} + +implementation { + uint8_t currentId; + + command error_t HplTMP102.measureTemperature[uint8_t id]() { + currentId = id; + return call ToHPLC.measureTemperature(); + } + + // configuration register of TMP102 is 16 bit + command error_t HplTMP102.setConfigReg[uint8_t id](uint16_t val) { + currentId = id; + return call ToHPLC.setConfigReg(val); + } + command error_t HplTMP102.setTLowReg[uint8_t id](uint16_t val) { + currentId = id; + return call ToHPLC.setTLowReg(val); + } + command error_t HplTMP102.setTHighReg[uint8_t id](uint16_t val) { + currentId = id; + return call ToHPLC.setTHighReg(val); + } + + async event void ToHPLC.measureTemperatureDone(error_t error, uint16_t val) { + signal HplTMP102.measureTemperatureDone[currentId](error, val); + } + async event void ToHPLC.setConfigRegDone(error_t error) { + signal HplTMP102.setConfigRegDone[currentId](error); + } + async event void ToHPLC.setTLowRegDone(error_t error) { + signal HplTMP102.setTLowRegDone[currentId](error); + } + async event void ToHPLC.setTHighRegDone(error_t error) { + signal HplTMP102.setTHighRegDone[currentId](error); + } + async event void ToHPLC.alertThreshold() { + signal HplTMP102.alertThreshold[currentId](); + } + + default async event void HplTMP102.measureTemperatureDone[uint8_t id](error_t error, uint16_t val) { return; } + default async event void HplTMP102.setConfigRegDone[uint8_t id](error_t error) { return; } + default async event void HplTMP102.setTLowRegDone[uint8_t id](error_t error) { return; } + default async event void HplTMP102.setTHighRegDone[uint8_t id](error_t error) { return; } + default async event void HplTMP102.alertThreshold[uint8_t id]() { return; } +} diff --git a/tos/platforms/z1/hardware.h b/tos/platforms/z1/hardware.h new file mode 100644 index 0000000000..e875b451c3 --- /dev/null +++ b/tos/platforms/z1/hardware.h @@ -0,0 +1,24 @@ +#ifndef _H_hardware_h +#define _H_hardware_h + +#include "msp430hardware.h" + +// LEDs +TOSH_ASSIGN_PIN(RED_LED, 5, 4); +TOSH_ASSIGN_PIN(GREEN_LED, 5, 6); +TOSH_ASSIGN_PIN(YELLOW_LED, 5, 5); + +// UART pins +TOSH_ASSIGN_PIN(SOMI0, 3, 2); +TOSH_ASSIGN_PIN(SIMO0, 3, 1); +TOSH_ASSIGN_PIN(UCLK0, 3, 3); +TOSH_ASSIGN_PIN(UTXD0, 3, 4); +TOSH_ASSIGN_PIN(URXD0, 3, 5); +TOSH_ASSIGN_PIN(UTXD1, 3, 6); +TOSH_ASSIGN_PIN(URXD1, 3, 7); +TOSH_ASSIGN_PIN(UCLK1, 5, 3); +TOSH_ASSIGN_PIN(SOMI1, 5, 2); +TOSH_ASSIGN_PIN(SIMO1, 5, 1); + + +#endif // _H_hardware_h diff --git a/tos/platforms/z1/platform.h b/tos/platforms/z1/platform.h new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tos/platforms/z1/platform_message.h b/tos/platforms/z1/platform_message.h new file mode 100644 index 0000000000..6f1202c4c7 --- /dev/null +++ b/tos/platforms/z1/platform_message.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2005 The Regents of the University of California. + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Defining the platform-independently named packet structures to be the + * chip-specific CC1000 packet structures. + * + * @author Philip Levis + * @version $Revision: 1.5 $ $Date: 2008/02/19 22:03:45 $ + */ + + +#ifndef PLATFORM_MESSAGE_H +#define PLATFORM_MESSAGE_H + +#include +#include + +typedef union message_header { + cc2420_header_t cc2420; + serial_header_t serial; +} message_header_t; + +typedef union TOSRadioFooter { + cc2420_footer_t cc2420; +} message_footer_t; + +typedef union TOSRadioMetadata { + cc2420_metadata_t cc2420; + serial_metadata_t serial; +} message_metadata_t; + +#endif From 1e1249a1410675026b4eb4fb3e168ba6175bcf0e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 5 Mar 2011 17:52:54 -0800 Subject: [PATCH 008/411] bring adxl345 and tmp102 into tos/chips --- 01_Merge_Notes | 2 + tos/chips/adxl345/ADXL345.h | 102 +++ tos/chips/adxl345/ADXL345C.nc | 42 ++ tos/chips/adxl345/ADXL345Control.nc | 27 + tos/chips/adxl345/ADXL345P.nc | 1030 +++++++++++++++++++++++++++ tos/chips/tmp102/SimpleTMP102C.nc | 20 + tos/chips/tmp102/SimpleTMP102P.nc | 95 +++ tos/chips/tmp102/TMP102.h | 10 + 8 files changed, 1328 insertions(+) create mode 100644 tos/chips/adxl345/ADXL345.h create mode 100644 tos/chips/adxl345/ADXL345C.nc create mode 100644 tos/chips/adxl345/ADXL345Control.nc create mode 100644 tos/chips/adxl345/ADXL345P.nc create mode 100644 tos/chips/tmp102/SimpleTMP102C.nc create mode 100644 tos/chips/tmp102/SimpleTMP102P.nc create mode 100644 tos/chips/tmp102/TMP102.h diff --git a/01_Merge_Notes b/01_Merge_Notes index b23e361399..57b9951a81 100644 --- a/01_Merge_Notes +++ b/01_Merge_Notes @@ -16,3 +16,5 @@ * want to check tos/platforms/z1/ for duplicates vs. tos/chips/msp430 when done integrating and collapsing. + +* might want to add Zolertia copyrights to adxl345 and tmp102. diff --git a/tos/chips/adxl345/ADXL345.h b/tos/chips/adxl345/ADXL345.h new file mode 100644 index 0000000000..fa8b0270e4 --- /dev/null +++ b/tos/chips/adxl345/ADXL345.h @@ -0,0 +1,102 @@ +#ifndef ADXL345_H + +#define ADXL345_H + +#define ADXL345_ADDRESS 0x53 + +//ADXL345 Registers Start +#define ADXL345_DEVID 0x00 // R // Device ID. +#define ADXL345_THRESH_TAP 0x1D // RW // Tap Threshold 62.5mg/LSB (0xFF = +16g) +#define ADXL345_OFSX 0x1E // RW // X-axis Offset 15.6mg/LSB +#define ADXL345_OFSY 0x1F // RW // Y-axis Offset 15.6mg/LSB +#define ADXL345_OFSZ 0x20 // RW // Z-axis Offset 15.6mg/LSB +#define ADXL345_DUR 0x21 // RW // Tap Duration 625us/LSB +#define ADXL345_LATENT 0x22 // RW // Tap Latency 1.25ms/LSB +#define ADXL345_WINDOW 0x23 // RW // Tap Window 1.25ms/LSB +#define ADXL345_THRESH_ACT 0x24 // RW // Activity threshold 62.5mg/LSB +#define ADXL345_THRESH_INACT 0x25 // RW // Inactivity Threshold 62.5mg/LSB +#define ADXL345_TIME_INACT 0x26 // RW // Inactivity Time. 1s/LSB +#define ADXL345_ACT_INACT_CTL 0x27 // RW // xis enable control for activity and inactivity detection. +#define ADXL345_THRESH_FF 0x28 // RW // Free-fall threshold. 62.5mg/LSB +#define ADXL345_TIME_FF 0x29 // RW // Free-fall Time 5ms/LSB (values 0x14 to 0x46 are recommended) +#define ADXL345_TAP_AXES 0x2A // RW // Axis control for tap/double tap +#define ADXL345_ACT_TAP_STATUS 0x2B // R // Source of tap/double tap +#define ADXL345_BW_RATE 0x2C // RW // Data rate and power control mode (default 0xA) +#define ADXL345_POWER_CTL 0x2D // RW // Power saving features control +#define ADXL345_INT_ENABLE 0x2E // RW // Interrupt enable control +#define ADXL345_INT_MAP 0x2F // RW // Interrupt mapping control +#define ADXL345_INT_SOURCE 0x30 // R // Source of interrupts +#define ADXL345_DATAFORMAT 0x31 // RW // Data format control +#define ADXL345_DATAX0 0x32 // R // X-Axis +#define ADXL345_DATAY0 0x34 // R // Y-Axis +#define ADXL345_DATAZ0 0x36 // R // Z-Axis +#define ADXL345_FIFO_CTL 0x38 // RW // FIFO control +#define ADXL345_FIFO_STATE 0x39 // R // FIFO status +//ADXL Registers End + + +#define ADXL345_MEASURE_MODE 0x08 +#define ADXL345_STANDBY_MODE 0xF7 +#define ADXL345_SLEEP_MODE 0x04 + +#define ADXL345_RANGE_2G 0 +#define ADXL345_RANGE_4G 1 +#define ADXL345_RANGE_8G 2 +#define ADXL345_RANGE_16G 3 + +#define ADXL345_LOWRES 0 +#define ADXL345_FULLRES 1 + +#define ADXL345_START_TIMEOUT 2000 + +//ADXL345 Driver States States + +typedef enum { + ADXLCMD_START, + ADXLCMD_READ_REGISTER, + ADXLCMD_READ_DURATION, + ADXLCMD_READ_LATENT, + ADXLCMD_READ_WINDOW, + ADXLCMD_READ_THRESH_ACT, //TODO + ADXLCMD_READ_THRESH_INACT, //TODO + ADXLCMD_READ_TIME_INACT, //TODO + ADXLCMD_READ_ACT_INACT_CTL, //TODO + ADXLCMD_READ_THRESH_FF, //TODO + ADXLCMD_READ_TIME_FF, //TODO + ADXLCMD_READ_TAP_AXES, //TODO + ADXLCMD_READ_ACT_TAP_STATUS, //TODO + ADXLCMD_READ_BW_RATE, //TODO + ADXLCMD_READ_POWER_CTL, //TODO + ADXLCMD_READ_INT_ENABLE, + ADXLCMD_READ_INT_MAP, + ADXLCMD_READ_INT_SOURCE, + ADXLCMD_READ_X, + ADXLCMD_READ_Y, + ADXLCMD_READ_Z, + ADXLCMD_SET_RANGE, + ADXLCMD_STOP, + ADXLCMD_SLEEP, + ADXLCMD_INT, + ADXLCMD_SET_REGISTER, + ADXLCMD_SET_DURATION, + ADXLCMD_SET_LATENT, + ADXLCMD_SET_WINDOW, + ADXLCMD_SET_INT_MAP, +} adxl345_commands; + +//ADXL345 Interruptions + + +typedef enum { + ADXLINT_NONE = 0x00, + ADXLINT_OVERRUN = 0x01, + ADXLINT_WATERMARK = 0x02, + ADXLINT_FREE_FALL = 0x04, + ADXLINT_INACTIVITY = 0x08, + ADXLINT_ACTIVITY = 0x10, + ADXLINT_DOUBLE_TAP = 0x20, + ADXLINT_SINGLE_TAP = 0x40, + ADXLINT_DATA_READY = 0x80, +} adxlint_state_t; + +#endif diff --git a/tos/chips/adxl345/ADXL345C.nc b/tos/chips/adxl345/ADXL345C.nc new file mode 100644 index 0000000000..50d3f7b690 --- /dev/null +++ b/tos/chips/adxl345/ADXL345C.nc @@ -0,0 +1,42 @@ +#include "ADXL345.h" + +generic configuration ADXL345C() { + provides interface SplitControl; + provides interface Read as X; + provides interface Read as Y; + provides interface Read as Z; + provides interface Read as IntSource; + provides interface Read as Register; + provides interface ADXL345Control; + provides interface Notify as Int1; + provides interface Notify as Int2; +} +implementation { + components ADXL345P; + X = ADXL345P.X; + Y = ADXL345P.Y; + Z = ADXL345P.Z; + IntSource = ADXL345P.IntSource; + SplitControl = ADXL345P; + ADXL345Control = ADXL345P; + Register = ADXL345P.Register; + + components new Msp430I2C1C() as I2C; + ADXL345P.Resource -> I2C; + ADXL345P.ResourceRequested -> I2C; + ADXL345P.I2CBasicAddr -> I2C; + + components HplADXL345C; + + Int1 = ADXL345P.Int1; + Int2 = ADXL345P.Int2; + + ADXL345P.GpioInterrupt1 -> HplADXL345C.GpioInterrupt1; + ADXL345P.GpioInterrupt2 -> HplADXL345C.GpioInterrupt2; + ADXL345P.GeneralIO1 -> HplADXL345C.GeneralIO1; + ADXL345P.GeneralIO2 -> HplADXL345C.GeneralIO2; + + components new TimerMilliC() as TimeoutAlarm; + ADXL345P.TimeoutAlarm -> TimeoutAlarm; + +} diff --git a/tos/chips/adxl345/ADXL345Control.nc b/tos/chips/adxl345/ADXL345Control.nc new file mode 100644 index 0000000000..7f0d074019 --- /dev/null +++ b/tos/chips/adxl345/ADXL345Control.nc @@ -0,0 +1,27 @@ +interface ADXL345Control +{ + command error_t setRange(uint8_t range, uint8_t resolution); + event void setRangeDone(error_t error); + + command error_t setInterrups(uint8_t interrupt_vector); + event void setInterruptsDone(error_t error); + + command error_t setIntMap(uint8_t int_map_vector); + event void setIntMapDone(error_t error); + + command error_t setRegister(uint8_t reg, uint8_t value); + event void setRegisterDone(error_t error); + + command error_t setDuration(uint8_t duration); + event void setDurationDone(error_t error); + + command error_t setLatent(uint8_t latent); + event void setLatentDone(error_t error); + + command error_t setWindow(uint8_t window); + event void setWindowDone(error_t error); + + command error_t setReadAddress(uint8_t address); + event void setReadAddressDone(error_t error); + +} diff --git a/tos/chips/adxl345/ADXL345P.nc b/tos/chips/adxl345/ADXL345P.nc new file mode 100644 index 0000000000..00559fda2b --- /dev/null +++ b/tos/chips/adxl345/ADXL345P.nc @@ -0,0 +1,1030 @@ +#include "ADXL345.h" + +module ADXL345P { + provides { + interface SplitControl; + interface Read as Register; + interface Read as Duration; + interface Read as Latent; + interface Read as Window; + interface Read as BwRate; + interface Read as PowerCtl; + interface Read as IntEnable; + interface Read as IntMap; + interface Read as IntSource; + interface Read as X; + interface Read as Y; + interface Read as Z; + interface ADXL345Control; + interface Notify as Int1; + interface Notify as Int2; + } + uses { + interface Resource; + interface ResourceRequested; + interface I2CPacket as I2CBasicAddr; + interface GeneralIO as GeneralIO1; + interface GeneralIO as GeneralIO2; + interface GpioInterrupt as GpioInterrupt1; + interface GpioInterrupt as GpioInterrupt2; + interface Timer as TimeoutAlarm; + } + +} +implementation { + + norace bool lock=FALSE; + norace uint8_t state; + norace uint8_t adxlcmd; + norace uint8_t databuf[20]; + norace uint8_t set_reg[2]; + norace uint8_t pointer; + norace uint8_t readAddress=0; + norace uint8_t regData; + norace uint8_t duration; + norace uint8_t latent; + norace uint8_t window; + norace uint8_t bw_rate; + norace uint8_t power_ctl=0x0; + norace uint8_t int_enable; + norace uint8_t int_map; + norace uint8_t int_source; + norace uint8_t dataformat; + norace error_t error_return= SUCCESS; + norace uint16_t x_axis; + norace uint16_t y_axis; + norace uint16_t z_axis; + + + task void sendEvent1(); + task void sendEvent2(); + + task void started(){ + if(call TimeoutAlarm.isRunning()) call TimeoutAlarm.stop(); + lock = FALSE; + signal SplitControl.startDone(error_return); + } + + task void stopped(){ + lock = FALSE; + signal SplitControl.stopDone(error_return); + } + + task void calculatePowerCtl() { + lock = FALSE; + signal PowerCtl.readDone(error_return, power_ctl); + } + + task void calculateBwRate() { + lock = FALSE; + signal BwRate.readDone(error_return, bw_rate); + } + + task void calculateIntMap() { + lock = FALSE; + signal IntMap.readDone(error_return, int_map); + } + + task void calculateIntEnable() { + lock = FALSE; + signal IntEnable.readDone(error_return, int_enable); + } + + task void calculateIntSource() { + lock = FALSE; + signal IntSource.readDone(error_return, int_source); + } + + task void calculateX(){ + lock = FALSE; + signal X.readDone(error_return, x_axis); + } + + task void calculateY(){ + lock = FALSE; + signal Y.readDone(error_return, y_axis); + } + + task void calculateZ(){ + lock = FALSE; + signal Z.readDone(error_return, z_axis); + } + + task void calculateRegister() { + lock = FALSE; + signal Register.readDone(error_return, regData); + } + + task void rangeDone(){ + lock = FALSE; + signal ADXL345Control.setRangeDone(error_return); + } + + task void setRegisterDone(){ + lock = FALSE; + signal ADXL345Control.setRegisterDone(error_return); + } + + task void setIntMapDone(){ + lock = FALSE; + signal ADXL345Control.setIntMapDone(error_return); + } + + task void interruptsDone(){ + lock = FALSE; + signal ADXL345Control.setInterruptsDone(error_return); + } + + task void durationDone(){ + lock = FALSE; + signal ADXL345Control.setDurationDone(error_return); + } + + task void latentDone(){ + lock = FALSE; + signal ADXL345Control.setLatentDone(error_return); + } + task void windowDone(){ + lock = FALSE; + signal ADXL345Control.setWindowDone(error_return); + } + + task void readDurationDone(){ + lock = FALSE; + signal Duration.readDone(error_return, duration); + } + + task void readLatentDone(){ + lock = FALSE; + signal Latent.readDone(error_return, latent); + } + + task void readWindowDone(){ + lock = FALSE; + signal Window.readDone(error_return, window); + } + + task void setReadAddressDone() { + signal ADXL345Control.setReadAddressDone(SUCCESS); + } + + + command error_t SplitControl.start(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_START; + e = call Resource.request(); + if (e==SUCCESS) { + call TimeoutAlarm.startOneShot(ADXL345_START_TIMEOUT); + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t SplitControl.stop(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_STOP; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t ADXL345Control.setReadAddress(uint8_t address){ + if(lock) return EBUSY; + lock = TRUE; + if( address >= 0x01 && address <= 0x1C) return EINVAL; //reserved, do not access + if( address >= 0x3A) return EINVAL; //to big + readAddress = address; + lock=FALSE; + return SUCCESS; + } + + command error_t ADXL345Control.setRange(uint8_t range, uint8_t resolution){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_SET_RANGE; + e=call Resource.request(); + if(e==SUCCESS) { + dataformat = resolution << 3; + dataformat = dataformat + range; + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t ADXL345Control.setRegister(uint8_t reg, uint8_t value){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_SET_REGISTER; + e=call Resource.request(); + if(e==SUCCESS) { + set_reg[0] = reg; + set_reg[1] = value; + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t ADXL345Control.setInterrups(uint8_t int_enable_par) { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_INT; + e = call Resource.request(); + if (e==SUCCESS) { + int_enable = int_enable_par; + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t ADXL345Control.setDuration(uint8_t duration_par) { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_SET_DURATION; + e = call Resource.request(); + if (e==SUCCESS) { + duration = duration_par; + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t ADXL345Control.setLatent(uint8_t latent_par) { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_SET_LATENT; + e = call Resource.request(); + if (e==SUCCESS) { + latent = latent_par; + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t ADXL345Control.setWindow(uint8_t window_par) { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_SET_WINDOW; + e = call Resource.request(); + if (e==SUCCESS) { + window = window_par; + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t ADXL345Control.setIntMap(uint8_t int_map_par) { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_SET_INT_MAP; + e = call Resource.request(); + if (e==SUCCESS) { + int_map = int_map_par; + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t PowerCtl.read() { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_POWER_CTL; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t BwRate.read() { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_BW_RATE; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t IntEnable.read() { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_INT_ENABLE; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t IntMap.read() { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_INT_MAP; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t IntSource.read() { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_INT_SOURCE; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t Register.read() { + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_REGISTER; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t X.read(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_X; + if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { + lock=FALSE; + return FAIL; + } + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t Y.read(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_Y; + if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { + lock=FALSE; + return FAIL; + } + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t Z.read(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_Z; + if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { + lock=FALSE; + return FAIL; + } + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t Duration.read(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_DURATION; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t Latent.read(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_LATENT; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + command error_t Window.read(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_WINDOW; + e = call Resource.request(); + if (e==SUCCESS) { + return SUCCESS; + } + lock = FALSE; + return e; + } + + event void Resource.granted(){ + error_t e; + switch(adxlcmd){ + case ADXLCMD_START: + power_ctl = power_ctl | ADXL345_MEASURE_MODE; + databuf[0] = ADXL345_THRESH_TAP; + databuf[1] = 0x40; //ADXL345_THRESH_TAP + databuf[2] = 0x0; //ADXL345_OFSX + databuf[3] = 0x0; //ADXL345_OFSY + databuf[4] = 0x0; //ADXL345_OFSZ + databuf[5] = 0x7F; //ADXL345_DUR + databuf[6] = 0x30; //ADXL345_LATENT + databuf[7] = 0x7F; //ADXL345_WINDOW + databuf[8] = 0x2; //ADXL345_THRESH_ACT + databuf[9] = 0x1; //ADXL345_THRESH_INACT + databuf[10] = 0xFF; //ADXL345_TIME_INACT + databuf[11] = 0xFF; //ADXL345_ACT_INACT_CTL + databuf[12] = 0x05; //ADXL345_THRESH_FF + databuf[13] = 0x14; //ADXL345_TIME_FF + databuf[14] = 0x7; //ADXL345_TAP_AXES + databuf[15] = 0x0; //ADXL345_ACT_TAP_STATUS(read only) + databuf[16] = 0x0A; //ADXL345_BW_RATE + databuf[17] = power_ctl; //ADXL345_POWER_CTL + databuf[18] = 0x0; //ADXL345_INT_ENABLE (all disabled by default) + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 19, databuf); + if (e!= SUCCESS) { + error_return = e; + post started(); + } + break; + + case ADXLCMD_READ_DURATION: + pointer = ADXL345_DUR; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post readDurationDone(); + } + break; + + case ADXLCMD_READ_LATENT: + pointer = ADXL345_LATENT; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post readLatentDone(); + } + break; + + case ADXLCMD_READ_WINDOW: + pointer = ADXL345_WINDOW; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post readWindowDone(); + } + break; + + case ADXLCMD_READ_POWER_CTL: + pointer = ADXL345_POWER_CTL; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculatePowerCtl(); + } + break; + + case ADXLCMD_READ_BW_RATE: + pointer = ADXL345_BW_RATE; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateBwRate(); + } + break; + + case ADXLCMD_READ_INT_ENABLE: + pointer = ADXL345_INT_ENABLE; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateIntEnable(); + } + break; + + case ADXLCMD_READ_INT_MAP: + pointer = ADXL345_INT_MAP; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateIntMap(); + } + break; + + case ADXLCMD_READ_INT_SOURCE: + pointer = ADXL345_INT_SOURCE; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateIntSource(); + } + break; + + case ADXLCMD_READ_X: + pointer = ADXL345_DATAX0; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateX(); + } + break; + + case ADXLCMD_READ_Y: + pointer = ADXL345_DATAY0; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateY(); + } + break; + + case ADXLCMD_READ_Z: + pointer = ADXL345_DATAZ0; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateZ(); + } + break; + + case ADXLCMD_READ_REGISTER: + pointer = readAddress; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateRegister(); + } + break; + + case ADXLCMD_SET_REGISTER: + databuf[0] = set_reg[0]; + databuf[1] = set_reg[1]; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + if (e!= SUCCESS) { + error_return = e; + post setRegisterDone(); + } + break; + + case ADXLCMD_SET_INT_MAP: + databuf[0] = ADXL345_INT_MAP; + databuf[1] = int_map; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + if (e!= SUCCESS) { + error_return = e; + post setIntMapDone(); + } + break; + + case ADXLCMD_SET_RANGE: + databuf[0] = ADXL345_DATAFORMAT; + databuf[1] = dataformat; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + if (e!= SUCCESS) { + error_return = e; + post rangeDone(); + } + break; + + case ADXLCMD_STOP: + power_ctl = power_ctl & ADXL345_STANDBY_MODE; + databuf[0] = ADXL345_POWER_CTL; + databuf[1] = power_ctl; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + if (e!= SUCCESS) { + error_return = e; + post stopped(); + } + break; + + case ADXLCMD_INT: + databuf[0] = ADXL345_INT_ENABLE; + databuf[1] = int_enable; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + if (e!= SUCCESS) { + error_return = e; + post interruptsDone(); + } + break; + + case ADXLCMD_SET_DURATION: + databuf[0] = ADXL345_DUR; + databuf[1] = duration; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + if (e!= SUCCESS) { + error_return = e; + post durationDone(); + } + break; + + case ADXLCMD_SET_LATENT: + databuf[0] = ADXL345_LATENT; + databuf[1] = latent; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + if (e!= SUCCESS) { + error_return = e; + post latentDone(); + } + break; + + case ADXLCMD_SET_WINDOW: + databuf[0] = ADXL345_WINDOW; + databuf[1] = window; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + if (e!= SUCCESS) { + error_return = e; + post windowDone(); + } + break; + + } + } + + async event void ResourceRequested.requested(){ + + } + + async event void ResourceRequested.immediateRequested(){ + + } + + async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + uint16_t tmp=0; + if(call Resource.isOwner()) { + error_return=error; + for(tmp=0;tmp<0x8fff;tmp++); //delay + tmp= call Resource.release(); + if(adxlcmd == ADXLCMD_READ_X || adxlcmd == ADXLCMD_READ_Y || adxlcmd == ADXLCMD_READ_Z) + { + tmp = data[1]; + tmp = tmp << 8; + tmp = tmp + data[0]; + } + switch(adxlcmd){ + case ADXLCMD_READ_REGISTER: + regData=data[0]; + post calculateRegister(); + break; + case ADXLCMD_READ_DURATION: + duration=data[0]; + post readDurationDone(); + break; + case ADXLCMD_READ_LATENT: + latent=data[0]; + post readLatentDone(); + break; + case ADXLCMD_READ_WINDOW: + window=data[0]; + post readWindowDone(); + break; + case ADXLCMD_READ_POWER_CTL: + power_ctl=data[0]; + post calculatePowerCtl(); + break; + case ADXLCMD_READ_BW_RATE: + bw_rate=data[0]; + post calculateBwRate(); + break; + case ADXLCMD_READ_INT_ENABLE: + int_enable=data[0]; + post calculateIntEnable(); + break; + case ADXLCMD_READ_INT_MAP: + int_map=data[0]; + post calculateIntMap(); + break; + case ADXLCMD_READ_INT_SOURCE: + int_source=data[0]; + post calculateIntSource(); + break; + case ADXLCMD_READ_X: + x_axis = tmp; + post calculateX(); + break; + case ADXLCMD_READ_Y: + y_axis = tmp; + post calculateY(); + break; + case ADXLCMD_READ_Z: + z_axis = tmp; + post calculateZ(); + break; + } + } + } + + async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + if(call Resource.isOwner()) { + error_return=error; + if( adxlcmd != ADXLCMD_READ_REGISTER + && adxlcmd != ADXLCMD_READ_DURATION + && adxlcmd != ADXLCMD_READ_LATENT + && adxlcmd != ADXLCMD_READ_WINDOW + && adxlcmd != ADXLCMD_READ_INT_ENABLE + && adxlcmd != ADXLCMD_READ_INT_MAP + && adxlcmd != ADXLCMD_READ_INT_SOURCE + && adxlcmd != ADXLCMD_READ_X + && adxlcmd != ADXLCMD_READ_Y + && adxlcmd != ADXLCMD_READ_Z + ) + { + call Resource.release(); + } + switch(adxlcmd){ + case ADXLCMD_START: + post started(); + break; + case ADXLCMD_READ_REGISTER: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post calculateRegister(); + break; + case ADXLCMD_READ_DURATION: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post readDurationDone(); + break; + case ADXLCMD_READ_LATENT: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post readLatentDone(); + break; + case ADXLCMD_READ_WINDOW: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post readWindowDone(); + break; + case ADXLCMD_READ_POWER_CTL: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post calculatePowerCtl(); + break; + case ADXLCMD_READ_BW_RATE: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post calculateBwRate(); + break; + case ADXLCMD_READ_INT_ENABLE: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post calculateIntEnable(); + break; + case ADXLCMD_READ_INT_MAP: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post calculateIntMap(); + break; + case ADXLCMD_READ_INT_SOURCE: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); + else + post calculateIntSource(); + break; + case ADXLCMD_READ_X: + if (error==SUCCESS) + call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + else + post calculateX(); + break; + case ADXLCMD_READ_Y: + if (error==SUCCESS) + call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + else + post calculateY(); + break; + case ADXLCMD_READ_Z: + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + else + post calculateZ(); + break; + case ADXLCMD_SET_REGISTER: + post setRegisterDone(); + break; + case ADXLCMD_SET_INT_MAP: + post setIntMapDone(); + break; + case ADXLCMD_SET_RANGE: + post rangeDone(); + break; + case ADXLCMD_STOP: + post stopped(); + break; + case ADXLCMD_INT: + post interruptsDone(); + break; + case ADXLCMD_SET_DURATION: + post durationDone(); + break; + case ADXLCMD_SET_LATENT: + post latentDone(); + break; + case ADXLCMD_SET_WINDOW: + post windowDone(); + break; + } + } + } + + /* default handlers */ + default event void Register.readDone(error_t error, uint8_t data) { + return; + } + + default event void Duration.readDone(error_t error, uint8_t data){ + return; + } + + default event void Latent.readDone(error_t error, uint8_t data) { + return; + } + + default event void Window.readDone(error_t error, uint8_t data) { + return; + } + + default event void PowerCtl.readDone(error_t error, uint8_t data) { + return; + } + + default event void BwRate.readDone(error_t error, uint8_t data) { + return; + } + + default event void IntEnable.readDone(error_t error, uint8_t data) { + return; + } + + default event void IntMap.readDone(error_t error, uint8_t data) { + return; + } + + default event void IntSource.readDone(error_t error, uint8_t data){ + return; + } + + default event void X.readDone(error_t error, uint16_t data){ + return; + } + + default event void Y.readDone(error_t error, uint16_t data){ + return; + } + + default event void Z.readDone(error_t error, uint16_t data){ + return; + } + + default event void ADXL345Control.setRangeDone(error_t error){ + return; + } + + default event void ADXL345Control.setInterruptsDone(error_t error){ + return; + } + + default event void ADXL345Control.setRegisterDone(error_t error){ + return; + } + + default event void ADXL345Control.setDurationDone(error_t error){ + return; + } + + default event void ADXL345Control.setLatentDone(error_t error){ + return; + } + + default event void ADXL345Control.setWindowDone(error_t error){ + return; + } + + default event void ADXL345Control.setIntMapDone(error_t error){ + return; + } + + default event void ADXL345Control.setReadAddressDone(error_t error){ + return; + } + + default event void Int1.notify(adxlint_state_t val) { + } + + default event void Int2.notify(adxlint_state_t val) { + } + /*defaut handlers end*/ + + event void TimeoutAlarm.fired() { + if(lock && (adxlcmd == ADXLCMD_START)) + { + lock = FALSE; + + signal SplitControl.startDone(EOFF); + } + } + + command error_t Int1.enable() { + call GeneralIO1.makeInput(); + return call GpioInterrupt1.enableRisingEdge(); + } + + command error_t Int2.enable() { + call GeneralIO2.makeInput(); + return call GpioInterrupt2.enableRisingEdge(); + } + + command error_t Int1.disable() { + return call GpioInterrupt1.disable(); + } + + command error_t Int2.disable() { + return call GpioInterrupt2.disable(); + } + + task void sendEvent1() { + signal Int1.notify( 1 ); + call GpioInterrupt1.enableRisingEdge(); + } + + task void sendEvent2() { + signal Int2.notify( 1 ); + call GpioInterrupt2.enableRisingEdge(); + } + + async event void GpioInterrupt1.fired() { + call GpioInterrupt1.disable(); + + post sendEvent1(); + } + + async event void GpioInterrupt2.fired() { + call GpioInterrupt2.disable(); + post sendEvent2(); + } + +} diff --git a/tos/chips/tmp102/SimpleTMP102C.nc b/tos/chips/tmp102/SimpleTMP102C.nc new file mode 100644 index 0000000000..25b0a1cdaa --- /dev/null +++ b/tos/chips/tmp102/SimpleTMP102C.nc @@ -0,0 +1,20 @@ + +generic configuration SimpleTMP102C() { + provides interface Read; +} +implementation { + components SimpleTMP102P; + Read = SimpleTMP102P; + + components new TimerMilliC() as TimerSensor; + SimpleTMP102P.TimerSensor -> TimerSensor; + + components new TimerMilliC() as TimerFail; + SimpleTMP102P.TimerFail -> TimerFail; + + components new Msp430I2C1C() as I2C; + SimpleTMP102P.Resource -> I2C; + SimpleTMP102P.ResourceRequested -> I2C; + SimpleTMP102P.I2CBasicAddr -> I2C; + +} diff --git a/tos/chips/tmp102/SimpleTMP102P.nc b/tos/chips/tmp102/SimpleTMP102P.nc new file mode 100644 index 0000000000..102c679ffe --- /dev/null +++ b/tos/chips/tmp102/SimpleTMP102P.nc @@ -0,0 +1,95 @@ +#include "TMP102.h" + + +module SimpleTMP102P { + provides interface Read; + uses { + interface Timer as TimerSensor; + interface Timer as TimerFail; + interface Resource; + interface ResourceRequested; + interface I2CPacket as I2CBasicAddr; + } + +} +implementation { + + uint16_t temp; + uint8_t pointer; + uint8_t temperaturebuff[2]; + uint16_t tmpaddr; + + norace uint8_t tempcmd; + + task void calculateTemp(){ + uint16_t tmp; + atomic tmp = temp; + signal Read.readDone(SUCCESS, tmp); + } + + command error_t Read.read(){ + atomic P5DIR |= 0x01; + atomic P5OUT |= 0x01; + call TimerSensor.startOneShot(100); + //call TimerFail.startOneShot(1024); + return SUCCESS; + } + + event void TimerSensor.fired() { + call Resource.request(); + } + + event void TimerFail.fired() { + signal Read.readDone(SUCCESS, 0); + } + + event void Resource.granted(){ + error_t error; + pointer = TMP102_TEMPREG; + tempcmd = TMP_READ_TMP; + error= call I2CBasicAddr.write((I2C_START | I2C_STOP), TMP102_ADDRESS, 1, &pointer); + if(error) + { + call Resource.release(); + signal Read.readDone(error, 0); + } + } + + async event void ResourceRequested.requested(){ + + } + + async event void ResourceRequested.immediateRequested(){ + + } + + async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + if(call Resource.isOwner()) { + uint16_t tmp; + for(tmp=0;tmp<0xffff;tmp++); //delay + call Resource.release(); + tmp = data[0]; + tmp = tmp << 8; + tmp = tmp + data[1]; + tmp = tmp >> 4; + atomic temp = tmp; + post calculateTemp(); + } + } + + async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + //printfUART("write done in temp\n"); + if(call Resource.isOwner()){ + error_t e; + e = call I2CBasicAddr.read((I2C_START | I2C_STOP), TMP102_ADDRESS, 2, temperaturebuff); + if(e) + { + call Resource.release(); + signal Read.readDone(error, 0); + } + } + } + + + +} diff --git a/tos/chips/tmp102/TMP102.h b/tos/chips/tmp102/TMP102.h new file mode 100644 index 0000000000..77b1fe0cb7 --- /dev/null +++ b/tos/chips/tmp102/TMP102.h @@ -0,0 +1,10 @@ +#ifndef TMP102_H + +#define TMP102_H + +#define TMP102_ADDRESS 0x48 +#define TMP102_TEMPREG 0x00 + +#define TMP_READ_TMP 1 + +#endif \ No newline at end of file From 0bacb073cfc8ee3a45bf3a5eb8a93135f208133e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 8 Mar 2011 01:47:36 -0800 Subject: [PATCH 009/411] Minimal Z1 commit, MSP430 support x1 and x2 processors. Collapse duplicate Z1 MSP430 files. Add support for new TI_HEADERS. Simple tests done with old 3.2.3 Z1 toolchain and new mspgcc4 (4.4.5) with TI_HEADERS. --- .gitignore | 5 + 00_Repo_Notes | 15 +- 01_Merge_Notes | 37 +- 02_To_Do | 13 +- 03_Removed | 4 + support/make/z1.target | 18 +- tos/chips/msp430/00_README | 87 ++++ tos/chips/msp430/01_Dependencies | 132 ++++++ tos/chips/msp430/dma/HplMsp430DmaC.nc | 1 - tos/chips/msp430/dma/HplMsp430DmaP.nc | 18 +- tos/chips/msp430/dma/Msp430Dma.h | 27 +- tos/chips/msp430/msp430regtypes.h | 363 +++++++++++++---- tos/chips/msp430/pins/HplMsp430GeneralIO.nc | 1 - tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 110 ++++- tos/chips/msp430/timer/Msp430TimerCommonP.nc | 1 - tos/chips/msp430/usci/HplMsp430UsciA.nc | 160 ++++++++ tos/chips/msp430/usci/HplMsp430UsciA0C.nc | 69 ++++ tos/chips/msp430/usci/HplMsp430UsciA0P.nc | 326 +++++++++++++++ tos/chips/msp430/usci/HplMsp430UsciA1C.nc | 69 ++++ tos/chips/msp430/usci/HplMsp430UsciA1P.nc | 328 +++++++++++++++ .../usci/HplMsp430UsciAB0RawInterruptsP.nc | 75 ++++ .../usci/HplMsp430UsciAB1RawInterruptsP.nc | 75 ++++ tos/chips/msp430/usci/HplMsp430UsciB.nc | 204 ++++++++++ tos/chips/msp430/usci/HplMsp430UsciB0C.nc | 64 +++ tos/chips/msp430/usci/HplMsp430UsciB0P.nc | 364 +++++++++++++++++ tos/chips/msp430/usci/HplMsp430UsciB1C.nc | 66 +++ tos/chips/msp430/usci/HplMsp430UsciB1P.nc | 364 +++++++++++++++++ .../msp430/usci/HplMsp430UsciInterrupts.nc | 59 +++ .../msp430/usci/HplMsp430UsciRawInterrupts.nc | 59 +++ tos/chips/msp430/usci/Msp430I2C1C.nc | 67 +++ tos/chips/msp430/usci/Msp430I2C1P.nc | 62 +++ tos/chips/msp430/usci/Msp430I2CConfigure.nc | 46 +++ tos/chips/msp430/usci/Msp430I2CP.nc | 244 +++++++++++ tos/chips/msp430/usci/Msp430SpiB0C.nc | 80 ++++ tos/chips/msp430/usci/Msp430SpiConfigure.nc | 46 +++ tos/chips/msp430/usci/Msp430SpiDmaB0P.nc | 81 ++++ tos/chips/msp430/usci/Msp430SpiDmaBP.nc | 195 +++++++++ tos/chips/msp430/usci/Msp430SpiNoDmaB0P.nc | 65 +++ tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc | 181 +++++++++ tos/chips/msp430/usci/Msp430Uart0C.nc | 69 ++++ tos/chips/msp430/usci/Msp430Uart0P.nc | 70 ++++ tos/chips/msp430/usci/Msp430Uart1C.nc | 69 ++++ tos/chips/msp430/usci/Msp430Uart1P.nc | 70 ++++ tos/chips/msp430/usci/Msp430UartConfigure.nc | 45 ++ tos/chips/msp430/usci/Msp430UartP.nc | 218 ++++++++++ tos/chips/msp430/usci/Msp430UsciA0C.nc | 66 +++ tos/chips/msp430/usci/Msp430UsciA1C.nc | 66 +++ tos/chips/msp430/usci/Msp430UsciB0C.nc | 66 +++ tos/chips/msp430/usci/Msp430UsciB1C.nc | 63 +++ tos/chips/msp430/usci/Msp430UsciShareA0P.nc | 61 +++ tos/chips/msp430/usci/Msp430UsciShareA1P.nc | 60 +++ tos/chips/msp430/usci/Msp430UsciShareB0P.nc | 61 +++ tos/chips/msp430/usci/Msp430UsciShareB1P.nc | 61 +++ tos/chips/msp430/usci/Msp430UsciShareP.nc | 58 +++ tos/chips/msp430/usci/PrintfUART.h | 384 ++++++++++++++++++ tos/chips/msp430/usci/msp430usci.h | 375 +++++++++++++++++ tos/chips/msp430/{ => x1xxx}/McuSleepC.nc | 0 tos/chips/msp430/x2xxx/McuSleepC.nc | 138 +++++++ tos/platforms/epic/.platform | 1 + tos/platforms/eyesIFX/.family | 1 + tos/platforms/shimmer/.platform | 1 + tos/platforms/shimmer2/.platform | 1 + tos/platforms/shimmer2r/.platform | 1 + tos/platforms/span/.platform | 1 + .../span/chips/msp430/msp430hardware.h | 10 +- tos/platforms/telosa/.platform | 3 +- tos/platforms/telosb/.platform | 1 + tos/platforms/tinynode/.platform | 1 + tos/platforms/z1/.platform | 27 +- .../{msp430X => msp430}/adc12/BatteryC.nc | 0 .../{msp430X => msp430}/adc12/BatteryP.nc | 0 .../z1/chips/msp430/timer/Msp430ClockC.nc | 50 +++ .../z1/chips/msp430/timer/Msp430ClockP.nc | 252 ++++++++++++ .../chips/msp430/timer/Msp430TimerCapComP.nc | 204 ++++++++++ .../z1/chips/msp430/timer/Msp430XDcoCalib.h | 139 +++++++ .../{msp430X => msp430}/usci/Msp430I2C1P.nc | 0 .../usci/Msp430SpiNoDmaB0P.nc | 0 .../{msp430X => msp430}/usci/Z1SerialP.nc | 0 .../chips/{msp430X => msp430}/usci/Z1UsciP.nc | 0 .../chips/{msp430X => msp430}/usci/printfZ1.h | 0 80 files changed, 6764 insertions(+), 110 deletions(-) create mode 100644 .gitignore create mode 100644 tos/chips/msp430/00_README create mode 100644 tos/chips/msp430/01_Dependencies create mode 100644 tos/chips/msp430/usci/HplMsp430UsciA.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciA0C.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciA0P.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciA1C.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciA1P.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciB.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciB0C.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciB0P.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciB1C.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciB1P.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc create mode 100644 tos/chips/msp430/usci/HplMsp430UsciRawInterrupts.nc create mode 100644 tos/chips/msp430/usci/Msp430I2C1C.nc create mode 100644 tos/chips/msp430/usci/Msp430I2C1P.nc create mode 100644 tos/chips/msp430/usci/Msp430I2CConfigure.nc create mode 100644 tos/chips/msp430/usci/Msp430I2CP.nc create mode 100644 tos/chips/msp430/usci/Msp430SpiB0C.nc create mode 100644 tos/chips/msp430/usci/Msp430SpiConfigure.nc create mode 100644 tos/chips/msp430/usci/Msp430SpiDmaB0P.nc create mode 100644 tos/chips/msp430/usci/Msp430SpiDmaBP.nc create mode 100644 tos/chips/msp430/usci/Msp430SpiNoDmaB0P.nc create mode 100644 tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc create mode 100644 tos/chips/msp430/usci/Msp430Uart0C.nc create mode 100644 tos/chips/msp430/usci/Msp430Uart0P.nc create mode 100644 tos/chips/msp430/usci/Msp430Uart1C.nc create mode 100644 tos/chips/msp430/usci/Msp430Uart1P.nc create mode 100644 tos/chips/msp430/usci/Msp430UartConfigure.nc create mode 100644 tos/chips/msp430/usci/Msp430UartP.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciA0C.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciA1C.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciB0C.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciB1C.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciShareA0P.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciShareA1P.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciShareB0P.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciShareB1P.nc create mode 100644 tos/chips/msp430/usci/Msp430UsciShareP.nc create mode 100644 tos/chips/msp430/usci/PrintfUART.h create mode 100644 tos/chips/msp430/usci/msp430usci.h rename tos/chips/msp430/{ => x1xxx}/McuSleepC.nc (100%) create mode 100644 tos/chips/msp430/x2xxx/McuSleepC.nc rename tos/platforms/z1/chips/{msp430X => msp430}/adc12/BatteryC.nc (100%) rename tos/platforms/z1/chips/{msp430X => msp430}/adc12/BatteryP.nc (100%) create mode 100644 tos/platforms/z1/chips/msp430/timer/Msp430ClockC.nc create mode 100644 tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc create mode 100644 tos/platforms/z1/chips/msp430/timer/Msp430TimerCapComP.nc create mode 100755 tos/platforms/z1/chips/msp430/timer/Msp430XDcoCalib.h rename tos/platforms/z1/chips/{msp430X => msp430}/usci/Msp430I2C1P.nc (100%) rename tos/platforms/z1/chips/{msp430X => msp430}/usci/Msp430SpiNoDmaB0P.nc (100%) rename tos/platforms/z1/chips/{msp430X => msp430}/usci/Z1SerialP.nc (100%) rename tos/platforms/z1/chips/{msp430X => msp430}/usci/Z1UsciP.nc (100%) rename tos/platforms/z1/chips/{msp430X => msp430}/usci/printfZ1.h (100%) diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000000..d116687ac1 --- /dev/null +++ b/.gitignore @@ -0,0 +1,5 @@ +*.[oa] +*~ +build +#*# +.#* diff --git a/00_Repo_Notes b/00_Repo_Notes index b7e5abfe2a..6206611ead 100644 --- a/00_Repo_Notes +++ b/00_Repo_Notes @@ -1,4 +1,13 @@ +* Toolchain: + +The focus is on getting the new toolchain verified. As such this repo is +intended to be tested using new toolchain (mspgcc 4.4.5, uniarch, ti headers). + +Some testing with the old 3.2.3 toolchain (original tinyos and z1 varient) has +also been done for simple function (ie. does it compile). + + * Repo Structure The msp430.git repo is located at: @@ -35,7 +44,7 @@ svn t2 mainline ---| master: is the main branch coming from the svn t2 mainline. Updated manually. -master_vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main +master-vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main trunk. This branch tracks master but has the superfluous Z1 commit removed as it conflicts with the collapsed msp430 x2xxx work done in mm_core. This collapsage forms the majority of the work of merging @@ -53,6 +62,10 @@ mm-z1-pu: proposed updates. After new code has been worked on for a bit and enough stuff is ready to go in next, it is brought over to main (mm-z1). +x5: integrate x5xxx family into result of mm-z1. Includes all three major +x5-next families, x1, x2, and x5. Uses seperate dirs for major differences. +x5-pu + To pull a working branch based on the mm-z1-pu branch (a reasonable place to fork a working branch), do the following: diff --git a/01_Merge_Notes b/01_Merge_Notes index 57b9951a81..125fa4fcb1 100644 --- a/01_Merge_Notes +++ b/01_Merge_Notes @@ -1,13 +1,34 @@ -1) removed extra Z1 commit into the trunk. Gets in the way of the collapse work already done. +The phrase "trunk-Z1" refers to the Z1 commit into the main t2 svn trunk. T2 SVN trunk commits +5442-5446 (corresponding git SHAs: 95e34ad, 7c460e2, 33fcc13, 4496245, and e50ad32. -2) branched to master-vhsb (master with vogon hyper spatial bypass), ie trunk (master without - the extra Z1 code. +By direct comparison, the trunk Z1 commit is 98% z1-sf 0.16. A few missing things, nothing important +but the msp430 branch brought those things back in. See the following commit for the missing parts: + + 270f0cc Z1 changes outside main z1 modifications (outside tos/{chips,platforms} + + +1) created the branch master-vhsb (master with vogon hyper spatial bypass). The hyper-spatial bypass + jumps over the trunk-Z1 code (deletes it). + +2) removed trunk-Z1 commit. Gets in the way of the collapse work already done. See the following: + + c2e52bd Remove extra Z1 commit. Reverse 5442 (95e34ad) + 2724902 Remove extra Z1 commit. Reverse 5444 (33fcc13) and 5443 (7c460e2) + 978a1d9 Remove extra Z1 commit. Reverse 5446 (e50ad32) and 5445 (4496245) 3) brought in code from sourceforge z1-0.16 that changed things but didn't hit the main areas for - the Z1. ie. stuff outside of tos/chips/msp430. + the Z1. ie. stuff outside of tos/chips/msp430. See: + + 270f0cc Z1 changes outside main z1 modifications (outside tos/{chips,platforms} -4) brought in z1 code that effects tos/chips/msp430. But avoided the duplicates. (z1-0.16 code +4) brought in Z1 code that is required (non-duplicate): + + 1e1249a bring adxl345 and tmp102 into tos/chips + 4e89d73 move z1-0.16 tos/platforms/z1 into msp430 (mm-z1) + + +5) brought in z1 code that effects tos/chips/msp430. But avoided the duplicates. (z1-0.16 code checked against the trunk Z1 code (removed above) to see if anything missing). @@ -18,3 +39,9 @@ and collapsing. * might want to add Zolertia copyrights to adxl345 and tmp102. + +* Z1 msp430hardware.h commented out the defines for I2CBUSY but the main msp430/msp430hardware.h + doesn't. Where should the I2C stuff be defined? + + For the time being, if this causes problems for Z1 then need to have per cpu family msp430hardware.h + files. Or do it with an #ifdef (PLATFORM_Z1) diff --git a/02_To_Do b/02_To_Do index cbe7049886..2f525e9e8d 100644 --- a/02_To_Do +++ b/02_To_Do @@ -1,4 +1,15 @@ +* fix copyrights + * apps/IPBaseStation: defines a reset in a particularily ugly way. Needs to be - fixed and mad part of the platform/cpu definition. + fixed and made part of the platform/cpu definition. + +* What is the purpose of msp430regtypes.h? Is there a easier way to deal with this? + +* There are multiple copies of msp430hardware.h. Is that reasonable? + +* i2c for msp430 isn't done yet. needs to be cleaned up and made less ugly. Interface + needs to be finished. +* CC2420 modules use LocalIeeeEui64C to obtain an ipv6 link-local address. Z1 needs to + provide. diff --git a/03_Removed b/03_Removed index 815ed9b1dd..bdea258755 100644 --- a/03_Removed +++ b/03_Removed @@ -7,3 +7,7 @@ are outdated and duplicates. The trunk version of IPDispatch.h is used in the msp430 (mm-z1) branch. +* z1/tos/chips/msp430/adc12 removed. No Z1 dependancies. Moved forward on trunk. + removed DXNRG from interrupt handler (per Xavier). + +* z1/tos/chips/msp430/dma diff --git a/support/make/z1.target b/support/make/z1.target index 2e453acb4f..1541796774 100644 --- a/support/make/z1.target +++ b/support/make/z1.target @@ -8,7 +8,23 @@ MSP_MCU ?= msp430x261 MSP_GCC ?= msp430-gcc MSP_NESC_TARGET ?= msp430 PFLAGS += -mdisable-hwmul -PFLAGS += -mdata-64k + +# +# Old Z1, mspgccX (3.2.3) tool chain accepts -mdata-64k and -mcode-64k +# but new mspgcc4 (4.4.5) doesn't understand these yet and causes the +# tinyos toolchain (nesc) to produce a really strange error: +# "nesc1: internal error: couldn't define builtin macros - exiting" +# +# One immediate thought is to simply leave this out for the old toolchain +# but it is unclear what kind of code it will generate. It should be +# fine but how big are pointers? The 261x parts (Z1 and friends) all +# have miniscule amounts of ram (all < 64K). But how smart is the +# compiler? Does it know to that it can always use 16 bit data pointers? +# Can it tell the difference between a data pointer and a code pointer? +# +# Be careful out there. +# +#PFLAGS += -mdata-64k VOLUME_FILE = volumes-stm25p.xml VOLUME_ALLOCATOR ?= tos-storage-stm25p diff --git a/tos/chips/msp430/00_README b/tos/chips/msp430/00_README new file mode 100644 index 0000000000..5e37f9c767 --- /dev/null +++ b/tos/chips/msp430/00_README @@ -0,0 +1,87 @@ + +This directory contains interface files for the TI msp430 family of CPUs. +The TI architecture is rather scattered and the cpu interface to major +pieces reflects this. The main problem areas include: peripheral registers, +interrupts, and interrupt vectors. + +Care should be taken to minimize duplicates while maintaining the minimum implementation +that reflects the cpus currently supported by TinyOS. This should be done in a way +that minimizes impact on existing implementations (be backward compatible). See the +file 01_Dependencies for what CPUs are supported and the cpu dependencies. + +Where reasonable, conflicting areas are kept in a flat file and differences are +#ifdef'd. When this becomes too cumbersome, different interface definitions and +implementations are placed into cpu family directories and the interface to +the reset of the tinyos os is shadowed. The correct directory needs to be +specified in the .platform file. + +Most of the cpu definitions are obtained automatically via the toolchain, ie. the -mmcu +specification automatically included the appropriate cpu header file. ie. -mmcu=msp430x2618 +causes the msp430f2618.h include file to be invoked. + +The TI MSP430 family has many variants. There is a main cpu core and various integrated peripherals on +chip. What a given chip includes is spelled out by the included chip definition file automatically +included via the -mmcu mechanism. + +The tinyos interface is spit into several sections: + +msp430hardware.h and msp430regtypes.h define various other attributes that interface the cpu +to the tinyos environment. These files coupled with the chip definition file define the cpu +and other capabilities available. + +The original architecture, the MSP430, provides 16 bit addresses. A subsequent revision denoted +MSP430X modifies the cpu and addressing to provide 20 bit addresses. Backward compatibilty to the +MSP430 was considered. A further modification is denoted the MSP430XV2 but it is unclear exactly +what this modified. + +Several directories are available that provide the drivers for the specified peripheral. Presence +of the peripheral can be detected by checking appropriate values in the chip definition file. These +directories are: + +adc12: Most MSP430 chips include a 12 bit analog to digital converter. + +dma: 3 or 8 independent dma channels are provided. MSP430X cpus can address 20 bits via the DMA + engines. 20 bits increases the overhead significantly and should only be used if really + needed. ie. Most cpus only provide RAM in the lower 64K so there really isn't much need + for 20 bit addresses, unless one is DMAing out of high memory (ROM). + + Currently, only a 16 bit dma interface is provided. In the future a dma32 interface could + be defined to provide access to the full 20 bits of addressing. + +pins: interface to digital I/O. + +sensors: interfaces to on chip internal temperature and voltage sensors. + +timer: interface to on chip timing mechanisms. Timers and Alarms. + +usart: interface to original UART/SPI/I2C on MSP430 parts. (1st generation). + +usci: interface to USCI modules UART/SPI/I2C on MSP430X and later parts. + + + +CPU Families: + +When it is too cumbersome to maintain a flat file that includes #ifdef'd difference for each of +the different variants, it is useful to seperate common interfaces into cpu family dependent family +files that provide various TinyOS interfaces. + +The following families and what cpus are supported are listed below. When a new cpu is added to TinyOS +support, it can first be isolated and supported independently. When commonalities are understood, any +duplication can be removed and subsumed into a flat file via #ifdef's as appropriate. Any remaining +interfaces that are too cumbersome, can be supported by an existing cpu family interface or a new family +can be defined as appropriate. The intent is to provide a mechanism that allows gradual refactorization as +new cpus are brought into the fold. + +The following families currently exist. Included are what cpus have been verified. Only add cpus that +have actually been instantiated. + +x1xxx: msp430f1611, msp430f149 + telos{a,b}, epic, eyesIFXv1, eyesIFXv2, shimmer{,2,2r}, span, tinynode + +x2xxx: msp430f2617, msp430f2618, msp430f2619 + Z1, MM4 (mam-mark mote) + +x5xxx: cc430f5137, msp430f5438{,a} + surf, ev430, mm5 (mam-mark mote) + diff --git a/tos/chips/msp430/01_Dependencies b/tos/chips/msp430/01_Dependencies new file mode 100644 index 0000000000..298179fb46 --- /dev/null +++ b/tos/chips/msp430/01_Dependencies @@ -0,0 +1,132 @@ + +CPU families: + +We currently define 3 cpu families that group similar TI msp430 chips together. Two chips +can be grouped together if for that module or interface the behaviour is the same. + +The main family is simply "msp430" and whenever possible we endevour to put everything we can into the +generic msp430 directory. This is the top level. However when it becomes too cumbersome to make +this fit for a given functionality, it may be necessary to split a new cpu out into one of the family +directories. These are subdirectories off msp430, ie. msp430/x1xxx and are selected by the .platform +file for a platform. + +Currently what differentiates the different family directories is interrupt behaviour, peripheral +register mapping, low power behaviour. + + +CPUs supported: + + x1xxx: msp430f149, msp430f1611 + x2xxx: msp430f261{6,7,8,9} + x5xxx: cc430f513{7,8,8a} + + +Interrupt Vectors: + +x1xxx vectors: (149, 1611) x2xxx vectors: (msp430f261{6,7,8,9}) + + 14 DAC12_VECTOR + 15 DMA_VECTOR +0xFFE0 0 DACDMA_VECTOR (1611 only) 16 USCIAB1TX_VECTOR +0xFFE2 1 PORT2_VECTOR 17 USCIAB1RX_VECTOR +0xFFE4 2 USART1TX_VECTOR 18 PORT1_VECTOR +0xFFE6 3 USART1RX_VECTOR 19 PORT2_VECTOR +0xFFE8 4 PORT1_VECTOR 20 RESERVED20_VECTOR +0xFFEA 5 TIMERA1_VECTOR Timer A CC1-2 21 ADC12_VECTOR +0xFFEC 6 TIMERA0_VECTOR Timer A CC0 22 USCIAB0TX_VECTOR +0xFFEE 7 ADC12_VECTOR 23 USCIAB0RX_VECTOR +0xFFF0 8 USART0TX_VECTOR 24 TIMERA1_VECTOR Timer A CC1-2 +0xFFF2 9 USART0RX_VECTOR 25 TIMERA0_VECTOR Timer A CC0 +0xFFF4 1 WDT_VECTOR 26 WDT_VECTOR +0xFFF6 1 COMPARATORA_VECTOR 27 COMPARATORA_VECTOR +0xFFF8 1 TIMERB1_VECTOR Timer B CC1-6 28 TIMERB1_VECTOR Timer B CC1-6 +0xFFFA 1 TIMERB0_VECTOR Timer B CC0 29 TIMERB0_VECTOR Timer B CC0 +0xFFFC 1 NMI_VECTOR 30 NMI_VECTOR +0xFFFE 15 RESET_VECTOR 31 RESET_VECTOR + + +x5xxx vectors: (msp430f543{5,6,7,8}{,a}, cc430f5137) + +543{5,6,7,8}{,a} cc430f5137 +0xFFD2 41 RTC_VECTOR +0xFFD4 42 PORT2_VECTOR +0xFFD6 43 USCI_B3_VECTOR +0xFFD8 44 USCI_A3_VECTOR +0xFFDA 45 USCI_B1_VECTOR 45 AES_VECTOR +0xFFDC 46 USCI_A1_VECTOR 46 RTC_VECTOR +0xFFDE 47 PORT1_VECTOR +0xFFE0 48 TIMER1_A1_VECTOR Timer1_A3, CC1-2 48 PORT2_VECTOR +0xFFE2 49 TIMER1_A0_VECTOR Timer1_A3, CC0 49 PORT1_VECTOR +0xFFE4 50 DMA_VECTOR 50 TIMER1_A1_VECTOR Timer1_A3 CC1-2 +0xFFE6 51 USCI_B2_VECTOR 51 TIMER1_A0_VECTOR Timer1_A3 CC0 +0xFFE8 52 USCI_A2_VECTOR 52 DMA_VECTOR +0xFFEA 53 TIMER0_A1_VECTOR Timer0_A5 CC1-4 53 CC1101_VECTOR +0xFFEC 54 TIMER0_A0_VECTOR Timer0_A5 CC0 54 TIMER0_A1_VECTOR Timer0_A5 CC1-4 +0xFFEE 55 ADC12_VECTOR 55 TIMER0_A0_VECTOR Timer0_A5 CC0 +0xFFF0 56 USCI_B0_VECTOR 56 ADC12_VECTOR +0xFFF2 57 USCI_A0_VECTOR 57 USCI_B0_VECTOR +0xFFF4 58 WDT_VECTOR 58 USCI_A0_VECTOR +0xFFF6 59 TIMER0_B1_VECTOR Timer0_B7 CC1-6 59 WDT_VECTOR +0xFFF8 60 TIMER0_B0_VECTOR Timer0_B7 CC0 60 COMP_B_VECTOR +0xFFFA 61 UNMI_VECTOR 61 UNMI_VECTOR +0xFFFC 62 SYSNMI_VECTOR 62 SYSNMI_VECTOR +0xFFFE 63 RESET_VECTOR 63 RESET_VECTOR + + +1) Vectors move to various addresses dependent on what cpu you are using. (This is taken care of by + proper usage of the cpu header files. + +2) Depending on family, vectors are shared across function. This complicates things and is ugly. + + ie. x1xxx vector 0 is DACDMA (shared with DAC and DMA) but on the x2xxx and x5xxx families DMA + has its own vector and no DAC vector (no DAC). + + Worse yet is the sharing of vectors for the USCI on the x2xxx parts. A vector is provided for + USCIAB0TX_VECTOR which is shared across both the A side and B side of the USCI which typically + can be operated in very different modes. This has been cleaned up in the x5xxx series parts. + + +Addressing: + +The x1xxx family supports 16 bit addressing, x2xxx and x5xxx support 20 bit addresses. + +x2xxx family parts define __MSP430_HAS_MSP430X_CPU__ +x5xxx family parts define __MSP430_HAS_MSP430XV2_CPU__ + +Either __MSP430_HAS_MSP430X_CPU__ or __MSP430_HAS_MSP430XV2_CPU__ indicates the potential +for 20 bit addresses. Whether 20 bit addresses are being used depends on what switches +are passed to the toolchain. + + +ADC12: + +The adc12 module is supported on x1xxx, x2xxx, and x5xxx parts. ADC12_VECTOR is defined and +the module behaves the same for all supported families. No special support needs to be +provided. + + +DMA: + +1) Addressing. The x1xxx family only supports 16 bit addresses. The x2xxx and x5xxx support + 20 bit addresses. + + x1xxx family parts define __MSP430_HAS_DMA_3__ (16 bit addresses, 3 channels). + x2xxx, x5xxx family parts define __MSP430_HAS_DMAX_3__ (20 bit addresses, 3 channels). + + DMAX modules provide 2 16-bit address objects for each DMA address needed. (20 bit defined) + The lower 16 bit object is equivilent to a DMA address on a non-DMAX module. When this lower + object is written the upper is automatically zeroed. This provides backward compatibility + for drivers written for non-DMAX modules. These drivers will work fine with DMAX modules + when accessing the lower 64K of memory. + +2) DMA Transfer select. Transfer select fields determine what a DMA engine (channel) should + use to initiate a transfer cycle. These fields maybe 4 or 5 bits wide and the driver needs + to know how to construct an appropriate control word when interacting with the h/w. + + +3) Interrupt vector: + + On the x1xxx family, the vector is named DACDMA_VECTOR and other families use DMA_VECTOR. + + The driver uses either DACDMA_VECTOR or DMA_VECTOR if defined. Otherwise complains about lack of + support. diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc index f76717742f..b15eb216f4 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaC.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaC.nc @@ -98,4 +98,3 @@ implementation { Dma2.Interrupt -> HplMsp430DmaP; } - diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaP.nc index d3121f5f4a..739b116107 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaP.nc @@ -65,9 +65,21 @@ * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre - * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $ + * @author Xavier Orduna + * @author Eric B. Decker */ +/* + * + +#if defined(DACDMA_VECTOR) +#define __DMA_VECTOR DACDMA_VECTOR +#elif defined(DMA_VECTOR) +#define __DMA_VECTOR DMA_VECTOR +#else +#error "DMA VECTOR not defined for cpu selected" +#endif + module HplMsp430DmaP { provides interface HplMsp430DmaControl as DmaControl; @@ -80,7 +92,7 @@ implementation { MSP430REG_NORACE( DMACTL0 ); MSP430REG_NORACE( DMACTL1 ); - TOSH_SIGNAL( DACDMA_VECTOR ) { + TOSH_SIGNAL(__DMA_VECTOR) { signal Interrupt.fired(); } @@ -121,6 +133,4 @@ implementation { DMACTL0 = 0; DMACTL1 = 0; } - } - diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h index d3363ef9d1..a63ba010f2 100644 --- a/tos/chips/msp430/dma/Msp430Dma.h +++ b/tos/chips/msp430/dma/Msp430Dma.h @@ -65,7 +65,32 @@ * @author Ben Greenstein * @author Jonathan Hui * @author Mark Hays - * $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker + */ + +/* + * This approach is broken. + * + * This file is defining alot of h/w definitions which should come from the cpu + * definition file. This file should define what is needed for the interface between + * tinyos and the h/w. + * + * Currently only works for 3 channel DMA and 4 bit TSEL fields. ie. x1xxx and + * x2xxx processors. This will need to be reworked for the 5438 with 5 bit + * TSEL fields. + * + * This file defines how many channels are available but this should come from + * the cpu definition file. + * + * This file defines what the Triggers (Transfer select) values are and how + * wide the field is. + * + * Needs to be rewritten. Possible approach is to abstract the request which + * then maps it into the appropriate TSEL value. Driver needs to compensate + * for the TSEL width and needs to know how to correctly build the control + * word for the h/w. + * + * Want to start moving this to a less cpu centric abstraction layer. */ #ifndef MSP430DMA_H diff --git a/tos/chips/msp430/msp430regtypes.h b/tos/chips/msp430/msp430regtypes.h index bb237be6e5..665733c8b4 100644 --- a/tos/chips/msp430/msp430regtypes.h +++ b/tos/chips/msp430/msp430regtypes.h @@ -1,5 +1,7 @@ - -/* Copyright (c) 2000-2003 The Regents of the University of California. +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -8,10 +10,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -28,27 +32,48 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Cory Sharp + * @author Xavier Orduna + * @author Eric B. Decker */ -//@author Cory Sharp #ifndef _H_msp430regtypes_h #define _H_msp430regtypes_h /* - To generate the primary contents of this file seen below, in - mspgcc/msp430/include/, execute the following command: - - find . | xargs perl -ne ' - BEGIN { %t = qw(b uint8_t w uint16_t); } - if( /\bsfr([bw])\s*\(\s*(\w+)/ && length($2) > 1 ) { - $r{$2} = $t{$1}; - print "#define TYPE_$2 $t{$1}\n" if /\bsfr([bw])\s*\(\s*(\w+)/; - } elsif( /^#define\s+(\w+)\s+(\w+)\s+$/ ) { - print "#define TYPE_$1 $r{$2}\n" if $r{$2}; - } - ' | sort -u -*/ + * With the mspgcc (gcc 3.2.3) toolchain the following was used to + * generate this file. With mspgcc4 (gcc 4.4.5), uniarch, and TI_HEADERS + * this is no longer true. + * + * Rather, this file is maintained by hand and is essentially the union of + * the cpu definitions that are currently being used and supported by the + * msp430 TinyOS trunk. + * + * But really, how are these values used and how do we want to use them if + * any going forward. It seems like a different way of using these kinds + * of things should be found and then this file goes away. Or becomes minimal + * + * +#ifdef notdef + * + * No longer supported. Kept for historical reference: + * + * To generate the primary contents of this file seen below, in + * mspgcc/msp430/include/, execute the following command: + * + * find . | xargs perl -ne ' + * BEGIN { %t = qw(b uint8_t w uint16_t); } + * if( /\bsfr([bw])\s*\(\s*(\w+)/ && length($2) > 1 ) { + * $r{$2} = $t{$1}; + * print "#define TYPE_$2 $t{$1}\n" if /\bsfr([bw])\s*\(\s*(\w+)/; + * } elsif( /^#define\s+(\w+)\s+(\w+)\s+$/ ) { + * print "#define TYPE_$1 $r{$2}\n" if $r{$2}; + * } + * ' | sort -u +#endif + */ #define TYPE_ACTL uint16_t #define TYPE_ADAT uint16_t @@ -66,12 +91,6 @@ #define TYPE_ADC12IV uint16_t #define TYPE_ADC12MCTL0 uint8_t #define TYPE_ADC12MCTL1 uint8_t -#define TYPE_ADC12MCTL10 uint8_t -#define TYPE_ADC12MCTL11 uint8_t -#define TYPE_ADC12MCTL12 uint8_t -#define TYPE_ADC12MCTL13 uint8_t -#define TYPE_ADC12MCTL14 uint8_t -#define TYPE_ADC12MCTL15 uint8_t #define TYPE_ADC12MCTL2 uint8_t #define TYPE_ADC12MCTL3 uint8_t #define TYPE_ADC12MCTL4 uint8_t @@ -80,14 +99,14 @@ #define TYPE_ADC12MCTL7 uint8_t #define TYPE_ADC12MCTL8 uint8_t #define TYPE_ADC12MCTL9 uint8_t +#define TYPE_ADC12MCTL10 uint8_t +#define TYPE_ADC12MCTL11 uint8_t +#define TYPE_ADC12MCTL12 uint8_t +#define TYPE_ADC12MCTL13 uint8_t +#define TYPE_ADC12MCTL14 uint8_t +#define TYPE_ADC12MCTL15 uint8_t #define TYPE_ADC12MEM0 uint16_t #define TYPE_ADC12MEM1 uint16_t -#define TYPE_ADC12MEM10 uint16_t -#define TYPE_ADC12MEM11 uint16_t -#define TYPE_ADC12MEM12 uint16_t -#define TYPE_ADC12MEM13 uint16_t -#define TYPE_ADC12MEM14 uint16_t -#define TYPE_ADC12MEM15 uint16_t #define TYPE_ADC12MEM2 uint16_t #define TYPE_ADC12MEM3 uint16_t #define TYPE_ADC12MEM4 uint16_t @@ -96,15 +115,37 @@ #define TYPE_ADC12MEM7 uint16_t #define TYPE_ADC12MEM8 uint16_t #define TYPE_ADC12MEM9 uint16_t +#define TYPE_ADC12MEM10 uint16_t +#define TYPE_ADC12MEM11 uint16_t +#define TYPE_ADC12MEM12 uint16_t +#define TYPE_ADC12MEM13 uint16_t +#define TYPE_ADC12MEM14 uint16_t +#define TYPE_ADC12MEM15 uint16_t #define TYPE_AEN uint16_t #define TYPE_AIN uint16_t #define TYPE_BCSCTL1 uint8_t #define TYPE_BCSCTL2 uint8_t +#define TYPE_BCSCTL3 uint8_t #define TYPE_BTCNT1 uint8_t #define TYPE_BTCNT2 uint8_t #define TYPE_BTCTL uint8_t #define TYPE_CACTL1 uint8_t #define TYPE_CACTL2 uint8_t + +/* + * WARNING: All clocking in TinyOS is done as powers of 2. Time is done as + * binary millisecs, binary micro-secs, etc. binary MHz (MiHz). However, + * TI specifies their calibration constants using decimal MHz. Your mileage will vary. + */ +#define TYPE_CALBC1_1MHZ uint8_t +#define TYPE_CALBC1_8MHZ uint8_t +#define TYPE_CALBC1_12MHZ uint8_t +#define TYPE_CALBC1_16MHZ uint8_t +#define TYPE_CALDCO_1MHZ uint8_t +#define TYPE_CALDCO_8MHZ uint8_t +#define TYPE_CALDCO_12MHZ uint8_t +#define TYPE_CALDCO_16MHZ uint8_t + #define TYPE_CAPD uint8_t #define TYPE_CBCTL uint8_t #define TYPE_CCR0 uint16_t @@ -113,23 +154,35 @@ #define TYPE_CCTL0 uint16_t #define TYPE_CCTL1 uint16_t #define TYPE_CCTL2 uint16_t + +/* + * Are these two still used? + */ #define TYPE_DAC12CTL0 uint16_t #define TYPE_DAC12IFG uint16_t + #define TYPE_DAC12_0CTL uint16_t #define TYPE_DAC12_0DAT uint16_t #define TYPE_DAC12_1CTL uint16_t #define TYPE_DAC12_1DAT uint16_t + #define TYPE_DCOCTL uint8_t #define TYPE_DMA0CTL uint16_t +#define TYPE_DMA0DAL uint16_t #define TYPE_DMA0DA uint16_t +#define TYPE_DMA0SAL uint16_t #define TYPE_DMA0SA uint16_t #define TYPE_DMA0SZ uint16_t #define TYPE_DMA1CTL uint16_t +#define TYPE_DMA1DAL uint16_t #define TYPE_DMA1DA uint16_t +#define TYPE_DMA1SAL uint16_t #define TYPE_DMA1SA uint16_t #define TYPE_DMA1SZ uint16_t #define TYPE_DMA2CTL uint16_t +#define TYPE_DMA2DAL uint16_t #define TYPE_DMA2DA uint16_t +#define TYPE_DMA2SAL uint16_t #define TYPE_DMA2SA uint16_t #define TYPE_DMA2SZ uint16_t #define TYPE_DMACTL0 uint16_t @@ -142,7 +195,13 @@ #define TYPE_FLL_CTL0 uint8_t #define TYPE_FLL_CTL1 uint8_t #define TYPE_I2CDCTL uint8_t -#define TYPE_I2CDR uint8_t + +/* + * I2CDR is the old old name. Should get converted to using I2CDRB. + */ +#define TYPE_I2CDR uint8_t +#define TYPE_I2CDRB uint8_t +#define TYPE_I2CDRW uint16_t #define TYPE_I2CIE uint8_t #define TYPE_I2CIFG uint8_t #define TYPE_I2CIV uint16_t @@ -157,20 +216,16 @@ #define TYPE_IE2 uint8_t #define TYPE_IFG1 uint8_t #define TYPE_IFG2 uint8_t + +#define TYPE_LCDACTL uint8_t +#define TYPE_LCDAPCTL0 uint8_t +#define TYPE_LCDAPCTL1 uint8_t +#define TYPE_LCDAVCTL0 uint8_t +#define TYPE_LCDAVCTL1 uint8_t #define TYPE_LCDCTL uint8_t + #define TYPE_LCDM1 uint8_t -#define TYPE_LCDM10 uint8_t -#define TYPE_LCDM11 uint8_t -#define TYPE_LCDM12 uint8_t -#define TYPE_LCDM13 uint8_t -#define TYPE_LCDM14 uint8_t -#define TYPE_LCDM15 uint8_t -#define TYPE_LCDM16 uint8_t -#define TYPE_LCDM17 uint8_t -#define TYPE_LCDM18 uint8_t -#define TYPE_LCDM19 uint8_t #define TYPE_LCDM2 uint8_t -#define TYPE_LCDM20 uint8_t #define TYPE_LCDM3 uint8_t #define TYPE_LCDM4 uint8_t #define TYPE_LCDM5 uint8_t @@ -184,7 +239,19 @@ #define TYPE_LCDMD uint8_t #define TYPE_LCDME uint8_t #define TYPE_LCDMF uint8_t -#define TYPE_MAC uint16_t +#define TYPE_LCDM10 uint8_t +#define TYPE_LCDM11 uint8_t +#define TYPE_LCDM12 uint8_t +#define TYPE_LCDM13 uint8_t +#define TYPE_LCDM14 uint8_t +#define TYPE_LCDM15 uint8_t +#define TYPE_LCDM16 uint8_t +#define TYPE_LCDM17 uint8_t +#define TYPE_LCDM18 uint8_t +#define TYPE_LCDM19 uint8_t +#define TYPE_LCDM20 uint8_t + +#define TYPE_MAC uint16_t #define TYPE_MACS uint16_t #define TYPE_MBCTL uint16_t #define TYPE_MBIN0 uint16_t @@ -193,58 +260,121 @@ #define TYPE_MBOUT1 uint16_t #define TYPE_ME1 uint8_t #define TYPE_ME2 uint8_t -#define TYPE_MPY uint16_t -#define TYPE_MPYS uint16_t + #define TYPE_OA0CTL0 uint8_t #define TYPE_OA0CTL1 uint8_t #define TYPE_OA1CTL0 uint8_t #define TYPE_OA1CTL1 uint8_t #define TYPE_OA2CTL0 uint8_t #define TYPE_OA2CTL1 uint8_t -#define TYPE_OP2 uint16_t + #define TYPE_PORT_OUT uint8_t #define TYPE_PORT_IN uint8_t #define TYPE_PORT_DIR uint8_t #define TYPE_PORT_SEL uint8_t #define TYPE_PORT_REN uint8_t + +/* + * Port 0? very odd. TI starts with P1 so where did P0 come from? + */ +#define TYPE_P0IN uint8_t +#define TYPE_P0OUT uint8_t #define TYPE_P0DIR uint8_t -#define TYPE_P0IE uint8_t -#define TYPE_P0IES uint8_t #define TYPE_P0IFG uint8_t -#define TYPE_P0IN uint8_t -#define TYPE_P0OUT uint8_t +#define TYPE_P0IES uint8_t +#define TYPE_P0IE uint8_t +#define TYPE_P0SEL uint8_t + +#define TYPE_P1IN uint8_t +#define TYPE_P1OUT uint8_t #define TYPE_P1DIR uint8_t -#define TYPE_P1IE uint8_t -#define TYPE_P1IES uint8_t #define TYPE_P1IFG uint8_t -#define TYPE_P1IN uint8_t -#define TYPE_P1OUT uint8_t +#define TYPE_P1IES uint8_t +#define TYPE_P1IE uint8_t #define TYPE_P1SEL uint8_t +#define TYPE_P1REN uint8_t + +#define TYPE_P2IN uint8_t +#define TYPE_P2OUT uint8_t #define TYPE_P2DIR uint8_t -#define TYPE_P2IE uint8_t -#define TYPE_P2IES uint8_t #define TYPE_P2IFG uint8_t -#define TYPE_P2IN uint8_t -#define TYPE_P2OUT uint8_t +#define TYPE_P2IES uint8_t +#define TYPE_P2IE uint8_t #define TYPE_P2SEL uint8_t -#define TYPE_P3DIR uint8_t -#define TYPE_P3IN uint8_t +#define TYPE_P2REN uint8_t + +#define TYPE_P3IN uint8_t #define TYPE_P3OUT uint8_t +#define TYPE_P3DIR uint8_t #define TYPE_P3SEL uint8_t -#define TYPE_P4DIR uint8_t -#define TYPE_P4IN uint8_t +#define TYPE_P3REN uint8_t + +#define TYPE_P4IN uint8_t #define TYPE_P4OUT uint8_t +#define TYPE_P4DIR uint8_t #define TYPE_P4SEL uint8_t -#define TYPE_P5DIR uint8_t -#define TYPE_P5IN uint8_t +#define TYPE_P4REN uint8_t + +#define TYPE_P5IN uint8_t #define TYPE_P5OUT uint8_t +#define TYPE_P5DIR uint8_t #define TYPE_P5SEL uint8_t -#define TYPE_P6DIR uint8_t -#define TYPE_P6IN uint8_t +#define TYPE_P5REN uint8_t + +#define TYPE_P6IN uint8_t #define TYPE_P6OUT uint8_t +#define TYPE_P6DIR uint8_t #define TYPE_P6SEL uint8_t +#define TYPE_P6REN uint8_t + +#define TYPE_P7DIR uint8_t +#define TYPE_P7IN uint8_t +#define TYPE_P7OUT uint8_t +#define TYPE_P7SEL uint8_t + +#define TYPE_P8DIR uint8_t +#define TYPE_P8IN uint8_t +#define TYPE_P8OUT uint8_t +#define TYPE_P8SEL uint8_t + +#define TYPE_P9DIR uint8_t +#define TYPE_P9IN uint8_t +#define TYPE_P9OUT uint8_t +#define TYPE_P9SEL uint8_t + +#define TYPE_P10DIR uint8_t +#define TYPE_P10IN uint8_t +#define TYPE_P10OUT uint8_t +#define TYPE_P10SEL uint8_t + +#ifdef notdef +/* + * the z1 defined the following: + */ +#define TYPE_PAIN uint8_t +#define TYPE_PBIN uint8_t + +/* + * but the 2618 defines PAIN as a sfrw at 38 + * and there is no PBIN. + */ +#define TYPE_PAIN uint16_t +paout +padir +pasel +paren + +#endif + +#define TYPE_MPY uint16_t +#define TYPE_MPYS uint16_t +#define TYPE_OP2 uint16_t #define TYPE_RESHI uint16_t #define TYPE_RESLO uint16_t + +/* + * what are these RET things? + */ #define TYPE_RET0 uint16_t #define TYPE_RET1 uint16_t #define TYPE_RET10 uint16_t @@ -277,17 +407,36 @@ #define TYPE_RET7 uint16_t #define TYPE_RET8 uint16_t #define TYPE_RET9 uint16_t + +#define TYPE_RTCCTL uint8_t +#define TYPE_RTCDAY uint8_t +#define TYPE_RTCDOW uint8_t +#define TYPE_RTCHOUR uint8_t +#define TYPE_RTCMIN uint8_t +#define TYPE_RTCMON uint8_t +#define TYPE_RTCNT1 uint8_t +#define TYPE_RTCNT2 uint8_t +#define TYPE_RTCNT3 uint8_t +#define TYPE_RTCNT4 uint8_t +#define TYPE_RTCSEC uint8_t +#define TYPE_RTCTL uint8_t +#define TYPE_RTCYEARH uint8_t +#define TYPE_RTCYEARL uint8_t + #define TYPE_RXBUF uint8_t #define TYPE_RXBUF0 uint8_t -#define TYPE_RXBUF1 uint8_t #define TYPE_RXBUF_0 uint8_t +#define TYPE_RXBUF1 uint8_t #define TYPE_RXBUF_1 uint8_t #define TYPE_SCFI0 uint8_t #define TYPE_SCFI1 uint8_t #define TYPE_SCFQCTL uint8_t +#define TYPE_SD16AE uint8_t #define TYPE_SD16CCTL0 uint16_t #define TYPE_SD16CCTL1 uint16_t #define TYPE_SD16CCTL2 uint16_t +#define TYPE_SD16CONF0 uint8_t +#define TYPE_SD16CONF1 uint8_t #define TYPE_SD16CTL uint16_t #define TYPE_SD16INCTL0 uint8_t #define TYPE_SD16INCTL1 uint8_t @@ -317,6 +466,14 @@ #define TYPE_SIFTPSMV uint16_t #define TYPE_SIFTSM0 uint16_t #define TYPE_SIFTSM1 uint16_t +#define TYPE_SIFTSM2 uint16_t +#define TYPE_SIFTSM3 uint16_t +#define TYPE_SIFTSM4 uint16_t +#define TYPE_SIFTSM5 uint16_t +#define TYPE_SIFTSM6 uint16_t +#define TYPE_SIFTSM7 uint16_t +#define TYPE_SIFTSM8 uint16_t +#define TYPE_SIFTSM9 uint16_t #define TYPE_SIFTSM10 uint16_t #define TYPE_SIFTSM11 uint16_t #define TYPE_SIFTSM12 uint16_t @@ -327,20 +484,13 @@ #define TYPE_SIFTSM17 uint16_t #define TYPE_SIFTSM18 uint16_t #define TYPE_SIFTSM19 uint16_t -#define TYPE_SIFTSM2 uint16_t #define TYPE_SIFTSM20 uint16_t #define TYPE_SIFTSM21 uint16_t #define TYPE_SIFTSM22 uint16_t #define TYPE_SIFTSM23 uint16_t -#define TYPE_SIFTSM3 uint16_t -#define TYPE_SIFTSM4 uint16_t -#define TYPE_SIFTSM5 uint16_t -#define TYPE_SIFTSM6 uint16_t -#define TYPE_SIFTSM7 uint16_t -#define TYPE_SIFTSM8 uint16_t -#define TYPE_SIFTSM9 uint16_t #define TYPE_SUMEXT uint16_t #define TYPE_SVSCTL uint8_t +#define TYPE_SWCTL uint8_t #define TYPE_TA0CCR0 uint16_t #define TYPE_TA0CCR1 uint16_t #define TYPE_TA0CCR2 uint16_t @@ -390,6 +540,11 @@ #define TYPE_TBIV uint16_t #define TYPE_TBR uint16_t #define TYPE_TCCTL uint8_t +#define TYPE_TLV_ADC12_1_LEN uint8_t +#define TYPE_TLV_ADC12_1_TAG uint8_t +#define TYPE_TLV_CHECKSUM uint16_t +#define TYPE_TLV_DCO_30_LEN uint8_t +#define TYPE_TLV_DCO_30_TAG uint8_t #define TYPE_TPCNT1 uint8_t #define TYPE_TPCNT2 uint8_t #define TYPE_TPCTL uint8_t @@ -426,6 +581,54 @@ #define TYPE_UBR11 uint8_t #define TYPE_UBR1_0 uint8_t #define TYPE_UBR1_1 uint8_t + +#define TYPE_UC0IE uint8_t +#define TYPE_UC0IFG uint8_t +#define TYPE_UC1IE uint8_t +#define TYPE_UC1IFG uint8_t +#define TYPE_UCA0ABCTL uint8_t +#define TYPE_UCA0BR0 uint8_t +#define TYPE_UCA0BR1 uint8_t +#define TYPE_UCA0CTL0 uint8_t +#define TYPE_UCA0CTL1 uint8_t +#define TYPE_UCA0IRRCTL uint8_t +#define TYPE_UCA0IRTCTL uint8_t +#define TYPE_UCA0MCTL uint8_t +#define TYPE_UCA0RXBUF uint8_t +#define TYPE_UCA0STAT uint8_t +#define TYPE_UCA0TXBUF uint8_t +#define TYPE_UCA1ABCTL uint8_t +#define TYPE_UCA1BR0 uint8_t +#define TYPE_UCA1BR1 uint8_t +#define TYPE_UCA1CTL0 uint8_t +#define TYPE_UCA1CTL1 uint8_t +#define TYPE_UCA1IRRCTL uint8_t +#define TYPE_UCA1IRTCTL uint8_t +#define TYPE_UCA1MCTL uint8_t +#define TYPE_UCA1RXBUF uint8_t +#define TYPE_UCA1STAT uint8_t +#define TYPE_UCA1TXBUF uint8_t +#define TYPE_UCB0BR0 uint8_t +#define TYPE_UCB0BR1 uint8_t +#define TYPE_UCB0CTL0 uint8_t +#define TYPE_UCB0CTL1 uint8_t +#define TYPE_UCB0I2CIE uint8_t +#define TYPE_UCB0I2COA uint16_t +#define TYPE_UCB0I2CSA uint16_t +#define TYPE_UCB0RXBUF uint8_t +#define TYPE_UCB0STAT uint8_t +#define TYPE_UCB0TXBUF uint8_t +#define TYPE_UCB1BR0 uint8_t +#define TYPE_UCB1BR1 uint8_t +#define TYPE_UCB1CTL0 uint8_t +#define TYPE_UCB1CTL1 uint8_t +#define TYPE_UCB1I2CIE uint8_t +#define TYPE_UCB1I2COA uint16_t +#define TYPE_UCB1I2CSA uint16_t +#define TYPE_UCB1RXBUF uint8_t +#define TYPE_UCB1STAT uint8_t +#define TYPE_UCB1TXBUF uint8_t + #define TYPE_UCTL uint8_t #define TYPE_UCTL0 uint8_t #define TYPE_UCTL1 uint8_t @@ -441,6 +644,17 @@ #define TYPE_URCTL1 uint8_t #define TYPE_URCTL_0 uint8_t #define TYPE_URCTL_1 uint8_t + +#define TYPE_USICCTL uint16_t +#define TYPE_USICKCTL uint8_t +#define TYPE_USICNT uint8_t +#define TYPE_USICTL0 uint8_t +#define TYPE_USICTL1 uint8_t +#define TYPE_USICTL uint16_t +#define TYPE_USISRH uint8_t +#define TYPE_USISRL uint8_t +#define TYPE_USISR uint16_t + #define TYPE_UTCTL uint8_t #define TYPE_UTCTL0 uint8_t #define TYPE_UTCTL1 uint8_t @@ -448,5 +662,4 @@ #define TYPE_UTCTL_1 uint8_t #define TYPE_WDTCTL uint16_t -#endif//_H_msp430regtypes_h - +#endif //_H_msp430regtypes_h diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIO.nc b/tos/chips/msp430/pins/HplMsp430GeneralIO.nc index 5615b75aff..d702b8ef82 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIO.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIO.nc @@ -117,4 +117,3 @@ interface HplMsp430GeneralIO async command uint8_t getResistor(); } - diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 23bd25fd79..4f1b1fda0a 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -1,5 +1,7 @@ - -/* Copyright (c) 2000-2003 The Regents of the University of California. +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -35,7 +37,9 @@ * abstraction for general-purpose I/O. * * @author Joe Polastre + * @author Xavier Orduna * @author Peter A. Bigot + * @author Eric B. Decker */ configuration HplMsp430GeneralIOC @@ -135,6 +139,7 @@ configuration HplMsp430GeneralIOC #endif // this section of HplMsp430GeneralIOC supports the F16x series + // In particular, msp430f1611 #ifdef __msp430x16x provides interface HplMsp430GeneralIO as STE0; provides interface HplMsp430GeneralIO as SIMO0; @@ -168,6 +173,61 @@ configuration HplMsp430GeneralIOC provides interface HplMsp430GeneralIO as SVSOUT; #endif +/* + * Support for the f261{6,7,8,9} processors + * + * Old headers: mspgccX (3.2.3) includes msp430x261x.h (-mmcu=msp430x2617) + * which defines __msp430x261x. + * + * New headers: mspgcc4 (4.4.5, uniarch, TI_HEADERS) defines __msp430x26x. There + * doesn't look like there is any conflict with any other processor defines. + */ +#if defined(__msp430x261x) || defined(__msp430x26x) + provides interface HplMsp430GeneralIO as UCA0CLK; + provides interface HplMsp430GeneralIO as UCA0STE; + provides interface HplMsp430GeneralIO as UCA0TXD; + provides interface HplMsp430GeneralIO as UCA0RXD; + provides interface HplMsp430GeneralIO as UCA0SIMO; + provides interface HplMsp430GeneralIO as UCA0SOMI; + + provides interface HplMsp430GeneralIO as UCB0CLK; + provides interface HplMsp430GeneralIO as UCB0STE; + provides interface HplMsp430GeneralIO as UCB0SIMO; + provides interface HplMsp430GeneralIO as UCB0SOMI; + provides interface HplMsp430GeneralIO as UCB0SDA; + provides interface HplMsp430GeneralIO as UCB0SCL; + + + provides interface HplMsp430GeneralIO as UCA1CLK; + provides interface HplMsp430GeneralIO as UCA1STE; + provides interface HplMsp430GeneralIO as UCA1TXD; + provides interface HplMsp430GeneralIO as UCA1RXD; + provides interface HplMsp430GeneralIO as UCA1SIMO; + provides interface HplMsp430GeneralIO as UCA1SOMI; + + provides interface HplMsp430GeneralIO as UCB1CLK; + provides interface HplMsp430GeneralIO as UCB1STE; + provides interface HplMsp430GeneralIO as UCB1SIMO; + provides interface HplMsp430GeneralIO as UCB1SOMI; + provides interface HplMsp430GeneralIO as UCB1SDA; + provides interface HplMsp430GeneralIO as UCB1SCL; + + provides interface HplMsp430GeneralIO as ADC0; + provides interface HplMsp430GeneralIO as ADC1; + provides interface HplMsp430GeneralIO as ADC2; + provides interface HplMsp430GeneralIO as ADC3; + provides interface HplMsp430GeneralIO as ADC4; + provides interface HplMsp430GeneralIO as ADC5; + provides interface HplMsp430GeneralIO as ADC6; + provides interface HplMsp430GeneralIO as ADC7; + + provides interface HplMsp430GeneralIO as DAC0; + provides interface HplMsp430GeneralIO as DAC1; + + provides interface HplMsp430GeneralIO as SVSIN; + provides interface HplMsp430GeneralIO as SVSOUT; +#endif + #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) provides interface HplMsp430GeneralIO as CBOUT0; provides interface HplMsp430GeneralIO as TA0CLK; @@ -467,6 +527,51 @@ implementation SVSOUT = P57; #endif +#if defined(__msp430x261x) || defined(__msp430x26x) + UCA0CLK = P30; + UCA0STE = P33; + UCA0TXD = P34; + UCA0RXD = P35; + UCA0SIMO = P34; + UCA0SOMI = P35; + + UCB0CLK = P33; + UCB0STE = P30; + UCB0SIMO = P31; + UCB0SOMI = P32; + UCB0SDA = P31; + UCB0SCL = P32; + + UCA1CLK = P50; + UCA1STE = P53; + UCA1TXD = P36; + UCA1RXD = P37; + UCA1SIMO = P36; + UCA1SOMI = P37; + + UCB1CLK = P53; + UCB1STE = P50; + UCB1SIMO = P51; + UCB1SOMI = P52; + UCB1SDA = P51; + UCB1SCL = P52; + + ADC0 = P60; + ADC1 = P61; + ADC2 = P62; + ADC3 = P63; + ADC4 = P64; + ADC5 = P65; + ADC6 = P66; + ADC7 = P67; + + DAC0 = P66; + DAC1 = P67; + + SVSIN = P67; + SVSOUT = P57; +#endif + #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) /* Terminal functions mapped to port mapping mnemonics, per data * sheet table 3 */ @@ -520,5 +625,4 @@ implementation #endif /* cc430x613x */ #endif /* cc430x513x || cc430x613x */ #endif /* cc430x513x || cc430x612x || cc430x613x */ - } diff --git a/tos/chips/msp430/timer/Msp430TimerCommonP.nc b/tos/chips/msp430/timer/Msp430TimerCommonP.nc index b90c701651..9d53a3af18 100644 --- a/tos/chips/msp430/timer/Msp430TimerCommonP.nc +++ b/tos/chips/msp430/timer/Msp430TimerCommonP.nc @@ -13,4 +13,3 @@ implementation TOSH_SIGNAL(TIMERB0_VECTOR) { signal VectorTimerB0.fired(); } TOSH_SIGNAL(TIMERB1_VECTOR) { signal VectorTimerB1.fired(); } } - diff --git a/tos/chips/msp430/usci/HplMsp430UsciA.nc b/tos/chips/msp430/usci/HplMsp430UsciA.nc new file mode 100644 index 0000000000..4f104bd259 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciA.nc @@ -0,0 +1,160 @@ +/* + * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2004-2005, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Byte-level interface to control Usci based modules (MSP430X), msp430f2618 etc. + * USCI_A supports Uart, SPI, and irDA modes. USCI_B SPI and I2C. Stateless + * interface modeled after HplMsp430Usart of the MSP430 family. + * + * @author Vlado Handziski (handzisk@tkn.tu-berlin.de) + * @author Jan Hauer (hauer@tkn.tu-berlin.de) + * @author Joe Polastre + * @author Xavier Orduna + * @author Eric B. Decker + * + * see msp430usci.h for basic definitions. + * See TI MSP430x2xx Family User's Guide SLAU144E for details. + */ + +#include "msp430usci.h" + +interface HplMsp430UsciA { + + /* UCxxCTL0 */ + async command void setUctl0(msp430_uctl0_t control); + async command msp430_uctl0_t getUctl0(); + + /* UCxxCTL1 */ + async command void setUctl1(msp430_uctl1_t control); + async command msp430_uctl1_t getUctl1(); + + /* UCxxBR1 UCxxBR0 */ + async command void setUbr(uint16_t ubr); + async command uint16_t getUbr(); + + /* UCxxMCTL */ + async command void setUmctl(uint8_t umctl); + async command uint8_t getUmctl(); + + /* + * access usci status registers. yes there are control + * bits in the status register. + */ + /* UCxxSTAT */ + async command void setUstat(uint8_t ustat); + async command uint8_t getUstat(); + + /* + * resetUsci() - reset or unreset module port + * + * reset: TRUE (set UCSWRST) + * FALSE (unset UCSWRST), let the port run + */ + async command void resetUsci(bool reset); + + /* + * return enum indicating what mode the usci port in in. + */ + async command msp430_uscimode_t getMode(); + + /* + * configure or deconfigure gpio pins for SPI mode + * + * switches io pins between port and module function. + */ + async command void enableSpi(); + async command void disableSpi(); + + /* + * Returns TRUE if the Usci is in SPI mode + */ + async command bool isSpi(); + + /* + * configure usci as spi using config. + * leaves interrupts disabled. + */ + async command void setModeSpi(msp430_spi_union_config_t* config); + + /* Interrupt control */ + async command void disableRxIntr(); + async command void disableTxIntr(); + async command void disableIntr(); + async command void enableRxIntr(); + async command void enableTxIntr(); + async command void enableIntr(); + + async command bool isTxIntrPending(); + async command bool isRxIntrPending(); + async command void clrTxIntr(); + async command void clrRxIntr(); + async command void clrIntr(); + + async command bool isTxEmpty(); + + /** + * Transmit a byte of data. When the transmission is completed, + * txDone is generated. Only then a new byte may be + * transmitted, otherwise the previous byte will be overwritten. + */ + async command void tx(uint8_t data); + + /** + * Get current value from RX-buffer. + * + * return: byte received. + */ + async command uint8_t rx(); + + /* + * Returns TRUE if the Usci is in Uart mode + */ + async command bool isUart(); + + /* + * configure or deconfigure gpio pins for UART mode + * + * switches io pins between port and module function. + */ + async command void enableUart(); + async command void disableUart(); + + /* + * configure usci as uart using config. + * leaves interrupts disabled. + */ + async command void setModeUart(msp430_uart_union_config_t* config); +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciA0C.nc b/tos/chips/msp430/usci/HplMsp430UsciA0C.nc new file mode 100644 index 0000000000..02f2b3fb6d --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciA0C.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * An HPL abstraction of USCIA0 on the MSP430X. + * + * @author Jonathan Hui + * @author Joe Polastre + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +#define USING_USCIA0 1 + + +configuration HplMsp430UsciA0C { + provides interface HplMsp430UsciA; + provides interface HplMsp430UsciInterrupts; +} + +implementation { + components HplMsp430UsciA0P as HplUsciP; + HplMsp430UsciA = HplUsciP; + HplMsp430UsciInterrupts = HplUsciP; + + components HplMsp430GeneralIOC as GIO; + HplUsciP.SIMO -> GIO.UCA0SIMO; + HplUsciP.SOMI -> GIO.UCA0SOMI; + HplUsciP.UCLK -> GIO.UCA0CLK; + HplUsciP.URXD -> GIO.UCA0RXD; + HplUsciP.UTXD -> GIO.UCA0TXD; + + components HplMsp430UsciAB0RawInterruptsP as UsciRawInterrupts; + HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciA; +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/usci/HplMsp430UsciA0P.nc new file mode 100644 index 0000000000..f04c4eb0c0 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciA0P.nc @@ -0,0 +1,326 @@ +/* + * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2004-2005, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Implementation of usci A0 (uart or spi) low level functionality - stateless. + * Setting a mode will by default disable USCI-Interrupts. + * + * @author: Jan Hauer + * @author: Jonathan Hui + * @author: Vlado Handziski + * @author: Joe Polastre + * @author: Philipp Huppertz + * @author: Xavier Orduna + * @author: Eric B. Decker + * + * A0, A1: uart, spi, irda. + * B0, B1: spi, i2c. + * + * This module interfaces to usciA0: uart or spi. + */ + +module HplMsp430UsciA0P @safe() { + provides interface HplMsp430UsciA as Usci; + provides interface HplMsp430UsciInterrupts as Interrupts; + + uses interface HplMsp430GeneralIO as SIMO; + uses interface HplMsp430GeneralIO as SOMI; + uses interface HplMsp430GeneralIO as UCLK; + uses interface HplMsp430GeneralIO as URXD; + uses interface HplMsp430GeneralIO as UTXD; + + uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; +} + +implementation { + MSP430REG_NORACE(IE2); + MSP430REG_NORACE(IFG2); + MSP430REG_NORACE(UCA0CTL0); + MSP430REG_NORACE(UCA0CTL1); + MSP430REG_NORACE(UCA0TXBUF); + + async event void UsciRawInterrupts.rxDone(uint8_t temp) { + signal Interrupts.rxDone(temp); + } + + async event void UsciRawInterrupts.txDone() { + signal Interrupts.txDone(); + } + + /* Control registers */ + async command void Usci.setUctl0(msp430_uctl0_t control) { + UCA0CTL0=uctl02int(control); + } + + async command msp430_uctl0_t Usci.getUctl0() { + return int2uctl0(UCA0CTL0); + } + + async command void Usci.setUctl1(msp430_uctl1_t control) { + UCA0CTL1=uctl12int(control); + } + + async command msp430_uctl1_t Usci.getUctl1() { + return int2uctl1(UCA0CTL0); + } + + async command void Usci.setUbr(uint16_t control) { + atomic { + UCA0BR0 = control & 0x00FF; + UCA0BR1 = (control >> 8) & 0x00FF; + } + } + + async command uint16_t Usci.getUbr() { + return (UCA0BR1 << 8) + UCA0BR0; + } + + async command void Usci.setUmctl(uint8_t control) { + UCA0MCTL=control; + } + + async command uint8_t Usci.getUmctl() { + return UCA0MCTL; + } + + async command void Usci.setUstat(uint8_t control) { + UCA0STAT=control; + } + + async command uint8_t Usci.getUstat() { + return UCA0STAT; + } + + /* Operations */ + async command void Usci.resetUsci(bool reset) { + if (reset) + SET_FLAG(UCA0CTL1, UCSWRST); + else + CLR_FLAG(UCA0CTL1, UCSWRST); + } + + bool isSpi() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCA0CTL0); + return (tmp.ucsync && tmp.ucmode != 3); + } + + bool isI2C() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCA0CTL0); + return (tmp.ucsync && tmp.ucmode == 3); + } + + bool isUart() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCA0CTL0); + return (tmp.ucsync == 0); + } + + async command bool Usci.isSpi() { + return isSpi(); + } + + async command msp430_uscimode_t Usci.getMode() { + if (isSpi()) + return USCI_SPI; + if (isI2C()) + return USCI_I2C; + if (isUart()) + return USCI_UART; + else + return USCI_NONE; + } + + async command void Usci.enableSpi() { + atomic { + call SIMO.selectModuleFunc(); + call SOMI.selectModuleFunc(); + call UCLK.selectModuleFunc(); + } + } + + async command void Usci.disableSpi() { + atomic { + call SIMO.selectIOFunc(); + call SOMI.selectIOFunc(); + call UCLK.selectIOFunc(); + } + } + + void configSpi(msp430_spi_union_config_t* config) { + UCA0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); + UCA0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); + call Usci.setUbr(config->spiRegisters.ubr); + call Usci.setUmctl(0); /* MCTL <- 0 if spi */ + } + + async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { + atomic { + call Usci.disableIntr(); + call Usci.clrIntr(); + call Usci.resetUsci(TRUE); + call Usci.enableSpi(); + configSpi(config); + call Usci.resetUsci(FALSE); + } + } + + async command bool Usci.isTxIntrPending(){ + if (IFG2 & UCA0TXIFG) + return TRUE; + return FALSE; + } + + async command bool Usci.isRxIntrPending(){ + if (IFG2 & UCA0RXIFG) + return TRUE; + return FALSE; + } + + async command void Usci.clrTxIntr(){ + IFG2 &= ~UCA0TXIFG; + } + + async command void Usci.clrRxIntr() { + IFG2 &= ~UCA0RXIFG; + } + + async command void Usci.clrIntr() { + IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); + } + + async command void Usci.disableRxIntr() { + IE2 &= ~UCA0RXIE; + } + + async command void Usci.disableTxIntr() { + IE2 &= ~UCA0TXIE; + } + + async command void Usci.disableIntr() { + IE2 &= ~(UCA0TXIE | UCA0RXIE); + } + + async command void Usci.enableRxIntr() { + atomic { + IFG2 &= ~UCA0RXIFG; + IE2 |= UCA0RXIE; + } + } + + async command void Usci.enableTxIntr() { + atomic { + IFG2 &= ~UCA0TXIFG; + IE2 |= UCA0TXIE; + } + } + + async command void Usci.enableIntr() { + atomic { + IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); + IE2 |= (UCA0TXIE | UCA0RXIE); + } + } + + /* + * Returns true if the transmit path is empty. + * + * in the usart hardware there was a seperate bit that indicated + * both parts of the transmitter path were empty. The TXBUF and + * the outgoing shift register. + * + * Unfortunately, TI changed this in the USCI h/w to a single busy + * bit that indcates that either the tx or the rx path is busy. + * So if the transmitter is idle but we are receiving a character + * then we still think the transmitter is busy. TI sucks. + */ + async command bool Usci.isTxEmpty() { + if (UCA0STAT & UCBUSY) + return FALSE; + return TRUE; + } + + async command void Usci.tx(uint8_t data) { + UCA0TXBUF = data; + } + + async command uint8_t Usci.rx() { + return UCA0RXBUF; + } + + async command bool Usci.isUart() { + return isUart(); + } + + async command void Usci.enableUart() { + atomic { + call UTXD.selectModuleFunc(); + call URXD.selectModuleFunc(); + } + } + + async command void Usci.disableUart() { + atomic { + call UTXD.selectIOFunc(); + call URXD.selectIOFunc(); + } + } + + void configUart(msp430_uart_union_config_t* config) { + UCA0CTL1 = (config->uartRegisters.uctl1 | UCSWRST); + UCA0CTL0 = config->uartRegisters.uctl0; /* ucsync should be off */ + call Usci.setUbr(config->uartRegisters.ubr); + call Usci.setUmctl(config->uartRegisters.umctl); + } + + async command void Usci.setModeUart(msp430_uart_union_config_t* config) { + atomic { + call Usci.disableIntr(); + call Usci.clrIntr(); + call Usci.resetUsci(TRUE); + call Usci.enableUart(); + configUart(config); + call Usci.resetUsci(FALSE); + } + } +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciA1C.nc b/tos/chips/msp430/usci/HplMsp430UsciA1C.nc new file mode 100644 index 0000000000..fe2b464621 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciA1C.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * An HPL abstraction of USCIA1 on the MSP430X. + * + * @author Jonathan Hui + * @author Joe Polastre + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +#define USING_USCIA1 1 + + +configuration HplMsp430UsciA1C { + provides interface HplMsp430UsciA; + provides interface HplMsp430UsciInterrupts; +} + +implementation { + components HplMsp430UsciA1P as HplUsciP; + HplMsp430UsciA = HplUsciP; + HplMsp430UsciInterrupts = HplUsciP; + + components HplMsp430GeneralIOC as GIO; + HplUsciP.SIMO -> GIO.UCA1SIMO; + HplUsciP.SOMI -> GIO.UCA1SOMI; + HplUsciP.UCLK -> GIO.UCA1CLK; + HplUsciP.URXD -> GIO.UCA1RXD; + HplUsciP.UTXD -> GIO.UCA1TXD; + + components HplMsp430UsciAB1RawInterruptsP as UsciRawInterrupts; + HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciA; +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/usci/HplMsp430UsciA1P.nc new file mode 100644 index 0000000000..81fd9c5d0e --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciA1P.nc @@ -0,0 +1,328 @@ +/* + * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006, Arched Rock Corporation + * Copyright (c) 2004-2005, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/* + * Implementation of usci A1 (uart or spi) low level functionality - stateless. + * Setting a mode will by default disable USCI-Interrupts. + * + * @author: Jan Hauer + * @author: Jonathan Hui + * @author: Vlado Handziski + * @author: Joe Polastre + * @author: Philipp Huppertz + * @author: Xavier Orduna + * @author: Eric B. Decker + * + * A0, A1: uart, spi, irda. + * B0, B1: spi, i2c. + * + * This module interfaces to usciA1: uart or spi. + */ + +module HplMsp430UsciA1P @safe() { + provides interface HplMsp430UsciA as Usci; + provides interface HplMsp430UsciInterrupts as Interrupts; + + uses interface HplMsp430GeneralIO as SIMO; + uses interface HplMsp430GeneralIO as SOMI; + uses interface HplMsp430GeneralIO as UCLK; + uses interface HplMsp430GeneralIO as URXD; + uses interface HplMsp430GeneralIO as UTXD; + uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; +} + +implementation { + MSP430REG_NORACE(UC1IE); + MSP430REG_NORACE(UC1IFG); + MSP430REG_NORACE(UCA1CTL0); + MSP430REG_NORACE(UCA1CTL1); + MSP430REG_NORACE(UCA1TXBUF); + + async event void UsciRawInterrupts.rxDone(uint8_t temp) { + signal Interrupts.rxDone(temp); + } + + async event void UsciRawInterrupts.txDone() { + signal Interrupts.txDone(); + } + + /* Control registers */ + async command void Usci.setUctl0(msp430_uctl0_t control) { + UCA1CTL0=uctl02int(control); + } + + async command msp430_uctl0_t Usci.getUctl0() { + return int2uctl0(UCA1CTL0); + } + + async command void Usci.setUctl1(msp430_uctl1_t control) { + UCA1CTL1=uctl12int(control); + } + + async command msp430_uctl1_t Usci.getUctl1() { + return int2uctl1(UCA1CTL0); + } + + async command void Usci.setUbr(uint16_t control) { + atomic { + UCA1BR0 = control & 0x00FF; + UCA1BR1 = (control >> 8) & 0x00FF; + } + } + + async command uint16_t Usci.getUbr() { + return (UCA1BR1 << 8) + UCA1BR0; + } + + async command void Usci.setUmctl(uint8_t control) { + UCA1MCTL=control; + } + + async command uint8_t Usci.getUmctl() { + return UCA1MCTL; + } + + async command void Usci.setUstat(uint8_t control) { + UCA1STAT=control; + } + + async command uint8_t Usci.getUstat() { + return UCA1STAT; + } + + /* Operations */ + async command void Usci.resetUsci(bool reset) { + if (reset) + SET_FLAG(UCA1CTL1, UCSWRST); + else + CLR_FLAG(UCA1CTL1, UCSWRST); + } + + bool isSpi() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCA1CTL0); + return (tmp.ucsync && tmp.ucmode != 3); + } + + bool isI2C() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCA1CTL0); + return (tmp.ucsync && tmp.ucmode == 3); + } + + bool isUart() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCA1CTL0); + return (tmp.ucsync == 0); + } + + /* + * Is this used? + */ + async command bool Usci.isSpi() { + return isSpi(); + } + + async command msp430_uscimode_t Usci.getMode() { + if (isSpi()) + return USCI_SPI; + if (isI2C()) + return USCI_I2C; + if (isUart()) + return USCI_UART; + else + return USCI_NONE; + } + + async command void Usci.enableSpi() { + atomic { + call SIMO.selectModuleFunc(); + call SOMI.selectModuleFunc(); + call UCLK.selectModuleFunc(); + } + } + + async command void Usci.disableSpi() { + atomic { + call SIMO.selectIOFunc(); + call SOMI.selectIOFunc(); + call UCLK.selectIOFunc(); + } + } + + void configSpi(msp430_spi_union_config_t* config) { + UCA1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); + UCA1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); + call Usci.setUbr(config->spiRegisters.ubr); + call Usci.setUmctl(0); /* MCTL <- 0 if spi */ + } + + async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { + atomic { + call Usci.disableIntr(); + call Usci.clrIntr(); + call Usci.resetUsci(TRUE); + call Usci.enableSpi(); + configSpi(config); + call Usci.resetUsci(FALSE); + } + } + + async command bool Usci.isTxIntrPending(){ + if (UC1IFG & UCA1TXIFG) + return TRUE; + return FALSE; + } + + async command bool Usci.isRxIntrPending(){ + if (UC1IFG & UCA1RXIFG) + return TRUE; + return FALSE; + } + + async command void Usci.clrTxIntr(){ + UC1IFG &= ~UCA1TXIFG; + } + + async command void Usci.clrRxIntr() { + UC1IFG &= ~UCA1RXIFG; + } + + async command void Usci.clrIntr() { + UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); + } + + async command void Usci.disableRxIntr() { + UC1IE &= ~UCA1RXIE; + } + + async command void Usci.disableTxIntr() { + UC1IE &= ~UCA1TXIE; + } + + async command void Usci.disableIntr() { + UC1IE &= ~(UCA1TXIE | UCA1RXIE); + } + + async command void Usci.enableRxIntr() { + atomic { + UC1IFG &= ~UCA1RXIFG; + UC1IE |= UCA1RXIE; + } + } + + async command void Usci.enableTxIntr() { + atomic { + UC1IFG &= ~UCA1TXIFG; + UC1IE |= UCA1TXIE; + } + } + + async command void Usci.enableIntr() { + atomic { + UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); + UC1IE |= (UCA1TXIE | UCA1RXIE); + } + } + + /* + * Returns true if the transmit path is empty. + * + * in the usart hardware there was a seperate bit that indicated + * both parts of the transmitter path were empty. The TXBUF and + * the outgoing shift register. + * + * Unfortunately, TI changed this in the USCI h/w to a single busy + * bit that indcates that either the tx or the rx path is busy. + * So if the transmitter is idle but we are receiving a character + * then we still think the transmitter is busy. TI sucks. + */ + async command bool Usci.isTxEmpty() { + if (UCA1STAT & UCBUSY) + return FALSE; + return TRUE; + } + + async command void Usci.tx(uint8_t data) { + UCA1TXBUF = data; + } + + async command uint8_t Usci.rx() { + return UCA1RXBUF; + } + + async command bool Usci.isUart() { + return isUart(); + } + + async command void Usci.enableUart() { + atomic { + call UTXD.selectModuleFunc(); + call URXD.selectModuleFunc(); + } + } + + async command void Usci.disableUart() { + atomic { + call UTXD.selectIOFunc(); + call URXD.selectIOFunc(); + } + } + + void configUart(msp430_uart_union_config_t* config) { + UCA1CTL1 = (config->uartRegisters.uctl1 | UCSWRST); + UCA1CTL0 = config->uartRegisters.uctl0; /* ucsync should be off */ + call Usci.setUbr(config->uartRegisters.ubr); + call Usci.setUmctl(config->uartRegisters.umctl); + } + + async command void Usci.setModeUart(msp430_uart_union_config_t* config) { + atomic { + call Usci.disableIntr(); + call Usci.clrIntr(); + call Usci.resetUsci(TRUE); + call Usci.enableUart(); + configUart(config); + call Usci.resetUsci(FALSE); + } + } +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc b/tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc new file mode 100644 index 0000000000..9b05222597 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * An HPL abstraction for USCI A/B shared vector interrupt on the MSP430X. + * + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +module HplMsp430UsciAB0RawInterruptsP @safe() { + provides interface HplMsp430UsciRawInterrupts as UsciA; + provides interface HplMsp430UsciRawInterrupts as UsciB; +} + +implementation { + TOSH_SIGNAL(USCIAB0RX_VECTOR) { + uint8_t temp; + if (IFG2 & UCA0RXIFG){ + temp = UCA0RXBUF; + signal UsciA.rxDone(temp); + } + if (IFG2 & UCB0RXIFG){ + temp = UCB0RXBUF; + signal UsciB.rxDone(temp); + } + } + + TOSH_SIGNAL(USCIAB0TX_VECTOR) { + if ((IFG2 & UCA0TXIFG) | (IFG2 & UCA0RXIFG)){ + signal UsciA.txDone(); + } + if ((IFG2 & UCB0TXIFG) | (IFG2 & UCB0RXIFG)){ + signal UsciB.txDone(); + } + } + + /* default handlers */ + default async event void UsciA.txDone() { return; } + default async event void UsciA.rxDone(uint8_t temp) { return; } + default async event void UsciB.txDone() { return; } + default async event void UsciB.rxDone(uint8_t temp) { return; } +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc b/tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc new file mode 100644 index 0000000000..ebdf3be3ad --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * An HPL abstraction for USCI A/B shared vector interrupt on the MSP430X. + * + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +module HplMsp430UsciAB1RawInterruptsP @safe() { + provides interface HplMsp430UsciRawInterrupts as UsciA; + provides interface HplMsp430UsciRawInterrupts as UsciB; +} + +implementation { + TOSH_SIGNAL(USCIAB1RX_VECTOR) { + uint8_t temp; + if (UC1IFG & UCA1RXIFG) { + temp = UCA1RXBUF; + signal UsciA.rxDone(temp); + } + if (UC1IFG & UCB1RXIFG) { + temp = UCB1RXBUF; + signal UsciB.rxDone(temp); + } + } + + TOSH_SIGNAL(USCIAB1TX_VECTOR) { + if ((UC1IFG & UCA1TXIFG) | (UC1IFG & UCA1RXIFG)) { + signal UsciA.txDone(); + } + if ((UC1IFG & UCB1TXIFG) | (UC1IFG & UCB1RXIFG)){ + signal UsciB.txDone(); + } + } + + /* default handlers */ + default async event void UsciA.txDone() { return; } + default async event void UsciA.rxDone(uint8_t temp) { return; } + default async event void UsciB.txDone() { return; } + default async event void UsciB.rxDone(uint8_t temp) { return; } +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciB.nc b/tos/chips/msp430/usci/HplMsp430UsciB.nc new file mode 100644 index 0000000000..cb7064ecc2 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciB.nc @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2004-2005, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Byte-level interface to control Usci based modules (MSP430X), msp430f2618 etc. + * USCI_B supports SPI and i2c modes. Stateless interface modeled after + * HplMsp430Usart of the MSP430 family. + * + * @author Vlado Handziski (handzisk@tkn.tu-berlin.de) + * @author Jan Hauer (hauer@tkn.tu-berlin.de) + * @author Joe Polastre + * @author Xavier Orduna + * @author Eric B. Decker + * + * see msp430usci.h for basic definitions. + * See TI MSP430x2xx Family User's Guide SLAU144E for details. + */ + +#include "msp430usci.h" + +interface HplMsp430UsciB { + /* UCxxCTL0 */ + async command void setUctl0(msp430_uctl0_t control); + async command msp430_uctl0_t getUctl0(); + + /* UCxxCTL1 */ + async command void setUctl1(msp430_uctl1_t control); + async command msp430_uctl1_t getUctl1(); + + /* UCxxBR1 UCxxBR0 */ + async command void setUbr(uint16_t ubr); + async command uint16_t getUbr(); + + /* + * access usci status registers. yes there are control + * bits in the status register. + */ + /* UCxxSTAT */ + async command void setUstat(uint8_t ustat); + async command uint8_t getUstat(); + + /* + * resetUsci() - reset or unreset module port + * + * reset: TRUE (set UCSWRST) + * FALSE (unset UCSWRST), let the port run + */ + async command void resetUsci(bool reset); + + /* + * return enum indicating what mode the usci port in in. + */ + async command msp430_uscimode_t getMode(); + + + /* Interrupt control */ + async command void disableRxIntr(); + async command void disableTxIntr(); + async command void disableIntr(); + async command void enableRxIntr(); + async command void enableTxIntr(); + async command void enableIntr(); + + async command bool isTxIntrPending(); + async command bool isRxIntrPending(); + async command void clrRxIntr(); + async command void clrTxIntr(); + async command void clrIntr(); + + /** + * Transmit a byte of data. When the transmission is completed, + * txDone is generated. Only then a new byte may be + * transmitted, otherwise the previous byte will be overwritten. + */ + async command void tx(uint8_t data); + + /** + * Get current value from RX-buffer. + * + * return: byte received. + */ + async command uint8_t rx(); + + + /*********************************************************************** + * + * SPI Mode interface + * + ***********************************************************************/ + + /* + * configure or deconfigure gpio pins for SPI mode + * + * switches io pins between port and module function. + */ + async command void enableSpi(); + async command void disableSpi(); + + /* + * Returns TRUE if the Usci is in SPI mode + */ + async command bool isSpi(); + + /* + * configure usci as spi using config. + * leaves interrupts disabled. + */ + async command void setModeSpi(msp430_spi_union_config_t* config); + + + /*********************************************************************** + * + * I2C Mode interface + * + ***********************************************************************/ + + /* + * Returns TRUE if the Usci is in i2c mode + */ + async command bool isI2C(); + async command void enableI2C(); + async command void disableI2C(); + + /* + * configure usci as i2c using config. + * leaves interrupts disabled. + */ + async command void setModeI2C( msp430_i2c_union_config_t* config ); + + /* control which direction the bus is in */ + async command void setTransmitMode(); + async command void setReceiveMode(); + + /* h/w bits for controlling what to send next when master */ + async command void setTXNACK(); + async command void setTXStop(); + async command void setTXStart(); + + async command uint16_t getOwnAddress(); + async command void setOwnAddress( uint16_t addr ); + + /* GeneralCall Response control, set/clear */ + async command void clearGeneralCall(); + async command void setGeneralCall(); + + /* set master/slave mode, i2c */ + async command void setSlaveMode(); + async command void setMasterMode(); + + /* get bits of uctl1 in i2c mode */ + async command bool getStopBit(); + async command bool getTransmitReceiveMode(); + + /* when master the SLA (slave address register says who we + are talking to. + */ + async command uint16_t getSlaveAddress(); + async command void setSlaveAddress(uint16_t addr); + + async command void disableNACKInt(); + async command void enableNACKInt(); + + async command void disableStopInt(); + async command void enableStopInt(); + + async command void disableStartInt(); + async command void enableStartInt(); + + async command void disableArbLostInt(); + async command void enableArbLostInt(); +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciB0C.nc b/tos/chips/msp430/usci/HplMsp430UsciB0C.nc new file mode 100644 index 0000000000..dad344b408 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciB0C.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * An HPL abstraction of USCIB0 on the MSP430. + * + * @author Jonathan Hui + * @author Joe Polastre + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +configuration HplMsp430UsciB0C { + provides interface HplMsp430UsciB; + provides interface HplMsp430UsciInterrupts; +} + +implementation { + components HplMsp430UsciB0P as HplUsciP; + HplMsp430UsciB = HplUsciP; + HplMsp430UsciInterrupts = HplUsciP; + + components HplMsp430GeneralIOC as GIO; + HplUsciP.SIMO -> GIO.UCB0SIMO; + HplUsciP.SOMI -> GIO.UCB0SOMI; + HplUsciP.UCLK -> GIO.UCB0CLK; + + components HplMsp430UsciAB0RawInterruptsP as UsciRawInterrupts; + HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciB; +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/usci/HplMsp430UsciB0P.nc new file mode 100644 index 0000000000..eafa26b6dc --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciB0P.nc @@ -0,0 +1,364 @@ +/* + * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2009-2010 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2004-2005, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/* + * Implementation of USCIB0 low level functionality - stateless. + * Setting a mode will by default disable USCIB0 interrupts. + * + * @author: Jan Hauer + * @author: Jonathan Hui + * @author: Vlado Handziski + * @author: Joe Polastre + * @author: Philipp Huppertz + * @author: Xavier Orduna + * @author: Eric B. Decker + * @author: Jordi Soucheiron + * + * A0, A1: uart, spi, irda. + * B0, B1: spi, i2c. + * + * This module interfaces to usciB0: spi or i2c. + */ + +module HplMsp430UsciB0P @safe() { + provides interface HplMsp430UsciB as Usci; + provides interface HplMsp430UsciInterrupts as Interrupts; + + uses interface HplMsp430GeneralIO as SIMO; + uses interface HplMsp430GeneralIO as SOMI; + uses interface HplMsp430GeneralIO as UCLK; + uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; +} + +implementation { + MSP430REG_NORACE(IE2); + MSP430REG_NORACE(IFG2); + MSP430REG_NORACE(UCB0CTL0); + MSP430REG_NORACE(UCB0CTL1); + MSP430REG_NORACE(UCB0RXBUF); + MSP430REG_NORACE(UCB0TXBUF); + MSP430REG_NORACE(UCB0I2COA); + MSP430REG_NORACE(UCB0I2CIE); + + async event void UsciRawInterrupts.rxDone(uint8_t temp) { + signal Interrupts.rxDone(temp); + } + + async event void UsciRawInterrupts.txDone() { + signal Interrupts.txDone(); + } + + /* Control registers */ + async command void Usci.setUctl0(msp430_uctl0_t control) { + UCB0CTL0=uctl02int(control); + } + + async command msp430_uctl0_t Usci.getUctl0() { + return int2uctl0(UCB0CTL0); + } + + async command void Usci.setUctl1(msp430_uctl1_t control) { + UCB0CTL1=uctl12int(control); + } + + async command msp430_uctl1_t Usci.getUctl1() { + return int2uctl1(UCB0CTL1); + } + + async command void Usci.setUbr(uint16_t control) { + atomic { + UCB0BR0 = control & 0x00FF; + UCB0BR1 = (control >> 8) & 0x00FF; + } + } + + async command uint16_t Usci.getUbr() { + return (UCB0BR1 << 8) + UCB0BR0; + } + + async command void Usci.setUstat(uint8_t control) { + UCB0STAT = control; + } + + async command uint8_t Usci.getUstat() { + return UCB0STAT; + } + + /* Operations */ + async command void Usci.resetUsci(bool reset) { + if (reset) + SET_FLAG(UCB0CTL1, UCSWRST); + else + CLR_FLAG(UCB0CTL1, UCSWRST); + } + + bool isSpi() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCB0CTL0); + return (tmp.ucsync && tmp.ucmode != 3); + } + + bool isI2C() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCB0CTL0); + return (tmp.ucsync && tmp.ucmode == 3); + } + + async command bool Usci.isSpi() { + return isSpi(); + } + + async command msp430_uscimode_t Usci.getMode() { + if (isSpi()) + return USCI_SPI; + if (isI2C()) + return USCI_I2C; + return USCI_NONE; + } + + async command void Usci.enableSpi() { + atomic { + call SIMO.selectModuleFunc(); + call SOMI.selectModuleFunc(); + call UCLK.selectModuleFunc(); + } + } + + async command void Usci.disableSpi() { + atomic { + call SIMO.selectIOFunc(); + call SOMI.selectIOFunc(); + call UCLK.selectIOFunc(); + } + } + + void configSpi(msp430_spi_union_config_t* config) { + UCB0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); + UCB0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); + call Usci.setUbr(config->spiRegisters.ubr); + } + + async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { + atomic { + call Usci.disableIntr(); + call Usci.clrIntr(); + call Usci.resetUsci(TRUE); + call Usci.enableSpi(); + configSpi(config); + call Usci.resetUsci(FALSE); + } + } + + async command bool Usci.isTxIntrPending(){ + if (IFG2 & UCB0TXIFG) + return TRUE; + return FALSE; + } + + async command bool Usci.isRxIntrPending() { + if (IFG2 & UCB0RXIFG) + return TRUE; + return FALSE; + } + + async command void Usci.clrTxIntr(){ + IFG2 &= ~UCB0TXIFG; + } + + async command void Usci.clrRxIntr() { + IFG2 &= ~UCB0RXIFG; + } + + async command void Usci.clrIntr() { + IFG2 &= ~(UCB0TXIFG | UCB0RXIFG); + } + + async command void Usci.disableRxIntr() { + IE2 &= ~UCB0RXIE; + } + + async command void Usci.disableTxIntr() { + IE2 &= ~UCB0TXIE; + } + + async command void Usci.disableIntr() { + IE2 &= ~(UCB0TXIE | UCB0RXIE); + } + + async command void Usci.enableRxIntr() { + atomic { + IFG2 &= ~UCB0RXIFG; + IE2 |= UCB0RXIE; + } + } + + async command void Usci.enableTxIntr() { + atomic { + IFG2 &= ~UCB0TXIFG; + IE2 |= UCB0TXIE; + } + } + + async command void Usci.enableIntr() { + atomic { + IFG2 &= ~(UCB0TXIFG | UCB0RXIFG); + IE2 |= (UCB0TXIE | UCB0RXIE); + } + } + + async command void Usci.tx(uint8_t data) { + UCB0TXBUF = data; + } + + async command uint8_t Usci.rx() { + return UCB0RXBUF; + } + + /* + * i2c operations + */ + async command bool Usci.isI2C(){ + return isI2C(); + } + + + /* CHECK ME! + * b1p messes with usda and uscl. shouldn't b0p do the same? + */ + async command void Usci.enableI2C() { + atomic { + call SIMO.selectModuleFunc(); + call SOMI.selectModuleFunc(); + call UCLK.selectModuleFunc(); + } + } + + async command void Usci.disableI2C() { + atomic { + call SIMO.selectIOFunc(); + call SOMI.selectIOFunc(); + call UCLK.selectIOFunc(); + } + } + + void configI2C(msp430_i2c_union_config_t* config) { + UCB0CTL1 = (config->i2cRegisters.uctl1 | UCSWRST); + UCB0CTL0 = (config->i2cRegisters.uctl0 | UCSYNC); + call Usci.setUbr(config->i2cRegisters.ubr); + UCB0I2COA = config->i2cRegisters.ui2coa; + UCB0I2CSA = 0; + UCB0I2CIE = 0; + } + + async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { + atomic { + call Usci.disableIntr(); + call Usci.clrIntr(); + call Usci.resetUsci(TRUE); + call Usci.enableI2C(); + configI2C(config); + call Usci.resetUsci(FALSE); + } + } + + async command uint16_t Usci.getOwnAddress() { + return (UCB0I2COA & ~UCGCEN); + } + + async command void Usci.setOwnAddress( uint16_t addr ) { + UCB0I2COA &= UCGCEN; + UCB0I2COA |= (addr & ~UCGCEN); + } + + /* + * commands subsummed into config structure. + * + * setMasterMode, setSlaveMode, getTransmitReceiveMode, setTransmitMode, + * setReceiveMode, getStopBit, setStopBit, getStartBit, + * setStartBit, + * + * the get commands can be replaced by .getUctl0 etc. + * + * similar things should be done for the other registers. It keeps things + * simple and consise. + */ + + /* set direction of the bus */ + async command void Usci.setTransmitMode() { UCB0CTL1 |= UCTR; } + async command void Usci.setReceiveMode() { UCB0CTL1 &= ~UCTR; } + + /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ + async command void Usci.setTXNACK() { UCB0CTL1 |= UCTXNACK; } + async command void Usci.setTXStop() { UCB0CTL1 |= UCTXSTP; } + async command void Usci.setTXStart() { UCB0CTL1 |= UCTXSTT; } + + /* set whether to respond to GeneralCall. */ + async command void Usci.clearGeneralCall() { UCB0I2COA &= ~UCGCEN; } + async command void Usci.setGeneralCall() { UCB0I2COA |= UCGCEN; } + + /* set master/slave mode, i2c */ + async command void Usci.setSlaveMode() { UCB0CTL0 |= UCMST; } + async command void Usci.setMasterMode() { UCB0CTL0 &= ~UCMST; } + + /* get stop bit in i2c mode */ + async command bool Usci.getStopBit() { return (UCB0CTL1 & UCTXSTP); } + async command bool Usci.getTransmitReceiveMode() { return (UCB0CTL1 & UCTR); } + + /* get/set Slave Address, i2cSA */ + async command uint16_t Usci.getSlaveAddress() { return UCB0I2CSA; } + async command void Usci.setSlaveAddress( uint16_t addr ) { UCB0I2CSA = addr; } + + /* enable/disable NACK interrupt */ + async command void Usci.disableNACKInt() { UCB0I2CIE &= ~UCNACKIE; } + async command void Usci.enableNACKInt() { UCB0I2CIE |= UCNACKIE; } + + /* enable/disable stop condition interrupt */ + async command void Usci.disableStopInt() { UCB0I2CIE &= ~UCSTPIE; } + async command void Usci.enableStopInt() { UCB0I2CIE |= UCSTPIE; } + + /* enable/disable start condition interrupt */ + async command void Usci.disableStartInt() { UCB0I2CIE &= ~UCSTTIE; } + async command void Usci.enableStartInt() { UCB0I2CIE |= UCSTTIE; } + + /* enable/disable arbitration lost interrupt */ + async command void Usci.disableArbLostInt() { UCB0I2CIE &= ~UCALIE; } + async command void Usci.enableArbLostInt() { UCB0I2CIE |= UCALIE; } +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciB1C.nc b/tos/chips/msp430/usci/HplMsp430UsciB1C.nc new file mode 100644 index 0000000000..cce6a3fd60 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciB1C.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * An HPL abstraction of USCIB1 on the MSP430. + * + * @author Jonathan Hui + * @author Joe Polastre + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +configuration HplMsp430UsciB1C { + provides interface HplMsp430UsciB; + provides interface HplMsp430UsciInterrupts; +} + +implementation { + components HplMsp430UsciB1P as HplUsciP; + HplMsp430UsciB = HplUsciP; + HplMsp430UsciInterrupts = HplUsciP; + + components HplMsp430GeneralIOC as GIO; + HplUsciP.SIMO -> GIO.UCB1SIMO; + HplUsciP.SOMI -> GIO.UCB1SOMI; + HplUsciP.UCLK -> GIO.UCB1CLK; + HplUsciP.USDA -> GIO.UCB1SDA; + HplUsciP.USCL -> GIO.UCB1SCL; + + components HplMsp430UsciAB1RawInterruptsP as UsciRawInterrupts; + HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciB; +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/usci/HplMsp430UsciB1P.nc new file mode 100644 index 0000000000..978714618e --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciB1P.nc @@ -0,0 +1,364 @@ +/* + * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2009-2010 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2004-2005, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/* + * Implementation of USCIB1 lowlevel functionality - stateless. + * Setting a mode will by default disable USCIB1 interrupts. + * + * @author: Jan Hauer + * @author: Jonathan Hui + * @author: Vlado Handziski + * @author: Joe Polastre + * @author: Philipp Huppertz + * @author: Xavier Orduna + * @author: Eric B. Decker + * @author: Jordi Soucheiron + * + * A0, A1: uart, spi, irda. + * B0, B1: spi, i2c. + * + * This module interfaces to usciB1: spi or i2c. + */ + +module HplMsp430UsciB1P @safe() { + provides interface HplMsp430UsciB as Usci; + provides interface HplMsp430UsciInterrupts as Interrupts; + + uses interface HplMsp430GeneralIO as SIMO; + uses interface HplMsp430GeneralIO as SOMI; + uses interface HplMsp430GeneralIO as UCLK; + uses interface HplMsp430GeneralIO as USDA; + uses interface HplMsp430GeneralIO as USCL; + + uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; +} + +implementation { + MSP430REG_NORACE(UC1IE); + MSP430REG_NORACE(UC1IFG); + MSP430REG_NORACE(UCB1CTL0); + MSP430REG_NORACE(UCB1CTL1); + MSP430REG_NORACE(UCB1RXBUF); + MSP430REG_NORACE(UCB1TXBUF); + MSP430REG_NORACE(UCB1I2COA); + MSP430REG_NORACE(UCB1I2CIE); + + async event void UsciRawInterrupts.rxDone(uint8_t temp) { + signal Interrupts.rxDone(temp); + } + + async event void UsciRawInterrupts.txDone() { + signal Interrupts.txDone(); + } + + /* Control registers */ + async command void Usci.setUctl0(msp430_uctl0_t control) { + UCB1CTL0=uctl02int(control); + } + + async command msp430_uctl0_t Usci.getUctl0() { + return int2uctl0(UCB1CTL0); + } + + async command void Usci.setUctl1(msp430_uctl1_t control) { + UCB1CTL1=uctl12int(control); + } + + async command msp430_uctl1_t Usci.getUctl1() { + return int2uctl1(UCB1CTL1); + } + + async command void Usci.setUbr(uint16_t control) { + atomic { + UCB1BR0 = control & 0x00FF; + UCB1BR1 = (control >> 8) & 0x00FF; + } + } + + async command uint16_t Usci.getUbr() { + return (UCB1BR1 << 8) + UCB1BR0; + } + + async command void Usci.setUstat(uint8_t control) { + UCB1STAT = control; + } + + async command uint8_t Usci.getUstat() { + return UCB1STAT; + } + + /* Operations */ + async command void Usci.resetUsci(bool reset) { + if (reset) + SET_FLAG(UCB1CTL1, UCSWRST); + else + CLR_FLAG(UCB1CTL1, UCSWRST); + } + + bool isSpi() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCB1CTL0); + return (tmp.ucsync && tmp.ucmode != 3); + } + + bool isI2C() { + msp430_uctl0_t tmp; + + tmp = int2uctl0(UCB1CTL0); + return (tmp.ucsync && tmp.ucmode == 3); + } + + async command bool Usci.isSpi() { + return isSpi(); + } + + async command msp430_uscimode_t Usci.getMode() { + if (isSpi()) + return USCI_SPI; + if (isI2C()) + return USCI_I2C; + return USCI_NONE; + } + + async command void Usci.enableSpi() { + atomic { + call SIMO.selectModuleFunc(); + call SOMI.selectModuleFunc(); + call UCLK.selectModuleFunc(); + } + } + + async command void Usci.disableSpi() { + atomic { + call SIMO.selectIOFunc(); + call SOMI.selectIOFunc(); + call UCLK.selectIOFunc(); + } + } + + void configSpi(msp430_spi_union_config_t* config) { + UCB1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); + UCB1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); + call Usci.setUbr(config->spiRegisters.ubr); + } + + async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { + atomic { + call Usci.disableIntr(); + call Usci.clrIntr(); + call Usci.resetUsci(TRUE); + call Usci.enableSpi(); + configSpi(config); + call Usci.resetUsci(FALSE); + } + } + + async command bool Usci.isTxIntrPending(){ + if (UC1IFG & UCB1TXIFG) + return TRUE; + return FALSE; + } + + async command bool Usci.isRxIntrPending() { + if (UC1IFG & UCB1RXIFG) + return TRUE; + return FALSE; + } + + async command void Usci.clrTxIntr(){ + UC1IFG &= ~UCB1TXIFG; + } + + async command void Usci.clrRxIntr() { + UC1IFG &= ~UCB1RXIFG; + } + + async command void Usci.clrIntr() { + UC1IFG &= ~(UCB1TXIFG | UCB1RXIFG); + } + + async command void Usci.disableRxIntr() { + UC1IE &= ~UCB1RXIE; + } + + async command void Usci.disableTxIntr() { + UC1IE &= ~UCB1TXIE; + } + + async command void Usci.disableIntr() { + UC1IE &= ~(UCB1TXIE | UCB1RXIE); + } + + async command void Usci.enableRxIntr() { + atomic { + UC1IFG &= ~UCB1RXIFG; + UC1IE |= UCB1RXIE; + } + } + + async command void Usci.enableTxIntr() { + atomic { + UC1IFG &= ~UCB1TXIFG; + UC1IE |= UCB1TXIE; + } + } + + async command void Usci.enableIntr() { + atomic { + UC1IFG &= ~(UCB1TXIFG | UCB1RXIFG); + UC1IE |= (UCB1TXIE | UCB1RXIE); + } + } + + async command void Usci.tx(uint8_t data) { + UCB1TXBUF = data; + } + + async command uint8_t Usci.rx() { + return UCB1RXBUF; + } + + /* + * i2c operations + */ + async command bool Usci.isI2C(){ + return isI2C(); + } + + async command void Usci.enableI2C() { + atomic { + // this should be removed, only for z1 + P5OUT |= 0x06; + P5REN |= 0x06; + call USDA.selectModuleFunc(); + call USCL.selectModuleFunc(); + } + } + + async command void Usci.disableI2C() { + atomic { + call USDA.selectIOFunc(); + call USCL.selectIOFunc(); + } + } + + void configI2C(msp430_i2c_union_config_t* config) { + UCB1CTL1 = (config->i2cRegisters.uctl1 | UCSWRST); + UCB1CTL0 = (config->i2cRegisters.uctl0 | UCSYNC); + call Usci.setUbr(config->i2cRegisters.ubr); + UCB1I2COA = config->i2cRegisters.ui2coa; + UCB1I2CSA = 0; + UCB1I2CIE = 0; + } + + async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { + atomic { + call Usci.disableIntr(); + call Usci.clrIntr(); + call Usci.resetUsci(TRUE); + call Usci.enableI2C(); + configI2C(config); + call Usci.resetUsci(FALSE); + } + } + + async command uint16_t Usci.getOwnAddress() { + return UCB1I2COA & ~UCGCEN; + } + + async command void Usci.setOwnAddress( uint16_t addr ) { + UCB1I2COA &= UCGCEN; + UCB1I2COA |= (addr & ~UCGCEN); + } + + /* + * commands subsummed into config structure. + * + * setMasterMode, setSlaveMode, getTransmitReceiveMode, setTransmitMode, + * setReceiveMode, getStopBit, setStopBit, getStartBit, + * setStartBit, + * + * the get commands can be replaced by .getUctl0 etc. + * + * similar things should be done for the other registers. It keeps things + * simple and consise. + */ + + /* set direction of the bus */ + async command void Usci.setTransmitMode() { UCB1CTL1 |= UCTR; } + async command void Usci.setReceiveMode() { UCB1CTL1 &= ~UCTR; } + + /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ + async command void Usci.setTXNACK() { UCB1CTL1 |= UCTXNACK; } + async command void Usci.setTXStop() { UCB1CTL1 |= UCTXSTP; } + async command void Usci.setTXStart() { UCB1CTL1 |= UCTXSTT; } + + /* set whether to respond to GeneralCall. */ + async command void Usci.clearGeneralCall() { UCB1I2COA &= ~UCGCEN; } + async command void Usci.setGeneralCall() { UCB1I2COA |= UCGCEN; } + + /* set master/slave mode, i2c */ + async command void Usci.setSlaveMode() { UCB1CTL0 |= UCMST; } + async command void Usci.setMasterMode() { UCB1CTL0 &= ~UCMST; } + + /* get stop bit in i2c mode */ + async command bool Usci.getStopBit() { return (UCB1CTL1 & UCTXSTP); } + async command bool Usci.getTransmitReceiveMode() { return (UCB1CTL1 & UCTR); } + + /* get/set Slave Address, i2cSA */ + async command uint16_t Usci.getSlaveAddress() { atomic { return UCB1I2CSA; } } + async command void Usci.setSlaveAddress( uint16_t addr ) { atomic { UCB1I2CSA = addr; } } + + /* enable/disable NACK interrupt */ + async command void Usci.disableNACKInt() { UCB1I2CIE &= ~UCNACKIE; } + async command void Usci.enableNACKInt() { UCB1I2CIE |= UCNACKIE; } + + /* enable/disable stop condition interrupt */ + async command void Usci.disableStopInt() { UCB1I2CIE &= ~UCSTPIE; } + async command void Usci.enableStopInt() { UCB1I2CIE |= UCSTPIE; } + + /* enable/disable start condition interrupt */ + async command void Usci.disableStartInt() { UCB1I2CIE &= ~UCSTTIE; } + async command void Usci.enableStartInt() { UCB1I2CIE |= UCSTTIE; } + + /* enable/disable arbitration lost interrupt */ + async command void Usci.disableArbLostInt() { UCB1I2CIE &= ~UCALIE; } + async command void Usci.enableArbLostInt() { UCB1I2CIE |= UCALIE; } +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc b/tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc new file mode 100644 index 0000000000..4106849356 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2004-2005, Technische Universität Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Byte-level interface to control a USCI. + *

The USCI can be switched to SPI, UART or I2C mode. The interface follows + * the convention of being stateless, thus a higher layer has to maintain + * state information. + * + * @author Jan Hauer (hauer@tkn.tu-berlin.de) + * @author Joe Polastre + */ + +#include "msp430usci.h" + +interface HplMsp430UsciInterrupts { + /* + * A byte of data is about to be transmitted, ie. the TXBuffer is + * empty and ready to accept next byte. + */ + async event void txDone(); + + /* + * A byte of data has been received. + */ + async event void rxDone(uint8_t data); +} diff --git a/tos/chips/msp430/usci/HplMsp430UsciRawInterrupts.nc b/tos/chips/msp430/usci/HplMsp430UsciRawInterrupts.nc new file mode 100644 index 0000000000..b3727ac842 --- /dev/null +++ b/tos/chips/msp430/usci/HplMsp430UsciRawInterrupts.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2004-2005, Technische Universität Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Byte-level interface to control a USART. + *

The USCI can be switched to SPI- or UART-mode. The interface follows + * the convention of being stateless, thus a higher layer has to maintain + * state information. + * + * @author Jan Hauer (hauer@tkn.tu-berlin.de) + * @author Joe Polastre + */ + +#include "msp430usci.h" + +interface HplMsp430UsciRawInterrupts { + /* + * A byte of data is about to be transmitted, ie. the TXBuffer is + * empty and ready to accept next byte. + */ + async event void txDone(); + + /* + * A byte of data has been received. + */ + async event void rxDone(uint8_t data); +} diff --git a/tos/chips/msp430/usci/Msp430I2C1C.nc b/tos/chips/msp430/usci/Msp430I2C1C.nc new file mode 100644 index 0000000000..aa16ad2bda --- /dev/null +++ b/tos/chips/msp430/usci/Msp430I2C1C.nc @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Jonathan Hui + * @author Xavier Orduna + */ + +#include +#include "msp430usci.h" + +generic configuration Msp430I2C1C() { + provides interface Resource; + provides interface ResourceRequested; + provides interface I2CPacket as I2CBasicAddr; + + uses interface Msp430I2CConfigure; +} + +implementation { + enum { + CLIENT_ID = unique( MSP430_I2C1_BUS ), + }; + + components Msp430I2C1P as I2CP; + Resource = I2CP.Resource[ CLIENT_ID ]; + I2CBasicAddr = I2CP.I2CBasicAddr; + Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ]; + + components new Msp430UsciB1C() as UsciC; + ResourceRequested = UsciC; + I2CP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; + I2CP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; + I2CP.Interrupts -> UsciC.HplMsp430UsciInterrupts; +} diff --git a/tos/chips/msp430/usci/Msp430I2C1P.nc b/tos/chips/msp430/usci/Msp430I2C1P.nc new file mode 100644 index 0000000000..65e62eec1e --- /dev/null +++ b/tos/chips/msp430/usci/Msp430I2C1P.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Jonathan Hui + * @author Xavier Orduna + */ + +configuration Msp430I2C1P { + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[uint8_t id ]; + provides interface I2CPacket as I2CBasicAddr; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430I2CConfigure[ uint8_t id ]; + uses interface HplMsp430UsciInterrupts as Interrupts; +} + +implementation { + components new Msp430I2CP() as I2CP; + Resource = I2CP.Resource; + ResourceConfigure = I2CP.ResourceConfigure; + Msp430I2CConfigure = I2CP.Msp430I2CConfigure; + I2CBasicAddr = I2CP.I2CBasicAddr; + UsciResource = I2CP.UsciResource; + Interrupts = I2CP.Interrupts; + + components HplMsp430UsciB1C as UsciC; + I2CP.UsciB -> UsciC; +} diff --git a/tos/chips/msp430/usci/Msp430I2CConfigure.nc b/tos/chips/msp430/usci/Msp430I2CConfigure.nc new file mode 100644 index 0000000000..17e59f2a0d --- /dev/null +++ b/tos/chips/msp430/usci/Msp430I2CConfigure.nc @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2004-2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Interface used by Msp430I2C clients to reconfigure the I2C before use + * @author Vlado Handziski + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +interface Msp430I2CConfigure { + async command msp430_i2c_union_config_t* getConfig(); +} diff --git a/tos/chips/msp430/usci/Msp430I2CP.nc b/tos/chips/msp430/usci/Msp430I2CP.nc new file mode 100644 index 0000000000..77cc06f6e9 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430I2CP.nc @@ -0,0 +1,244 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2009-2010 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Jonathan Hui + * @author Xavier Orduña + * @author Jordi Soucheiron + * @author Eric B. Decker + */ + +#include + +generic module Msp430I2CP() { + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[ uint8_t id ]; + provides interface I2CPacket as I2CBasicAddr; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430I2CConfigure[ uint8_t id ]; + uses interface HplMsp430UsciB as UsciB; + uses interface HplMsp430UsciInterrupts as Interrupts; +} + +implementation { + enum { + TIMEOUT = 256, + }; + + norace uint8_t* m_buf; + norace uint8_t m_len; + norace uint8_t m_pos; + norace i2c_flags_t m_flags; + + void nextRead(); + void nextWrite(); + void signalDone( error_t error ); + + async command error_t Resource.immediateRequest[ uint8_t id ]() { + return call UsciResource.immediateRequest[ id ](); + } + + async command error_t Resource.request[ uint8_t id ]() { + return call UsciResource.request[ id ](); + } + + async command uint8_t Resource.isOwner[ uint8_t id ]() { + return call UsciResource.isOwner[ id ](); + } + + async command error_t Resource.release[ uint8_t id ]() { + return call UsciResource.release[ id ](); + } + + async command void ResourceConfigure.configure[ uint8_t id ]() { + call UsciB.setModeI2C(call Msp430I2CConfigure.getConfig[id]()); + } + + async command void ResourceConfigure.unconfigure[ uint8_t id ]() { + call UsciB.disableI2C(); + } + + event void UsciResource.granted[ uint8_t id ]() { + signal Resource.granted[ id ](); + } + + default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } + default event void Resource.granted[ uint8_t id ]() {} + default async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { + return (msp430_i2c_union_config_t *) &msp430_i2c_default_config; + } + + async command error_t I2CBasicAddr.read( i2c_flags_t flags, + uint16_t addr, uint8_t len, + uint8_t* buf ) { + uint16_t i = 0; + m_buf = buf; + m_len = len; + m_flags = flags; + m_pos = 0; + + call UsciB.setReceiveMode(); + call UsciB.setSlaveAddress(addr); + call UsciB.enableRxIntr(); + + if ( flags & I2C_START ) { + while(call UsciB.getStopBit()) { + if (i >= TIMEOUT) + return EBUSY; + i++; + } + call UsciB.setTXStart(); + } else + nextRead(); + return SUCCESS; + } + + async command error_t I2CBasicAddr.write( i2c_flags_t flags, + uint16_t addr, uint8_t len, + uint8_t* buf ) { + uint16_t i = 0; + m_buf = buf; + m_len = len; + m_flags = flags; + m_pos = 0; + while((call UsciB.getUstat()) & UCBBUSY) { + if (i >= TIMEOUT) + return FAIL; + i++; + } + + call UsciB.setTransmitMode(); + call UsciB.setSlaveAddress( addr ); + call UsciB.enableTxIntr(); + + if ( flags & I2C_START ) { + while(call UsciB.getStopBit()) { + if(i>=TIMEOUT) + return EBUSY; + i++; + } + i=0; + while((call UsciB.getUstat()) & UCBBUSY) { + if(i>=TIMEOUT) + return FAIL; + i++; + } + call UsciB.setTXStart(); + } else + nextWrite(); + return SUCCESS; + } + + void nextRead() { + uint16_t i=0; + + /* this needs to be fixed. software delay not so great */ + + for(i=0xffff;i!=0;i--); //software delay (aprox 25msec on z1) + + if ( m_pos == m_len ) { + if ( m_flags & I2C_STOP ) { + call UsciB.setTXStop(); + while(!call UsciB.getStopBit()) { + if(i >= TIMEOUT) { + signalDone( EBUSY ); + return; + } + i++; + } + signalDone( SUCCESS ); + } else + signalDone( SUCCESS ); + } else { + m_buf[ m_pos++ ] = call UsciB.rx(); + } + } + + void nextWrite() { + uint16_t i = 0; + + /* this needs to get fixed. */ + for(i=0xffff;i!=0;i--); //software delay (aprox 25msec on z1) + + if ( ( m_pos == m_len) && ( m_flags & I2C_STOP ) ) { + call UsciB.setTXStop(); + while(call UsciB.getStopBit()) { + if(i>=TIMEOUT) { + signalDone( EBUSY ); + return; + } + i++; + } + signalDone( SUCCESS ); + } else { + if((call UsciB.getUstat()) == ( UCBBUSY | UCNACKIFG | UCSCLLOW)) { + signal I2CBasicAddr.writeDone( FAIL, call UsciB.getSlaveAddress(), m_len, m_buf ); + return; + } + call UsciB.tx( m_buf[ m_pos++ ] ); + } + } + + async event void Interrupts.txDone() { + call UsciB.clrTxIntr(); + if ( call UsciB.getTransmitReceiveMode() ) + nextWrite(); + else + nextRead(); + } + + async event void Interrupts.rxDone(uint8_t data) { + call UsciB.clrRxIntr(); + if ( call UsciB.getTransmitReceiveMode() ) + nextWrite(); + else + nextRead(); + } + + void signalDone( error_t error ) { + call UsciB.clrIntr(); + call UsciB.disableIntr(); + if ( call UsciB.getTransmitReceiveMode() ) + signal I2CBasicAddr.writeDone( error, call UsciB.getSlaveAddress(), m_len, m_buf ); + else + signal I2CBasicAddr.readDone( error, call UsciB.getSlaveAddress(), m_len, m_buf ); + } + + default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } +} diff --git a/tos/chips/msp430/usci/Msp430SpiB0C.nc b/tos/chips/msp430/usci/Msp430SpiB0C.nc new file mode 100644 index 0000000000..86bb6c96fe --- /dev/null +++ b/tos/chips/msp430/usci/Msp430SpiB0C.nc @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * An implementation of the SPI on USCIB0 for the MSP430. The current + * implementation defaults not using the DMA and performing the SPI + * transfers in software. To utilize the DMA, use Msp430SpiDma0P in + * place of Msp430SpiNoDma0P. + * + * @author Jonathan Hui + * @author Mark Hays + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +generic configuration Msp430SpiB0C() { + provides interface Resource; + provides interface ResourceRequested; + provides interface SpiByte; + provides interface SpiPacket; + + uses interface Msp430SpiConfigure; +} + +implementation { + enum { + CLIENT_ID = unique( MSP430_SPI0_BUS ), + }; + +#ifdef ENABLE_SPIB0_DMA +#warning "Enabling SPI DMA on USCIB0" + components Msp430SpiDmaB0P as SpiP; +#else + components Msp430SpiNoDmaB0P as SpiP; +#endif + + Resource = SpiP.Resource[ CLIENT_ID ]; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket[ CLIENT_ID ]; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ]; + + components new Msp430UsciB0C() as UsciC; + ResourceRequested = UsciC; + SpiP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; + SpiP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; + SpiP.UsciInterrupts -> UsciC.HplMsp430UsciInterrupts; +} diff --git a/tos/chips/msp430/usci/Msp430SpiConfigure.nc b/tos/chips/msp430/usci/Msp430SpiConfigure.nc new file mode 100644 index 0000000000..8407a23f03 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430SpiConfigure.nc @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2004-2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Interface used by Msp430Spi clients to reconfigure the SPI before use + * @author Vlado Handziski + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +interface Msp430SpiConfigure { + async command msp430_spi_union_config_t* getConfig(); +} diff --git a/tos/chips/msp430/usci/Msp430SpiDmaB0P.nc b/tos/chips/msp430/usci/Msp430SpiDmaB0P.nc new file mode 100644 index 0000000000..f6281e9491 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430SpiDmaB0P.nc @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Jonathan Hui + * @author Mark Hays + * @author Xavier Orduna + */ + +configuration Msp430SpiDmaB0P { + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[ uint8_t id ]; + provides interface SpiByte; + provides interface SpiPacket[ uint8_t id ]; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430SpiConfigure[ uint8_t id ]; + uses interface HplMsp430UsciInterrupts as UsciInterrupts; +} + +implementation { + +#include "Msp430Dma.h" + + components new Msp430SpiDmaBP(IFG2_, + UCB0TXBUF_, + UCB0TXIFG, + (uint16_t) DMA_TRIGGER_UCB0TXIFG, + UCB0RXBUF_, + UCB0RXIFG, + (uint16_t) DMA_TRIGGER_UCB0RXIFG) as SpiP; + Resource = SpiP.Resource; + ResourceConfigure = SpiP.ResourceConfigure; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket; + UsciResource = SpiP.UsciResource; + UsciInterrupts = SpiP.UsciInterrupts; + + components HplMsp430UsciB0C as UsciC; + SpiP.Usci -> UsciC; + + components Msp430DmaC as DmaC; + SpiP.DmaChannel1 -> DmaC.Channel1; + SpiP.DmaChannel2 -> DmaC.Channel2; + + components LedsC as Leds; + SpiP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430SpiDmaBP.nc b/tos/chips/msp430/usci/Msp430SpiDmaBP.nc new file mode 100644 index 0000000000..3d449ef280 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430SpiDmaBP.nc @@ -0,0 +1,195 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Jonathan Hui + * @author Mark Hays + * @author Roman Lim + * @author Xavier Orduna + */ + +generic module Msp430SpiDmaBP( uint16_t IFG_addr, + uint16_t TXBUF_addr, + uint8_t TXIFG, + uint16_t TXTRIG, + uint16_t RXBUF_addr, + uint8_t RXIFG, + uint16_t RXTRIG ) { + + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[ uint8_t id ]; + provides interface SpiByte; + provides interface SpiPacket[ uint8_t id ]; + + uses interface Msp430DmaChannel as DmaChannel1; + uses interface Msp430DmaChannel as DmaChannel2; + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430SpiConfigure[uint8_t id ]; + uses interface HplMsp430UsciB as Usci; + uses interface HplMsp430UsciInterrupts as UsciInterrupts; + uses interface Leds; +} + +implementation { + +#define IFG (*(volatile uint8_t*)IFG_addr) + + uint8_t* m_tx_buf; + uint8_t* m_rx_buf; + uint16_t m_len; + uint8_t m_client; + uint8_t m_dump; + + void signalDone( error_t error ); + task void signalDone_task(); + + async command error_t Resource.immediateRequest[ uint8_t id ]() { + return call UsciResource.immediateRequest[ id ](); + } + + async command error_t Resource.request[ uint8_t id ]() { + return call UsciResource.request[ id ](); + } + + async command error_t Resource.release[ uint8_t id ]() { + return call UsciResource.release[ id ](); + } + + async command void ResourceConfigure.configure[ uint8_t id ]() { + call Usci.setModeSpi(call Msp430SpiConfigure.getConfig[id]()); + } + + async command void ResourceConfigure.unconfigure[ uint8_t id ]() { + call Usci.resetUsci(TRUE); + call Usci.disableSpi(); + call Usci.resetUsci(FALSE); + } + + event void UsciResource.granted[ uint8_t id ]() { + signal Resource.granted[ id ](); + } + + async command uint8_t Resource.isOwner[ uint8_t id ]() { + return call UsciResource.isOwner[ id ](); + } + + default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } + default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + return &msp430_spi_default_config; + } + + default event void Resource.granted[ uint8_t id ]() {} + + async command uint8_t SpiByte.write( uint8_t tx ) { + call Usci.tx( tx ); + while( !call Usci.isRxIntrPending() ); + call Usci.clrRxIntr(); + return call Usci.rx(); + } + + async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, + uint8_t* rx_buf, + uint16_t len ) { + atomic { + m_client = id; + m_tx_buf = tx_buf; + m_rx_buf = rx_buf; + m_len = len; + } + + if ( len ) { + // clear the interrupt flags + IFG &= ~( TXIFG | RXIFG ); + + // set up the RX xfer + call DmaChannel1.setupTransfer(DMA_SINGLE_TRANSFER, + RXTRIG, + DMA_EDGE_SENSITIVE, + (void *) RXBUF_addr, + rx_buf ? rx_buf : &m_dump, + len, + DMA_BYTE, + DMA_BYTE, + DMA_ADDRESS_UNCHANGED, + rx_buf ? + DMA_ADDRESS_INCREMENTED : + DMA_ADDRESS_UNCHANGED); + // this doesn't start a transfer; it simply enables the channel + call DmaChannel1.startTransfer(); + + // set up the TX xfer + call DmaChannel2.setupTransfer(DMA_SINGLE_TRANSFER, + TXTRIG, + DMA_EDGE_SENSITIVE, + tx_buf, + (void *) TXBUF_addr, + len, + DMA_BYTE, + DMA_BYTE, + DMA_ADDRESS_INCREMENTED, + DMA_ADDRESS_UNCHANGED); + // this doesn't start a transfer; it simply enables the channel + call DmaChannel2.startTransfer(); + + // pong the tx flag to get things rolling + IFG |= TXIFG; + } else { + post signalDone_task(); + } + return SUCCESS; + } + + task void signalDone_task() { + atomic signalDone( SUCCESS ); + } + + async event void DmaChannel1.transferDone( error_t error ) { + signalDone( error ); + } + + async event void DmaChannel2.transferDone( error_t error ) {} + + void signalDone( error_t error ) { + signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, error ); + } + + async event void UsciInterrupts.txDone() {} + async event void UsciInterrupts.rxDone( uint8_t data ) {} + + default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {} +} diff --git a/tos/chips/msp430/usci/Msp430SpiNoDmaB0P.nc b/tos/chips/msp430/usci/Msp430SpiNoDmaB0P.nc new file mode 100644 index 0000000000..e51c7409c7 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430SpiNoDmaB0P.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +configuration Msp430SpiNoDmaB0P { + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[uint8_t id ]; + provides interface SpiByte; + provides interface SpiPacket[ uint8_t id ]; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430SpiConfigure[ uint8_t id ]; + uses interface HplMsp430UsciInterrupts as UsciInterrupts; +} + +implementation { + components new Msp430SpiNoDmaBP() as SpiP; + Resource = SpiP.Resource; + ResourceConfigure = SpiP.ResourceConfigure; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket; + UsciResource = SpiP.UsciResource; + UsciInterrupts = SpiP.UsciInterrupts; + + components HplMsp430UsciB0C as UsciC; + SpiP.Usci -> UsciC; + + components LedsC as Leds; + SpiP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc b/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc new file mode 100644 index 0000000000..fcd5514dd1 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc @@ -0,0 +1,181 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Jan Hauer (bugfix in continueOp()) + * @author Xavier Orduna + */ + +generic module Msp430SpiNoDmaBP() { + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[ uint8_t id ]; + provides interface SpiByte; + provides interface SpiPacket[ uint8_t id ]; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430SpiConfigure[ uint8_t id ]; + uses interface HplMsp430UsciB as Usci; + uses interface HplMsp430UsciInterrupts as UsciInterrupts; + uses interface Leds; +} + +implementation { + enum { + SPI_ATOMIC_SIZE = 2, + }; + + norace uint16_t m_len; + norace uint8_t* COUNT_NOK(m_len) m_tx_buf; + norace uint8_t* COUNT_NOK(m_len) m_rx_buf; + norace uint16_t m_pos; + norace uint8_t m_client; + + void signalDone(); + task void signalDone_task(); + + async command error_t Resource.immediateRequest[ uint8_t id ]() { + return call UsciResource.immediateRequest[ id ](); + } + + async command error_t Resource.request[ uint8_t id ]() { + return call UsciResource.request[ id ](); + } + + async command uint8_t Resource.isOwner[ uint8_t id ]() { + return call UsciResource.isOwner[ id ](); + } + + async command error_t Resource.release[ uint8_t id ]() { + return call UsciResource.release[ id ](); + } + + async command void ResourceConfigure.configure[ uint8_t id ]() { + call Usci.setModeSpi(call Msp430SpiConfigure.getConfig[id]()); + } + + async command void ResourceConfigure.unconfigure[ uint8_t id ]() { + call Usci.resetUsci(TRUE); + call Usci.disableSpi(); + call Usci.resetUsci(FALSE); + } + + event void UsciResource.granted[ uint8_t id ]() { + signal Resource.granted[ id ](); + } + + async command uint8_t SpiByte.write( uint8_t tx ) { + uint8_t byte; + // we are in spi mode which is configured to have turned off interrupts + //call Usart.disableRxIntr(); + call Usci.tx( tx ); + while( !call Usci.isRxIntrPending() ); + call Usci.clrRxIntr(); + byte = call Usci.rx(); + //call Usart.enableRxIntr(); + return byte; + } + + default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } + default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + return (msp430_spi_union_config_t*) &msp430_spi_default_config; + } + + default event void Resource.granted[ uint8_t id ]() {} + + void continueOp() { + uint8_t end; + uint8_t tmp; + + atomic { + call Usci.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); + + end = m_pos + SPI_ATOMIC_SIZE; + if ( end > m_len ) + end = m_len; + + while ( ++m_pos < end ) { + while( !call Usci.isRxIntrPending() ); + tmp = call Usci.rx(); + if ( m_rx_buf ) + m_rx_buf[ m_pos - 1 ] = tmp; + call Usci.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); + } + } + } + + async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, + uint8_t* rx_buf, + uint16_t len ) { + m_client = id; + m_tx_buf = tx_buf; + m_rx_buf = rx_buf; + m_len = len; + m_pos = 0; + + if ( len ) { + call Usci.enableRxIntr(); + continueOp(); + } else { + post signalDone_task(); + } + return SUCCESS; + } + + task void signalDone_task() { + atomic signalDone(); + } + + async event void UsciInterrupts.rxDone( uint8_t data ) { + if ( m_rx_buf ) + m_rx_buf[ m_pos-1 ] = data; + + if ( m_pos < m_len ) + continueOp(); + else { + call Usci.disableRxIntr(); + signalDone(); + } + } + + void signalDone() { + signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, SUCCESS ); + } + + async event void UsciInterrupts.txDone() {} + + default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {} +} diff --git a/tos/chips/msp430/usci/Msp430Uart0C.nc b/tos/chips/msp430/usci/Msp430Uart0C.nc new file mode 100644 index 0000000000..da7a380876 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Uart0C.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * An implementation of the UART on USCIA0 for the MSP430. + * @author Vlado Handziski + * @author Jonathan Hui + * @author Eric B. Decker + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +generic configuration Msp430Uart0C() { + provides interface Resource; + provides interface ResourceRequested; + provides interface UartStream; + provides interface UartByte; + + uses interface Msp430UartConfigure; +} + +implementation { + enum { + CLIENT_ID = unique( MSP430_UART0_BUS ), + }; + + components Msp430Uart0P as UartP; + Resource = UartP.Resource[ CLIENT_ID ]; + UartStream = UartP.UartStream[ CLIENT_ID ]; + UartByte = UartP.UartByte[ CLIENT_ID ]; + Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; + + components new Msp430UsciA0C() as UsciC; + ResourceRequested = UsciC; + UartP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; + UartP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; + UartP.UsciInterrupts[ CLIENT_ID ] -> UsciC.HplMsp430UsciInterrupts; +} diff --git a/tos/chips/msp430/usci/Msp430Uart0P.nc b/tos/chips/msp430/usci/Msp430Uart0P.nc new file mode 100644 index 0000000000..a3abb32c67 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Uart0P.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Vlado Handziski + * @author Eric B. Decker + * @author Xavier Orduna + */ + +configuration Msp430Uart0P { + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[ uint8_t id ]; + provides interface UartStream[ uint8_t id ]; + provides interface UartByte[ uint8_t id ]; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430UartConfigure[ uint8_t id ]; + uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; +} + +implementation { + components new Msp430UartP() as UartP; + Resource = UartP.Resource; + ResourceConfigure = UartP.ResourceConfigure; + Msp430UartConfigure = UartP.Msp430UartConfigure; + UartStream = UartP.UartStream; + UartByte = UartP.UartByte; + UsciResource = UartP.UsciResource; + UsciInterrupts = UartP.UsciInterrupts; + + components HplMsp430UsciA0C as UsciC; + UartP.Usci -> UsciC; + + components Counter32khz16C as CounterC; + UartP.Counter -> CounterC; + + components LedsC as Leds; + UartP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430Uart1C.nc b/tos/chips/msp430/usci/Msp430Uart1C.nc new file mode 100644 index 0000000000..93a75d68be --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Uart1C.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * An implementation of the UART on USCIA1 for the MSP430. + * @author Vlado Handziski + * @author Jonathan Hui + * @author Eric B. Decker + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +generic configuration Msp430Uart1C() { + provides interface Resource; + provides interface ResourceRequested; + provides interface UartStream; + provides interface UartByte; + + uses interface Msp430UartConfigure; +} + +implementation { + enum { + CLIENT_ID = unique( MSP430_UART1_BUS ), + }; + + components Msp430Uart1P as UartP; + Resource = UartP.Resource[ CLIENT_ID ]; + UartStream = UartP.UartStream[ CLIENT_ID ]; + UartByte = UartP.UartByte[ CLIENT_ID ]; + Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; + + components new Msp430UsciA1C() as UsciC; + ResourceRequested = UsciC; + UartP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; + UartP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; + UartP.UsciInterrupts[ CLIENT_ID ] -> UsciC.HplMsp430UsciInterrupts; +} diff --git a/tos/chips/msp430/usci/Msp430Uart1P.nc b/tos/chips/msp430/usci/Msp430Uart1P.nc new file mode 100644 index 0000000000..fac3de2ca3 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Uart1P.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Vlado Handziski + * @author Eric B. Decker + * @author Xavier Orduna + */ + +configuration Msp430Uart1P { + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[ uint8_t id ]; + provides interface UartStream[ uint8_t id ]; + provides interface UartByte[ uint8_t id ]; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430UartConfigure[ uint8_t id ]; + uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; +} + +implementation { + components new Msp430UartP() as UartP; + Resource = UartP.Resource; + ResourceConfigure = UartP.ResourceConfigure; + Msp430UartConfigure = UartP.Msp430UartConfigure; + UartStream = UartP.UartStream; + UartByte = UartP.UartByte; + UsciResource = UartP.UsciResource; + UsciInterrupts = UartP.UsciInterrupts; + + components HplMsp430UsciA1C as UsciC; + UartP.Usci -> UsciC; + + components Counter32khz16C as CounterC; + UartP.Counter -> CounterC; + + components LedsC as Leds; + UartP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430UartConfigure.nc b/tos/chips/msp430/usci/Msp430UartConfigure.nc new file mode 100644 index 0000000000..fdfcf30a86 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UartConfigure.nc @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2004-2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Interface used by Msp430Uart clients to reconfigure the UART before use + * + * @author Vlado Handziski + * @author Xavier Orduna + */ + +#include "msp430usci.h" + +interface Msp430UartConfigure { + async command msp430_uart_union_config_t* getConfig(); +} diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc new file mode 100644 index 0000000000..804dab8c28 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UartP.nc @@ -0,0 +1,218 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Vlado Handziski + * @author Eric B. Decker + * @author Xavier Orduna + */ + +#include + +generic module Msp430UartP() { + provides interface Resource[ uint8_t id ]; + provides interface ResourceConfigure[ uint8_t id ]; + provides interface UartStream[ uint8_t id ]; + provides interface UartByte[ uint8_t id ]; + + uses interface Resource as UsciResource[ uint8_t id ]; + uses interface Msp430UartConfigure[ uint8_t id ]; + uses interface HplMsp430UsciA as Usci; + uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; + uses interface Counter; + uses interface Leds; +} + +implementation { + norace uint16_t m_tx_len, m_rx_len; + norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; + norace uint16_t m_tx_pos, m_rx_pos; + norace uint8_t m_byte_time; + norace uint8_t current_owner; + + async command error_t Resource.immediateRequest[ uint8_t id ]() { + return call UsciResource.immediateRequest[ id ](); + } + + async command error_t Resource.request[ uint8_t id ]() { + return call UsciResource.request[ id ](); + } + + async command uint8_t Resource.isOwner[ uint8_t id ]() { + return call UsciResource.isOwner[ id ](); + } + + async command error_t Resource.release[ uint8_t id ]() { + if (call UsciResource.isOwner[id]() == FALSE) + return FAIL; + if ( m_rx_buf || m_tx_buf ) + return EBUSY; + return call UsciResource.release[ id ](); + } + + async command void ResourceConfigure.configure[ uint8_t id ]() { + msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); + m_byte_time = config->uartConfig.ubr / 2; //pot donar problemes + call Usci.setModeUart(config); + call Usci.enableIntr(); + } + + async command void ResourceConfigure.unconfigure[ uint8_t id ]() { + call Usci.resetUsci(TRUE); + call Usci.disableIntr(); + call Usci.disableUart(); + } + + event void UsciResource.granted[ uint8_t id ]() { + signal Resource.granted[ id ](); + } + + async command error_t UartStream.enableReceiveInterrupt[ uint8_t id ]() { + if (call UsciResource.isOwner[id]() == FALSE) + return FAIL; + call Usci.enableRxIntr(); + return SUCCESS; + } + + async command error_t UartStream.disableReceiveInterrupt[ uint8_t id ]() { + if (call UsciResource.isOwner[id]() == FALSE) + return FAIL; + call Usci.disableRxIntr(); + return SUCCESS; + } + + async command error_t UartStream.receive[ uint8_t id ]( uint8_t* buf, uint16_t len ) { + if (call UsciResource.isOwner[id]() == FALSE) + return FAIL; + if ( len == 0 ) + return FAIL; + atomic { + if ( m_rx_buf ) + return EBUSY; + m_rx_buf = buf; + m_rx_len = len; + m_rx_pos = 0; + } + return SUCCESS; + } + + async event void UsciInterrupts.rxDone[uint8_t id]( uint8_t data ) { + //call Usci.clrRxIntr(); + if ( m_rx_buf ) { + m_rx_buf[ m_rx_pos++ ] = data; + if ( m_rx_pos >= m_rx_len ) { + uint8_t* buf = m_rx_buf; + m_rx_buf = NULL; + signal UartStream.receiveDone[id]( buf, m_rx_len, SUCCESS ); + } + } else { + signal UartStream.receivedByte[id]( data ); + } + } + + async command error_t UartStream.send[ uint8_t id ]( uint8_t* buf, uint16_t len ) { + if (call UsciResource.isOwner[id]() == FALSE) + return FAIL; + if ( len == 0 ) + return FAIL; + else if ( m_tx_buf ) + return EBUSY; + m_tx_buf = buf; + m_tx_len = len; + m_tx_pos = 0; + current_owner = id; + call Usci.tx( buf[ m_tx_pos++ ] ); + return SUCCESS; + } + + async event void UsciInterrupts.txDone[uint8_t id]() { + call Usci.clrTxIntr(); + if(current_owner != id) { + uint8_t* buf = m_tx_buf; + m_tx_buf = NULL; + signal UartStream.sendDone[id]( buf, m_tx_len, FAIL ); + } + else if ( m_tx_pos < m_tx_len ) { + call Usci.tx( m_tx_buf[ m_tx_pos++ ] ); + } + else { + uint8_t* buf = m_tx_buf; + m_tx_buf = NULL; + signal UartStream.sendDone[id]( buf, m_tx_len, SUCCESS ); + } + } + + async command error_t UartByte.send[ uint8_t id ]( uint8_t data ) { + if (call UsciResource.isOwner[id]() == FALSE) + return FAIL; + call Usci.clrTxIntr(); + call Usci.disableTxIntr (); + call Usci.tx( data ); + while( !call Usci.isTxIntrPending() ); + call Usci.clrTxIntr(); + call Usci.enableTxIntr(); + return SUCCESS; + } + + async command error_t UartByte.receive[ uint8_t id ]( uint8_t* byte, uint8_t timeout ) { + uint16_t timeout_micro = m_byte_time * timeout + 1; + uint16_t start; + + if (call UsciResource.isOwner[id]() == FALSE) + return FAIL; + start = call Counter.get(); + while( !call Usci.isRxIntrPending() ) { + if ( ( call Counter.get() - start ) >= timeout_micro ) + return FAIL; + } + *byte = call Usci.rx(); + return SUCCESS; + } + + async event void Counter.overflow() {} + + default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } + default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } + default async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() { + return (msp430_uart_union_config_t *) &msp430_uart_default_config; + } + + default event void Resource.granted[ uint8_t id ]() {} + + default async event void UartStream.sendDone[ uint8_t id ](uint8_t* buf, uint16_t len, error_t error) {} + default async event void UartStream.receivedByte[ uint8_t id ](uint8_t byte) {} + default async event void UartStream.receiveDone[ uint8_t id ]( uint8_t* buf, uint16_t len, error_t error ) {} +} diff --git a/tos/chips/msp430/usci/Msp430UsciA0C.nc b/tos/chips/msp430/usci/Msp430UsciA0C.nc new file mode 100644 index 0000000000..46cccedf78 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciA0C.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Provides an interface for USART0 on the MSP430. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +generic configuration Msp430UsciA0C() { + provides interface Resource; + provides interface ResourceRequested; + provides interface ArbiterInfo; + provides interface HplMsp430UsciA; + provides interface HplMsp430UsciInterrupts; + + uses interface ResourceConfigure; +} + +implementation { + enum { + CLIENT_ID = unique( MSP430_HPLUSCIA0_RESOURCE ), + }; + + components Msp430UsciShareA0P as UsciShareP; + + Resource = UsciShareP.Resource[ CLIENT_ID ]; + ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; + ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; + ArbiterInfo = UsciShareP.ArbiterInfo; + HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; + + components HplMsp430UsciA0C as HplUsciC; + HplMsp430UsciA = HplUsciC; +} diff --git a/tos/chips/msp430/usci/Msp430UsciA1C.nc b/tos/chips/msp430/usci/Msp430UsciA1C.nc new file mode 100644 index 0000000000..7e8839aebc --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciA1C.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Provides an interface for USART0 on the MSP430. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +generic configuration Msp430UsciA1C() { + provides interface Resource; + provides interface ResourceRequested; + provides interface ArbiterInfo; + provides interface HplMsp430UsciA; + provides interface HplMsp430UsciInterrupts; + + uses interface ResourceConfigure; +} + +implementation { + enum { + CLIENT_ID = unique( MSP430_HPLUSCIA1_RESOURCE ), + }; + + components Msp430UsciShareA1P as UsciShareP; + + Resource = UsciShareP.Resource[ CLIENT_ID ]; + ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; + ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; + ArbiterInfo = UsciShareP.ArbiterInfo; + HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; + + components HplMsp430UsciA1C as HplUsciC; + HplMsp430UsciA = HplUsciC; +} diff --git a/tos/chips/msp430/usci/Msp430UsciB0C.nc b/tos/chips/msp430/usci/Msp430UsciB0C.nc new file mode 100644 index 0000000000..0abac03fe1 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciB0C.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Provides an interface for USART0 on the MSP430. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +generic configuration Msp430UsciB0C() { + provides interface Resource; + provides interface ResourceRequested; + provides interface ArbiterInfo; + provides interface HplMsp430UsciB; + provides interface HplMsp430UsciInterrupts; + + uses interface ResourceConfigure; +} + +implementation { + enum { + CLIENT_ID = unique( MSP430_HPLUSCIB0_RESOURCE ), + }; + + components Msp430UsciShareB0P as UsciShareP; + + Resource = UsciShareP.Resource[ CLIENT_ID ]; + ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; + ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; + ArbiterInfo = UsciShareP.ArbiterInfo; + HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; + + components HplMsp430UsciB0C as HplUsciC; + HplMsp430UsciB = HplUsciC; +} diff --git a/tos/chips/msp430/usci/Msp430UsciB1C.nc b/tos/chips/msp430/usci/Msp430UsciB1C.nc new file mode 100644 index 0000000000..d367402f54 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciB1C.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2005-2006 Arched Rock Corporation + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Provides an interface for USART0 on the MSP430. + * + * @author Jonathan Hui + */ + +generic configuration Msp430UsciB1C() { + provides interface Resource; + provides interface ResourceRequested; + provides interface ArbiterInfo; + provides interface HplMsp430UsciB; + provides interface HplMsp430UsciInterrupts; + + uses interface ResourceConfigure; +} + +implementation { + enum { + CLIENT_ID = unique( MSP430_HPLUSCIB1_RESOURCE ), + }; + + components Msp430UsciShareB1P as UsciShareP; + + Resource = UsciShareP.Resource[ CLIENT_ID ]; + ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; + ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; + ArbiterInfo = UsciShareP.ArbiterInfo; + HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; + + components HplMsp430UsciB1C as HplUsciC; + HplMsp430UsciB = HplUsciC; +} diff --git a/tos/chips/msp430/usci/Msp430UsciShareA0P.nc b/tos/chips/msp430/usci/Msp430UsciShareA0P.nc new file mode 100644 index 0000000000..428d23faa2 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciShareA0P.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +configuration Msp430UsciShareA0P { + provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + provides interface Resource[ uint8_t id ]; + provides interface ResourceRequested[ uint8_t id ]; + provides interface ArbiterInfo; + + uses interface ResourceConfigure[ uint8_t id ]; +} + +implementation { + components new Msp430UsciShareP() as UsciShareP; + Interrupts = UsciShareP; + + components new FcfsArbiterC( MSP430_HPLUSCIA0_RESOURCE ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsciShareP.ArbiterInfo -> ArbiterC; + + components HplMsp430UsciA0C as HplUsciC; + UsciShareP.RawInterrupts -> HplUsciC; +} diff --git a/tos/chips/msp430/usci/Msp430UsciShareA1P.nc b/tos/chips/msp430/usci/Msp430UsciShareA1P.nc new file mode 100644 index 0000000000..76134f3aeb --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciShareA1P.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +configuration Msp430UsciShareA1P { + provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + provides interface Resource[ uint8_t id ]; + provides interface ResourceRequested[ uint8_t id ]; + provides interface ArbiterInfo; + + uses interface ResourceConfigure[ uint8_t id ]; +} + +implementation { + components new Msp430UsciShareP() as UsciShareP; + Interrupts = UsciShareP; + + components new FcfsArbiterC( MSP430_HPLUSCIA1_RESOURCE ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsciShareP.ArbiterInfo -> ArbiterC; + + components HplMsp430UsciA1C as HplUsciC; + UsciShareP.RawInterrupts -> HplUsciC; +} diff --git a/tos/chips/msp430/usci/Msp430UsciShareB0P.nc b/tos/chips/msp430/usci/Msp430UsciShareB0P.nc new file mode 100644 index 0000000000..1e56e2ed5e --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciShareB0P.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +configuration Msp430UsciShareB0P { + provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + provides interface Resource[ uint8_t id ]; + provides interface ResourceRequested[ uint8_t id ]; + provides interface ArbiterInfo; + + uses interface ResourceConfigure[ uint8_t id ]; +} + +implementation { + components new Msp430UsciShareP() as UsciShareP; + Interrupts = UsciShareP; + + components new FcfsArbiterC( MSP430_HPLUSCIB0_RESOURCE ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsciShareP.ArbiterInfo -> ArbiterC; + + components HplMsp430UsciB0C as HplUsciC; + UsciShareP.RawInterrupts -> HplUsciC; +} diff --git a/tos/chips/msp430/usci/Msp430UsciShareB1P.nc b/tos/chips/msp430/usci/Msp430UsciShareB1P.nc new file mode 100644 index 0000000000..05aa10dcde --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciShareB1P.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +configuration Msp430UsciShareB1P { + provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + provides interface Resource[ uint8_t id ]; + provides interface ResourceRequested[ uint8_t id ]; + provides interface ArbiterInfo; + + uses interface ResourceConfigure[ uint8_t id ]; +} + +implementation { + components new Msp430UsciShareP() as UsciShareP; + Interrupts = UsciShareP; + + components new FcfsArbiterC( MSP430_HPLUSCIB1_RESOURCE ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsciShareP.ArbiterInfo -> ArbiterC; + + components HplMsp430UsciB1C as HplUsciC; + UsciShareP.RawInterrupts -> HplUsciC; +} diff --git a/tos/chips/msp430/usci/Msp430UsciShareP.nc b/tos/chips/msp430/usci/Msp430UsciShareP.nc new file mode 100644 index 0000000000..6e7f2e2a37 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430UsciShareP.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jonathan Hui + * @author Xavier Orduna + */ + +generic module Msp430UsciShareP() @safe() { + provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + uses interface HplMsp430UsciInterrupts as RawInterrupts; + uses interface ArbiterInfo; +} + +implementation { + async event void RawInterrupts.txDone() { + if ( call ArbiterInfo.inUse() ) + signal Interrupts.txDone[ call ArbiterInfo.userId() ](); + } + + async event void RawInterrupts.rxDone( uint8_t data ) { + if ( call ArbiterInfo.inUse() ) + signal Interrupts.rxDone[ call ArbiterInfo.userId() ]( data ); + } + + default async event void Interrupts.txDone[ uint8_t id ]() {} + default async event void Interrupts.rxDone[ uint8_t id ]( uint8_t data ) {} +} diff --git a/tos/chips/msp430/usci/PrintfUART.h b/tos/chips/msp430/usci/PrintfUART.h new file mode 100644 index 0000000000..7565d65170 --- /dev/null +++ b/tos/chips/msp430/usci/PrintfUART.h @@ -0,0 +1,384 @@ +/* + * Copyright (c) 2010 Dexma Sensors S.L. + * Copyright (c) 2008 The Regents of the University of California. + * Copyright (c) 2005 The President and Fellows of Harvard College. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Writes printf like output to the UART. + * This works only on the AVR and MSP430 Microcontrollers! + *

+ * Note: For AVR we explicitly place the print statements in ROM; for + * MSP430 this is done by default! For AVR, if we don't place it + * explicitely in ROM, the statements will go in RAM, which will + * quickly cause a descent size program to run out of RAM. By default + * it doesn't disable the interupts; disabling the interupts when + * writing to the UART, slows down/makes the mote quite unresponsive, + * and can lead to problems! If you wish to disable all printfs to + * the UART, then comment the flag: PRINTFUART_ENABLED. + + * 

+ * How to use:
+ *   // (0) In your Makefile, define PRINTFUART_ENABLED
+ *   CFLAGS += -DPRINTFUART_ENABLED
+ *   // (1) Call printfUART_init() from your initialization function 
+ *   //     to initialize the UART
+ *   printfUART_init();
+ *   // (2) Set your UART client to the correct baud rate.  Look at 
+ *   //     the comments in printfUART_init(), to figure out what 
+ *   //     baud to use for your particular mote
+ *
+ *   // (3) Send printf statements like this:
+ *   printfUART("Hello World, we are in year= %u\n", 2004);
+ *   printfUART("Printing uint32_t variable, value= %lu\n", 4294967295);
+ *
+ * Examples and caveats:
+ *   // (1) - Must use curly braces in single section statements.  
+ *            (Look in the app.c to see why -- hint: it's a macro)
+ *   if (x < 3)
+ *       {printfUART("The value of x is %i\n", x);}
+ *   // (2) - Otherwise it more or less works like regular printf
+ *   printfUART("\nThe value of x=%u, and y=%u\n", x, y); 
+ *
+ * 
URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack
+ * + * @author Konrad Lorincz + * @author Xavier Orduña + * @author Jordi Soucheiron + */ + +#ifndef PRINTFZ1_H +#define PRINTFZ1_H +#ifndef PRINTFUART_H +#define PRINTFUART_H +#include +#include + +#warning including printfZ1 + +// ------------------------------------------------------------------- +#ifdef PRINTFUART_ENABLED + #define DEBUGBUF_SIZE 256 + char debugbuf[DEBUGBUF_SIZE]; + char debugbufROMtoRAM[DEBUGBUF_SIZE]; + + #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) + #define printfUART(__format...) { \ + static const char strROM[] PROGMEM = __format; \ + strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM); \ + sprintf(debugbuf, debugbufROMtoRAM); \ + writedebug(); \ + } + #else // assume MSP430 architecture (e.g. TelosA, TelosB, etc.) + #define printfUART(__format...) { \ + sprintf(debugbuf, __format); \ + writedebug(); \ + } + #define printfz1(__format...) { \ + snprintf(debugbuf,DEBUGBUF_SIZE, __format); \ + writedebug(); \ + } + #endif +#else + #define printfz1(X, args...) dbg("printf", X, ## args) + #define printfUART(X, args...) dbg("printf", X, ## args) +// #define printfUART(__format...) {} + void printfz1_init() {} + void printfUART_init() {} +#endif + +#define NOprintfUART(__format...) + + +// ------------------------------------------------------------------- +#ifdef PRINTFUART_ENABLED + +/** + * Initialize the UART port. Call this from your startup routine. + */ +#define printfz1_init() {atomic printfUART_init_private();} +#define printfUART_init() {atomic printfUART_init_private();} + +void printfUART_init_private() { + #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) + // 56K baud + outp(0,UBRR0H); + outp(15, UBRR0L); //set baud rate + outp((1< = STDRXD = ALT2(in) + GPIO<47> = STDTXD = ALT1(out) + *********/ + //atomic{ + + //configure the GPIO Alt functions and directions + _GPIO_setaltfn(46,2); // STD_RXD + _GPIO_setaltfn(47,1); // STD_TXD + + _GPDR(46) &= ~_GPIO_bit(46); // input + _GPDR(47) |= _GPIO_bit(47); // output + + STLCR |=LCR_DLAB; //turn on DLAB so we can change the divisor + STDLL = 8; //configure to 115200; + STDLH = 0; + STLCR &= ~(LCR_DLAB); //turn off DLAB + + STLCR |= 0x3; //configure to 8 bits + + STMCR &= ~MCR_LOOP; + STMCR |= MCR_OUT2; + STIER |= IER_RAVIE; + STIER |= IER_TIE; + STIER |= IER_UUE; //enable the UART + + //STMCR |= MCR_AFE; //Auto flow control enabled; + //STMCR |= MCR_RTS; + + STFCR |= FCR_TRFIFOE; //enable the fifos + +// call Interrupt.allocate(); +// call Interrupt.enable(); + //configure all the interrupt stuff + //make sure that the interrupt causes an IRQ not an FIQ + // __REG(0x40D00008) &= ~(1<<21); + //configure the priority as IPR1 + //__REG(0x40D00020) = (1<<31 | 21); + //unmask the interrupt + //__REG(0x40D00004) |= (1<<21); + + CKEN |= CKEN5_STUART; //enable the UART's clk + #else + #if defined(PLATFORM_Z1) + P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD + UCA0CTL1 |= UCSSEL_2; // CLK = ACLK + UCA0BR0 = 0x45; // 32kHz/9600 = 3.41 + UCA0BR1 = 0x00; // + UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 + UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** + + #else // assume TelosA, TelosB, etc. + // Variabel baud + // To change the baud rate, see /tos/platform/msp430/msp430baudrates.h + uint8_t source = SSEL_SMCLK; + uint16_t baudrate = 0x0012; // UBR_SMCLK_57600=0x0012 + uint8_t mctl = 0x84; // UMCTL_SMCLK_57600=0x84 + //uint16_t baudrate = 0x0009; // UBR_SMCLK_115200=0x0009 + //uint8_t mctl = 0x10; // UMCTL_SMCLK_115200=0x10 + + + uint16_t l_br = 0; + uint8_t l_mctl = 0; + uint8_t l_ssel = 0; + + TOSH_SEL_UTXD1_MODFUNC(); + TOSH_SEL_URXD1_MODFUNC(); + + + UCTL1 = SWRST; + UCTL1 |= CHAR; // 8-bit char, UART-mode + + U1RCTL &= ~URXEIE; // even erroneous characters trigger interrupts + + UCTL1 = SWRST; + UCTL1 |= CHAR; // 8-bit char, UART-mode + + if (l_ssel & 0x80) { + U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); + U1TCTL |= (l_ssel & 0x7F); + } + else { + U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); + U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz + } + + if ((l_mctl != 0) || (l_br != 0)) { + U1BR0 = l_br & 0x0FF; + U1BR1 = (l_br >> 8) & 0x0FF; + U1MCTL = l_mctl; + } + else { + U1BR0 = 0x03; // 9600 baud + U1BR1 = 0x00; + U1MCTL = 0x4A; + } + + ME2 &= ~USPIE1; // USART1 SPI module disable + ME2 |= (UTXE1 | URXE1); // USART1 UART module enable + + U1CTL &= ~SWRST; + + IFG2 &= ~(UTXIFG1 | URXIFG1); + IE2 &= ~(UTXIE1 | URXIE1); // interrupt disabled + + + + //async command void USARTControl.setClockSource(uint8_t source) { + // atomic { + l_ssel = source | 0x80; + U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); + U1TCTL |= (l_ssel & 0x7F); + // } + //} + //async command void USARTControl.setClockRate(uint16_t baudrate, uint8_t mctl) { + //atomic { + l_br = baudrate; + l_mctl = mctl; + U1BR0 = baudrate & 0x0FF; + U1BR1 = (baudrate >> 8) & 0x0FF; + U1MCTL = mctl; + //} + //} + + //async command result_t USARTControl.enableRxIntr(){ + //atomic { + IFG2 &= ~URXIFG1; + IE2 |= URXIE1; + //} + //return SUCCESS; + //} + + //async command result_t USARTControl.enableTxIntr(){ + //atomic { + IFG2 &= ~UTXIFG1; + IE2 |= UTXIE1; + //} + //return SUCCESS; + //} + + #endif + #endif + #endif + #endif +} + +#if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) +#else +#if defined(PLATFORM_IMOTE2) +#else +#if defined(PLATFORM_Z1) +#else // assume AVR architecture (e.g. TelosA, TelosB) + bool isTxIntrPending() + { + if (U1TCTL & TXEPT) { + return TRUE; + } + return FALSE; + } +#endif +#endif +#endif + +/** + * Outputs a char to the UART. + */ +void UARTPutChar(char c) +{ + if (c == '\n') + UARTPutChar('\r'); + + + #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) + loop_until_bit_is_set(UCSR0A, UDRE); + outb(UDR0,c); + + #else + #if defined(PLATFORM_IMOTE2) + STTHR = c; + #else + #if defined(PLATFORM_Z1) + while (!(IFG2&UCA0TXIFG)); + atomic UCA0TXBUF = c; + + #else // assume AVR architecture (e.g. TelosA, TelosB) + U1TXBUF = c; + while( !isTxIntrPending() ) + continue; + #endif + #endif + #endif +} + +/** + * Outputs the entire debugbuf to the UART, or until it encounters '\0'. + */ +void writedebug() +{ + uint16_t i = 0; + + while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE) + UARTPutChar(debugbuf[i++]); +} + +#endif // PRINTFUART_ENABLED +// ------------------------------------------------------------------- + +#if 0 +// -------------------------------------------------------------- +#define assertUART(x) if (!(x)) { __assertUART(__FILE__, __LINE__); } +void __assertUART(const char* file, int line) +{ + printfUART("ASSERT FAILED: file= %s, lineNbr= %i\n", file, line); + // for some reason, CLR means on + TOSH_MAKE_RED_LED_OUTPUT(); + TOSH_MAKE_YELLOW_LED_OUTPUT(); + TOSH_MAKE_GREEN_LED_OUTPUT(); + TOSH_CLR_RED_LED_PIN(); + TOSH_CLR_YELLOW_LED_PIN(); + TOSH_CLR_GREEN_LED_PIN(); + exit(1); +} +// -------------------------------------------------------------- +#endif + +#endif // PRINTFUART_H +#endif // PRINTFZ1_H diff --git a/tos/chips/msp430/usci/msp430usci.h b/tos/chips/msp430/usci/msp430usci.h new file mode 100644 index 0000000000..80c0a0c486 --- /dev/null +++ b/tos/chips/msp430/usci/msp430usci.h @@ -0,0 +1,375 @@ +/* + * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2009-2010 DEXMA SENSORS SL + * Copyright (c) 2004-2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Vlado Handziski + * @author Philipp Huppertz + * @author Xavier Orduna + * @author Eric B. Decker + * @author Jordi Soucheiron + * + * Fix to reflect the MSP430X as documented in Users guide + * slau144e, msp430f2618. + */ + +#ifndef _H_MSP430USCI_H +#define _H_MSP430USCI_H + +/* + * The MSP430X architecture at least the msp430f2618 family + * has a total of four ports that can be used independently + * usciA0, A1 (uart, spi) and usciB0, B1 (i2c, spi only). + * + * We set the resources up so multiple use of a given port + * can be arbritrated. + * + * UART0 -> usciA0 SPI2 -> usciA0 + * UART1 -> usciA1 SPI3 -> usciA1 + * SPI0 -> usciB0 I2C0 + * SPI1 -> usciB1 I2C1 + * + * spi2,3 are mapped to usciA0,A1 because the typical + * configuration is to use dual uarts and dual spis + * so the less used configuration maps as 2 and 3. + */ + +//USCI A0, A1: UART, SPI +#define MSP430_HPLUSCIA0_RESOURCE "Msp430UsciA0.Resource" +#define MSP430_HPLUSCIA1_RESOURCE "Msp430UsciA1.Resource" +#define MSP430_UART0_BUS MSP430_HPLUSCIA0_RESOURCE +#define MSP430_UART1_BUS MSP430_HPLUSCIA1_RESOURCE +#define MSP430_SPI2_BUS MSP430_HPLUSCIA0_RESOURCE +#define MSP430_SPI3_BUS MSP430_HPLUSCIA1_RESOURCE + +//USCI B0, B1: SPI, I2C +#define MSP430_HPLUSCIB0_RESOURCE "Msp430UsciB0.Resource" +#define MSP430_HPLUSCIB1_RESOURCE "Msp430UsciB1.Resource" +#define MSP430_SPI0_BUS MSP430_HPLUSCIB0_RESOURCE +#define MSP430_SPI1_BUS MSP430_HPLUSCIB1_RESOURCE +#define MSP430_I2C0_BUS MSP430_HPLUSCIB0_RESOURCE +#define MSP430_I2C1_BUS MSP430_HPLUSCIB1_RESOURCE + +typedef enum { + USCI_NONE = 0, + USCI_UART = 1, + USCI_SPI = 2, + USCI_I2C = 3 +} msp430_uscimode_t; + + +/************************************************************************************************************ + * + * UART mode definitions + * + */ + +/* + * UCAxCTL0, UART control 0, uart mode + */ + +typedef struct { + unsigned int ucsync : 1; // Synchronous mode enable (0=Asynchronous; 1:Synchronous) + unsigned int ucmode : 2; // USCI Mode (00=UART Mode; 01=Idle-Line; 10=Addres-Bit; 11=UART Mode, auto baud rate detection) + unsigned int ucspb : 1; // Stop bit select. Number of stop bits (0=One stop bit; 1=Two stop bits) + unsigned int uc7bit : 1; // Charactaer lenght, (0=8-bit data; 1=7-bit data) + unsigned int ucmsb : 1; // endian. Direction of the rx and tx shift (0=LSB first, 1=MSB first) + unsigned int ucpar : 1; // Parity Select (0=odd parity; 1=Even parity) + unsigned int ucpen : 1; // Parity enable (0=Parity disable; 1=Parity enabled) +} __attribute__ ((packed)) msp430_uctl0_t ; + + +/* + * UCAxCTL1, UART control 1, uart mode + */ + +typedef struct { + unsigned int ucswrst : 1; //Software reset enable (0=disabled; 1=enabled) + unsigned int uctxbrk : 1; //Transmit break. (0 = no brk; 1 = tx break next frame + unsigned int uctxaddr : 1; //Transmit address. (0=next frame transmitted is data; 1=next frame transmitted is an address) + unsigned int ucdorm : 1; //Dormant. (0 = not dormant; 1 = Dormant, only some chars will set UCAxRXIFG) + unsigned int ucbrkie : 1; //rx break interrupt -enable, 1 = enabled + unsigned int ucrxeie : 1; //rx error interrupt-enable + unsigned int ucssel : 2; //USCI clock source select: (00=UCKL; 01=ACLK; 10=SMCLK; 11=SMCLK +} __attribute__ ((packed)) msp430_uctl1_t ; + + +//converts from typedefstructs to uint8_t +DEFINE_UNION_CAST(uctl02int,uint8_t,msp430_uctl0_t) +DEFINE_UNION_CAST(int2uctl0,msp430_uctl0_t,uint8_t) +DEFINE_UNION_CAST(uctl12int,uint8_t,msp430_uctl1_t) +DEFINE_UNION_CAST(int2uctl1,msp430_uctl1_t,uint8_t) + + +/* + * The usci/uart baud rate mechanism is significantly different + * than the msp430 usart uart. See section 15.3.9 of the TI + * MSP430x2xx Family User's Guide, slau144e for details. + * + * For 32768Hz and 1048576Hz, we use UCOS16=0. + * For higher cpu dco speeds we use oversampling, UCOS16=1. + */ + +typedef enum { + UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x04, + UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x0c, + UBR_32KHZ_4800=0x0006, UMCTL_32KHZ_4800=0x0e, + UBR_32KHZ_9600=0x0003, UMCTL_32KHZ_9600=0x06, + + UBR_1048MHZ_9600=0x006D, UMCTL_1048MHZ_9600=0x04, + UBR_1048MHZ_19200=0x0036, UMCTL_1048MHZ_19200=0x0a, + UBR_1048MHZ_38400=0x001B, UMCTL_1048MHZ_38400=0x04, + UBR_1048MHZ_57600=0x0012, UMCTL_1048MHZ_57600=0x0c, + UBR_1048MHZ_115200=0x0009, UMCTL_1048MHZ_115200=0x02, + UBR_1048MHZ_128000=0x0008, UMCTL_1048MHZ_128000=0x02, + UBR_1048MHZ_256000=0x0004, UMCTL_1048MHZ_230400=0x02, + + /* 1MHz = 1000000 Hz, 4MHz 4000000, 8MHz 8000000 + * 16MHz 16000000. use UCOS16 for oversampling, + * use both UCBRF and UCBRS. + * + * Settings for 1MHz, 8Mhz, and 16MHz are taken from + * a table on page 15-22 of slau144e. + */ + UBR_1MHZ_9600=0x6, UMCTL_1MHZ_9600=0x81, + UBR_1MHZ_19200=0x3, UMCTL_1MHZ_19200=0x41, + UBR_1MHZ_57600=0x1, UMCTL_1MHZ_57600=0x0F, + + UBR_8MHZ_4800=0x68, UMCTL_8MHZ_4800=0x31, + UBR_8MHZ_9600=0x34, UMCTL_8MHZ_9600=0x11, + UBR_8MHZ_19200=0x1A, UMCTL_8MHZ_19200=0x11, + UBR_8MHZ_38400=0x0D, UMCTL_8MHZ_38400=0x01, + UBR_8MHZ_57600=0x08, UMCTL_8MHZ_57600=0xB1, + UBR_8MHZ_115200=0x04, UMCTL_8MHZ_115200=0x3B, + UBR_8MHZ_230400=0x02, UMCTL_8MHZ_230400=0x27, + + UBR_16MHZ_4800=0xD0, UMCTL_16MHZ_4800=0x51, + UBR_16MHZ_9600=0x68, UMCTL_16MHZ_9600=0x31, + UBR_16MHZ_19200=0x34, UMCTL_16MHZ_19200=0x11, + UBR_16MHZ_38400=0x1A, UMCTL_16MHZ_38400=0x11, + UBR_16MHZ_57600=0x11, UMCTL_16MHZ_57600=0x61, + UBR_16MHZ_115200=0x8, UMCTL_16MHZ_115200=0xB1, + UBR_16MHZ_230400=0x4, UMCTL_16MHZ_230400=0x3B, +} msp430_uart_rate_t; + + +typedef struct { + unsigned int ubr: 16; // Baud rate (use enum msp430_uart_rate_t for predefined rates) + unsigned int umctl: 8; // Modulation (use enum msp430_uart_rate_t for predefined rates) + + /* start of ctl0 */ + unsigned int : 1; // ucsync, should be 0 for uart + unsigned int ucmode: 2; // mode: 00 - uart, 01 - Idle, 10 - addr bit, 11 - auto baud. + unsigned int ucspb: 1; // stop: 0 - one, 1 - two + unsigned int uc7bit: 1; // 7 or 8 bit + unsigned int : 1; // msb or lsb first, 0 says lsb, uart should be 0 + unsigned int ucpar: 1; // par, 0 odd, 1 even + unsigned int ucpen: 1; // par enable, 0 disabled + + /* start of ctl1 */ + unsigned int : 5; // not specified, defaults to 0. + unsigned int ucrxeie: 1; // rx err int enable + unsigned int ucssel: 2; // clock select, 00 uclk, 01 aclk, 10/11 smclk + + /* ume, not a control register, backward compatible with usart? + * should be okay to nuke. Is this actually used? + */ + unsigned int utxe:1; // 1:enable tx module + unsigned int urxe:1; // 1:enable rx module +} msp430_uart_config_t; + +typedef struct { + uint16_t ubr; + uint8_t umctl; + uint8_t uctl0; + uint8_t uctl1; + uint8_t ume; +} msp430_uart_registers_t; + +typedef union { + msp430_uart_config_t uartConfig; + msp430_uart_registers_t uartRegisters; +} msp430_uart_union_config_t; + + +const msp430_uart_union_config_t msp430_uart_default_config = { { + ubr : UBR_8MHZ_115200, + umctl : UMCTL_8MHZ_115200, + ucmode : 0, // uart + ucspb : 0, // one stop + uc7bit : 0, // 8 bit + ucpar : 0, // odd parity (but no parity) + ucpen : 0, // parity disabled + ucrxeie : 0, // err int off + ucssel : 2, // smclk + utxe : 1, // enable tx + urxe : 1, // enable rx + } }; + + +/************************************************************************************************************ + * + * SPI mode definitions + * + */ + +typedef struct { + unsigned int ubr : 16; // Clock division factor (> = 1) + + /* ctl0 */ + unsigned int : 1; // ucsync, forced to 1 by initilization code. + unsigned int ucmode : 2; // 00 3pin spi, 01 4pin ste ah, 10 ste al, 11 i2c + unsigned int ucmst : 1; // 0 slave, 1 master + unsigned int uc7bit : 1; // 0 8 bit, 1 7 bit. + unsigned int ucmsb : 1; // 0 lsb first, 1 msb first + unsigned int ucckpl : 1; // 0 inactive low, 1 inactive high + unsigned int ucckph : 1; // 0 tx rising uclk, captured falling + // 1 captured rising, sent falling edge. + + /* ctl1 */ + unsigned int : 1; // ucswrst, forced to 1 on init + unsigned int : 5; // unused. + unsigned int ucssel : 2; // BRCLK src, 00 NA, 01 ACLK, 10/11 SMCLK +} msp430_spi_config_t; + + +typedef struct { + uint16_t ubr; + uint8_t uctl0; + uint8_t uctl1; +} msp430_spi_registers_t; + +typedef union { + msp430_spi_config_t spiConfig; + msp430_spi_registers_t spiRegisters; +} msp430_spi_union_config_t; + + +const msp430_spi_union_config_t msp430_spi_default_config = { { + ubr : 2, /* smclk/2 */ + ucmode : 0, /* 3 pin, no ste */ + ucmst : 1, /* master */ + uc7bit : 0, /* 8 bit */ + ucmsb : 1, /* msb first, compatible with msp430 usart */ + ucckpl : 0, /* inactive state low */ + ucckph : 1, /* data captured on rising, changed falling */ + ucssel : 2, /* smclk */ + } }; + + +/************************************************************************************************************ + * + * I2C mode definitions + * + */ + +typedef struct { + unsigned int : 1; // Sync mode enable, 1 = sync, must be 1 for i2c + unsigned int ucmode : 2; // 11 for i2c + unsigned int ucmst : 1; // 0 slave, 1 master + unsigned int : 1; // unused + unsigned int ucmm : 1; // multi master mode + unsigned int ucsla10 : 1; // slave addr 7 or 10 bit + unsigned int uca10 : 1; // own addr 7 or 10 bit +} __attribute__ ((packed)) msp430_i2cctl0_t ; + + +DEFINE_UNION_CAST(i2cctl02int,uint8_t,msp430_i2cctl0_t) +DEFINE_UNION_CAST(int2i2cctl0,msp430_i2cctl0_t,uint8_t) + + +typedef struct { + unsigned int ucswrst : 1; // Software reset (1 = reset) + unsigned int uctxstt : 1; // Transmit start in master. + unsigned int uctxstp : 1; // Transmit stop in master. + unsigned int uctxnack : 1; // transmit nack + unsigned int uctr : 1; // 0 rx, 1 tx + unsigned int : 1; // unused + unsigned int ucssel : 2; // USCI clock source: (00 UCLKI; 01 ACLK; 10/11 SMCLK +} __attribute__ ((packed)) msp430_i2cctl1_t ; + + +typedef struct { + uint16_t ubr : 16; /* baud rate divisor */ + + /* ctl0 */ + uint8_t : 1; /* ucsync, forced to 1 by init code */ + uint8_t ucmode : 2; /* mode, must be 3 for i2c */ + uint8_t ucmst : 1; /* master if 1 */ + uint8_t : 1; /* unused */ + uint8_t ucmm : 1; /* mult-master mode */ + uint8_t ucsla10 : 1; /* slave addr 10 bits vs. 7 */ + uint8_t uca10 : 1; /* own addressing mode 10 bits vs. 7 */ + + /* ctl1 */ + uint8_t : 1; /* software reset */ + uint8_t : 1; /* gen tx start */ + uint8_t : 1; /* gen tx stop */ + uint8_t : 1; /* gen nack */ + uint8_t uctr : 1; /* tx/rx mode, 1 = tx */ + uint8_t : 1; /* unused */ + uint8_t ucssel : 2; /* clock src, 00 uclk, 01 aclk, 10/11 smclk */ + + /* own addr */ + uint16_t i2coa : 10; /* own address */ + uint8_t : 5; /* unused */ + uint8_t ucgcen : 1; /* general call response enable */ +} msp430_i2c_config_t; + +typedef struct { + uint16_t ubr; /* 16 bit baud rate */ + uint8_t uctl0; /* control word 0 */ + uint8_t uctl1; /* control word 1 */ + uint16_t ui2coa; /* own address, ucgcen */ +} msp430_i2c_registers_t; + +typedef union { + msp430_i2c_config_t i2cConfig; + msp430_i2c_registers_t i2cRegisters; +} msp430_i2c_union_config_t; + + +const msp430_i2c_union_config_t msp430_i2c_default_config = { { + ubr : 2, /* smclk/2 */ + ucmode : 3, /* i2c mode */ + ucmst : 1, /* master */ + ucmm : 0, /* single master */ + ucsla10 : 1, /* 10 bit slave */ + uca10 : 1, /* 10 bit us */ + uctr : 1, /* tx mode to start */ + ucssel : 2, /* smclk */ + i2coa : 1, /* our address is 1 */ + ucgcen : 1, /* respond to general call */ + } }; + +#endif /* _H_MSP430USCI_H */ diff --git a/tos/chips/msp430/McuSleepC.nc b/tos/chips/msp430/x1xxx/McuSleepC.nc similarity index 100% rename from tos/chips/msp430/McuSleepC.nc rename to tos/chips/msp430/x1xxx/McuSleepC.nc diff --git a/tos/chips/msp430/x2xxx/McuSleepC.nc b/tos/chips/msp430/x2xxx/McuSleepC.nc new file mode 100644 index 0000000000..4e2d4c2d91 --- /dev/null +++ b/tos/chips/msp430/x2xxx/McuSleepC.nc @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2005 Stanford University. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of TEP 112 (Microcontroller Power Management) for + * the MSP430. Code for low power calculation copied from older + * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp. + * + * + * @author Philip Levis + * @author Vlado Handziski + * @author Joe Polastre + * @author Cory Sharp + * @date October 26, 2005 + * @see Please refer to TEP 112 for more information about this component and its + * intended use. + * + * Added modifications to support msp430X architecture and DXNRG + * @author Xavier Orduna + */ + +module McuSleepC @safe() { + provides { + interface McuSleep; + interface McuPowerState; + } + uses { + interface McuPowerOverride; + } +} +implementation { + bool dirty = TRUE; + mcu_power_t powerState = MSP430_POWER_ACTIVE; + + /* Note that the power values are maintained in an order + * based on their active components, NOT on their values.*/ + // NOTE: This table should be in progmem. + const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = { + 0, // ACTIVE + SR_CPUOFF, // LPM0 + SR_SCG0+SR_CPUOFF, // LPM1 + SR_SCG1+SR_CPUOFF, // LPM2 + SR_SCG1+SR_SCG0+SR_CPUOFF, // LPM3 + SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF, // LPM4 + }; + + mcu_power_t getPowerState() { + mcu_power_t pState = MSP430_POWER_LPM3; + // TimerA, USCI check + if ((((TACCTL0 & CCIE) || (TACCTL1 & CCIE) || (TACCTL2 & CCIE)) && + ((TACTL & TASSEL_3) == TASSEL_2)) || + ((UCA0CTL1 & UCSSEL_3) != UCSSEL_0) || + ((UCA1CTL1 & UCSSEL_3) != UCSSEL_0) || + ((UCB0CTL1 & UCSSEL_3) != UCSSEL_0) || + ((UCB1CTL1 & UCSSEL_3) != UCSSEL_0) + ) + pState = MSP430_POWER_LPM1; + + +#ifdef __msp430_have_adc12 + // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE + if (ADC12CTL0 & ADC12ON){ + if (ADC12CTL1 & ADC12SSEL_2){ + // sample or conversion operation with MCLK or SMCLK + if (ADC12CTL1 & ADC12SSEL_1) + pState = MSP430_POWER_LPM1; + else + pState = MSP430_POWER_ACTIVE; + } else if ((ADC12CTL1 & SHS0) && ((TACTL & TASSEL_3) == TASSEL_2)){ + // Timer A is used as sample-and-hold source and SMCLK sources Timer A + // (Timer A interrupts are always disabled when it is used by the + // ADC subsystem, that's why the Timer check above is not enough) + pState = MSP430_POWER_LPM1; + } + } +#endif + + return pState; + } + + void computePowerState() { + powerState = mcombine(getPowerState(), + call McuPowerOverride.lowestState()); + } + + async command void McuSleep.sleep() { + uint16_t temp; + if (dirty) { + computePowerState(); + //dirty = 0; + } + + temp = msp430PowerBits[powerState] | SR_GIE; + __asm__ __volatile__( "bis %0, r2" : : "m" (temp) ); + // All of memory may change at this point... + asm volatile ("" : : : "memory"); + __nesc_disable_interrupt(); + } + + async command void McuPowerState.update() { + atomic dirty = 1; + } + + default async command mcu_power_t McuPowerOverride.lowestState() { + return MSP430_POWER_LPM4; + } +} diff --git a/tos/platforms/epic/.platform b/tos/platforms/epic/.platform index 49ae20554e..c2f4810ff3 100644 --- a/tos/platforms/epic/.platform +++ b/tos/platforms/epic/.platform @@ -28,6 +28,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma diff --git a/tos/platforms/eyesIFX/.family b/tos/platforms/eyesIFX/.family index fa237c9251..c315e3bc96 100644 --- a/tos/platforms/eyesIFX/.family +++ b/tos/platforms/eyesIFX/.family @@ -15,6 +15,7 @@ push( @includes, qw( %T/chips/tda5250 %T/chips/tda5250/mac %T/chips/ad5200 + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma diff --git a/tos/platforms/shimmer/.platform b/tos/platforms/shimmer/.platform index 554ed31b8c..e6e4f51522 100644 --- a/tos/platforms/shimmer/.platform +++ b/tos/platforms/shimmer/.platform @@ -32,6 +32,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma diff --git a/tos/platforms/shimmer2/.platform b/tos/platforms/shimmer2/.platform index 5ab02067a9..14afeae941 100644 --- a/tos/platforms/shimmer2/.platform +++ b/tos/platforms/shimmer2/.platform @@ -42,6 +42,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma diff --git a/tos/platforms/shimmer2r/.platform b/tos/platforms/shimmer2r/.platform index 841f427bd9..57f9bacfd1 100644 --- a/tos/platforms/shimmer2r/.platform +++ b/tos/platforms/shimmer2r/.platform @@ -42,6 +42,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma diff --git a/tos/platforms/span/.platform b/tos/platforms/span/.platform index 39f77248ad..1f7de523c5 100644 --- a/tos/platforms/span/.platform +++ b/tos/platforms/span/.platform @@ -27,6 +27,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma diff --git a/tos/platforms/span/chips/msp430/msp430hardware.h b/tos/platforms/span/chips/msp430/msp430hardware.h index 93123a99f9..f7b296e189 100644 --- a/tos/platforms/span/chips/msp430/msp430hardware.h +++ b/tos/platforms/span/chips/msp430/msp430hardware.h @@ -295,5 +295,13 @@ inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) return value; } -#endif//_H_msp430hardware_h +/* Support for chips with configurable resistors on digital inputs. These + * are denoted with __MSP430_HAS_PORT1_R__ and similar defines. */ +enum { + MSP430_PORT_RESISTOR_INVALID, /**< Hardware does not support resistor control, or pin is output */ + MSP430_PORT_RESISTOR_OFF, /**< Resistor disabled */ + MSP430_PORT_RESISTOR_PULLDOWN, /**< Pulldown resistor enabled */ + MSP430_PORT_RESISTOR_PULLUP, /**< Pullup resistor enabled */ +}; +#endif//_H_msp430hardware_h diff --git a/tos/platforms/telosa/.platform b/tos/platforms/telosa/.platform index dc6d34bd99..d9f0ad5b5c 100644 --- a/tos/platforms/telosa/.platform +++ b/tos/platforms/telosa/.platform @@ -25,6 +25,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/at45db + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/pins @@ -75,4 +76,4 @@ $ENV{'CIL_MACHINE'} = "underscore_name=false " . "__builtin_va_list=true " . "__thread_is_keyword=true"; - \ No newline at end of file + diff --git a/tos/platforms/telosb/.platform b/tos/platforms/telosb/.platform index ad3f0e526e..4ca36753f2 100644 --- a/tos/platforms/telosb/.platform +++ b/tos/platforms/telosb/.platform @@ -27,6 +27,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma diff --git a/tos/platforms/tinynode/.platform b/tos/platforms/tinynode/.platform index 818c7a8364..d4b8c33a67 100644 --- a/tos/platforms/tinynode/.platform +++ b/tos/platforms/tinynode/.platform @@ -17,6 +17,7 @@ push( @includes, qw( %T/chips/mm74hc595 + %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma diff --git a/tos/platforms/z1/.platform b/tos/platforms/z1/.platform index 788086a9b9..bc6225515c 100644 --- a/tos/platforms/z1/.platform +++ b/tos/platforms/z1/.platform @@ -1,16 +1,14 @@ push( @includes, qw( %T/platforms/z1 + %T/platforms/z1/chips/msp430/adc12 + %T/platforms/z1/chips/msp430/timer + %T/platforms/z1/chips/msp430/usci %T/platforms/z1/chips/adxl345 %T/platforms/z1/chips/cc2420 - %T/platforms/z1/chips/lis302 - %T/platforms/z1/chips/mma7455 - %T/platforms/z1/chips/m25p80 - %T/platforms/z1/chips/msp430X/adc12 - %T/platforms/z1/chips/msp430X/usci - %T/platforms/z1/chips/pic12f519 - %T/platforms/z1/chips/stm25p %T/platforms/z1/chips/sht11 + %T/platforms/z1/chips/stm25p + %T/platforms/z1/chips/tmp102 %T/chips/cc2420 %T/chips/cc2420/alarm %T/chips/cc2420/control @@ -24,13 +22,14 @@ push( @includes, qw( %T/chips/cc2420/spi %T/chips/cc2420/transmit %T/chips/cc2420/unique - %T/chips/msp430X - %T/chips/msp430X/adc12 - %T/chips/msp430X/dma - %T/chips/msp430X/pins - %T/chips/msp430X/timer - %T/chips/msp430X/usci - %T/chips/msp430X/sensors + %T/chips/msp430/x2xxx + %T/chips/msp430 + %T/chips/msp430/adc12 + %T/chips/msp430/dma + %T/chips/msp430/pins + %T/chips/msp430/timer + %T/chips/msp430/usci + %T/chips/msp430/sensors %T/chips/stm25p %T/chips/sht11 %T/chips/tmp102 diff --git a/tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc b/tos/platforms/z1/chips/msp430/adc12/BatteryC.nc similarity index 100% rename from tos/platforms/z1/chips/msp430X/adc12/BatteryC.nc rename to tos/platforms/z1/chips/msp430/adc12/BatteryC.nc diff --git a/tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc b/tos/platforms/z1/chips/msp430/adc12/BatteryP.nc similarity index 100% rename from tos/platforms/z1/chips/msp430X/adc12/BatteryP.nc rename to tos/platforms/z1/chips/msp430/adc12/BatteryP.nc diff --git a/tos/platforms/z1/chips/msp430/timer/Msp430ClockC.nc b/tos/platforms/z1/chips/msp430/timer/Msp430ClockC.nc new file mode 100644 index 0000000000..fd4b49dc69 --- /dev/null +++ b/tos/platforms/z1/chips/msp430/timer/Msp430ClockC.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Cory Sharp + * @author Eric B. Decker + */ + +configuration Msp430ClockC { + provides interface Init; + provides interface Msp430ClockInit; +} + +implementation { + components Msp430ClockP, Msp430TimerC, McuSleepC; + + Init = Msp430ClockP; + Msp430ClockInit = Msp430ClockP; + McuSleepC.McuPowerOverride -> Msp430ClockP; +} diff --git a/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc b/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc new file mode 100644 index 0000000000..a38b76ac4c --- /dev/null +++ b/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc @@ -0,0 +1,252 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Cory Sharp + * @author Vlado Handziski + * @author Xavier Orduna + * @author Eric B. Decker + */ + +#include +#include "Msp430XDcoCalib.h" + +#include "Msp430Timer.h" + +module Msp430ClockP @safe() { + provides interface Init; + provides interface Msp430ClockInit; + provides interface McuPowerOverride; +} + +implementation { + MSP430REG_NORACE(IE1); + MSP430REG_NORACE(TACTL); + MSP430REG_NORACE(TAIV); + MSP430REG_NORACE(TBCTL); + MSP430REG_NORACE(TBIV); + + enum { + ACLK_CALIB_PERIOD = 8, + TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, + }; + + async command mcu_power_t McuPowerOverride.lowestState() { + return MSP430_POWER_LPM3; + } + + command void Msp430ClockInit.defaultSetupDcoCalibrate() { + // --- setup --- + TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0 + TBCTL = TBSSEL0 | MC1; + BCSCTL1 = XT2OFF | RSEL2; + BCSCTL2 = 0; + TBCCTL0 = CM0; + } + + command void Msp430ClockInit.defaultInitClocks() { + //check if calib tables are OK + if(CALBC1_8MHZ != 0xFF) { + DCOCTL = 0x00; + BCSCTL1 = CALBC1_8MHZ; //Set DCO to 8MHz + DCOCTL = CALDCO_8MHZ; + } else { //start using reasonable values at 8 Mhz + DCOCTL = 0x00; + BCSCTL1 = 0x8D; + DCOCTL = 0x88; + } + + // BCSCTL1 + // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK + // .XTS = 0; set low frequency mode for LXFT1 + // .DIVA = 0; set the divisor on ACLK to 1 + // .RSEL, do not modify + +// BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0)); + BCSCTL1 = XT2OFF | (BCSCTL1); + + // BCSCTL2 + // .SELM = 0; select DCOCLK as source for MCLK + // .DIVM = 0; set the divisor of MCLK to 1 + // .SELS = 0; select DCOCLK as source for SCLK + // .DIVS = 2; set the divisor of SCLK to 4 + // .DCOR = 0; select internal resistor for DCO + + //BCSCTL2 = DIVS1; + //BCSCTL2 = DIVS1 | 0x01; + + // IE1.OFIE = 0; no interrupt for oscillator fault + CLR_FLAG( IE1, OFIE ); + } + + command void Msp430ClockInit.defaultInitTimerA() { + TAR = 0; + + // TACTL + // .TACLGRP = 0; each TACL group latched independently + // .CNTL = 0; 16-bit counter + // .TASSEL = 2; source SMCLK = DCO/4 + // .ID = 0; input divisor of 1 + // .MC = 0; initially disabled + // .TACLR = 0; reset timer A + // .TAIE = 1; enable timer A interrupts + TACTL = TASSEL1 | TAIE; + } + + command void Msp430ClockInit.defaultInitTimerB() { + TBR = 0; + + // TBCTL + // .TBCLGRP = 0; each TBCL group latched independently + // .CNTL = 0; 16-bit counter + // .TBSSEL = 1; source ACLK + // .ID = 0; input divisor of 1 + // .MC = 0; initially disabled + // .TBCLR = 0; reset timer B + // .TBIE = 1; enable timer B interrupts + TBCTL = TBSSEL0 | TBIE; + } + + default event void Msp430ClockInit.setupDcoCalibrate() { + call Msp430ClockInit.defaultSetupDcoCalibrate(); + } + + default event void Msp430ClockInit.initClocks() { + call Msp430ClockInit.defaultInitClocks(); + } + + default event void Msp430ClockInit.initTimerA() { + call Msp430ClockInit.defaultInitTimerA(); + } + + default event void Msp430ClockInit.initTimerB() { + call Msp430ClockInit.defaultInitTimerB(); + } + + + void startTimerA() { + // TACTL.MC = 2; continuous mode + TACTL = MC1 | (TACTL & ~(MC1|MC0)); + } + + void stopTimerA() { + //TACTL.MC = 0; stop timer B + TACTL = TACTL & ~(MC1|MC0); + } + + void startTimerB() { + // TBCTL.MC = 2; continuous mode + TBCTL = MC1 | (TBCTL & ~(MC1|MC0)); + } + + void stopTimerB() { + //TBCTL.MC = 0; stop timer B + TBCTL = TBCTL & ~(MC1|MC0); + } + + void set_dco_calib( int calib ) { + BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07); + DCOCTL = calib & 0xff; + } + + uint16_t test_calib_busywait_delta( int calib ) { + int8_t aclk_count = 2; + uint16_t dco_prev = 0; + uint16_t dco_curr = 0; + + set_dco_calib( calib ); + + while( aclk_count-- > 0 ) { + TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt + TBCCTL0 &= ~CCIFG; // clear pending interrupt + while( (TBCCTL0 & CCIFG) == 0 ); // busy wait + dco_prev = dco_curr; + dco_curr = TAR; + } + + return dco_curr - dco_prev; + } + + // busyCalibrateDCO + // Should take about 9ms if ACLK_CALIB_PERIOD=8. + // DCOCTL and BCSCTL1 are calibrated when done. + + void busyCalibrateDco() { + // --- variables --- + int calib; + int step; + + // --- calibrate --- + + // Binary search for RSEL,DCO,DCOMOD. + // It's okay that RSEL isn't monotonic. + + for( calib=0,step=0x800; step!=0; step>>=1 ) { + // if the step is not past the target, commit it + if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA ) + calib |= step; + } + + // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0 + if( (calib & 0x0e0) == 0x0e0 ) + calib &= ~0x01f; + + set_dco_calib( calib ); + } + + command error_t Init.init() { + // Reset timers and clear interrupt vectors + //Set_DCO(DELTA_8MHZ); + + TACTL = TACLR; + TAIV = 0; + TBCTL = TBCLR; + TBIV = 0; + + atomic { + +// signal Msp430ClockInit.setupDcoCalibrate(); +// busyCalibrateDco(); + + signal Msp430ClockInit.initClocks(); + signal Msp430ClockInit.initTimerA(); + signal Msp430ClockInit.initTimerB(); + startTimerA(); + startTimerB(); + } + return SUCCESS; + } +} diff --git a/tos/platforms/z1/chips/msp430/timer/Msp430TimerCapComP.nc b/tos/platforms/z1/chips/msp430/timer/Msp430TimerCapComP.nc new file mode 100644 index 0000000000..705b2bc6c4 --- /dev/null +++ b/tos/platforms/z1/chips/msp430/timer/Msp430TimerCapComP.nc @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Cory Sharp + */ + +#include "Msp430Timer.h" + +generic module Msp430TimerCapComP( + uint16_t TxCCTLx_addr, + uint16_t TxCCRx_addr + ) @safe() +{ + provides interface Msp430TimerControl as Control; + provides interface Msp430Compare as Compare; + provides interface Msp430Capture as Capture; + uses interface Msp430Timer as Timer; + uses interface Msp430TimerEvent as Event; +} +implementation +{ + #define TxCCTLx (*TCAST(volatile TYPE_TACCTL0* ONE, TxCCTLx_addr)) + #define TxCCRx (*TCAST(volatile TYPE_TACCR0* ONE, TxCCRx_addr)) + + typedef msp430_compare_control_t cc_t; + + DEFINE_UNION_CAST(CC2int,uint16_t,cc_t) + DEFINE_UNION_CAST(int2CC,cc_t,uint16_t) + + uint16_t compareControl() + { + cc_t x = { + cm : 1, // capture on rising edge + ccis : 0, // capture/compare input select + clld : 0, // TBCL1 loads on write to TBCCR1 + cap : 0, // compare mode + ccie : 0, // capture compare interrupt enable + }; + return CC2int(x); + } + + uint16_t captureControl(uint8_t l_cm) + { + cc_t x = { + cm : l_cm & 0x03, // capture on none, rising, falling or both edges + ccis : 0, // capture/compare input select + clld : 0, // TBCL1 loads on write to TBCCR1 + cap : 1, // compare mode + + + /* The trunk has the following. Does it impact Zolertia? */ +// scs : 0, // non synchronous capture mode + scs : 1, // synchronous capture mode + ccie : 0, // capture compare interrupt enable + }; + return CC2int(x); + } + + async command cc_t Control.getControl() + { + return int2CC(TxCCTLx); + } + + async command bool Control.isInterruptPending() + { + return TxCCTLx & CCIFG; + } + + async command void Control.clearPendingInterrupt() + { + CLR_FLAG(TxCCTLx,CCIFG); + } + + async command void Control.setControl( cc_t x ) + { + TxCCTLx = CC2int(x); + } + + async command void Control.setControlAsCompare() + { + TxCCTLx = compareControl(); + } + + async command void Control.setControlAsCapture( uint8_t cm ) + { + TxCCTLx = captureControl( cm ); + } + + async command void Capture.setEdge(uint8_t cm) + { + cc_t t = call Control.getControl(); + t.cm = cm & 0x03; + TxCCTLx = CC2int(t); + } + + async command void Capture.setSynchronous( bool sync ) + { + if( sync ) + SET_FLAG( TxCCTLx, SCS ); + else + CLR_FLAG( TxCCTLx, SCS ); + } + + async command void Control.enableEvents() + { + SET_FLAG( TxCCTLx, CCIE ); + } + + async command void Control.disableEvents() + { + CLR_FLAG( TxCCTLx, CCIE ); + } + + async command bool Control.areEventsEnabled() + { + return READ_FLAG( TxCCTLx, CCIE ); + } + + async command uint16_t Compare.getEvent() + { + return TxCCRx; + } + + async command uint16_t Capture.getEvent() + { + return TxCCRx; + } + + async command void Compare.setEvent( uint16_t x ) + { + TxCCRx = x; + } + + async command void Compare.setEventFromPrev( uint16_t x ) + { + TxCCRx += x; + } + + async command void Compare.setEventFromNow( uint16_t x ) + { + TxCCRx = call Timer.get() + x; + } + + async command bool Capture.isOverflowPending() + { + return READ_FLAG( TxCCTLx, COV ); + } + + async command void Capture.clearOverflow() + { + CLR_FLAG( TxCCTLx, COV ); + } + + async event void Event.fired() + { + if( (call Control.getControl()).cap ) + signal Capture.captured( call Capture.getEvent() ); + else + signal Compare.fired(); + } + + default async event void Capture.captured( uint16_t n ) + { + } + + default async event void Compare.fired() + { + } + + async event void Timer.overflow() + { + } +} + diff --git a/tos/platforms/z1/chips/msp430/timer/Msp430XDcoCalib.h b/tos/platforms/z1/chips/msp430/timer/Msp430XDcoCalib.h new file mode 100755 index 0000000000..7e76d6366d --- /dev/null +++ b/tos/platforms/z1/chips/msp430/timer/Msp430XDcoCalib.h @@ -0,0 +1,139 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This code is extracted from code examples at TI website. + * + * @author: Xavier Orduña (xorduna@dexmatech.com) + */ + +#ifndef __MSP430X_DCO_CALIB_H__ +#define __MSP430X_DCO_CALIB_H__ + +#define DELTA_1MHZ 244 +#define DELTA_8MHZ 1953 +#define DELTA_12MHZ 2930 +#define DELTA_16MHZ 3906 + + +unsigned char CAL_DATA[8]; +//volatile unsigned int k; +int dcoj; + +char *Flash_ptrA; +void Set_DCO(unsigned int Delta); + +void dco_flash() { + //WDTCTL = WDTPW + WDTHOLD; + for (dcoj = 0; dcoj < 0xfffe; dcoj++); + P5OUT=0x00; + + P5DIR=0x21; + //P5DIR=0x20; + P5OUT=0x01; + + P2SEL |= 0x02; + P2DIR |= 0x02; + + dcoj = 0; + Set_DCO(DELTA_16MHZ); // Set DCO and obtain constants + CAL_DATA[dcoj++] = DCOCTL; + CAL_DATA[dcoj++] = BCSCTL1; + + Set_DCO(DELTA_12MHZ); // Set DCO and obtain constants + CAL_DATA[dcoj++] = DCOCTL; + CAL_DATA[dcoj++] = BCSCTL1; + + Set_DCO(DELTA_8MHZ); // Set DCO and obtain constants + CAL_DATA[dcoj++] = DCOCTL; + CAL_DATA[dcoj++] = BCSCTL1; + + Set_DCO(DELTA_1MHZ); // Set DCO and obtain constants + CAL_DATA[dcoj++] = DCOCTL; + CAL_DATA[dcoj++] = BCSCTL1; + + Flash_ptrA = (char *)0x10C0; // Point to beginning of seg A + FCTL2 = FWKEY + FSSEL0 + FN1; // MCLK/3 for Flash Timing Generator + FCTL1 = FWKEY + ERASE; // Set Erase bit + FCTL3 = FWKEY + LOCKA; // Clear LOCK & LOCKA bits + + *Flash_ptrA = 0x00; // Dummy write to erase Flash seg A + FCTL1 = FWKEY + WRT; // Set WRT bit for write operation + Flash_ptrA = (char *)0x10F8; // Point to beginning of cal consts + + for (dcoj = 0; dcoj < 8; dcoj++) + *Flash_ptrA++ = CAL_DATA[dcoj]; // re-flash DCO calibration data + + FCTL1 = FWKEY; // Clear WRT bit + FCTL3 = FWKEY + LOCKA + LOCK; // Set LOCK & LOCKA bit + + P5OUT ^= 0x20; // Toggle LED + //P5OUT ^= 0x20; // Toggle LED +} + + +void Set_DCO(unsigned int Delta) { // Set DCO to selected frequency + unsigned int Compare, Oldcapture = 0; + + BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8 + TACCTL2 = CM_1 + CCIS_1 + CAP; // CAP, ACLK + TACTL = TASSEL_2 + MC_2 + TACLR; // SMCLK, cont-mode, clear + + while (1) { + while (!(CCIFG & TACCTL2)); // Wait until capture occured + TACCTL2 &= ~CCIFG; // Capture occured, clear flag + Compare = TACCR2; // Get current captured SMCLK + Compare = Compare - Oldcapture; // SMCLK difference + Oldcapture = TACCR2; // Save current captured SMCLK + + if (Delta == Compare) + break; // If equal, leave "while(1)" + else if (Delta < Compare) { + DCOCTL--; // DCO is too fast, slow it down + if (DCOCTL == 0xFF) // Did DCO roll under? + if (BCSCTL1 & 0x0f) + BCSCTL1--; // Select lower RSEL + } else { + DCOCTL++; // DCO is too slow, speed it up + if (DCOCTL == 0x00) // Did DCO roll over? + if ((BCSCTL1 & 0x0f) != 0x0f) + BCSCTL1++; // Sel higher RSEL + } + } + TACCTL2 = 0; // Stop TACCR2 + TACTL = 0; // Stop Timer_A + BCSCTL1 &= ~DIVA_3; // ACLK = LFXT1CLK +} + +#endif // __MSP430X_DCO_CALIB_H__ diff --git a/tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc b/tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc similarity index 100% rename from tos/platforms/z1/chips/msp430X/usci/Msp430I2C1P.nc rename to tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc diff --git a/tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc b/tos/platforms/z1/chips/msp430/usci/Msp430SpiNoDmaB0P.nc similarity index 100% rename from tos/platforms/z1/chips/msp430X/usci/Msp430SpiNoDmaB0P.nc rename to tos/platforms/z1/chips/msp430/usci/Msp430SpiNoDmaB0P.nc diff --git a/tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc b/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc similarity index 100% rename from tos/platforms/z1/chips/msp430X/usci/Z1SerialP.nc rename to tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc diff --git a/tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc b/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc similarity index 100% rename from tos/platforms/z1/chips/msp430X/usci/Z1UsciP.nc rename to tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc diff --git a/tos/platforms/z1/chips/msp430X/usci/printfZ1.h b/tos/platforms/z1/chips/msp430/usci/printfZ1.h similarity index 100% rename from tos/platforms/z1/chips/msp430X/usci/printfZ1.h rename to tos/platforms/z1/chips/msp430/usci/printfZ1.h From 10aef12b9bbb46c1fd39f8e182b28cdd297f083e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 9 Mar 2011 17:03:19 -0800 Subject: [PATCH 010/411] update branches in Repo_Notes --- 00_Repo_Notes | 62 +++++++++++++++++++++++++++------------------------ 1 file changed, 33 insertions(+), 29 deletions(-) diff --git a/00_Repo_Notes b/00_Repo_Notes index 6206611ead..bd6e4ae03b 100644 --- a/00_Repo_Notes +++ b/00_Repo_Notes @@ -10,7 +10,7 @@ also been done for simple function (ie. does it compile). * Repo Structure -The msp430.git repo is located at: +The msp430.git repo is located at: git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git (r/w) git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git (read-only) @@ -27,20 +27,25 @@ svn t2 mainline ---| | v (git) ------------------ hinrg t2 ----------------------- - - master - | - | - - master_vhsb - | - | - ------ mm-z1 - | - | - --- mm-z1-next - | - | - --- mm-z1-pu + | | | + | | | + master --------------------------------- + | | | + | | | + - master_vhsb ----------------------- + | | | + | | | + ------ mm-z1 ------------------------------------ + | | | | | + | | | | | + --- z1-pu --- | --- x5-pu --- + | | + | | + --- mm-pu ------ + + + +* Branches: master: is the main branch coming from the svn t2 mainline. Updated manually. @@ -51,31 +56,27 @@ master-vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main the trees and there isn't much sense in reinventing the wheel. mm-z1: main consolidation branch for the mm-z1 integration. It represents the - current released version of the branch. + current released version of the branch. Later will be renamed to mm-z1. -mm-z1-next: As changes get accepted they get brought back into -next. When - all is good, next gets integrated into mm-z1. +z1-pu: working directory for Zolertia modifications. From verification of mm-z1 + combined tree. -mm-z1-pu: proposed updates. After new code has been worked on for a bit and - is ready to be integrated with other code in the mm-z1 area, mm-z1-pu - is the place to put it. Some code from pu will go into next. When - enough stuff is ready to go in next, it is brought over to main - (mm-z1). +mm-pu: mammark (mm4) proposed updates. Updated from the mm_core tree that should + be integrated into the msp430 integration branch. -x5: integrate x5xxx family into result of mm-z1. Includes all three major -x5-next families, x1, x2, and x5. Uses seperate dirs for major differences. -x5-pu +x5-pu: integrate x5xxx family into result of mm-z1. Built on mm-z1 so will include + all three major families (x1, x2, and x5). Major cpu dependancies held in + tos/chips/msp430/{x1xxx,x2xxx,x5xxx} -To pull a working branch based on the mm-z1-pu branch (a reasonable place to -fork a working branch), do the following: +To pull a working branch do the following: cd ~/mm # make sure at top level, we call it mm git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git # grab from ro place cd msp430 git config --add push.default matching # make sure only existing branches get pushed. # only effects rw repos - git checkout -t origin/mm-z1-pu # start with proposed updates, tracking branch + git checkout -t origin/z1-pu # tracking branch, will be on z1-pu when done git checkout -b work # local working branch @@ -84,3 +85,6 @@ To start with a read-write copy of the repo replace the clone with: git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git # grab from ro place You need to have a login on hinrg and belong to group cire-git. + +The other way to get your changes into the repo is to send a pointer to your git repo to +me (cire831@gmail.com) and I'll pull the changes and then push them up to hinrg. From 4a528d36dad9306023e0c3b765012e35b134728c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Mar 2011 03:13:50 -0800 Subject: [PATCH 011/411] clean up --- tos/chips/msp430/adc12/Msp430Adc12ImplP.nc | 2 +- tos/chips/msp430/x2xxx/McuSleepC.nc | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc index fdf0c474f3..630f9bb728 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc @@ -46,7 +46,7 @@ module Msp430Adc12ImplP @safe() uses { interface ArbiterInfo as ADCArbiterInfo; interface HplAdc12; - interface Msp430Timer as TimerA;; + interface Msp430Timer as TimerA; interface Msp430TimerControl as ControlA0; interface Msp430TimerControl as ControlA1; interface Msp430Compare as CompareA0; diff --git a/tos/chips/msp430/x2xxx/McuSleepC.nc b/tos/chips/msp430/x2xxx/McuSleepC.nc index 4e2d4c2d91..1e1265a3ba 100644 --- a/tos/chips/msp430/x2xxx/McuSleepC.nc +++ b/tos/chips/msp430/x2xxx/McuSleepC.nc @@ -45,9 +45,6 @@ * @date October 26, 2005 * @see Please refer to TEP 112 for more information about this component and its * intended use. - * - * Added modifications to support msp430X architecture and DXNRG - * @author Xavier Orduna */ module McuSleepC @safe() { From 7c64886fb7e083ca9f48c2e92537be6f999d9f0f Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Mar 2011 03:15:12 -0800 Subject: [PATCH 012/411] update Merge_Notes and To_Do --- 01_Merge_Notes | 3 +++ 02_To_Do | 16 ++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/01_Merge_Notes b/01_Merge_Notes index 125fa4fcb1..520a575d41 100644 --- a/01_Merge_Notes +++ b/01_Merge_Notes @@ -45,3 +45,6 @@ but the msp430 branch brought those things back in. See the following commit f For the time being, if this causes problems for Z1 then need to have per cpu family msp430hardware.h files. Or do it with an #ifdef (PLATFORM_Z1) + +* TinyOS timing is based on powers of 2. The Z1 used the calibration constants provided by TI but + these constants give timing that are base 10. This has been changed in the merge. diff --git a/02_To_Do b/02_To_Do index 2f525e9e8d..49bc3e04fc 100644 --- a/02_To_Do +++ b/02_To_Do @@ -13,3 +13,19 @@ * CC2420 modules use LocalIeeeEui64C to obtain an ipv6 link-local address. Z1 needs to provide. + +* Currently config structs get put into ram via the data copy into ram mechanism. This + means that it takes up room in RAM and ROM. Suboptimal. + +* Original mm_core port removed McuPowerOverride. Why? + +* usart/msp430usart.h usci/msp430usci.h: define baud rates and configurations and h/w config + values are defined. Originally for the msp430f1611. How should this stuff get dealt with + for other chips and platforms. Clocks and configuration values possible are quite variable + with new chips. This should probably be a platform dependency. + + This should be changed to get rid of the bit struct and replaced with something that uses + the stuff from the TI HEADERS. + + Are the bit fields really used or can we nuke them. Configuration uses a configuration struct + and functional stuff is code that uses the definitions in the TI HEADERS and other cpu headers. From cef31e8924c504265b9be30f03e5e3e838c42152 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Mar 2011 03:16:47 -0800 Subject: [PATCH 013/411] Pin Interrupt: clean up and document interrupt structure document why only handle one interrupt then return. Let higher priority interrupts in. --- tos/chips/msp430/pins/HplMsp430InterruptP.nc | 68 ++++++++++++++------ 1 file changed, 50 insertions(+), 18 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430InterruptP.nc b/tos/chips/msp430/pins/HplMsp430InterruptP.nc index 49ed11b18a..6962fa34f0 100644 --- a/tos/chips/msp430/pins/HplMsp430InterruptP.nc +++ b/tos/chips/msp430/pins/HplMsp430InterruptP.nc @@ -1,5 +1,6 @@ - -/* Copyright (c) 2000-2005 The Regents of the University of California. +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -8,10 +9,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -28,13 +31,13 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Joe Polastre + * @author Eric B. Decker */ -module HplMsp430InterruptP @safe() -{ + +module HplMsp430InterruptP @safe() { + #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) provides interface HplMsp430Interrupt as Port10; provides interface HplMsp430Interrupt as Port11; @@ -55,15 +58,22 @@ module HplMsp430InterruptP @safe() provides interface HplMsp430Interrupt as Port26; provides interface HplMsp430Interrupt as Port27; #endif - } -implementation -{ + +implementation { #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) - TOSH_SIGNAL(PORT1_VECTOR) - { - volatile int n = P1IFG & P1IE; + TOSH_SIGNAL(PORT1_VECTOR) { + volatile uint8_t n = P1IFG & P1IE; /* why volatile? */ + + /* + * check one bit and return. This allows other higher priority + * interrupts that might have occurred after acceptance of the + * first pin interrupt. + * + * This costs repeated interrupt overhead. Getting to the interrupt + * routine and the RETI overhead. + */ if (n & (1 << 0)) { signal Port10.fired(); return; } if (n & (1 << 1)) { signal Port11.fired(); return; } @@ -83,6 +93,7 @@ implementation default async event void Port15.fired() { call Port15.clear(); } default async event void Port16.fired() { call Port16.clear(); } default async event void Port17.fired() { call Port17.clear(); } + async command void Port10.enable() { P1IE |= (1 << 0); } async command void Port11.enable() { P1IE |= (1 << 1); } async command void Port12.enable() { P1IE |= (1 << 2); } @@ -91,6 +102,7 @@ implementation async command void Port15.enable() { P1IE |= (1 << 5); } async command void Port16.enable() { P1IE |= (1 << 6); } async command void Port17.enable() { P1IE |= (1 << 7); } + async command void Port10.disable() { P1IE &= ~(1 << 0); } async command void Port11.disable() { P1IE &= ~(1 << 1); } async command void Port12.disable() { P1IE &= ~(1 << 2); } @@ -99,6 +111,7 @@ implementation async command void Port15.disable() { P1IE &= ~(1 << 5); } async command void Port16.disable() { P1IE &= ~(1 << 6); } async command void Port17.disable() { P1IE &= ~(1 << 7); } + async command void Port10.clear() { P1IFG &= ~(1 << 0); } async command void Port11.clear() { P1IFG &= ~(1 << 1); } async command void Port12.clear() { P1IFG &= ~(1 << 2); } @@ -107,6 +120,7 @@ implementation async command void Port15.clear() { P1IFG &= ~(1 << 5); } async command void Port16.clear() { P1IFG &= ~(1 << 6); } async command void Port17.clear() { P1IFG &= ~(1 << 7); } + async command bool Port10.getValue() { bool b; atomic b=(P1IN >> 0) & 1; return b; } async command bool Port11.getValue() { bool b; atomic b=(P1IN >> 1) & 1; return b; } async command bool Port12.getValue() { bool b; atomic b=(P1IN >> 2) & 1; return b; } @@ -115,48 +129,56 @@ implementation async command bool Port15.getValue() { bool b; atomic b=(P1IN >> 5) & 1; return b; } async command bool Port16.getValue() { bool b; atomic b=(P1IN >> 6) & 1; return b; } async command bool Port17.getValue() { bool b; atomic b=(P1IN >> 7) & 1; return b; } + async command void Port10.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 0); else P1IES |= (1 << 0); } } + async command void Port11.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 1); else P1IES |= (1 << 1); } } + async command void Port12.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 2); else P1IES |= (1 << 2); } } + async command void Port13.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 3); else P1IES |= (1 << 3); } } + async command void Port14.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 4); else P1IES |= (1 << 4); } } + async command void Port15.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 5); else P1IES |= (1 << 5); } } + async command void Port16.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 6); else P1IES |= (1 << 6); } } + async command void Port17.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 7); @@ -166,9 +188,8 @@ implementation #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) - TOSH_SIGNAL(PORT2_VECTOR) - { - volatile int n = P2IFG & P2IE; + TOSH_SIGNAL(PORT2_VECTOR) { + volatile uint8_t n = P2IFG & P2IE; /* why volatile? */ if (n & (1 << 0)) { signal Port20.fired(); return; } if (n & (1 << 1)) { signal Port21.fired(); return; } @@ -179,6 +200,7 @@ implementation if (n & (1 << 6)) { signal Port26.fired(); return; } if (n & (1 << 7)) { signal Port27.fired(); return; } } + default async event void Port20.fired() { call Port20.clear(); } default async event void Port21.fired() { call Port21.clear(); } default async event void Port22.fired() { call Port22.clear(); } @@ -187,6 +209,7 @@ implementation default async event void Port25.fired() { call Port25.clear(); } default async event void Port26.fired() { call Port26.clear(); } default async event void Port27.fired() { call Port27.clear(); } + async command void Port20.enable() { P2IE |= (1 << 0); } async command void Port21.enable() { P2IE |= (1 << 1); } async command void Port22.enable() { P2IE |= (1 << 2); } @@ -195,6 +218,7 @@ implementation async command void Port25.enable() { P2IE |= (1 << 5); } async command void Port26.enable() { P2IE |= (1 << 6); } async command void Port27.enable() { P2IE |= (1 << 7); } + async command void Port20.disable() { P2IE &= ~(1 << 0); } async command void Port21.disable() { P2IE &= ~(1 << 1); } async command void Port22.disable() { P2IE &= ~(1 << 2); } @@ -203,6 +227,7 @@ implementation async command void Port25.disable() { P2IE &= ~(1 << 5); } async command void Port26.disable() { P2IE &= ~(1 << 6); } async command void Port27.disable() { P2IE &= ~(1 << 7); } + async command void Port20.clear() { P2IFG &= ~(1 << 0); } async command void Port21.clear() { P2IFG &= ~(1 << 1); } async command void Port22.clear() { P2IFG &= ~(1 << 2); } @@ -211,6 +236,7 @@ implementation async command void Port25.clear() { P2IFG &= ~(1 << 5); } async command void Port26.clear() { P2IFG &= ~(1 << 6); } async command void Port27.clear() { P2IFG &= ~(1 << 7); } + async command bool Port20.getValue() { bool b; atomic b=(P2IN >> 0) & 1; return b; } async command bool Port21.getValue() { bool b; atomic b=(P2IN >> 1) & 1; return b; } async command bool Port22.getValue() { bool b; atomic b=(P2IN >> 2) & 1; return b; } @@ -219,48 +245,56 @@ implementation async command bool Port25.getValue() { bool b; atomic b=(P2IN >> 5) & 1; return b; } async command bool Port26.getValue() { bool b; atomic b=(P2IN >> 6) & 1; return b; } async command bool Port27.getValue() { bool b; atomic b=(P2IN >> 7) & 1; return b; } + async command void Port20.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 0); else P2IES |= (1 << 0); } } + async command void Port21.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 1); else P2IES |= (1 << 1); } } + async command void Port22.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 2); else P2IES |= (1 << 2); } } + async command void Port23.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 3); else P2IES |= (1 << 3); } } + async command void Port24.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 4); else P2IES |= (1 << 4); } } + async command void Port25.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 5); else P2IES |= (1 << 5); } } + async command void Port26.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 6); else P2IES |= (1 << 6); } } + async command void Port27.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 7); @@ -268,6 +302,4 @@ implementation } } #endif - - } From bf4e2016a2de1cc06dbc2e4a71b26a6f0f7d77a4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Mar 2011 03:20:31 -0800 Subject: [PATCH 014/411] clean up, add 4MHZ baud rates. --- tos/chips/msp430/usart/msp430usart.h | 173 ++++++++++++++------------- 1 file changed, 88 insertions(+), 85 deletions(-) diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h index 08d543b3d9..40089ebd6a 100644 --- a/tos/chips/msp430/usart/msp430usart.h +++ b/tos/chips/msp430/usart/msp430usart.h @@ -27,10 +27,10 @@ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - -/** +/* * @author Vlado Handziski * @author Philipp Huppertz + * @author Eric B. Decker */ #ifndef _H_Msp430Usart_h @@ -45,8 +45,7 @@ #define MSP430_SPI1_BUS "Msp430Spi1.Resource" #define MSP430_UART1_BUS "Msp430Uart1.Resource" -typedef enum -{ +typedef enum { USART_NONE = 0, USART_UART = 1, USART_UART_TX = 2, @@ -98,22 +97,23 @@ DEFINE_UNION_CAST(int2urctl,msp430_urctl_t,uint8_t) typedef struct { unsigned int ubr: 16; //Clock division factor (>=0x0002) - + + /* uctl */ unsigned int :1; unsigned int mm: 1; //Master mode (0=slave; 1=master) unsigned int :1; unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver) unsigned int clen: 1; //Character length (0=7-bit data; 1=8-bit data) unsigned int: 3; - + + /* utctl */ unsigned int:1; unsigned int stc: 1; //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled) unsigned int:2; unsigned int ssel: 2; //Clock source (00=external UCLK [slave]; 01=ACLK [master]; 10=SMCLK [master] 11=SMCLK [master]); unsigned int ckpl: 1; //Clock polarity (0=inactive is low && data at rising edge; 1=inverted) unsigned int ckph: 1; //Clock phase (0=normal; 1=half-cycle delayed) - unsigned int :0; -} msp430_spi_config_t; +} __attribute__ ((packed)) msp430_spi_config_t; typedef struct { uint16_t ubr; @@ -126,29 +126,32 @@ typedef union { msp430_spi_registers_t spiRegisters; } msp430_spi_union_config_t; -msp430_spi_union_config_t msp430_spi_default_config = { - { - ubr : 0x0002, - ssel : 0x02, - clen : 1, - listen : 0, - mm : 1, - ckph : 1, - ckpl : 0, - stc : 1 - } -}; - - - -/** - The calculations were performed using the msp-uart.pl script: - msp-uart.pl -- calculates the uart registers for MSP430 - - Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org - **/ +/* + * default spi config. + * /2, SMCLK, master, 3pin + */ +msp430_spi_union_config_t msp430_spi_default_config = { { + ubr : 2, + ssel : 2, + clen : 1, + listen : 0, + mm : 1, + ckph : 1, + ckpl : 0, + stc : 1 + } }; + + +/* + * The calculations were performed using the msp-uart.pl script: + * msp-uart.pl -- calculates the uart registers for MSP430 + * + * Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org + * + * Format is UBR__. + */ typedef enum { - //32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz + //32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz, 4MHZ = 4,194,304 UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x94, UBR_32KHZ_1800=0x0012, UMCTL_32KHZ_1800=0x84, UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x6D, @@ -166,13 +169,19 @@ typedef enum { UBR_1MHZ_76800=0x000D, UMCTL_1MHZ_76800=0x6D, UBR_1MHZ_115200=0x0009, UMCTL_1MHZ_115200=0x10, UBR_1MHZ_230400=0x0004, UMCTL_1MHZ_230400=0x55, + + // from http://www.daycounter.com/Calculators/MSP430-Uart-Calculator.phtml + UBR_4MHZ_4800=0x0369, UMCTL_4MHZ_4800=0xfb, + UBR_4MHZ_9600=0x01b4, UMCTL_4MHZ_9600=0xdf, + UBR_4MHZ_57600=0x0048, UMCTL_4MHZ_57600=0xfb, + UBR_4MHZ_115200=0x0024, UMCTL_4MHZ_115200=0x4a, } msp430_uart_rate_t; typedef struct { unsigned int ubr:16; //Baud rate (use enum msp430_uart_rate_t for predefined rates) - unsigned int umctl: 8; //Modulation (use enum msp430_uart_rate_t for predefined rates) - + + /* uctl */ unsigned int :1; unsigned int mm: 1; //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol) unsigned int :1; @@ -181,23 +190,24 @@ typedef struct { unsigned int spb: 1; //Stop bits (0=one stop bit; 1=two stop bits) unsigned int pev: 1; //Parity select (0=odd; 1=even) unsigned int pena: 1; //Parity enable (0=disabled; 1=enabled) - unsigned int :0; - + + /* utctl */ unsigned int :3; unsigned int urxse: 1; //Receive start-edge detection (0=disabled; 1=enabled) unsigned int ssel: 2; //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK) unsigned int ckpl: 1; //Clock polarity (0=normal; 1=inverted) unsigned int :1; - + + /* urctl */ unsigned int :2; unsigned int urxwie: 1; //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx) unsigned int urxeie: 1; //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set) unsigned int :4; - unsigned int :0; - + + /* ume */ unsigned int utxe:1; // 1:enable tx module unsigned int urxe:1; // 1:enable rx module -} msp430_uart_config_t; +} __attribute__ ((packed)) msp430_uart_config_t; typedef struct { uint16_t ubr; @@ -212,38 +222,32 @@ typedef union { msp430_uart_config_t uartConfig; msp430_uart_registers_t uartRegisters; } msp430_uart_union_config_t; - -msp430_uart_union_config_t msp430_uart_default_config = { - { - utxe : 1, - urxe : 1, - ubr : UBR_1MHZ_57600, - umctl : UMCTL_1MHZ_57600, - ssel : 0x02, - pena : 0, - pev : 0, - spb : 0, - clen : 1, - listen : 0, - mm : 0, - ckpl : 0, - urxse : 0, - urxeie : 1, - urxwie : 0, - utxe : 1, - urxe : 1 - } -}; - +msp430_uart_union_config_t msp430_uart_default_config = { { + ubr : UBR_1MHZ_57600, + umctl : UMCTL_1MHZ_57600, + ssel : 2, + pena : 0, + pev : 0, + spb : 0, + clen : 1, + listen : 0, + mm : 0, + ckpl : 0, + urxse : 0, + urxeie : 1, + urxwie : 0, + utxe : 1, + urxe : 1 + } }; typedef struct { - unsigned int i2cstt: 1; // I2CSTT Bit 0 START bit. (0=No action; 1=Send START condition) - unsigned int i2cstp: 1; // I2CSTP Bit 1 STOP bit. (0=No action; 1=Send STOP condition) - unsigned int i2cstb: 1; // I2CSTB Bit 2 Start byte. (0=No action; 1=Send START condition and start byte (01h)) + unsigned int i2cstt: 1; // I2CSTT Bit 0 START bit. (0=No action; 1=Send START condition) + unsigned int i2cstp: 1; // I2CSTP Bit 1 STOP bit. (0=No action; 1=Send STOP condition) + unsigned int i2cstb: 1; // I2CSTB Bit 2 Start byte. (0=No action; 1=Send START condition and start byte (01h)) unsigned int i2cctrx: 1; //I2CTRX Bit 3 I2C transmit. (0=Receive mode; 1=Transmit mode) pin. unsigned int i2cssel: 2; // I2C clock source select. (00=No clock; 01=ACLK; 10=SMCLK; 11=SMCLK) - unsigned int i2ccrm: 1; // I2C repeat mode + unsigned int i2ccrm: 1; // I2C repeat mode unsigned int i2cword: 1; // I2C word mode. Selects byte(=0) or word(=1) mode for the I2C data register. } __attribute__ ((packed)) msp430_i2ctctl_t; @@ -251,6 +255,7 @@ DEFINE_UNION_CAST(i2ctctl2int,uint8_t,msp430_i2ctctl_t) DEFINE_UNION_CAST(int2i2ctctl,msp430_i2ctctl_t,uint8_t) typedef struct { + /* uctl */ unsigned int :1; unsigned int mst: 1; //Master mode (0=slave; 1=master) unsigned int :1; @@ -259,22 +264,22 @@ typedef struct { unsigned int :1; unsigned int txdmaen: 1; //DMA to TX (0=disabled; 1=enabled) unsigned int rxdmaen: 1; //RX to DMA (0=disabled; 1=enabled) - + + /* i2ctctl */ unsigned int :4; unsigned int i2cssel: 2; //Clock source (00=disabled; 01=ACLK; 10=SMCLK; 11=SMCLK) unsigned int i2crm: 1; //Repeat mode (0=use I2CNDAT; 1=count in software) unsigned int i2cword: 1; //Word mode (0=byte mode; 1=word mode) - + unsigned int i2cpsc: 8; //Clock prescaler (values >0x04 not recomended) - unsigned int i2csclh: 8; //High period (high period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc) - unsigned int i2cscll: 8; //Low period (low period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc) - + + /* i2coa, 16 bits */ unsigned int i2coa : 10; // Own address register. unsigned int :6; -} msp430_i2c_config_t; - +} __attribute__ ((packed)) msp430_i2c_config_t; + typedef struct { uint8_t uctl; uint8_t i2ctctl; @@ -289,22 +294,20 @@ typedef union { msp430_i2c_registers_t i2cRegisters; } msp430_i2c_union_config_t; -msp430_i2c_union_config_t msp430_i2c_default_config = { - { - rxdmaen : 0, - txdmaen : 0, - xa : 0, - listen : 0, +msp430_i2c_union_config_t msp430_i2c_default_config = { { + rxdmaen : 0, + txdmaen : 0, + xa : 0, + listen : 0, mst : 1, - i2cword : 0, - i2crm : 1, - i2cssel : 0x2, - i2cpsc : 0, - i2csclh : 0x3, + i2cword : 0, + i2crm : 1, + i2cssel : 0x2, + i2cpsc : 0, + i2csclh : 0x3, i2cscll : 0x3, i2coa : 0, - } -}; + } }; typedef uint8_t uart_speed_t; typedef uint8_t uart_parity_t; From 3381470e17b93541c8d3ab53114b5248b7a49786 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Mar 2011 03:21:43 -0800 Subject: [PATCH 015/411] add gdb command files for x1, x2, and x5 processors --- tos/chips/msp430/00_gdb/gdb1xxx | 85 +++++++++++++++++ tos/chips/msp430/00_gdb/gdb2xxx | 121 ++++++++++++++++++++++++ tos/chips/msp430/00_gdb/gdb5xxx | 159 ++++++++++++++++++++++++++++++++ tos/chips/msp430/00_gdb/gdbinit | 56 +++++++++++ 4 files changed, 421 insertions(+) create mode 100644 tos/chips/msp430/00_gdb/gdb1xxx create mode 100644 tos/chips/msp430/00_gdb/gdb2xxx create mode 100644 tos/chips/msp430/00_gdb/gdb5xxx create mode 100644 tos/chips/msp430/00_gdb/gdbinit diff --git a/tos/chips/msp430/00_gdb/gdb1xxx b/tos/chips/msp430/00_gdb/gdb1xxx new file mode 100644 index 0000000000..4eca6104dc --- /dev/null +++ b/tos/chips/msp430/00_gdb/gdb1xxx @@ -0,0 +1,85 @@ + +# +# Define various gdb user commands that let you look at pieces of the CPU. +# +# supports: msp430f1611 +# +# author: Eric B. Decker +# + +#display timers +define dt +printf "TA: tar: %04x ccr0: %04x 1: %04x 2: %04x\n",\ + *((uint16_t *)170),*((uint16_t *)172),*((uint16_t *)174),*((uint16_t *)176) +printf " ctl: %04x cctl0: %04x 1: %04x 2: %04x\n\n",\ + *((uint16_t *)160),*((uint16_t *)162),*((uint16_t *)164),*((uint16_t *)166) + +printf "TB: tbr: %04x ccr0: %04x 1: %04x 2: %04x ",\ + *((uint16_t *)190),*((uint16_t *)192),*((uint16_t *)194),*((uint16_t *)196) +printf "3: %04x 4: %04x 5: %04x 6: %04x\n",\ + *((uint16_t *)198),*((uint16_t *)19a),*((uint16_t *)19c),*((uint16_t *)19e) + +printf " ctl: %04x cctl0: %04x 1: %04x 2: %04x ",\ + *((uint16_t *)180),*((uint16_t *)182),*((uint16_t *)184),*((uint16_t *)186) +printf "3: %04x 4: %04x 5: %04x 6: %04x\n\n",\ + *((uint16_t *)188),*((uint16_t *)18a),*((uint16_t *)18c),*((uint16_t *)18e) +end +document dt +Display msp430 timer hardware +end + +#display usart +define us +printf "ie1: %02x ie2: %02x ifg1: %02x ifg2: %02x me1: %02x me2: %02x\n",\ + (*(uint8_t *)0x00), (*(uint8_t *)0x01), (*(uint8_t *)0x02), (*(uint8_t *)0x03),\ + (*(uint8_t *)0x04), (*(uint8_t *)0x05) +printf "US0: ctl: %02x tctl: %02x rctl: %02x mctl: %02x br: %02x%02x rx: %02x tx: %02x\n",\ + (*(uint8_t *)0x70), (*(uint8_t *)0x71), (*(uint8_t *)0x72), (*(uint8_t *)0x73),\ + (*(uint8_t *)0x75), (*(uint8_t *)0x74), (*(uint8_t *)0x76), (*(uint8_t *)0x77) +printf "US1: ctl: %02x tctl: %02x rctl: %02x mctl: %02x br: %02x%02x rx: %02x tx: %02x\n",\ + (*(uint8_t *)0x78), (*(uint8_t *)0x79), (*(uint8_t *)0x7a), (*(uint8_t *)0x7b),\ + (*(uint8_t *)0x7d), (*(uint8_t *)0x7c), (*(uint8_t *)0x7e), (*(uint8_t *)0x7f) +end +document us +display msp430 usart hardware +end + +define dc +printf "dcoctl: %02x\n",(*(uint8_t *)0x56) +printf "bcsctl1: %02x\n",(*(uint8_t *)0x57) +printf "bcsctl2: %02x\n",(*(uint8_t *)0x58) +end +document dc +display msp430 dco/clock system hardware +end + +define dp2 +printf "p2 in: %02x, out: %02x, dir: %02x, ifg: %02x, ies: %02x, ie: %02x, sel: %02x\n",\ + (*(uint8_t *)0x28), (*(uint8_t *)0x29), (*(uint8_t *)0x2a), (*(uint8_t *)0x2b),\ + (*(uint8_t *)0x2c), (*(uint8_t *)0x2d), (*(uint8_t *)0x2e) +end +document dp2 +display port 2 +end + +define ports +printf " in p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x20), (*(uint8_t *)0x28), (*(uint8_t *)0x18), \ + (*(uint8_t *)0x1c), (*(uint8_t *)0x30), (*(uint8_t *)0x34) +printf "out p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x21), (*(uint8_t *)0x29), (*(uint8_t *)0x19), \ + (*(uint8_t *)0x1d), (*(uint8_t *)0x31), (*(uint8_t *)0x35) +printf "ifg p1: %02x %02x\n", \ + (*(uint8_t *)0x23), (*(uint8_t *)0x2b) +printf "ies p1: %02x %02x\n\n", \ + (*(uint8_t *)0x24), (*(uint8_t *)0x2c) +printf "dir: p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x22), (*(uint8_t *)0x2a), (*(uint8_t *)0x1a), \ + (*(uint8_t *)0x1e), (*(uint8_t *)0x32), (*(uint8_t *)0x36) +printf "sel: p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x26), (*(uint8_t *)0x2e), (*(uint8_t *)0x1b), \ + (*(uint8_t *)0x1f), (*(uint8_t *)0x33), (*(uint8_t *)0x37) +end +document ports +display h/w ports +end diff --git a/tos/chips/msp430/00_gdb/gdb2xxx b/tos/chips/msp430/00_gdb/gdb2xxx new file mode 100644 index 0000000000..b6b397f206 --- /dev/null +++ b/tos/chips/msp430/00_gdb/gdb2xxx @@ -0,0 +1,121 @@ + +# +# Define various gdb user commands that let you look at pieces of the CPU. +# +# msp430f2618 +# +# author: Eric B. Decker +# + +#display dma +define dma +printf "dctl0: %04x dctl1: %04x iv: %04x\n", \ + *((uint16_t *) 0x122), *((uint16_t *) 0x124), *((uint16_t *) 0x126) +printf "d0ctl: %04x d0sa: %04x%04x d0da: %04x%04x d0sz: %04x\n", \ + *((uint16_t *) 0x1d0), *((uint16_t *) 0x1d4), *((uint16_t *) 0x1d2), \ + *((uint16_t *) 0x1d8), *((uint16_t *) 0x1d6), *((uint16_t *) 0x1da) +printf "d1ctl: %04x d1sa: %04x%04x d1da: %04x%04x d1sz: %04x\n", \ + *((uint16_t *) 0x1dc), *((uint16_t *) 0x1e0), *((uint16_t *) 0x1de), \ + *((uint16_t *) 0x1e4), *((uint16_t *) 0x1e2), *((uint16_t *) 0x1e6) +printf "d2ctl: %04x d2sa: %04x%04x d2da: %04x%04x d2sz: %04x\n", \ + *((uint16_t *) 0x1e8), *((uint16_t *) 0x1ec), *((uint16_t *) 0x1ea), \ + *((uint16_t *) 0x1f0), *((uint16_t *) 0x1ee), *((uint16_t *) 0x1f2) +end +document dma +Display msp430 dma hardware +end + +#display timers +define dt +printf "TA: tar: %04x ccr0: %04x 1: %04x 2: %04x\n",\ + *((uint16_t *)170),*((uint16_t *)172),*((uint16_t *)174),*((uint16_t *)176) +printf " ctl: %04x cctl0: %04x 1: %04x 2: %04x\n\n",\ + *((uint16_t *)160),*((uint16_t *)162),*((uint16_t *)164),*((uint16_t *)166) + +printf "TB: tbr: %04x ccr0: %04x 1: %04x 2: %04x ",\ + *((uint16_t *)190),*((uint16_t *)192),*((uint16_t *)194),*((uint16_t *)196) +printf "3: %04x 4: %04x 5: %04x 6: %04x\n",\ + *((uint16_t *)198),*((uint16_t *)19a),*((uint16_t *)19c),*((uint16_t *)19e) + +printf " ctl: %04x cctl0: %04x 1: %04x 2: %04x ",\ + *((uint16_t *)180),*((uint16_t *)182),*((uint16_t *)184),*((uint16_t *)186) +printf "3: %04x 4: %04x 5: %04x 6: %04x\n\n",\ + *((uint16_t *)188),*((uint16_t *)18a),*((uint16_t *)18c),*((uint16_t *)18e) +end +document dt +Display msp430 timer hardware +end + +#display usci +define us +printf "A0/B0: IE: %02x IFG: %02x\n", (*(uint8_t *)0x01), (*(uint8_t *)0x03) +printf "UA0: ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ + (*(uint8_t *)0x60), (*(uint8_t *)0x61), (*(uint8_t *)0x63), (*(uint8_t *)0x62),\ + (*(uint8_t *)0x64), (*(uint8_t *)0x65), (*(uint8_t *)0x66), (*(uint8_t *)0x67) +printf "UB0: ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n\n",\ + (*(uint8_t *)0x68), (*(uint8_t *)0x69), (*(uint8_t *)0x6b), (*(uint8_t *)0x6a),\ + (*(uint8_t *)0x6c), (*(uint8_t *)0x6d), (*(uint8_t *)0x6e), (*(uint8_t *)0x6f) +printf "A1/B1: UC1IE: %02x UC1IFG: %02x\n", (*(uint8_t *)0x06), (*(uint8_t *)0x07) +printf "UA1: ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ + (*(uint8_t *)0xd0), (*(uint8_t *)0xd1), (*(uint8_t *)0xd3), (*(uint8_t *)0xd2),\ + (*(uint8_t *)0xd4), (*(uint8_t *)0xd5), (*(uint8_t *)0xd6), (*(uint8_t *)0xd7) +printf "UB1: ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ + (*(uint8_t *)0xd8), (*(uint8_t *)0xd9), (*(uint8_t *)0xdb), (*(uint8_t *)0xda),\ + (*(uint8_t *)0xdc), (*(uint8_t *)0xdd), (*(uint8_t *)0xde), (*(uint8_t *)0xdf) +end +document us +display msp430 usci hardware +end + +define sfr +printf "ie1: %02x ie2: %02x ifg1: %02x ifg2: %02x me1: %02x me2: %02x\n",\ + (*(uint8_t *)0x00), (*(uint8_t *)0x01), (*(uint8_t *)0x02), (*(uint8_t *)0x03),\ + (*(uint8_t *)0x04), (*(uint8_t *)0x05) +end +document sfr +display msp430 special function registers (interrupt enable, interrupt flags) +end + +define dc +printf "dcoctl: %02x\n",(*(uint8_t *)0x56) +printf "bcsctl1: %02x\n",(*(uint8_t *)0x57) +printf "bcsctl2: %02x\n",(*(uint8_t *)0x58) +printf "bcsctl3: %02x\n",(*(uint8_t *)0x53) +end +document dc +display msp430 dco/clock system hardware +end + +define dp2 +printf "p2 in: %02x, out: %02x, dir: %02x, ifg: %02x, ies: %02x, ie: %02x, sel: %02x, ren: %02x\n",\ + (*(uint8_t *)0x28), (*(uint8_t *)0x29), (*(uint8_t *)0x2a), (*(uint8_t *)0x2b),\ + (*(uint8_t *)0x2c), (*(uint8_t *)0x2d), (*(uint8_t *)0x2e), (*(uint8_t *)0x2f) +end +document dp2 +display port 2 +end + +define ports +printf " in p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x20), (*(uint8_t *)0x28), (*(uint8_t *)0x18), \ + (*(uint8_t *)0x1c), (*(uint8_t *)0x30), (*(uint8_t *)0x34) +printf "out p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x21), (*(uint8_t *)0x29), (*(uint8_t *)0x19), \ + (*(uint8_t *)0x1d), (*(uint8_t *)0x31), (*(uint8_t *)0x35) +printf "ifg p1: %02x %02x\n", \ + (*(uint8_t *)0x23), (*(uint8_t *)0x2b) +printf "ies p1: %02x %02x\n\n", \ + (*(uint8_t *)0x24), (*(uint8_t *)0x2c) +printf "dir: p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x22), (*(uint8_t *)0x2a), (*(uint8_t *)0x1a), \ + (*(uint8_t *)0x1e), (*(uint8_t *)0x32), (*(uint8_t *)0x36) +printf "sel: p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x26), (*(uint8_t *)0x2e), (*(uint8_t *)0x1b), \ + (*(uint8_t *)0x1f), (*(uint8_t *)0x33), (*(uint8_t *)0x37) +printf "ren: p1: %02x %02x %02x p4: %02x %02x %02x\n", \ + (*(uint8_t *)0x27), (*(uint8_t *)0x2f), (*(uint8_t *)0x10), \ + (*(uint8_t *)0x11), (*(uint8_t *)0x12), (*(uint8_t *)0x13) +end +document ports +display h/w ports +end diff --git a/tos/chips/msp430/00_gdb/gdb5xxx b/tos/chips/msp430/00_gdb/gdb5xxx new file mode 100644 index 0000000000..aaabbd9206 --- /dev/null +++ b/tos/chips/msp430/00_gdb/gdb5xxx @@ -0,0 +1,159 @@ + +#display dma +define dma +printf "tsel0: %04x tsel1: %04x tsel2: %04x tsel3: %04x dctl4: %04x dmaiv: %04x\n", \ + *((uint16_t *) 0x500), *((uint16_t *) 0x502), *((uint16_t *) 0x504), \ + *((uint16_t *) 0x506), *((uint16_t *) 0x508), *((uint16_t *) 0x50a) +printf "d0ctl: %04x d0sa: %04x%04x d0da: %04x%04x d0sz: %04x\n", \ + *((uint16_t *) 0x510), *((uint16_t *) 0x514), *((uint16_t *) 0x512), \ + *((uint16_t *) 0x518), *((uint16_t *) 0x516), *((uint16_t *) 0x51a) +printf "d1ctl: %04x d1sa: %04x%04x d1da: %04x%04x d1sz: %04x\n", \ + *((uint16_t *) 0x520), *((uint16_t *) 0x524), *((uint16_t *) 0x522), \ + *((uint16_t *) 0x528), *((uint16_t *) 0x526), *((uint16_t *) 0x52a) +printf "d2ctl: %04x d2sa: %04x%04x d2da: %04x%04x d2sz: %04x\n", \ + *((uint16_t *) 0x530), *((uint16_t *) 0x534), *((uint16_t *) 0x532), \ + *((uint16_t *) 0x538), *((uint16_t *) 0x536), *((uint16_t *) 0x53a) +end +document dma +Display msp430 dma hardware +end + +#display timers +define dt +printf "TA0: r: %04x ctl: %04x ex: %04x iv: %04x\n", \ + *((uint16_t *)0x350),*((uint16_t *)0x340),*((uint16_t *)0x360),*((uint16_t *)0x36e) +printf " cctl0: %04x 1: %04x 2: %04x 3: %04x 4: %04x\n", \ + *((uint16_t *)0x342),*((uint16_t *)0x344),*((uint16_t *)0x346),*((uint16_t *)0x348),*((uint16_t *)0x34a) +printf " ccr0: %04x 1: %04x 2: %04x 3: %04x 4: %04x\n\n", \ + *((uint16_t *)0x352),*((uint16_t *)0x354),*((uint16_t *)0x356),*((uint16_t *)0x358),*((uint16_t *)0x35a) + +printf "TA1: r: %04x ctl: %04x ex: %04x iv: %04x\n", \ + *((uint16_t *)0x390),*((uint16_t *)0x380),*((uint16_t *)0x3a0),*((uint16_t *)0x3ae) +printf " cctl0: %04x 1: %04x 2: %04x\n", \ + *((uint16_t *)0x382),*((uint16_t *)0x384),*((uint16_t *)0x386) +printf " ccr0: %04x 1: %04x 2: %04x\n\n", \ + *((uint16_t *)0x392),*((uint16_t *)0x394),*((uint16_t *)0x396) + +#printf "TB0: r: %04x ctl: %04x ex: %04x iv: %04x\n", \ +# *((uint16_t *)0x3d0),*((uint16_t *)0x3c0),*((uint16_t *)0x3e0),*((uint16_t *)0x3ee) +#printf " cctl0: %04x 1: %04x 2: %04x 3: %04x\n", \ +# *((uint16_t *)0x3c2),*((uint16_t *)0x3c4),*((uint16_t *)0x3c6),*((uint16_t *)0x3c8) +#printf " ccr0: %04x 1: %04x 2: %04x 3: %04x\n", \ +# *((uint16_t *)0x3d2),*((uint16_t *)0x3d4),*((uint16_t *)0x3d6),*((uint16_t *)0x3d8) +#printf " cctl4: %04x 5: %04x 6: %04x\n", \ +# *((uint16_t *)0x3ca),*((uint16_t *)0x3cc),*((uint16_t *)0x3ce) +#printf " ccr4: %04x 5: %04x 6: %04x\n\n", \ +# *((uint16_t *)0x3da),*((uint16_t *)0x3dc),*((uint16_t *)0x3de) + +end +document dt +Display msp430 timer hardware +end + +#display usci +define us +printf "A0: ie: %02x ifg: %02x iv: %04x\n", \ + (*(uint8_t *)0x5dc), (*(uint8_t *)0x5dd), (*(uint8_t *)0x5de) +printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ + (*(uint8_t *)0x5c1), (*(uint8_t *)0x5c0), (*(uint8_t *)0x5c7), (*(uint8_t *)0x5c6),\ + (*(uint8_t *)0x5c8), (*(uint8_t *)0x5ca), (*(uint8_t *)0x5cc), (*(uint8_t *)0x5ce) + +printf "B0: ie: %02x ifg: %02x iv: %04x\n", \ + (*(uint8_t *)0x5fc), (*(uint8_t *)0x5fd), (*(uint8_t *)0x5fe) +printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ + (*(uint8_t *)0x5e1), (*(uint8_t *)0x5e0), (*(uint8_t *)0x5e7), (*(uint8_t *)0x5e6),\ + (*(uint8_t *)0x5e8), (*(uint8_t *)0x5ea), (*(uint8_t *)0x5ec), (*(uint8_t *)0x5ee) + +# +#printf "A1: IE: %02x IFG: %02x IV: %04x\n", \ +# (*(uint8_t *)0x61c), (*(uint8_t *)0x61d), (*(uint8_t *)0x61e) +#printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ +# (*(uint8_t *)0x601), (*(uint8_t *)0x600), (*(uint8_t *)0x607), (*(uint8_t *)0x606),\ +# (*(uint8_t *)0x608), (*(uint8_t *)0x60a), (*(uint8_t *)0x60c), (*(uint8_t *)0x60e) +# +#printf "B1: IE: %02x IFG: %02x IV: %04x\n", \ +# (*(uint8_t *)0x63c), (*(uint8_t *)0x63d), (*(uint8_t *)0x63e) +#printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ +# (*(uint8_t *)0x621), (*(uint8_t *)0x620), (*(uint8_t *)0x627), (*(uint8_t *)0x626),\ +# (*(uint8_t *)0x628), (*(uint8_t *)0x62a), (*(uint8_t *)0x62c), (*(uint8_t *)0x62e) +# +#printf "A2: IE: %02x IFG: %02x IV: %04x\n", \ +# (*(uint8_t *)0x65c), (*(uint8_t *)0x65d), (*(uint8_t *)0x65e) +#printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ +# (*(uint8_t *)0x641), (*(uint8_t *)0x640), (*(uint8_t *)0x647), (*(uint8_t *)0x646),\ +# (*(uint8_t *)0x648), (*(uint8_t *)0x64a), (*(uint8_t *)0x64c), (*(uint8_t *)0x64e) +# +#printf "B2: IE: %02x IFG: %02x IV: %04x\n", \ +# (*(uint8_t *)0x67c), (*(uint8_t *)0x67d), (*(uint8_t *)0x67e) +#printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ +# (*(uint8_t *)0x661), (*(uint8_t *)0x660), (*(uint8_t *)0x667), (*(uint8_t *)0x666),\ +# (*(uint8_t *)0x668), (*(uint8_t *)0x66a), (*(uint8_t *)0x66c), (*(uint8_t *)0x66e) +# +#printf "A3: IE: %02x IFG: %02x IV: %04x\n", \ +# (*(uint8_t *)0x69c), (*(uint8_t *)0x69d), (*(uint8_t *)0x69e) +#printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ +# (*(uint8_t *)0x681), (*(uint8_t *)0x680), (*(uint8_t *)0x687), (*(uint8_t *)0x686),\ +# (*(uint8_t *)0x688), (*(uint8_t *)0x68a), (*(uint8_t *)0x68c), (*(uint8_t *)0x68e) +# +#printf "B3: IE: %02x IFG: %02x IV: %04x\n", \ +# (*(uint8_t *)0x6bc), (*(uint8_t *)0x6bd), (*(uint8_t *)0x6be) +#printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ +# (*(uint8_t *)0x6a1), (*(uint8_t *)0x6a0), (*(uint8_t *)0x6a7), (*(uint8_t *)0x6a6),\ +# (*(uint8_t *)0x6a8), (*(uint8_t *)0x6aa), (*(uint8_t *)0x6ac), (*(uint8_t *)0x6ae) +# +end +document us +display msp430 usci hardware +end + +define sfr +printf "ie1: %02x ie2: %02x ifg1: %02x ifg2: %02x rpcr: %02x%02x\n",\ + (*(uint8_t *)0x100), (*(uint8_t *)0x101), (*(uint8_t *)0x102), (*(uint8_t *)0x103), \ + (*(uint8_t *)0x105), (*(uint8_t *)0x104) +end +document sfr +display misc interrupt/fault registers +end + +define ucs +printf "ucsctl0: %04x %04x %04x\n", (*(uint16_t *)0x160),(*(uint16_t *)0x162),(*(uint16_t *)0x164) +printf "ucsctl3: %04x %04x %04x\n", (*(uint16_t *)0x166),(*(uint16_t *)0x168),(*(uint16_t *)0x16a) +printf "ucsctl6: %04x %04x %04x\n", (*(uint16_t *)0x16c),(*(uint16_t *)0x16e),(*(uint16_t *)0x170) +end +document ucs +display msp430 5xxx unified clock system hardware +end + +define dp2 +printf "p2 i: %02x o: %02x d: %02x f: %02x es: %02x ie: %02x sel: %02x ren: %02x ds: %02x\n",\ + (*(uint8_t *)0x201), (*(uint8_t *)0x203), (*(uint8_t *)0x205), (*(uint8_t *)0x21d), \ + (*(uint8_t *)0x219), (*(uint8_t *)0x21b), (*(uint8_t *)0x20b), (*(uint8_t *)0x207), \ + (*(uint8_t *)0x209) +end +document dp2 +display port 2 +end + +define ports +printf " in p1: %02x %02x %02x p4: %02x %02x\n", \ + (*(uint8_t *)0x200),(*(uint8_t *)0x201),(*(uint8_t *)0x220),(*(uint8_t *)0x221),(*(uint8_t *)0x240) +printf "out p1: %02x %02x %02x p4: %02x %02x\n", \ + (*(uint8_t *)0x202),(*(uint8_t *)0x203),(*(uint8_t *)0x222),(*(uint8_t *)0x223),(*(uint8_t *)0x242) +printf "dir: p1: %02x %02x %02x p4: %02x %02x\n", \ + (*(uint8_t *)0x204),(*(uint8_t *)0x205),(*(uint8_t *)0x224),(*(uint8_t *)0x225),(*(uint8_t *)0x244) +printf "sel: p1: %02x %02x %02x p4: %02x %02x\n", \ + (*(uint8_t *)0x20a),(*(uint8_t *)0x20b),(*(uint8_t *)0x22a),(*(uint8_t *)0x22b),(*(uint8_t *)0x24a) +printf "ifg p1: %02x %02x\n", + (*(uint8_t *)0x21c), (*(uint8_t *)0x21d) +printf "ie p1: %02x %02x iv: %04x %04x\n", \ + (*(uint8_t *)0x21a), (*(uint8_t *)0x21b), (*(uint16_t *) 0x20e), (*(uint16_t *) 0x21e) +printf "ies p1: %02x %02x\n", \ + (*(uint8_t *)0x218), (*(uint8_t *)0x219) +printf "ren: p1: %02x %02x %02x p4: %02x %02x\n", \ + (*(uint8_t *)0x206),(*(uint8_t *)0x207),(*(uint8_t *)0x226),(*(uint8_t *)0x227),(*(uint8_t *)0x246) +printf " ds: p1: %02x %02x %02x p4: %02x %02x\n", \ + (*(uint8_t *)0x208),(*(uint8_t *)0x209),(*(uint8_t *)0x228),(*(uint8_t *)0x229),(*(uint8_t *)0x248) +end +document ports +display h/w ports +end diff --git a/tos/chips/msp430/00_gdb/gdbinit b/tos/chips/msp430/00_gdb/gdbinit new file mode 100644 index 0000000000..786bb9350e --- /dev/null +++ b/tos/chips/msp430/00_gdb/gdbinit @@ -0,0 +1,56 @@ + +# one is in the apps/ directory when building the application. +# "make z1" in this directory will create the resultant files in the +# build/z1 directory. The z1 is based on a msp430f2617. +# +# One can then run gdb from the apps/ directory via +# "gdb build/z1/main.exe", or from within emacs via M-x gdb and then +# Run gdb (like this): gdb --annotate=3 build/z1/main.exe +# +# Note you have to replace the "gdb" with the appropriate gdb for your +# processor. For example, when using the telosb then msp430-gdb is the +# gdb you want to use. +# +# GDB can execute gdb run commands from the execution directory and your +# home directory. These files are named .gdbinit. The init file in the +# build directory is build/telosb/.gdbinit. But keep in mind that if +# one does a "make clean" it wipes out build and everything below it. So +# the thing to do is place the .gdbinit file and friends in the apps/ +# directory and link from build/z1. ie. "cd build/z1; ln -s ../../.gdbinit; +# cd ../.." +# +# CPU dependent gdb command files are also available for the various flavors +# of msp430 cpus. Sourcing one of these files will make available various +# commands for looking a different parts of the processor. +# +# GDB for the msp430 communicates with the cpu under test via JTAG h/w and +# a proxy using a remote protocol. +# + +source ../../.gdb2618 + +set remoteaddresssize 0d64 +set remotetimeout 0d999999 +target remote localhost:2000 + +disp/i $pc +x/i $pc +set pri ele 0 + +b RealMainP.nc:75 +b RealMainP.nc:82 +b SchedulerBasicP.nc:151 +b SchedulerBasicP.nc:148 +b VirtualizeTimerC.nc:81 +dis + +define nx +fini +ni 3 +si 2 +end + +define noint +printf "cur sr: %02x\n", $r2 +set $r2=0 +end From 97728867ccfa6503da21fb971ccc88bc7d9ff172 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Mar 2011 03:22:14 -0800 Subject: [PATCH 016/411] support/sdk/java/.gitignore --- support/sdk/java/.gitignore | 4 ++++ 1 file changed, 4 insertions(+) create mode 100644 support/sdk/java/.gitignore diff --git a/support/sdk/java/.gitignore b/support/sdk/java/.gitignore new file mode 100644 index 0000000000..87390817d2 --- /dev/null +++ b/support/sdk/java/.gitignore @@ -0,0 +1,4 @@ +SerialPacket.java +Serial.java +PrintfMsg.java +*.class From e431ae0d9f62c4f01bba68304aa48e9714c16d92 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Mar 2011 04:18:39 -0800 Subject: [PATCH 017/411] Fix msp430 usage of Resource.isOwner (should be a bool) not error_t or uint8_t --- .../msp430/adc12/Msp430RefVoltArbiterImplP.nc | 21 ++++--------------- tos/chips/msp430/usart/Msp430I2CP.nc | 5 ++--- tos/chips/msp430/usart/Msp430SpiDmaP.nc | 4 ++-- tos/chips/msp430/usart/Msp430SpiNoDmaP.nc | 4 ++-- tos/chips/msp430/usart/Msp430UartP.nc | 4 ++-- tos/chips/msp430/usci/Msp430I2CP.nc | 4 ++-- tos/chips/msp430/usci/Msp430SpiDmaBP.nc | 4 ++-- tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc | 4 ++-- tos/chips/msp430/usci/Msp430UartP.nc | 4 ++-- 9 files changed, 20 insertions(+), 34 deletions(-) diff --git a/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc b/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc index d35fb53190..616787df60 100644 --- a/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc +++ b/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc @@ -26,11 +26,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2007-04-05 13:42:36 $ * @author: Jan Hauer - * ======================================================================== */ module Msp430RefVoltArbiterImplP @@ -162,27 +158,18 @@ module Msp430RefVoltArbiterImplP { } - async command uint8_t ClientResource.isOwner[uint8_t client]() - { + async command bool ClientResource.isOwner[uint8_t client]() { return call AdcResource.isOwner[client](); } default event void ClientResource.granted[uint8_t client](){} - default async command error_t AdcResource.request[uint8_t client]() - { - return FAIL; - } - default async command error_t AdcResource.immediateRequest[uint8_t client]() - { - return FAIL; - } + default async command error_t AdcResource.request[uint8_t client]() { return FAIL; } + default async command error_t AdcResource.immediateRequest[uint8_t client]() { return FAIL; } default async command bool AdcResource.isOwner[uint8_t client]() { return FALSE; } default async command error_t AdcResource.release[uint8_t client](){return FAIL;} const msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; default async command const msp430adc12_channel_config_t* - Config.getConfiguration[uint8_t client]() - { + Config.getConfiguration[uint8_t client]() { return &defaultConfig; } } - diff --git a/tos/chips/msp430/usart/Msp430I2CP.nc b/tos/chips/msp430/usart/Msp430I2CP.nc index bac73d09b6..e9053c0c91 100644 --- a/tos/chips/msp430/usart/Msp430I2CP.nc +++ b/tos/chips/msp430/usart/Msp430I2CP.nc @@ -75,7 +75,7 @@ implementation { return call UsartResource.request[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } @@ -221,6 +221,5 @@ implementation { signal I2CBasicAddr.readDone( error, I2CSA, m_len, m_buf ); } - default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; } - + default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } } diff --git a/tos/chips/msp430/usart/Msp430SpiDmaP.nc b/tos/chips/msp430/usart/Msp430SpiDmaP.nc index 5831c9c1e5..de195001f0 100644 --- a/tos/chips/msp430/usart/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiDmaP.nc @@ -99,11 +99,11 @@ implementation { signal Resource.granted[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } - default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } diff --git a/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc index 87b950e9e0..1f3b2498c0 100644 --- a/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc @@ -109,7 +109,7 @@ implementation { return call UsartResource.request[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } @@ -170,7 +170,7 @@ implementation { return call FastSpiByte.splitRead(); } - default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } diff --git a/tos/chips/msp430/usart/Msp430UartP.nc b/tos/chips/msp430/usart/Msp430UartP.nc index c831f4b055..9d652ed296 100644 --- a/tos/chips/msp430/usart/Msp430UartP.nc +++ b/tos/chips/msp430/usart/Msp430UartP.nc @@ -70,7 +70,7 @@ implementation { return call UsartResource.request[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } @@ -207,7 +207,7 @@ implementation { async event void Counter.overflow() {} - default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } diff --git a/tos/chips/msp430/usci/Msp430I2CP.nc b/tos/chips/msp430/usci/Msp430I2CP.nc index 77cc06f6e9..0ca613e4b0 100644 --- a/tos/chips/msp430/usci/Msp430I2CP.nc +++ b/tos/chips/msp430/usci/Msp430I2CP.nc @@ -76,7 +76,7 @@ implementation { return call UsciResource.request[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsciResource.isOwner[ id ](); } @@ -240,5 +240,5 @@ implementation { signal I2CBasicAddr.readDone( error, call UsciB.getSlaveAddress(), m_len, m_buf ); } - default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command bool UsciResource.isOwner[ uint8_t id ]() { return FALSE; } } diff --git a/tos/chips/msp430/usci/Msp430SpiDmaBP.nc b/tos/chips/msp430/usci/Msp430SpiDmaBP.nc index 3d449ef280..d167d55bec 100644 --- a/tos/chips/msp430/usci/Msp430SpiDmaBP.nc +++ b/tos/chips/msp430/usci/Msp430SpiDmaBP.nc @@ -101,11 +101,11 @@ implementation { signal Resource.granted[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsciResource.isOwner[ id ](); } - default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command bool UsciResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } diff --git a/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc b/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc index fcd5514dd1..92c07980f4 100644 --- a/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc +++ b/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc @@ -72,7 +72,7 @@ implementation { return call UsciResource.request[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsciResource.isOwner[ id ](); } @@ -106,7 +106,7 @@ implementation { return byte; } - default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command bool UsciResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc index 804dab8c28..30a3c8b9ba 100644 --- a/tos/chips/msp430/usci/Msp430UartP.nc +++ b/tos/chips/msp430/usci/Msp430UartP.nc @@ -69,7 +69,7 @@ implementation { return call UsciResource.request[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsciResource.isOwner[ id ](); } @@ -202,7 +202,7 @@ implementation { async event void Counter.overflow() {} - default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command bool UsciResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } From 0e46089ad3d351866567ce24dfdfca420aa52492 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Mar 2011 04:40:35 -0800 Subject: [PATCH 018/411] fix remaining wrong definition of Resource.isOwner, should be bool --- tos/chips/atm128/spi/Atm128SpiP.nc | 2 +- tos/chips/cc2420/control/CC2420ControlP.nc | 2 +- tos/chips/cc2420/spi/CC2420SpiP.nc | 2 +- tos/chips/cc2420_tkn154/CC2420ControlP.nc | 2 +- .../m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc | 2 +- tos/chips/stm25p/Stm25pSectorP.nc | 2 +- tos/chips/stm25p/Stm25pSpiP.nc | 2 +- tos/chips/xe1205/XE1205SpiImplP.nc | 2 +- tos/lib/mac/tkn154/SimpleTransferArbiterP.nc | 2 +- .../FlashVolumeManager/FlashVolumeManagerP.nc | 2 +- tos/lib/net/zigbee/cc2420/CC2420ControlP.nc | 2 +- tos/lib/net/zigbee/cc2420/CC2420SpiP.nc | 2 +- tos/lib/tosthreads/system/BlockingResourceP.nc | 17 +---------------- tos/platforms/mica2/NestedResourceC.nc | 2 +- tos/platforms/null/DemoSensorNowC.nc | 4 ++-- .../tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc | 6 +++--- tos/system/ArbiterP.nc | 6 +++--- tos/system/FcfsPriorityArbiterC.nc | 6 +++--- tos/system/NoArbiterC.nc | 2 +- tos/system/SimpleArbiterP.nc | 2 +- 20 files changed, 27 insertions(+), 42 deletions(-) diff --git a/tos/chips/atm128/spi/Atm128SpiP.nc b/tos/chips/atm128/spi/Atm128SpiP.nc index e243591b68..e300f98179 100644 --- a/tos/chips/atm128/spi/Atm128SpiP.nc +++ b/tos/chips/atm128/spi/Atm128SpiP.nc @@ -379,7 +379,7 @@ implementation { return error; } - async command uint8_t Resource.isOwner[uint8_t id]() { + async command bool Resource.isOwner[uint8_t id]() { return call ResourceArbiter.isOwner[id](); } diff --git a/tos/chips/cc2420/control/CC2420ControlP.nc b/tos/chips/cc2420/control/CC2420ControlP.nc index 699999f04d..5bd7d857e1 100644 --- a/tos/chips/cc2420/control/CC2420ControlP.nc +++ b/tos/chips/cc2420/control/CC2420ControlP.nc @@ -179,7 +179,7 @@ implementation { return call SpiResource.request(); } - async command uint8_t Resource.isOwner() { + async command bool Resource.isOwner() { return call SpiResource.isOwner(); } diff --git a/tos/chips/cc2420/spi/CC2420SpiP.nc b/tos/chips/cc2420/spi/CC2420SpiP.nc index b95fcfddc1..8d658c0238 100644 --- a/tos/chips/cc2420/spi/CC2420SpiP.nc +++ b/tos/chips/cc2420/spi/CC2420SpiP.nc @@ -175,7 +175,7 @@ implementation { return SUCCESS; } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { atomic return (m_holder == id); } diff --git a/tos/chips/cc2420_tkn154/CC2420ControlP.nc b/tos/chips/cc2420_tkn154/CC2420ControlP.nc index 95a2c9e71d..ed1543bb63 100644 --- a/tos/chips/cc2420_tkn154/CC2420ControlP.nc +++ b/tos/chips/cc2420_tkn154/CC2420ControlP.nc @@ -141,7 +141,7 @@ implementation { return call SpiResource.request(); } - async command uint8_t Resource.isOwner() { + async command bool Resource.isOwner() { return call SpiResource.isOwner(); } diff --git a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc index e33968fe7a..2fc7c95caf 100644 --- a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc +++ b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc @@ -49,7 +49,7 @@ implementation{ return call TwiResource.request[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call TwiResource.isOwner[ id ](); } diff --git a/tos/chips/stm25p/Stm25pSectorP.nc b/tos/chips/stm25p/Stm25pSectorP.nc index 254a93c466..cc31455afd 100644 --- a/tos/chips/stm25p/Stm25pSectorP.nc +++ b/tos/chips/stm25p/Stm25pSectorP.nc @@ -146,7 +146,7 @@ implementation { signal ClientResource.granted[ m_client ](); } - async command uint8_t ClientResource.isOwner[ uint8_t id ]() { + async command bool ClientResource.isOwner[ uint8_t id ]() { return call Stm25pResource.isOwner[id](); } diff --git a/tos/chips/stm25p/Stm25pSpiP.nc b/tos/chips/stm25p/Stm25pSpiP.nc index 498baab9cb..75be958488 100644 --- a/tos/chips/stm25p/Stm25pSpiP.nc +++ b/tos/chips/stm25p/Stm25pSpiP.nc @@ -117,7 +117,7 @@ implementation { return call SpiResource.release(); } - async command uint8_t ClientResource.isOwner() { + async command bool ClientResource.isOwner() { return call SpiResource.isOwner(); } diff --git a/tos/chips/xe1205/XE1205SpiImplP.nc b/tos/chips/xe1205/XE1205SpiImplP.nc index 63fe8b8dd0..ee3344fa23 100644 --- a/tos/chips/xe1205/XE1205SpiImplP.nc +++ b/tos/chips/xe1205/XE1205SpiImplP.nc @@ -165,7 +165,7 @@ implementation { } } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { atomic return (m_holder == id); } diff --git a/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc b/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc index 1262c5a2ff..32d58b7615 100644 --- a/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc +++ b/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc @@ -159,7 +159,7 @@ implementation { /** * Returns whether you are the current owner of the resource or not */ - async command uint8_t Resource.isOwner[uint8_t id]() { + async command bool Resource.isOwner[uint8_t id]() { atomic { if(resId == id && state == RES_BUSY) return TRUE; else return FALSE; diff --git a/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerP.nc b/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerP.nc index 3777d9fbe1..fda157188d 100644 --- a/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerP.nc +++ b/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerP.nc @@ -286,5 +286,5 @@ implementation default async command error_t Resource.immediateRequest() { return FAIL; } default async command error_t Resource.release() { return FAIL; } - default async command bool Resource.isOwner() { return FAIL; } + default async command bool Resource.isOwner() { return FALSE; } } diff --git a/tos/lib/net/zigbee/cc2420/CC2420ControlP.nc b/tos/lib/net/zigbee/cc2420/CC2420ControlP.nc index cc2d4ed4da..3f72ea0479 100644 --- a/tos/lib/net/zigbee/cc2420/CC2420ControlP.nc +++ b/tos/lib/net/zigbee/cc2420/CC2420ControlP.nc @@ -162,7 +162,7 @@ implementation { return call SpiResource.request(); } - async command uint8_t Resource.isOwner() { + async command bool Resource.isOwner() { return call SpiResource.isOwner(); } diff --git a/tos/lib/net/zigbee/cc2420/CC2420SpiP.nc b/tos/lib/net/zigbee/cc2420/CC2420SpiP.nc index b88fc1b305..b2c168d1b0 100644 --- a/tos/lib/net/zigbee/cc2420/CC2420SpiP.nc +++ b/tos/lib/net/zigbee/cc2420/CC2420SpiP.nc @@ -173,7 +173,7 @@ implementation { return SUCCESS; } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { atomic return (m_holder == id); } diff --git a/tos/lib/tosthreads/system/BlockingResourceP.nc b/tos/lib/tosthreads/system/BlockingResourceP.nc index 2821185e6c..969f6fcc20 100644 --- a/tos/lib/tosthreads/system/BlockingResourceP.nc +++ b/tos/lib/tosthreads/system/BlockingResourceP.nc @@ -130,22 +130,7 @@ implementation { } /************************* isOwner pass through *****************************/ - command error_t BlockingResource.isOwner() { + command bool BlockingResource.isOwner() { return call Resource.isOwner(); } } - - - - - - - - - - - - - - - diff --git a/tos/platforms/mica2/NestedResourceC.nc b/tos/platforms/mica2/NestedResourceC.nc index a1d93013ea..53deb73658 100644 --- a/tos/platforms/mica2/NestedResourceC.nc +++ b/tos/platforms/mica2/NestedResourceC.nc @@ -57,7 +57,7 @@ implementation return FAIL; } - async command uint8_t Resource.isOwner() { + async command bool Resource.isOwner() { return call Resource1.isOwner(); } } diff --git a/tos/platforms/null/DemoSensorNowC.nc b/tos/platforms/null/DemoSensorNowC.nc index 6d01d2c902..2dd263439a 100644 --- a/tos/platforms/null/DemoSensorNowC.nc +++ b/tos/platforms/null/DemoSensorNowC.nc @@ -31,8 +31,8 @@ implementation return SUCCESS; } - async command uint8_t Resource.isOwner() { - return true; + async command bool Resource.isOwner() { + return TRUE; } async command error_t ReadNow.read() { diff --git a/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc b/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc index cb3328c93e..9da117d921 100644 --- a/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc +++ b/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc @@ -76,7 +76,7 @@ implementation { return call UsartResource.request[ id ](); } - async command uint8_t Resource.isOwner[ uint8_t id ]() { + async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } @@ -110,11 +110,11 @@ implementation { return byte; } - default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; } + default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return &msp430_spi_default_config; } diff --git a/tos/system/ArbiterP.nc b/tos/system/ArbiterP.nc index bf66c2c58d..cb2b1c4a04 100644 --- a/tos/system/ArbiterP.nc +++ b/tos/system/ArbiterP.nc @@ -174,14 +174,14 @@ implementation { /** * Returns my user id. */ - async command uint8_t Resource.isOwner[uint8_t id]() { + async command bool Resource.isOwner[uint8_t id]() { atomic { if(resId == id && state == RES_BUSY) return TRUE; else return FALSE; } } - async command uint8_t ResourceDefaultOwner.isOwner() { + async command bool ResourceDefaultOwner.isOwner() { atomic return (state == RES_CONTROLLED || (resId == default_owner_id && (state == RES_GRANTING || state == RES_IMM_GRANTING))); @@ -195,7 +195,7 @@ implementation { call ResourceConfigure.configure[resId](); signal Resource.granted[resId](); } - + //Default event/command handlers for all of the other //potential users/providers of the parameterized interfaces //that have not been connected to. diff --git a/tos/system/FcfsPriorityArbiterC.nc b/tos/system/FcfsPriorityArbiterC.nc index 65ff4bdeb8..3f5e09888c 100644 --- a/tos/system/FcfsPriorityArbiterC.nc +++ b/tos/system/FcfsPriorityArbiterC.nc @@ -305,16 +305,16 @@ implementation { /** * Returns my user id. */ - async command uint8_t Resource.isOwner[uint8_t id]() { + async command bool Resource.isOwner[uint8_t id]() { atomic { if(resId == id) return TRUE; else return FALSE; } } - async command uint8_t LowPriorityClient.isOwner() { + async command bool LowPriorityClient.isOwner() { return call Resource.isOwner[LOW_PRIORITY_CLIENT_ID](); } - async command uint8_t HighPriorityClient.isOwner() { + async command bool HighPriorityClient.isOwner() { return call Resource.isOwner[HIGH_PRIORITY_CLIENT_ID](); } diff --git a/tos/system/NoArbiterC.nc b/tos/system/NoArbiterC.nc index 40fe783d26..54f8132f4c 100644 --- a/tos/system/NoArbiterC.nc +++ b/tos/system/NoArbiterC.nc @@ -42,7 +42,7 @@ implementation { return SUCCESS; } - async command uint8_t Resource.isOwner() { + async command bool Resource.isOwner() { return TRUE; } diff --git a/tos/system/SimpleArbiterP.nc b/tos/system/SimpleArbiterP.nc index 30f185f2e9..742a2fdfd3 100644 --- a/tos/system/SimpleArbiterP.nc +++ b/tos/system/SimpleArbiterP.nc @@ -145,7 +145,7 @@ implementation { /** * Returns whether you are the current owner of the resource or not */ - async command uint8_t Resource.isOwner[uint8_t id]() { + async command bool Resource.isOwner[uint8_t id]() { atomic { if(resId == id && state == RES_BUSY) return TRUE; else return FALSE; From fbf832cfaf14435b486f720f7a328588ade3bf8c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 15 Mar 2011 05:44:16 -0700 Subject: [PATCH 019/411] Z1 rework Phase 1 - handle -mdata-64k automatically (support/make/z1.target) - HplMsp430UsciA1P.nc: fix getUbr (wrong register) - UsciA.nc, UsciB.nc interfaces: remove redundant comments, fix comments to reflect what routines really do. - add {un,}resetUsci_n (better code) - replace isEmpty by isBusy to reflect what the h/w really does - fix isSpi, isUart, isI2C, and getMode so it does the correct thing. - make configuration code use config structures. - fix setUbr (needs to reset for change to take effect) - reorder the order of operations in setMode. disable, clear, reset, enable pins, config, unreset. Leaves device in reset (power savings?) - make clrRxIntr and clrIntr handle rx ifg and rx error bits correctly. - collapse redundant copyright messages. same license. - fix typo letter(O) -> number(0). subtle. - rename usci ports from SPIB0 to SPI0, SPI1 etc to match UART and tinyos naming. - Msp430Uart0C.nc: O -> 0 typo. - reworked msp430usci.h extensively. resource name collapse, port renaming, fix structures to match ti docs, fix config structures, add baud rates, fix baud rates to match 26xx docs. - fix interrupt handlers. handle one interrupt before returning. keep higher priority interrupt latency down. - add simple i2c support in HplMsp430UsciB0 --- 02_To_Do | 17 +- support/make/z1.target | 17 +- tos/chips/msp430/usci/HplMsp430UsciA.nc | 81 ++++-- tos/chips/msp430/usci/HplMsp430UsciA0P.nc | 192 +++++++++++---- tos/chips/msp430/usci/HplMsp430UsciA1P.nc | 180 ++++++++++---- .../usci/HplMsp430UsciAB0RawInterruptsP.nc | 89 +++++-- .../usci/HplMsp430UsciAB1RawInterruptsP.nc | 89 +++++-- tos/chips/msp430/usci/HplMsp430UsciB.nc | 61 +++-- tos/chips/msp430/usci/HplMsp430UsciB0C.nc | 10 +- tos/chips/msp430/usci/HplMsp430UsciB0P.nc | 230 +++++++++++++----- tos/chips/msp430/usci/HplMsp430UsciB1C.nc | 8 +- tos/chips/msp430/usci/HplMsp430UsciB1P.nc | 230 +++++++++++++----- .../msp430/usci/HplMsp430UsciInterrupts.nc | 4 +- tos/chips/msp430/usci/Msp430I2C0C.nc | 70 ++++++ tos/chips/msp430/usci/Msp430I2C0P.nc | 67 +++++ tos/chips/msp430/usci/Msp430I2C1C.nc | 21 +- tos/chips/msp430/usci/Msp430I2C1P.nc | 19 +- tos/chips/msp430/usci/Msp430I2CP.nc | 80 +++--- .../usci/{Msp430SpiB0C.nc => Msp430Spi0C.nc} | 48 ++-- .../{Msp430SpiDmaB0P.nc => Msp430Spi0DmaP.nc} | 31 ++- ...p430SpiNoDmaB0P.nc => Msp430Spi0NoDmaP.nc} | 33 ++- tos/chips/msp430/usci/Msp430Spi1C.nc | 93 +++++++ tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc | 72 ++++++ tos/chips/msp430/usci/Msp430Spi2C.nc | 84 +++++++ tos/chips/msp430/usci/Msp430Spi2DmaP.nc | 84 +++++++ tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc | 72 ++++++ tos/chips/msp430/usci/Msp430Spi3C.nc | 84 +++++++ tos/chips/msp430/usci/Msp430Spi3DmaP.nc | 86 +++++++ tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc | 72 ++++++ .../{Msp430SpiDmaBP.nc => Msp430SpiDmaP.nc} | 36 +-- ...Msp430SpiNoDmaBP.nc => Msp430SpiNoDmaP.nc} | 37 +-- tos/chips/msp430/usci/Msp430Uart0C.nc | 14 +- tos/chips/msp430/usci/Msp430Uart0P.nc | 22 +- tos/chips/msp430/usci/Msp430Uart1C.nc | 14 +- tos/chips/msp430/usci/Msp430Uart1P.nc | 22 +- tos/chips/msp430/usci/Msp430UartP.nc | 33 +-- tos/chips/msp430/usci/Msp430UsciA0C.nc | 21 +- tos/chips/msp430/usci/Msp430UsciA1C.nc | 21 +- tos/chips/msp430/usci/Msp430UsciB0C.nc | 21 +- tos/chips/msp430/usci/Msp430UsciB1C.nc | 24 +- tos/chips/msp430/usci/Msp430UsciShareA0P.nc | 27 +- tos/chips/msp430/usci/Msp430UsciShareA1P.nc | 28 ++- tos/chips/msp430/usci/Msp430UsciShareB0P.nc | 27 +- tos/chips/msp430/usci/Msp430UsciShareB1P.nc | 27 +- tos/chips/msp430/usci/Msp430UsciShareP.nc | 8 +- tos/chips/msp430/usci/msp430usci.h | 87 ++++--- .../z1/chips/cc2420/HplCC2420SpiC.nc | 2 +- 47 files changed, 2097 insertions(+), 598 deletions(-) create mode 100644 tos/chips/msp430/usci/Msp430I2C0C.nc create mode 100644 tos/chips/msp430/usci/Msp430I2C0P.nc rename tos/chips/msp430/usci/{Msp430SpiB0C.nc => Msp430Spi0C.nc} (68%) rename tos/chips/msp430/usci/{Msp430SpiDmaB0P.nc => Msp430Spi0DmaP.nc} (81%) rename tos/chips/msp430/usci/{Msp430SpiNoDmaB0P.nc => Msp430Spi0NoDmaP.nc} (76%) create mode 100644 tos/chips/msp430/usci/Msp430Spi1C.nc create mode 100644 tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc create mode 100644 tos/chips/msp430/usci/Msp430Spi2C.nc create mode 100644 tos/chips/msp430/usci/Msp430Spi2DmaP.nc create mode 100644 tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc create mode 100644 tos/chips/msp430/usci/Msp430Spi3C.nc create mode 100644 tos/chips/msp430/usci/Msp430Spi3DmaP.nc create mode 100644 tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc rename tos/chips/msp430/usci/{Msp430SpiDmaBP.nc => Msp430SpiDmaP.nc} (88%) rename tos/chips/msp430/usci/{Msp430SpiNoDmaBP.nc => Msp430SpiNoDmaP.nc} (88%) diff --git a/02_To_Do b/02_To_Do index 49bc3e04fc..6a2164c140 100644 --- a/02_To_Do +++ b/02_To_Do @@ -11,8 +11,10 @@ * i2c for msp430 isn't done yet. needs to be cleaned up and made less ugly. Interface needs to be finished. + (done) Z1 currently overloads the SPI pins. Switch to using I2C pins so it is clean. + * CC2420 modules use LocalIeeeEui64C to obtain an ipv6 link-local address. Z1 needs to - provide. + provide. If the ds2401 (serializer chip) isn't supported how is this done? * Currently config structs get put into ram via the data copy into ram mechanism. This means that it takes up room in RAM and ROM. Suboptimal. @@ -29,3 +31,16 @@ Are the bit fields really used or can we nuke them. Configuration uses a configuration struct and functional stuff is code that uses the definitions in the TI HEADERS and other cpu headers. + +* Do we want to put in TOSThreads support? Best way if yes is to #ifdef needed code in + the interrupt handlers. Old school mechanism clones the code. Why did Kevin do that? + +* Z1 uses I2C but never defines SDA or SCL. Rather it overlays the I2C pins on the SPI pins. + Works but isn't clean or straight forward. Confusing for someone new picking up what is going + on. + +* Need better approach to assigning pins. Should be a platform thing. this makes it so drivers + don't wire directly but instead wire to the platform ports. + +* UcsiB add call Usci.setUmctl(0)? + diff --git a/support/make/z1.target b/support/make/z1.target index 1541796774..bf595ef3ec 100644 --- a/support/make/z1.target +++ b/support/make/z1.target @@ -11,20 +11,17 @@ PFLAGS += -mdisable-hwmul # # Old Z1, mspgccX (3.2.3) tool chain accepts -mdata-64k and -mcode-64k -# but new mspgcc4 (4.4.5) doesn't understand these yet and causes the +# but new mspgcc4 (4.4.5) doesn't understand these and causes the # tinyos toolchain (nesc) to produce a really strange error: # "nesc1: internal error: couldn't define builtin macros - exiting" # -# One immediate thought is to simply leave this out for the old toolchain -# but it is unclear what kind of code it will generate. It should be -# fine but how big are pointers? The 261x parts (Z1 and friends) all -# have miniscule amounts of ram (all < 64K). But how smart is the -# compiler? Does it know to that it can always use 16 bit data pointers? -# Can it tell the difference between a data pointer and a code pointer? +# test the compiler to see if -mdata-64k is supported and if so tell it +# to put data into lower 64k. # -# Be careful out there. -# -#PFLAGS += -mdata-64k +HAS_MDATA = $(shell msp430-gcc --target-help | grep mdata-64k | awk '{print $1}') +ifneq "$(HAS_MDATA)" "" +PFLAGS += -mdata-64k +endif VOLUME_FILE = volumes-stm25p.xml VOLUME_ALLOCATOR ?= tos-storage-stm25p diff --git a/tos/chips/msp430/usci/HplMsp430UsciA.nc b/tos/chips/msp430/usci/HplMsp430UsciA.nc index 4f104bd259..64fb1251df 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciA.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciA.nc @@ -61,7 +61,16 @@ interface HplMsp430UsciA { async command void setUctl1(msp430_uctl1_t control); async command msp430_uctl1_t getUctl1(); - /* UCxxBR1 UCxxBR0 */ + /* UCxxBR1 UCxxBR0 + * + * set will install a new BR divisor. If the device is reset it + * is left reset. If running, the device is first reset, the new + * BR installed, and then taken out of reset. This causes the new + * BR to take effect. + * + * Interrupts are disabled because the BR registers are 8 bits x 2 and + * have to be referenced via the byte I/O space. + */ async command void setUbr(uint16_t ubr); async command uint16_t getUbr(); @@ -86,28 +95,19 @@ interface HplMsp430UsciA { async command void resetUsci(bool reset); /* - * return enum indicating what mode the usci port in in. - */ - async command msp430_uscimode_t getMode(); - - /* - * configure or deconfigure gpio pins for SPI mode + * resetUsci_n() + * unresetUsci_n() * - * switches io pins between port and module function. + * reset usci, no parameter. generates better code */ - async command void enableSpi(); - async command void disableSpi(); + async command void resetUsci_n(); + async command void unresetUsci_n(); /* - * Returns TRUE if the Usci is in SPI mode + * return enum indicating what mode the usci port in in. */ - async command bool isSpi(); + async command msp430_uscimode_t getMode(); - /* - * configure usci as spi using config. - * leaves interrupts disabled. - */ - async command void setModeSpi(msp430_spi_union_config_t* config); /* Interrupt control */ async command void disableRxIntr(); @@ -123,7 +123,19 @@ interface HplMsp430UsciA { async command void clrRxIntr(); async command void clrIntr(); - async command bool isTxEmpty(); + /* + * TI h/w provides a busy bit. return tx or rx is doing something + * + * This isn't really that useful. This used to be called txEmpty but that + * isn't true. Rather it indicates that tx, rx, or both are active. These + * paths are double buffered. + * + * For TX state machines (packet based etc), we want to know that all the bytes + * went out, typically when switching resources. For RX, we will have received + * all the bytes we are interested in, so don't really care that the RX buffers in + * the h/w are empty. + */ + async command bool isBusy(); /** * Transmit a byte of data. When the transmission is completed, @@ -139,6 +151,13 @@ interface HplMsp430UsciA { */ async command uint8_t rx(); + + /*********************************************************************** + * + * UART Mode interface + * + ***********************************************************************/ + /* * Returns TRUE if the Usci is in Uart mode */ @@ -157,4 +176,30 @@ interface HplMsp430UsciA { * leaves interrupts disabled. */ async command void setModeUart(msp430_uart_union_config_t* config); + + + /*********************************************************************** + * + * SPI Mode interface + * + ***********************************************************************/ + + /* + * configure or deconfigure gpio pins for SPI mode + * + * switches io pins between port and module function. + */ + async command void enableSpi(); + async command void disableSpi(); + + /* + * Returns TRUE if the Usci is in SPI mode + */ + async command bool isSpi(); + + /* + * configure usci as spi using config. + * leaves interrupts disabled. + */ + async command void setModeSpi(msp430_spi_union_config_t* config); } diff --git a/tos/chips/msp430/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/usci/HplMsp430UsciA0P.nc index f04c4eb0c0..c3661096eb 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciA0P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciA0P.nc @@ -1,7 +1,7 @@ /* - * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2010-2011, Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006, Arch Rock Corporation * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * @@ -37,7 +37,7 @@ #include "msp430usci.h" -/** +/* * Implementation of usci A0 (uart or spi) low level functionality - stateless. * Setting a mode will by default disable USCI-Interrupts. * @@ -64,7 +64,6 @@ module HplMsp430UsciA0P @safe() { uses interface HplMsp430GeneralIO as UCLK; uses interface HplMsp430GeneralIO as URXD; uses interface HplMsp430GeneralIO as UTXD; - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; } @@ -73,6 +72,7 @@ implementation { MSP430REG_NORACE(IFG2); MSP430REG_NORACE(UCA0CTL0); MSP430REG_NORACE(UCA0CTL1); + MSP430REG_NORACE(UCA0STAT); MSP430REG_NORACE(UCA0TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { @@ -97,18 +97,48 @@ implementation { } async command msp430_uctl1_t Usci.getUctl1() { - return int2uctl1(UCA0CTL0); + return int2uctl1(UCA0CTL1); } + /* + * setUbr: change the Baud Rate divisor + * + * Modify the baud rate divisor for the usci. For this to + * take effect the module has to be reset. And resetting + * has the effect of bringing TXIFG up. We duplicate the + * behaviour of setModeUart or setModeSpi which would be + * used if setUbr wasn't available. Following the + * config modification any interrupts are cleared out. + * + * The BR registers are 2 bytes and accessed as two byte references. + * We want it to be atomic. On the x2xxx part can UBR be referenced + * as a single atomic word? (This is how it is done on the x5xxx). + * For now we do it atomically and using two byte references (because + * of the address space and according to TI documentation). + * + * WARNING: TXIFG is forced clear after a baud rate change + * similar to what setMode causes. + */ + async command void Usci.setUbr(uint16_t control) { atomic { - UCA0BR0 = control & 0x00FF; + if (UCA0CTL1 & UCSWRST) { /* if already reset, set and bail */ + UCA0BR0 = control & 0x00FF; + UCA0BR1 = (control >> 8) & 0x00FF; + return; + } + call Usci.resetUsci_n(); /* not reset, 1st reset */ + UCA0BR0 = control & 0x00FF; /* then set. */ UCA0BR1 = (control >> 8) & 0x00FF; + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } async command uint16_t Usci.getUbr() { - return (UCA0BR1 << 8) + UCA0BR0; + atomic { + return (UCA0BR1 << 8) + UCA0BR0; + } } async command void Usci.setUmctl(uint8_t control) { @@ -120,14 +150,22 @@ implementation { } async command void Usci.setUstat(uint8_t control) { - UCA0STAT=control; + UCA0STAT = control; } async command uint8_t Usci.getUstat() { return UCA0STAT; } - /* Operations */ + /* + * Reset/unReset + * + * resetUsci(bool): (deprecated) TRUE puts device into reset, FALSE takes it out. But this + * requires pushing the parameter on the stack and all those extra instructions. + * + * {un,}resetUsci_n(): reset and unreset the device but result in single instruction that + * sets or clears the appropriate bit in the h/w. + */ async command void Usci.resetUsci(bool reset) { if (reset) SET_FLAG(UCA0CTL1, UCSWRST); @@ -135,6 +173,14 @@ implementation { CLR_FLAG(UCA0CTL1, UCSWRST); } + async command void Usci.resetUsci_n() { + SET_FLAG(UCA0CTL1, UCSWRST); + } + + async command void Usci.unresetUsci_n() { + CLR_FLAG(UCA0CTL1, UCSWRST); + } + bool isSpi() { msp430_uctl0_t tmp; @@ -167,8 +213,8 @@ implementation { return USCI_I2C; if (isUart()) return USCI_UART; - else - return USCI_NONE; + + return USCI_NONE; } async command void Usci.enableSpi() { @@ -194,14 +240,23 @@ implementation { call Usci.setUmctl(0); /* MCTL <- 0 if spi */ } + /* + * setModeSpi: configure the usci for spi mode + * + * note: make sure all interrupts are clear when taking the port + * out of reset. There is an assumption in the system that the + * tx path needs a first write to fire off the interrupt system. + * + * Also note that resetting the usci will clear any interrupt enables + * for the device. Don't need to explicitly disableIntr. + */ async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); + call Usci.resetUsci_n(); call Usci.enableSpi(); configSpi(config); - call Usci.resetUsci(FALSE); + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } @@ -221,12 +276,31 @@ implementation { IFG2 &= ~UCA0TXIFG; } + /* + * clear any pending RxIntr. + * + * We want to clean out atomically any pending rx interrupt pending. + * This should also clean out any error bits that might have been set. + * The best way to do this is to simply read the RXBUF. The TI hardware + * atomically cleans out any error indicators and the IFG. + */ async command void Usci.clrRxIntr() { - IFG2 &= ~UCA0RXIFG; + uint8_t temp = call Usci.rx(); } + /* + * clrIntr: clear all rx and tx interrupts + * + * clear any pending interrupts. Intended to be used when + * starting up a port and we want a pristine state. + */ async command void Usci.clrIntr() { - IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); + uint8_t temp; + + atomic { + temp = call Usci.rx(); /* clean rx side out */ + IFG2 &= ~UCA0TXIFG; /* and turn off tx ifg */ + } } async command void Usci.disableRxIntr() { @@ -238,16 +312,40 @@ implementation { } async command void Usci.disableIntr() { - IE2 &= ~(UCA0TXIE | UCA0RXIE); + IE2 &= ~(UCA0TXIE | UCA0RXIE); } + /* + * enableRxIntr: allow rx interrupts + * + * Will clean out any pending rx interrupt and then enables. + * This assumes that any left over byte is stale and should be + * thrown away. Note that most likely there will be overrun and + * framing errors too. Starting pristine is the way to go. + */ async command void Usci.enableRxIntr() { + uint8_t temp; + atomic { - IFG2 &= ~UCA0RXIFG; - IE2 |= UCA0RXIE; + temp = call Usci.rx(); /* clean everything out */ + IE2 |= UCA0RXIE; /* and enable */ } } + /* + * enableTxIntr + * + * enable the usci tx h/w to interrupt. + * + * Note: The TI module when reset sets UCxxTXIFG so enabling the tx interrupt + * would cause an interrupt. Many implementations use this to cause + * the output path to fire up. + * + * TinyOS however assumes that one needs to fire off the first byte and this + * will cause a TX interrupt later which will fire up the output path. We + * clear out the pending tx interrupt. The first byte must be forced out by + * hand and then interrupts will continue the process. + */ async command void Usci.enableTxIntr() { atomic { IFG2 &= ~UCA0TXIFG; @@ -255,29 +353,28 @@ implementation { } } + /* + * enableIntr: enable rx and tx interrupts + * DEPRECATED. + * + * Doesn't make sense to do this. RX and TX side get dealt with independently + * so why would this ever get called? Deprecate. + * + * First clear out any pending rx or tx interrupt flags + * then set interrupt enables. + */ async command void Usci.enableIntr() { + uint8_t temp; + atomic { - IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); - IE2 |= (UCA0TXIE | UCA0RXIE); + temp = call Usci.rx(); /* clean out rx side */ + IFG2 &= ~UCA0TXIFG; /* and tx side */ + IE2 |= (UCA0TXIE | UCA0RXIE); /* enable both tx and rx */ } } - /* - * Returns true if the transmit path is empty. - * - * in the usart hardware there was a seperate bit that indicated - * both parts of the transmitter path were empty. The TXBUF and - * the outgoing shift register. - * - * Unfortunately, TI changed this in the USCI h/w to a single busy - * bit that indcates that either the tx or the rx path is busy. - * So if the transmitter is idle but we are receiving a character - * then we still think the transmitter is busy. TI sucks. - */ - async command bool Usci.isTxEmpty() { - if (UCA0STAT & UCBUSY) - return FALSE; - return TRUE; + async command bool Usci.isBusy() { + return (UCA0STAT & UCBUSY); } async command void Usci.tx(uint8_t data) { @@ -313,14 +410,23 @@ implementation { call Usci.setUmctl(config->uartRegisters.umctl); } + /* + * setModeUart: configure the usci for uart mode + * + * note: make sure all interrupts are clear when taking the port + * out of reset. There is an assumption in the system that the + * tx path needs a first write to fire off the interrupt system. + * + * Also note that resetting the usci will clear any interrupt enables + * for the device. Don't need to explicitly disableIntr. + */ async command void Usci.setModeUart(msp430_uart_union_config_t* config) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); + atomic { + call Usci.resetUsci_n(); call Usci.enableUart(); configUart(config); - call Usci.resetUsci(FALSE); + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } } diff --git a/tos/chips/msp430/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/usci/HplMsp430UsciA1P.nc index 81fd9c5d0e..2423753810 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciA1P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciA1P.nc @@ -1,7 +1,7 @@ /* - * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2010-2011, Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006, Arched Rock Corporation + * Copyright (c) 2005-2006, Arch Rock Corporation * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * @@ -72,6 +72,7 @@ implementation { MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCA1CTL0); MSP430REG_NORACE(UCA1CTL1); + MSP430REG_NORACE(UCA1STAT); MSP430REG_NORACE(UCA1TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { @@ -96,18 +97,48 @@ implementation { } async command msp430_uctl1_t Usci.getUctl1() { - return int2uctl1(UCA1CTL0); + return int2uctl1(UCA1CTL1); } + /* + * setUbr: change the Baud Rate divisor + * + * Modify the baud rate divisor for the usci. For this to + * take effect the module has to be reset. And resetting + * has the effect of bringing TXIFG up. We duplicate the + * behaviour of setModeUart or setModeSpi which would be + * used if setUbr wasn't available. Following the + * config modification any interrupts are cleared out. + * + * The BR registers are 2 bytes and accessed as two byte references. + * We want it to be atomic. On the x2xxx part can UBR be referenced + * as a single atomic word? (This is how it is done on the x5xxx). + * For now we do it atomically and using two byte references (because + * of the address space and according to TI documentation). + * + * WARNING: TXIFG is forced clear after a baud rate change + * similar to what setMode causes. + */ + async command void Usci.setUbr(uint16_t control) { atomic { - UCA1BR0 = control & 0x00FF; + if (UCA1CTL1 & UCSWRST) { /* if already reset, set and bail */ + UCA1BR0 = control & 0x00FF; + UCA1BR1 = (control >> 8) & 0x00FF; + return; + } + call Usci.resetUsci_n(); /* not reset, 1st reset */ + UCA1BR0 = control & 0x00FF; /* then set. */ UCA1BR1 = (control >> 8) & 0x00FF; + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } async command uint16_t Usci.getUbr() { - return (UCA1BR1 << 8) + UCA1BR0; + atomic { + return (UCA1BR1 << 8) + UCA1BR0; + } } async command void Usci.setUmctl(uint8_t control) { @@ -119,7 +150,7 @@ implementation { } async command void Usci.setUstat(uint8_t control) { - UCA1STAT=control; + UCA1STAT = control; } async command uint8_t Usci.getUstat() { @@ -134,6 +165,14 @@ implementation { CLR_FLAG(UCA1CTL1, UCSWRST); } + async command void Usci.resetUsci_n() { + SET_FLAG(UCA1CTL1, UCSWRST); + } + + async command void Usci.unresetUsci_n() { + CLR_FLAG(UCA1CTL1, UCSWRST); + } + bool isSpi() { msp430_uctl0_t tmp; @@ -155,9 +194,6 @@ implementation { return (tmp.ucsync == 0); } - /* - * Is this used? - */ async command bool Usci.isSpi() { return isSpi(); } @@ -169,8 +205,8 @@ implementation { return USCI_I2C; if (isUart()) return USCI_UART; - else - return USCI_NONE; + + return USCI_NONE; } async command void Usci.enableSpi() { @@ -196,14 +232,23 @@ implementation { call Usci.setUmctl(0); /* MCTL <- 0 if spi */ } + /* + * setModeSpi: configure the usci for spi mode + * + * note: make sure all interrupts are clear when taking the port + * out of reset. There is an assumption in the system that the + * tx path needs a first write to fire off the interrupt system. + * + * Also note that resetting the usci will clear any interrupt enables + * for the device. Don't need to explicitly disableIntr. + */ async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); + call Usci.resetUsci_n(); call Usci.enableSpi(); configSpi(config); - call Usci.resetUsci(FALSE); + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } @@ -223,12 +268,31 @@ implementation { UC1IFG &= ~UCA1TXIFG; } + /* + * clear any pending RxIntr. + * + * We want to clean out atomically any pending rx interrupt pending. + * This should also clean out any error bits that might have been set. + * The best way to do this is to simply read the RXBUF. The TI hardware + * atomically cleans out any error indicators and the IFG. + */ async command void Usci.clrRxIntr() { - UC1IFG &= ~UCA1RXIFG; + uint8_t temp = call Usci.rx(); } + /* + * clrIntr: clear all rx and tx interrupts + * + * clear any pending interrupts. Intended to be used when + * starting up a port and we want a pristine state. + */ async command void Usci.clrIntr() { - UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); + uint8_t temp; + + atomic { + temp = call Usci.rx(); /* clean rx side out */ + UC1IFG &= ~UCA1TXIFG; /* and turn off tx ifg */ + } } async command void Usci.disableRxIntr() { @@ -243,13 +307,37 @@ implementation { UC1IE &= ~(UCA1TXIE | UCA1RXIE); } + /* + * enableRxIntr: allow rx interrupts + * + * Will clean out any pending rx interrupt and then enables. + * This assumes that any left over byte is stale and should be + * thrown away. Note that most likely there will be overrun and + * framing errors too. Starting pristine is the way to go. + */ async command void Usci.enableRxIntr() { + uint8_t temp; + atomic { - UC1IFG &= ~UCA1RXIFG; - UC1IE |= UCA1RXIE; + temp = call Usci.rx(); /* clean everything out */ + UC1IE |= UCA1RXIE; /* and enable */ } } + /* + * enableTxIntr + * + * enable the usci tx h/w to interrupt. + * + * Note: The TI module when reset sets UCxxTXIFG so enabling the tx interrupt + * would cause an interrupt. Many implementations use this to cause + * the output path to fire up. + * + * TinyOS however assumes that one needs to fire off the first byte and this + * will cause a TX interrupt later which will fire up the output path. We + * clear out the pending tx interrupt. The first byte must be forced out by + * hand and then interrupts will continue the process. + */ async command void Usci.enableTxIntr() { atomic { UC1IFG &= ~UCA1TXIFG; @@ -257,29 +345,28 @@ implementation { } } + /* + * enableIntr: enable rx and tx interrupts + * DEPRECATED. + * + * Doesn't make sense to do this. RX and TX side get dealt with independently + * so why would this ever get called? Deprecate. + * + * First clear out any pending rx or tx interrupt flags + * then set interrupt enables. + */ async command void Usci.enableIntr() { + uint8_t temp; + atomic { - UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); - UC1IE |= (UCA1TXIE | UCA1RXIE); + temp = call Usci.rx(); /* clean out rx side */ + UC1IFG &= ~UCA1TXIFG; /* and tx side */ + UC1IE |= (UCA1TXIE | UCA1RXIE); /* enable both tx and rx */ } } - /* - * Returns true if the transmit path is empty. - * - * in the usart hardware there was a seperate bit that indicated - * both parts of the transmitter path were empty. The TXBUF and - * the outgoing shift register. - * - * Unfortunately, TI changed this in the USCI h/w to a single busy - * bit that indcates that either the tx or the rx path is busy. - * So if the transmitter is idle but we are receiving a character - * then we still think the transmitter is busy. TI sucks. - */ - async command bool Usci.isTxEmpty() { - if (UCA1STAT & UCBUSY) - return FALSE; - return TRUE; + async command bool Usci.isBusy() { + return (UCA1STAT & UCBUSY); } async command void Usci.tx(uint8_t data) { @@ -315,14 +402,23 @@ implementation { call Usci.setUmctl(config->uartRegisters.umctl); } + /* + * setModeUart: configure the usci for uart mode + * + * note: make sure all interrupts are clear when taking the port + * out of reset. There is an assumption in the system that the + * tx path needs a first write to fire off the interrupt system. + * + * Also note that resetting the usci will clear any interrupt enables + * for the device. Don't need to explicitly disableIntr. + */ async command void Usci.setModeUart(msp430_uart_union_config_t* config) { - atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); + atomic { + call Usci.resetUsci_n(); call Usci.enableUart(); configUart(config); - call Usci.resetUsci(FALSE); + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } } diff --git a/tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc b/tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc index 9b05222597..56b97ce6c6 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * All rights reserved. * @@ -36,7 +37,8 @@ * An HPL abstraction for USCI A/B shared vector interrupt on the MSP430X. * * @author Xavier Orduna - */ + * @author Eric B. Decker + */ #include "msp430usci.h" @@ -46,30 +48,77 @@ module HplMsp430UsciAB0RawInterruptsP @safe() { } implementation { + + /* + * The funny do {} while (0) sets a common structure for processing one + * interrupt and then returning (let higher priority interrupts in and + * minimize worse case executon time for the higher priority interrupts). + * + * This also sets a structure for tosthreads code which needs to add + * a call to postAmble at the end of every interrupt handler. + */ + TOSH_SIGNAL(USCIAB0RX_VECTOR) { uint8_t temp; - if (IFG2 & UCA0RXIFG){ - temp = UCA0RXBUF; - signal UsciA.rxDone(temp); - } - if (IFG2 & UCB0RXIFG){ - temp = UCB0RXBUF; - signal UsciB.rxDone(temp); - } + uint8_t ints_pending; + + do { + ints_pending = IFG2 & IE2; + if (ints_pending & UCA0RXIFG) { + /* + * WARNING: by reading the rxbuf register, it clears out any + * pending error flags/interrupts. Not very robust and the + * higher layers can't see the bits because they are gone. + * + * the osian x5xxx code has defined a reporting interface for + * signalling errors detected. This needs to get merged in at + * some point. + */ + temp = UCA0RXBUF; + signal UsciA.rxDone(temp); + break; + } + if (ints_pending & UCB0RXIFG) { + temp = UCB0RXBUF; + signal UsciB.rxDone(temp); + break; + } + } while (0); + return; } + TOSH_SIGNAL(USCIAB0TX_VECTOR) { - if ((IFG2 & UCA0TXIFG) | (IFG2 & UCA0RXIFG)){ - signal UsciA.txDone(); - } - if ((IFG2 & UCB0TXIFG) | (IFG2 & UCB0RXIFG)){ - signal UsciB.txDone(); - } + uint8_t ints_pending; + + do { + ints_pending = IFG2 & IE2; + /* + * This strange stuff is because the way the interrupts works + * changes around depending on the mode. Right now we just + * do the following. Needs to be fixed. + */ + if ((ints_pending & UCA0TXIFG) | (ints_pending & UCA0RXIFG)) { + signal UsciA.txDone(); + break; + } + if ((ints_pending & UCB0TXIFG) | (ints_pending & UCB0RXIFG)) { + signal UsciB.txDone(); + break; + } + } while (0); + return; } - /* default handlers */ - default async event void UsciA.txDone() { return; } - default async event void UsciA.rxDone(uint8_t temp) { return; } - default async event void UsciB.txDone() { return; } - default async event void UsciB.rxDone(uint8_t temp) { return; } + /* + * default handlers + * + * These probably need to clear out possible interrupt sources. + * Thing is if we wire into the interrupt handler then it is + * assumed the interrupts are properly handled. + */ + default async event void UsciA.txDone() { return; } + default async event void UsciA.rxDone(uint8_t temp) { return; } + default async event void UsciB.txDone() { return; } + default async event void UsciB.rxDone(uint8_t temp) { return; } } diff --git a/tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc b/tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc index ebdf3be3ad..f2773ba4d7 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * All rights reserved. * @@ -36,7 +37,8 @@ * An HPL abstraction for USCI A/B shared vector interrupt on the MSP430X. * * @author Xavier Orduna - */ + * @author Eric B. Decker + */ #include "msp430usci.h" @@ -46,30 +48,77 @@ module HplMsp430UsciAB1RawInterruptsP @safe() { } implementation { + + /* + * The funny do {} while (0) sets a common structure for processing one + * interrupt and then returning (let higher priority interrupts in and + * minimize worse case executon time for the higher priority interrupts). + * + * This also sets a structure for tosthreads code which needs to add + * a call to postAmble at the end of every interrupt handler. + */ + TOSH_SIGNAL(USCIAB1RX_VECTOR) { uint8_t temp; - if (UC1IFG & UCA1RXIFG) { - temp = UCA1RXBUF; - signal UsciA.rxDone(temp); - } - if (UC1IFG & UCB1RXIFG) { - temp = UCB1RXBUF; - signal UsciB.rxDone(temp); - } + uint8_t ints_pending; + + do { + ints_pending = UC1IFG & UC1IE; + if (ints_pending & UCA1RXIFG) { + /* + * WARNING: by reading the rxbuf register, it clears out any + * pending error flags/interrupts. Not very robust and the + * higher layers can't see the bits because they are gone. + * + * the osian x5xxx code has defined a reporting interface for + * signalling errors detected. This needs to get merged in at + * some point. + */ + temp = UCA1RXBUF; + signal UsciA.rxDone(temp); + break; + } + if (ints_pending & UCB1RXIFG) { + temp = UCB1RXBUF; + signal UsciB.rxDone(temp); + break; + } + } while (0); + return; } + TOSH_SIGNAL(USCIAB1TX_VECTOR) { - if ((UC1IFG & UCA1TXIFG) | (UC1IFG & UCA1RXIFG)) { - signal UsciA.txDone(); - } - if ((UC1IFG & UCB1TXIFG) | (UC1IFG & UCB1RXIFG)){ - signal UsciB.txDone(); - } + uint8_t ints_pending; + + do { + ints_pending = UC1IFG & UC1IE; + /* + * This strange stuff is because the way the interrupts works + * changes around depending on the mode. Right now we just + * do the following. Needs to be fixed. + */ + if ((ints_pending & UCA1TXIFG) | (ints_pending & UCA1RXIFG)) { + signal UsciA.txDone(); + break; + } + if ((ints_pending & UCB1TXIFG) | (ints_pending & UCB1RXIFG)) { + signal UsciB.txDone(); + break; + } + } while (0); + return; } - /* default handlers */ - default async event void UsciA.txDone() { return; } - default async event void UsciA.rxDone(uint8_t temp) { return; } - default async event void UsciB.txDone() { return; } - default async event void UsciB.rxDone(uint8_t temp) { return; } + /* + * default handlers + * + * These probably need to clear out possible interrupt sources. + * Thing is if we wire into the interrupt handler then it is + * assumed the interrupts are properly handled. + */ + default async event void UsciA.txDone() { return; } + default async event void UsciA.rxDone(uint8_t temp) { return; } + default async event void UsciB.txDone() { return; } + default async event void UsciB.rxDone(uint8_t temp) { return; } } diff --git a/tos/chips/msp430/usci/HplMsp430UsciB.nc b/tos/chips/msp430/usci/HplMsp430UsciB.nc index cb7064ecc2..7ffe7f303c 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2010-2011, Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. @@ -60,7 +60,13 @@ interface HplMsp430UsciB { async command void setUctl1(msp430_uctl1_t control); async command msp430_uctl1_t getUctl1(); - /* UCxxBR1 UCxxBR0 */ + /* UCxxBR1 UCxxBR0 + * + * set will install a new BR divisor. If the device is reset it + * is left reset. If running, the device is first reset, the new + * BR installed, and then taken out of reset. This causes the new + * BR to take effect. + */ async command void setUbr(uint16_t ubr); async command uint16_t getUbr(); @@ -74,12 +80,22 @@ interface HplMsp430UsciB { /* * resetUsci() - reset or unreset module port + * DEPRECATED * * reset: TRUE (set UCSWRST) * FALSE (unset UCSWRST), let the port run */ async command void resetUsci(bool reset); + /* + * resetUsci_n() + * unresetUsci_n() + * + * reset usci, no parameter. generates better code + */ + async command void resetUsci_n(); + async command void unresetUsci_n(); + /* * return enum indicating what mode the usci port in in. */ @@ -96,13 +112,18 @@ interface HplMsp430UsciB { async command bool isTxIntrPending(); async command bool isRxIntrPending(); - async command void clrRxIntr(); async command void clrTxIntr(); + async command void clrRxIntr(); async command void clrIntr(); - /** + /* + * TI h/w provides a busy bit. return tx or rx is doing something + */ + async command bool isBusy(); + + /* * Transmit a byte of data. When the transmission is completed, - * txDone is generated. Only then a new byte may be + * txDone is signaled. Only then a new byte may be * transmitted, otherwise the previous byte will be overwritten. */ async command void tx(uint8_t data); @@ -164,11 +185,16 @@ interface HplMsp430UsciB { async command void setTransmitMode(); async command void setReceiveMode(); + /* get bits of uctl1 in i2c mode */ + async command bool getStopBit(); + async command bool getTransmitReceiveMode(); + /* h/w bits for controlling what to send next when master */ async command void setTXNACK(); async command void setTXStop(); async command void setTXStart(); + /* Address this i2c module responds to */ async command uint16_t getOwnAddress(); async command void setOwnAddress( uint16_t addr ); @@ -176,17 +202,10 @@ interface HplMsp430UsciB { async command void clearGeneralCall(); async command void setGeneralCall(); - /* set master/slave mode, i2c */ - async command void setSlaveMode(); - async command void setMasterMode(); - - /* get bits of uctl1 in i2c mode */ - async command bool getStopBit(); - async command bool getTransmitReceiveMode(); - - /* when master the SLA (slave address register says who we - are talking to. - */ + /* + * when master the SLA (slave address register says who we + * are talking to. + */ async command uint16_t getSlaveAddress(); async command void setSlaveAddress(uint16_t addr); @@ -201,4 +220,14 @@ interface HplMsp430UsciB { async command void disableArbLostInt(); async command void enableArbLostInt(); + +#ifdef notdef + /* + * set master/slave mode, i2c + * DEPRECATED. Slave or master mode isn't changed on the fly + * but rather is set via a config block. + */ + async command void setSlaveMode(); + async command void setMasterMode(); +#endif } diff --git a/tos/chips/msp430/usci/HplMsp430UsciB0C.nc b/tos/chips/msp430/usci/HplMsp430UsciB0C.nc index dad344b408..89710ce8ed 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB0C.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB0C.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. @@ -40,13 +41,16 @@ * @author Jonathan Hui * @author Joe Polastre * @author Xavier Orduna + * @author Eric B. Decker */ #include "msp430usci.h" configuration HplMsp430UsciB0C { - provides interface HplMsp430UsciB; - provides interface HplMsp430UsciInterrupts; + provides { + interface HplMsp430UsciB; + interface HplMsp430UsciInterrupts; + } } implementation { @@ -58,6 +62,8 @@ implementation { HplUsciP.SIMO -> GIO.UCB0SIMO; HplUsciP.SOMI -> GIO.UCB0SOMI; HplUsciP.UCLK -> GIO.UCB0CLK; + HplUsciP.USDA -> GIO.UCB0SDA; + HplUsciP.USCL -> GIO.UCB0SCL; components HplMsp430UsciAB0RawInterruptsP as UsciRawInterrupts; HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciB; diff --git a/tos/chips/msp430/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/usci/HplMsp430UsciB0P.nc index eafa26b6dc..afdb9a45a9 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB0P.nc @@ -1,7 +1,7 @@ /* - * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009-2010 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * @@ -38,8 +38,8 @@ #include "msp430usci.h" /* - * Implementation of USCIB0 low level functionality - stateless. - * Setting a mode will by default disable USCIB0 interrupts. + * Implementation of Usci_B0 (spi or i2c) lowlevel functionality - stateless. + * Setting a mode will by default disable USCI-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui @@ -57,13 +57,18 @@ */ module HplMsp430UsciB0P @safe() { - provides interface HplMsp430UsciB as Usci; - provides interface HplMsp430UsciInterrupts as Interrupts; - - uses interface HplMsp430GeneralIO as SIMO; - uses interface HplMsp430GeneralIO as SOMI; - uses interface HplMsp430GeneralIO as UCLK; - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; + provides { + interface HplMsp430UsciB as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as UCLK; + interface HplMsp430GeneralIO as USDA; + interface HplMsp430GeneralIO as USCL; + interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; + } } implementation { @@ -71,6 +76,7 @@ implementation { MSP430REG_NORACE(IFG2); MSP430REG_NORACE(UCB0CTL0); MSP430REG_NORACE(UCB0CTL1); + MSP430REG_NORACE(UCB0STAT); MSP430REG_NORACE(UCB0RXBUF); MSP430REG_NORACE(UCB0TXBUF); MSP430REG_NORACE(UCB0I2COA); @@ -86,7 +92,7 @@ implementation { /* Control registers */ async command void Usci.setUctl0(msp430_uctl0_t control) { - UCB0CTL0=uctl02int(control); + UCB0CTL0 = uctl02int(control); } async command msp430_uctl0_t Usci.getUctl0() { @@ -94,22 +100,43 @@ implementation { } async command void Usci.setUctl1(msp430_uctl1_t control) { - UCB0CTL1=uctl12int(control); + UCB0CTL1 = uctl12int(control); } async command msp430_uctl1_t Usci.getUctl1() { return int2uctl1(UCB0CTL1); } + /* + * setUbr: change the Baud Rate divisor + * + * Modify the baud rate divisor for the usci. For this to + * take effect the module has to be reset. And resetting + * has the effect of bringing TXIFG up. We duplicate the + * behaviour of setModeUart or setModeSpi which would be + * used if setUbr wasn't available. Following the + * config modification any interrupts are cleared out. + */ + async command void Usci.setUbr(uint16_t control) { atomic { + if (UCB0CTL1 & UCSWRST) { + UCB0BR0 = control & 0x00FF; + UCB0BR1 = (control >> 8) & 0x00FF; + return; + } + call Usci.resetUsci_n(); UCB0BR0 = control & 0x00FF; UCB0BR1 = (control >> 8) & 0x00FF; + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } async command uint16_t Usci.getUbr() { - return (UCB0BR1 << 8) + UCB0BR0; + atomic { + return (UCB0BR1 << 8) + UCB0BR0; + } } async command void Usci.setUstat(uint8_t control) { @@ -120,7 +147,15 @@ implementation { return UCB0STAT; } - /* Operations */ + /* + * Reset/unReset + * + * resetUsci(bool): (deprecated) TRUE puts device into reset, FALSE takes it out. But this + * requires pushing the parameter on the stack and all those extra instructions. + * + * {un,}resetUsci_n(): reset and unreset the device but result in single instruction that + * sets or clears the appropriate bit in the h/w. + */ async command void Usci.resetUsci(bool reset) { if (reset) SET_FLAG(UCB0CTL1, UCSWRST); @@ -128,6 +163,14 @@ implementation { CLR_FLAG(UCB0CTL1, UCSWRST); } + async command void Usci.resetUsci_n() { + SET_FLAG(UCB0CTL1, UCSWRST); + } + + async command void Usci.unresetUsci_n() { + CLR_FLAG(UCB0CTL1, UCSWRST); + } + bool isSpi() { msp430_uctl0_t tmp; @@ -142,10 +185,6 @@ implementation { return (tmp.ucsync && tmp.ucmode == 3); } - async command bool Usci.isSpi() { - return isSpi(); - } - async command msp430_uscimode_t Usci.getMode() { if (isSpi()) return USCI_SPI; @@ -170,20 +209,34 @@ implementation { } } + async command bool Usci.isSpi() { + return isSpi(); + } + void configSpi(msp430_spi_union_config_t* config) { UCB0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); + /* MCTL is zero'd by reset? Check it out */ } + /* + * setModeSpi: configure the usci for spi mode + * + * note: make sure all interrupts are clear when taking the port + * out of reset. There is an assumption in the system that the + * tx path needs a first write to fire off the interrupt system. + * + * Also note that resetting the usci will clear any interrupt enables + * for the device. Don't need to explicitly disableIntr. + */ async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); + call Usci.resetUsci_n(); call Usci.enableSpi(); configSpi(config); - call Usci.resetUsci(FALSE); + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } @@ -203,12 +256,31 @@ implementation { IFG2 &= ~UCB0TXIFG; } + /* + * clear any pending RxIntr. + * + * We want to clean out atomically any pending rx interrupt pending. + * This should also clean out any error bits that might have been set. + * The best way to do this is to simply read the RXBUF. The TI hardware + * atomically cleans out any error indicators and the IFG. + */ async command void Usci.clrRxIntr() { - IFG2 &= ~UCB0RXIFG; + uint8_t temp = call Usci.rx(); } + /* + * clrIntr: clear all rx and tx interrupts + * + * clear any pending interrupts. Intended to be used when + * starting up a port and we want a pristine state. + */ async command void Usci.clrIntr() { - IFG2 &= ~(UCB0TXIFG | UCB0RXIFG); + uint8_t temp; + + atomic { + temp = call Usci.rx(); /* clean rx side out */ + IFG2 &= ~UCB0TXIFG; /* and turn off tx ifg */ + } } async command void Usci.disableRxIntr() { @@ -223,13 +295,37 @@ implementation { IE2 &= ~(UCB0TXIE | UCB0RXIE); } + /* + * enableRxIntr: allow rx interrupts + * + * Will clean out any pending rx interrupt and then enables. + * This assumes that any left over byte is stale and should be + * thrown away. Note that most likely there will be overrun and + * framing errors too. Starting pristine is the way to go. + */ async command void Usci.enableRxIntr() { + uint8_t temp; + atomic { - IFG2 &= ~UCB0RXIFG; - IE2 |= UCB0RXIE; + temp = call Usci.rx(); /* clean everything out */ + IE2 |= UCB0RXIE; /* and enable */ } } + /* + * enableTxIntr + * + * enable the usci tx h/w to interrupt. + * + * Note: The TI module when reset sets UCxxTXIFG so enabling the tx interrupt + * would cause an interrupt. Many implementations use this to cause + * the output path to fire up. + * + * TinyOS however assumes that one needs to fire off the first byte and this + * will cause a TX interrupt later which will fire up the output path. We + * clear out the pending tx interrupt. The first byte must be forced out by + * hand and then interrupts will continue the process. + */ async command void Usci.enableTxIntr() { atomic { IFG2 &= ~UCB0TXIFG; @@ -237,13 +333,30 @@ implementation { } } + /* + * enableIntr: enable rx and tx interrupts + * DEPRECATED. + * + * Doesn't make sense to do this. RX and TX side get dealt with independently + * so why would this ever get called? Deprecate. + * + * First clear out any pending rx or tx interrupt flags + * then set interrupt enables. + */ async command void Usci.enableIntr() { + uint8_t temp; + atomic { - IFG2 &= ~(UCB0TXIFG | UCB0RXIFG); - IE2 |= (UCB0TXIE | UCB0RXIE); + temp = call Usci.rx(); /* clean out rx side */ + IFG2 &= ~UCB0TXIFG; /* and tx side */ + IE2 |= (UCB0TXIE | UCB0RXIE); /* enable both tx and rx */ } } + async command bool Usci.isBusy() { + return (UCB0STAT & UCBUSY); + } + async command void Usci.tx(uint8_t data) { UCB0TXBUF = data; } @@ -259,23 +372,17 @@ implementation { return isI2C(); } - - /* CHECK ME! - * b1p messes with usda and uscl. shouldn't b0p do the same? - */ async command void Usci.enableI2C() { atomic { - call SIMO.selectModuleFunc(); - call SOMI.selectModuleFunc(); - call UCLK.selectModuleFunc(); + call USDA.selectModuleFunc(); + call USCL.selectModuleFunc(); } } async command void Usci.disableI2C() { atomic { - call SIMO.selectIOFunc(); - call SOMI.selectIOFunc(); - call UCLK.selectIOFunc(); + call USDA.selectIOFunc(); + call USCL.selectIOFunc(); } } @@ -290,30 +397,18 @@ implementation { async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); + call Usci.resetUsci_n(); call Usci.enableI2C(); configI2C(config); - call Usci.resetUsci(FALSE); + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } - async command uint16_t Usci.getOwnAddress() { - return (UCB0I2COA & ~UCGCEN); - } - - async command void Usci.setOwnAddress( uint16_t addr ) { - UCB0I2COA &= UCGCEN; - UCB0I2COA |= (addr & ~UCGCEN); - } - /* * commands subsummed into config structure. * - * setMasterMode, setSlaveMode, getTransmitReceiveMode, setTransmitMode, - * setReceiveMode, getStopBit, setStopBit, getStartBit, - * setStartBit, + * setMasterMode, setSlaveMode * * the get commands can be replaced by .getUctl0 etc. * @@ -325,23 +420,32 @@ implementation { async command void Usci.setTransmitMode() { UCB0CTL1 |= UCTR; } async command void Usci.setReceiveMode() { UCB0CTL1 &= ~UCTR; } + /* get stop bit in i2c mode */ + async command bool Usci.getStopBit() { return (UCB0CTL1 & UCTXSTP); } + async command bool Usci.getTransmitReceiveMode() { return (UCB0CTL1 & UCTR); } + /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ async command void Usci.setTXNACK() { UCB0CTL1 |= UCTXNACK; } async command void Usci.setTXStop() { UCB0CTL1 |= UCTXSTP; } async command void Usci.setTXStart() { UCB0CTL1 |= UCTXSTT; } + /* + * get/set I2COA, Own Address register + * clears UCGCEN, Genernal Call response enable + */ + async command uint16_t Usci.getOwnAddress() { + return (UCB0I2COA & ~UCGCEN); + } + + async command void Usci.setOwnAddress( uint16_t addr ) { + UCB0I2COA &= UCGCEN; /* currently preserves GC enable */ + UCB0I2COA |= (addr & ~UCGCEN); + } + /* set whether to respond to GeneralCall. */ async command void Usci.clearGeneralCall() { UCB0I2COA &= ~UCGCEN; } async command void Usci.setGeneralCall() { UCB0I2COA |= UCGCEN; } - /* set master/slave mode, i2c */ - async command void Usci.setSlaveMode() { UCB0CTL0 |= UCMST; } - async command void Usci.setMasterMode() { UCB0CTL0 &= ~UCMST; } - - /* get stop bit in i2c mode */ - async command bool Usci.getStopBit() { return (UCB0CTL1 & UCTXSTP); } - async command bool Usci.getTransmitReceiveMode() { return (UCB0CTL1 & UCTR); } - /* get/set Slave Address, i2cSA */ async command uint16_t Usci.getSlaveAddress() { return UCB0I2CSA; } async command void Usci.setSlaveAddress( uint16_t addr ) { UCB0I2CSA = addr; } diff --git a/tos/chips/msp430/usci/HplMsp430UsciB1C.nc b/tos/chips/msp430/usci/HplMsp430UsciB1C.nc index cce6a3fd60..ababfce497 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB1C.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB1C.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. @@ -40,13 +41,16 @@ * @author Jonathan Hui * @author Joe Polastre * @author Xavier Orduna + * @author Eric B. Decker */ #include "msp430usci.h" configuration HplMsp430UsciB1C { - provides interface HplMsp430UsciB; - provides interface HplMsp430UsciInterrupts; + provides { + interface HplMsp430UsciB; + interface HplMsp430UsciInterrupts; + } } implementation { diff --git a/tos/chips/msp430/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/usci/HplMsp430UsciB1P.nc index 978714618e..4a6e94ec89 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB1P.nc @@ -1,7 +1,7 @@ /* - * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009-2010 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * @@ -38,8 +38,8 @@ #include "msp430usci.h" /* - * Implementation of USCIB1 lowlevel functionality - stateless. - * Setting a mode will by default disable USCIB1 interrupts. + * Implementation of Usci_B1 (spi or i2c) lowlevel functionality - stateless. + * Setting a mode will by default disable USCI-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui @@ -57,16 +57,18 @@ */ module HplMsp430UsciB1P @safe() { - provides interface HplMsp430UsciB as Usci; - provides interface HplMsp430UsciInterrupts as Interrupts; - - uses interface HplMsp430GeneralIO as SIMO; - uses interface HplMsp430GeneralIO as SOMI; - uses interface HplMsp430GeneralIO as UCLK; - uses interface HplMsp430GeneralIO as USDA; - uses interface HplMsp430GeneralIO as USCL; - - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; + provides { + interface HplMsp430UsciB as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as UCLK; + interface HplMsp430GeneralIO as USDA; + interface HplMsp430GeneralIO as USCL; + interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; + } } implementation { @@ -74,6 +76,7 @@ implementation { MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCB1CTL0); MSP430REG_NORACE(UCB1CTL1); + MSP430REG_NORACE(UCB1STAT); MSP430REG_NORACE(UCB1RXBUF); MSP430REG_NORACE(UCB1TXBUF); MSP430REG_NORACE(UCB1I2COA); @@ -89,7 +92,7 @@ implementation { /* Control registers */ async command void Usci.setUctl0(msp430_uctl0_t control) { - UCB1CTL0=uctl02int(control); + UCB1CTL0 = uctl02int(control); } async command msp430_uctl0_t Usci.getUctl0() { @@ -97,22 +100,43 @@ implementation { } async command void Usci.setUctl1(msp430_uctl1_t control) { - UCB1CTL1=uctl12int(control); + UCB1CTL1 = uctl12int(control); } async command msp430_uctl1_t Usci.getUctl1() { return int2uctl1(UCB1CTL1); } + /* + * setUbr: change the Baud Rate divisor + * + * Modify the baud rate divisor for the usci. For this to + * take effect the module has to be reset. And resetting + * has the effect of bringing TXIFG up. We duplicate the + * behaviour of setModeUart or setModeSpi which would be + * used if setUbr wasn't available. Following the + * config modification any interrupts are cleared out. + */ + async command void Usci.setUbr(uint16_t control) { atomic { + if (UCB1CTL1 & UCSWRST) { + UCB1BR0 = control & 0x00FF; + UCB1BR1 = (control >> 8) & 0x00FF; + return; + } + call Usci.resetUsci_n(); UCB1BR0 = control & 0x00FF; UCB1BR1 = (control >> 8) & 0x00FF; + call Usci.unresetUsci_n(); + call Usci.clrIntr(); } } async command uint16_t Usci.getUbr() { - return (UCB1BR1 << 8) + UCB1BR0; + atomic { + return (UCB1BR1 << 8) + UCB1BR0; + } } async command void Usci.setUstat(uint8_t control) { @@ -123,7 +147,15 @@ implementation { return UCB1STAT; } - /* Operations */ + /* + * Reset/unReset + * + * resetUsci(bool): (deprecated) TRUE puts device into reset, FALSE takes it out. But this + * requires pushing the parameter on the stack and all those extra instructions. + * + * {un,}resetUsci_n(): reset and unreset the device but result in single instruction that + * sets or clears the appropriate bit in the h/w. + */ async command void Usci.resetUsci(bool reset) { if (reset) SET_FLAG(UCB1CTL1, UCSWRST); @@ -131,6 +163,14 @@ implementation { CLR_FLAG(UCB1CTL1, UCSWRST); } + async command void Usci.resetUsci_n() { + SET_FLAG(UCB1CTL1, UCSWRST); + } + + async command void Usci.unresetUsci_n() { + CLR_FLAG(UCB1CTL1, UCSWRST); + } + bool isSpi() { msp430_uctl0_t tmp; @@ -145,10 +185,6 @@ implementation { return (tmp.ucsync && tmp.ucmode == 3); } - async command bool Usci.isSpi() { - return isSpi(); - } - async command msp430_uscimode_t Usci.getMode() { if (isSpi()) return USCI_SPI; @@ -173,21 +209,35 @@ implementation { } } + async command bool Usci.isSpi() { + return isSpi(); + } + void configSpi(msp430_spi_union_config_t* config) { UCB1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); + /* MCTL is zero'd by reset? Check it out */ } + /* + * setModeSpi: configure the usci for spi mode + * + * note: make sure all interrupts are clear when taking the port + * out of reset. There is an assumption in the system that the + * tx path needs a first write to fire off the interrupt system. + * + * Also note that resetting the usci will clear any interrupt enables + * for the device. Don't need to explicitly disableIntr. + */ async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); + call Usci.resetUsci_n(); call Usci.enableSpi(); configSpi(config); - call Usci.resetUsci(FALSE); - } + call Usci.unresetUsci_n(); + call Usci.clrIntr(); + } } async command bool Usci.isTxIntrPending(){ @@ -206,12 +256,31 @@ implementation { UC1IFG &= ~UCB1TXIFG; } + /* + * clear any pending RxIntr. + * + * We want to clean out atomically any pending rx interrupt pending. + * This should also clean out any error bits that might have been set. + * The best way to do this is to simply read the RXBUF. The TI hardware + * atomically cleans out any error indicators and the IFG. + */ async command void Usci.clrRxIntr() { - UC1IFG &= ~UCB1RXIFG; + uint8_t temp = call Usci.rx(); } + /* + * clrIntr: clear all rx and tx interrupts + * + * clear any pending interrupts. Intended to be used when + * starting up a port and we want a pristine state. + */ async command void Usci.clrIntr() { - UC1IFG &= ~(UCB1TXIFG | UCB1RXIFG); + uint8_t temp; + + atomic { + temp = call Usci.rx(); /* clean rx side out */ + UC1IFG &= ~UCB1TXIFG; /* and turn off tx ifg */ + } } async command void Usci.disableRxIntr() { @@ -226,13 +295,37 @@ implementation { UC1IE &= ~(UCB1TXIE | UCB1RXIE); } + /* + * enableRxIntr: allow rx interrupts + * + * Will clean out any pending rx interrupt and then enables. + * This assumes that any left over byte is stale and should be + * thrown away. Note that most likely there will be overrun and + * framing errors too. Starting pristine is the way to go. + */ async command void Usci.enableRxIntr() { + uint8_t temp; + atomic { - UC1IFG &= ~UCB1RXIFG; - UC1IE |= UCB1RXIE; + temp = call Usci.rx(); /* clean everything out */ + UC1IE |= UCB1RXIE; /* and enable */ } } + /* + * enableTxIntr + * + * enable the usci tx h/w to interrupt. + * + * Note: The TI module when reset sets UCxxTXIFG so enabling the tx interrupt + * would cause an interrupt. Many implementations use this to cause + * the output path to fire up. + * + * TinyOS however assumes that one needs to fire off the first byte and this + * will cause a TX interrupt later which will fire up the output path. We + * clear out the pending tx interrupt. The first byte must be forced out by + * hand and then interrupts will continue the process. + */ async command void Usci.enableTxIntr() { atomic { UC1IFG &= ~UCB1TXIFG; @@ -240,13 +333,30 @@ implementation { } } + /* + * enableIntr: enable rx and tx interrupts + * DEPRECATED. + * + * Doesn't make sense to do this. RX and TX side get dealt with independently + * so why would this ever get called? Deprecate. + * + * First clear out any pending rx or tx interrupt flags + * then set interrupt enables. + */ async command void Usci.enableIntr() { + uint8_t temp; + atomic { - UC1IFG &= ~(UCB1TXIFG | UCB1RXIFG); - UC1IE |= (UCB1TXIE | UCB1RXIE); + temp = call Usci.rx(); /* clean out rx side */ + UC1IFG &= ~UCB1TXIFG; /* and tx side */ + UC1IE |= (UCB1TXIE | UCB1RXIE); /* enable both tx and rx */ } } + async command bool Usci.isBusy() { + return (UCB1STAT & UCBUSY); + } + async command void Usci.tx(uint8_t data) { UCB1TXBUF = data; } @@ -264,9 +374,6 @@ implementation { async command void Usci.enableI2C() { atomic { - // this should be removed, only for z1 - P5OUT |= 0x06; - P5REN |= 0x06; call USDA.selectModuleFunc(); call USCL.selectModuleFunc(); } @@ -290,30 +397,18 @@ implementation { async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { atomic { - call Usci.disableIntr(); - call Usci.clrIntr(); - call Usci.resetUsci(TRUE); + call Usci.resetUsci_n(); call Usci.enableI2C(); configI2C(config); - call Usci.resetUsci(FALSE); - } - } - - async command uint16_t Usci.getOwnAddress() { - return UCB1I2COA & ~UCGCEN; - } - - async command void Usci.setOwnAddress( uint16_t addr ) { - UCB1I2COA &= UCGCEN; - UCB1I2COA |= (addr & ~UCGCEN); + call Usci.unresetUsci_n(); + call Usci.clrIntr(); + } } /* * commands subsummed into config structure. * - * setMasterMode, setSlaveMode, getTransmitReceiveMode, setTransmitMode, - * setReceiveMode, getStopBit, setStopBit, getStartBit, - * setStartBit, + * setMasterMode, setSlaveMode * * the get commands can be replaced by .getUctl0 etc. * @@ -325,26 +420,35 @@ implementation { async command void Usci.setTransmitMode() { UCB1CTL1 |= UCTR; } async command void Usci.setReceiveMode() { UCB1CTL1 &= ~UCTR; } + /* get stop bit in i2c mode */ + async command bool Usci.getStopBit() { return (UCB1CTL1 & UCTXSTP); } + async command bool Usci.getTransmitReceiveMode() { return (UCB1CTL1 & UCTR); } + /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ async command void Usci.setTXNACK() { UCB1CTL1 |= UCTXNACK; } async command void Usci.setTXStop() { UCB1CTL1 |= UCTXSTP; } async command void Usci.setTXStart() { UCB1CTL1 |= UCTXSTT; } + /* + * get/set I2COA, Own Address register + * clears UCGCEN, Genernal Call response enable + */ + async command uint16_t Usci.getOwnAddress() { + return (UCB1I2COA & ~UCGCEN); + } + + async command void Usci.setOwnAddress( uint16_t addr ) { + UCB1I2COA &= UCGCEN; /* currently preserves GC enable */ + UCB1I2COA |= (addr & ~UCGCEN); + } + /* set whether to respond to GeneralCall. */ async command void Usci.clearGeneralCall() { UCB1I2COA &= ~UCGCEN; } async command void Usci.setGeneralCall() { UCB1I2COA |= UCGCEN; } - /* set master/slave mode, i2c */ - async command void Usci.setSlaveMode() { UCB1CTL0 |= UCMST; } - async command void Usci.setMasterMode() { UCB1CTL0 &= ~UCMST; } - - /* get stop bit in i2c mode */ - async command bool Usci.getStopBit() { return (UCB1CTL1 & UCTXSTP); } - async command bool Usci.getTransmitReceiveMode() { return (UCB1CTL1 & UCTR); } - /* get/set Slave Address, i2cSA */ - async command uint16_t Usci.getSlaveAddress() { atomic { return UCB1I2CSA; } } - async command void Usci.setSlaveAddress( uint16_t addr ) { atomic { UCB1I2CSA = addr; } } + async command uint16_t Usci.getSlaveAddress() { return UCB1I2CSA; } + async command void Usci.setSlaveAddress( uint16_t addr ) { UCB1I2CSA = addr; } /* enable/disable NACK interrupt */ async command void Usci.disableNACKInt() { UCB1I2CIE &= ~UCNACKIE; } diff --git a/tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc b/tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc index 4106849356..52a4e86264 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc @@ -47,8 +47,8 @@ interface HplMsp430UsciInterrupts { /* - * A byte of data is about to be transmitted, ie. the TXBuffer is - * empty and ready to accept next byte. + * The transmitter can accept another byte of data. ie. The + * previous byte has left the tx_buf. */ async event void txDone(); diff --git a/tos/chips/msp430/usci/Msp430I2C0C.nc b/tos/chips/msp430/usci/Msp430I2C0C.nc new file mode 100644 index 0000000000..32b5a37c13 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430I2C0C.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Jonathan Hui + * @author Xavier Orduna + * @author Eric B. Decker + */ + +#include +#include "msp430usci.h" + +generic configuration Msp430I2C0C() { + provides { + interface Resource; + interface ResourceRequested; + interface I2CPacket as I2CBasicAddr; + } + uses interface Msp430I2CConfigure; +} + +implementation { + enum { + CLIENT_ID = unique(MSP430_I2C0_BUS), + }; + + components Msp430I2C0P as I2CP; + Resource = I2CP.Resource[CLIENT_ID]; + I2CBasicAddr = I2CP.I2CBasicAddr; + Msp430I2CConfigure = I2CP.Msp430I2CConfigure[CLIENT_ID]; + + components new Msp430UsciB0C() as UsciC; + ResourceRequested = UsciC; + I2CP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; + I2CP.UsciResource[CLIENT_ID] -> UsciC.Resource; + I2CP.Interrupts -> UsciC.HplMsp430UsciInterrupts; +} diff --git a/tos/chips/msp430/usci/Msp430I2C0P.nc b/tos/chips/msp430/usci/Msp430I2C0P.nc new file mode 100644 index 0000000000..d3e03c0310 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430I2C0P.nc @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Jonathan Hui + * @author Xavier Orduna + * @author Eric B. Decker + */ + +configuration Msp430I2C0P { + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface I2CPacket as I2CBasicAddr; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430I2CConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as Interrupts; + } +} + +implementation { + components new Msp430I2CP() as I2CP; + Resource = I2CP.Resource; + ResourceConfigure = I2CP.ResourceConfigure; + Msp430I2CConfigure = I2CP.Msp430I2CConfigure; + I2CBasicAddr = I2CP.I2CBasicAddr; + UsciResource = I2CP.UsciResource; + Interrupts = I2CP.Interrupts; + + components HplMsp430UsciB0C as UsciC; + I2CP.UsciB -> UsciC; +} diff --git a/tos/chips/msp430/usci/Msp430I2C1C.nc b/tos/chips/msp430/usci/Msp430I2C1C.nc index aa16ad2bda..52dd0c6391 100644 --- a/tos/chips/msp430/usci/Msp430I2C1C.nc +++ b/tos/chips/msp430/usci/Msp430I2C1C.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. @@ -36,32 +37,34 @@ /* * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ #include #include "msp430usci.h" generic configuration Msp430I2C1C() { - provides interface Resource; - provides interface ResourceRequested; - provides interface I2CPacket as I2CBasicAddr; - + provides { + interface Resource; + interface ResourceRequested; + interface I2CPacket as I2CBasicAddr; + } uses interface Msp430I2CConfigure; } implementation { enum { - CLIENT_ID = unique( MSP430_I2C1_BUS ), + CLIENT_ID = unique(MSP430_I2C1_BUS), }; components Msp430I2C1P as I2CP; - Resource = I2CP.Resource[ CLIENT_ID ]; + Resource = I2CP.Resource[CLIENT_ID]; I2CBasicAddr = I2CP.I2CBasicAddr; - Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ]; + Msp430I2CConfigure = I2CP.Msp430I2CConfigure[CLIENT_ID]; components new Msp430UsciB1C() as UsciC; ResourceRequested = UsciC; - I2CP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; - I2CP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; + I2CP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; + I2CP.UsciResource[CLIENT_ID] -> UsciC.Resource; I2CP.Interrupts -> UsciC.HplMsp430UsciInterrupts; } diff --git a/tos/chips/msp430/usci/Msp430I2C1P.nc b/tos/chips/msp430/usci/Msp430I2C1P.nc index 65e62eec1e..098a7ff723 100644 --- a/tos/chips/msp430/usci/Msp430I2C1P.nc +++ b/tos/chips/msp430/usci/Msp430I2C1P.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. @@ -36,16 +37,20 @@ /* * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ configuration Msp430I2C1P { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[uint8_t id ]; - provides interface I2CPacket as I2CBasicAddr; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430I2CConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as Interrupts; + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface I2CPacket as I2CBasicAddr; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430I2CConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as Interrupts; + } } implementation { diff --git a/tos/chips/msp430/usci/Msp430I2CP.nc b/tos/chips/msp430/usci/Msp430I2CP.nc index 0ca613e4b0..9a6e84a148 100644 --- a/tos/chips/msp430/usci/Msp430I2CP.nc +++ b/tos/chips/msp430/usci/Msp430I2CP.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. @@ -44,14 +44,17 @@ #include generic module Msp430I2CP() { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface I2CPacket as I2CBasicAddr; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430I2CConfigure[ uint8_t id ]; - uses interface HplMsp430UsciB as UsciB; - uses interface HplMsp430UsciInterrupts as Interrupts; + provides { + interface Resource[ uint8_t id ]; + interface ResourceConfigure[ uint8_t id ]; + interface I2CPacket as I2CBasicAddr; + } + uses { + interface Resource as UsciResource[ uint8_t id ]; + interface Msp430I2CConfigure[ uint8_t id ]; + interface HplMsp430UsciB as UsciB; + interface HplMsp430UsciInterrupts as Interrupts; + } } implementation { @@ -144,18 +147,18 @@ implementation { } call UsciB.setTransmitMode(); - call UsciB.setSlaveAddress( addr ); + call UsciB.setSlaveAddress(addr); call UsciB.enableTxIntr(); - if ( flags & I2C_START ) { - while(call UsciB.getStopBit()) { - if(i>=TIMEOUT) + if (flags & I2C_START) { + while (call UsciB.getStopBit()) { + if (i >= TIMEOUT) return EBUSY; i++; } i=0; while((call UsciB.getUstat()) & UCBBUSY) { - if(i>=TIMEOUT) + if (i >= TIMEOUT) return FAIL; i++; } @@ -169,24 +172,22 @@ implementation { uint16_t i=0; /* this needs to be fixed. software delay not so great */ - - for(i=0xffff;i!=0;i--); //software delay (aprox 25msec on z1) - + for(i = 0xffff; i != 0;i--); //software delay (aprox 25msec on z1) if ( m_pos == m_len ) { if ( m_flags & I2C_STOP ) { call UsciB.setTXStop(); - while(!call UsciB.getStopBit()) { - if(i >= TIMEOUT) { - signalDone( EBUSY ); + while (!call UsciB.getStopBit()) { + if (i >= TIMEOUT) { /* eh. this looks broken */ + signalDone(EBUSY); return; } i++; } - signalDone( SUCCESS ); + signalDone(SUCCESS); } else - signalDone( SUCCESS ); + signalDone(SUCCESS); } else { - m_buf[ m_pos++ ] = call UsciB.rx(); + m_buf[m_pos++] = call UsciB.rx(); } } @@ -194,30 +195,29 @@ implementation { uint16_t i = 0; /* this needs to get fixed. */ - for(i=0xffff;i!=0;i--); //software delay (aprox 25msec on z1) - - if ( ( m_pos == m_len) && ( m_flags & I2C_STOP ) ) { + for (i = 0xffff; i != 0; i--); //software delay (aprox 25msec on z1) + if ((m_pos == m_len) && (m_flags & I2C_STOP)) { call UsciB.setTXStop(); - while(call UsciB.getStopBit()) { - if(i>=TIMEOUT) { - signalDone( EBUSY ); + while (call UsciB.getStopBit()) { + if(i >= TIMEOUT) { + signalDone(EBUSY); return; } i++; } - signalDone( SUCCESS ); + signalDone(SUCCESS); } else { - if((call UsciB.getUstat()) == ( UCBBUSY | UCNACKIFG | UCSCLLOW)) { - signal I2CBasicAddr.writeDone( FAIL, call UsciB.getSlaveAddress(), m_len, m_buf ); + if ((call UsciB.getUstat()) == (UCBBUSY | UCNACKIFG | UCSCLLOW)) { + signal I2CBasicAddr.writeDone(FAIL, call UsciB.getSlaveAddress(), m_len, m_buf ); return; } - call UsciB.tx( m_buf[ m_pos++ ] ); + call UsciB.tx(m_buf[m_pos++]); } } async event void Interrupts.txDone() { call UsciB.clrTxIntr(); - if ( call UsciB.getTransmitReceiveMode() ) + if (call UsciB.getTransmitReceiveMode()) nextWrite(); else nextRead(); @@ -225,20 +225,20 @@ implementation { async event void Interrupts.rxDone(uint8_t data) { call UsciB.clrRxIntr(); - if ( call UsciB.getTransmitReceiveMode() ) + if (call UsciB.getTransmitReceiveMode()) nextWrite(); else nextRead(); } - void signalDone( error_t error ) { + void signalDone(error_t error) { call UsciB.clrIntr(); call UsciB.disableIntr(); - if ( call UsciB.getTransmitReceiveMode() ) - signal I2CBasicAddr.writeDone( error, call UsciB.getSlaveAddress(), m_len, m_buf ); + if (call UsciB.getTransmitReceiveMode()) + signal I2CBasicAddr.writeDone(error, call UsciB.getSlaveAddress(), m_len, m_buf); else - signal I2CBasicAddr.readDone( error, call UsciB.getSlaveAddress(), m_len, m_buf ); + signal I2CBasicAddr.readDone(error, call UsciB.getSlaveAddress(), m_len, m_buf); } - default async command bool UsciResource.isOwner[ uint8_t id ]() { return FALSE; } + default async command bool UsciResource.isOwner[uint8_t id]() { return FALSE; } } diff --git a/tos/chips/msp430/usci/Msp430SpiB0C.nc b/tos/chips/msp430/usci/Msp430Spi0C.nc similarity index 68% rename from tos/chips/msp430/usci/Msp430SpiB0C.nc rename to tos/chips/msp430/usci/Msp430Spi0C.nc index 86bb6c96fe..36b187178c 100644 --- a/tos/chips/msp430/usci/Msp430SpiB0C.nc +++ b/tos/chips/msp430/usci/Msp430Spi0C.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -33,48 +34,51 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -/** - * An implementation of the SPI on USCIB0 for the MSP430. The current - * implementation defaults not using the DMA and performing the SPI - * transfers in software. To utilize the DMA, use Msp430SpiDma0P in - * place of Msp430SpiNoDma0P. +/* + * SPI0: SPI/USCI_B0. Defaults to no DMA, sw SPI implementation. + * To utilize the DMA, via Msp430Spi0DmaP define ENABLE_SPI0_DMA. + * + * See msp430usci.h for port mappings. * * @author Jonathan Hui * @author Mark Hays * @author Xavier Orduna + * @author Eric B. Decker */ #include "msp430usci.h" -generic configuration Msp430SpiB0C() { - provides interface Resource; - provides interface ResourceRequested; - provides interface SpiByte; - provides interface SpiPacket; - +generic configuration Msp430Spi0C() { + provides { + interface Resource; + interface ResourceRequested; + interface SpiByte; + interface SpiPacket; + } uses interface Msp430SpiConfigure; } implementation { + enum { - CLIENT_ID = unique( MSP430_SPI0_BUS ), + CLIENT_ID = unique(MSP430_SPI0_BUS), }; -#ifdef ENABLE_SPIB0_DMA -#warning "Enabling SPI DMA on USCIB0" - components Msp430SpiDmaB0P as SpiP; +#ifdef ENABLE_SPI0_DMA +#warning "Enabling DMA for SPI0 (usciB0)" + components Msp430Spi0DmaP as SpiP; #else - components Msp430SpiNoDmaB0P as SpiP; + components Msp430Spi0NoDmaP as SpiP; #endif - Resource = SpiP.Resource[ CLIENT_ID ]; + Resource = SpiP.Resource[CLIENT_ID]; SpiByte = SpiP.SpiByte; - SpiPacket = SpiP.SpiPacket[ CLIENT_ID ]; - Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ]; + SpiPacket = SpiP.SpiPacket[CLIENT_ID]; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; components new Msp430UsciB0C() as UsciC; ResourceRequested = UsciC; - SpiP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; - SpiP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; + SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; + SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; SpiP.UsciInterrupts -> UsciC.HplMsp430UsciInterrupts; } diff --git a/tos/chips/msp430/usci/Msp430SpiDmaB0P.nc b/tos/chips/msp430/usci/Msp430Spi0DmaP.nc similarity index 81% rename from tos/chips/msp430/usci/Msp430SpiDmaB0P.nc rename to tos/chips/msp430/usci/Msp430Spi0DmaP.nc index f6281e9491..0fce41150d 100644 --- a/tos/chips/msp430/usci/Msp430SpiDmaB0P.nc +++ b/tos/chips/msp430/usci/Msp430Spi0DmaP.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -37,30 +38,34 @@ * @author Jonathan Hui * @author Mark Hays * @author Xavier Orduna + * @author Eric B. Decker */ -configuration Msp430SpiDmaB0P { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; +#include "Msp430Dma.h" - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; +configuration Msp430Spi0DmaP { + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface SpiByte; + interface SpiPacket[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430SpiConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts; + } } implementation { - -#include "Msp430Dma.h" - - components new Msp430SpiDmaBP(IFG2_, + components new Msp430SpiDmaXP(IFG2_, UCB0TXBUF_, UCB0TXIFG, (uint16_t) DMA_TRIGGER_UCB0TXIFG, UCB0RXBUF_, UCB0RXIFG, (uint16_t) DMA_TRIGGER_UCB0RXIFG) as SpiP; + Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; diff --git a/tos/chips/msp430/usci/Msp430SpiNoDmaB0P.nc b/tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc similarity index 76% rename from tos/chips/msp430/usci/Msp430SpiNoDmaB0P.nc rename to tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc index e51c7409c7..86bf53af25 100644 --- a/tos/chips/msp430/usci/Msp430SpiNoDmaB0P.nc +++ b/tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -15,7 +16,7 @@ * documentation and/or other materials provided with the * distribution. * - * - Neither the name of the copyright holders nor the names of + * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -31,24 +32,30 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - * + */ + +/** * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ -configuration Msp430SpiNoDmaB0P { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; +configuration Msp430Spi0NoDmaP { + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface SpiByte; + interface SpiPacket[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430SpiConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts; + } } implementation { - components new Msp430SpiNoDmaBP() as SpiP; + components new Msp430SpiNoDmaP() as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; diff --git a/tos/chips/msp430/usci/Msp430Spi1C.nc b/tos/chips/msp430/usci/Msp430Spi1C.nc new file mode 100644 index 0000000000..2bf7af3813 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Spi1C.nc @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * SPI1: SPI/USCI_B1. Defaults to no DMA. + * + * On the x2xxx processors, USCI_B1 does not have any DMA triggers available + * on the DMA engine so SPI1 does not support DMA. Note.... This only + * applies for the x2xxx processors. x5xxx processors have more triggers so + * can support DMA. How to handle. + * + * This argues for this being a platform thing. The platform indicates + * what cpu is being used so also denotes what ports are available. + * + * Another way to handle this is with cpu functional ifdefs. Ugly but + * would work. I think we really want the platform to provide SPI ports + * which then determine what wires to what physical port. + * + * See msp430usci.h for port mappings. + * + * @author Jonathan Hui + * @author Mark Hays + * @author Xavier Orduna + * @author Eric B. Decker + */ + +#include "msp430usci.h" + +generic configuration Msp430Spi1C() { + provides { + interface Resource; + interface ResourceRequested; + interface SpiByte; + interface SpiPacket; + } + uses interface Msp430SpiConfigure; +} + +implementation { + + enum { + CLIENT_ID = unique(MSP430_SPI1_BUS), + }; + +#ifdef ENABLE_SPI1_DMA +#error "DMA is not available for SPI1 (usci B1)" +#endif + + components Msp430Spi1NoDmaP as SpiP; + Resource = SpiP.Resource[CLIENT_ID]; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket[CLIENT_ID]; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; + + components new Msp430UsciB1C() as UsciC; + ResourceRequested = UsciC; + SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; + SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; + SpiP.UsciInterrupts -> UsciC.HplMsp430UsciInterrupts; +} diff --git a/tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc b/tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc new file mode 100644 index 0000000000..88accb9b85 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Jonathan Hui + * @author Xavier Orduna + * @author Eric B. Decker + */ + +configuration Msp430Spi1NoDmaP { + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface SpiByte; + interface SpiPacket[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430SpiConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts; + } +} + +implementation { + components new Msp430SpiNoDmaP() as SpiP; + Resource = SpiP.Resource; + ResourceConfigure = SpiP.ResourceConfigure; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket; + UsciResource = SpiP.UsciResource; + UsciInterrupts = SpiP.UsciInterrupts; + + components HplMsp430UsciB1C as UsciC; + SpiP.Usci -> UsciC; + + components LedsC as Leds; + SpiP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430Spi2C.nc b/tos/chips/msp430/usci/Msp430Spi2C.nc new file mode 100644 index 0000000000..01769debfa --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Spi2C.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * SPI2: SPI/USCI_A0. Defaults to no DMA, sw SPI implementation. + * To utilize the DMA, via Msp430Spi2DMAP define ENABLE_SPI2_DMA. + * + * See msp430usci.h for port mappings. + * + * @author Jonathan Hui + * @author Mark Hays + * @author Xavier Orduna + * @author Eric B. Decker + */ + +#include "msp430usci.h" + +generic configuration Msp430Spi2C() { + provides { + interface Resource; + interface ResourceRequested; + interface SpiByte; + interface SpiPacket; + } + uses interface Msp430SpiConfigure; +} + +implementation { + + enum { + CLIENT_ID = unique(MSP430_SPI2_BUS), + }; + +#ifdef ENABLE_SPI2_DMA +#warning "Enabling DMA for SPI2 (usciA0)" + components Msp430Spi2DmaP as SpiP; +#else + components Msp430Spi2NoDmaP as SpiP; +#endif + + Resource = SpiP.Resource[CLIENT_ID]; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket[CLIENT_ID]; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; + + components new Msp430UsciA0C() as UsciC; + ResourceRequested = UsciC; + SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; + SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; + SpiP.UsciInterrupts -> UsciC.HplMsp430UsciInterrupts; +} diff --git a/tos/chips/msp430/usci/Msp430Spi2DmaP.nc b/tos/chips/msp430/usci/Msp430Spi2DmaP.nc new file mode 100644 index 0000000000..5fb3cfc8bb --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Spi2DmaP.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Jonathan Hui + * @author Mark Hays + * @author Xavier Orduna + * @author Eric B. Decker + */ + +#include "Msp430Dma.h" + +configuration Msp430Spi2DmaP { + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface SpiByte; + interface SpiPacket[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430SpiConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts; + } +} + +implementation { + components new Msp430SpiDmaXP(IFG2_, + UCA0TXBUF_, + UCA0TXIFG, + (uint16_t) DMA_TRIGGER_UCA0TXIFG, + UCA0RXBUF_, + UCA0RXIFG, + (uint16_t) DMA_TRIGGER_UCA0RXIFG) as SpiP; + + Resource = SpiP.Resource; + ResourceConfigure = SpiP.ResourceConfigure; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket; + UsciResource = SpiP.UsciResource; + UsciInterrupts = SpiP.UsciInterrupts; + + components HplMsp430UsciA0C as UsciC; + SpiP.Usci -> UsciC; + + components Msp430DmaC as DmaC; + SpiP.DmaChannel1 -> DmaC.Channel1; + SpiP.DmaChannel2 -> DmaC.Channel2; + + components LedsC as Leds; + SpiP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc b/tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc new file mode 100644 index 0000000000..d7a2c953c3 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Jonathan Hui + * @author Xavier Orduna + * @author Eric B. Decker + */ + +configuration Msp430Spi2NoDmaP { + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface SpiByte; + interface SpiPacket[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430SpiConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts; + } +} + +implementation { + components new Msp430SpiNoDmaP() as SpiP; + Resource = SpiP.Resource; + ResourceConfigure = SpiP.ResourceConfigure; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket; + UsciResource = SpiP.UsciResource; + UsciInterrupts = SpiP.UsciInterrupts; + + components HplMsp430UsciA0C as UsciC; + SpiP.Usci -> UsciC; + + components LedsC as Leds; + SpiP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430Spi3C.nc b/tos/chips/msp430/usci/Msp430Spi3C.nc new file mode 100644 index 0000000000..80a1261341 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Spi3C.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * SPI3: SPI/USCI_A1. Defaults to no DMA, sw SPI implementation. + * To utilize the DMA, via Msp430Spi3DmaP define ENABLE_SPI3_DMA. + * + * See msp430usci.h for port mappings. + * + * @author Jonathan Hui + * @author Mark Hays + * @author Xavier Orduna + * @author Eric B. Decker + */ + +#include "msp430usci.h" + +generic configuration Msp430Spi3C() { + provides { + interface Resource; + interface ResourceRequested; + interface SpiByte; + interface SpiPacket; + } + uses interface Msp430SpiConfigure; +} + +implementation { + + enum { + CLIENT_ID = unique(MSP430_SPI3_BUS), + }; + +#ifdef ENABLE_SPI3_DMA +#warning "Enabling DMA for SPI3 (usciA1)" + components Msp430Spi3DmaP as SpiP; +#else + components Msp430Spi3NoDmaP as SpiP; +#endif + + Resource = SpiP.Resource[CLIENT_ID]; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket[CLIENT_ID]; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; + + components new Msp430UsciA1C() as UsciC; + ResourceRequested = UsciC; + SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; + SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; + SpiP.UsciInterrupts -> UsciC.HplMsp430UsciInterrupts; +} diff --git a/tos/chips/msp430/usci/Msp430Spi3DmaP.nc b/tos/chips/msp430/usci/Msp430Spi3DmaP.nc new file mode 100644 index 0000000000..68583e7040 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Spi3DmaP.nc @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Jonathan Hui + * @author Mark Hays + * @author Xavier Orduna + * @author Eric B. Decker + */ + +#include "Msp430Dma.h" + +configuration Msp430Spi3DmaP { + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface SpiByte; + interface SpiPacket[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430SpiConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts; + } +} + +implementation { + components new Msp430SpiDmaXP(UC1IFG_, + UCA1TXBUF_, + UCA1TXIFG, + (uint16_t) DMA_TRIGGER_UCA1TXIFG, + UCA1RXBUF_, + UCA1RXIFG, + (uint16_t) DMA_TRIGGER_UCA1RXIFG) as SpiP; + + Resource = SpiP.Resource; + ResourceConfigure = SpiP.ResourceConfigure; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket; + UsciResource = SpiP.UsciResource; + UsciInterrupts = SpiP.UsciInterrupts; + + components HplMsp430UsciA1C as UsciC; + SpiP.Usci -> UsciC; + + components Msp430DmaC as DmaC; + SpiP.DmaChannel1 -> DmaC.Channel1; + SpiP.DmaChannel2 -> DmaC.Channel2; + + components LedsC as Leds; + SpiP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc b/tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc new file mode 100644 index 0000000000..5b102e4cd2 --- /dev/null +++ b/tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Jonathan Hui + * @author Xavier Orduna + * @author Eric B. Decker + */ + +configuration Msp430Spi3NoDmaP { + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface SpiByte; + interface SpiPacket[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430SpiConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts; + } +} + +implementation { + components new Msp430SpiNoDmaP() as SpiP; + Resource = SpiP.Resource; + ResourceConfigure = SpiP.ResourceConfigure; + Msp430SpiConfigure = SpiP.Msp430SpiConfigure; + SpiByte = SpiP.SpiByte; + SpiPacket = SpiP.SpiPacket; + UsciResource = SpiP.UsciResource; + UsciInterrupts = SpiP.UsciInterrupts; + + components HplMsp430UsciA1C as UsciC; + SpiP.Usci -> UsciC; + + components LedsC as Leds; + SpiP.Leds -> Leds; +} diff --git a/tos/chips/msp430/usci/Msp430SpiDmaBP.nc b/tos/chips/msp430/usci/Msp430SpiDmaP.nc similarity index 88% rename from tos/chips/msp430/usci/Msp430SpiDmaBP.nc rename to tos/chips/msp430/usci/Msp430SpiDmaP.nc index d167d55bec..5c492327e7 100644 --- a/tos/chips/msp430/usci/Msp430SpiDmaBP.nc +++ b/tos/chips/msp430/usci/Msp430SpiDmaP.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -38,9 +39,10 @@ * @author Mark Hays * @author Roman Lim * @author Xavier Orduna + * @author Eric B. Decker */ -generic module Msp430SpiDmaBP( uint16_t IFG_addr, +generic module Msp430SpiDmaP( uint16_t IFG_addr, uint16_t TXBUF_addr, uint8_t TXIFG, uint16_t TXTRIG, @@ -48,18 +50,21 @@ generic module Msp430SpiDmaBP( uint16_t IFG_addr, uint8_t RXIFG, uint16_t RXTRIG ) { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; - - uses interface Msp430DmaChannel as DmaChannel1; - uses interface Msp430DmaChannel as DmaChannel2; - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[uint8_t id ]; - uses interface HplMsp430UsciB as Usci; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; - uses interface Leds; + provides { + interface Resource[ uint8_t id ]; + interface ResourceConfigure[ uint8_t id ]; + interface SpiByte; + interface SpiPacket[ uint8_t id ]; + } + uses { + interface Msp430DmaChannel as DmaChannel1; + interface Msp430DmaChannel as DmaChannel2; + interface Resource as UsciResource[ uint8_t id ]; + interface Msp430SpiConfigure[uint8_t id ]; + interface HplMsp430UsciB as Usci; + interface HplMsp430UsciInterrupts as UsciInterrupts; + interface Leds; + } } implementation { @@ -92,9 +97,8 @@ implementation { } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { - call Usci.resetUsci(TRUE); + call Usci.resetUsci_n(); call Usci.disableSpi(); - call Usci.resetUsci(FALSE); } event void UsciResource.granted[ uint8_t id ]() { diff --git a/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc b/tos/chips/msp430/usci/Msp430SpiNoDmaP.nc similarity index 88% rename from tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc rename to tos/chips/msp430/usci/Msp430SpiNoDmaP.nc index 92c07980f4..468cd3e865 100644 --- a/tos/chips/msp430/usci/Msp430SpiNoDmaBP.nc +++ b/tos/chips/msp430/usci/Msp430SpiNoDmaP.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -35,19 +36,23 @@ * @author Jonathan Hui * @author Jan Hauer (bugfix in continueOp()) * @author Xavier Orduna + * @author Eric B. Decker */ -generic module Msp430SpiNoDmaBP() { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface SpiByte; - provides interface SpiPacket[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430SpiConfigure[ uint8_t id ]; - uses interface HplMsp430UsciB as Usci; - uses interface HplMsp430UsciInterrupts as UsciInterrupts; - uses interface Leds; +generic module Msp430SpiNoDmaP() { + provides { + interface Resource[ uint8_t id ]; + interface ResourceConfigure[ uint8_t id ]; + interface SpiByte; + interface SpiPacket[ uint8_t id ]; + } + uses { + interface Resource as UsciResource[ uint8_t id ]; + interface Msp430SpiConfigure[ uint8_t id ]; + interface HplMsp430UsciB as Usci; + interface HplMsp430UsciInterrupts as UsciInterrupts; + interface Leds; + } } implementation { @@ -85,9 +90,8 @@ implementation { } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { - call Usci.resetUsci(TRUE); + call Usci.resetUsci_n(); call Usci.disableSpi(); - call Usci.resetUsci(FALSE); } event void UsciResource.granted[ uint8_t id ]() { @@ -111,7 +115,7 @@ implementation { default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { - return (msp430_spi_union_config_t*) &msp430_spi_default_config; + return (msp430_spi_union_config_t *) &msp430_spi_default_config; } default event void Resource.granted[ uint8_t id ]() {} @@ -149,9 +153,8 @@ implementation { if ( len ) { call Usci.enableRxIntr(); continueOp(); - } else { + } else post signalDone_task(); - } return SUCCESS; } diff --git a/tos/chips/msp430/usci/Msp430Uart0C.nc b/tos/chips/msp430/usci/Msp430Uart0C.nc index da7a380876..a7857cb0ff 100644 --- a/tos/chips/msp430/usci/Msp430Uart0C.nc +++ b/tos/chips/msp430/usci/Msp430Uart0C.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -42,11 +43,12 @@ #include "msp430usci.h" generic configuration Msp430Uart0C() { - provides interface Resource; - provides interface ResourceRequested; - provides interface UartStream; - provides interface UartByte; - + provides { + interface Resource; + interface ResourceRequested; + interface UartStream; + interface UartByte; + } uses interface Msp430UartConfigure; } diff --git a/tos/chips/msp430/usci/Msp430Uart0P.nc b/tos/chips/msp430/usci/Msp430Uart0P.nc index a3abb32c67..1ee525af7a 100644 --- a/tos/chips/msp430/usci/Msp430Uart0P.nc +++ b/tos/chips/msp430/usci/Msp430Uart0P.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -39,14 +40,17 @@ */ configuration Msp430Uart0P { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface UartStream[ uint8_t id ]; - provides interface UartByte[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430UartConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface UartStream[uint8_t id]; + interface UartByte[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430UartConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts[uint8_t id]; + } } implementation { diff --git a/tos/chips/msp430/usci/Msp430Uart1C.nc b/tos/chips/msp430/usci/Msp430Uart1C.nc index 93a75d68be..ea74739780 100644 --- a/tos/chips/msp430/usci/Msp430Uart1C.nc +++ b/tos/chips/msp430/usci/Msp430Uart1C.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -42,11 +43,12 @@ #include "msp430usci.h" generic configuration Msp430Uart1C() { - provides interface Resource; - provides interface ResourceRequested; - provides interface UartStream; - provides interface UartByte; - + provides { + interface Resource; + interface ResourceRequested; + interface UartStream; + interface UartByte; + } uses interface Msp430UartConfigure; } diff --git a/tos/chips/msp430/usci/Msp430Uart1P.nc b/tos/chips/msp430/usci/Msp430Uart1P.nc index fac3de2ca3..da8dadef2d 100644 --- a/tos/chips/msp430/usci/Msp430Uart1P.nc +++ b/tos/chips/msp430/usci/Msp430Uart1P.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -39,14 +40,17 @@ */ configuration Msp430Uart1P { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface UartStream[ uint8_t id ]; - provides interface UartByte[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430UartConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; + provides { + interface Resource[uint8_t id]; + interface ResourceConfigure[uint8_t id]; + interface UartStream[uint8_t id]; + interface UartByte[uint8_t id]; + } + uses { + interface Resource as UsciResource[uint8_t id]; + interface Msp430UartConfigure[uint8_t id]; + interface HplMsp430UsciInterrupts as UsciInterrupts[uint8_t id]; + } } implementation { diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc index 30a3c8b9ba..f18e76b9e7 100644 --- a/tos/chips/msp430/usci/Msp430UartP.nc +++ b/tos/chips/msp430/usci/Msp430UartP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. @@ -41,17 +42,20 @@ #include generic module Msp430UartP() { - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[ uint8_t id ]; - provides interface UartStream[ uint8_t id ]; - provides interface UartByte[ uint8_t id ]; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430UartConfigure[ uint8_t id ]; - uses interface HplMsp430UsciA as Usci; - uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; - uses interface Counter; - uses interface Leds; + provides { + interface Resource[ uint8_t id ]; + interface ResourceConfigure[ uint8_t id ]; + interface UartStream[ uint8_t id ]; + interface UartByte[ uint8_t id ]; + } + uses { + interface Resource as UsciResource[ uint8_t id ]; + interface Msp430UartConfigure[ uint8_t id ]; + interface HplMsp430UsciA as Usci; + interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; + interface Counter; + interface Leds; + } } implementation { @@ -83,14 +87,15 @@ implementation { async command void ResourceConfigure.configure[ uint8_t id ]() { msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); - m_byte_time = config->uartConfig.ubr / 2; //pot donar problemes + m_byte_time = config->uartConfig.ubr / 2; + if (!m_byte_time) + m_byte_time = 1; call Usci.setModeUart(config); call Usci.enableIntr(); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { - call Usci.resetUsci(TRUE); - call Usci.disableIntr(); + call Usci.resetUsci_n(); /* also turns off interrupt enables */ call Usci.disableUart(); } diff --git a/tos/chips/msp430/usci/Msp430UsciA0C.nc b/tos/chips/msp430/usci/Msp430UsciA0C.nc index 46cccedf78..2f5a508809 100644 --- a/tos/chips/msp430/usci/Msp430UsciA0C.nc +++ b/tos/chips/msp430/usci/Msp430UsciA0C.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -32,20 +33,22 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Provides an interface for USART0 on the MSP430. + * Provides an interface for usci A0 on the MSP430. * * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ generic configuration Msp430UsciA0C() { - provides interface Resource; - provides interface ResourceRequested; - provides interface ArbiterInfo; - provides interface HplMsp430UsciA; - provides interface HplMsp430UsciInterrupts; - - uses interface ResourceConfigure; + provides { + interface Resource; /* parameterized */ + interface ResourceRequested; /* parameterized */ + interface ArbiterInfo; + interface HplMsp430UsciA; + interface HplMsp430UsciInterrupts; /* parameterized */ + } + uses interface ResourceConfigure; /* parameterized */ } implementation { diff --git a/tos/chips/msp430/usci/Msp430UsciA1C.nc b/tos/chips/msp430/usci/Msp430UsciA1C.nc index 7e8839aebc..b5e49fa055 100644 --- a/tos/chips/msp430/usci/Msp430UsciA1C.nc +++ b/tos/chips/msp430/usci/Msp430UsciA1C.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -32,20 +33,22 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Provides an interface for USART0 on the MSP430. + * Provides an interface for usci A1 on the MSP430. * * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ generic configuration Msp430UsciA1C() { - provides interface Resource; - provides interface ResourceRequested; - provides interface ArbiterInfo; - provides interface HplMsp430UsciA; - provides interface HplMsp430UsciInterrupts; - - uses interface ResourceConfigure; + provides { + interface Resource; /* parameterized */ + interface ResourceRequested; /* parameterized */ + interface ArbiterInfo; + interface HplMsp430UsciA; + interface HplMsp430UsciInterrupts; /* parameterized */ + } + uses interface ResourceConfigure; /* parameterized */ } implementation { diff --git a/tos/chips/msp430/usci/Msp430UsciB0C.nc b/tos/chips/msp430/usci/Msp430UsciB0C.nc index 0abac03fe1..3e4b35ad9b 100644 --- a/tos/chips/msp430/usci/Msp430UsciB0C.nc +++ b/tos/chips/msp430/usci/Msp430UsciB0C.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -32,20 +33,22 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Provides an interface for USART0 on the MSP430. + * Provides an interface for usci B0 on the MSP430. * * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ generic configuration Msp430UsciB0C() { - provides interface Resource; - provides interface ResourceRequested; - provides interface ArbiterInfo; - provides interface HplMsp430UsciB; - provides interface HplMsp430UsciInterrupts; - - uses interface ResourceConfigure; + provides { + interface Resource; /* parameterized */ + interface ResourceRequested; /* parameterized */ + interface ArbiterInfo; + interface HplMsp430UsciB; + interface HplMsp430UsciInterrupts; /* parameterized */ + } + uses interface ResourceConfigure; /* parameterized */ } implementation { diff --git a/tos/chips/msp430/usci/Msp430UsciB1C.nc b/tos/chips/msp430/usci/Msp430UsciB1C.nc index d367402f54..34d0a2d458 100644 --- a/tos/chips/msp430/usci/Msp430UsciB1C.nc +++ b/tos/chips/msp430/usci/Msp430UsciB1C.nc @@ -1,5 +1,8 @@ /* - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -29,20 +32,21 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * - * Provides an interface for USART0 on the MSP430. + * Provides an interface for usci B1 on the MSP430. * * @author Jonathan Hui + * @author Eric B. Decker */ generic configuration Msp430UsciB1C() { - provides interface Resource; - provides interface ResourceRequested; - provides interface ArbiterInfo; - provides interface HplMsp430UsciB; - provides interface HplMsp430UsciInterrupts; - - uses interface ResourceConfigure; + provides { + interface Resource; /* parameterized */ + interface ResourceRequested; /* parameterized */ + interface ArbiterInfo; + interface HplMsp430UsciB; + interface HplMsp430UsciInterrupts; /* parameterized */ + } + uses interface ResourceConfigure; /* parameterized */ } implementation { diff --git a/tos/chips/msp430/usci/Msp430UsciShareA0P.nc b/tos/chips/msp430/usci/Msp430UsciShareA0P.nc index 428d23faa2..b761878525 100644 --- a/tos/chips/msp430/usci/Msp430UsciShareA0P.nc +++ b/tos/chips/msp430/usci/Msp430UsciShareA0P.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -34,14 +35,17 @@ * * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ configuration Msp430UsciShareA0P { - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - provides interface Resource[ uint8_t id ]; - provides interface ResourceRequested[ uint8_t id ]; - provides interface ArbiterInfo; - + provides { + interface Resource[ uint8_t id ]; + interface ResourceRequested[ uint8_t id ]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + } uses interface ResourceConfigure[ uint8_t id ]; } @@ -50,11 +54,12 @@ implementation { Interrupts = UsciShareP; components new FcfsArbiterC( MSP430_HPLUSCIA0_RESOURCE ) as ArbiterC; - Resource = ArbiterC; - ResourceRequested = ArbiterC; - ResourceConfigure = ArbiterC; - ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceDefaultOwner = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsciShareP.ArbiterInfo -> ArbiterC; components HplMsp430UsciA0C as HplUsciC; UsciShareP.RawInterrupts -> HplUsciC; diff --git a/tos/chips/msp430/usci/Msp430UsciShareA1P.nc b/tos/chips/msp430/usci/Msp430UsciShareA1P.nc index 76134f3aeb..17a6076d82 100644 --- a/tos/chips/msp430/usci/Msp430UsciShareA1P.nc +++ b/tos/chips/msp430/usci/Msp430UsciShareA1P.nc @@ -1,5 +1,7 @@ /* - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -33,14 +35,17 @@ * * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ configuration Msp430UsciShareA1P { - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - provides interface Resource[ uint8_t id ]; - provides interface ResourceRequested[ uint8_t id ]; - provides interface ArbiterInfo; - + provides { + interface Resource[ uint8_t id ]; + interface ResourceRequested[ uint8_t id ]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + } uses interface ResourceConfigure[ uint8_t id ]; } @@ -49,11 +54,12 @@ implementation { Interrupts = UsciShareP; components new FcfsArbiterC( MSP430_HPLUSCIA1_RESOURCE ) as ArbiterC; - Resource = ArbiterC; - ResourceRequested = ArbiterC; - ResourceConfigure = ArbiterC; - ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceDefaultOwner = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsciShareP.ArbiterInfo -> ArbiterC; components HplMsp430UsciA1C as HplUsciC; UsciShareP.RawInterrupts -> HplUsciC; diff --git a/tos/chips/msp430/usci/Msp430UsciShareB0P.nc b/tos/chips/msp430/usci/Msp430UsciShareB0P.nc index 1e56e2ed5e..3d9ed0c371 100644 --- a/tos/chips/msp430/usci/Msp430UsciShareB0P.nc +++ b/tos/chips/msp430/usci/Msp430UsciShareB0P.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -34,14 +35,17 @@ * * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ configuration Msp430UsciShareB0P { - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - provides interface Resource[ uint8_t id ]; - provides interface ResourceRequested[ uint8_t id ]; - provides interface ArbiterInfo; - + provides { + interface Resource[ uint8_t id ]; + interface ResourceRequested[ uint8_t id ]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + } uses interface ResourceConfigure[ uint8_t id ]; } @@ -50,11 +54,12 @@ implementation { Interrupts = UsciShareP; components new FcfsArbiterC( MSP430_HPLUSCIB0_RESOURCE ) as ArbiterC; - Resource = ArbiterC; - ResourceRequested = ArbiterC; - ResourceConfigure = ArbiterC; - ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceDefaultOwner = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsciShareP.ArbiterInfo -> ArbiterC; components HplMsp430UsciB0C as HplUsciC; UsciShareP.RawInterrupts -> HplUsciC; diff --git a/tos/chips/msp430/usci/Msp430UsciShareB1P.nc b/tos/chips/msp430/usci/Msp430UsciShareB1P.nc index 05aa10dcde..6c9d360357 100644 --- a/tos/chips/msp430/usci/Msp430UsciShareB1P.nc +++ b/tos/chips/msp430/usci/Msp430UsciShareB1P.nc @@ -1,6 +1,7 @@ /* + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -34,14 +35,17 @@ * * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ configuration Msp430UsciShareB1P { - provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - provides interface Resource[ uint8_t id ]; - provides interface ResourceRequested[ uint8_t id ]; - provides interface ArbiterInfo; - + provides { + interface Resource[ uint8_t id ]; + interface ResourceRequested[ uint8_t id ]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; + } uses interface ResourceConfigure[ uint8_t id ]; } @@ -50,11 +54,12 @@ implementation { Interrupts = UsciShareP; components new FcfsArbiterC( MSP430_HPLUSCIB1_RESOURCE ) as ArbiterC; - Resource = ArbiterC; - ResourceRequested = ArbiterC; - ResourceConfigure = ArbiterC; - ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceDefaultOwner = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsciShareP.ArbiterInfo -> ArbiterC; components HplMsp430UsciB1C as HplUsciC; UsciShareP.RawInterrupts -> HplUsciC; diff --git a/tos/chips/msp430/usci/Msp430UsciShareP.nc b/tos/chips/msp430/usci/Msp430UsciShareP.nc index 6e7f2e2a37..3aa6fc3684 100644 --- a/tos/chips/msp430/usci/Msp430UsciShareP.nc +++ b/tos/chips/msp430/usci/Msp430UsciShareP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. @@ -34,12 +35,15 @@ * * @author Jonathan Hui * @author Xavier Orduna + * @author Eric B. Decker */ generic module Msp430UsciShareP() @safe() { provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as RawInterrupts; - uses interface ArbiterInfo; + uses { + interface HplMsp430UsciInterrupts as RawInterrupts; + interface ArbiterInfo; + } } implementation { diff --git a/tos/chips/msp430/usci/msp430usci.h b/tos/chips/msp430/usci/msp430usci.h index 80c0a0c486..39afafeb3a 100644 --- a/tos/chips/msp430/usci/msp430usci.h +++ b/tos/chips/msp430/usci/msp430usci.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010 Eric B. Decker + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. @@ -39,8 +39,8 @@ * @author Eric B. Decker * @author Jordi Soucheiron * - * Fix to reflect the MSP430X as documented in Users guide - * slau144e, msp430f2618. + * Fix to reflect the MSP430X as documented in the TI MSP430x2xx Users guide + * slau144f. */ #ifndef _H_MSP430USCI_H @@ -54,31 +54,49 @@ * We set the resources up so multiple use of a given port * can be arbritrated. * - * UART0 -> usciA0 SPI2 -> usciA0 - * UART1 -> usciA1 SPI3 -> usciA1 - * SPI0 -> usciB0 I2C0 - * SPI1 -> usciB1 I2C1 + * UART0, SPI2 -> usciA0 dma + * UART1, SPI3 -> usciA1 dma + * SPI0, I2C0 -> usciB0 dma + * SPI1, I2C1 -> usciB1 no dma * * spi2,3 are mapped to usciA0,A1 because the typical * configuration is to use dual uarts and dual spis - * so the less used configuration maps as 2 and 3. + * so the less used configuration maps the SPI on usciA0 + * as 2 and 3. */ -//USCI A0, A1: UART, SPI +// USCI A0: UART, SPI #define MSP430_HPLUSCIA0_RESOURCE "Msp430UsciA0.Resource" +#define MSP430_UART0_BUS "Msp430Uart0.Resource" +#define MSP430_SPI2_BUS "Msp430Spi2.Resource" + +//#define MSP430_UART0_BUS MSP430_HPLUSCIA0_RESOURCE +//#define MSP430_SPI2_BUS MSP430_HPLUSCIA0_RESOURCE + +// USCI A1: UART, SPI #define MSP430_HPLUSCIA1_RESOURCE "Msp430UsciA1.Resource" -#define MSP430_UART0_BUS MSP430_HPLUSCIA0_RESOURCE -#define MSP430_UART1_BUS MSP430_HPLUSCIA1_RESOURCE -#define MSP430_SPI2_BUS MSP430_HPLUSCIA0_RESOURCE -#define MSP430_SPI3_BUS MSP430_HPLUSCIA1_RESOURCE +#define MSP430_UART1_BUS "Msp430Uart1.Resource" +#define MSP430_SPI3_BUS "Msp430Spi3.Resource" + +//#define MSP430_UART1_BUS MSP430_HPLUSCIA1_RESOURCE +//#define MSP430_SPI3_BUS MSP430_HPLUSCIA1_RESOURCE -//USCI B0, B1: SPI, I2C +// USCI B0: SPI, I2C #define MSP430_HPLUSCIB0_RESOURCE "Msp430UsciB0.Resource" +#define MSP430_SPI0_BUS "Msp430Spi0.Resource" +#define MSP430_I2C0_BUS "Msp430I2C0.Resource" + +//#define MSP430_SPI0_BUS MSP430_HPLUSCIB0_RESOURCE +//#define MSP430_I2C0_BUS MSP430_HPLUSCIB0_RESOURCE + + +// USCI B1: SPI, I2C #define MSP430_HPLUSCIB1_RESOURCE "Msp430UsciB1.Resource" -#define MSP430_SPI0_BUS MSP430_HPLUSCIB0_RESOURCE -#define MSP430_SPI1_BUS MSP430_HPLUSCIB1_RESOURCE -#define MSP430_I2C0_BUS MSP430_HPLUSCIB0_RESOURCE -#define MSP430_I2C1_BUS MSP430_HPLUSCIB1_RESOURCE +#define MSP430_SPI1_BUS "Msp430Spi1.Resource" +#define MSP430_I2C1_BUS "Msp430I2C1.Resource" + +//#define MSP430_SPI1_BUS MSP430_HPLUSCIB1_RESOURCE +//#define MSP430_I2C1_BUS MSP430_HPLUSCIB1_RESOURCE typedef enum { USCI_NONE = 0, @@ -101,11 +119,11 @@ typedef enum { typedef struct { unsigned int ucsync : 1; // Synchronous mode enable (0=Asynchronous; 1:Synchronous) unsigned int ucmode : 2; // USCI Mode (00=UART Mode; 01=Idle-Line; 10=Addres-Bit; 11=UART Mode, auto baud rate detection) - unsigned int ucspb : 1; // Stop bit select. Number of stop bits (0=One stop bit; 1=Two stop bits) + unsigned int ucspb : 1; // Stop bit select. Number of stop bits (0=One stop bit; 1=Two stop bits) unsigned int uc7bit : 1; // Charactaer lenght, (0=8-bit data; 1=7-bit data) - unsigned int ucmsb : 1; // endian. Direction of the rx and tx shift (0=LSB first, 1=MSB first) - unsigned int ucpar : 1; // Parity Select (0=odd parity; 1=Even parity) - unsigned int ucpen : 1; // Parity enable (0=Parity disable; 1=Parity enabled) + unsigned int ucmsb : 1; // endian. Direction of the rx and tx shift (0=LSB first, 1=MSB first) + unsigned int ucpar : 1; // Parity Select (0=odd parity; 1=Even parity) + unsigned int ucpen : 1; // Parity enable (0=Parity disable; 1=Parity enabled) } __attribute__ ((packed)) msp430_uctl0_t ; @@ -116,11 +134,11 @@ typedef struct { typedef struct { unsigned int ucswrst : 1; //Software reset enable (0=disabled; 1=enabled) unsigned int uctxbrk : 1; //Transmit break. (0 = no brk; 1 = tx break next frame - unsigned int uctxaddr : 1; //Transmit address. (0=next frame transmitted is data; 1=next frame transmitted is an address) - unsigned int ucdorm : 1; //Dormant. (0 = not dormant; 1 = Dormant, only some chars will set UCAxRXIFG) + unsigned int uctxaddr : 1; //Transmit address. (0=next frame transmitted is data; 1=next frame transmitted is an address) + unsigned int ucdorm : 1; //Dormant. (0 = not dormant; 1 = Dormant, only some chars will set UCAxRXIFG) unsigned int ucbrkie : 1; //rx break interrupt -enable, 1 = enabled unsigned int ucrxeie : 1; //rx error interrupt-enable - unsigned int ucssel : 2; //USCI clock source select: (00=UCKL; 01=ACLK; 10=SMCLK; 11=SMCLK + unsigned int ucssel : 2; //USCI clock source select: (00=UCKL; 01=ACLK; 10=SMCLK; 11=SMCLK } __attribute__ ((packed)) msp430_uctl1_t ; @@ -141,11 +159,13 @@ DEFINE_UNION_CAST(int2uctl1,msp430_uctl1_t,uint8_t) */ typedef enum { + /* these names are preserved for backward compatibility */ UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x04, UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x0c, UBR_32KHZ_4800=0x0006, UMCTL_32KHZ_4800=0x0e, UBR_32KHZ_9600=0x0003, UMCTL_32KHZ_9600=0x06, + /* these names are preserved for backward compatibility */ UBR_1048MHZ_9600=0x006D, UMCTL_1048MHZ_9600=0x04, UBR_1048MHZ_19200=0x0036, UMCTL_1048MHZ_19200=0x0a, UBR_1048MHZ_38400=0x001B, UMCTL_1048MHZ_38400=0x04, @@ -154,12 +174,14 @@ typedef enum { UBR_1048MHZ_128000=0x0008, UMCTL_1048MHZ_128000=0x02, UBR_1048MHZ_256000=0x0004, UMCTL_1048MHZ_230400=0x02, - /* 1MHz = 1000000 Hz, 4MHz 4000000, 8MHz 8000000 + /* + * 1MHz = 1000000 Hz, 4MHz 4000000, 8MHz 8000000 * 16MHz 16000000. use UCOS16 for oversampling, * use both UCBRF and UCBRS. * * Settings for 1MHz, 8Mhz, and 16MHz are taken from - * a table on page 15-22 of slau144e. + * a table on page 15-22 of slau144f, MSP430x2xx family + * User's Guide. These are powers of 10. */ UBR_1MHZ_9600=0x6, UMCTL_1MHZ_9600=0x81, UBR_1MHZ_19200=0x3, UMCTL_1MHZ_19200=0x41, @@ -222,7 +244,11 @@ typedef union { } msp430_uart_union_config_t; -const msp430_uart_union_config_t msp430_uart_default_config = { { +/* + * be sure to check Msp430DcoSpec.h for what speed we think + * the processor is actually running at. We assume 8MHz. + */ +msp430_uart_union_config_t msp430_uart_default_config = { { ubr : UBR_8MHZ_115200, umctl : UMCTL_8MHZ_115200, ucmode : 0, // uart @@ -255,7 +281,6 @@ typedef struct { unsigned int ucckpl : 1; // 0 inactive low, 1 inactive high unsigned int ucckph : 1; // 0 tx rising uclk, captured falling // 1 captured rising, sent falling edge. - /* ctl1 */ unsigned int : 1; // ucswrst, forced to 1 on init unsigned int : 5; // unused. @@ -275,7 +300,7 @@ typedef union { } msp430_spi_union_config_t; -const msp430_spi_union_config_t msp430_spi_default_config = { { +msp430_spi_union_config_t msp430_spi_default_config = { { ubr : 2, /* smclk/2 */ ucmode : 0, /* 3 pin, no ste */ ucmst : 1, /* master */ @@ -359,7 +384,7 @@ typedef union { } msp430_i2c_union_config_t; -const msp430_i2c_union_config_t msp430_i2c_default_config = { { +msp430_i2c_union_config_t msp430_i2c_default_config = { { ubr : 2, /* smclk/2 */ ucmode : 3, /* i2c mode */ ucmst : 1, /* master */ diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc index 8b358fe183..f368518b54 100644 --- a/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc +++ b/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc @@ -47,7 +47,7 @@ generic configuration HplCC2420SpiC() { implementation { - components new Msp430SpiB0C() as SpiC; + components new Msp430Spi0C() as SpiC; Resource = SpiC; SpiByte = SpiC; From b93bf1ef2bce9f73cc67687d628b33efd66ff570 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 15 Mar 2011 21:50:28 -0700 Subject: [PATCH 020/411] z1-rework: fix m_byte_time kludge and leave devices in reset when unconfigured. - leave msp430 devices in reset when unconfigured. - m_byte_time is used in UartByte.receive for timing. But the calculation can fail. - remove MSP430REG_NORACE that aren't needed. - remove MCTL (mod control, zeroing) on configuration, zero'd on reset. --- tos/chips/msp430/00_README | 4 ++-- tos/chips/msp430/usart/HplMsp430Usart.nc | 6 +----- tos/chips/msp430/usart/Msp430SpiDmaP.nc | 2 +- tos/chips/msp430/usart/Msp430SpiNoDmaP.nc | 2 +- tos/chips/msp430/usart/Msp430UartP.nc | 9 ++++----- tos/chips/msp430/usci/HplMsp430UsciA0P.nc | 6 ++++-- tos/chips/msp430/usci/HplMsp430UsciA1P.nc | 16 +++++++++++++--- tos/chips/msp430/usci/HplMsp430UsciB0P.nc | 7 +++++-- tos/chips/msp430/usci/HplMsp430UsciB1P.nc | 7 +++++-- tos/chips/msp430/usci/Msp430I2CP.nc | 1 + tos/chips/msp430/usci/Msp430SpiDmaP.nc | 1 + tos/chips/msp430/usci/Msp430SpiNoDmaP.nc | 1 + tos/chips/msp430/usci/Msp430UartP.nc | 6 +++++- 13 files changed, 44 insertions(+), 24 deletions(-) diff --git a/tos/chips/msp430/00_README b/tos/chips/msp430/00_README index 5e37f9c767..96c49fb0d6 100644 --- a/tos/chips/msp430/00_README +++ b/tos/chips/msp430/00_README @@ -12,8 +12,8 @@ file 01_Dependencies for what CPUs are supported and the cpu dependencies. Where reasonable, conflicting areas are kept in a flat file and differences are #ifdef'd. When this becomes too cumbersome, different interface definitions and implementations are placed into cpu family directories and the interface to -the reset of the tinyos os is shadowed. The correct directory needs to be -specified in the .platform file. +the rest of tinyos is shadowed. The correct directory needs to be specified in +the .platform file. Most of the cpu definitions are obtained automatically via the toolchain, ie. the -mmcu specification automatically included the appropriate cpu header file. ie. -mmcu=msp430x2618 diff --git a/tos/chips/msp430/usart/HplMsp430Usart.nc b/tos/chips/msp430/usart/HplMsp430Usart.nc index 60e7c84a86..18f658e784 100644 --- a/tos/chips/msp430/usart/HplMsp430Usart.nc +++ b/tos/chips/msp430/usart/HplMsp430Usart.nc @@ -216,17 +216,13 @@ interface HplMsp430Usart { * Transmit a byte of data. When the transmission is completed, * txDone is generated. Only then a new byte may be * transmitted, otherwise the previous byte will be overwritten. - * The mode of transmission (Uart or Spi) depends on the current - * state of the USART, which must be managed by a higher layer. - * - * @return SUCCESS always. */ async command void tx(uint8_t data); /** * Get current value from RX-buffer. * - * @return SUCCESS always. + * @return byte received */ async command uint8_t rx(); diff --git a/tos/chips/msp430/usart/Msp430SpiDmaP.nc b/tos/chips/msp430/usart/Msp430SpiDmaP.nc index de195001f0..5473474141 100644 --- a/tos/chips/msp430/usart/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiDmaP.nc @@ -92,7 +92,7 @@ implementation { async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usart.resetUsart(TRUE); call Usart.disableSpi(); - call Usart.resetUsart(FALSE); + /* leave in reset */ } event void UsartResource.granted[ uint8_t id ]() { diff --git a/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc index 1f3b2498c0..17277e5c9d 100644 --- a/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc @@ -124,7 +124,7 @@ implementation { async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usart.resetUsart(TRUE); call Usart.disableSpi(); - call Usart.resetUsart(FALSE); + /* leave in reset */ } event void UsartResource.granted[ uint8_t id ]() { diff --git a/tos/chips/msp430/usart/Msp430UartP.nc b/tos/chips/msp430/usart/Msp430UartP.nc index 9d652ed296..ec11e83460 100644 --- a/tos/chips/msp430/usart/Msp430UartP.nc +++ b/tos/chips/msp430/usart/Msp430UartP.nc @@ -59,7 +59,7 @@ implementation { norace uint16_t m_tx_len, m_rx_len; norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; norace uint16_t m_tx_pos, m_rx_pos; - norace uint8_t m_byte_time; + norace uint8_t m_byte_time; /* broken kludge */ norace uint8_t current_owner; async command error_t Resource.immediateRequest[ uint8_t id ]() { @@ -85,17 +85,16 @@ implementation { async command void ResourceConfigure.configure[ uint8_t id ]() { msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); m_byte_time = config->uartConfig.ubr / 2; + if (!m_byte_time) + m_byte_time = 1; call Usart.setModeUart(config); call Usart.enableIntr(); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { - call Usart.resetUsart(TRUE); - call Usart.disableIntr(); + call Usart.resetUsart(TRUE); /* reset will clear any interrupts */ call Usart.disableUart(); - /* leave the usart in reset */ - //call Usart.resetUsart(FALSE); // this shouldn't be called. } event void UsartResource.granted[ uint8_t id ]() { diff --git a/tos/chips/msp430/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/usci/HplMsp430UsciA0P.nc index c3661096eb..19f5470a60 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciA0P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciA0P.nc @@ -68,11 +68,13 @@ module HplMsp430UsciA0P @safe() { } implementation { +#ifdef notdef MSP430REG_NORACE(IE2); MSP430REG_NORACE(IFG2); MSP430REG_NORACE(UCA0CTL0); MSP430REG_NORACE(UCA0CTL1); MSP430REG_NORACE(UCA0STAT); +#endif MSP430REG_NORACE(UCA0TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { @@ -213,7 +215,6 @@ implementation { return USCI_I2C; if (isUart()) return USCI_UART; - return USCI_NONE; } @@ -237,7 +238,8 @@ implementation { UCA0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCA0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); - call Usci.setUmctl(0); /* MCTL <- 0 if spi */ + /* MCTL (modulation register) is zero'd on module reset + * per TI MSP430x2xx User's Guide SLAUF, pg 15-27. */ } /* diff --git a/tos/chips/msp430/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/usci/HplMsp430UsciA1P.nc index 2423753810..587fb7d7d1 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciA1P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciA1P.nc @@ -68,11 +68,13 @@ module HplMsp430UsciA1P @safe() { } implementation { +#ifdef notdef MSP430REG_NORACE(UC1IE); MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCA1CTL0); MSP430REG_NORACE(UCA1CTL1); MSP430REG_NORACE(UCA1STAT); +#endif MSP430REG_NORACE(UCA1TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { @@ -157,7 +159,15 @@ implementation { return UCA1STAT; } - /* Operations */ + /* + * Reset/unReset + * + * resetUsci(bool): (deprecated) TRUE puts device into reset, FALSE takes it out. But this + * requires pushing the parameter on the stack and all those extra instructions. + * + * {un,}resetUsci_n(): reset and unreset the device but result in single instruction that + * sets or clears the appropriate bit in the h/w. + */ async command void Usci.resetUsci(bool reset) { if (reset) SET_FLAG(UCA1CTL1, UCSWRST); @@ -205,7 +215,6 @@ implementation { return USCI_I2C; if (isUart()) return USCI_UART; - return USCI_NONE; } @@ -229,7 +238,8 @@ implementation { UCA1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCA1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); - call Usci.setUmctl(0); /* MCTL <- 0 if spi */ + /* MCTL (modulation register) is zero'd on module reset + * per TI MSP430x2xx User's Guide SLAUF, pg 15-27. */ } /* diff --git a/tos/chips/msp430/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/usci/HplMsp430UsciB0P.nc index afdb9a45a9..84a3f4c5ed 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB0P.nc @@ -72,15 +72,17 @@ module HplMsp430UsciB0P @safe() { } implementation { +#ifdef notdef MSP430REG_NORACE(IE2); MSP430REG_NORACE(IFG2); MSP430REG_NORACE(UCB0CTL0); MSP430REG_NORACE(UCB0CTL1); MSP430REG_NORACE(UCB0STAT); MSP430REG_NORACE(UCB0RXBUF); - MSP430REG_NORACE(UCB0TXBUF); MSP430REG_NORACE(UCB0I2COA); MSP430REG_NORACE(UCB0I2CIE); +#endif + MSP430REG_NORACE(UCB0TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); @@ -217,7 +219,8 @@ implementation { UCB0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); - /* MCTL is zero'd by reset? Check it out */ + /* MCTL (modulation register) is zero'd on module reset + * per TI MSP430x2xx User's Guide SLAUF, pg 16-16. */ } /* diff --git a/tos/chips/msp430/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/usci/HplMsp430UsciB1P.nc index 4a6e94ec89..fae7a31ff5 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB1P.nc @@ -72,15 +72,17 @@ module HplMsp430UsciB1P @safe() { } implementation { +#ifdef notdef MSP430REG_NORACE(UC1IE); MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCB1CTL0); MSP430REG_NORACE(UCB1CTL1); MSP430REG_NORACE(UCB1STAT); MSP430REG_NORACE(UCB1RXBUF); - MSP430REG_NORACE(UCB1TXBUF); MSP430REG_NORACE(UCB1I2COA); MSP430REG_NORACE(UCB1I2CIE); +#endif + MSP430REG_NORACE(UCB1TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); @@ -217,7 +219,8 @@ implementation { UCB1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); - /* MCTL is zero'd by reset? Check it out */ + /* MCTL (modulation register) is zero'd on module reset + * per TI MSP430x2xx User's Guide SLAUF, pg 16-16. */ } /* diff --git a/tos/chips/msp430/usci/Msp430I2CP.nc b/tos/chips/msp430/usci/Msp430I2CP.nc index 9a6e84a148..b64f9d51fc 100644 --- a/tos/chips/msp430/usci/Msp430I2CP.nc +++ b/tos/chips/msp430/usci/Msp430I2CP.nc @@ -92,6 +92,7 @@ implementation { } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { + call UsciB.resetUsci_n(); call UsciB.disableI2C(); } diff --git a/tos/chips/msp430/usci/Msp430SpiDmaP.nc b/tos/chips/msp430/usci/Msp430SpiDmaP.nc index 5c492327e7..8fbe9a718f 100644 --- a/tos/chips/msp430/usci/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/usci/Msp430SpiDmaP.nc @@ -99,6 +99,7 @@ implementation { async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usci.resetUsci_n(); call Usci.disableSpi(); + /* leave in reset */ } event void UsciResource.granted[ uint8_t id ]() { diff --git a/tos/chips/msp430/usci/Msp430SpiNoDmaP.nc b/tos/chips/msp430/usci/Msp430SpiNoDmaP.nc index 468cd3e865..4eb20390e7 100644 --- a/tos/chips/msp430/usci/Msp430SpiNoDmaP.nc +++ b/tos/chips/msp430/usci/Msp430SpiNoDmaP.nc @@ -92,6 +92,7 @@ implementation { async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usci.resetUsci_n(); call Usci.disableSpi(); + /* leave in reset */ } event void UsciResource.granted[ uint8_t id ]() { diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc index f18e76b9e7..55395e5a5a 100644 --- a/tos/chips/msp430/usci/Msp430UartP.nc +++ b/tos/chips/msp430/usci/Msp430UartP.nc @@ -62,7 +62,7 @@ implementation { norace uint16_t m_tx_len, m_rx_len; norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; norace uint16_t m_tx_pos, m_rx_pos; - norace uint8_t m_byte_time; + norace uint8_t m_byte_time; /* kludge doesn't work */ norace uint8_t current_owner; async command error_t Resource.immediateRequest[ uint8_t id ]() { @@ -85,6 +85,9 @@ implementation { return call UsciResource.release[ id ](); } + /* + * this m_byte_time kludge is broken + */ async command void ResourceConfigure.configure[ uint8_t id ]() { msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); m_byte_time = config->uartConfig.ubr / 2; @@ -97,6 +100,7 @@ implementation { async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usci.resetUsci_n(); /* also turns off interrupt enables */ call Usci.disableUart(); + /* leave in reset */ } event void UsciResource.granted[ uint8_t id ]() { From 590bd00fe2087cf235802d3865b71aeac8a62e05 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 16 Mar 2011 12:10:23 -0700 Subject: [PATCH 021/411] usci/Hpl: clean up, remove enableIntr side effects. - clean up stuff. - simplify interrupt checks (simpler code generation) - remove side effects of clearing interrupts. Simple turn on IEs. --- tos/chips/msp430/usci/HplMsp430UsciA0P.nc | 77 ++++++++++------------- tos/chips/msp430/usci/HplMsp430UsciA1P.nc | 77 ++++++++++------------- tos/chips/msp430/usci/HplMsp430UsciB0P.nc | 63 +++++++++---------- tos/chips/msp430/usci/HplMsp430UsciB1P.nc | 69 +++++++++----------- 4 files changed, 123 insertions(+), 163 deletions(-) diff --git a/tos/chips/msp430/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/usci/HplMsp430UsciA0P.nc index 19f5470a60..46b015ab3a 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciA0P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciA0P.nc @@ -56,15 +56,18 @@ */ module HplMsp430UsciA0P @safe() { - provides interface HplMsp430UsciA as Usci; - provides interface HplMsp430UsciInterrupts as Interrupts; - - uses interface HplMsp430GeneralIO as SIMO; - uses interface HplMsp430GeneralIO as SOMI; - uses interface HplMsp430GeneralIO as UCLK; - uses interface HplMsp430GeneralIO as URXD; - uses interface HplMsp430GeneralIO as UTXD; - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; + provides { + interface HplMsp430UsciA as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as UCLK; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; + } } implementation { @@ -87,7 +90,7 @@ implementation { /* Control registers */ async command void Usci.setUctl0(msp430_uctl0_t control) { - UCA0CTL0=uctl02int(control); + UCA0CTL0 = uctl02int(control); } async command msp430_uctl0_t Usci.getUctl0() { @@ -95,7 +98,7 @@ implementation { } async command void Usci.setUctl1(msp430_uctl1_t control) { - UCA0CTL1=uctl12int(control); + UCA0CTL1 = uctl12int(control); } async command msp430_uctl1_t Usci.getUctl1() { @@ -190,6 +193,10 @@ implementation { return (tmp.ucsync && tmp.ucmode != 3); } + async command bool Usci.isSpi() { + return isSpi(); + } + bool isI2C() { msp430_uctl0_t tmp; @@ -204,10 +211,6 @@ implementation { return (tmp.ucsync == 0); } - async command bool Usci.isSpi() { - return isSpi(); - } - async command msp430_uscimode_t Usci.getMode() { if (isSpi()) return USCI_SPI; @@ -220,7 +223,7 @@ implementation { async command void Usci.enableSpi() { atomic { - call SIMO.selectModuleFunc(); + call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } @@ -259,19 +262,15 @@ implementation { configSpi(config); call Usci.unresetUsci_n(); call Usci.clrIntr(); - } + } } - async command bool Usci.isTxIntrPending(){ - if (IFG2 & UCA0TXIFG) - return TRUE; - return FALSE; + async command bool Usci.isTxIntrPending() { + return (IFG2 & UCA0TXIFG); } - async command bool Usci.isRxIntrPending(){ - if (IFG2 & UCA0RXIFG) - return TRUE; - return FALSE; + async command bool Usci.isRxIntrPending() { + return (IFG2 & UCA0RXIFG); } async command void Usci.clrTxIntr(){ @@ -317,21 +316,8 @@ implementation { IE2 &= ~(UCA0TXIE | UCA0RXIE); } - /* - * enableRxIntr: allow rx interrupts - * - * Will clean out any pending rx interrupt and then enables. - * This assumes that any left over byte is stale and should be - * thrown away. Note that most likely there will be overrun and - * framing errors too. Starting pristine is the way to go. - */ async command void Usci.enableRxIntr() { - uint8_t temp; - - atomic { - temp = call Usci.rx(); /* clean everything out */ - IE2 |= UCA0RXIE; /* and enable */ - } + IE2 |= UCA0RXIE; } /* @@ -362,16 +348,13 @@ implementation { * Doesn't make sense to do this. RX and TX side get dealt with independently * so why would this ever get called? Deprecate. * - * First clear out any pending rx or tx interrupt flags - * then set interrupt enables. + * First clear out any pending tx interrupt flags then set interrupt enables. + * If there is a rx byte available then enabling the rx interrupt will kick. */ async command void Usci.enableIntr() { - uint8_t temp; - atomic { - temp = call Usci.rx(); /* clean out rx side */ IFG2 &= ~UCA0TXIFG; /* and tx side */ - IE2 |= (UCA0TXIE | UCA0RXIE); /* enable both tx and rx */ + IE2 |= (UCA0TXIE | UCA0RXIE); /* enable both tx and rx */ } } @@ -383,6 +366,10 @@ implementation { UCA0TXBUF = data; } + /* + * grab current Rx buf from the h/w. + * This will also clear any pending error status bits. + */ async command uint8_t Usci.rx() { return UCA0RXBUF; } diff --git a/tos/chips/msp430/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/usci/HplMsp430UsciA1P.nc index 587fb7d7d1..c86c1cf246 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciA1P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciA1P.nc @@ -56,15 +56,18 @@ */ module HplMsp430UsciA1P @safe() { - provides interface HplMsp430UsciA as Usci; - provides interface HplMsp430UsciInterrupts as Interrupts; - - uses interface HplMsp430GeneralIO as SIMO; - uses interface HplMsp430GeneralIO as SOMI; - uses interface HplMsp430GeneralIO as UCLK; - uses interface HplMsp430GeneralIO as URXD; - uses interface HplMsp430GeneralIO as UTXD; - uses interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; + provides { + interface HplMsp430UsciA as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as UCLK; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; + } } implementation { @@ -87,7 +90,7 @@ implementation { /* Control registers */ async command void Usci.setUctl0(msp430_uctl0_t control) { - UCA1CTL0=uctl02int(control); + UCA1CTL0 = uctl02int(control); } async command msp430_uctl0_t Usci.getUctl0() { @@ -95,7 +98,7 @@ implementation { } async command void Usci.setUctl1(msp430_uctl1_t control) { - UCA1CTL1=uctl12int(control); + UCA1CTL1 = uctl12int(control); } async command msp430_uctl1_t Usci.getUctl1() { @@ -190,6 +193,10 @@ implementation { return (tmp.ucsync && tmp.ucmode != 3); } + async command bool Usci.isSpi() { + return isSpi(); + } + bool isI2C() { msp430_uctl0_t tmp; @@ -204,10 +211,6 @@ implementation { return (tmp.ucsync == 0); } - async command bool Usci.isSpi() { - return isSpi(); - } - async command msp430_uscimode_t Usci.getMode() { if (isSpi()) return USCI_SPI; @@ -220,7 +223,7 @@ implementation { async command void Usci.enableSpi() { atomic { - call SIMO.selectModuleFunc(); + call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } @@ -259,19 +262,15 @@ implementation { configSpi(config); call Usci.unresetUsci_n(); call Usci.clrIntr(); - } + } } - async command bool Usci.isTxIntrPending(){ - if (UC1IFG & UCA1TXIFG) - return TRUE; - return FALSE; + async command bool Usci.isTxIntrPending() { + return (UC1IFG & UCA1TXIFG); } - async command bool Usci.isRxIntrPending(){ - if (UC1IFG & UCA1RXIFG) - return TRUE; - return FALSE; + async command bool Usci.isRxIntrPending() { + return (UC1IFG & UCA1RXIFG); } async command void Usci.clrTxIntr(){ @@ -317,21 +316,8 @@ implementation { UC1IE &= ~(UCA1TXIE | UCA1RXIE); } - /* - * enableRxIntr: allow rx interrupts - * - * Will clean out any pending rx interrupt and then enables. - * This assumes that any left over byte is stale and should be - * thrown away. Note that most likely there will be overrun and - * framing errors too. Starting pristine is the way to go. - */ async command void Usci.enableRxIntr() { - uint8_t temp; - - atomic { - temp = call Usci.rx(); /* clean everything out */ - UC1IE |= UCA1RXIE; /* and enable */ - } + UC1IE |= UCA1RXIE; } /* @@ -362,16 +348,13 @@ implementation { * Doesn't make sense to do this. RX and TX side get dealt with independently * so why would this ever get called? Deprecate. * - * First clear out any pending rx or tx interrupt flags - * then set interrupt enables. + * First clear out any pending tx interrupt flags then set interrupt enables. + * If there is a rx byte available then enabling the rx interrupt will kick. */ async command void Usci.enableIntr() { - uint8_t temp; - atomic { - temp = call Usci.rx(); /* clean out rx side */ UC1IFG &= ~UCA1TXIFG; /* and tx side */ - UC1IE |= (UCA1TXIE | UCA1RXIE); /* enable both tx and rx */ + UC1IE |= (UCA1TXIE | UCA1RXIE); /* enable both tx and rx */ } } @@ -383,6 +366,10 @@ implementation { UCA1TXBUF = data; } + /* + * grab current Rx buf from the h/w. + * This will also clear any pending error status bits. + */ async command uint8_t Usci.rx() { return UCA1RXBUF; } diff --git a/tos/chips/msp430/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/usci/HplMsp430UsciB0P.nc index 84a3f4c5ed..403863d943 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB0P.nc @@ -118,17 +118,26 @@ implementation { * behaviour of setModeUart or setModeSpi which would be * used if setUbr wasn't available. Following the * config modification any interrupts are cleared out. + * + * The BR registers are 2 bytes and accessed as two byte references. + * We want it to be atomic. On the x2xxx part can UBR be referenced + * as a single atomic word? (This is how it is done on the x5xxx). + * For now we do it atomically and using two byte references (because + * of the address space and according to TI documentation). + * + * WARNING: TXIFG is forced clear after a baud rate change + * similar to what setMode causes. */ async command void Usci.setUbr(uint16_t control) { atomic { - if (UCB0CTL1 & UCSWRST) { + if (UCB0CTL1 & UCSWRST) { /* if already reset, set and bail */ UCB0BR0 = control & 0x00FF; UCB0BR1 = (control >> 8) & 0x00FF; return; } - call Usci.resetUsci_n(); - UCB0BR0 = control & 0x00FF; + call Usci.resetUsci_n(); /* not reset, 1st reset */ + UCB0BR0 = control & 0x00FF; /* then set. */ UCB0BR1 = (control >> 8) & 0x00FF; call Usci.unresetUsci_n(); call Usci.clrIntr(); @@ -180,6 +189,10 @@ implementation { return (tmp.ucsync && tmp.ucmode != 3); } + async command bool Usci.isSpi() { + return isSpi(); + } + bool isI2C() { msp430_uctl0_t tmp; @@ -197,7 +210,7 @@ implementation { async command void Usci.enableSpi() { atomic { - call SIMO.selectModuleFunc(); + call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } @@ -211,10 +224,6 @@ implementation { } } - async command bool Usci.isSpi() { - return isSpi(); - } - void configSpi(msp430_spi_union_config_t* config) { UCB0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); @@ -243,16 +252,12 @@ implementation { } } - async command bool Usci.isTxIntrPending(){ - if (IFG2 & UCB0TXIFG) - return TRUE; - return FALSE; + async command bool Usci.isTxIntrPending() { + return (IFG2 & UCB0TXIFG); } async command bool Usci.isRxIntrPending() { - if (IFG2 & UCB0RXIFG) - return TRUE; - return FALSE; + return (IFG2 & UCB0RXIFG); } async command void Usci.clrTxIntr(){ @@ -298,21 +303,8 @@ implementation { IE2 &= ~(UCB0TXIE | UCB0RXIE); } - /* - * enableRxIntr: allow rx interrupts - * - * Will clean out any pending rx interrupt and then enables. - * This assumes that any left over byte is stale and should be - * thrown away. Note that most likely there will be overrun and - * framing errors too. Starting pristine is the way to go. - */ async command void Usci.enableRxIntr() { - uint8_t temp; - - atomic { - temp = call Usci.rx(); /* clean everything out */ - IE2 |= UCB0RXIE; /* and enable */ - } + IE2 |= UCB0RXIE; } /* @@ -343,16 +335,13 @@ implementation { * Doesn't make sense to do this. RX and TX side get dealt with independently * so why would this ever get called? Deprecate. * - * First clear out any pending rx or tx interrupt flags - * then set interrupt enables. + * First clear out any pending tx interrupt flags then set interrupt enables. + * If there is a rx byte available then enabling the rx interrupt will kick. */ async command void Usci.enableIntr() { - uint8_t temp; - atomic { - temp = call Usci.rx(); /* clean out rx side */ IFG2 &= ~UCB0TXIFG; /* and tx side */ - IE2 |= (UCB0TXIE | UCB0RXIE); /* enable both tx and rx */ + IE2 |= (UCB0TXIE | UCB0RXIE); /* enable both tx and rx */ } } @@ -364,6 +353,10 @@ implementation { UCB0TXBUF = data; } + /* + * grab current Rx buf from the h/w. + * This will also clear any pending error status bits. + */ async command uint8_t Usci.rx() { return UCB0RXBUF; } diff --git a/tos/chips/msp430/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/usci/HplMsp430UsciB1P.nc index fae7a31ff5..14ff9ea255 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciB1P.nc @@ -118,17 +118,26 @@ implementation { * behaviour of setModeUart or setModeSpi which would be * used if setUbr wasn't available. Following the * config modification any interrupts are cleared out. + * + * The BR registers are 2 bytes and accessed as two byte references. + * We want it to be atomic. On the x2xxx part can UBR be referenced + * as a single atomic word? (This is how it is done on the x5xxx). + * For now we do it atomically and using two byte references (because + * of the address space and according to TI documentation). + * + * WARNING: TXIFG is forced clear after a baud rate change + * similar to what setMode causes. */ async command void Usci.setUbr(uint16_t control) { atomic { - if (UCB1CTL1 & UCSWRST) { + if (UCB1CTL1 & UCSWRST) { /* if already reset, set and bail */ UCB1BR0 = control & 0x00FF; UCB1BR1 = (control >> 8) & 0x00FF; return; } - call Usci.resetUsci_n(); - UCB1BR0 = control & 0x00FF; + call Usci.resetUsci_n(); /* not reset, 1st reset */ + UCB1BR0 = control & 0x00FF; /* then set. */ UCB1BR1 = (control >> 8) & 0x00FF; call Usci.unresetUsci_n(); call Usci.clrIntr(); @@ -180,6 +189,10 @@ implementation { return (tmp.ucsync && tmp.ucmode != 3); } + async command bool Usci.isSpi() { + return isSpi(); + } + bool isI2C() { msp430_uctl0_t tmp; @@ -197,7 +210,7 @@ implementation { async command void Usci.enableSpi() { atomic { - call SIMO.selectModuleFunc(); + call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } @@ -211,10 +224,6 @@ implementation { } } - async command bool Usci.isSpi() { - return isSpi(); - } - void configSpi(msp430_spi_union_config_t* config) { UCB1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); @@ -243,16 +252,12 @@ implementation { } } - async command bool Usci.isTxIntrPending(){ - if (UC1IFG & UCB1TXIFG) - return TRUE; - return FALSE; + async command bool Usci.isTxIntrPending() { + return (UC1IFG & UCB1TXIFG); } async command bool Usci.isRxIntrPending() { - if (UC1IFG & UCB1RXIFG) - return TRUE; - return FALSE; + return (UC1IFG & UCB1RXIFG); } async command void Usci.clrTxIntr(){ @@ -298,21 +303,8 @@ implementation { UC1IE &= ~(UCB1TXIE | UCB1RXIE); } - /* - * enableRxIntr: allow rx interrupts - * - * Will clean out any pending rx interrupt and then enables. - * This assumes that any left over byte is stale and should be - * thrown away. Note that most likely there will be overrun and - * framing errors too. Starting pristine is the way to go. - */ async command void Usci.enableRxIntr() { - uint8_t temp; - - atomic { - temp = call Usci.rx(); /* clean everything out */ - UC1IE |= UCB1RXIE; /* and enable */ - } + UC1IE |= UCB1RXIE; } /* @@ -343,16 +335,13 @@ implementation { * Doesn't make sense to do this. RX and TX side get dealt with independently * so why would this ever get called? Deprecate. * - * First clear out any pending rx or tx interrupt flags - * then set interrupt enables. + * First clear out any pending tx interrupt flags then set interrupt enables. + * If there is a rx byte available then enabling the rx interrupt will kick. */ async command void Usci.enableIntr() { - uint8_t temp; - atomic { - temp = call Usci.rx(); /* clean out rx side */ UC1IFG &= ~UCB1TXIFG; /* and tx side */ - UC1IE |= (UCB1TXIE | UCB1RXIE); /* enable both tx and rx */ + UC1IE |= (UCB1TXIE | UCB1RXIE); /* enable both tx and rx */ } } @@ -364,6 +353,10 @@ implementation { UCB1TXBUF = data; } + /* + * grab current Rx buf from the h/w. + * This will also clear any pending error status bits. + */ async command uint8_t Usci.rx() { return UCB1RXBUF; } @@ -377,16 +370,16 @@ implementation { async command void Usci.enableI2C() { atomic { - call USDA.selectModuleFunc(); + call USDA.selectModuleFunc(); call USCL.selectModuleFunc(); - } + } } async command void Usci.disableI2C() { atomic { call USDA.selectIOFunc(); call USCL.selectIOFunc(); - } + } } void configI2C(msp430_i2c_union_config_t* config) { From 023d4de18ec19a089633995b6b47a4f9780e732d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 16 Mar 2011 12:23:50 -0700 Subject: [PATCH 022/411] use common name for DIVS (/4), clock set up --- tos/chips/msp430/timer/Msp430ClockP.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/chips/msp430/timer/Msp430ClockP.nc b/tos/chips/msp430/timer/Msp430ClockP.nc index cbffae25db..98ec392c0d 100644 --- a/tos/chips/msp430/timer/Msp430ClockP.nc +++ b/tos/chips/msp430/timer/Msp430ClockP.nc @@ -91,7 +91,7 @@ implementation // .SELS = 0; select DCOCLK as source for SCLK // .DIVS = 2; set the divisor of SCLK to 4 // .DCOR = 0; select internal resistor for DCO - BCSCTL2 = DIVS1; + BCSCTL2 = DIVS_2; /* div/4 */ // IE1.OFIE = 0; no interrupt for oscillator fault CLR_FLAG( IE1, OFIE ); From d4ac1b8aaebd90d7dd5d41fd4e02f8291f903a96 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 16 Mar 2011 13:03:54 -0700 Subject: [PATCH 023/411] Usart1P: clear interrupt after disableing. --- tos/chips/msp430/usart/HplMsp430Usart1P.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/chips/msp430/usart/HplMsp430Usart1P.nc b/tos/chips/msp430/usart/HplMsp430Usart1P.nc index d3e849db69..f895455c58 100644 --- a/tos/chips/msp430/usart/HplMsp430Usart1P.nc +++ b/tos/chips/msp430/usart/HplMsp430Usart1P.nc @@ -308,8 +308,8 @@ implementation call Usart.disableUart(); } call Usart.resetUsart(FALSE); - call Usart.clrIntr(); call Usart.disableIntr(); + call Usart.clrIntr(); /* clear after taking out of reset */ } return; From 116fcfe30d67df76bd4c5ed075ee983845310a67 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 Mar 2011 00:33:43 -0700 Subject: [PATCH 024/411] move gdb files from 00_gdb to 99_gdb --- tos/chips/msp430/{00_gdb => 99_gdb}/gdb1xxx | 0 tos/chips/msp430/{00_gdb => 99_gdb}/gdb2xxx | 0 tos/chips/msp430/{00_gdb => 99_gdb}/gdb5xxx | 0 tos/chips/msp430/{00_gdb => 99_gdb}/gdbinit | 0 4 files changed, 0 insertions(+), 0 deletions(-) rename tos/chips/msp430/{00_gdb => 99_gdb}/gdb1xxx (100%) rename tos/chips/msp430/{00_gdb => 99_gdb}/gdb2xxx (100%) rename tos/chips/msp430/{00_gdb => 99_gdb}/gdb5xxx (100%) rename tos/chips/msp430/{00_gdb => 99_gdb}/gdbinit (100%) diff --git a/tos/chips/msp430/00_gdb/gdb1xxx b/tos/chips/msp430/99_gdb/gdb1xxx similarity index 100% rename from tos/chips/msp430/00_gdb/gdb1xxx rename to tos/chips/msp430/99_gdb/gdb1xxx diff --git a/tos/chips/msp430/00_gdb/gdb2xxx b/tos/chips/msp430/99_gdb/gdb2xxx similarity index 100% rename from tos/chips/msp430/00_gdb/gdb2xxx rename to tos/chips/msp430/99_gdb/gdb2xxx diff --git a/tos/chips/msp430/00_gdb/gdb5xxx b/tos/chips/msp430/99_gdb/gdb5xxx similarity index 100% rename from tos/chips/msp430/00_gdb/gdb5xxx rename to tos/chips/msp430/99_gdb/gdb5xxx diff --git a/tos/chips/msp430/00_gdb/gdbinit b/tos/chips/msp430/99_gdb/gdbinit similarity index 100% rename from tos/chips/msp430/00_gdb/gdbinit rename to tos/chips/msp430/99_gdb/gdbinit From d4b7c4bbe1e8b8a06bc6783f8c78b0870cebb058 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 Mar 2011 03:26:25 -0700 Subject: [PATCH 025/411] Update 00_Chip_Notes, 01_Dependencies, and 02_To_Do, Reflect info about chip differences. Chip_Notes: Renamed from 00_Readme. Flesh out with much more information about the differences between the basic processor families. Include what functional defines tell us what and invoke what changes. Dependencies: Flesh out processor dependencies a bit more. Include information about Clocks and Port naming. PA vs. P1 etc. And overlaps. To_Do: Some things fixed. Some things added. --- 02_To_Do | 21 +++- tos/chips/msp430/00_Chip_Notes | 174 +++++++++++++++++++++++++++++++ tos/chips/msp430/00_README | 87 ---------------- tos/chips/msp430/01_Dependencies | 43 ++++++-- 4 files changed, 227 insertions(+), 98 deletions(-) create mode 100644 tos/chips/msp430/00_Chip_Notes delete mode 100644 tos/chips/msp430/00_README diff --git a/02_To_Do b/02_To_Do index 6a2164c140..186fc3ea16 100644 --- a/02_To_Do +++ b/02_To_Do @@ -1,5 +1,6 @@ -* fix copyrights +* fix copyrights (this should happen before the mm-z1-x5 merge is brought back into the + SVN t2 mainline). * apps/IPBaseStation: defines a reset in a particularily ugly way. Needs to be fixed and made part of the platform/cpu definition. @@ -35,12 +36,24 @@ * Do we want to put in TOSThreads support? Best way if yes is to #ifdef needed code in the interrupt handlers. Old school mechanism clones the code. Why did Kevin do that? -* Z1 uses I2C but never defines SDA or SCL. Rather it overlays the I2C pins on the SPI pins. +-- (done) Z1 uses I2C but never defines SDA or SCL. Rather it overlays the I2C pins on the SPI pins. Works but isn't clean or straight forward. Confusing for someone new picking up what is going on. * Need better approach to assigning pins. Should be a platform thing. this makes it so drivers - don't wire directly but instead wire to the platform ports. + don't wire directly but instead wire to the platform ports. Or conversely the platform provides + the wiring... How to do this? -* UcsiB add call Usci.setUmctl(0)? +-- should UcsiB add call for Usci.setUmctl(0)? No. not defined (it exists though) but is reset to 0. +* clean up msp430_have_* checks. old old toolchain. + +* tos/lib/tosboot/msp430 has various h/w dependencies. Add support for other msp430 processors. + + One way is to simply extend what is in tos/lib/tosboot. That is keep the h/w dependancies in + tos/lib/tosboot/msp430. + + A better way would be to figure out how to make tos/lib/tosboot processor independent and + move processor dependancies into tos/chips/msp430. To start simply make the msp430 code + become processor independent and the pieces in tos/lib/tosboot/msp430 reference the + appropriate processor dependent code in tos/chips (pick via platform file). diff --git a/tos/chips/msp430/00_Chip_Notes b/tos/chips/msp430/00_Chip_Notes new file mode 100644 index 0000000000..42449f5cf3 --- /dev/null +++ b/tos/chips/msp430/00_Chip_Notes @@ -0,0 +1,174 @@ + +This directory contains interface files for the TI msp430 family of CPUs. +The TI architecture is rather scattered and the cpu interface to major +pieces reflects this. The main problem areas include: peripheral registers, +interrupts, and interrupt vectors. + +Care should be taken to minimize duplicates while maintaining the minimum implementation +that reflects the cpus currently supported by TinyOS. This should be done in a way +that minimizes impact on existing implementations (be backward compatible). See the +file 01_Dependencies for what CPUs are supported and the cpu dependencies. + +Where reasonable, conflicting areas are kept in a flat file and differences are +#ifdef'd. When this becomes too cumbersome, different interface definitions and +implementations are placed into cpu family directories (currently msp430/x1xxx, msp430/x2xxx, +and msp430/x5xxx). Dependent modules are duplicated and the correct module is selected +from the family directory via the .platform directory. + +Most of the cpu definitions are obtained automatically via the toolchain, ie. the -mmcu +specification automatically including the appropriate cpu header file. ie. -mmcu=msp430x2618 +causes the msp430x26x.h (legacy) or msp430f2618.h include file to be utilized. Which include is +actually used depends on the toolchain. + +The TI MSP430 family has many variants. There is a main cpu core and various integrated peripherals on +chip. What is provided by a given chip is indicated via functional defines in the chip definition include. +This chip definition file is included automatically via the -mmcu mechanism. + + +CPU Families: + +When it is too cumbersome to maintain a flat file that includes #ifdef'd difference for each of +the different variants, it is useful to seperate common interfaces into cpu family dependent family +files that provide various TinyOS interfaces. + +It is also useful for the sake of discussion to be able to talk about chips that have roughly the +same functionally. TI talks about the MSP430, MSP430X, and MSP430X2 but it is more useful to +denote families in a more practical sense. The families being defined are denoted x1 (x1xxx) for +1000 seris parts (typically first generation), x2 (x2xxx) for 2000 series parts (2nd generation), +and x5 (x5xxx). A given chip isn't given a family designation until it is actually understood and +supported. + +The following families and their associated cpus are listed below. When a new cpu is added to TinyOS, +it can first be isolated and supported independently. When commonalities are understood, any +duplication can be removed and subsumed into a flat file via #ifdef's as appropriate. Any remaining +interfaces that are too cumbersome, can be supported by an existing cpu family interface or a new family +can be defined as appropriate. The intent is to provide a mechanism that allows gradual refactorization as +new cpus are brought into the fold. + +The following families currently exist. Included are what cpus have been verified. Only add cpus that +have actually been instantiated. + +x1xxx (x1): msp430f1611, msp430f149 + telos{a,b}, epic, eyesIFXv1, eyesIFXv2, shimmer{,2,2r}, span, tinynode + +x2xxx (x2): msp430f261{6,7,8,9} + Z1 (2617), MM4 (mam-mark mote, 2618) + +x5xxx (x5): cc430f5137, msp430f5438{,a} + surf (cc430f5137), ev430-5137, ev430-5438, mm5 (mam-mark mote, msp430f5438a) + + +The tinyos interface is split into several sections: + +msp430hardware.h and msp430regtypes.h define various other attributes that interface the cpu +to the tinyos environment. These files coupled with the chip definition file define the cpu +and other capabilities available. + +The original architecture, the MSP430, provides 16 bit addresses. A subsequent revision denoted +MSP430X modifies the cpu and addressing to provide 20 bit addresses. Backward compatibilty to the +MSP430 was considered. A further modification is denoted the MSP430XV2 but it is unclear exactly +what this modified. The functional defines __MSP430_HAS_MSP430X_CPU__ and __MSP430_HAS_MSP430XV2_CPU__ +indicate the potential for 20 bit addresses. Switches to the toolchain will determine the instructions +used and the size of pointers. + +MSP430 processors are highly integrated, combining a cpu with various peripherals. The toolchain +provides chip definition files (includes) for each processor. These files indicate what peripherals +and other functions are present by the use of switches. These switches are of the form __MSP430_HAS___, +where indicates the function provided. + +Drivers for the different peripherals are provided in appropriately named subdirectories of the main +msp430 directory. Presence of the peripheral can be detected by checking appropriate values in the +chip definition file. Where reasonable, directories map to functional defines. These directories are: + +adc12: Most MSP430 chips include a 12 bit analog to digital converter. Driver currently supports + the basic 1st gen ADC12 (derived for the x1 family). + + __MSP430_HAS_ADC12__ original 12 bit. (x1, x2) + __MSP430_HAS_ADC12_PLUS__ on x5 processors, probably easy mod from ADC12. + +clock_bcs: low level interface to on board clocking. BASIC CLOCK SYSTEM (x1, x2) 1st gen and 2nd + clock support. + + __MSP430_HAS_BASIC_CLOCK__ indicates 1st rev of BASIC CLOCK. (x1) + __MSP430_HAS_BC2__ indicates 2nd rev of BASIC CLOCK. Same driver supports. (x2) + +clock_ucs: low level interface to x5 on board clocking. Unified Clock System introduced with the + x5 processors. + + __MSP430_HAS_UCS__ differences are minor and can probably be supported by the same + __MSP430_HAS_UCS_RF__ driver. Waiting for 5137 (surf) and mm5 (5438) integration. + +dma: potential for 1 to 8 independent dma channels. (We only use processors that define 3 + channels). MSP430X cpus can address 20 bits via the DMA engines. 20 bits increases + the overhead significantly and should only be used if really needed. ie. Most cpus only + provide RAM in the lower 64K so there really isn't much need for 20 bit addresses, + unless one is DMAing out of high memory (ROM). + + Currently, only a 16 bit dma interface is provided. In the future a dma32 interface could + be defined to provide access to the full 20 bits of addressing. This should wait until + there is an explicit need to access memory above 64K (ie. DMA out of ROM). Until then who + cares. + + __MSP430_HAS_DMA_3__ 3 channel, 16 bit addresses (x1) + __MSP430_HAS_DMAX_3__ 3 channel, 20 bit addresses (x2, x5). + + x5 processors have the potential for significantly more triggers than x1 or x2 processors. + This is indicated by the presence of DMA0TSEL4 (a 5th TSEL bit, DMA0 is in the unshifted + lsb position). + +pins: interface to digital I/O. Different processors can have radically different amounts of + digitial I/O. These pins are organized into ports. x2 and x5 processors have enhanced + port electronics which adds pull up/down resistor control and drive strength. Some processors + implement drive strength. Drive Strength presence can be determined by testing for the presence + of the appropriate register define (ie. PADS_). Currently drive strength isn't supported. + + x2 and x5 processors define 16 bit overlapping ports denoted using letters (ie. PA). + + __MSP430_HAS_PORT1__ basic support for the given port (8 bits) (x1) + __MSP430_HAS_PORT2__ + + __MSP430_HAS_PORT7_R__ x2 processors have the 16 bit PA overlap on P7/P8. + __MSP430_HAS_PORT8_R__ + __MSP430_HAS_PORTA_R__ 16 bit + + __MSP430_HAS_PORT1_R__ x5 processors define ports with resistor control and 16 bit + __MSP430_HAS_PORT2_R__ overlap makes more sense (PA 16 bit representation of P1/2). + __MSP430_HAS_PORTA_R__ + +rf1a: on chip cc1101 core. access via memory mapped i/o registers. + + __MSP430_HAS_CC1101__ indicates on board RF1A. Not to be confused with the seperate CC1101 + module which is accessable via a SPI interface. The two interfaces behave significantly + different. + +sensors: interfaces to on chip internal temperature and voltage sensors. Simple configuration + definitions for use with the ADC module. + +timer: interface to on chip timing mechanisms. Timers and Alarms. + + __MSP430_HAS_TA3__ (x1, x2) + __MSP430_HAS_TB7__ + + __MSP430_HAS_T0A5__ (x5, 5137, 5438) + __MSP430_HAS_T1A3__ (x5, 5137, 5438) + __MSP430_HAS_T0B7__ (x5, 5438) + +usart: interface to original UART/SPI/I2C on MSP430 parts. Universal Syncronous Asyncronous + Receiver/Transmitter. (1st generation). + + __MSP430_HAS_UART0__ USART0 present. Name sucks. + __MSP430_HAS_UART1__ USART1 present. + __MSP430_HAS_I2C__ defined if USART0 supports I2C. + +usci: interface to USCI (Universal Serial Communications Interface) modules UART/SPI/I2C on + MSP430X and later parts. A parts support UART and SPI. B parts support SPI and I2C. + + __MSP430_HAS_USCI__ x2. Stupid interface. Module registers scattered. Maintains + __MSP430_HAS_USCI_AB0__ stupid SFR. Different module shared interrupt vectors. TI + __MSP430_HAS_USCI_AB1__ really screwed this one up. + + __MSP430_HAS_USCI_A0__ x5. excellent module base registers, reasonable independent + __MSP430_HAS_USCI_B0__ interrupt vectors. + +When implementing new functionality a good approach is to base a driver off of one of the +__MSP430_HAS switches with an appropriately named directory. diff --git a/tos/chips/msp430/00_README b/tos/chips/msp430/00_README deleted file mode 100644 index 96c49fb0d6..0000000000 --- a/tos/chips/msp430/00_README +++ /dev/null @@ -1,87 +0,0 @@ - -This directory contains interface files for the TI msp430 family of CPUs. -The TI architecture is rather scattered and the cpu interface to major -pieces reflects this. The main problem areas include: peripheral registers, -interrupts, and interrupt vectors. - -Care should be taken to minimize duplicates while maintaining the minimum implementation -that reflects the cpus currently supported by TinyOS. This should be done in a way -that minimizes impact on existing implementations (be backward compatible). See the -file 01_Dependencies for what CPUs are supported and the cpu dependencies. - -Where reasonable, conflicting areas are kept in a flat file and differences are -#ifdef'd. When this becomes too cumbersome, different interface definitions and -implementations are placed into cpu family directories and the interface to -the rest of tinyos is shadowed. The correct directory needs to be specified in -the .platform file. - -Most of the cpu definitions are obtained automatically via the toolchain, ie. the -mmcu -specification automatically included the appropriate cpu header file. ie. -mmcu=msp430x2618 -causes the msp430f2618.h include file to be invoked. - -The TI MSP430 family has many variants. There is a main cpu core and various integrated peripherals on -chip. What a given chip includes is spelled out by the included chip definition file automatically -included via the -mmcu mechanism. - -The tinyos interface is spit into several sections: - -msp430hardware.h and msp430regtypes.h define various other attributes that interface the cpu -to the tinyos environment. These files coupled with the chip definition file define the cpu -and other capabilities available. - -The original architecture, the MSP430, provides 16 bit addresses. A subsequent revision denoted -MSP430X modifies the cpu and addressing to provide 20 bit addresses. Backward compatibilty to the -MSP430 was considered. A further modification is denoted the MSP430XV2 but it is unclear exactly -what this modified. - -Several directories are available that provide the drivers for the specified peripheral. Presence -of the peripheral can be detected by checking appropriate values in the chip definition file. These -directories are: - -adc12: Most MSP430 chips include a 12 bit analog to digital converter. - -dma: 3 or 8 independent dma channels are provided. MSP430X cpus can address 20 bits via the DMA - engines. 20 bits increases the overhead significantly and should only be used if really - needed. ie. Most cpus only provide RAM in the lower 64K so there really isn't much need - for 20 bit addresses, unless one is DMAing out of high memory (ROM). - - Currently, only a 16 bit dma interface is provided. In the future a dma32 interface could - be defined to provide access to the full 20 bits of addressing. - -pins: interface to digital I/O. - -sensors: interfaces to on chip internal temperature and voltage sensors. - -timer: interface to on chip timing mechanisms. Timers and Alarms. - -usart: interface to original UART/SPI/I2C on MSP430 parts. (1st generation). - -usci: interface to USCI modules UART/SPI/I2C on MSP430X and later parts. - - - -CPU Families: - -When it is too cumbersome to maintain a flat file that includes #ifdef'd difference for each of -the different variants, it is useful to seperate common interfaces into cpu family dependent family -files that provide various TinyOS interfaces. - -The following families and what cpus are supported are listed below. When a new cpu is added to TinyOS -support, it can first be isolated and supported independently. When commonalities are understood, any -duplication can be removed and subsumed into a flat file via #ifdef's as appropriate. Any remaining -interfaces that are too cumbersome, can be supported by an existing cpu family interface or a new family -can be defined as appropriate. The intent is to provide a mechanism that allows gradual refactorization as -new cpus are brought into the fold. - -The following families currently exist. Included are what cpus have been verified. Only add cpus that -have actually been instantiated. - -x1xxx: msp430f1611, msp430f149 - telos{a,b}, epic, eyesIFXv1, eyesIFXv2, shimmer{,2,2r}, span, tinynode - -x2xxx: msp430f2617, msp430f2618, msp430f2619 - Z1, MM4 (mam-mark mote) - -x5xxx: cc430f5137, msp430f5438{,a} - surf, ev430, mm5 (mam-mark mote) - diff --git a/tos/chips/msp430/01_Dependencies b/tos/chips/msp430/01_Dependencies index 298179fb46..cd07291fcd 100644 --- a/tos/chips/msp430/01_Dependencies +++ b/tos/chips/msp430/01_Dependencies @@ -2,7 +2,7 @@ CPU families: We currently define 3 cpu families that group similar TI msp430 chips together. Two chips -can be grouped together if for that module or interface the behaviour is the same. +can be grouped together if for that module or interface the behaviour is the similar enough. The main family is simply "msp430" and whenever possible we endevour to put everything we can into the generic msp430 directory. This is the top level. However when it becomes too cumbersome to make @@ -11,14 +11,14 @@ directories. These are subdirectories off msp430, ie. msp430/x1xxx and are sel file for a platform. Currently what differentiates the different family directories is interrupt behaviour, peripheral -register mapping, low power behaviour. +register mapping, clocking, and low power behaviour. CPUs supported: x1xxx: msp430f149, msp430f1611 x2xxx: msp430f261{6,7,8,9} - x5xxx: cc430f513{7,8,8a} + x5xxx: cc430f513{7,8,8a}, msp430f5438{,a} Interrupt Vectors: @@ -73,8 +73,8 @@ x5xxx vectors: (msp430f543{5,6,7,8}{,a}, cc430f5137) 0xFFFE 63 RESET_VECTOR 63 RESET_VECTOR -1) Vectors move to various addresses dependent on what cpu you are using. (This is taken care of by - proper usage of the cpu header files. +1) Vectors move to various addresses dependent on what cpu you are using. (handled using the + proper cpu header file). 2) Depending on family, vectors are shared across function. This complicates things and is ugly. @@ -82,8 +82,8 @@ x5xxx vectors: (msp430f543{5,6,7,8}{,a}, cc430f5137) has its own vector and no DAC vector (no DAC). Worse yet is the sharing of vectors for the USCI on the x2xxx parts. A vector is provided for - USCIAB0TX_VECTOR which is shared across both the A side and B side of the USCI which typically - can be operated in very different modes. This has been cleaned up in the x5xxx series parts. + USCIAB0TX_VECTOR which is shared across both the A side and B side of the USCI which can be + operated in different modes. This has been cleaned up in the x5xxx series parts. Addressing: @@ -123,6 +123,9 @@ DMA: use to initiate a transfer cycle. These fields maybe 4 or 5 bits wide and the driver needs to know how to construct an appropriate control word when interacting with the h/w. + x1xxx and x2xxx support 4 bit triggers. x5xxx cpus support 5 bit triggers. Number of triggers + can be determined by looking at what TSEL bits are defined in the cpu header files. + 3) Interrupt vector: @@ -130,3 +133,29 @@ DMA: The driver uses either DACDMA_VECTOR or DMA_VECTOR if defined. Otherwise complains about lack of support. + +4) Clocks. + + The x1xxx family has the original basic clock system (BCS) and has a 3 bit range select field. + The x2xxx family has revision 2 of this system (BC2) with a 4 bit range field but is essentially + mostly compatable with the x1xxx clock. + + The x5xxx family has the Unified Clock System which is different (__MSP430_HAS_UCS__). + +5) I0 Port naming. + + TI defines 8 bit numbered ports (P1 ... P). In later families 16 bit lettered ports PORTA, etc. + are also defined. Layout of these ports varies by family. In later parts, lettered ports are + a 16 bit overlay of two 8 bit numbered ports. ie. PortA is the 16 bit version of Port1 and Port2. + But this varies by family. + + x1xxx parts define __MSP430_HAS_PORT1__ to _PORT6__ no letter ports defined. + + x2xxx parts define __MSP430_HAS_PORT1__ to _PORT8__. PORTA overlays Port7/8. + + x5xxx parts define __MSP430_HAS_PORT1__ to _PORT8__. PORTA overlays Port1/2. + PORTB overlays Port3/4, etc. Number of ports defined depends on the cpu and how + many i/o pins are brought off the silicon. + + Note: the cc430f5137 has port1/2 (A), port 3/4 (B), port 5 (C). C is 16 bits but + only port5 is defined and overlays portC (low half). From 05c735e63f22a70f9e4a270ab4a344dffc62e2b8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 Mar 2011 03:42:35 -0700 Subject: [PATCH 026/411] MSP430: Protect low level drivers from doing the wrong thing by checking functional defines. Put in protection by using functional defines. Check to see if the processor being compiled for supports the h/w that the driver assumes it was written for. - First protect the MSP430 drivers from doing brain dead things (assuming the driver compiles) - Second by bailing with an explicit error or warning it is much clearer what is going on then some obscure message about some registers that one probably doesn't recognize. --- tos/chips/msp430/adc12/HplAdc12P.nc | 70 +++++++++++--------- tos/chips/msp430/dma/HplMsp430DmaP.nc | 44 ++----------- tos/chips/msp430/dma/HplMsp430DmaXP.nc | 46 +++---------- tos/chips/msp430/dma/Msp430DmaC.nc | 62 ++++++------------ tos/chips/msp430/usart/HplMsp430I2C0P.nc | 29 ++++++--- tos/chips/msp430/usart/HplMsp430Usart0P.nc | 70 +++++++------------- tos/chips/msp430/usart/HplMsp430Usart1P.nc | 76 +++++++++------------- tos/chips/msp430/usart/msp430usart.h | 9 ++- tos/chips/msp430/usci/msp430usci.h | 22 ++++++- tos/lib/tosboot/msp430/HardwareC.nc | 27 +++++--- tos/lib/tosboot/msp430/HplUsart0C.nc | 16 +++-- tos/lib/tosboot/msp430/HplUsartControl.nc | 17 +++-- tos/lib/tosboot/msp430/InternalFlashC.nc | 21 ++++-- tos/lib/tosboot/msp430/ProgFlashC.nc | 28 ++++++-- tos/lib/tosboot/msp430/VoltageC.nc | 19 +++--- 15 files changed, 254 insertions(+), 302 deletions(-) diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc index 9d8b32107f..cf96fdcc76 100644 --- a/tos/chips/msp430/adc12/HplAdc12P.nc +++ b/tos/chips/msp430/adc12/HplAdc12P.nc @@ -1,47 +1,55 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jan Hauer + * @author Eric B. Decker + * @see Please refer to TEP 101 for more information about this component and its + * intended use. * - * - Revision ------------------------------------------------------------- - * $Revision: 1.9 $ - * $Date: 2009-10-17 11:48:33 $ - * @author: Jan Hauer - * ======================================================================== - */ - -/** * The HplAdc12 interface exports low-level access to the ADC12 registers * of the MSP430 MCU. * - * @author Jan Hauer - * @see Please refer to TEP 101 for more information about this component and its - * intended use. */ +#if !defined(__MSP430_HAS_ADC12__) && !defined(__MSP430_HAS_ADC12_PLUS__) +#error "HplAdc12P: processor not supported, need ADC12 or ADC12_PLUS" +#endif + +#if defined(__MSP430_HAS_ADC12_PLUS__) +#warn "HplAdc12P: processor uses ADC12_PLUS (may not work correctly)" +#endif + module HplAdc12P { provides interface HplAdc12; } diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaP.nc index 739b116107..0e590d2c70 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaP.nc @@ -1,35 +1,6 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -43,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -59,9 +30,7 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre @@ -69,8 +38,9 @@ * @author Eric B. Decker */ -/* - * +#if !defined(__MSP430_HAS_DMA_3__) && !defined(__MSP430_HAS_DMAX_3__) +#error "HplMsp430DmaP: processor not supported, need DMA_3 or DMAX_3" +#endif #if defined(DACDMA_VECTOR) #define __DMA_VECTOR DACDMA_VECTOR @@ -81,10 +51,8 @@ #endif module HplMsp430DmaP { - provides interface HplMsp430DmaControl as DmaControl; provides interface HplMsp430DmaInterrupt as Interrupt; - } implementation { diff --git a/tos/chips/msp430/dma/HplMsp430DmaXP.nc b/tos/chips/msp430/dma/HplMsp430DmaXP.nc index f9f634550b..a109875b0e 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaXP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaXP.nc @@ -1,49 +1,21 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -59,16 +31,18 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre * @author Mark Hays - * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ +#if !defined(__MSP430_HAS_DMA_3__) && !defined(__MSP430_HAS_DMAX_3__) +#error "HplMsp430DmaXP: processor not supported, need DMA_3 or DMAX_3" +#endif + generic module HplMsp430DmaXP( uint16_t DMAxCTL_addr, uint16_t DMAxSA_addr, uint16_t DMAxDA_addr, diff --git a/tos/chips/msp430/dma/Msp430DmaC.nc b/tos/chips/msp430/dma/Msp430DmaC.nc index 33eb467a71..0015b73a3a 100644 --- a/tos/chips/msp430/dma/Msp430DmaC.nc +++ b/tos/chips/msp430/dma/Msp430DmaC.nc @@ -1,35 +1,6 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -39,11 +10,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -59,28 +32,32 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * Implementation of the HAL level component for the MSP430 DMA module. * This configuration provides the available DMA channels through the - * MSP430DMA parameterized interface. If more channels are requested + * MSP430DMA parameterized interface. + * + * (is the following still supported?) If more channels are requested * than available through unique("DMA"), there will be no mapping for * that channel and compilation will fail. * * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ -configuration Msp430DmaC { - - provides interface Msp430DmaControl as Control; - provides interface Msp430DmaChannel as Channel0; - provides interface Msp430DmaChannel as Channel1; - provides interface Msp430DmaChannel as Channel2; +#if !defined(__MSP430_HAS_DMA_3__) && !defined(__MSP430_HAS_DMAX_3__) +#error "Msp430DmaC: processor not supported, need 3 DMA channels" +#endif +configuration Msp430DmaC { + provides { + interface Msp430DmaControl as Control; + interface Msp430DmaChannel as Channel0; + interface Msp430DmaChannel as Channel1; + interface Msp430DmaChannel as Channel2; + } } implementation { @@ -104,5 +81,4 @@ implementation { ControlP.HplChannel0 -> HplDmaC.Channel0; ControlP.HplChannel1 -> HplDmaC.Channel1; ControlP.HplChannel2 -> HplDmaC.Channel2; - } diff --git a/tos/chips/msp430/usart/HplMsp430I2C0P.nc b/tos/chips/msp430/usart/HplMsp430I2C0P.nc index bd0ab402f3..081fdf167f 100644 --- a/tos/chips/msp430/usart/HplMsp430I2C0P.nc +++ b/tos/chips/msp430/usart/HplMsp430I2C0P.nc @@ -1,39 +1,48 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** + * OF THE POSSIBILITY OF SUCH DAMAGE. + * * @author Jonathan Hui - * @version $Revision: 1.5 $ $Date: 2008-06-24 05:32:31 $ + * @author Eric B. Decker + * + * Currently only supports x1 processors (msp430f149 and msp430f1611). + * needs USART0 support, __MSP430_HAS_UART0__ which really is USART0. + * + * msp430usart.h checks for __MSP430_HAS_UART0__. */ +#include "msp430usart.h" + module HplMsp430I2C0P @safe() { provides interface HplMsp430I2C as HplI2C; diff --git a/tos/chips/msp430/usart/HplMsp430Usart0P.nc b/tos/chips/msp430/usart/HplMsp430Usart0P.nc index ec8bbb30bd..0a3d378b49 100644 --- a/tos/chips/msp430/usart/HplMsp430Usart0P.nc +++ b/tos/chips/msp430/usart/HplMsp430Usart0P.nc @@ -1,76 +1,56 @@ -/** +/* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arched Rock Corporation + * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Copyright (c) 2004-2005, Technische Universitaet Berlin - * All rights reserved. + * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "msp430usart.h" -/** * Implementation of USART0 lowlevel functionality - stateless. * Setting a mode will by default disable USART-Interrupts. * - * @author: Jan Hauer - * @author: Jonathan Hui - * @author: Vlado Handziski - * @author: Joe Polastre - * @author: Philipp Huppertz - * @version $Revision: 1.8 $ $Date: 2010-06-04 22:30:21 $ + * @author Jan Hauer + * @author Jonathan Hui + * @author Vlado Handziski + * @author Joe Polastre + * @author Philipp Huppertz + * @author Eric B. Decker + * + * Currently only supports x1 processors (msp430f149 and msp430f1611). + * needs USART0 support, __MSP430_HAS_UART0__ which really is USART0. + * + * msp430usart.h checks for __MSP430_HAS_UART0__. */ +#include "msp430usart.h" + module HplMsp430Usart0P @safe() { provides interface HplMsp430Usart as Usart; provides interface HplMsp430UsartInterrupts as Interrupts; diff --git a/tos/chips/msp430/usart/HplMsp430Usart1P.nc b/tos/chips/msp430/usart/HplMsp430Usart1P.nc index f895455c58..c33e3e0cf0 100644 --- a/tos/chips/msp430/usart/HplMsp430Usart1P.nc +++ b/tos/chips/msp430/usart/HplMsp430Usart1P.nc @@ -1,75 +1,61 @@ -/** - * Copyright (c) 2005-2006 Arched Rock Corporation +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arched Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Copyright (c) 2004-2005, Technische Universitaet Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. + * OF THE POSSIBILITY OF SUCH DAMAGE. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "msp430usart.h" -/** * Implementation of USART1 lowlevel functionality - stateless. * Setting a mode will by default disable USART-Interrupts. * - * @author: Jan Hauer - * @author: Jonathan Hui - * @author: Vlado Handziski - * @author: Joe Polastre - * @version $Revision: 1.7 $ $Date: 2010-06-04 22:30:21 $ + * @author Jan Hauer + * @author Jonathan Hui + * @author Vlado Handziski + * @author Joe Polastre + * @author Eric B. Decker + * + * Currently only supports x1 processors (msp430f149 and msp430f1611). + * needs USART1 support, __MSP430_HAS_UART1__ which really is USART1. + * + * msp430usart.h checks for __MSP430_HAS_UART0__, and we check explicitly + * for UART1 here. We assume that to have USART1 one must also have UART0. + * The header files for the 149 and 1611 do have UART0 and UART1 defined. */ +#include "msp430usart.h" + +#if !defined(__MSP430_HAS_UART1__) +#error "HplMsp430Usart1P: USART1/UART1 not supported on this processor" +#endif + module HplMsp430Usart1P { provides interface AsyncStdControl; provides interface HplMsp430Usart as Usart; diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h index 40089ebd6a..7519525e14 100644 --- a/tos/chips/msp430/usart/msp430usart.h +++ b/tos/chips/msp430/usart/msp430usart.h @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * @@ -25,9 +26,7 @@ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* + * * @author Vlado Handziski * @author Philipp Huppertz * @author Eric B. Decker @@ -36,6 +35,10 @@ #ifndef _H_Msp430Usart_h #define _H_Msp430Usart_h +#if !defined(__MSP430_HAS_UART0__) +#error "msp430usart.h: USART0/UART0 not supported on this processor" +#endif + #define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource" #define MSP430_SPIO_BUS "Msp430Spi0.Resource" #define MSP430_UARTO_BUS "Msp430Uart0.Resource" diff --git a/tos/chips/msp430/usci/msp430usci.h b/tos/chips/msp430/usci/msp430usci.h index 39afafeb3a..853dd00b2c 100644 --- a/tos/chips/msp430/usci/msp430usci.h +++ b/tos/chips/msp430/usci/msp430usci.h @@ -39,13 +39,31 @@ * @author Eric B. Decker * @author Jordi Soucheiron * - * Fix to reflect the MSP430X as documented in the TI MSP430x2xx Users guide - * slau144f. + * Support the x2 version of the USCI for the TI MSPx2xx (see TI MSP430x2xx + * Users guide slau144f). + * + * The x2 USCI interface is seriously screwy. USCI port registers are spread + * out over various places and the interrupts have different modules on the same + * vector. This gets cleaned up in the x5 processors but that makes sharing + * the same code complicated. The following functional defines tell the story: + * + * x2: __MSP430_HAS_USCI__ + * __MSP430_HAS_USCI_AB0__ indicates interrupts messy. + * __MSP430_HAS_USCI_AB1__ + * + * x5: __MSP430_HAS_USCI_A0__ indicates vectors are module specific. + * __MSP430_HAS_USCI_B0__ + * __MSP430_HAS_USCI_A1__ + * __MSP430_HAS_USCI_B1__ etc. */ #ifndef _H_MSP430USCI_H #define _H_MSP430USCI_H +#if !defined(__MSP430_HAS_USCI__) +#error "msp430usci: processor not supported, currently only supports x2xxx (HAS_USCI)" +#endif + /* * The MSP430X architecture at least the msp430f2618 family * has a total of four ports that can be used independently diff --git a/tos/lib/tosboot/msp430/HardwareC.nc b/tos/lib/tosboot/msp430/HardwareC.nc index 99f4c534b9..e87ac51617 100644 --- a/tos/lib/tosboot/msp430/HardwareC.nc +++ b/tos/lib/tosboot/msp430/HardwareC.nc @@ -1,8 +1,5 @@ -// $Id: HardwareC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ - /* - * - * + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -12,10 +9,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -33,12 +32,25 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - */ - -/** * @author Jonathan Hui + * @author Eric B. Decker + * + * This module provides basic h/w support for tosboot (network boot + * loading) for the MSP430 processors. + * + * Currently only supports x1 processors (msp430f149 and msp430f1611). + * Implements basic clock support for BASIC_CLOCK. Can easily be + * extended to use Basic Clock 2 (__MSP430_HAS_BC2__). */ +#if !defined(__MSP430_HAS_BASIC_CLOCK__) +#error "tosboot/msp430: processor not supported: needs BASIC_CLOCK" +#endif + +#if !defined(__MSP430_HAS_WDT__) +#error "tosboot/msp430: processor not supported: needs WDT" +#endif + module HardwareC { provides { interface Hardware; @@ -55,5 +67,4 @@ implementation { command void Hardware.reboot() { WDTCTL = 0; } - } diff --git a/tos/lib/tosboot/msp430/HplUsart0C.nc b/tos/lib/tosboot/msp430/HplUsart0C.nc index b959d1574f..2c9367de9c 100644 --- a/tos/lib/tosboot/msp430/HplUsart0C.nc +++ b/tos/lib/tosboot/msp430/HplUsart0C.nc @@ -1,8 +1,5 @@ -// $Id: HplUsart0C.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ - /* - * - * + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -33,12 +30,17 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - */ - -/** * @author Jonathan Hui + * @author Eric B. Decker + * + * Currently only supports x1 processors (msp430f149 and msp430f1611). + * needs USART0 support, __MSP430_HAS_UART0__ which really is USART0. */ +#if !defined(__MSP430_HAS_UART0__) +#error "processor not supported: tosboot/msp430 only supports USART0/UART0" +#endif + module HplUsart0C { provides interface HplUsartControl; } diff --git a/tos/lib/tosboot/msp430/HplUsartControl.nc b/tos/lib/tosboot/msp430/HplUsartControl.nc index 0039639c3c..9942ff90d0 100644 --- a/tos/lib/tosboot/msp430/HplUsartControl.nc +++ b/tos/lib/tosboot/msp430/HplUsartControl.nc @@ -1,8 +1,5 @@ -// $Id: HplUsartControl.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ - /* - * - * + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -33,10 +30,14 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - */ - -/** * @author Jonathan Hui + * @author Eric B. Decker + * + * This module provides basic h/w support for tosboot (network boot + * loading) for the MSP430 processors. + * + * Currently only supports x1 processors (msp430f149 and msp430f1611). + * needs USART0 support, __MSP430_HAS_UART0__ which really is USART0. */ #include @@ -52,6 +53,4 @@ interface HplUsartControl { command error_t isRxIntrPending(); command void tx(uint8_t data); command uint8_t rx(); - } - diff --git a/tos/lib/tosboot/msp430/InternalFlashC.nc b/tos/lib/tosboot/msp430/InternalFlashC.nc index 5486733b8d..364c156975 100644 --- a/tos/lib/tosboot/msp430/InternalFlashC.nc +++ b/tos/lib/tosboot/msp430/InternalFlashC.nc @@ -1,8 +1,5 @@ -// $Id: InternalFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $ - /* - * - * + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * @@ -33,9 +30,6 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - */ - -/** * InternalFlashC.nc - Internal flash implementation for telos msp * platform. On the msp, the flash must first be erased before a value * can be written. However, the msp can only erase the flash at a @@ -47,9 +41,22 @@ * Valid address range is 0x1000 - 0x107E (0x107F is used to store the * version number of the information segment). * + * This module currently only supports the flash modules on the msp430f149 + * and msp430f1611. It may support other processors but has only been + * tested on the 149 and 1611. + * + * The 149 and 1611 have info flash between 1080 and 10ff and this is what + * this module wacks. Other processors may have the info memory at different + * locations and needs to be checked out prior to use. + * * @author Jonathan Hui + * @author Eric B. Decker */ +#if !defined(__msp430x14x) && !defined(__msp430x16x) +#error "processor not supported: only x149 and x1611 supported" +#endif + module InternalFlashC { provides interface InternalFlash; } diff --git a/tos/lib/tosboot/msp430/ProgFlashC.nc b/tos/lib/tosboot/msp430/ProgFlashC.nc index f61b817faa..f0adcd4b03 100644 --- a/tos/lib/tosboot/msp430/ProgFlashC.nc +++ b/tos/lib/tosboot/msp430/ProgFlashC.nc @@ -1,8 +1,5 @@ -// $Id: ProgFlashC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ - /* - * - * + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -12,10 +9,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -33,12 +32,27 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - */ - -/** * @author Jonathan Hui + * @author Eric B. Decker + * + * This module supports writing to Flash on MSP430 processors. Currently + * only handles writing flash in the lower 48 whoops lower 64K. The newer + * processors have more flash. Eventually we'll want to extend this. + * + * Currently, if someone tries to use another processor other than the old + * ones we bitch. That is just to flag that things are other than + * they seem. + * + * We could check for __MSP430_HAS_MSP430X_CPU__ or __MSP430_HAS_MSP430XV2_CPU__ + * but it is better to more restrictive. The idea is force people to look + * at stuff written for previous processors when a new processor is brought over + * (ie. ported to TinyOS). Active involvement rather than things kind of work. */ +#if !defined(__msp430x14x) && !defined(__msp430x16x) +#warn "ProgFlashC: limited to lower 64K (x149 and x1611)" +#endif + module ProgFlashC { provides { interface ProgFlash; diff --git a/tos/lib/tosboot/msp430/VoltageC.nc b/tos/lib/tosboot/msp430/VoltageC.nc index e321aa93a5..473409553c 100644 --- a/tos/lib/tosboot/msp430/VoltageC.nc +++ b/tos/lib/tosboot/msp430/VoltageC.nc @@ -1,8 +1,5 @@ -// $Id: VoltageC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ - /* - * - * + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * @@ -12,10 +9,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -33,12 +32,14 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - */ - -/** * @author Jonathan Hui + * @author Eric B. Decker */ +#if !defined(__msp430x14x) && !defined(__msp430x16x) +#warn "tosboot/VoltageC: Voltage/ADC non 149 or 1611 processor (not supported)." +#endif + module VoltageC { provides { interface Voltage; @@ -46,13 +47,11 @@ module VoltageC { } implementation { - enum { VTHRESH = 0xE66, // 2.7V }; command bool Voltage.okToProgram() { - int i; // Turn on and set up ADC12 with REF_1_5V @@ -77,7 +76,5 @@ implementation { // Check if voltage is greater than 2.7V return ( ADC12MEM0 > VTHRESH ); - } - } From 00a281eb1af701d5ea369d4c44e1f3b008d24173 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 Mar 2011 03:57:56 -0700 Subject: [PATCH 027/411] msp430/usci minor copyright mods --- tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc | 2 +- tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc | 2 +- tos/chips/msp430/usci/Msp430Spi2DmaP.nc | 4 +++- tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc | 2 +- tos/chips/msp430/usci/Msp430Spi3DmaP.nc | 2 +- tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc | 2 +- 6 files changed, 8 insertions(+), 6 deletions(-) diff --git a/tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc b/tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc index 86bf53af25..1eb218ae24 100644 --- a/tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc +++ b/tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc @@ -16,7 +16,7 @@ * documentation and/or other materials provided with the * distribution. * - * - Neither the name of the copyright holder nor the names of + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * diff --git a/tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc b/tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc index 88accb9b85..282008c8f1 100644 --- a/tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc +++ b/tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc @@ -16,7 +16,7 @@ * documentation and/or other materials provided with the * distribution. * - * - Neither the name of the copyright holder nor the names of + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * diff --git a/tos/chips/msp430/usci/Msp430Spi2DmaP.nc b/tos/chips/msp430/usci/Msp430Spi2DmaP.nc index 5fb3cfc8bb..5a22d3848a 100644 --- a/tos/chips/msp430/usci/Msp430Spi2DmaP.nc +++ b/tos/chips/msp430/usci/Msp430Spi2DmaP.nc @@ -10,11 +10,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * diff --git a/tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc b/tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc index d7a2c953c3..2f5ec4dc7b 100644 --- a/tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc +++ b/tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc @@ -16,7 +16,7 @@ * documentation and/or other materials provided with the * distribution. * - * - Neither the name of the copyright holder nor the names of + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * diff --git a/tos/chips/msp430/usci/Msp430Spi3DmaP.nc b/tos/chips/msp430/usci/Msp430Spi3DmaP.nc index 68583e7040..9d9b2f10e4 100644 --- a/tos/chips/msp430/usci/Msp430Spi3DmaP.nc +++ b/tos/chips/msp430/usci/Msp430Spi3DmaP.nc @@ -16,7 +16,7 @@ * documentation and/or other materials provided with the * distribution. * - * - Neither the name of the copyright holder nor the names of + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * diff --git a/tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc b/tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc index 5b102e4cd2..d7699e8056 100644 --- a/tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc +++ b/tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc @@ -16,7 +16,7 @@ * documentation and/or other materials provided with the * distribution. * - * - Neither the name of the copyright holder nor the names of + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * From 8c0b9c45e76e5339df5f42d9b0f80f7ddd6a16a8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 Mar 2011 04:00:27 -0700 Subject: [PATCH 028/411] msp430/usci (x2xxx) move usci into x2xxx/usci, prep for x2 vs. x5 --- tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA0C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA0P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA1C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA1P.nc | 0 .../msp430/{ => x2xxx}/usci/HplMsp430UsciAB0RawInterruptsP.nc | 0 .../msp430/{ => x2xxx}/usci/HplMsp430UsciAB1RawInterruptsP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB0C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB0P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB1C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB1P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciInterrupts.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciRawInterrupts.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430I2C0C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430I2C0P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430I2C1C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430I2C1P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430I2CConfigure.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430I2CP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi0C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi0DmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi0NoDmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi1C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi1NoDmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi2C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi2DmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi2NoDmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi3C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi3DmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi3NoDmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430SpiConfigure.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430SpiDmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430SpiNoDmaP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Uart0C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Uart0P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Uart1C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430Uart1P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UartConfigure.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UartP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciA0C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciA1C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciB0C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciB1C.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareA0P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareA1P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareB0P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareB1P.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareP.nc | 0 tos/chips/msp430/{ => x2xxx}/usci/PrintfUART.h | 0 tos/chips/msp430/{ => x2xxx}/usci/msp430usci.h | 0 tos/platforms/z1/.platform | 2 +- 52 files changed, 1 insertion(+), 1 deletion(-) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA0C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA0P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA1C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciA1P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciAB0RawInterruptsP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciAB1RawInterruptsP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB0C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB0P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB1C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciB1P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciInterrupts.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/HplMsp430UsciRawInterrupts.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430I2C0C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430I2C0P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430I2C1C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430I2C1P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430I2CConfigure.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430I2CP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi0C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi0DmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi0NoDmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi1C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi1NoDmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi2C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi2DmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi2NoDmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi3C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi3DmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Spi3NoDmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430SpiConfigure.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430SpiDmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430SpiNoDmaP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Uart0C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Uart0P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Uart1C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430Uart1P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UartConfigure.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UartP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciA0C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciA1C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciB0C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciB1C.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareA0P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareA1P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareB0P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareB1P.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/Msp430UsciShareP.nc (100%) rename tos/chips/msp430/{ => x2xxx}/usci/PrintfUART.h (100%) rename tos/chips/msp430/{ => x2xxx}/usci/msp430usci.h (100%) diff --git a/tos/chips/msp430/usci/HplMsp430UsciA.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciA.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciA.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciA0C.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0C.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciA0C.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0C.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciA0P.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciA1C.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1C.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciA1C.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1C.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciA1P.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciAB0RawInterruptsP.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciAB0RawInterruptsP.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciAB0RawInterruptsP.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciAB1RawInterruptsP.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciAB1RawInterruptsP.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciAB1RawInterruptsP.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciB.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciB.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciB0C.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0C.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciB0C.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0C.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciB0P.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciB1C.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1C.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciB1C.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1C.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciB1P.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciInterrupts.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciInterrupts.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciInterrupts.nc diff --git a/tos/chips/msp430/usci/HplMsp430UsciRawInterrupts.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciRawInterrupts.nc similarity index 100% rename from tos/chips/msp430/usci/HplMsp430UsciRawInterrupts.nc rename to tos/chips/msp430/x2xxx/usci/HplMsp430UsciRawInterrupts.nc diff --git a/tos/chips/msp430/usci/Msp430I2C0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2C0C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430I2C0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2C0C.nc diff --git a/tos/chips/msp430/usci/Msp430I2C0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2C0P.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430I2C0P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2C0P.nc diff --git a/tos/chips/msp430/usci/Msp430I2C1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2C1C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430I2C1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2C1C.nc diff --git a/tos/chips/msp430/usci/Msp430I2C1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2C1P.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430I2C1P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2C1P.nc diff --git a/tos/chips/msp430/usci/Msp430I2CConfigure.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CConfigure.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430I2CConfigure.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2CConfigure.nc diff --git a/tos/chips/msp430/usci/Msp430I2CP.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430I2CP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2CP.nc diff --git a/tos/chips/msp430/usci/Msp430Spi0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi0C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi0C.nc diff --git a/tos/chips/msp430/usci/Msp430Spi0DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi0DmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi0DmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi0DmaP.nc diff --git a/tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi0NoDmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi0NoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi0NoDmaP.nc diff --git a/tos/chips/msp430/usci/Msp430Spi1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi1C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi1C.nc diff --git a/tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi1NoDmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi1NoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi1NoDmaP.nc diff --git a/tos/chips/msp430/usci/Msp430Spi2C.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi2C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi2C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi2C.nc diff --git a/tos/chips/msp430/usci/Msp430Spi2DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi2DmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi2DmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi2DmaP.nc diff --git a/tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi2NoDmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi2NoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi2NoDmaP.nc diff --git a/tos/chips/msp430/usci/Msp430Spi3C.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi3C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi3C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi3C.nc diff --git a/tos/chips/msp430/usci/Msp430Spi3DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi3DmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi3DmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi3DmaP.nc diff --git a/tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430Spi3NoDmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Spi3NoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Spi3NoDmaP.nc diff --git a/tos/chips/msp430/usci/Msp430SpiConfigure.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiConfigure.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430SpiConfigure.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiConfigure.nc diff --git a/tos/chips/msp430/usci/Msp430SpiDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430SpiDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc diff --git a/tos/chips/msp430/usci/Msp430SpiNoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430SpiNoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc diff --git a/tos/chips/msp430/usci/Msp430Uart0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430Uart0C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Uart0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Uart0C.nc diff --git a/tos/chips/msp430/usci/Msp430Uart0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430Uart0P.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Uart0P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Uart0P.nc diff --git a/tos/chips/msp430/usci/Msp430Uart1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430Uart1C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Uart1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Uart1C.nc diff --git a/tos/chips/msp430/usci/Msp430Uart1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430Uart1P.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430Uart1P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430Uart1P.nc diff --git a/tos/chips/msp430/usci/Msp430UartConfigure.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartConfigure.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UartConfigure.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UartConfigure.nc diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UartP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UartP.nc diff --git a/tos/chips/msp430/usci/Msp430UsciA0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciA0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc diff --git a/tos/chips/msp430/usci/Msp430UsciA1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciA1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc diff --git a/tos/chips/msp430/usci/Msp430UsciB0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciB0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc diff --git a/tos/chips/msp430/usci/Msp430UsciB1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciB1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc diff --git a/tos/chips/msp430/usci/Msp430UsciShareA0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciShareA0P.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciShareA0P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciShareA0P.nc diff --git a/tos/chips/msp430/usci/Msp430UsciShareA1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciShareA1P.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciShareA1P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciShareA1P.nc diff --git a/tos/chips/msp430/usci/Msp430UsciShareB0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciShareB0P.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciShareB0P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciShareB0P.nc diff --git a/tos/chips/msp430/usci/Msp430UsciShareB1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciShareB1P.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciShareB1P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciShareB1P.nc diff --git a/tos/chips/msp430/usci/Msp430UsciShareP.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciShareP.nc similarity index 100% rename from tos/chips/msp430/usci/Msp430UsciShareP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciShareP.nc diff --git a/tos/chips/msp430/usci/PrintfUART.h b/tos/chips/msp430/x2xxx/usci/PrintfUART.h similarity index 100% rename from tos/chips/msp430/usci/PrintfUART.h rename to tos/chips/msp430/x2xxx/usci/PrintfUART.h diff --git a/tos/chips/msp430/usci/msp430usci.h b/tos/chips/msp430/x2xxx/usci/msp430usci.h similarity index 100% rename from tos/chips/msp430/usci/msp430usci.h rename to tos/chips/msp430/x2xxx/usci/msp430usci.h diff --git a/tos/platforms/z1/.platform b/tos/platforms/z1/.platform index bc6225515c..58319c5f91 100644 --- a/tos/platforms/z1/.platform +++ b/tos/platforms/z1/.platform @@ -23,12 +23,12 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/msp430/x2xxx + %T/chips/msp430/x2xxx/usci %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins %T/chips/msp430/timer - %T/chips/msp430/usci %T/chips/msp430/sensors %T/chips/stm25p %T/chips/sht11 From 22eab44036163967e42339534c983a11f43c84e2 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 Mar 2011 04:02:26 -0700 Subject: [PATCH 029/411] tests/z1: bring in Z1 test code --- .../z1/Accelerometer/AccelerometerAppC.nc | 20 ++ apps/tests/z1/Accelerometer/AccelerometerC.nc | 51 +++++ apps/tests/z1/Accelerometer/Makefile | 3 + apps/tests/z1/Blink/BlinkAppC.nc | 14 ++ apps/tests/z1/Blink/BlinkC.nc | 23 ++ apps/tests/z1/Blink/Makefile | 2 + apps/tests/z1/Button/ButtonAppC.nc | 15 ++ apps/tests/z1/Button/ButtonC.nc | 24 ++ apps/tests/z1/Button/Makefile | 2 + apps/tests/z1/FastADC/FastADCAppC.nc | 28 +++ apps/tests/z1/FastADC/FastADCC.nc | 150 +++++++++++++ apps/tests/z1/FastADC/Makefile | 6 + apps/tests/z1/FastADC/volumes-stm25p.xml | 3 + apps/tests/z1/IntAccel/IntAccelAppC.nc | 19 ++ apps/tests/z1/IntAccel/IntAccelC.nc | 73 ++++++ apps/tests/z1/IntAccel/Makefile | 2 + apps/tests/z1/Print/Makefile | 3 + apps/tests/z1/Print/PrintAppC.nc | 15 ++ apps/tests/z1/Print/PrintC.nc | 27 +++ apps/tests/z1/Receiver/Makefile | 2 + apps/tests/z1/Receiver/ReceiverAppC.nc | 19 ++ apps/tests/z1/Receiver/ReceiverC.nc | 53 +++++ apps/tests/z1/Receiver/Wireless.h | 12 + apps/tests/z1/Sender/Makefile | 2 + apps/tests/z1/Sender/SenderAppC.nc | 24 ++ apps/tests/z1/Sender/SenderC.nc | 60 +++++ apps/tests/z1/Sender/Wireless.h | 12 + apps/tests/z1/SimpleADXL/ADXL345.h | 32 +++ apps/tests/z1/SimpleADXL/ADXL345C.nc | 25 +++ apps/tests/z1/SimpleADXL/ADXL345Control.nc | 5 + apps/tests/z1/SimpleADXL/ADXL345P.nc | 210 ++++++++++++++++++ apps/tests/z1/SimpleADXL/Makefile | 3 + apps/tests/z1/SimpleADXL/PrintfUART.h | 70 ++++++ apps/tests/z1/SimpleADXL/TestADXL345AppC.nc | 21 ++ apps/tests/z1/SimpleADXL/TestADXL345C.nc | 71 ++++++ apps/tests/z1/Temperature/Makefile | 3 + apps/tests/z1/Temperature/TemperatureAppC.nc | 18 ++ apps/tests/z1/Temperature/TemperatureC.nc | 28 +++ apps/tests/z1/TestADXL345/Makefile | 6 + apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc | 17 ++ apps/tests/z1/TestADXL345/TestZ1DUTC.nc | 54 +++++ apps/tests/z1/TestTmp102/Makefile | 6 + apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc | 16 ++ apps/tests/z1/TestTmp102/TestZ1DUTC.nc | 50 +++++ 44 files changed, 1299 insertions(+) create mode 100644 apps/tests/z1/Accelerometer/AccelerometerAppC.nc create mode 100644 apps/tests/z1/Accelerometer/AccelerometerC.nc create mode 100644 apps/tests/z1/Accelerometer/Makefile create mode 100644 apps/tests/z1/Blink/BlinkAppC.nc create mode 100644 apps/tests/z1/Blink/BlinkC.nc create mode 100644 apps/tests/z1/Blink/Makefile create mode 100644 apps/tests/z1/Button/ButtonAppC.nc create mode 100644 apps/tests/z1/Button/ButtonC.nc create mode 100644 apps/tests/z1/Button/Makefile create mode 100644 apps/tests/z1/FastADC/FastADCAppC.nc create mode 100644 apps/tests/z1/FastADC/FastADCC.nc create mode 100644 apps/tests/z1/FastADC/Makefile create mode 100644 apps/tests/z1/FastADC/volumes-stm25p.xml create mode 100644 apps/tests/z1/IntAccel/IntAccelAppC.nc create mode 100644 apps/tests/z1/IntAccel/IntAccelC.nc create mode 100644 apps/tests/z1/IntAccel/Makefile create mode 100644 apps/tests/z1/Print/Makefile create mode 100644 apps/tests/z1/Print/PrintAppC.nc create mode 100644 apps/tests/z1/Print/PrintC.nc create mode 100644 apps/tests/z1/Receiver/Makefile create mode 100644 apps/tests/z1/Receiver/ReceiverAppC.nc create mode 100644 apps/tests/z1/Receiver/ReceiverC.nc create mode 100644 apps/tests/z1/Receiver/Wireless.h create mode 100644 apps/tests/z1/Sender/Makefile create mode 100644 apps/tests/z1/Sender/SenderAppC.nc create mode 100644 apps/tests/z1/Sender/SenderC.nc create mode 100644 apps/tests/z1/Sender/Wireless.h create mode 100644 apps/tests/z1/SimpleADXL/ADXL345.h create mode 100644 apps/tests/z1/SimpleADXL/ADXL345C.nc create mode 100644 apps/tests/z1/SimpleADXL/ADXL345Control.nc create mode 100644 apps/tests/z1/SimpleADXL/ADXL345P.nc create mode 100644 apps/tests/z1/SimpleADXL/Makefile create mode 100644 apps/tests/z1/SimpleADXL/PrintfUART.h create mode 100644 apps/tests/z1/SimpleADXL/TestADXL345AppC.nc create mode 100644 apps/tests/z1/SimpleADXL/TestADXL345C.nc create mode 100644 apps/tests/z1/Temperature/Makefile create mode 100644 apps/tests/z1/Temperature/TemperatureAppC.nc create mode 100644 apps/tests/z1/Temperature/TemperatureC.nc create mode 100644 apps/tests/z1/TestADXL345/Makefile create mode 100644 apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc create mode 100644 apps/tests/z1/TestADXL345/TestZ1DUTC.nc create mode 100644 apps/tests/z1/TestTmp102/Makefile create mode 100644 apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc create mode 100644 apps/tests/z1/TestTmp102/TestZ1DUTC.nc diff --git a/apps/tests/z1/Accelerometer/AccelerometerAppC.nc b/apps/tests/z1/Accelerometer/AccelerometerAppC.nc new file mode 100644 index 0000000000..7161aba4c7 --- /dev/null +++ b/apps/tests/z1/Accelerometer/AccelerometerAppC.nc @@ -0,0 +1,20 @@ +configuration AccelerometerAppC +{ +} +implementation +{ + components MainC, AccelerometerC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new TimerMilliC() as TimerAccel; + App.TimerAccel -> TimerAccel; + + components new ADXL345C(); + App.Zaxis -> ADXL345C.Z; + App.Yaxis -> ADXL345C.Y; + App.Xaxis -> ADXL345C.X; + App.AccelControl -> ADXL345C.SplitControl; +} \ No newline at end of file diff --git a/apps/tests/z1/Accelerometer/AccelerometerC.nc b/apps/tests/z1/Accelerometer/AccelerometerC.nc new file mode 100644 index 0000000000..b2d043e441 --- /dev/null +++ b/apps/tests/z1/Accelerometer/AccelerometerC.nc @@ -0,0 +1,51 @@ +#include "printfZ1.h" + +module AccelerometerC +{ + uses interface Boot; + uses interface Leds; + uses interface Timer as TimerAccel; + uses interface Read as Zaxis; + uses interface Read as Yaxis; + uses interface Read as Xaxis; + uses interface SplitControl as AccelControl; + +} +implementation +{ + event void Boot.booted() + { + printfz1_init(); + call AccelControl.start(); + } + + event void TimerAccel.fired() + { + call Leds.led0Toggle(); + call Xaxis.read(); + } + + event void AccelControl.startDone(error_t err) { + printfz1(" + Accelerometer Started\n"); + call TimerAccel.startPeriodic( 1000 ); + } + + event void AccelControl.stopDone(error_t err) { + + } + + event void Xaxis.readDone(error_t result, uint16_t data){ + printfz1(" + X (%d) ", data); + call Yaxis.read(); + } + + event void Yaxis.readDone(error_t result, uint16_t data){ + printfz1(" Y (%d) ", data); + call Zaxis.read(); + } + + event void Zaxis.readDone(error_t result, uint16_t data){ + printfz1(" Z (%d) \n", data); + } + +} \ No newline at end of file diff --git a/apps/tests/z1/Accelerometer/Makefile b/apps/tests/z1/Accelerometer/Makefile new file mode 100644 index 0000000000..68ea048743 --- /dev/null +++ b/apps/tests/z1/Accelerometer/Makefile @@ -0,0 +1,3 @@ +COMPONENT=AccelerometerAppC +CFLAGS += -DPRINTFUART_ENABLED +include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Blink/BlinkAppC.nc b/apps/tests/z1/Blink/BlinkAppC.nc new file mode 100644 index 0000000000..bcd56f6231 --- /dev/null +++ b/apps/tests/z1/Blink/BlinkAppC.nc @@ -0,0 +1,14 @@ +configuration BlinkAppC +{ +} +implementation +{ + components MainC, BlinkC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new TimerMilliC() as TimerBlink; + App.TimerBlink -> TimerBlink; +} \ No newline at end of file diff --git a/apps/tests/z1/Blink/BlinkC.nc b/apps/tests/z1/Blink/BlinkC.nc new file mode 100644 index 0000000000..125c0b4cf8 --- /dev/null +++ b/apps/tests/z1/Blink/BlinkC.nc @@ -0,0 +1,23 @@ +#include "Timer.h" + +module BlinkC +{ + uses interface Boot; + uses interface Leds; + uses interface Timer as TimerBlink; +} +implementation +{ + event void Boot.booted() + { + call TimerBlink.startPeriodic( 250 ); + } + + event void TimerBlink.fired() + { + call Leds.led0Toggle(); + call Leds.led1Toggle(); + call Leds.led2Toggle(); + } + +} \ No newline at end of file diff --git a/apps/tests/z1/Blink/Makefile b/apps/tests/z1/Blink/Makefile new file mode 100644 index 0000000000..27dde2297a --- /dev/null +++ b/apps/tests/z1/Blink/Makefile @@ -0,0 +1,2 @@ +COMPONENT=BlinkAppC +include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Button/ButtonAppC.nc b/apps/tests/z1/Button/ButtonAppC.nc new file mode 100644 index 0000000000..484e7471cc --- /dev/null +++ b/apps/tests/z1/Button/ButtonAppC.nc @@ -0,0 +1,15 @@ +configuration ButtonAppC +{ +} +implementation +{ + components MainC, ButtonC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components UserButtonC; + App.Button -> UserButtonC; + +} \ No newline at end of file diff --git a/apps/tests/z1/Button/ButtonC.nc b/apps/tests/z1/Button/ButtonC.nc new file mode 100644 index 0000000000..4a5be25ee3 --- /dev/null +++ b/apps/tests/z1/Button/ButtonC.nc @@ -0,0 +1,24 @@ +#include "UserButton.h" + +module ButtonC +{ + uses interface Leds; + uses interface Boot; + uses interface Notify as Button; +} +implementation +{ + event void Boot.booted() + { + call Button.enable(); + } + + event void Button.notify(button_state_t val) { + if(val == BUTTON_RELEASED) { + call Leds.led0Off(); + } else { + call Leds.led0On(); + } + } + +} \ No newline at end of file diff --git a/apps/tests/z1/Button/Makefile b/apps/tests/z1/Button/Makefile new file mode 100644 index 0000000000..32350b0fc0 --- /dev/null +++ b/apps/tests/z1/Button/Makefile @@ -0,0 +1,2 @@ +COMPONENT=ButtonAppC +include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/FastADC/FastADCAppC.nc b/apps/tests/z1/FastADC/FastADCAppC.nc new file mode 100644 index 0000000000..95748c59b9 --- /dev/null +++ b/apps/tests/z1/FastADC/FastADCAppC.nc @@ -0,0 +1,28 @@ +#include "StorageVolumes.h" + +configuration FastADCAppC +{ +} +implementation +{ + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new TimerMilliC() as TimerBlink; + App.TimerBlink -> TimerBlink; + components new TimerMilliC() as TimerSample; + App.TimerSample -> TimerSample; + + components new Msp430Adc12ClientAutoDMAC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + + components new BlockStorageC(VOLUME_BLOCKTEST); + App.BlockWrite -> BlockStorageC.BlockWrite; + App.BlockRead -> BlockStorageC.BlockRead; + +} \ No newline at end of file diff --git a/apps/tests/z1/FastADC/FastADCC.nc b/apps/tests/z1/FastADC/FastADCC.nc new file mode 100644 index 0000000000..46106754bb --- /dev/null +++ b/apps/tests/z1/FastADC/FastADCC.nc @@ -0,0 +1,150 @@ +#include "Timer.h" +#include "printfZ1.h" +#define FADSAMPLES 2000 +#define PRINTBUF 20 + +module FastADCC +{ + uses interface Boot; + uses interface Leds; + uses interface Timer as TimerBlink; + uses interface Timer as TimerSample; + + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + + uses interface BlockWrite; + uses interface BlockRead; +} +implementation +{ + + uint16_t adb[FADSAMPLES]; + uint16_t pb[PRINTBUF]; + uint16_t pos; + + msp430adc12_channel_config_t adcconfig = { + inch: TEMPERATURE_DIODE_CHANNEL, + sref: REFERENCE_AVcc_AVss, + ref2_5v: REFVOLT_LEVEL_1_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + void showerror(){ + call Leds.led0On(); + } + + void configureSingle(){ + error_t e; + printfz1("configuring single\n"); + e = call adc.configureSingle(&adcconfig); + if(e != SUCCESS) + showerror(); + printfz1("error %d\n", e); + } + + void configureMultiple(){ + error_t e; + printfz1("configuring multiple\n"); + e = call adc.configureMultiple(&adcconfig, adb, FADSAMPLES, 3); + if(e != SUCCESS) + showerror(); + printfz1("error %d\n", e); + + } + + void printadb(){ + uint16_t i; + printfz1("printing buffer\n"); + for(i = 0; i < FADSAMPLES; i++){ + printfz1("adb[%d] = %d\n", i, adb[i]); + } + } + + void writeadb(){ + printfz1("writing adb\n"); + call BlockWrite.write(0, adb, FADSAMPLES); + } + + void readadb(){ + + } + + event void Boot.booted() + { + printfz1_init(); + printfz1("booting\n"); + + call Resource.request(); + + } + + event void TimerBlink.fired() + { + call Leds.led0Toggle(); + call Leds.led1Toggle(); + call Leds.led2Toggle(); + } + + event void TimerSample.fired(){ + error_t e; + printfz1("starting conversion\n"); + e = call adc.getData(); + printfz1("error %d\n", e); + } + + async event void overflow.conversionTimeOverflow(){ + + } + + async event void overflow.memOverflow(){ + + } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + printfz1("samples ready\n"); + writeadb(); + printadb(); + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + //printfz1("sample: %d\n", data); + return SUCCESS; + } + + event void Resource.granted(){ + printfz1("Resource granted\n"); + configureMultiple(); + call TimerSample.startOneShot(1000); + } + + event void BlockRead.readDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { + + } + + event void BlockWrite.eraseDone(error_t result) { + + } + + event void BlockWrite.writeDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { + printfz1("write done -> %d\n", result); + if (result == SUCCESS){ + printfz1("syncing\n"); + call BlockWrite.sync(); + } + } + + event void BlockWrite.syncDone(error_t result) { + printfz1("sync done -> %d\n", result); + } + + event void BlockRead.computeCrcDone(storage_addr_t x, storage_len_t y, uint16_t z, error_t result) { + + } +} \ No newline at end of file diff --git a/apps/tests/z1/FastADC/Makefile b/apps/tests/z1/FastADC/Makefile new file mode 100644 index 0000000000..ae69519d20 --- /dev/null +++ b/apps/tests/z1/FastADC/Makefile @@ -0,0 +1,6 @@ +COMPONENT=FastADCAppC +CFLAGS += -DPRINTFUART_ENABLED +CFLAGS += -DADC12_TIMERA_ENABLED +CFLAGS += -DADC12_ONLY_WITH_DMA + +include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/FastADC/volumes-stm25p.xml b/apps/tests/z1/FastADC/volumes-stm25p.xml new file mode 100644 index 0000000000..04142446a2 --- /dev/null +++ b/apps/tests/z1/FastADC/volumes-stm25p.xml @@ -0,0 +1,3 @@ + + + \ No newline at end of file diff --git a/apps/tests/z1/IntAccel/IntAccelAppC.nc b/apps/tests/z1/IntAccel/IntAccelAppC.nc new file mode 100644 index 0000000000..8bbdd22182 --- /dev/null +++ b/apps/tests/z1/IntAccel/IntAccelAppC.nc @@ -0,0 +1,19 @@ +configuration IntAccelAppC +{ +} +implementation +{ + components MainC, IntAccelC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new ADXL345C(); + App.IntSource -> ADXL345C.IntSource; + App.AccelControl -> ADXL345C.SplitControl; + App.IntAccel1 -> ADXL345C.Int1; + App.IntAccel2 -> ADXL345C.Int2; + App.ADXLControl -> ADXL345C.ADXL345Control; + +} \ No newline at end of file diff --git a/apps/tests/z1/IntAccel/IntAccelC.nc b/apps/tests/z1/IntAccel/IntAccelC.nc new file mode 100644 index 0000000000..067338af46 --- /dev/null +++ b/apps/tests/z1/IntAccel/IntAccelC.nc @@ -0,0 +1,73 @@ +#include "ADXL345.h" + +module IntAccelC +{ + uses interface Boot; + uses interface Leds; + uses interface Read as IntSource; + uses interface SplitControl as AccelControl; + uses interface Notify as IntAccel1; + uses interface Notify as IntAccel2; + uses interface ADXL345Control as ADXLControl; + +} +implementation +{ + bool source_int2=FALSE; + + event void Boot.booted() + { + call AccelControl.start(); + } + + event void IntAccel1.notify(adxlint_state_t val) { + source_int2=FALSE; + call Leds.led0Toggle(); + call IntSource.read(); //this will clear the interruption + } + + event void IntAccel2.notify(adxlint_state_t val) { + source_int2=TRUE; + call IntSource.read(); //this will clear the interruption; + } + + event void AccelControl.startDone(error_t err) { + call ADXLControl.setInterrups( + ADXLINT_DOUBLE_TAP | + ADXLINT_SINGLE_TAP | + ADXLINT_FREE_FALL ); + } + + event void AccelControl.stopDone(error_t err) { + } + + event void IntSource.readDone(error_t result, uint8_t data){ + if(source_int2) { + if(data & ADXLINT_FREE_FALL) call Leds.led2Toggle(); + else call Leds.led1Toggle(); + } + } + + event void ADXLControl.setInterruptsDone(error_t error){ + call ADXLControl.setIntMap(ADXLINT_DOUBLE_TAP | ADXLINT_FREE_FALL); + } + + event void ADXLControl.setIntMapDone(error_t error){ + call IntAccel1.enable(); + call IntAccel2.enable(); + call IntSource.read(); //this will clear the interruption + } + + event void ADXLControl.setDurationDone(error_t error) { } //not used + + event void ADXLControl.setWindowDone(error_t error) { } //not used + + event void ADXLControl.setLatentDone(error_t error) { } //not used + + event void ADXLControl.setRegisterDone(error_t error) { } //not used + + event void ADXLControl.setRangeDone(error_t error) { } //not used + + event void ADXLControl.setReadAddressDone(error_t error) { } //not used + +} \ No newline at end of file diff --git a/apps/tests/z1/IntAccel/Makefile b/apps/tests/z1/IntAccel/Makefile new file mode 100644 index 0000000000..277d3b55e6 --- /dev/null +++ b/apps/tests/z1/IntAccel/Makefile @@ -0,0 +1,2 @@ +COMPONENT=IntAccelAppC +include $(MAKERULES) diff --git a/apps/tests/z1/Print/Makefile b/apps/tests/z1/Print/Makefile new file mode 100644 index 0000000000..e3cf39d110 --- /dev/null +++ b/apps/tests/z1/Print/Makefile @@ -0,0 +1,3 @@ +COMPONENT=PrintAppC +CFLAGS += -DPRINTFUART_ENABLED +include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Print/PrintAppC.nc b/apps/tests/z1/Print/PrintAppC.nc new file mode 100644 index 0000000000..70dfa32b83 --- /dev/null +++ b/apps/tests/z1/Print/PrintAppC.nc @@ -0,0 +1,15 @@ +configuration PrintAppC +{ +} +implementation +{ + components MainC, PrintC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new TimerMilliC() as TimerPrint; + App.TimerPrint -> TimerPrint; + +} \ No newline at end of file diff --git a/apps/tests/z1/Print/PrintC.nc b/apps/tests/z1/Print/PrintC.nc new file mode 100644 index 0000000000..0c8a650394 --- /dev/null +++ b/apps/tests/z1/Print/PrintC.nc @@ -0,0 +1,27 @@ +#include "printfZ1.h" + +module PrintC +{ + uses interface Boot; + uses interface Leds; + uses interface Timer as TimerPrint; +} +implementation +{ + uint8_t counter; + + event void Boot.booted() + { + printfz1_init(); + counter = 0; + call TimerPrint.startPeriodic( 1024 ); + } + + event void TimerPrint.fired() + { + call Leds.led0Toggle(); + printfz1("Print num: %d\n", counter); + counter++; + } + +} \ No newline at end of file diff --git a/apps/tests/z1/Receiver/Makefile b/apps/tests/z1/Receiver/Makefile new file mode 100644 index 0000000000..bb4a9d292d --- /dev/null +++ b/apps/tests/z1/Receiver/Makefile @@ -0,0 +1,2 @@ +COMPONENT=ReceiverAppC +include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Receiver/ReceiverAppC.nc b/apps/tests/z1/Receiver/ReceiverAppC.nc new file mode 100644 index 0000000000..d5e2414472 --- /dev/null +++ b/apps/tests/z1/Receiver/ReceiverAppC.nc @@ -0,0 +1,19 @@ +#include "Wireless.h" + +configuration ReceiverAppC {} +implementation { + components ReceiverC as App; + + components MainC; + App.Boot -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new AMReceiverC(AM_WIRELESS_MSG); + App.Receive -> AMReceiverC; + + components ActiveMessageC; + App.AMControl -> ActiveMessageC; + +} \ No newline at end of file diff --git a/apps/tests/z1/Receiver/ReceiverC.nc b/apps/tests/z1/Receiver/ReceiverC.nc new file mode 100644 index 0000000000..1762baedc5 --- /dev/null +++ b/apps/tests/z1/Receiver/ReceiverC.nc @@ -0,0 +1,53 @@ +#include "Wireless.h" + +module ReceiverC { + uses interface Leds; + uses interface Boot; + uses interface Receive; + uses interface SplitControl as AMControl; + uses interface Packet; +} +implementation { + + message_t packet; + + bool locked; + uint16_t counter = 0; + + event void Boot.booted() { + call AMControl.start(); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + // do nothing + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + // do nothing + } + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + if (len != sizeof(wireless_msg_t)) {return bufPtr;} + else { + wireless_msg_t* rcm = (wireless_msg_t*)payload; + + if (rcm->counter & 0x1) call Leds.led0On(); + else call Leds.led0Off(); + + if (rcm->counter & 0x2) call Leds.led1On(); + else call Leds.led1Off(); + + if (rcm->counter & 0x4) call Leds.led2On(); + else call Leds.led2Off(); + + return bufPtr; + } + } + +} \ No newline at end of file diff --git a/apps/tests/z1/Receiver/Wireless.h b/apps/tests/z1/Receiver/Wireless.h new file mode 100644 index 0000000000..6c4e0d9fe9 --- /dev/null +++ b/apps/tests/z1/Receiver/Wireless.h @@ -0,0 +1,12 @@ +#ifndef WIRELESS_H +#define WIRELESS_H + +typedef nx_struct wireless_msg { + nx_uint16_t counter; +} wireless_msg_t; + +enum { + AM_WIRELESS_MSG = 23, +}; + +#endif \ No newline at end of file diff --git a/apps/tests/z1/Sender/Makefile b/apps/tests/z1/Sender/Makefile new file mode 100644 index 0000000000..45c8bdd123 --- /dev/null +++ b/apps/tests/z1/Sender/Makefile @@ -0,0 +1,2 @@ +COMPONENT=SenderAppC +include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Sender/SenderAppC.nc b/apps/tests/z1/Sender/SenderAppC.nc new file mode 100644 index 0000000000..3dd3d5ebcc --- /dev/null +++ b/apps/tests/z1/Sender/SenderAppC.nc @@ -0,0 +1,24 @@ +#include "Wireless.h" + +configuration SenderAppC {} +implementation { + components SenderC as App; + + components MainC; + App.Boot -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + + components new AMSenderC(AM_WIRELESS_MSG); + App.AMSend -> AMSenderC; + App.Packet -> AMSenderC; + + components new TimerMilliC(); + App.TimerWireless -> TimerMilliC; + + components ActiveMessageC; + App.AMControl -> ActiveMessageC; + +} \ No newline at end of file diff --git a/apps/tests/z1/Sender/SenderC.nc b/apps/tests/z1/Sender/SenderC.nc new file mode 100644 index 0000000000..19d5db948c --- /dev/null +++ b/apps/tests/z1/Sender/SenderC.nc @@ -0,0 +1,60 @@ +#include "Timer.h" +#include "Wireless.h" + +module SenderC { + uses interface Leds; + uses interface Boot; + uses interface AMSend; + uses interface Timer as TimerWireless; + uses interface SplitControl as AMControl; + uses interface Packet; +} +implementation { + + message_t packet; + + bool locked; + uint16_t counter = 0; + + event void Boot.booted() { + call AMControl.start(); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call TimerWireless.startPeriodic(250); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + // do nothing + } + + event void TimerWireless.fired() { + counter++; + if (locked) { + return; + } + else { + wireless_msg_t* rcm = (wireless_msg_t*)call Packet.getPayload(&packet, sizeof(wireless_msg_t)); + if (rcm == NULL) { + return; + } + + rcm->counter = counter; + if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(wireless_msg_t)) == SUCCESS) { + locked = TRUE; + } + } + } + + event void AMSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + } + } + +} \ No newline at end of file diff --git a/apps/tests/z1/Sender/Wireless.h b/apps/tests/z1/Sender/Wireless.h new file mode 100644 index 0000000000..6c4e0d9fe9 --- /dev/null +++ b/apps/tests/z1/Sender/Wireless.h @@ -0,0 +1,12 @@ +#ifndef WIRELESS_H +#define WIRELESS_H + +typedef nx_struct wireless_msg { + nx_uint16_t counter; +} wireless_msg_t; + +enum { + AM_WIRELESS_MSG = 23, +}; + +#endif \ No newline at end of file diff --git a/apps/tests/z1/SimpleADXL/ADXL345.h b/apps/tests/z1/SimpleADXL/ADXL345.h new file mode 100644 index 0000000000..53c779035c --- /dev/null +++ b/apps/tests/z1/SimpleADXL/ADXL345.h @@ -0,0 +1,32 @@ +#ifndef ADXL345_H + +#define ADXL345_H + +#define ADXL345_ADDRESS 0x53 +#define ADXL345_POWER_CTL 0x2D +#define ADXL345_DATAX0 0x32 +#define ADXL345_DATAY0 0x34 +#define ADXL345_DATAZ0 0x36 +#define ADXL345_DATAFORMAT 0x31 + + +#define ADXL345_MEASURE_MODE 0x08 + +#define ADXL345_RANGE_2G 0 +#define ADXL345_RANGE_4G 1 +#define ADXL345_RANGE_8G 2 +#define ADXL345_RANGE_16G 3 + +#define ADXL345_LOWRES 0 +#define ADXL345_FULLRES 1 + +#define ADXLCMD_START 1 +#define ADXLCMD_READ_X 2 +#define ADXLCMD_READ_Y 3 +#define ADXLCMD_READ_Z 4 +#define ADXLCMD_RANGE 5 + + + + +#endif \ No newline at end of file diff --git a/apps/tests/z1/SimpleADXL/ADXL345C.nc b/apps/tests/z1/SimpleADXL/ADXL345C.nc new file mode 100644 index 0000000000..9cf569d19c --- /dev/null +++ b/apps/tests/z1/SimpleADXL/ADXL345C.nc @@ -0,0 +1,25 @@ + +configuration ADXL345C { + provides interface SplitControl; + provides interface Read as X; + provides interface Read as Y; + provides interface Read as Z; + provides interface ADXL345Control; +} +implementation { + components ADXL345P; + X = ADXL345P.X; + Y = ADXL345P.Y; + Z = ADXL345P.Z; + SplitControl = ADXL345P; + ADXL345Control = ADXL345P; + + components LedsC; + ADXL345P.Leds -> LedsC; + + components new Msp430I2C1C() as I2C; + ADXL345P.Resource -> I2C; + ADXL345P.ResourceRequested -> I2C; + ADXL345P.I2CBasicAddr -> I2C; + +} diff --git a/apps/tests/z1/SimpleADXL/ADXL345Control.nc b/apps/tests/z1/SimpleADXL/ADXL345Control.nc new file mode 100644 index 0000000000..6838076168 --- /dev/null +++ b/apps/tests/z1/SimpleADXL/ADXL345Control.nc @@ -0,0 +1,5 @@ +interface ADXL345Control +{ + command error_t setRange(uint8_t range, uint8_t resolution); + event void setRangeDone(); +} diff --git a/apps/tests/z1/SimpleADXL/ADXL345P.nc b/apps/tests/z1/SimpleADXL/ADXL345P.nc new file mode 100644 index 0000000000..64bcccbc28 --- /dev/null +++ b/apps/tests/z1/SimpleADXL/ADXL345P.nc @@ -0,0 +1,210 @@ +#include "ADXL345.h" + + +module ADXL345P { + provides { + interface SplitControl; + interface Read as X; + interface Read as Y; + interface Read as Z; + interface ADXL345Control; + } + uses { + interface Leds; + interface Resource; + interface ResourceRequested; + interface I2CPacket as I2CBasicAddr; + } + +} +implementation { + + norace uint8_t state; + norace uint8_t adxlcmd; + norace uint8_t databuf[10]; + norace uint8_t pointer; + norace uint16_t x_axis; + norace uint16_t y_axis; + norace uint16_t z_axis; + norace uint8_t dataformat; + + task void started(){ + signal SplitControl.startDone(SUCCESS); + } + + task void stopped(){ + + } + + task void calculateX(){ + signal X.readDone(SUCCESS, x_axis); + } + + task void calculateY(){ + signal Y.readDone(SUCCESS, y_axis); + } + + task void calculateZ(){ + signal Z.readDone(SUCCESS, z_axis); + } + + task void rangeDone(){ + signal ADXL345Control.setRangeDone(); + } + + command error_t SplitControl.start(){ + adxlcmd = ADXLCMD_START; + call Resource.request(); + return SUCCESS; + } + + command error_t SplitControl.stop(){ + return SUCCESS; + } + + command error_t ADXL345Control.setRange(uint8_t range, uint8_t resolution){ + adxlcmd = ADXLCMD_RANGE; + dataformat = resolution << 3; + dataformat = dataformat + range; + printfUART("dataformat %x\n", dataformat); + call Resource.request(); + return SUCCESS; + } + + command error_t X.read(){ + adxlcmd = ADXLCMD_READ_X; + call Resource.request(); + return SUCCESS; + } + + command error_t Y.read(){ + adxlcmd = ADXLCMD_READ_Y; + call Resource.request(); + return SUCCESS; + } + + command error_t Z.read(){ + adxlcmd = ADXLCMD_READ_Z; + call Resource.request(); + return SUCCESS; + } + + event void Resource.granted(){ + switch(adxlcmd){ + case ADXLCMD_START: + databuf[0] = ADXL345_POWER_CTL; + databuf[1] = ADXL345_MEASURE_MODE; + call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + break; + + case ADXLCMD_READ_X: + pointer = ADXL345_DATAX0; + call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + break; + + case ADXLCMD_READ_Y: + pointer = ADXL345_DATAY0; + call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + break; + + case ADXLCMD_READ_Z: + pointer = ADXL345_DATAZ0; + call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + break; + + case ADXLCMD_RANGE: + databuf[0] = ADXL345_DATAFORMAT; + databuf[1] = dataformat; + call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + break; + } + } + + async event void ResourceRequested.requested(){ + + } + + async event void ResourceRequested.immediateRequested(){ + + } + + async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + uint16_t tmp; + if(call Resource.isOwner()) { + switch(adxlcmd){ + case ADXLCMD_READ_X: + call Resource.release(); + //printfUART("tmpx %d - %d\n", data[1], data[0]); + tmp = data[1]; + tmp = tmp << 8; + tmp = tmp + data[0]; + x_axis = tmp; + post calculateX(); + break; + + case ADXLCMD_READ_Y: + call Resource.release(); + //printfUART("tmpy %d - %d\n", data[1], data[0]); + tmp = data[1]; + tmp = tmp << 8; + tmp = tmp + data[0]; + y_axis = tmp; + post calculateY(); + break; + + case ADXLCMD_READ_Z: + call Resource.release(); + //printfUART("tmpz %d - %d\n", data[1], data[0]); + tmp = data[1]; + tmp = tmp << 8; + tmp = tmp + data[0]; + z_axis = tmp; + post calculateZ(); + break; + } + } + } + + async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + if(call Resource.isOwner()) { + switch(adxlcmd){ + case ADXLCMD_START: + //nothing to do + call Resource.release(); + post started(); + break; + + case ADXLCMD_READ_X: + call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + break; + + case ADXLCMD_READ_Y: + call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + break; + + case ADXLCMD_READ_Z: + call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); + break; + + case ADXLCMD_RANGE: + call Resource.release(); + post rangeDone(); + break; + } + } + } + + /* default handlers */ + default event void X.readDone(error_t error, uint16_t data){ + return; + } + + default event void Y.readDone(error_t error, uint16_t data){ + return; + } + + default event void Z.readDone(error_t error, uint16_t data){ + return; + } + +} diff --git a/apps/tests/z1/SimpleADXL/Makefile b/apps/tests/z1/SimpleADXL/Makefile new file mode 100644 index 0000000000..19d97a7b7d --- /dev/null +++ b/apps/tests/z1/SimpleADXL/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TestADXL345AppC +include $(MAKERULES) + diff --git a/apps/tests/z1/SimpleADXL/PrintfUART.h b/apps/tests/z1/SimpleADXL/PrintfUART.h new file mode 100644 index 0000000000..8b7e64a120 --- /dev/null +++ b/apps/tests/z1/SimpleADXL/PrintfUART.h @@ -0,0 +1,70 @@ + +#ifndef PRINTFUART_H +#define PRINTFUART_H +#include +#include + +#warning including printfUART + +#define DEBUGBUF_SIZE 256 +char debugbuf[DEBUGBUF_SIZE]; +char debugbufROMtoRAM[DEBUGBUF_SIZE]; + +#define printfUART(__format...) { \ + sprintf(debugbuf, __format); \ + writedebug(); \ +} + + +/** + * Initialize the UART port. Call this from your startup routine. + */ +#define printfUART_init() {atomic printfUART_init_private();} +void printfUART_init_private() +{ + #warning initialize z1 serial port + /* + P3SEL |= 0xC0; // P3.6,7 = USCI_A1 TXD/RXD + UCA1CTL1 |= UCSSEL_1; // CLK = ACLK + UCA1BR0 = 0x03; // 32kHz/9600 = 3.41 + UCA1BR1 = 0x00; // + UCA1MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 + UCA1CTL1 &= ~UCSWRST; // **Initialize USCI state machine** + */ + P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD + UCA0CTL1 |= UCSSEL_1; // CLK = ACLK + UCA0BR0 = 0x03; // 32kHz/9600 = 3.41 + UCA0BR1 = 0x00; // + UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 + UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** +} + +/** + * Outputs a char to the UART. + */ +void UARTPutChar(char c) +{ + if (c == '\n') + UARTPutChar('\r'); + /* + while (!(UC1IFG&UCA1TXIFG)); + atomic UCA1TXBUF = c; + */ + while (!(IFG2&UCA0TXIFG)); + atomic UCA0TXBUF = c; + +} + +/** + * Outputs the entire debugbuf to the UART, or until it encounters '\0'. + */ +void writedebug() +{ + uint16_t i = 0; + + while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE) + UARTPutChar(debugbuf[i++]); +} + +#endif // PRINTFUART_H + diff --git a/apps/tests/z1/SimpleADXL/TestADXL345AppC.nc b/apps/tests/z1/SimpleADXL/TestADXL345AppC.nc new file mode 100644 index 0000000000..285e694653 --- /dev/null +++ b/apps/tests/z1/SimpleADXL/TestADXL345AppC.nc @@ -0,0 +1,21 @@ +// $Id: RadioSenseToLedsAppC.nc,v 1.4 2006/12/12 18:22:49 vlahan Exp $ + + + +configuration TestADXL345AppC {} +implementation { + components MainC, TestADXL345C as App, LedsC; + App.Boot -> MainC.Boot; + + App.Leds -> LedsC; + components new TimerMilliC() as TimerRead; + App.TimerRead -> TimerRead; + + components ADXL345C; + App.XAxis -> ADXL345C.X; + App.YAxis -> ADXL345C.Y; + App.ZAxis -> ADXL345C.Z; + App.AccelControl -> ADXL345C; + App.ADXL345Control -> ADXL345C; + +} diff --git a/apps/tests/z1/SimpleADXL/TestADXL345C.nc b/apps/tests/z1/SimpleADXL/TestADXL345C.nc new file mode 100644 index 0000000000..4fb7734534 --- /dev/null +++ b/apps/tests/z1/SimpleADXL/TestADXL345C.nc @@ -0,0 +1,71 @@ + +#include "Timer.h" +#include "PrintfUART.h" +#include "ADXL345.h" + +module TestADXL345C { + uses { + interface Leds; + interface Boot; + interface Timer as TimerRead; + interface Read as XAxis; + interface Read as YAxis; + interface Read as ZAxis; + interface SplitControl as AccelControl; + interface ADXL345Control; + } +} +implementation { + + int16_t x, y, z; + + event void Boot.booted() { + call Leds.led0On(); + printfUART_init(); + printfUART("Booted\n"); + call AccelControl.start(); + } + + event void AccelControl.startDone(error_t error){ + printfUART("Accel ON\n"); + call Leds.led1On(); + call ADXL345Control.setRange(ADXL345_RANGE_4G, ADXL345_FULLRES); + } + + event void AccelControl.stopDone(error_t error){ + + } + + event void ADXL345Control.setRangeDone(){ + printfUART("done \n"); + call TimerRead.startPeriodic(1000); + } + + event void TimerRead.fired(){ + call XAxis.read(); + } + + event void XAxis.readDone(error_t error, uint16_t data){ + //call Leds.led2Toggle(); + x = data; + printfUART("X %d ", x); + //printfUART("X %d \n", x); + call YAxis.read(); + } + + event void YAxis.readDone(error_t error, uint16_t data){ + //call Leds.led2Toggle(); + y = data; + printfUART("\tY %d", y); + call ZAxis.read(); + } + + event void ZAxis.readDone(error_t error, uint16_t data){ + call Leds.led2Toggle(); + z = data; + printfUART("\tZ %d\n", z); + } + + + +} diff --git a/apps/tests/z1/Temperature/Makefile b/apps/tests/z1/Temperature/Makefile new file mode 100644 index 0000000000..fa4816b6f9 --- /dev/null +++ b/apps/tests/z1/Temperature/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TemperatureAppC +CFLAGS += -DPRINTFUART_ENABLED +include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Temperature/TemperatureAppC.nc b/apps/tests/z1/Temperature/TemperatureAppC.nc new file mode 100644 index 0000000000..ad4c6aeea2 --- /dev/null +++ b/apps/tests/z1/Temperature/TemperatureAppC.nc @@ -0,0 +1,18 @@ +configuration TemperatureAppC +{ +} +implementation +{ + components MainC, TemperatureC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new TimerMilliC() as TimerTemperature; + App.TimerTemperature -> TimerTemperature; + + components new SimpleTMP102C(); + App.Temperature -> SimpleTMP102C; + +} \ No newline at end of file diff --git a/apps/tests/z1/Temperature/TemperatureC.nc b/apps/tests/z1/Temperature/TemperatureC.nc new file mode 100644 index 0000000000..dcc22cb8fd --- /dev/null +++ b/apps/tests/z1/Temperature/TemperatureC.nc @@ -0,0 +1,28 @@ +#include "printfZ1.h" + +module TemperatureC +{ + uses interface Boot; + uses interface Leds; + uses interface Timer as TimerTemperature; + uses interface Read as Temperature; +} +implementation +{ + event void Boot.booted() + { + printfz1_init(); + call TimerTemperature.startPeriodic( 1024 ); + } + + event void TimerTemperature.fired() + { + call Leds.led0Toggle(); + call Temperature.read(); + } + + event void Temperature.readDone(error_t error, uint16_t data){ + printfz1(" + Temperature (%d)\n", data); + } + +} \ No newline at end of file diff --git a/apps/tests/z1/TestADXL345/Makefile b/apps/tests/z1/TestADXL345/Makefile new file mode 100644 index 0000000000..c68f589e30 --- /dev/null +++ b/apps/tests/z1/TestADXL345/Makefile @@ -0,0 +1,6 @@ +COMPONENT=TestZ1DUTAppC +CFLAGS += -DPRINTFUART_ENABLED +CFLAGS += -DMSP430XSPEED8 +include $(MAKERULES) + + diff --git a/apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc b/apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc new file mode 100644 index 0000000000..0124d5e211 --- /dev/null +++ b/apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc @@ -0,0 +1,17 @@ + +#include "PrintfUART.h" + +configuration TestZ1DUTAppC {} +implementation { + components MainC, TestZ1DUTC as App, LedsC; + App.Leds -> LedsC; + App.Boot -> MainC.Boot; + components new TimerMilliC() as TestTimer; + App.TestTimer -> TestTimer; + + components new ADXL345C(); + App.Zaxis -> ADXL345C.Z; + App.AccelControl -> ADXL345C.SplitControl; +} + + diff --git a/apps/tests/z1/TestADXL345/TestZ1DUTC.nc b/apps/tests/z1/TestADXL345/TestZ1DUTC.nc new file mode 100644 index 0000000000..a64cc7dec6 --- /dev/null +++ b/apps/tests/z1/TestADXL345/TestZ1DUTC.nc @@ -0,0 +1,54 @@ + +// #include "Timer.h" +#include "PrintfUART.h" + +module TestZ1DUTC { + uses { + interface Leds; + interface Boot; + interface Timer as TestTimer; + interface Read as Zaxis; + interface SplitControl as AccelControl; + } +} +implementation { + void printTitles(){ + printfUART("\n\n"); + printfUART(" ###############################\n"); + printfUART(" # Z1 DUT MOTE v1.0 #\n"); + printfUART(" ###############################\n"); + printfUART("\n"); + } + + event void Boot.booted() { + printfUART_init(); + printTitles(); + call TestTimer.startPeriodic(1024); + } + + event void TestTimer.fired(){ + call AccelControl.start(); + } + + event void AccelControl.startDone(error_t err) { + if (err == SUCCESS){ + call Zaxis.read(); + } + } + + event void AccelControl.stopDone(error_t err) {} + + event void Zaxis.readDone(error_t result, uint16_t data){ + if (result == SUCCESS){ + call Leds.led2Toggle(); + printfUART("Zaxis: %d\n", data); + } + } + + +} + + + + + diff --git a/apps/tests/z1/TestTmp102/Makefile b/apps/tests/z1/TestTmp102/Makefile new file mode 100644 index 0000000000..c68f589e30 --- /dev/null +++ b/apps/tests/z1/TestTmp102/Makefile @@ -0,0 +1,6 @@ +COMPONENT=TestZ1DUTAppC +CFLAGS += -DPRINTFUART_ENABLED +CFLAGS += -DMSP430XSPEED8 +include $(MAKERULES) + + diff --git a/apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc b/apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc new file mode 100644 index 0000000000..3d53c9497c --- /dev/null +++ b/apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc @@ -0,0 +1,16 @@ + +#include "PrintfUART.h" + +configuration TestZ1DUTAppC {} +implementation { + components MainC, TestZ1DUTC as App, LedsC; + App.Leds -> LedsC; + App.Boot -> MainC.Boot; + components new TimerMilliC() as TestTimer; + App.TestTimer -> TestTimer; + + components new SimpleTMP102C() as Temperature; + App.TempSensor -> Temperature; +} + + diff --git a/apps/tests/z1/TestTmp102/TestZ1DUTC.nc b/apps/tests/z1/TestTmp102/TestZ1DUTC.nc new file mode 100644 index 0000000000..9c4ccc0ed0 --- /dev/null +++ b/apps/tests/z1/TestTmp102/TestZ1DUTC.nc @@ -0,0 +1,50 @@ + + #include "Timer.h" +#include "PrintfUART.h" + +module TestZ1DUTC { + uses { + interface Leds; + interface Boot; + interface Timer as TestTimer; + interface Read as TempSensor; + + } +} +implementation { + void printTitles(){ + printfUART("\n\n"); + printfUART(" ###############################\n"); + printfUART(" # #\n"); + printfUART(" # Z1 DUT MOTE v1.0 #\n"); + printfUART(" # #\n"); + printfUART(" ###############################\n"); + printfUART("\n"); + } + + event void Boot.booted() { + printfUART_init(); + printTitles(); + call TestTimer.startPeriodic(1024); + } + + event void TestTimer.fired(){ + call TempSensor.read(); + } + + event void TempSensor.readDone(error_t error, uint16_t data){ + if (error == SUCCESS){ + call Leds.led2Toggle(); + if (data > 2047){ + data -= (1<<12);} + data *=0.625; + printfUART("Temp: %2d.%1.2d\n", data/10, data>>2); + } + } + +} + + + + + From 70dd6f851108320f808057e6322668afad7133f9 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 Mar 2011 13:16:17 -0700 Subject: [PATCH 030/411] split out IAR support from msp430hardware.h, remember for the future. --- tos/chips/msp430/msp430iar.h | 84 ++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 tos/chips/msp430/msp430iar.h diff --git a/tos/chips/msp430/msp430iar.h b/tos/chips/msp430/msp430iar.h new file mode 100644 index 0000000000..2edc77ef2f --- /dev/null +++ b/tos/chips/msp430/msp430iar.h @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2010 People Power Co. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter A. Bigot + * @author Eric B. Decker + */ + +#ifndef _H_MSP430IAR_H +#define _H_MSP430IAR_H +/* + * We want to remember these just in case the gcc toolchain doesn't + * pan out. Remember in main trunk. + */ + +#ifdef WITH_IAR +/* + * Remove any MSPGCC redefines of the IAR intrinsics, and point the GCC + * versions at them. + */ +#undef READ_SR +#undef __get_SR_register +#define READ_SR __get_SR_register() +#undef BIC_SR +#undef __bic_SR_register +#define BIC_SR(_x) __bic_SR_register(_x) +#undef BIS_SR +#undef __bis_SR_register +#define BIS_SR(_x) __bis_SR_register(_x) +#undef __bis_SR_register_on_exit +#undef _BIS_SR_IRQ +#define _BIS_SR_IRQ(_x) __bis_SR_register_on_exit(_x) +#undef __bic_SR_register_on_exit +#undef _BIC_SR_IRQ +#define _BIC_SR_IRQ(_x) __bic_SR_register_on_exit(_x) + +/* + * Avoid gcc whining from gcc about IAR intrinsics by declaring them; + * but mark them so the mangler script doesn't leave these bogus + * prototypes in the source for IAR to find. + */ +#if defined(__GNUC__) +typedef volatile uint8_t tinyos_iar_msp430reg1_deleteme_t; +tinyos_iar_msp430reg1_deleteme_t __get_SR_register (); +tinyos_iar_msp430reg1_deleteme_t __bic_SR_register (uint8_t x); +tinyos_iar_msp430reg1_deleteme_t __bis_SR_register (uint8_t x); +tinyos_iar_msp430reg1_deleteme_t __bic_SR_register_on_exit (uint8_t x); +#endif /* __GNUC__ */ + +/* IAR won't accept array declarations with zero elements */ +#define STATIC_ARRAY_SIZE(_s) (((_s) == 0) ? 1 : (_s)) + +#endif /* WITH_IAR */ + +#endif /* _H_MSP430IAR_H */ From a3f2fd6c1f42fd64c8763adac7dc7f1d14e38a77 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 20 Mar 2011 09:19:38 -0700 Subject: [PATCH 031/411] Clocks: move x1 and x2 Clock code into clock_bcs, update dco_calib - split off clock code into clock_bcs and clock_ucs. UCS is for x5. BASIC_CLOCK (x1) and BC2 (x2) clock code is in clock_bcs (basic clock system). Different clock system different driver. - rework the basic_clock Msp430ClockP, use better field constants. - rework the dco_calib code. Revise the busy_wait algorithm. - different default Msp430DcoSpec.h for each family x1 defaults to 4MHz, x2 defaults to 8MHz. --- 02_To_Do | 12 + .../msp430/{timer => }/Msp430ClockInit.nc | 0 tos/chips/msp430/clock_bcs/00_Readme | 3 + .../{timer => clock_bcs}/Msp430ClockC.nc | 0 tos/chips/msp430/clock_bcs/Msp430ClockP.nc | 276 ++++++++++++++++++ .../{timer => clock_bcs}/Msp430DcoCalibC.nc | 0 .../{timer => clock_bcs}/Msp430DcoCalibP.nc | 0 tos/chips/msp430/timer/Msp430ClockP.nc | 251 ---------------- .../msp430/{timer => x1xxx}/Msp430DcoSpec.h | 0 tos/chips/msp430/x2xxx/Msp430DcoSpec.h | 56 ++++ tos/platforms/epic/.platform | 1 + tos/platforms/eyesIFX/.family | 1 + tos/platforms/shimmer/.platform | 1 + tos/platforms/shimmer2/.platform | 1 + tos/platforms/shimmer2r/.platform | 1 + tos/platforms/span/.platform | 1 + tos/platforms/telosa/.platform | 1 + tos/platforms/telosb/.platform | 1 + tos/platforms/tinynode/.platform | 1 + tos/platforms/z1/.platform | 1 + 20 files changed, 357 insertions(+), 251 deletions(-) rename tos/chips/msp430/{timer => }/Msp430ClockInit.nc (100%) create mode 100644 tos/chips/msp430/clock_bcs/00_Readme rename tos/chips/msp430/{timer => clock_bcs}/Msp430ClockC.nc (100%) create mode 100644 tos/chips/msp430/clock_bcs/Msp430ClockP.nc rename tos/chips/msp430/{timer => clock_bcs}/Msp430DcoCalibC.nc (100%) rename tos/chips/msp430/{timer => clock_bcs}/Msp430DcoCalibP.nc (100%) delete mode 100644 tos/chips/msp430/timer/Msp430ClockP.nc rename tos/chips/msp430/{timer => x1xxx}/Msp430DcoSpec.h (100%) create mode 100644 tos/chips/msp430/x2xxx/Msp430DcoSpec.h diff --git a/02_To_Do b/02_To_Do index 186fc3ea16..58b99719ba 100644 --- a/02_To_Do +++ b/02_To_Do @@ -57,3 +57,15 @@ move processor dependancies into tos/chips/msp430. To start simply make the msp430 code become processor independent and the pieces in tos/lib/tosboot/msp430 reference the appropriate processor dependent code in tos/chips (pick via platform file). + +* dco_calib: needs to be evaluated for BC2 (RSEL 4 bits vs. 3 bits). RSEL_MASK should take care + of it but needs to be checked. + +* dco_calib: currently busy wait runs two full ACLK_CALIB_PERIOD cycles. This can be shortened to one ACLK + edge and then an ACLK_CALIB_PERIOD. This may not be worth it because what we really want is an integrated + recalibration mechanism that runs off interrupts. One pass with ACLK_CALIB_PERIOD is 8 * 1/32768 = 244uS. + But it is a binary search and the entire process takes about 9ms. So we probably want to do this off + interrupts. But what about things like interrupt latency etc. + +* dco_calib: termination condition checks for dco 7 because mod bits no longer take effect. Verify for BC2 + and BASIC_CLOCK. diff --git a/tos/chips/msp430/timer/Msp430ClockInit.nc b/tos/chips/msp430/Msp430ClockInit.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430ClockInit.nc rename to tos/chips/msp430/Msp430ClockInit.nc diff --git a/tos/chips/msp430/clock_bcs/00_Readme b/tos/chips/msp430/clock_bcs/00_Readme new file mode 100644 index 0000000000..8964eb5969 --- /dev/null +++ b/tos/chips/msp430/clock_bcs/00_Readme @@ -0,0 +1,3 @@ +This directory support the msp430 basic clock (__MSP430_HAS_BASIC_CLOCK) and basic clock plus +(__MSP430_HAS_BC2_). These are clock modules support by 1st gen x1xxx processors and 2nd gen +x2xxx processors (ie. msp430f2618 etc). diff --git a/tos/chips/msp430/timer/Msp430ClockC.nc b/tos/chips/msp430/clock_bcs/Msp430ClockC.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430ClockC.nc rename to tos/chips/msp430/clock_bcs/Msp430ClockC.nc diff --git a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc new file mode 100644 index 0000000000..d70d02a97e --- /dev/null +++ b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc @@ -0,0 +1,276 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Cory Sharp + * @author Vlado Handziski + * @author Eric B. Decker + */ + +#include "Msp430DcoSpec.h" +#include "Msp430Timer.h" + +/* + * Basic Clock and BC2 differ in the size of the Range Select (RSEL) + * field. x1xxx (BASIC_CLOCK) has 3 bits, x2xxx (BC2) has 4 bits. + * RSEL_MAX denotes where to start for calibration, RSEL_MASK is used + * to mask the entire RSEL field. + */ +#if defined(__MSP430_HAS_BC2__) +#define RSEL_MASK (RSEL0 | RSEL1 | RSEL2 | RSEL3) +#define RSEL_MAX RSEL3 +#elif defined(__MSP430_HAS_BASIC_CLOCK__) +#define RSEL_MASK (RSEL0 | RSEL1 | RSEL2) +#define RSEL_MAX RSEL2 +#else +#error "Msp430ClockP (bcs): processor doesn't support BASIC_CLOCK/BC2" +#endif + +module Msp430ClockP @safe() { + provides { + interface Init; + interface Msp430ClockInit; + interface McuPowerOverride; + } +} + +implementation { + MSP430REG_NORACE(IE1); + MSP430REG_NORACE(TACTL); + MSP430REG_NORACE(TAIV); + MSP430REG_NORACE(TBCTL); + MSP430REG_NORACE(TBIV); + + enum { + ACLK_CALIB_PERIOD = 8, + TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, + }; + + async command mcu_power_t McuPowerOverride.lowestState() { + return MSP430_POWER_LPM3; + } + + command void Msp430ClockInit.defaultSetupDcoCalibrate() { + TACTL = TASSEL_2 | MC_2; // SMCLK/1, continuous mode, all else 0 + TBCTL = TBSSEL_1 | MC_2; // ACLK/1, continuous + BCSCTL1 = XT2OFF | RSEL_MAX; + BCSCTL1 = XT2OFF | RSEL2; + BCSCTL2 = 0; + TBCCTL0 = CM0; + } + + command void Msp430ClockInit.defaultInitClocks() { + // BCSCTL1 + // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK + // .XTS = 0; set low frequency mode for LXFT1 + // .DIVA = 0; set the divisor on ACLK to 1 + // .XT5V = 0, unused. must be 0 + // .RSEL, do not modify + BCSCTL1 = XT2OFF | (BCSCTL1 & RSEL_MASK); + + // BCSCTL2 + // .SELM = 0; select DCOCLK as source for MCLK + // .DIVM = 0; set the divisor of MCLK to 1 + // .SELS = 0; select DCOCLK as source for SCLK + // .DIVS = 2; set the divisor of SCLK to 4 + // .DCOR = 0; select internal resistor for DCO + BCSCTL2 = DIVS_2; /* div/4 */ + + // IE1.OFIE = 0; no interrupt for oscillator fault + CLR_FLAG( IE1, OFIE ); + } + + command void Msp430ClockInit.defaultInitTimerA() { + TAR = 0; + + // TACTL + // .TASSEL = 2; source SMCLK = DCO/4 + // .ID = 0; input divisor of 1 + // .MC = 0; initially disabled + // .TACLR = 0; + // .TAIE = 1; enable timer A interrupts + TACTL = TASSEL_2 | TAIE; + } + + command void Msp430ClockInit.defaultInitTimerB() { + TBR = 0; + + // TBCTL + // .TBCLGRP = 0; each TBCL group latched independently + // .CNTL = 0; 16-bit counter + // .TBSSEL = 1; source ACLK + // .ID = 0; input divisor of 1 + // .MC = 0; initially disabled + // .TBCLR = 0; + // .TBIE = 1; enable timer B interrupts + TBCTL = TBSSEL_1 | TBIE; + } + + default event void Msp430ClockInit.setupDcoCalibrate() { + call Msp430ClockInit.defaultSetupDcoCalibrate(); + } + + default event void Msp430ClockInit.initClocks() { + call Msp430ClockInit.defaultInitClocks(); + } + + default event void Msp430ClockInit.initTimerA() { + call Msp430ClockInit.defaultInitTimerA(); + } + + default event void Msp430ClockInit.initTimerB() { + call Msp430ClockInit.defaultInitTimerB(); + } + + void startTimerA() { + // TACTL.MC = 2; continuous mode + TACTL = MC_2 | (TACTL & ~(MC1 | MC0)); + } + + void stopTimerA() { + // TACTL.MC = 0; stop timer A + TACTL = TACTL & ~(MC1|MC0); + } + + void startTimerB() { + // TBCTL.MC = 2; continuous mode + TBCTL = MC_2 | (TBCTL & ~(MC1|MC0)); + } + + void stopTimerB() { + //TBCTL.MC = 0; stop timer B + TBCTL = TBCTL & ~(MC1|MC0); + } + + /* + * dco calibration. + * + * dco calibration is done by looking at how many dco clocks via timerA fit + * into some number of 32768 ACLK periods. Since we don't know where in a + * ACLK cycle we are, we must run two cycles. The 2nd cycle is when we + * actually do the measurement. + * + * Controls for the algorithm behaviour are: + * + * From tos/chips/msp430/timer/Msp430DcoSpec.h: + * TARGET_DCO_HZ frequency for DCO, 4096 KiHz + * ACLK_HZ frequency of ACLK, 32768 Hz + * + * ACLK_CALIB_PERIOD = 8, how many aclk cycles to use for sample period. + * TARGET_DCO_DELTA how many dco (ta) cycles we should see if + * calibrated. + * + * A calib control cell is passed around to control the algorithm. This + * control cell is the concatenation of RSEL (3 bits), DCOx (3 bits), and + * MODx (5 bits). Top byte contains RSEL, lower byte DCO and MOD. + * + * The key that drives this algorithm is TARGET_DCO_DELTA. This is the value + * we look for in a given ACLK_CALIB_PERIOD. It is computed from + * TARGET_DCO_HZ and ACLK_HZ. + */ + + void set_dco_calib(uint16_t calib) { + BCSCTL1 = (BCSCTL1 & ~RSEL_MASK) | ((calib >> 8) & RSEL_MASK); + DCOCTL = calib & 0xff; + } + + uint16_t test_calib_busywait_delta(uint16_t calib) { + uint16_t aclk_count = 2; /* better code */ + uint16_t dco_prev = 0; + uint16_t dco_curr = 0; + + set_dco_calib(calib); + + /* + * Don't know where in the current 32Khz cycle we are so we run two + * cycles. + */ + while (aclk_count-- > 0) { + TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt + TBCCTL0 &= ~CCIFG; // clear pending interrupt + while((TBCCTL0 & CCIFG) == 0) // busy wait + ; + dco_prev = dco_curr; + dco_curr = TAR; + } + return dco_curr - dco_prev; + } + + /* + * busyCalibrateDCO + * + * Should take about 9ms if ACLK_CALIB_PERIOD 8. + * DCOCTL and BCSCTL1 are calibrated when done. + * (9ms needs to be verified). 1611 and 2618. + */ + void busyCalibrateDco() { + uint16_t calib; + uint16_t step; + + /* + * Binary search for RSEL,DCO,DCOMOD. + * It's okay that RSEL isn't monotonic. + * + * RSEL_MAX is 8 for the 2618 and 4 for the 1611. So step starts + * with either 0x0800 or 0x0400. + */ + for (calib = 0, step = RSEL_MAX << 8; step; step >>= 1) { + /* if the step is not past the target, keep it */ + if (test_calib_busywait_delta(calib | step) <= TARGET_DCO_DELTA) + calib |= step; + /* + * if dco is 7 then mod bits remain zero they don't do anything if + * dco is 7. stop. + */ + if ((calib & 0x0e0) == 0x0e0) + break; + } + set_dco_calib( calib ); + } + + command error_t Init.init() { + TACTL = TACLR; /* clear should wack the IVs */ + TBCTL = TBCLR; + + atomic { + signal Msp430ClockInit.setupDcoCalibrate(); + busyCalibrateDco(); + signal Msp430ClockInit.initClocks(); + signal Msp430ClockInit.initTimerA(); + signal Msp430ClockInit.initTimerB(); + startTimerA(); + startTimerB(); + } + return SUCCESS; + } +} diff --git a/tos/chips/msp430/timer/Msp430DcoCalibC.nc b/tos/chips/msp430/clock_bcs/Msp430DcoCalibC.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430DcoCalibC.nc rename to tos/chips/msp430/clock_bcs/Msp430DcoCalibC.nc diff --git a/tos/chips/msp430/timer/Msp430DcoCalibP.nc b/tos/chips/msp430/clock_bcs/Msp430DcoCalibP.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430DcoCalibP.nc rename to tos/chips/msp430/clock_bcs/Msp430DcoCalibP.nc diff --git a/tos/chips/msp430/timer/Msp430ClockP.nc b/tos/chips/msp430/timer/Msp430ClockP.nc deleted file mode 100644 index 98ec392c0d..0000000000 --- a/tos/chips/msp430/timer/Msp430ClockP.nc +++ /dev/null @@ -1,251 +0,0 @@ -//$Id: Msp430ClockP.nc,v 1.9 2010-06-29 22:07:45 scipio Exp $ - -/* Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Cory Sharp - * @author Vlado Handziski - */ - -#include - -#include "Msp430Timer.h" - -module Msp430ClockP @safe() -{ - provides interface Init; - provides interface Msp430ClockInit; - provides interface McuPowerOverride; -} -implementation -{ - MSP430REG_NORACE(IE1); - MSP430REG_NORACE(TACTL); - MSP430REG_NORACE(TAIV); - MSP430REG_NORACE(TBCTL); - MSP430REG_NORACE(TBIV); - - enum - { - ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, - }; - - async command mcu_power_t McuPowerOverride.lowestState() { - return MSP430_POWER_LPM3; - } - - command void Msp430ClockInit.defaultSetupDcoCalibrate() - { - - // --- setup --- - - TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0 - TBCTL = TBSSEL0 | MC1; - BCSCTL1 = XT2OFF | RSEL2; - BCSCTL2 = 0; - TBCCTL0 = CM0; - } - - command void Msp430ClockInit.defaultInitClocks() - { - // BCSCTL1 - // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK - // .XTS = 0; set low frequency mode for LXFT1 - // .DIVA = 0; set the divisor on ACLK to 1 - // .RSEL, do not modify - BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0)); - - // BCSCTL2 - // .SELM = 0; select DCOCLK as source for MCLK - // .DIVM = 0; set the divisor of MCLK to 1 - // .SELS = 0; select DCOCLK as source for SCLK - // .DIVS = 2; set the divisor of SCLK to 4 - // .DCOR = 0; select internal resistor for DCO - BCSCTL2 = DIVS_2; /* div/4 */ - - // IE1.OFIE = 0; no interrupt for oscillator fault - CLR_FLAG( IE1, OFIE ); - } - - command void Msp430ClockInit.defaultInitTimerA() - { - TAR = 0; - - // TACTL - // .TACLGRP = 0; each TACL group latched independently - // .CNTL = 0; 16-bit counter - // .TASSEL = 2; source SMCLK = DCO/4 - // .ID = 0; input divisor of 1 - // .MC = 0; initially disabled - // .TACLR = 0; reset timer A - // .TAIE = 1; enable timer A interrupts - TACTL = TASSEL1 | TAIE; - } - - command void Msp430ClockInit.defaultInitTimerB() - { - TBR = 0; - - // TBCTL - // .TBCLGRP = 0; each TBCL group latched independently - // .CNTL = 0; 16-bit counter - // .TBSSEL = 1; source ACLK - // .ID = 0; input divisor of 1 - // .MC = 0; initially disabled - // .TBCLR = 0; reset timer B - // .TBIE = 1; enable timer B interrupts - TBCTL = TBSSEL0 | TBIE; - } - - default event void Msp430ClockInit.setupDcoCalibrate() - { - call Msp430ClockInit.defaultSetupDcoCalibrate(); - } - - default event void Msp430ClockInit.initClocks() - { - call Msp430ClockInit.defaultInitClocks(); - } - - default event void Msp430ClockInit.initTimerA() - { - call Msp430ClockInit.defaultInitTimerA(); - } - - default event void Msp430ClockInit.initTimerB() - { - call Msp430ClockInit.defaultInitTimerB(); - } - - - void startTimerA() - { - // TACTL.MC = 2; continuous mode - TACTL = MC1 | (TACTL & ~(MC1|MC0)); - } - - void stopTimerA() - { - //TACTL.MC = 0; stop timer B - TACTL = TACTL & ~(MC1|MC0); - } - - void startTimerB() - { - // TBCTL.MC = 2; continuous mode - TBCTL = MC1 | (TBCTL & ~(MC1|MC0)); - } - - void stopTimerB() - { - //TBCTL.MC = 0; stop timer B - TBCTL = TBCTL & ~(MC1|MC0); - } - - void set_dco_calib( int calib ) - { - BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07); - DCOCTL = calib & 0xff; - } - - uint16_t test_calib_busywait_delta( int calib ) - { - int8_t aclk_count = 2; - uint16_t dco_prev = 0; - uint16_t dco_curr = 0; - - set_dco_calib( calib ); - - while( aclk_count-- > 0 ) - { - TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt - TBCCTL0 &= ~CCIFG; // clear pending interrupt - while( (TBCCTL0 & CCIFG) == 0 ); // busy wait - dco_prev = dco_curr; - dco_curr = TAR; - } - - return dco_curr - dco_prev; - } - - // busyCalibrateDCO - // Should take about 9ms if ACLK_CALIB_PERIOD=8. - // DCOCTL and BCSCTL1 are calibrated when done. - void busyCalibrateDco() - { - // --- variables --- - int calib; - int step; - - // --- calibrate --- - - // Binary search for RSEL,DCO,DCOMOD. - // It's okay that RSEL isn't monotonic. - - for( calib=0,step=0x800; step!=0; step>>=1 ) - { - // if the step is not past the target, commit it - if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA ) - calib |= step; - } - - // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0 - if( (calib & 0x0e0) == 0x0e0 ) - calib &= ~0x01f; - - set_dco_calib( calib ); - } - - command error_t Init.init() - { - // Reset timers and clear interrupt vectors - TACTL = TACLR; - TAIV = 0; - TBCTL = TBCLR; - TBIV = 0; - - atomic - { - signal Msp430ClockInit.setupDcoCalibrate(); - busyCalibrateDco(); - signal Msp430ClockInit.initClocks(); - signal Msp430ClockInit.initTimerA(); - signal Msp430ClockInit.initTimerB(); - startTimerA(); - startTimerB(); - } - - return SUCCESS; - } -} - diff --git a/tos/chips/msp430/timer/Msp430DcoSpec.h b/tos/chips/msp430/x1xxx/Msp430DcoSpec.h similarity index 100% rename from tos/chips/msp430/timer/Msp430DcoSpec.h rename to tos/chips/msp430/x1xxx/Msp430DcoSpec.h diff --git a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h new file mode 100644 index 0000000000..ef98c435b9 --- /dev/null +++ b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2007 Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Andreas Koepke + * @author Eric B. Decker + * + * Specify the target cpu clock speed of your platform by overriding this file. + * + * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some + * platforms have an external high frequency oscilator to generate the SMCLK + * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These + * oscillators provide metric frequencies, but may not run in power down + * modes. Here, we need to switch the SMCLK source, which is easier if + * the external and thd DCO source frequency are the same. + * + */ + + +#ifndef MS430DCOSPEC_H +#define MS430DCOSPEC_H + +#define TARGET_DCO_KHZ 8192 +#define ACLK_KHZ 32 + +#endif diff --git a/tos/platforms/epic/.platform b/tos/platforms/epic/.platform index c2f4810ff3..b8ff11fa37 100644 --- a/tos/platforms/epic/.platform +++ b/tos/platforms/epic/.platform @@ -30,6 +30,7 @@ push( @includes, qw( %T/chips/cc2420/security %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins diff --git a/tos/platforms/eyesIFX/.family b/tos/platforms/eyesIFX/.family index c315e3bc96..e903d7ad44 100644 --- a/tos/platforms/eyesIFX/.family +++ b/tos/platforms/eyesIFX/.family @@ -17,6 +17,7 @@ push( @includes, qw( %T/chips/ad5200 %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins diff --git a/tos/platforms/shimmer/.platform b/tos/platforms/shimmer/.platform index e6e4f51522..dc4df6a1d3 100644 --- a/tos/platforms/shimmer/.platform +++ b/tos/platforms/shimmer/.platform @@ -34,6 +34,7 @@ push( @includes, qw( %T/chips/cc2420/security %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins diff --git a/tos/platforms/shimmer2/.platform b/tos/platforms/shimmer2/.platform index 14afeae941..2d977625fd 100644 --- a/tos/platforms/shimmer2/.platform +++ b/tos/platforms/shimmer2/.platform @@ -44,6 +44,7 @@ push( @includes, qw( %T/chips/cc2420/security %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins diff --git a/tos/platforms/shimmer2r/.platform b/tos/platforms/shimmer2r/.platform index 57f9bacfd1..dd6ede5f2c 100644 --- a/tos/platforms/shimmer2r/.platform +++ b/tos/platforms/shimmer2r/.platform @@ -44,6 +44,7 @@ push( @includes, qw( %T/chips/cc2420/security %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins diff --git a/tos/platforms/span/.platform b/tos/platforms/span/.platform index a7f7b71927..ca2737e7c2 100644 --- a/tos/platforms/span/.platform +++ b/tos/platforms/span/.platform @@ -29,6 +29,7 @@ push( @includes, qw( %T/chips/cc2420/security %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins diff --git a/tos/platforms/telosa/.platform b/tos/platforms/telosa/.platform index d9f0ad5b5c..5972d7d456 100644 --- a/tos/platforms/telosa/.platform +++ b/tos/platforms/telosa/.platform @@ -27,6 +27,7 @@ push( @includes, qw( %T/chips/at45db %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/pins %T/chips/msp430/timer diff --git a/tos/platforms/telosb/.platform b/tos/platforms/telosb/.platform index 4ca36753f2..18a6414769 100644 --- a/tos/platforms/telosb/.platform +++ b/tos/platforms/telosb/.platform @@ -29,6 +29,7 @@ push( @includes, qw( %T/chips/cc2420/security %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins diff --git a/tos/platforms/tinynode/.platform b/tos/platforms/tinynode/.platform index d4b8c33a67..4f60b13954 100644 --- a/tos/platforms/tinynode/.platform +++ b/tos/platforms/tinynode/.platform @@ -19,6 +19,7 @@ push( @includes, qw( %T/chips/msp430/x1xxx %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins diff --git a/tos/platforms/z1/.platform b/tos/platforms/z1/.platform index 58319c5f91..53b97adc09 100644 --- a/tos/platforms/z1/.platform +++ b/tos/platforms/z1/.platform @@ -25,6 +25,7 @@ push( @includes, qw( %T/chips/msp430/x2xxx %T/chips/msp430/x2xxx/usci %T/chips/msp430 + %T/chips/msp430/clock_bcs %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins From fc17f99f9d8e0298a6cbe51723eb82333a7dc8a8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 21 Mar 2011 04:50:19 -0700 Subject: [PATCH 032/411] msp430: move clock spec units from KHZ to HZ to avoid confusion. Motivation: TinyOS timing is defined to be binary time and binary frequencies. Primarily because the master clock source is a 32768 Hz (power of 2) crystal. But there are many places where sometime MHz means power of ten and other time when it is a binary MHz (power of 2). Remove that ambiguity. binary MHz -> MiHz and binary KHz -> KiHz. Also change the MSP DCO calculation to Hz from binary KHz (KiHz) to further avoid any ambiguity. --- tos/chips/msp430/clock_bcs/Msp430ClockP.nc | 3 +- tos/chips/msp430/clock_bcs/Msp430DcoCalibP.nc | 31 ++++---- tos/chips/msp430/usart/msp430usart.h | 48 ++++++------ tos/chips/msp430/x1xxx/Msp430DcoSpec.h | 70 +++++++++++------ tos/chips/msp430/x2xxx/Msp430DcoSpec.h | 22 ++++-- tos/chips/msp430/x2xxx/usci/msp430usci.h | 77 ++++++++++++------- .../eyesIFX/chips/msp430/Msp430DcoSpec.h | 63 +++++++++------ .../shimmer/chips/msp430/msp430hardware.h | 2 + .../z1/chips/msp430/timer/Msp430ClockP.nc | 2 +- .../z1/chips/msp430/usci/Z1SerialP.nc | 6 +- 10 files changed, 196 insertions(+), 128 deletions(-) diff --git a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc index d70d02a97e..7603ed6091 100644 --- a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc +++ b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc @@ -73,7 +73,7 @@ implementation { enum { ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, + TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD, }; async command mcu_power_t McuPowerOverride.lowestState() { @@ -84,7 +84,6 @@ implementation { TACTL = TASSEL_2 | MC_2; // SMCLK/1, continuous mode, all else 0 TBCTL = TBSSEL_1 | MC_2; // ACLK/1, continuous BCSCTL1 = XT2OFF | RSEL_MAX; - BCSCTL1 = XT2OFF | RSEL2; BCSCTL2 = 0; TBCCTL0 = CM0; } diff --git a/tos/chips/msp430/clock_bcs/Msp430DcoCalibP.nc b/tos/chips/msp430/clock_bcs/Msp430DcoCalibP.nc index 19f2574bea..99d7d23c0c 100644 --- a/tos/chips/msp430/clock_bcs/Msp430DcoCalibP.nc +++ b/tos/chips/msp430/clock_bcs/Msp430DcoCalibP.nc @@ -1,5 +1,6 @@ - -/* Copyright (c) 2000-2003 The Regents of the University of California. +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -8,10 +9,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -28,27 +31,27 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Cory Sharp + * @author Eric B. Decker */ #error "Msp430DcoCalibP is broken and will incorrectly adjust TimerA because it does not take into account MCU sleep." -module Msp430DcoCalibP -{ +module Msp430DcoCalibP { uses interface Msp430Timer as TimerMicro; uses interface Msp430Timer as Timer32khz; } -implementation -{ +implementation { uint16_t m_prev; - enum - { - TARGET_DELTA = 2048, // number of 32khz ticks during 65536 ticks at 1mhz - MAX_DEVIATION = 7, // about 0.35% error + enum { + /* + * 65536 tics of 1 MiHz clock = .0625 secs. Each 32768 Hz tic is 30.5uS + * which gives us 2048 tics. + */ + TARGET_DELTA = 2048, // number of 32khz ticks during 65536 ticks at 1mihz + MAX_DEVIATION = 7, // about 0.35% error }; // this gets executed 32 times a second @@ -73,7 +76,7 @@ implementation } else if( delta < (TARGET_DELTA-MAX_DEVIATION) ) { - // too few 32khz ticks means the DCO is running too fast, slow it down + // too few 32kihz ticks means the DCO is running too fast, slow it down if( DCOCTL > 0 ) { DCOCTL--; diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h index 7519525e14..e01d49c90c 100644 --- a/tos/chips/msp430/usart/msp430usart.h +++ b/tos/chips/msp430/usart/msp430usart.h @@ -154,30 +154,30 @@ msp430_spi_union_config_t msp430_spi_default_config = { { * Format is UBR__. */ typedef enum { - //32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz, 4MHZ = 4,194,304 - UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x94, - UBR_32KHZ_1800=0x0012, UMCTL_32KHZ_1800=0x84, - UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x6D, - UBR_32KHZ_4800=0x0006, UMCTL_32KHZ_4800=0x77, - UBR_32KHZ_9600=0x0003, UMCTL_32KHZ_9600=0x29, // (Warning: triggers MSP430 errata US14) - - UBR_1MHZ_1200=0x0369, UMCTL_1MHZ_1200=0x7B, - UBR_1MHZ_1800=0x0246, UMCTL_1MHZ_1800=0x55, - UBR_1MHZ_2400=0x01B4, UMCTL_1MHZ_2400=0xDF, - UBR_1MHZ_4800=0x00DA, UMCTL_1MHZ_4800=0xAA, - UBR_1MHZ_9600=0x006D, UMCTL_1MHZ_9600=0x44, - UBR_1MHZ_19200=0x0036, UMCTL_1MHZ_19200=0xB5, - UBR_1MHZ_38400=0x001B, UMCTL_1MHZ_38400=0x94, - UBR_1MHZ_57600=0x0012, UMCTL_1MHZ_57600=0x84, - UBR_1MHZ_76800=0x000D, UMCTL_1MHZ_76800=0x6D, - UBR_1MHZ_115200=0x0009, UMCTL_1MHZ_115200=0x10, - UBR_1MHZ_230400=0x0004, UMCTL_1MHZ_230400=0x55, + // 32KIHZ = 32,768 Hz, 1MIHZ = 1,048,576 Hz, 4MIHZ = 4,194,304 + UBR_32KIHZ_1200=0x001B, UMCTL_32KIHZ_1200=0x94, + UBR_32KIHZ_1800=0x0012, UMCTL_32KIHZ_1800=0x84, + UBR_32KIHZ_2400=0x000D, UMCTL_32KIHZ_2400=0x6D, + UBR_32KIHZ_4800=0x0006, UMCTL_32KIHZ_4800=0x77, + UBR_32KIHZ_9600=0x0003, UMCTL_32KIHZ_9600=0x29, // (Warning: triggers MSP430 errata US14) + + UBR_1MIHZ_1200=0x0369, UMCTL_1MIHZ_1200=0x7B, + UBR_1MIHZ_1800=0x0246, UMCTL_1MIHZ_1800=0x55, + UBR_1MIHZ_2400=0x01B4, UMCTL_1MIHZ_2400=0xDF, + UBR_1MIHZ_4800=0x00DA, UMCTL_1MIHZ_4800=0xAA, + UBR_1MIHZ_9600=0x006D, UMCTL_1MIHZ_9600=0x44, + UBR_1MIHZ_19200=0x0036, UMCTL_1MIHZ_19200=0xB5, + UBR_1MIHZ_38400=0x001B, UMCTL_1MIHZ_38400=0x94, + UBR_1MIHZ_57600=0x0012, UMCTL_1MIHZ_57600=0x84, + UBR_1MIHZ_76800=0x000D, UMCTL_1MIHZ_76800=0x6D, + UBR_1MIHZ_115200=0x0009, UMCTL_1MIHZ_115200=0x10, + UBR_1MIHZ_230400=0x0004, UMCTL_1MIHZ_230400=0x55, // from http://www.daycounter.com/Calculators/MSP430-Uart-Calculator.phtml - UBR_4MHZ_4800=0x0369, UMCTL_4MHZ_4800=0xfb, - UBR_4MHZ_9600=0x01b4, UMCTL_4MHZ_9600=0xdf, - UBR_4MHZ_57600=0x0048, UMCTL_4MHZ_57600=0xfb, - UBR_4MHZ_115200=0x0024, UMCTL_4MHZ_115200=0x4a, + UBR_4MIHZ_4800=0x0369, UMCTL_4MIHZ_4800=0xfb, + UBR_4MIHZ_9600=0x01b4, UMCTL_4MIHZ_9600=0xdf, + UBR_4MIHZ_57600=0x0048, UMCTL_4MIHZ_57600=0xfb, + UBR_4MIHZ_115200=0x0024, UMCTL_4MIHZ_115200=0x4a, } msp430_uart_rate_t; typedef struct { @@ -227,8 +227,8 @@ typedef union { } msp430_uart_union_config_t; msp430_uart_union_config_t msp430_uart_default_config = { { - ubr : UBR_1MHZ_57600, - umctl : UMCTL_1MHZ_57600, + ubr : UBR_4MIHZ_57600, + umctl : UMCTL_4MIHZ_57600, ssel : 2, pena : 0, pev : 0, diff --git a/tos/chips/msp430/x1xxx/Msp430DcoSpec.h b/tos/chips/msp430/x1xxx/Msp430DcoSpec.h index 84ce060ac3..b160fc48a4 100644 --- a/tos/chips/msp430/x1xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x1xxx/Msp430DcoSpec.h @@ -1,49 +1,69 @@ -/* -*- mode:c++; indent-tabs-mode: nil -*- - * Copyright (c) 2007, Technische Universitaet Berlin +/* + * Copyright (c) 2010-2011 Eric B. Decker + * Copyright (c) 2007 Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, - * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Andreas Koepke + * @author Eric B. Decker + * + * * Specify the target cpu clock speed of your platform by overriding this file. * - * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some + * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz (4MHIZ). Some * platforms have an external high frequency oscilator to generate the SMCLK * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These * oscillators provide metric frequencies, but may not run in power down * modes. Here, we need to switch the SMCLK source, which is easier if - * the external and thd DCO source frequency are the same. + * the external and the DCO source frequency are the same. * - * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) + * changed the name to reflect binary Hz to avoid confusion with power of 10 + * values provided by TI for msp430x2xx processors. */ - #ifndef MS430DCOSPEC_H #define MS430DCOSPEC_H -#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz -#define ACLK_KHZ 32 // the ACLK rate in binary kHz +/* + * frequencies in hertz. avoid confusion between binary and decimal K/M + * + * x1xxx msp430f149 and msp430f1611 default to 4 MiHz. + */ +#define TARGET_DCO_HZ 4194304UL +#define ACLK_HZ 32768UL + +#ifdef notdef +/* deprecating in favor of _HZ which works for all cases */ +#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz +#define ACLK_KHZ 32 // the ACLK rate in binary kHz +#endif + #endif diff --git a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h index ef98c435b9..58ad51795a 100644 --- a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2007 Technische Universitaet Berlin * All rights reserved. * @@ -32,25 +32,33 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * @author Andreas Koepke + * @author Andreas Koepke * @author Eric B. Decker * + * * Specify the target cpu clock speed of your platform by overriding this file. * - * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some + * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz (4MHIZ). Some * platforms have an external high frequency oscilator to generate the SMCLK * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These * oscillators provide metric frequencies, but may not run in power down * modes. Here, we need to switch the SMCLK source, which is easier if - * the external and thd DCO source frequency are the same. + * the external and the DCO source frequency are the same. * + * changed the name to reflect binary Hz to avoid confusion with power of 10 + * values provided by TI for msp430x2xx processors. */ - #ifndef MS430DCOSPEC_H #define MS430DCOSPEC_H -#define TARGET_DCO_KHZ 8192 -#define ACLK_KHZ 32 +/* 8 MIHZ */ +#define TARGET_DCO_HZ 8388608UL +#define ACLK_HZ 32768UL + +#ifdef notdef +#define TARGET_DCO_KHZ 8192 // the target DCO clock rate in binary kHz +#define ACLK_KHZ 32 // the ACLK rate in binary kHz +#endif #endif diff --git a/tos/chips/msp430/x2xxx/usci/msp430usci.h b/tos/chips/msp430/x2xxx/usci/msp430usci.h index 853dd00b2c..9e6e555190 100644 --- a/tos/chips/msp430/x2xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x2xxx/usci/msp430usci.h @@ -47,6 +47,10 @@ * vector. This gets cleaned up in the x5 processors but that makes sharing * the same code complicated. The following functional defines tell the story: * + * x1: __MSP430_HAS_UART0__ usart0 present + * __MSP430_HAS_I2C__ usart0 has I2C + * __MSP430_HAS_UART1__ + * * x2: __MSP430_HAS_USCI__ * __MSP430_HAS_USCI_AB0__ indicates interrupts messy. * __MSP430_HAS_USCI_AB1__ @@ -170,10 +174,16 @@ DEFINE_UNION_CAST(int2uctl1,msp430_uctl1_t,uint8_t) /* * The usci/uart baud rate mechanism is significantly different * than the msp430 usart uart. See section 15.3.9 of the TI - * MSP430x2xx Family User's Guide, slau144e for details. + * MSP430x2xx Family User's Guide, slau144f for details. * * For 32768Hz and 1048576Hz, we use UCOS16=0. * For higher cpu dco speeds we use oversampling, UCOS16=1. + * + * NOTE: keep in mind that baud rates are effected by the submain cpu + * clock. On TinyOS platforms this is a power of 2 hz. TI defines + * various factory calibration values for decimal MHz. In other words + * we don't use the predefined TI values. To denote this we use MIHZ + * nomenclature. */ typedef enum { @@ -193,33 +203,44 @@ typedef enum { UBR_1048MHZ_256000=0x0004, UMCTL_1048MHZ_230400=0x02, /* - * 1MHz = 1000000 Hz, 4MHz 4000000, 8MHz 8000000 - * 16MHz 16000000. use UCOS16 for oversampling, + * new names for later TI processors (x2xxx, msp430f261x). + * + * 1MIHZ = 1048576 Hz, 4MIHZ 4194304, 8MIHZ 8388608 + * 16MIHZ 16777216. use UCOS16 for oversampling, * use both UCBRF and UCBRS. * - * Settings for 1MHz, 8Mhz, and 16MHz are taken from - * a table on page 15-22 of slau144f, MSP430x2xx family - * User's Guide. These are powers of 10. + * There is a table on page 15-22 of slau144f, MSP430x2xx family User's Guide + * but these are mostly powers of 10. TinyOS clocks are binary so we can't + * use these. */ - UBR_1MHZ_9600=0x6, UMCTL_1MHZ_9600=0x81, - UBR_1MHZ_19200=0x3, UMCTL_1MHZ_19200=0x41, - UBR_1MHZ_57600=0x1, UMCTL_1MHZ_57600=0x0F, - - UBR_8MHZ_4800=0x68, UMCTL_8MHZ_4800=0x31, - UBR_8MHZ_9600=0x34, UMCTL_8MHZ_9600=0x11, - UBR_8MHZ_19200=0x1A, UMCTL_8MHZ_19200=0x11, - UBR_8MHZ_38400=0x0D, UMCTL_8MHZ_38400=0x01, - UBR_8MHZ_57600=0x08, UMCTL_8MHZ_57600=0xB1, - UBR_8MHZ_115200=0x04, UMCTL_8MHZ_115200=0x3B, - UBR_8MHZ_230400=0x02, UMCTL_8MHZ_230400=0x27, - - UBR_16MHZ_4800=0xD0, UMCTL_16MHZ_4800=0x51, - UBR_16MHZ_9600=0x68, UMCTL_16MHZ_9600=0x31, - UBR_16MHZ_19200=0x34, UMCTL_16MHZ_19200=0x11, - UBR_16MHZ_38400=0x1A, UMCTL_16MHZ_38400=0x11, - UBR_16MHZ_57600=0x11, UMCTL_16MHZ_57600=0x61, - UBR_16MHZ_115200=0x8, UMCTL_16MHZ_115200=0xB1, - UBR_16MHZ_230400=0x4, UMCTL_16MHZ_230400=0x3B, + + UBR_1MIHZ_9600=0x6, UMCTL_1MIHZ_9600=0xd1, + UBR_1MIHZ_19200=0x3, UMCTL_1MIHZ_19200=0x71, + UBR_1MIHZ_57600=0x1, UMCTL_1MIHZ_57600=0x21, + + UBR_4MIHZ_4800=0x36, UMCTL_4MIHZ_4800=0xa1, + UBR_4MIHZ_9600=0x1B, UMCTL_4MIHZ_9600=0x51, + UBR_4MIHZ_19200=0x0D, UMCTL_4MIHZ_19200=0xa1, + UBR_4MIHZ_38400=0x06, UMCTL_4MIHZ_38400=0xd1, + UBR_4MIHZ_57600=0x04, UMCTL_4MIHZ_57600=0x91, + UBR_4MIHZ_115200=0x02, UMCTL_4MIHZ_115200=0x41, + UBR_4MIHZ_230400=0x01, UMCTL_4MIHZ_230400=0x21, + + UBR_8MIHZ_4800=0x6D, UMCTL_8MIHZ_4800=0x41, + UBR_8MIHZ_9600=0x36, UMCTL_8MIHZ_9600=0xA1, + UBR_8MIHZ_19200=0x1B, UMCTL_8MIHZ_19200=0x51, + UBR_8MIHZ_38400=0x0D, UMCTL_8MIHZ_38400=0xA1, + UBR_8MIHZ_57600=0x09, UMCTL_8MIHZ_57600=0x21, + UBR_8MIHZ_115200=0x04, UMCTL_8MIHZ_115200=0x91, + UBR_8MIHZ_230400=0x02, UMCTL_8MIHZ_230400=0x41, + + UBR_16MIHZ_4800=0xDA, UMCTL_16MIHZ_4800=0x71, + UBR_16MIHZ_9600=0x6D, UMCTL_16MIHZ_9600=0x41, + UBR_16MIHZ_19200=0x36, UMCTL_16MIHZ_19200=0xA1, + UBR_16MIHZ_38400=0x1B, UMCTL_16MIHZ_38400=0x51, + UBR_16MIHZ_57600=0x12, UMCTL_16MIHZ_57600=0x31, + UBR_16MIHZ_115200=0x9, UMCTL_16MIHZ_115200=0x21, + UBR_16MIHZ_230400=0x4, UMCTL_16MIHZ_230400=0x91, } msp430_uart_rate_t; @@ -264,11 +285,11 @@ typedef union { /* * be sure to check Msp430DcoSpec.h for what speed we think - * the processor is actually running at. We assume 8MHz. + * the processor is actually running at. We assume 8MiHz. */ msp430_uart_union_config_t msp430_uart_default_config = { { - ubr : UBR_8MHZ_115200, - umctl : UMCTL_8MHZ_115200, + ubr : UBR_8MIHZ_115200, + umctl : UMCTL_8MIHZ_115200, ucmode : 0, // uart ucspb : 0, // one stop uc7bit : 0, // 8 bit diff --git a/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h b/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h index 54f17cc0be..1515fc62c8 100644 --- a/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h +++ b/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h @@ -1,45 +1,60 @@ -/* -*- mode:c++; indent-tabs-mode: nil -*- - * Copyright (c) 2007, Technische Universitaet Berlin +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2007 Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, - * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Andreas Koepke + * @author Eric B. Decker + * + * * Override default dco clock spec. * - * SMCLK runs on 1MHz for this platform, its * source may be the radio -- a + * SMCLK runs on 1MiHz for this platform, its * source may be the radio -- a * more reliable source. - * - * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ #ifndef MS430DCOSPEC_H #define MS430DCOSPEC_H -#define TARGET_DCO_KHZ 3926 // the target MCLK clock rate in binary kHz (4 020 000 Hz) -#define ACLK_KHZ 32 // the ACLK rate in binary kHz +/* + * transition to using HZ to avoid confusion between binary and decimal units. + * note 3926 * 1024 = 4020224. But the comments say they want 4020000 so that + * is what we give them. + */ +#define TARGET_DCO_HZ 4020000UL // the target MCLK clock rate in Hz. +#define ACLK_HZ 32768UL // the ACLK rate in Hz + +#define TARGET_DCO_KHZ 3926 // the target MCLK clock rate in binary kHz (4 020 000 Hz) +#define ACLK_KHZ 32 // the ACLK rate in binary kHz + #endif diff --git a/tos/platforms/shimmer/chips/msp430/msp430hardware.h b/tos/platforms/shimmer/chips/msp430/msp430hardware.h index 530246a895..62e3b6e2a8 100644 --- a/tos/platforms/shimmer/chips/msp430/msp430hardware.h +++ b/tos/platforms/shimmer/chips/msp430/msp430hardware.h @@ -354,6 +354,8 @@ inline void TOSH_wait(void) } // #define TOSH_CYCLE_TIME_NS 250 +// This is very cpu dependent, for the msp430f1611 running at +// 4MiHz this is close enough. // Our worst case is 250 ns = 1 cycle. inline void TOSH_wait_250ns(void) diff --git a/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc b/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc index a38b76ac4c..a64cdb9be3 100644 --- a/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc +++ b/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc @@ -61,7 +61,7 @@ implementation { enum { ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, + TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD, }; async command mcu_power_t McuPowerOverride.lowestState() { diff --git a/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc b/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc index 41a9cd2bff..64c62d0195 100644 --- a/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc +++ b/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc @@ -6,9 +6,9 @@ module Z1SerialP { implementation { msp430_uart_union_config_t msp430_uart_z1_config = { { - ubr: UBR_8MHZ_115200, - umctl: UMCTL_8MHZ_115200, - ucssel: 2, + ubr : UBR_8MIHZ_115200, + umctl : UMCTL_8MIHZ_115200, + ucssel : 2, } }; //, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1 From 9e2bb4bce85595f0822fe62878d07242d2c66996 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 21 Mar 2011 04:56:20 -0700 Subject: [PATCH 033/411] x1xxx/McuSleepC: move local items from msp430hardware.h into the file they are used. --- tos/chips/msp430/x1xxx/McuSleepC.nc | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/tos/chips/msp430/x1xxx/McuSleepC.nc b/tos/chips/msp430/x1xxx/McuSleepC.nc index 7c4fabc80e..333d5fedce 100644 --- a/tos/chips/msp430/x1xxx/McuSleepC.nc +++ b/tos/chips/msp430/x1xxx/McuSleepC.nc @@ -1,5 +1,7 @@ /* - * Copyright (c) 2005 Stanford University. All rights reserved. + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2005 Stanford University. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -40,10 +42,7 @@ * @author Vlado Handziski * @author Joe Polastre * @author Cory Sharp - * @date October 26, 2005 - * @see Please refer to TEP 112 for more information about this component and its - * intended use. - * + * @author Eric B. Decker */ module McuSleepC @safe() { @@ -56,6 +55,11 @@ module McuSleepC @safe() { } } implementation { + +MSP430REG_NORACE2(U0CTLnr,U0CTL); +MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL); +MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL); + bool dirty = TRUE; mcu_power_t powerState = MSP430_POWER_ACTIVE; @@ -80,15 +84,17 @@ implementation { ((TACTL & TASSEL_3) == TASSEL_2)) || ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) || ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1)) -#ifdef __msp430_have_usart0_with_i2c + +/* the following doesn't work for x2 family (but this is x1 file so who cares) */ +#if defined(__msp430_have_usart0_with_i2c) || defined(__MSP430_HAS_I2C__) // registers end in "nr" to prevent nesC race condition detection || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) && (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C)) #endif ) pState = MSP430_POWER_LPM1; - -#ifdef __msp430_have_adc12 + +#if defined(__msp430_have_adc12) || defined(__MSP430_HAS_ADC12__) // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE if (ADC12CTL0 & ADC12ON){ if (ADC12CTL1 & ADC12SSEL_2){ From 88833374aa86cd8765516882fcf986a179a46099 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 21 Mar 2011 05:09:12 -0700 Subject: [PATCH 034/411] msp430/msp430hardware.h: add family docs, clean up, flag deprecations - add comment blocks about families x1, x2, and x5 - add comments about numeric ports (8 bit) and alpha ports (16 bits) and how they very across families. - clean up. - flag various old toolchain constructs for deprecation. - add STATIC_ARRAY_SIZE --- tos/chips/msp430/msp430hardware.h | 146 ++++++++++++++++++++++-------- 1 file changed, 108 insertions(+), 38 deletions(-) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index a282d68f00..95c2e36895 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -1,5 +1,7 @@ - -/* Copyright (c) 2000-2003 The Regents of the University of California. +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2010 People Power Co. + * Copyright (c) 2000-2003, 2010 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -28,12 +30,14 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Vlado Handziski + * @author Joe Polastre + * @author Cory Sharp + * @author Peter A. Bigot + * @author Eric B. Decker */ -// @author Vlado Handziski -// @author Joe Polastre -// @author Cory Sharp - #ifndef _H_msp430hardware_h #define _H_msp430hardware_h @@ -41,37 +45,80 @@ #include #include "msp430regtypes.h" +/* + * Families support and definition: + * + * Processor implementations are grouped by like behaviour into families. + * Only include processors that have been ported to TinyOS. Behaviour includes + * differences in Port mapping, Interrupt behaviour, addressing. + * + * x1: msp430f149, msp430f1611 + * x2: msp430f2616, 2617, 2618, 2619 + * x5: cc430f5137, msp430f5438, msp430f5438a + */ + #ifdef __MSP430_TI_HEADERS__ -/* TI's msp430 headers define FAIL to be 0x80 in the flash module. +/* + * TI's msp430 headers define FAIL to be 0x80 in the flash module. * I'd prefer that it match the value assigned to it in the - * TinyError.h. */ + * TinyError.h. + */ #undef FAIL -/* Accommodate old gcc alias */ +/* + * Accommodate old gcc alias + * deprecate? + */ #define MC_STOP MC__STOP -/* Port registers in MSP430 chips have two naming conventions: by +/* + * Port registers in MSP430 chips have two naming conventions: by * number (e.g., P1IN), and by letter (e.g. PAIN). The numeric-named * registers provide 8-bit values, while the alpha-named registers * provide 16-bit values. * - * The headers for certain chips define numeric-named registers. + * How these port registers overlap varies by processor family. + * + * x1: defines just numeric port registers. + * x2: define numeric ports and lettered. PortA overlays Port7/8. + * x5: define numeric ports and lettered ports. PortA overlays P1/2, + * PortB overlays P3/4, etc. + * + * Note: other processors that haven't been ported yet will differ from + * the above. New processors have to be individually inspected. You'll + * want to look at the TI headers in /msp430/include. + * + * The TI headers define one or more of the following depending on + * the processor include file being looked at: + * + * P1IN refers to any numeric port. + * PAIN refers to any lettered port. + * + * P1IN_ numeric address of port location (#defined) + * P1IN C variable placed in proper place with proper type. 8 bit. + * PAIN_ numeric address for letter port. (#defined) + * PAIN C variable at proper location with proper type. 16 bit. * - * In a very few cases, both numeric-named and alpha-named registers - * are defined. By inspection, this occurs only for PAIN, which - * combines P7IN (at the address of PAIN) and P8IN (at 1+&PAIN); and - * for PBIN, which combines P9IN (at the address of PBIN) and P10IN - * (at 1+&PBIN). + * for example: + * #define P1IN_ 0x0020 Port 1 Input + * const_sfrb(P1IN, P1IN_); * - * In more recent chips, only alpha-named registers are provided. - * Since the current TinyOS MSP430 port interface assumes 8-bit - * registers, by convention we map numeric-named registers to the - * alpha-named registers beginning with PAIN==P1IN. */ + * The TinyOS MSP430 port interface uses both the P1IN_ and P1IN forms for + * referencing the port values. Later processor header files don't define + * the P1IN_ form. For those processor files, we must define a mapping from + * the corresponding lettered port to the numeric port. This only needs to be done + * for the x5 family. + * + * x1: defines both P1IN_ and P1IN. no lettered ports. + * x2: defines both P1IN_ and P1IN. Lettered ports defined. + * x5: Lettered PAIN_ and PAIN defined. P1IN defined in terms of PAIN_L etc. + * needs P1IN_ defined in terms of PAIN_. + */ #if defined(__MSP430_HAS_PORTA__) || defined(__MSP430_HAS_PORTA_R__) #if (! defined(P1IN_)) && (defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)) -#define P1IN_ (uint16_t)(PAIN_) +#define P1IN_ (uint16_t)(PAIN_) #define P1OUT_ (uint16_t)(PAOUT_) #define P1DIR_ (uint16_t)(PADIR_) #define P1SEL_ (uint16_t)(PASEL_) @@ -81,7 +128,7 @@ #endif /* __MSP430_HAS_PORT1__ */ #if (! defined(P2IN_)) && (defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)) -#define P2IN_ (uint16_t)(PAIN_+1) +#define P2IN_ (uint16_t)(PAIN_+1) #define P2OUT_ (uint16_t)(PAOUT_+1) #define P2DIR_ (uint16_t)(PADIR_+1) #define P2SEL_ (uint16_t)(PASEL_+1) @@ -94,7 +141,7 @@ #if defined(__MSP430_HAS_PORTB__) || defined(__MSP430_HAS_PORTB_R__) #if (! defined(P3IN_)) && (defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)) -#define P3IN_ (uint16_t)(PBIN_) +#define P3IN_ (uint16_t)(PBIN_) #define P3OUT_ (uint16_t)(PBOUT_) #define P3DIR_ (uint16_t)(PBDIR_) #define P3SEL_ (uint16_t)(PBSEL_) @@ -104,7 +151,7 @@ #endif /* __MSP430_HAS_PORT3__ */ #if (! defined(P4IN_)) && (defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)) -#define P4IN_ (uint16_t)(PBIN_+1) +#define P4IN_ (uint16_t)(PBIN_+1) #define P4OUT_ (uint16_t)(PBOUT_+1) #define P4DIR_ (uint16_t)(PBDIR_+1) #define P4SEL_ (uint16_t)(PBSEL_+1) @@ -117,7 +164,7 @@ #if defined(__MSP430_HAS_PORTC__) || defined(__MSP430_HAS_PORTC_R__) #if (! defined(P5IN_)) && (defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)) -#define P5IN_ (uint16_t)(PCIN_) +#define P5IN_ (uint16_t)(PCIN_) #define P5OUT_ (uint16_t)(PCOUT_) #define P5DIR_ (uint16_t)(PCDIR_) #define P5SEL_ (uint16_t)(PCSEL_) @@ -127,7 +174,7 @@ #endif /* __MSP430_HAS_PORT5__ */ #if (! defined(P6IN_)) && (defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)) -#define P6IN_ (uint16_t)(PCIN_+1) +#define P6IN_ (uint16_t)(PCIN_+1) #define P6OUT_ (uint16_t)(PCOUT_+1) #define P6DIR_ (uint16_t)(PCDIR_+1) #define P6SEL_ (uint16_t)(PCSEL_+1) @@ -140,7 +187,7 @@ #if defined(__MSP430_HAS_PORTD__) || defined(__MSP430_HAS_PORTD_R__) #if (! defined(P7IN_)) && (defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__)) -#define P7IN_ (uint16_t)(PDIN_) +#define P7IN_ (uint16_t)(PDIN_) #define P7OUT_ (uint16_t)(PDOUT_) #define P7DIR_ (uint16_t)(PDDIR_) #define P7SEL_ (uint16_t)(PDSEL_) @@ -150,7 +197,7 @@ #endif /* __MSP430_HAS_PORT7__ */ #if (! defined(P8IN_)) && (defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__)) -#define P8IN_ (uint16_t)(PDIN_+1) +#define P8IN_ (uint16_t)(PDIN_+1) #define P8OUT_ (uint16_t)(PDOUT_+1) #define P8DIR_ (uint16_t)(PDDIR_+1) #define P8SEL_ (uint16_t)(PDSEL_+1) @@ -163,7 +210,7 @@ #if defined(__MSP430_HAS_PORTE__) || defined(__MSP430_HAS_PORTE_R__) #if (! defined(P9IN_)) && (defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__)) -#define P9IN_ (uint16_t)(PEIN_) +#define P9IN_ (uint16_t)(PEIN_) #define P9OUT_ (uint16_t)(PEOUT_) #define P9DIR_ (uint16_t)(PEDIR_) #define P9SEL_ (uint16_t)(PESEL_) @@ -173,7 +220,7 @@ #endif /* __MSP430_HAS_PORT9__ */ #if (! defined(P10IN_)) && (defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__)) -#define P10IN_ (uint16_t)(PEIN_+1) +#define P10IN_ (uint16_t)(PEIN_+1) #define P10OUT_ (uint16_t)(PEOUT_+1) #define P10DIR_ (uint16_t)(PEDIR_+1) #define P10SEL_ (uint16_t)(PESEL_+1) @@ -186,7 +233,7 @@ #if defined(__MSP430_HAS_PORTF__) || defined(__MSP430_HAS_PORTF_R__) #if (! defined(P11IN_)) && (defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__)) -#define P11IN_ (uint16_t)(PFIN_) +#define P11IN_ (uint16_t)(PFIN_) #define P11OUT_ (uint16_t)(PFOUT_) #define P11DIR_ (uint16_t)(PFDIR_) #define P11SEL_ (uint16_t)(PFSEL_) @@ -196,7 +243,7 @@ #endif /* __MSP430_HAS_PORT11__ */ #if (! defined(P12IN_)) && (defined(__MSP430_HAS_PORT12__) || defined(__MSP430_HAS_PORT12_R__)) -#define P12IN_ (uint16_t)(PFIN_+1) +#define P12IN_ (uint16_t)(PFIN_+1) #define P12OUT_ (uint16_t)(PFOUT_+1) #define P12DIR_ (uint16_t)(PFDIR_+1) #define P12SEL_ (uint16_t)(PFSEL_+1) @@ -206,7 +253,6 @@ #endif /* __MSP430_HAS_PORT12__ */ #endif /* __MSP430_HAS_PORTF__ */ - #endif /* __MSP430_TI_HEADERS__ */ // CPU memory-mapped register access will cause nesc to issue race condition @@ -312,22 +358,32 @@ to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f: #define ADC12MCTL TCAST(char * ONE, ADC12MCTL_) #endif + +// DEPRECATING // define platform constants that can be changed for different compilers // these are all msp430-gcc specific (add as necessary) #ifdef __msp430_headers_adc10_h +// DEPRECATING #define __msp430_have_adc10 #endif #ifdef __msp430_headers_adc12_h +// DEPRECATING #define __msp430_have_adc12 #endif + // backwards compatibility to older versions of the header files +// DEPRECATING. clean up + #ifdef __MSP430_HAS_I2C__ #define __msp430_have_usart0_with_i2c #endif + +#ifdef notdef +// DEPRECATING // I2CBusy flag is not defined by current MSP430-GCC #ifdef __msp430_have_usart0_with_i2c #ifndef I2CBUSY @@ -336,7 +392,10 @@ to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f: MSP430REG_NORACE2(U0CTLnr,U0CTL); MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL); MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL); -#endif + +#endif /* __msp430_have_usart0_with_i2c */ +#endif /* ifdef notdef */ + // The signal attribute has opposite meaning in msp430-gcc than in avr-gcc #define TOSH_SIGNAL(signame) \ @@ -372,6 +431,7 @@ typedef uint8_t mcu_power_t @combine("mcombine"); mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() { return (m1 < m2) ? m1: m2; } + enum { MSP430_POWER_ACTIVE = 0, MSP430_POWER_LPM0 = 1, @@ -436,15 +496,25 @@ inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) return value; } -/* Support for chips with configurable resistors on digital inputs. These - * are denoted with __MSP430_HAS_PORT1_R__ and similar defines. */ +/* + * Support for chips with configurable resistors on digital inputs. These + * are denoted with __MSP430_HAS_PORT1_R__ and similar defines. + */ enum { MSP430_PORT_RESISTOR_INVALID, /**< Hardware does not support resistor control, or pin is output */ - MSP430_PORT_RESISTOR_OFF, /**< Resistor disabled */ + MSP430_PORT_RESISTOR_OFF, /**< Resistor off */ MSP430_PORT_RESISTOR_PULLDOWN, /**< Pulldown resistor enabled */ MSP430_PORT_RESISTOR_PULLUP, /**< Pullup resistor enabled */ }; +#ifndef STATIC_ARRAY_SIZE -#endif//_H_msp430hardware_h +/* + * Expression used when declaring a static array. Compilers that disallow + * declaring arrays with a zero length should define this to be: + * #define STATIC_ARRAY_SIZE(_s) (((_s) == 0) ? 1 : (_s)) + */ +#define STATIC_ARRAY_SIZE(_s) (_s) +#endif /* STATIC_ARRAY_SIZE */ +#endif /* _H_msp430hardware_h */ From 426ebc8adff70c8e9e731b40908d72f1f5ed93c0 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 21 Mar 2011 05:12:50 -0700 Subject: [PATCH 035/411] msp430: optimize atomic Motivation: atomic is used all over the place. Optimization of this construct would improve overall code efficiency. So... - Make interrrupt test more efficient. Originally ((READ_SR & SR_GIE) != 0) was used. But this generates sequences of shifts all of which take cycles and consume code space. The result is only tested for zero or non-zero (simple boolean). So a simple bitwise and suffices. - change return type of __nesc_atomic_t to reflect the native type of the msp430 uint16_t. Same as bool but we return the bit field of what is enabled. - change __nesc_enable_interrupt and __nesc_disable_interrup to eint() and dint(). The generated code seen produced a call to the code that did the enable and disable. Eliminate the call. Note the definition of the calls were earlier in the msp430hardware.h file. Its all machine dependent so doesn't by anything and generates extra calls. --- tos/chips/msp430/msp430hardware.h | 37 ++++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 11 deletions(-) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 95c2e36895..ea73c51cb7 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -452,19 +452,34 @@ void __nesc_enable_interrupt(void) @safe() eint(); } -typedef bool __nesc_atomic_t; -__nesc_atomic_t __nesc_atomic_start(void); +/* + * __nesc_atomic_t is used to return whether interrupts are enabled + * or not. Previously, a bool (still a uint16_t) was used. However, + * using the uint16_t (native width of the msp430) fits in with how interrupts + * are checked below, see definition of __nesc_atomic_start. + */ +typedef uint16_t __nesc_atomic_t; +__nesc_atomic_t __nesc_atomic_start(void); void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts); #ifndef NESC_BUILD_BINARY -/* @spontaneous() functions should not be included when NESC_BUILD_BINARY - is #defined, to avoid duplicate functions definitions when binary - components are used. Such functions do need a prototype in all cases, - though. */ -__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() -{ - __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0); - __nesc_disable_interrupt(); +/* + * @spontaneous() functions should not be included when NESC_BUILD_BINARY + * is #defined, to avoid duplicate functions definitions when binary + * components are used. Such functions do need a prototype in all cases, + * though. + * + * If we explicitly check for != 0 this generates a fair number of instructions. + * Simply leaving the GIE bit where it lives and using 0 or not 0 to determine + * whether to reenable interrupts generates much tighter code. + * + * Given how often atomic is used, this is a good thing. + */ + +__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { + __nesc_atomic_t result = (READ_SR & SR_GIE); + dint(); + nop(); asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ return result; } @@ -473,7 +488,7 @@ void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe { asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ if( reenable_interrupts ) - __nesc_enable_interrupt(); + eint(); } #endif From b8efce00b31edfcde2fa1a9cd587f341a2b01bc7 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 21 Mar 2011 19:01:03 -0700 Subject: [PATCH 036/411] eyes, shimmer, span: finish DCO specs to HZ --- tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h | 2 ++ tos/platforms/shimmer/chips/msp430/msp430hardware.h | 2 +- tos/platforms/span/chips/msp430/msp430hardware.h | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h b/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h index 1515fc62c8..6f8060388c 100644 --- a/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h +++ b/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h @@ -54,7 +54,9 @@ #define TARGET_DCO_HZ 4020000UL // the target MCLK clock rate in Hz. #define ACLK_HZ 32768UL // the ACLK rate in Hz +#ifdef notdef #define TARGET_DCO_KHZ 3926 // the target MCLK clock rate in binary kHz (4 020 000 Hz) #define ACLK_KHZ 32 // the ACLK rate in binary kHz +#endif #endif diff --git a/tos/platforms/shimmer/chips/msp430/msp430hardware.h b/tos/platforms/shimmer/chips/msp430/msp430hardware.h index 62e3b6e2a8..14bcd97138 100644 --- a/tos/platforms/shimmer/chips/msp430/msp430hardware.h +++ b/tos/platforms/shimmer/chips/msp430/msp430hardware.h @@ -375,7 +375,7 @@ void brief_pause(register unsigned int n) : "+r" (n)); } -#define TOSH_uwait(n) brief_pause((((unsigned long long)n) * TARGET_DCO_KHZ * 1024 / 1000000 - 2) / 3) +#define TOSH_uwait(n) brief_pause((((unsigned long long)n) * TARGET_DCO_HZ / 1000000 - 2) / 3) #define SET_FLAG(port, flag) ((port) |= (flag)) #define CLR_FLAG(port, flag) ((port) &= ~(flag)) diff --git a/tos/platforms/span/chips/msp430/msp430hardware.h b/tos/platforms/span/chips/msp430/msp430hardware.h index f7b296e189..2036dac7af 100644 --- a/tos/platforms/span/chips/msp430/msp430hardware.h +++ b/tos/platforms/span/chips/msp430/msp430hardware.h @@ -204,7 +204,7 @@ void brief_pause(register unsigned int n) : "+r" (n)); } -#define TOSH_uwait(n) brief_pause((((unsigned long long)n) * TARGET_DCO_KHZ * 1024 / 1000000 - 2) / 3) +#define TOSH_uwait(n) brief_pause((((unsigned long long)n) * TARGET_DCO_HZ / 1000000 - 2) / 3) #define SET_FLAG(port, flag) ((port) |= (flag)) #define CLR_FLAG(port, flag) ((port) &= ~(flag)) From fd5af30f04c396b50b32b02081a5992bc0ec68fb Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 22 Mar 2011 06:08:14 -0700 Subject: [PATCH 037/411] more MHZ -> MIHZ conversions --- tos/platforms/shimmer/ShimmerSerialP.nc | 7 ++++++- tos/platforms/shimmer2/ShimmerSerialP.nc | 6 +++--- tos/platforms/shimmer2r/ShimmerSerialP.nc | 6 +++--- tos/platforms/span/SpanSerialP.nc | 7 ++++++- tos/platforms/telosa/TelosSerialP.nc | 7 ++++++- tos/platforms/tinynode/TinyNodeSerialP.nc | 10 ++++++---- 6 files changed, 30 insertions(+), 13 deletions(-) diff --git a/tos/platforms/shimmer/ShimmerSerialP.nc b/tos/platforms/shimmer/ShimmerSerialP.nc index b62f094847..a52ee33844 100644 --- a/tos/platforms/shimmer/ShimmerSerialP.nc +++ b/tos/platforms/shimmer/ShimmerSerialP.nc @@ -40,7 +40,12 @@ module ShimmerSerialP } implementation { - msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} }; + msp430_uart_union_config_t msp430_uart_telos_config = { { + ubr : UBR_1MIHZ_115200, + umctl: UMCTL_1MIHZ_115200, + ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, + ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1 + } }; command error_t StdControl.start() { diff --git a/tos/platforms/shimmer2/ShimmerSerialP.nc b/tos/platforms/shimmer2/ShimmerSerialP.nc index a1f61ea327..1d39456398 100644 --- a/tos/platforms/shimmer2/ShimmerSerialP.nc +++ b/tos/platforms/shimmer2/ShimmerSerialP.nc @@ -39,9 +39,9 @@ module ShimmerSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_shimmer2_config = { - { ubr: UBR_1MHZ_115200, - umctl: UMCTL_1MHZ_115200, + msp430_uart_union_config_t msp430_uart_shimmer2_config = { { + ubr : UBR_1MIHZ_115200, + umctl: UMCTL_1MIHZ_115200, ssel: 0x02, pena: 0, pev: 0, diff --git a/tos/platforms/shimmer2r/ShimmerSerialP.nc b/tos/platforms/shimmer2r/ShimmerSerialP.nc index a1f61ea327..1d39456398 100644 --- a/tos/platforms/shimmer2r/ShimmerSerialP.nc +++ b/tos/platforms/shimmer2r/ShimmerSerialP.nc @@ -39,9 +39,9 @@ module ShimmerSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_shimmer2_config = { - { ubr: UBR_1MHZ_115200, - umctl: UMCTL_1MHZ_115200, + msp430_uart_union_config_t msp430_uart_shimmer2_config = { { + ubr : UBR_1MIHZ_115200, + umctl: UMCTL_1MIHZ_115200, ssel: 0x02, pena: 0, pev: 0, diff --git a/tos/platforms/span/SpanSerialP.nc b/tos/platforms/span/SpanSerialP.nc index 0879974e63..6e7f156b31 100644 --- a/tos/platforms/span/SpanSerialP.nc +++ b/tos/platforms/span/SpanSerialP.nc @@ -42,7 +42,12 @@ module SpanSerialP } implementation { - msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} }; + msp430_uart_union_config_t msp430_uart_telos_config = { { + ubr : UBR_1MIHZ_115200, + umctl: UMCTL_1MIHZ_115200, + ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, + ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1 + } }; command error_t StdControl.start() { diff --git a/tos/platforms/telosa/TelosSerialP.nc b/tos/platforms/telosa/TelosSerialP.nc index cf5eee2d18..3a593f65e6 100644 --- a/tos/platforms/telosa/TelosSerialP.nc +++ b/tos/platforms/telosa/TelosSerialP.nc @@ -5,7 +5,12 @@ module TelosSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} }; + msp430_uart_union_config_t msp430_uart_telos_config = { { + ubr : UBR_1MIHZ_115200, + umctl: UMCTL_1MIHZ_115200, + ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, + ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1 + } }; command error_t StdControl.start(){ return call Resource.immediateRequest(); diff --git a/tos/platforms/tinynode/TinyNodeSerialP.nc b/tos/platforms/tinynode/TinyNodeSerialP.nc index 0222530cf1..091a9f9a79 100644 --- a/tos/platforms/tinynode/TinyNodeSerialP.nc +++ b/tos/platforms/tinynode/TinyNodeSerialP.nc @@ -5,8 +5,12 @@ module TinyNodeSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_tinynode_config = {{ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1}}; - + msp430_uart_union_config_t msp430_uart_tinynode_config = { { + ubr : UBR_1MIHZ_115200, + umctl: UMCTL_1MIHZ_115200, + ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, + ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1 + } }; command error_t StdControl.start(){ return call Resource.immediateRequest(); @@ -22,6 +26,4 @@ implementation { async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_tinynode_config; } - } - From de8312174ea454c4256528313daec10818331123 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 24 Mar 2011 01:29:40 -0700 Subject: [PATCH 038/411] msp430 uniarch prep: io.h deprecated change to msp430.h Motivation: With the new toolchain mspgcc uniarch 4.5+ io.h is replaced by msp430.h to pull in processor defines. Add a check for __MSPGCC__ which is only defined by the uniarch toolchain. This change is backward compatible with previous toolchains. --- tos/chips/msp430/msp430hardware.h | 14 ++++++++++++++ .../shimmer/chips/msp430/msp430hardware.h | 14 ++++++++++++++ tos/platforms/span/chips/msp430/msp430hardware.h | 14 ++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index ea73c51cb7..2b38d8480a 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -41,7 +41,21 @@ #ifndef _H_msp430hardware_h #define _H_msp430hardware_h +/* + * __MSPGCC__ gets defined in the msp430 uniarch toolchain. This toolchain + * uses msp430.h instead of io.h to pull in the processor definitions. + * msp430.h replaces io.h which is deprecated. + */ +#ifdef __MSPGCC__ +#include +#else #include +#endif + +/* + * signal.h defines lots of interesting things including dint(), eint() and + * how to hook interrupts in. + */ #include #include "msp430regtypes.h" diff --git a/tos/platforms/shimmer/chips/msp430/msp430hardware.h b/tos/platforms/shimmer/chips/msp430/msp430hardware.h index 14bcd97138..79ab0858f0 100644 --- a/tos/platforms/shimmer/chips/msp430/msp430hardware.h +++ b/tos/platforms/shimmer/chips/msp430/msp430hardware.h @@ -37,7 +37,21 @@ #ifndef _H_msp430hardware_h #define _H_msp430hardware_h +/* + * __MSPGCC__ gets defined in the msp430 uniarch toolchain. This toolchain + * uses msp430.h instead of io.h to pull in the processor definitions. + * msp430.h replaces io.h which is deprecated. + */ +#ifdef __MSPGCC__ +#include +#else #include +#endif + +/* + * signal.h defines lots of interesting things including dint(), eint() and + * how to hook interrupts in. + */ #include #include "msp430regtypes.h" #include "Msp430DcoSpec.h" diff --git a/tos/platforms/span/chips/msp430/msp430hardware.h b/tos/platforms/span/chips/msp430/msp430hardware.h index 2036dac7af..70f7942304 100644 --- a/tos/platforms/span/chips/msp430/msp430hardware.h +++ b/tos/platforms/span/chips/msp430/msp430hardware.h @@ -37,7 +37,21 @@ #ifndef _H_msp430hardware_h #define _H_msp430hardware_h +/* + * __MSPGCC__ gets defined in the msp430 uniarch toolchain. This toolchain + * uses msp430.h instead of io.h to pull in the processor definitions. + * msp430.h replaces io.h which is deprecated. + */ +#ifdef __MSPGCC__ +#include +#else #include +#endif + +/* + * signal.h defines lots of interesting things including dint(), eint() and + * how to hook interrupts in. + */ #include #include "msp430regtypes.h" #include "Msp430DcoSpec.h" From a965dfcf6a11b88fb37dc3575e644feb9e364b0b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 24 Mar 2011 04:37:22 -0700 Subject: [PATCH 039/411] protect bitfield struct, generate warning about GCC 4 --- tos/chips/msp430/adc12/Msp430Adc12.h | 36 +++++++++++------------- tos/chips/msp430/usart/msp430usart.h | 4 +++ tos/chips/msp430/x2xxx/usci/msp430usci.h | 4 +++ 3 files changed, 25 insertions(+), 19 deletions(-) diff --git a/tos/chips/msp430/adc12/Msp430Adc12.h b/tos/chips/msp430/adc12/Msp430Adc12.h index 6ae091b693..36c62a2c9e 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12.h +++ b/tos/chips/msp430/adc12/Msp430Adc12.h @@ -1,15 +1,19 @@ -/* +/* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. + * * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -26,17 +30,18 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2007-06-25 15:47:14 $ - * @author: Jan Hauer - * ======================================================================== + * @author Jan Hauer + * @author Eric B. Decker */ #ifndef MSP430ADC12_H #define MSP430ADC12_H #include "Msp430RefVoltGenerator.h" +#if !defined(__msp430_have_adc12) && !defined(__MSP430_HAS_ADC12__) +#error Target msp430 device does not have ADC12 module +#endif + #define ADC12_TIMERA_ENABLED #define ADC12_P6PIN_AUTO_CONFIGURE #define ADC12_CHECK_ARGS @@ -165,10 +170,7 @@ enum sampcon_id_enum #define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client" - #ifdef __MSP430_TI_HEADERS__ -//#if __GNUC__ >= 4 - // "The bitfield structures that overlay peripheral registers are not part of // mspgcc in the future; the recommended way of accessing those fields is to // use the masks defined in the TI headers." @@ -178,8 +180,6 @@ enum sampcon_id_enum // the old structures -- this may may result in faulty ADC code and should be // checked carefully for your specific device (note: msp430x1611 is safe)! -#warning "Accessing Adc12 registers via bitfield structures: this is discouraged mspgcc version >= 4 as it may result in faulty code!" - typedef struct { volatile unsigned adc12sc:1, @@ -206,8 +206,11 @@ typedef struct { cstartadd:4; } __attribute__ ((packed)) adc12ctl1_t; -#else +#endif /* __MSP430_TI_HEADERS__ */ +#if __GNUC__ >= 4 +#warning "ADC12 periph_reg bitfields: mspgcc version >= 4 needs to be checked carefully." +#else /* Test for GCC bug (bitfield access) - only version 3.2.3 is known to be stable */ #define GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__ * 10 + __GNUC_PATCHLEVEL__) #if GCC_VERSION == 332 @@ -216,11 +219,6 @@ typedef struct { #warning "This version of msp430-gcc might contain a bug when accessing bitfield structs (version 3.2.3 is safe - anything else is on your own risk)" #endif -#endif +#endif /* __GNUC__ >= 4 */ - -#if !defined(__msp430_have_adc12) && !defined(__MSP430_HAS_ADC12__) -#error Target msp430 device does not have ADC12 module -#endif - -#endif +#endif /* MSP430ADC12_H */ diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h index e01d49c90c..975f01231f 100644 --- a/tos/chips/msp430/usart/msp430usart.h +++ b/tos/chips/msp430/usart/msp430usart.h @@ -39,6 +39,10 @@ #error "msp430usart.h: USART0/UART0 not supported on this processor" #endif +#if __GNUC__ >= 4 +#warning "USART periph_reg bitfields: mspgcc version >= 4 needs to be checked carefully." +#endif + #define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource" #define MSP430_SPIO_BUS "Msp430Spi0.Resource" #define MSP430_UARTO_BUS "Msp430Uart0.Resource" diff --git a/tos/chips/msp430/x2xxx/usci/msp430usci.h b/tos/chips/msp430/x2xxx/usci/msp430usci.h index 9e6e555190..bf8107a0c7 100644 --- a/tos/chips/msp430/x2xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x2xxx/usci/msp430usci.h @@ -68,6 +68,10 @@ #error "msp430usci: processor not supported, currently only supports x2xxx (HAS_USCI)" #endif +#if __GNUC__ >= 4 +#warning "USCI periph_reg bitfields: mspgcc version >= 4 needs to be checked carefully." +#endif + /* * The MSP430X architecture at least the msp430f2618 family * has a total of four ports that can be used independently From 19d3f1652e29802ee3ed960d840ae49e8efd82a4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 24 Mar 2011 04:44:27 -0700 Subject: [PATCH 040/411] msp430: make configurations be in ROM (const) Motivation: Without the const modifier, the configuration structures will be in RAM and the actual contents will be in ROM. Double the space plus the cost of copying down the data. Further these structures being in RAM are subject to corruption. Seems silly. Force and use the structures out of ROM. Note eyesIFX modifies its structure. So we leave that in RAM and cast it. --- 02_To_Do | 21 +++++++++++++----- tos/chips/msp430/usart/HplMsp430I2C.nc | 2 +- tos/chips/msp430/usart/HplMsp430I2C0P.nc | 11 +++------- tos/chips/msp430/usart/HplMsp430Usart.nc | 4 ++-- tos/chips/msp430/usart/HplMsp430Usart0P.nc | 11 ++++------ tos/chips/msp430/usart/HplMsp430Usart1P.nc | 10 ++++----- tos/chips/msp430/usart/Msp430I2CConfigure.nc | 2 +- tos/chips/msp430/usart/Msp430I2CP.nc | 4 ++-- tos/chips/msp430/usart/Msp430SpiConfigure.nc | 2 +- tos/chips/msp430/usart/Msp430SpiDmaP.nc | 2 +- tos/chips/msp430/usart/Msp430SpiNoDmaP.nc | 2 +- tos/chips/msp430/usart/Msp430UartConfigure.nc | 2 +- tos/chips/msp430/usart/Msp430UartP.nc | 4 ++-- tos/chips/msp430/usart/msp430usart.h | 6 ++--- tos/chips/msp430/x2xxx/usci/HplMsp430UsciA.nc | 4 ++-- .../msp430/x2xxx/usci/HplMsp430UsciA0P.nc | 8 +++---- .../msp430/x2xxx/usci/HplMsp430UsciA1P.nc | 8 +++---- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc | 4 ++-- .../msp430/x2xxx/usci/HplMsp430UsciB0P.nc | 8 +++---- .../msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 8 +++---- .../msp430/x2xxx/usci/Msp430I2CConfigure.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430I2CP.nc | 4 ++-- .../msp430/x2xxx/usci/Msp430SpiConfigure.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc | 2 +- .../msp430/x2xxx/usci/Msp430SpiNoDmaP.nc | 4 ++-- .../msp430/x2xxx/usci/Msp430UartConfigure.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430UartP.nc | 6 ++--- tos/chips/msp430/x2xxx/usci/msp430usci.h | 10 ++++----- .../chips/msp430/HplMsp430Usart0P.nc | 17 ++++++-------- .../chips/msp430/HplMsp430Usart1P.nc | 8 +++---- .../tosthreads/platforms/epic/TelosSerialP.nc | 11 +++++++--- .../platforms/telosa/TelosSerialP.nc | 11 ++++++++-- .../chips/tda5250/HplTda5250DataIOP.nc | 5 ++--- .../tda5250/tda5250BusResourceSettings.h | 6 ++++- tos/platforms/eyesIFX/eyesIFXSerialP.nc | 10 +++++++-- tos/platforms/shimmer/HostTimeP.nc | 14 ++++++------ tos/platforms/shimmer/ShimmerSerialP.nc | 8 +++---- .../chips/bluetooth/RovingNetworksP.nc | 8 ++++--- .../shimmer/chips/msp430/HplMsp430I2C0P.nc | 4 +--- .../shimmer/chips/msp430/HplMsp430Usart0P.nc | 22 ++++++++----------- .../shimmer/chips/msp430/msp430usart.h | 9 +++----- tos/platforms/shimmer/chips/sd/SDP.nc | 3 +-- tos/platforms/shimmer2/ShimmerSerialP.nc | 4 ++-- .../shimmer2/chips/bmp085/Bmp085P.nc | 3 +-- .../shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc | 4 ++-- .../shimmer2/chips/gyromag/GyroMagBoardP.nc | 3 +-- .../shimmer2/chips/hmc5843/Hmc5843P.nc | 3 +-- tos/platforms/shimmer2r/ShimmerSerialP.nc | 6 ++--- tos/platforms/span/SpanSerialP.nc | 5 ++--- tos/platforms/telosa/TelosSerialP.nc | 7 +++--- tos/platforms/tinynode/TinyNodeSerialP.nc | 6 ++--- .../tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc | 2 +- .../z1/chips/msp430/usci/Z1SerialP.nc | 7 +++--- tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc | 15 ++++++------- 54 files changed, 181 insertions(+), 175 deletions(-) diff --git a/02_To_Do b/02_To_Do index 58b99719ba..6ab1d4c6a0 100644 --- a/02_To_Do +++ b/02_To_Do @@ -5,14 +5,17 @@ * apps/IPBaseStation: defines a reset in a particularily ugly way. Needs to be fixed and made part of the platform/cpu definition. -* What is the purpose of msp430regtypes.h? Is there a easier way to deal with this? +-- What is the purpose of msp430regtypes.h? Is there a easier way to deal with this? + No. This is how it is done. Provides the linkage to msp430hardware.h and various + defines that are there, ie. MSP430_NORACE(xxxxx). etc. * There are multiple copies of msp430hardware.h. Is that reasonable? * i2c for msp430 isn't done yet. needs to be cleaned up and made less ugly. Interface needs to be finished. - (done) Z1 currently overloads the SPI pins. Switch to using I2C pins so it is clean. + shimmer/span has a working i2c. Investigate bringing that i2c implementation into the + main t2 usart and usci areas. * CC2420 modules use LocalIeeeEui64C to obtain an ipv6 link-local address. Z1 needs to provide. If the ds2401 (serializer chip) isn't supported how is this done? @@ -20,6 +23,9 @@ * Currently config structs get put into ram via the data copy into ram mechanism. This means that it takes up room in RAM and ROM. Suboptimal. + Some platforms (Epic?) actual modify parts of the config structure on the fly. These + need to stay in ram. Look at const stash on z1-rework. + * Original mm_core port removed McuPowerOverride. Why? * usart/msp430usart.h usci/msp430usci.h: define baud rates and configurations and h/w config @@ -33,6 +39,13 @@ Are the bit fields really used or can we nuke them. Configuration uses a configuration struct and functional stuff is code that uses the definitions in the TI HEADERS and other cpu headers. + bit fields are used by the basic definitions in the interface files. To get rid of the bit fields + requires completly redefining the Hpl interfaces. + +* Need better approach to assigning ports. Should be a platform thing. this makes it so drivers + don't wire directly but instead wire to the platform ports. Or conversely the platform provides + the wiring... How to do this? + * Do we want to put in TOSThreads support? Best way if yes is to #ifdef needed code in the interrupt handlers. Old school mechanism clones the code. Why did Kevin do that? @@ -40,9 +53,7 @@ Works but isn't clean or straight forward. Confusing for someone new picking up what is going on. -* Need better approach to assigning pins. Should be a platform thing. this makes it so drivers - don't wire directly but instead wire to the platform ports. Or conversely the platform provides - the wiring... How to do this? + (done) Z1 currently overloads the SPI pins. Switch to using I2C pins so it is clean. -- should UcsiB add call for Usci.setUmctl(0)? No. not defined (it exists though) but is reset to 0. diff --git a/tos/chips/msp430/usart/HplMsp430I2C.nc b/tos/chips/msp430/usart/HplMsp430I2C.nc index ebf91d341c..29fcce2322 100644 --- a/tos/chips/msp430/usart/HplMsp430I2C.nc +++ b/tos/chips/msp430/usart/HplMsp430I2C.nc @@ -5,7 +5,7 @@ interface HplMsp430I2C { async command bool isI2C(); async command void clearModeI2C(); - async command void setModeI2C( msp430_i2c_union_config_t* config ); + async command void setModeI2C(const msp430_i2c_union_config_t* config); // U0CTL async command void setMasterMode(); diff --git a/tos/chips/msp430/usart/HplMsp430I2C0P.nc b/tos/chips/msp430/usart/HplMsp430I2C0P.nc index 9b8e85b954..1d83c8368d 100644 --- a/tos/chips/msp430/usart/HplMsp430I2C0P.nc +++ b/tos/chips/msp430/usart/HplMsp430I2C0P.nc @@ -72,8 +72,7 @@ implementation { } } - async command void HplI2C.setModeI2C( msp430_i2c_union_config_t* config ) { - + async command void HplI2C.setModeI2C(const msp430_i2c_union_config_t* config) { call HplUsart.resetUsart(TRUE); call HplUsart.disableUart(); call HplUsart.disableSpi(); @@ -81,14 +80,12 @@ implementation { call SIMO.selectModuleFunc(); call UCLK.makeInput(); call UCLK.selectModuleFunc(); - atomic { - U0CTL &= ~(I2C | I2CEN | SYNC); U0CTL = SWRST; U0CTL |= SYNC | I2C; U0CTL &= ~I2CEN; - + U0CTL = (config->i2cRegisters.uctl | (I2C | SYNC)) & ~I2CEN; I2CTCTL = 0x01; // resetting I2CTCTL first, @@ -96,15 +93,13 @@ implementation { // for some reason causes the I2C module to // work after SPI has been used (Issue 14) I2CTCTL = config->i2cRegisters.i2ctctl; - + I2CPSC = config->i2cRegisters.i2cpsc; I2CSCLH = config->i2cRegisters.i2csclh; I2CSCLL = config->i2cRegisters.i2cscll; I2COA = config->i2cRegisters.i2coa; U0CTL |= I2CEN; - } - } // U0CTL diff --git a/tos/chips/msp430/usart/HplMsp430Usart.nc b/tos/chips/msp430/usart/HplMsp430Usart.nc index 18f658e784..28b69d8bf2 100644 --- a/tos/chips/msp430/usart/HplMsp430Usart.nc +++ b/tos/chips/msp430/usart/HplMsp430Usart.nc @@ -165,13 +165,13 @@ interface HplMsp430Usart { /** * Switches USART to Spi mode. */ - async command void setModeSpi(msp430_spi_union_config_t* config); + async command void setModeSpi(const msp430_spi_union_config_t* config); /** * Switches USART to Uart mode (RX and TX enabled) * Interrupts disabled by default. */ - async command void setModeUart(msp430_uart_union_config_t* config); + async command void setModeUart(const msp430_uart_union_config_t* config); /* Dis/enabling of UTXIFG / URXIFG */ async command void disableRxIntr(); diff --git a/tos/chips/msp430/usart/HplMsp430Usart0P.nc b/tos/chips/msp430/usart/HplMsp430Usart0P.nc index 0a3d378b49..f9936eca78 100644 --- a/tos/chips/msp430/usart/HplMsp430Usart0P.nc +++ b/tos/chips/msp430/usart/HplMsp430Usart0P.nc @@ -233,7 +233,7 @@ implementation } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST; U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U0TCTL = config->spiRegisters.utctl; @@ -242,8 +242,7 @@ implementation call Usart.setUmctl(0x00); } - async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { - + async command void Usart.setModeSpi(const msp430_spi_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call HplI2C.clearModeI2C(); @@ -257,7 +256,7 @@ implementation return; } - void configUart(msp430_uart_union_config_t* config) { + void configUart(const msp430_uart_union_config_t* config) { U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U0TCTL = config->uartRegisters.utctl; @@ -267,8 +266,7 @@ implementation call Usart.setUmctl(config->uartRegisters.umctl); } - async command void Usart.setModeUart(msp430_uart_union_config_t* config) { - + async command void Usart.setModeUart(const msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call HplI2C.clearModeI2C(); @@ -289,7 +287,6 @@ implementation call Usart.clrIntr(); call Usart.disableIntr(); } - return; } diff --git a/tos/chips/msp430/usart/HplMsp430Usart1P.nc b/tos/chips/msp430/usart/HplMsp430Usart1P.nc index c33e3e0cf0..c3d7a3fc47 100644 --- a/tos/chips/msp430/usart/HplMsp430Usart1P.nc +++ b/tos/chips/msp430/usart/HplMsp430Usart1P.nc @@ -243,7 +243,7 @@ implementation } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { U1CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U1TCTL = config->spiRegisters.utctl; @@ -252,7 +252,7 @@ implementation } - async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { + async command void Usart.setModeSpi(const msp430_spi_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call Usart.disableUart(); @@ -266,7 +266,7 @@ implementation } - void configUart(msp430_uart_union_config_t* config) { + void configUart(const msp430_uart_union_config_t* config) { U1CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U1TCTL = config->uartRegisters.utctl; @@ -276,8 +276,7 @@ implementation call Usart.setUmctl(config->uartRegisters.umctl); } - async command void Usart.setModeUart(msp430_uart_union_config_t* config) { - + async command void Usart.setModeUart(const msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call Usart.disableSpi(); @@ -297,7 +296,6 @@ implementation call Usart.disableIntr(); call Usart.clrIntr(); /* clear after taking out of reset */ } - return; } diff --git a/tos/chips/msp430/usart/Msp430I2CConfigure.nc b/tos/chips/msp430/usart/Msp430I2CConfigure.nc index 7750dadf6b..dc769f4231 100644 --- a/tos/chips/msp430/usart/Msp430I2CConfigure.nc +++ b/tos/chips/msp430/usart/Msp430I2CConfigure.nc @@ -36,5 +36,5 @@ #include "msp430usart.h" interface Msp430I2CConfigure { - async command msp430_i2c_union_config_t* getConfig(); + async command const msp430_i2c_union_config_t* getConfig(); } diff --git a/tos/chips/msp430/usart/Msp430I2CP.nc b/tos/chips/msp430/usart/Msp430I2CP.nc index 80d6d67388..f874173f4e 100644 --- a/tos/chips/msp430/usart/Msp430I2CP.nc +++ b/tos/chips/msp430/usart/Msp430I2CP.nc @@ -99,10 +99,10 @@ implementation { default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() {return FAIL;} default event void Resource.granted[ uint8_t id ]() {} - default async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { + default async command const msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { return &msp430_i2c_default_config; } - + async command error_t I2CBasicAddr.read( i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { diff --git a/tos/chips/msp430/usart/Msp430SpiConfigure.nc b/tos/chips/msp430/usart/Msp430SpiConfigure.nc index e01372712b..7200f3a443 100644 --- a/tos/chips/msp430/usart/Msp430SpiConfigure.nc +++ b/tos/chips/msp430/usart/Msp430SpiConfigure.nc @@ -36,5 +36,5 @@ #include "msp430usart.h" interface Msp430SpiConfigure { - async command msp430_spi_union_config_t* getConfig(); + async command const msp430_spi_union_config_t* getConfig(); } diff --git a/tos/chips/msp430/usart/Msp430SpiDmaP.nc b/tos/chips/msp430/usart/Msp430SpiDmaP.nc index 1c46e68cde..48307b2b0b 100644 --- a/tos/chips/msp430/usart/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiDmaP.nc @@ -107,7 +107,7 @@ implementation { default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + default async command const msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return &msp430_spi_default_config; } diff --git a/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc index 4775b933fe..6097f60a08 100644 --- a/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc @@ -174,7 +174,7 @@ implementation { default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + default async command const msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return &msp430_spi_default_config; } diff --git a/tos/chips/msp430/usart/Msp430UartConfigure.nc b/tos/chips/msp430/usart/Msp430UartConfigure.nc index ce80af2224..999b0e4ca9 100644 --- a/tos/chips/msp430/usart/Msp430UartConfigure.nc +++ b/tos/chips/msp430/usart/Msp430UartConfigure.nc @@ -36,5 +36,5 @@ #include "msp430usart.h" interface Msp430UartConfigure { - async command msp430_uart_union_config_t* getConfig(); + async command const msp430_uart_union_config_t* getConfig(); } diff --git a/tos/chips/msp430/usart/Msp430UartP.nc b/tos/chips/msp430/usart/Msp430UartP.nc index dc1fb8a38e..ec6c369018 100644 --- a/tos/chips/msp430/usart/Msp430UartP.nc +++ b/tos/chips/msp430/usart/Msp430UartP.nc @@ -83,7 +83,7 @@ implementation { } async command void ResourceConfigure.configure[ uint8_t id ]() { - msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); + const msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); m_byte_time = config->uartConfig.ubr / 2; if (!m_byte_time) m_byte_time = 1; @@ -210,7 +210,7 @@ implementation { default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() { + default async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() { return &msp430_uart_default_config; } diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h index 975f01231f..04593ee43b 100644 --- a/tos/chips/msp430/usart/msp430usart.h +++ b/tos/chips/msp430/usart/msp430usart.h @@ -137,7 +137,7 @@ typedef union { * default spi config. * /2, SMCLK, master, 3pin */ -msp430_spi_union_config_t msp430_spi_default_config = { { +const msp430_spi_union_config_t msp430_spi_default_config = { { ubr : 2, ssel : 2, clen : 1, @@ -230,7 +230,7 @@ typedef union { msp430_uart_registers_t uartRegisters; } msp430_uart_union_config_t; -msp430_uart_union_config_t msp430_uart_default_config = { { +const msp430_uart_union_config_t msp430_uart_default_config = { { ubr : UBR_4MIHZ_57600, umctl : UMCTL_4MIHZ_57600, ssel : 2, @@ -301,7 +301,7 @@ typedef union { msp430_i2c_registers_t i2cRegisters; } msp430_i2c_union_config_t; -msp430_i2c_union_config_t msp430_i2c_default_config = { { +const msp430_i2c_union_config_t msp430_i2c_default_config = { { rxdmaen : 0, txdmaen : 0, xa : 0, diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA.nc index 64fb1251df..2952a71ce5 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA.nc @@ -175,7 +175,7 @@ interface HplMsp430UsciA { * configure usci as uart using config. * leaves interrupts disabled. */ - async command void setModeUart(msp430_uart_union_config_t* config); + async command void setModeUart(const msp430_uart_union_config_t* config); /*********************************************************************** @@ -201,5 +201,5 @@ interface HplMsp430UsciA { * configure usci as spi using config. * leaves interrupts disabled. */ - async command void setModeSpi(msp430_spi_union_config_t* config); + async command void setModeSpi(const msp430_spi_union_config_t* config); } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc index 46b015ab3a..eddfac994e 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc @@ -237,7 +237,7 @@ implementation { } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { UCA0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCA0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); @@ -255,7 +255,7 @@ implementation { * Also note that resetting the usci will clear any interrupt enables * for the device. Don't need to explicitly disableIntr. */ - async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { + async command void Usci.setModeSpi(const msp430_spi_union_config_t* config) { atomic { call Usci.resetUsci_n(); call Usci.enableSpi(); @@ -392,7 +392,7 @@ implementation { } } - void configUart(msp430_uart_union_config_t* config) { + void configUart(const msp430_uart_union_config_t* config) { UCA0CTL1 = (config->uartRegisters.uctl1 | UCSWRST); UCA0CTL0 = config->uartRegisters.uctl0; /* ucsync should be off */ call Usci.setUbr(config->uartRegisters.ubr); @@ -409,7 +409,7 @@ implementation { * Also note that resetting the usci will clear any interrupt enables * for the device. Don't need to explicitly disableIntr. */ - async command void Usci.setModeUart(msp430_uart_union_config_t* config) { + async command void Usci.setModeUart(const msp430_uart_union_config_t* config) { atomic { call Usci.resetUsci_n(); call Usci.enableUart(); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc index c86c1cf246..5db1c4ce75 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc @@ -237,7 +237,7 @@ implementation { } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { UCA1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCA1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); @@ -255,7 +255,7 @@ implementation { * Also note that resetting the usci will clear any interrupt enables * for the device. Don't need to explicitly disableIntr. */ - async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { + async command void Usci.setModeSpi(const msp430_spi_union_config_t* config) { atomic { call Usci.resetUsci_n(); call Usci.enableSpi(); @@ -392,7 +392,7 @@ implementation { } } - void configUart(msp430_uart_union_config_t* config) { + void configUart(const msp430_uart_union_config_t* config) { UCA1CTL1 = (config->uartRegisters.uctl1 | UCSWRST); UCA1CTL0 = config->uartRegisters.uctl0; /* ucsync should be off */ call Usci.setUbr(config->uartRegisters.ubr); @@ -409,7 +409,7 @@ implementation { * Also note that resetting the usci will clear any interrupt enables * for the device. Don't need to explicitly disableIntr. */ - async command void Usci.setModeUart(msp430_uart_union_config_t* config) { + async command void Usci.setModeUart(const msp430_uart_union_config_t* config) { atomic { call Usci.resetUsci_n(); call Usci.enableUart(); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc index 7ffe7f303c..02396a7c38 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc @@ -159,7 +159,7 @@ interface HplMsp430UsciB { * configure usci as spi using config. * leaves interrupts disabled. */ - async command void setModeSpi(msp430_spi_union_config_t* config); + async command void setModeSpi(const msp430_spi_union_config_t* config); /*********************************************************************** @@ -179,7 +179,7 @@ interface HplMsp430UsciB { * configure usci as i2c using config. * leaves interrupts disabled. */ - async command void setModeI2C( msp430_i2c_union_config_t* config ); + async command void setModeI2C(const msp430_i2c_union_config_t* config); /* control which direction the bus is in */ async command void setTransmitMode(); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc index 403863d943..d4451d361d 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc @@ -224,7 +224,7 @@ implementation { } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { UCB0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); @@ -242,7 +242,7 @@ implementation { * Also note that resetting the usci will clear any interrupt enables * for the device. Don't need to explicitly disableIntr. */ - async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { + async command void Usci.setModeSpi(const msp430_spi_union_config_t* config) { atomic { call Usci.resetUsci_n(); call Usci.enableSpi(); @@ -382,7 +382,7 @@ implementation { } } - void configI2C(msp430_i2c_union_config_t* config) { + void configI2C(const msp430_i2c_union_config_t* config) { UCB0CTL1 = (config->i2cRegisters.uctl1 | UCSWRST); UCB0CTL0 = (config->i2cRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->i2cRegisters.ubr); @@ -391,7 +391,7 @@ implementation { UCB0I2CIE = 0; } - async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { + async command void Usci.setModeI2C(const msp430_i2c_union_config_t* config) { atomic { call Usci.resetUsci_n(); call Usci.enableI2C(); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index 14ff9ea255..9f1db9d6b7 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -224,7 +224,7 @@ implementation { } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { UCB1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); @@ -242,7 +242,7 @@ implementation { * Also note that resetting the usci will clear any interrupt enables * for the device. Don't need to explicitly disableIntr. */ - async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { + async command void Usci.setModeSpi(const msp430_spi_union_config_t* config) { atomic { call Usci.resetUsci_n(); call Usci.enableSpi(); @@ -382,7 +382,7 @@ implementation { } } - void configI2C(msp430_i2c_union_config_t* config) { + void configI2C(const msp430_i2c_union_config_t* config) { UCB1CTL1 = (config->i2cRegisters.uctl1 | UCSWRST); UCB1CTL0 = (config->i2cRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->i2cRegisters.ubr); @@ -391,7 +391,7 @@ implementation { UCB1I2CIE = 0; } - async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { + async command void Usci.setModeI2C(const msp430_i2c_union_config_t* config) { atomic { call Usci.resetUsci_n(); call Usci.enableI2C(); diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2CConfigure.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CConfigure.nc index 17e59f2a0d..c2e88b59cf 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2CConfigure.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CConfigure.nc @@ -42,5 +42,5 @@ #include "msp430usci.h" interface Msp430I2CConfigure { - async command msp430_i2c_union_config_t* getConfig(); + async command const msp430_i2c_union_config_t* getConfig(); } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2CP.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CP.nc index b64f9d51fc..c0c9e23f4b 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2CP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CP.nc @@ -104,8 +104,8 @@ implementation { default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } default event void Resource.granted[ uint8_t id ]() {} - default async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { - return (msp430_i2c_union_config_t *) &msp430_i2c_default_config; + default async command const msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { + return &msp430_i2c_default_config; } async command error_t I2CBasicAddr.read( i2c_flags_t flags, diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiConfigure.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiConfigure.nc index 8407a23f03..0069ea8a77 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiConfigure.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiConfigure.nc @@ -42,5 +42,5 @@ #include "msp430usci.h" interface Msp430SpiConfigure { - async command msp430_spi_union_config_t* getConfig(); + async command const msp430_spi_union_config_t* getConfig(); } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc index 8fbe9a718f..fbe8dbe500 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc @@ -114,7 +114,7 @@ implementation { default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + default async command const msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return &msp430_spi_default_config; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc index 4eb20390e7..4a7bdd4497 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc @@ -115,8 +115,8 @@ implementation { default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { - return (msp430_spi_union_config_t *) &msp430_spi_default_config; + default async command const msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + return &msp430_spi_default_config; } default event void Resource.granted[ uint8_t id ]() {} diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UartConfigure.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartConfigure.nc index fdfcf30a86..a8010f5375 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UartConfigure.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartConfigure.nc @@ -41,5 +41,5 @@ #include "msp430usci.h" interface Msp430UartConfigure { - async command msp430_uart_union_config_t* getConfig(); + async command const msp430_uart_union_config_t* getConfig(); } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc index 55395e5a5a..e2995dd671 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc @@ -89,7 +89,7 @@ implementation { * this m_byte_time kludge is broken */ async command void ResourceConfigure.configure[ uint8_t id ]() { - msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); + const msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); m_byte_time = config->uartConfig.ubr / 2; if (!m_byte_time) m_byte_time = 1; @@ -215,8 +215,8 @@ implementation { default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() { - return (msp430_uart_union_config_t *) &msp430_uart_default_config; + default async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() { + return &msp430_uart_default_config; } default event void Resource.granted[ uint8_t id ]() {} diff --git a/tos/chips/msp430/x2xxx/usci/msp430usci.h b/tos/chips/msp430/x2xxx/usci/msp430usci.h index bf8107a0c7..cc70d379b3 100644 --- a/tos/chips/msp430/x2xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x2xxx/usci/msp430usci.h @@ -291,7 +291,7 @@ typedef union { * be sure to check Msp430DcoSpec.h for what speed we think * the processor is actually running at. We assume 8MiHz. */ -msp430_uart_union_config_t msp430_uart_default_config = { { +const msp430_uart_union_config_t msp430_uart_default_config = { { ubr : UBR_8MIHZ_115200, umctl : UMCTL_8MIHZ_115200, ucmode : 0, // uart @@ -303,7 +303,7 @@ msp430_uart_union_config_t msp430_uart_default_config = { { ucssel : 2, // smclk utxe : 1, // enable tx urxe : 1, // enable rx - } }; +} }; /************************************************************************************************************ @@ -343,7 +343,7 @@ typedef union { } msp430_spi_union_config_t; -msp430_spi_union_config_t msp430_spi_default_config = { { +const msp430_spi_union_config_t msp430_spi_default_config = { { ubr : 2, /* smclk/2 */ ucmode : 0, /* 3 pin, no ste */ ucmst : 1, /* master */ @@ -352,7 +352,7 @@ msp430_spi_union_config_t msp430_spi_default_config = { { ucckpl : 0, /* inactive state low */ ucckph : 1, /* data captured on rising, changed falling */ ucssel : 2, /* smclk */ - } }; +} }; /************************************************************************************************************ @@ -427,7 +427,7 @@ typedef union { } msp430_i2c_union_config_t; -msp430_i2c_union_config_t msp430_i2c_default_config = { { +const msp430_i2c_union_config_t msp430_i2c_default_config = { { ubr : 2, /* smclk/2 */ ucmode : 3, /* i2c mode */ ucmst : 1, /* master */ diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0P.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0P.nc index 367222244a..b97a82b5f7 100644 --- a/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0P.nc +++ b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0P.nc @@ -256,7 +256,7 @@ implementation } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST; U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U0TCTL = config->spiRegisters.utctl; @@ -265,12 +265,11 @@ implementation call Usart.setUmctl(0x00); } - async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { - + async command void Usart.setModeSpi(const msp430_spi_union_config_t* config) { atomic { - call Usart.resetUsart(TRUE); - call HplI2C.clearModeI2C(); - call Usart.disableUart(); + call Usart.resetUsart(TRUE); + call HplI2C.clearModeI2C(); + call Usart.disableUart(); configSpi(config); call Usart.enableSpi(); call Usart.resetUsart(FALSE); @@ -280,17 +279,15 @@ implementation return; } - void configUart(msp430_uart_union_config_t* config) { - + void configUart(const msp430_uart_union_config_t* config) { U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U0TCTL = config->uartRegisters.utctl; U0RCTL = config->uartRegisters.urctl; - call Usart.setUbr(config->uartRegisters.ubr); call Usart.setUmctl(config->uartRegisters.umctl); } - async command void Usart.setModeUart(msp430_uart_union_config_t* config) { + async command void Usart.setModeUart(const msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1P.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1P.nc index ffa4a54d30..92ece3ad05 100644 --- a/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1P.nc +++ b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1P.nc @@ -260,7 +260,7 @@ implementation } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { U1CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U1TCTL = config->spiRegisters.utctl; @@ -269,7 +269,7 @@ implementation } - async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { + async command void Usart.setModeSpi(const msp430_spi_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call Usart.disableUart(); @@ -283,7 +283,7 @@ implementation } - void configUart(msp430_uart_union_config_t* config) { + void configUart(const msp430_uart_union_config_t* config) { U1CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U1TCTL = config->uartRegisters.utctl; @@ -293,7 +293,7 @@ implementation call Usart.setUmctl(config->uartRegisters.umctl); } - async command void Usart.setModeUart(msp430_uart_union_config_t* config) { + async command void Usart.setModeUart(const msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); diff --git a/tos/lib/tosthreads/platforms/epic/TelosSerialP.nc b/tos/lib/tosthreads/platforms/epic/TelosSerialP.nc index fcfc91d3a6..c3e65c7337 100644 --- a/tos/lib/tosthreads/platforms/epic/TelosSerialP.nc +++ b/tos/lib/tosthreads/platforms/epic/TelosSerialP.nc @@ -5,19 +5,24 @@ module TelosSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_57600, umctl: UMCTL_1MHZ_57600, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} }; + const msp430_uart_union_config_t msp430_uart_telos_config = { { + ubr : UBR_1MIHZ_57600, umctl : UMCTL_1MIHZ_57600, ssel : 0x02, + pena : 0, pev : 0, spb : 0, clen : 1, listen: 0, mm : 0, + ckpl : 0, urxse : 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1, + } }; command error_t StdControl.start(){ return call Resource.immediateRequest(); } + command error_t StdControl.stop(){ call Resource.release(); return SUCCESS; } + event void Resource.granted(){} - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_telos_config; } - } diff --git a/tos/lib/tosthreads/platforms/telosa/TelosSerialP.nc b/tos/lib/tosthreads/platforms/telosa/TelosSerialP.nc index fcfc91d3a6..fc3a9d9bf7 100644 --- a/tos/lib/tosthreads/platforms/telosa/TelosSerialP.nc +++ b/tos/lib/tosthreads/platforms/telosa/TelosSerialP.nc @@ -5,18 +5,25 @@ module TelosSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_57600, umctl: UMCTL_1MHZ_57600, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} }; + const msp430_uart_union_config_t msp430_uart_telos_config = { { + ubr : UBR_1MIHZ_57600, umctl : UMCTL_1MIHZ_57600, ssel : 0x02, + pena : 0, pev : 0, spb : 0, clen : 1, listen: 0, mm : 0, + ckpl : 0, urxse : 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1, + } + }; command error_t StdControl.start(){ return call Resource.immediateRequest(); } + command error_t StdControl.stop(){ call Resource.release(); return SUCCESS; } + event void Resource.granted(){} - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_telos_config; } diff --git a/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOP.nc b/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOP.nc index c54dfacb61..4773968858 100644 --- a/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOP.nc +++ b/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOP.nc @@ -64,8 +64,7 @@ implementation { return SUCCESS; } - async command msp430_uart_union_config_t* UartResourceConfigure.getConfig() { - return &tda5250_uart_config; + async command const msp430_uart_union_config_t* UartResourceConfigure.getConfig() { + return (const msp430_uart_union_config_t*) &tda5250_uart_config; } - } diff --git a/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceSettings.h b/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceSettings.h index 147b1d40a9..78332faaa2 100644 --- a/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceSettings.h +++ b/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceSettings.h @@ -66,7 +66,11 @@ enum { #include "eyesIFXBaudrates.h" -msp430_uart_union_config_t tda5250_uart_config = { {ubr: TDA5250_UART_UBR, umctl: TDA5250_UART_UMCTL, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie:0, urxwie: 0, urxe: 1, utxe: 0} }; +msp430_uart_union_config_t tda5250_uart_config = { { + ubr: TDA5250_UART_UBR, umctl: TDA5250_UART_UMCTL, ssel: 0x02, pena: 0, + pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, + ckpl: 0, urxse: 0, urxeie:0, urxwie: 0, urxe: 1, utxe: 0 +} }; enum { TDA5250_32KHZ_BYTE_TIME = (32768UL*10)/TDA5250_UART_BAUDRATE diff --git a/tos/platforms/eyesIFX/eyesIFXSerialP.nc b/tos/platforms/eyesIFX/eyesIFXSerialP.nc index 4d94668981..1060ba94c1 100644 --- a/tos/platforms/eyesIFX/eyesIFXSerialP.nc +++ b/tos/platforms/eyesIFX/eyesIFXSerialP.nc @@ -8,18 +8,24 @@ implementation { UBR_1MHZ_57601=0x0011, UMCTL_1MHZ_57601=0xAA // 57600 bit/s }; - msp430_uart_union_config_t msp430_uart_eyes_config = { {ubr: UBR_1MHZ_57601, umctl: UMCTL_1MHZ_57601, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, urxe: 1, utxe: 1} }; + const msp430_uart_union_config_t msp430_uart_eyes_config = { { + ubr: UBR_1MHZ_57601, umctl: UMCTL_1MHZ_57601, ssel: 0x02, + pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, + ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, urxe: 1, utxe: 1 + } }; command error_t StdControl.start(){ return call Resource.immediateRequest(); } + command error_t StdControl.stop(){ call Resource.release(); return SUCCESS; } + event void Resource.granted(){} - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_eyes_config; } } diff --git a/tos/platforms/shimmer/HostTimeP.nc b/tos/platforms/shimmer/HostTimeP.nc index cd804d0f6a..d9d0c9ceaf 100644 --- a/tos/platforms/shimmer/HostTimeP.nc +++ b/tos/platforms/shimmer/HostTimeP.nc @@ -77,16 +77,16 @@ implementation { void setupUART() { /* - * NOTE: this sets the baudrate based upon a 4mhz SMCLK given by the 8mhz xt clock config - * to run at the default msp430 clock settings, use _1MHZ_ for these two flags + * NOTE: this sets the baudrate based upon a 4mihz SMCLK given by the 8mihz xt clock config + * to run at the default msp430 clock settings, use _1MIHZ_ for these two flags */ - msp430_uart_union_config_t RN_uart_config = { {ubr: UBR_4MHZ_115200, umctl: UMCTL_4MHZ_115200, - ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1,listen: 0, - mm: 0, ckpl: 0, urxse: 0, urxeie: 0, - urxwie: 0, utxe : 1, urxe :1} }; + const msp430_uart_union_config_t RN_uart_config = { { + ubr : UBR_4MIHZ_115200, umctl : UMCTL_4MIHZ_115200, ssel : 0x02, + pena : 0, pev : 0, spb : 0, clen : 1, listen : 0, mm : 0, + ckpl : 0, urxse : 0, urxeie : 0, urxwie : 0, utxe : 1, urxe : 1 + } }; call UARTControl.setModeUart(&RN_uart_config); // set to UART mode - call UARTControl.enableTxIntr(); call UARTControl.enableRxIntr(); } diff --git a/tos/platforms/shimmer/ShimmerSerialP.nc b/tos/platforms/shimmer/ShimmerSerialP.nc index a52ee33844..f3a802186d 100644 --- a/tos/platforms/shimmer/ShimmerSerialP.nc +++ b/tos/platforms/shimmer/ShimmerSerialP.nc @@ -38,9 +38,8 @@ module ShimmerSerialP provides interface Msp430UartConfigure; uses interface Resource; } -implementation -{ - msp430_uart_union_config_t msp430_uart_telos_config = { { +implementation { + const msp430_uart_union_config_t msp430_uart_telos_config = { { ubr : UBR_1MIHZ_115200, umctl: UMCTL_1MIHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, @@ -60,8 +59,7 @@ implementation event void Resource.granted(){} - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() - { + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_telos_config; } } diff --git a/tos/platforms/shimmer/chips/bluetooth/RovingNetworksP.nc b/tos/platforms/shimmer/chips/bluetooth/RovingNetworksP.nc index f1db699193..e88c4784a0 100644 --- a/tos/platforms/shimmer/chips/bluetooth/RovingNetworksP.nc +++ b/tos/platforms/shimmer/chips/bluetooth/RovingNetworksP.nc @@ -137,9 +137,11 @@ implementation { } void setupUART() { - msp430_uart_union_config_t RN_uart_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, - ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1,listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 0, - urxwie: 0, utxe : 1, urxe :1} }; + const msp430_uart_union_config_t RN_uart_config = { { + ubr : UBR_1MIHZ_115200, umctl : UMCTL_1MIHZ_115200, ssel : 0x02, + pena : 0, pev : 0, spb : 0, clen : 1,listen : 0, mm : 0, + ckpl : 0, urxse : 0, urxeie : 0, urxwie : 0, utxe : 1, urxe : 1 + } }; call UARTControl.setModeUart(&RN_uart_config); // set to UART mode diff --git a/tos/platforms/shimmer/chips/msp430/HplMsp430I2C0P.nc b/tos/platforms/shimmer/chips/msp430/HplMsp430I2C0P.nc index 6e30bbef98..2f3b5601aa 100644 --- a/tos/platforms/shimmer/chips/msp430/HplMsp430I2C0P.nc +++ b/tos/platforms/shimmer/chips/msp430/HplMsp430I2C0P.nc @@ -63,8 +63,7 @@ implementation { } } - async command void HplI2C.setModeI2C( msp430_i2c_union_config_t* config ) { - + async command void HplI2C.setModeI2C(const msp430_i2c_union_config_t* config) { call HplUsart.resetUsart(TRUE); call HplUsart.disableUart(); call HplUsart.disableSpi(); @@ -74,7 +73,6 @@ implementation { call UCLK.selectModuleFunc(); atomic { - IE1 &= ~(UTXIE0 | URXIE0); // interrupt disable U0CTL &= ~(I2C | I2CEN | SYNC); diff --git a/tos/platforms/shimmer/chips/msp430/HplMsp430Usart0P.nc b/tos/platforms/shimmer/chips/msp430/HplMsp430Usart0P.nc index 387d47a1a5..acb2fa44e6 100644 --- a/tos/platforms/shimmer/chips/msp430/HplMsp430Usart0P.nc +++ b/tos/platforms/shimmer/chips/msp430/HplMsp430Usart0P.nc @@ -260,7 +260,7 @@ implementation } } - void configSpi(msp430_spi_union_config_t* config) { + void configSpi(const msp430_spi_union_config_t* config) { // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST; U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U0TCTL = config->spiRegisters.utctl; @@ -269,12 +269,11 @@ implementation call Usart.setUmctl(0x00); } - async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { - + async command void Usart.setModeSpi(const msp430_spi_union_config_t* config) { atomic { - call Usart.resetUsart(TRUE); - call HplI2C.clearModeI2C(); - call Usart.disableUart(); + call Usart.resetUsart(TRUE); + call HplI2C.clearModeI2C(); + call Usart.disableUart(); configSpi(config); call Usart.enableSpi(); call Usart.resetUsart(FALSE); @@ -284,8 +283,7 @@ implementation return; } - void configUart(msp430_uart_union_config_t* config) { - + void configUart(const msp430_uart_union_config_t* config) { U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U0TCTL = config->uartRegisters.utctl; U0RCTL = config->uartRegisters.urctl; @@ -294,12 +292,11 @@ implementation call Usart.setUmctl(config->uartRegisters.umctl); } - async command void Usart.setModeUart(msp430_uart_union_config_t* config) { - + async command void Usart.setModeUart(const msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); - call HplI2C.clearModeI2C(); - call Usart.disableSpi(); + call HplI2C.clearModeI2C(); + call Usart.disableSpi(); configUart(config); if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) { call Usart.enableUart(); @@ -316,7 +313,6 @@ implementation call Usart.clrIntr(); call Usart.disableIntr(); } - return; } diff --git a/tos/platforms/shimmer/chips/msp430/msp430usart.h b/tos/platforms/shimmer/chips/msp430/msp430usart.h index a85137821b..b06b048162 100644 --- a/tos/platforms/shimmer/chips/msp430/msp430usart.h +++ b/tos/platforms/shimmer/chips/msp430/msp430usart.h @@ -126,8 +126,7 @@ typedef union { msp430_spi_registers_t spiRegisters; } msp430_spi_union_config_t; -msp430_spi_union_config_t msp430_spi_default_config = { - { +const msp430_spi_union_config_t msp430_spi_default_config = { { ubr : 0x0002, ssel : 0x02, clen : 1, @@ -215,8 +214,7 @@ typedef union { msp430_uart_registers_t uartRegisters; } msp430_uart_union_config_t; -msp430_uart_union_config_t msp430_uart_default_config = { - { +const msp430_uart_union_config_t msp430_uart_default_config = { { utxe : 1, urxe : 1, ubr : UBR_1MHZ_57600, @@ -291,8 +289,7 @@ typedef union { msp430_i2c_registers_t i2cRegisters; } msp430_i2c_union_config_t; -msp430_i2c_union_config_t msp430_i2c_default_config = { - { +const msp430_i2c_union_config_t msp430_i2c_default_config = { { rxdmaen : 0, txdmaen : 0, xa : 0, diff --git a/tos/platforms/shimmer/chips/sd/SDP.nc b/tos/platforms/shimmer/chips/sd/SDP.nc index 4a5bea2f52..4079a9f842 100644 --- a/tos/platforms/shimmer/chips/sd/SDP.nc +++ b/tos/platforms/shimmer/chips/sd/SDP.nc @@ -204,13 +204,12 @@ implementation { } void initSPI() { - msp430_spi_union_config_t * config; + const msp430_spi_union_config_t * config; TOSH_MAKE_SD_CS_N_OUTPUT(); TOSH_SEL_SD_CS_N_IOFUNC(); config = &msp430_spi_default_config; - call Usart.setModeSpi(config); /* diff --git a/tos/platforms/shimmer2/ShimmerSerialP.nc b/tos/platforms/shimmer2/ShimmerSerialP.nc index 1d39456398..2b2f99298c 100644 --- a/tos/platforms/shimmer2/ShimmerSerialP.nc +++ b/tos/platforms/shimmer2/ShimmerSerialP.nc @@ -39,7 +39,7 @@ module ShimmerSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_shimmer2_config = { { + const msp430_uart_union_config_t msp430_uart_shimmer2_config = { { ubr : UBR_1MIHZ_115200, umctl: UMCTL_1MIHZ_115200, ssel: 0x02, @@ -69,7 +69,7 @@ implementation { event void Resource.granted(){} - async command msp430_uart_union_config_t * Msp430UartConfigure.getConfig(){ + async command const msp430_uart_union_config_t * Msp430UartConfigure.getConfig(){ return &msp430_uart_shimmer2_config; } } diff --git a/tos/platforms/shimmer2/chips/bmp085/Bmp085P.nc b/tos/platforms/shimmer2/chips/bmp085/Bmp085P.nc index 17d5d6087f..ec781a94e8 100644 --- a/tos/platforms/shimmer2/chips/bmp085/Bmp085P.nc +++ b/tos/platforms/shimmer2/chips/bmp085/Bmp085P.nc @@ -78,8 +78,7 @@ implementation { bool operatingState; - msp430_i2c_union_config_t msp430_i2c_my_config = { - { + const msp430_i2c_union_config_t msp430_i2c_my_config = { { rxdmaen : 0, txdmaen : 0, xa : 0, diff --git a/tos/platforms/shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc b/tos/platforms/shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc index acf609da48..16936c67e4 100644 --- a/tos/platforms/shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc +++ b/tos/platforms/shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc @@ -53,8 +53,8 @@ implementation { task void send_command(); task void setupUART() { - msp430_uart_union_config_t RN_uart_config = { - { ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, + const msp430_uart_union_config_t RN_uart_config = { { + ubr: UBR_1MIHZ_115200, umctl: UMCTL_1MIHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 0, urxwie: 0, utxe : 1, urxe :1 } diff --git a/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardP.nc b/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardP.nc index 164d14b55d..7a6c8128b8 100644 --- a/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardP.nc +++ b/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardP.nc @@ -81,8 +81,7 @@ implementation { #warning "DO NOT CONTINUE TO USE THIS MODULE; IT HAS BEEN DEPRECATED. USE SEPARATE GYROBOARD AND MAGNETOMETER INSTEAD." command error_t Init.init() { - msp430_i2c_union_config_t msp430_i2c_my_config = { - { + const msp430_i2c_union_config_t msp430_i2c_my_config = { { rxdmaen : 0, txdmaen : 0, xa : 0, diff --git a/tos/platforms/shimmer2/chips/hmc5843/Hmc5843P.nc b/tos/platforms/shimmer2/chips/hmc5843/Hmc5843P.nc index ed08a187c3..45f56e56bc 100644 --- a/tos/platforms/shimmer2/chips/hmc5843/Hmc5843P.nc +++ b/tos/platforms/shimmer2/chips/hmc5843/Hmc5843P.nc @@ -67,8 +67,7 @@ implementation { uint8_t readbuff[7], testPhase; uint8_t packet[2], readSize, * readDataBuffer; - msp430_i2c_union_config_t msp430_i2c_my_config = { - { + const msp430_i2c_union_config_t msp430_i2c_my_config = { { rxdmaen : 0, txdmaen : 0, xa : 0, diff --git a/tos/platforms/shimmer2r/ShimmerSerialP.nc b/tos/platforms/shimmer2r/ShimmerSerialP.nc index 1d39456398..46d1e0ba46 100644 --- a/tos/platforms/shimmer2r/ShimmerSerialP.nc +++ b/tos/platforms/shimmer2r/ShimmerSerialP.nc @@ -39,8 +39,8 @@ module ShimmerSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_shimmer2_config = { { - ubr : UBR_1MIHZ_115200, + const msp430_uart_union_config_t msp430_uart_shimmer2_config = { { + ubr: UBR_1MIHZ_115200, umctl: UMCTL_1MIHZ_115200, ssel: 0x02, pena: 0, @@ -69,7 +69,7 @@ implementation { event void Resource.granted(){} - async command msp430_uart_union_config_t * Msp430UartConfigure.getConfig(){ + async command const msp430_uart_union_config_t * Msp430UartConfigure.getConfig(){ return &msp430_uart_shimmer2_config; } } diff --git a/tos/platforms/span/SpanSerialP.nc b/tos/platforms/span/SpanSerialP.nc index 6e7f156b31..1eb2461f18 100644 --- a/tos/platforms/span/SpanSerialP.nc +++ b/tos/platforms/span/SpanSerialP.nc @@ -42,7 +42,7 @@ module SpanSerialP } implementation { - msp430_uart_union_config_t msp430_uart_telos_config = { { + const msp430_uart_union_config_t msp430_uart_telos_config = { { ubr : UBR_1MIHZ_115200, umctl: UMCTL_1MIHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, @@ -62,8 +62,7 @@ implementation event void Resource.granted(){} - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() - { + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_telos_config; } } diff --git a/tos/platforms/telosa/TelosSerialP.nc b/tos/platforms/telosa/TelosSerialP.nc index 3a593f65e6..f60ab226e9 100644 --- a/tos/platforms/telosa/TelosSerialP.nc +++ b/tos/platforms/telosa/TelosSerialP.nc @@ -5,7 +5,7 @@ module TelosSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_telos_config = { { + const msp430_uart_union_config_t msp430_uart_telos_config = { { ubr : UBR_1MIHZ_115200, umctl: UMCTL_1MIHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, @@ -15,14 +15,15 @@ implementation { command error_t StdControl.start(){ return call Resource.immediateRequest(); } + command error_t StdControl.stop(){ call Resource.release(); return SUCCESS; } + event void Resource.granted(){} - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_telos_config; } - } diff --git a/tos/platforms/tinynode/TinyNodeSerialP.nc b/tos/platforms/tinynode/TinyNodeSerialP.nc index 091a9f9a79..1cc716f0d9 100644 --- a/tos/platforms/tinynode/TinyNodeSerialP.nc +++ b/tos/platforms/tinynode/TinyNodeSerialP.nc @@ -5,7 +5,7 @@ module TinyNodeSerialP { } implementation { - msp430_uart_union_config_t msp430_uart_tinynode_config = { { + const msp430_uart_union_config_t msp430_uart_tinynode_config = { { ubr : UBR_1MIHZ_115200, umctl: UMCTL_1MIHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, @@ -22,8 +22,8 @@ implementation { } event void Resource.granted(){} - - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { + + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_tinynode_config; } } diff --git a/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc b/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc index 1910aa5fc0..bcb4befe55 100644 --- a/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc +++ b/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc @@ -114,7 +114,7 @@ implementation { default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } - default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + default async command const msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return &msp430_spi_default_config; } diff --git a/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc b/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc index 64c62d0195..d05dc3f180 100644 --- a/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc +++ b/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc @@ -5,7 +5,7 @@ module Z1SerialP { } implementation { - msp430_uart_union_config_t msp430_uart_z1_config = { { + const msp430_uart_union_config_t msp430_uart_z1_config = { { ubr : UBR_8MIHZ_115200, umctl : UMCTL_8MIHZ_115200, ucssel : 2, @@ -16,14 +16,15 @@ implementation { command error_t StdControl.start(){ return call Resource.immediateRequest(); } + command error_t StdControl.stop(){ call Resource.release(); return SUCCESS; } + event void Resource.granted(){} - async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_z1_config; } - } diff --git a/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc b/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc index 89d46ce44c..c5b616f903 100644 --- a/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc +++ b/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc @@ -8,7 +8,7 @@ generic module Z1UsciP() { } implementation { - msp430_spi_union_config_t msp430_spi_z1_config = { { + const msp430_spi_union_config_t msp430_spi_z1_config = { { ubr : 2, /* smclk/2 */ ucmode : 0, /* 3 pin master, no ste */ ucmst : 1, @@ -19,11 +19,11 @@ implementation { ucssel : 2, /* smclk */ } }; - async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { - return (msp430_spi_union_config_t*) &msp430_spi_z1_config; + async command const msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { + return &msp430_spi_z1_config; } - msp430_i2c_union_config_t msp430_i2c_z1_config = { { + const msp430_i2c_union_config_t msp430_i2c_z1_config = { { ucmode : 3, /* i2c mode */ ucmst : 1, /* master */ ucmm : 0, /* single master */ @@ -33,11 +33,10 @@ implementation { ucssel : 2, /* smclk */ i2coa : 1, /* our address is 1 */ ucgcen : 1, /* respond to general call */ - ubr : 800, /* smclk/2 */ + ubr : 800, /* smclk/800 */ } }; - async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { - return (msp430_i2c_union_config_t *) &msp430_i2c_z1_config; + async command const msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { + return &msp430_i2c_z1_config; } - } From 59af87fe6705a4f0fb103f11c382f4c74a81bd73 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 24 Mar 2011 04:53:45 -0700 Subject: [PATCH 041/411] msp.rules: add lst and sym generation, do a better job of reporting sizes. --- support/make/msp/debug.extra | 1 - support/make/msp/msp.rules | 16 +++++++++++++++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/support/make/msp/debug.extra b/support/make/msp/debug.extra index 45d3438fa1..360ba0dc12 100644 --- a/support/make/msp/debug.extra +++ b/support/make/msp/debug.extra @@ -2,4 +2,3 @@ #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ OPTFLAGS = -O1 -g -fnesc-no-inline - diff --git a/support/make/msp/msp.rules b/support/make/msp/msp.rules index 6e959cf0c0..13964f4d1b 100644 --- a/support/make/msp/msp.rules +++ b/support/make/msp/msp.rules @@ -34,6 +34,8 @@ endif OBJCOPY = msp430-objcopy OBJDUMP = msp430-objdump +NM = msp430-nm +SIZE = msp430-size SET_ID = tos-set-symbols NCC = ncc LIBS = -lm @@ -46,6 +48,8 @@ endif AMADDR = ActiveMessageAddressC__addr BUILDDIR ?= build/$(PLATFORM) MAIN_EXE = $(BUILDDIR)/main.exe +MAIN_LST = $(BUILDDIR)/main.lst +MAIN_SYM = $(BUILDDIR)/main.sym MAIN_IHEX = $(BUILDDIR)/main.ihex INSTALL_IHEX = $(MAIN_IHEX).out$(if $(NODEID),-$(NODEID),) @@ -101,7 +105,7 @@ tosimage: ihex build_tosimage FORCE ihex: exe FORCE $(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX) -exe: exe0 bytes FORCE +exe: exe0 bytes lst sym FORCE @: exe0: builddir $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE @@ -116,5 +120,15 @@ builddir: FORCE mkdir -p $(BUILDDIR) bytes: FORCE + @echo "script:" @$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }' + @echo "msp430-size:" + @$(SIZE) $(MAIN_EXE) +lst: FORCE + @echo "generating listing: $(MAIN_LST)" + @$(OBJDUMP) -d --source -w $(MAIN_EXE) > $(MAIN_LST) + +sym: FORCE + @echo "generating symbol table: $(MAIN_SYM)" + @$(NM) -an $(MAIN_EXE) > $(MAIN_SYM) From 8f91ea7573c75e58d4e176deb526ea43622a8be2 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 24 Mar 2011 04:54:58 -0700 Subject: [PATCH 042/411] Serial.h: add AM_SERIAL_PACKET for mig usage. Motivation: when using mig to manipulate serial header (AM) data it needs AM_SERIAL_PACKET so it won't bitch. --- tos/lib/serial/Serial.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tos/lib/serial/Serial.h b/tos/lib/serial/Serial.h index 4821dbbba0..b3ada3db18 100644 --- a/tos/lib/serial/Serial.h +++ b/tos/lib/serial/Serial.h @@ -92,6 +92,7 @@ enum { // message_t type dispatch enum { + AM_SERIAL_PACKET = 0, TOS_SERIAL_ACTIVE_MESSAGE_ID = 0, TOS_SERIAL_CC1000_ID = 1, TOS_SERIAL_802_15_4_ID = 2, From 530a7813fe046c3a1fb4b3eebfd8db1df577cd2c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 24 Mar 2011 04:59:09 -0700 Subject: [PATCH 043/411] msp430: Add Stack checking mechanism. Motivation: stacks on small processors are a scarce commodity. We need a mechanism for observing how much stack has been used and how much is left. --- tos/chips/msp430/Stack.nc | 91 +++++++++++++++++++++++++++ tos/chips/msp430/StackC.nc | 18 ++++++ tos/chips/msp430/StackP.nc | 118 +++++++++++++++++++++++++++++++++++ tos/chips/msp430/cpu_stack.h | 17 +++++ 4 files changed, 244 insertions(+) create mode 100644 tos/chips/msp430/Stack.nc create mode 100644 tos/chips/msp430/StackC.nc create mode 100644 tos/chips/msp430/StackP.nc create mode 100644 tos/chips/msp430/cpu_stack.h diff --git a/tos/chips/msp430/Stack.nc b/tos/chips/msp430/Stack.nc new file mode 100644 index 0000000000..a7016f8903 --- /dev/null +++ b/tos/chips/msp430/Stack.nc @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2010, Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Basic stack interface. Simple CPU stack manipulation. Initilization, + * checking, and size access. + * + * A stack on a small uComputer is a scarce resource and can easily overflow + * its bounds. Provisions for setting the stack to an initial value, setting + * any guard words, and providing for verification are provided by this interface. + * + * Setting the stack to an initial value also allows us to see dynamically the + * stack depth. + * + * @author Eric B. Decker + */ + +#include "cpu_stack.h" + +interface Stack { + + /** + * Set the stack to its initial state. + * + * initilize stack contents to known good value and set the Guard word. + */ + async command void init(); + + + /** + * Check for stack overflow. + * + * Verify guard word has not been clobbered. + * + * Returns: 0 - no problem. + * 1 - stack overflow has occured. + */ + async command bool overflow(); + + + /** + * return remaining bytes on the stack. + * + * given the current stack pointer, how much more room + * is there on the stack. + */ + async command int16_t remaining(); + + + /** + * return number of unused stack bytes. + * + * unused bytes are stack bytes that have never been touched. + */ + async command int16_t unused(); + + + /** + * return size of the stack + */ + async command uint16_t size(); +} diff --git a/tos/chips/msp430/StackC.nc b/tos/chips/msp430/StackC.nc new file mode 100644 index 0000000000..a796fa8987 --- /dev/null +++ b/tos/chips/msp430/StackC.nc @@ -0,0 +1,18 @@ +/** + * Basic CPU stack interface. + * + * See Stack.nc (interface) for details. + * + * @author Eric B. Decker + */ + + +configuration StackC { + provides interface Stack; +} + +implementation { + components StackP; + + Stack = StackP; +} diff --git a/tos/chips/msp430/StackP.nc b/tos/chips/msp430/StackP.nc new file mode 100644 index 0000000000..4f04f878f3 --- /dev/null +++ b/tos/chips/msp430/StackP.nc @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2010, Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * + * Basic CPU stack interface + * + * @author Eric B. Decker + * @date Nov 7, 2010 + */ + +#include "cpu_stack.h" + +extern uint16_t _end; /* last used byte of last segment in RAM (linker) */ +extern uint16_t __stack; /* top of stack */ + + +module StackP { + provides interface Stack; +} + +implementation { + + /* + * Set stack to known good state. + * + * 1) set stack itself to STACK_UNUSED + * 2) set guard word (_end) to STACK_GUARD + */ + + async command void Stack.init() { + uint16_t *ptr = &_end; + register void *stkptr asm("r1"); + + *ptr++ = STACK_GUARD; + + while (ptr < (uint16_t *) stkptr) + *ptr++ = STACK_UNUSED; + } + + + /* + * Check for stack overflow + * + * returns: 0 - all okay + * 1 - not so good + */ + + async command bool Stack.overflow() { + uint16_t *p = &_end; + + return (*p != STACK_GUARD); + } + + + /* + * Return number of remaining bytes on the stack. + * + * Given the current stack pointer, how much space is left. + */ + + async command int16_t Stack.remaining() { + register void *stkptr asm("r1"); + + return (uint16_t) stkptr - (uint16_t) &_end - STACK_GUARD_SIZE; + } + + + async command int16_t Stack.unused() { + register void *stkptr asm("r1"); + uint16_t *p = (void *) ((uint8_t *) &_end + STACK_GUARD_SIZE); + + while (p < (uint16_t *) stkptr) { + if (*p != STACK_UNUSED) + break; + p++; + } + return (uint16_t) p - (uint16_t) &_end - STACK_GUARD_SIZE; + } + + + /* + * Return total size of the stack + */ + + async command uint16_t Stack.size() { + return (uint16_t) &__stack - (uint16_t) &_end - STACK_GUARD_SIZE; + } +} diff --git a/tos/chips/msp430/cpu_stack.h b/tos/chips/msp430/cpu_stack.h new file mode 100644 index 0000000000..98c5c2dcea --- /dev/null +++ b/tos/chips/msp430/cpu_stack.h @@ -0,0 +1,17 @@ +/** + * Copyright 2010 (c) Eric B. Decker + * All rights reserved. + * + * @author Eric B. Decker + */ +#ifndef _CPU_STACK_H +#define _CPU_STACK_H + +#define STACK_GUARD 0x9999 +#define STACK_UNUSED 0x7a7a + +/* size of the Guard word */ +#define STACK_GUARD_SIZE 2 + + +#endif // _H_CPU_STACK_H From 8a2c00c4d25e81c4566115c0a092dde091b2ce3f Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 27 Mar 2011 06:21:08 -0700 Subject: [PATCH 044/411] shorten GNUC >=4 bitfield warning. --- tos/chips/msp430/adc12/Msp430Adc12.h | 2 +- tos/chips/msp430/usart/msp430usart.h | 2 +- tos/chips/msp430/x2xxx/usci/msp430usci.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/tos/chips/msp430/adc12/Msp430Adc12.h b/tos/chips/msp430/adc12/Msp430Adc12.h index 36c62a2c9e..ae64343a51 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12.h +++ b/tos/chips/msp430/adc12/Msp430Adc12.h @@ -209,7 +209,7 @@ typedef struct { #endif /* __MSP430_TI_HEADERS__ */ #if __GNUC__ >= 4 -#warning "ADC12 periph_reg bitfields: mspgcc version >= 4 needs to be checked carefully." +#warning "ADC12 periph_reg bitfields: mspgcc >= 4 (check bitfield code gen)." #else /* Test for GCC bug (bitfield access) - only version 3.2.3 is known to be stable */ #define GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__ * 10 + __GNUC_PATCHLEVEL__) diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h index 04593ee43b..147b6b4515 100644 --- a/tos/chips/msp430/usart/msp430usart.h +++ b/tos/chips/msp430/usart/msp430usart.h @@ -40,7 +40,7 @@ #endif #if __GNUC__ >= 4 -#warning "USART periph_reg bitfields: mspgcc version >= 4 needs to be checked carefully." +#warning "USART periph_reg bitfields: mspgcc >= 4 (check bitfield code gen)." #endif #define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource" diff --git a/tos/chips/msp430/x2xxx/usci/msp430usci.h b/tos/chips/msp430/x2xxx/usci/msp430usci.h index cc70d379b3..50288e8f7f 100644 --- a/tos/chips/msp430/x2xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x2xxx/usci/msp430usci.h @@ -69,7 +69,7 @@ #endif #if __GNUC__ >= 4 -#warning "USCI periph_reg bitfields: mspgcc version >= 4 needs to be checked carefully." +#warning "USCI periph_reg bitfields: mspgcc >= 4 (check bitfield code gen)." #endif /* From f3d572a38a1d6e03b098fa9713c04f5e0e3b4e5e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 27 Mar 2011 06:27:06 -0700 Subject: [PATCH 045/411] msp430: make __nesc_enable_interrupt and disable be inline. --- tos/chips/msp430/msp430hardware.h | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 2b38d8480a..fdacd35134 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -455,14 +455,12 @@ enum { MSP430_POWER_LPM4 = 5 }; -void __nesc_disable_interrupt(void) @safe() -{ +inline void __nesc_disable_interrupt(void) @safe() { dint(); nop(); } -void __nesc_enable_interrupt(void) @safe() -{ +inline void __nesc_enable_interrupt(void) @safe() { eint(); } @@ -471,6 +469,8 @@ void __nesc_enable_interrupt(void) @safe() * or not. Previously, a bool (still a uint16_t) was used. However, * using the uint16_t (native width of the msp430) fits in with how interrupts * are checked below, see definition of __nesc_atomic_start. + * + * This should be checked to verify that it generates minimal code. */ typedef uint16_t __nesc_atomic_t; __nesc_atomic_t __nesc_atomic_start(void); @@ -482,12 +482,6 @@ void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts); * is #defined, to avoid duplicate functions definitions when binary * components are used. Such functions do need a prototype in all cases, * though. - * - * If we explicitly check for != 0 this generates a fair number of instructions. - * Simply leaving the GIE bit where it lives and using 0 or not 0 to determine - * whether to reenable interrupts generates much tighter code. - * - * Given how often atomic is used, this is a good thing. */ __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { @@ -498,8 +492,7 @@ __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { return result; } -void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe() -{ +void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe() { asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ if( reenable_interrupts ) eint(); From 6b2d0f9fc1c23db8188fa2beffc2d88e373f5827 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 27 Mar 2011 18:59:29 -0700 Subject: [PATCH 046/411] msp430: bring in apps/bootstrap/SerialDirect, test program also bring in serlook.py and hexdump.py (support/sdk/python/misc) --- apps/bootstrap/msp430/SerialDirect/Makefile | 2 + apps/bootstrap/msp430/SerialDirect/README.txt | 11 ++ .../msp430/SerialDirect/SerialDirectC.nc | 9 ++ .../msp430/SerialDirect/SerialDirectP.nc | 58 +++++++++ support/sdk/python/misc/hexdump.py | 58 +++++++++ support/sdk/python/misc/serlook.py | 117 ++++++++++++++++++ 6 files changed, 255 insertions(+) create mode 100644 apps/bootstrap/msp430/SerialDirect/Makefile create mode 100644 apps/bootstrap/msp430/SerialDirect/README.txt create mode 100644 apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc create mode 100644 apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc create mode 100755 support/sdk/python/misc/hexdump.py create mode 100755 support/sdk/python/misc/serlook.py diff --git a/apps/bootstrap/msp430/SerialDirect/Makefile b/apps/bootstrap/msp430/SerialDirect/Makefile new file mode 100644 index 0000000000..a2ac8cd360 --- /dev/null +++ b/apps/bootstrap/msp430/SerialDirect/Makefile @@ -0,0 +1,2 @@ +COMPONENT=SerialDirectC +include $(MAKERULES) diff --git a/apps/bootstrap/msp430/SerialDirect/README.txt b/apps/bootstrap/msp430/SerialDirect/README.txt new file mode 100644 index 0000000000..337acb9ceb --- /dev/null +++ b/apps/bootstrap/msp430/SerialDirect/README.txt @@ -0,0 +1,11 @@ +README for SerialDirect +Author/Contact: Eric B. Decker + +Description: + +Simple test program using low level Hpl interface to msp430 x2 +serial port. Sends the sequence 00 through ff and repeats. +Used for platform bringup. + +See support/sdk/python/misc/serlook.py for a python program that +displays anything from the serial port. diff --git a/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc b/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc new file mode 100644 index 0000000000..6d353d507f --- /dev/null +++ b/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc @@ -0,0 +1,9 @@ +configuration SerialDirectC {} +implementation { + components SerialDirectP as App, MainC; + App.Boot -> MainC.Boot; + + components HplMsp430UsciA0C as Usci; + App.Port -> Usci; + App.PortInt -> Usci; +} diff --git a/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc b/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc new file mode 100644 index 0000000000..284dace9da --- /dev/null +++ b/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc @@ -0,0 +1,58 @@ +/** + * @author Eric B. Decker + * @date Mar 6 2010 + **/ + +#include "hardware.h" +#include "msp430usci.h" + +const msp430_uart_union_config_t uart_config = { { + ubr: UBR_8MIHZ_4800, + umctl: UMCTL_8MIHZ_4800, + ucmode: 0, // uart + ucspb: 0, // one stop + uc7bit: 0, // 8 bit + ucpar: 0, // odd parity (but no parity) + ucpen: 0, // parity disabled + ucrxeie: 0, // err int off + ucssel: 2, // smclk + utxe: 1, // enable tx + urxe: 1, // enable rx +} }; + +uint16_t rx_ints, tx_ints; +volatile uint16_t start = 1; + +module SerialDirectP { + uses { + interface HplMsp430UsciA as Port; + interface HplMsp430UsciInterrupts as PortInt; + interface Boot; + } +} +implementation { + event void Boot.booted() { + uint8_t b; + + while (!start) + nop(); + call Port.setModeUart((msp430_uart_union_config_t *) &uart_config); + b = 0; + call Port.tx(b++); + while(1) { + if (call Port.isTxIntrPending()) + call Port.tx(b++); + } + } + + async event void PortInt.txDone() { + tx_ints++; + } + + async event void PortInt.rxDone(uint8_t data) { + uint8_t tmp; + + rx_ints++; + tmp = call Port.rx(); + } +} diff --git a/support/sdk/python/misc/hexdump.py b/support/sdk/python/misc/hexdump.py new file mode 100755 index 0000000000..ad4d55577b --- /dev/null +++ b/support/sdk/python/misc/hexdump.py @@ -0,0 +1,58 @@ +#!/usr/bin/env python3 + +def b2str(byts): + ''' b2str: bytes to string + convert a sequence of bytes to its equivilent string. Straight across + conversion. + ''' + + assert type(byts)==bytes, 'b2str: byts parmeter is of wrong type' + s = ''.join([chr(x) for x in byts]) + return s + + +def b2str_dots(byts): + ''' b2str: bytes to string + convert a sequence of bytes to its equivilent string. non-ascii chars are + simply set to '.'. This avoids decoding exceptions from unicode. + ''' + + assert type(byts)==bytes, 'b2str: byts parmeter is of wrong type' + s = ''.join([((((x < 32) or (x > 0x7e)) and '.') or chr(x)) for x in byts]) + return s + + +def hd(byts, length=16): + ''' hd: hexdump + dump in hex with pretty formating the hex value and ascii value (if any) + for a block of bytes [assumed to be a tuple] + + byts: incoming bytes + length: how many bytes to display on each line. + ''' + + assert type(byts)==bytes, 'hd: byts parmeter is of wrong type' + n=0; result='' + while byts: + b_work, byts = byts[:length], byts[length:] + hexa = ' '.join(["%02X"%x for x in b_work]) + asc = ''.join([((((x < 32) or (x > 0x7e)) and '.') or chr(x)) for x in b_work]) + result += "%04X %-*s %s\n" % (n, length*3, hexa, asc) + n += length + return result + +#def main(): +# s=("This 10 line function is just a sample of python's power " +# "for string manipulations.\n" +# "The code is \x07even\x08 quite readable!") +# print(hd(s.encode())) +# +# s=bytes.fromhex('0001020304057e7f 353637384042 80999d9e9fa0a1aeaf ded0dfc0cfe0f0ff') +# print(hd(s)) +# +# print(b2str(s)) +# print(b2str_dots(s)) +# +#if __name__ == '__main__': +# main() +# diff --git a/support/sdk/python/misc/serlook.py b/support/sdk/python/misc/serlook.py new file mode 100755 index 0000000000..911d67245c --- /dev/null +++ b/support/sdk/python/misc/serlook.py @@ -0,0 +1,117 @@ +#!/usr/bin/env python3 + +import pdb +import sys +import serial +import time +from hexdump import hd +#from threading import Thread + +class channel(): + global b + def __init__(self, port='/dev/ttyUSB1', baud=115200): + print("Opening channel: {}, baud: {}".format(port, baud)) +# self.serial = serial.Serial(port, baud) + self.serial = serial.serial_for_url(port, baud) + self.pktnum=0 + self.zeroTime() + self.serial.flushInput() + self.timeout = 10/int(baud)*2 + + def zeroTime(self): + self.zeroTime = time.time() + self.recvTime = self.zeroTime; + print('\nzeroTime: {:f}'.format(self.zeroTime)) + + def flush(self): + self.serial.flushInput() + + def get_packet(self): + b = b'' + cnt = 0 + self.recvTime = time.time() + num = self.serial.inWaiting() + if num > 0: + b = self.serial.read(num) + cnt = num +# print("started with {} bytes".format(cnt)) + else: + self.serial.timeout = None; + b = self.serial.read(1) + self.recvTime = time.time() + cnt = 1 + + self.serial.timeout = self.timeout + while True: + n = self.serial.read(63) +# print("read {} bytes".format(len(n))) + if n: + b = b + n + cnt += len(n) + if cnt < 64: + continue + break + + self.pktnum += 1 + return self.pktnum, self.recvTime, b + + def dump_packet(self, num, time, p): + print('\npkt {:2d}: ({:2d}) {:f}'.format(num, len(p), time-self.zeroTime)) + print(hd(p), end="") + + def write(self, buf): + self.serial.write(buf) + +#def send_em(c): +# n = 1 +# print("send_em start up") +# print("sending pkt {}".format(n)) +# b = bytes.fromhex('00010203040506070809') +# c.write(chr(n).encode()) +# time.sleep(.0001) +# c.write(bytes.fromhex('999897')) +# time.sleep(.0001) +# c.write(b) +# time.sleep(2) +# +# n += 1 +# print("sending pkt {}".format(n)) +# c.write(chr(n).encode()) +# c.write(b) +# time.sleep(.0001) +# n += 1 +# print("sending pkt {}".format(n)) +# c.write(chr(n).encode()) +# c.write(b) +# time.sleep(.0001) +# n += 1 +# print("sending pkt {}".format(n)) +# c.write(chr(n).encode()) +# c.write(b) +# time.sleep(.0001) +# n += 1 +# print("sending pkt {}".format(n)) +# c.write(chr(n).encode()) +# c.write(b) + +#chnl = channel('loop://', 115200) +#t = Thread(target=send_em, args=(chnl,)) +#t.start() + +''' Usage: serlook.py [serial port [baud]] + + if 1 parameter (no parameters), default to /dev/ttyUSB1 115200 + if 2 parameters (1 parameter), is supplied, default to 115200 + if >2, both port and baud supplied. +''' + +if len(sys.argv) == 1: + chnl = channel() +elif len(sys.argv) == 2: + chnl = channel(sys.argv[1]) +else: + chnl = channel(sys.argv[1], sys.argv[2]) + +while True: + pn, t, p = chnl.get_packet() + chnl.dump_packet(pn, t, p) From 9b89305d2763085a63575574464916f06d42046b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 27 Mar 2011 19:12:19 -0700 Subject: [PATCH 047/411] msp430: mv gdb files from gdb1xxx -> gdbx1. update gitignore to reflect --- .gitignore | 5 +++++ tos/chips/msp430/99_gdb/{gdb1xxx => gdbx1} | 0 tos/chips/msp430/99_gdb/{gdb2xxx => gdbx2} | 0 tos/chips/msp430/99_gdb/{gdb5xxx => gdbx5} | 0 4 files changed, 5 insertions(+) rename tos/chips/msp430/99_gdb/{gdb1xxx => gdbx1} (100%) rename tos/chips/msp430/99_gdb/{gdb2xxx => gdbx2} (100%) rename tos/chips/msp430/99_gdb/{gdb5xxx => gdbx5} (100%) diff --git a/.gitignore b/.gitignore index d116687ac1..9341fb79d3 100644 --- a/.gitignore +++ b/.gitignore @@ -1,5 +1,10 @@ *.[oa] *~ +*.pyc build #*# .#* +.gdbinit +.gdbx1 +.gdbx2 +.gdbx5 diff --git a/tos/chips/msp430/99_gdb/gdb1xxx b/tos/chips/msp430/99_gdb/gdbx1 similarity index 100% rename from tos/chips/msp430/99_gdb/gdb1xxx rename to tos/chips/msp430/99_gdb/gdbx1 diff --git a/tos/chips/msp430/99_gdb/gdb2xxx b/tos/chips/msp430/99_gdb/gdbx2 similarity index 100% rename from tos/chips/msp430/99_gdb/gdb2xxx rename to tos/chips/msp430/99_gdb/gdbx2 diff --git a/tos/chips/msp430/99_gdb/gdb5xxx b/tos/chips/msp430/99_gdb/gdbx5 similarity index 100% rename from tos/chips/msp430/99_gdb/gdb5xxx rename to tos/chips/msp430/99_gdb/gdbx5 From f1b7edda6312ecee492990b04668d22c6b956048 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 28 Mar 2011 09:59:22 -0700 Subject: [PATCH 048/411] msp430: Consolidate clock_bcs/Msp430ClockP x1 and x2 driver. Make clock_bcs handle both x1 and x2 processors. Make Z1 use clock_bcs driver. --- 01_Merge_Notes | 4 + tos/chips/msp430/clock_bcs/Msp430ClockP.nc | 163 ++++++++++++++---- tos/chips/msp430/x1xxx/Msp430DcoSpec.h | 1 + tos/chips/msp430/x2xxx/Msp430DcoSpec.h | 1 + tos/platforms/z1/.platform | 1 - .../z1/chips/msp430/timer/Msp430ClockC.nc | 50 ------ .../{Msp430ClockP.nc => Msp430ClockP_TLV.nc} | 0 7 files changed, 134 insertions(+), 86 deletions(-) delete mode 100644 tos/platforms/z1/chips/msp430/timer/Msp430ClockC.nc rename tos/platforms/z1/chips/msp430/timer/{Msp430ClockP.nc => Msp430ClockP_TLV.nc} (100%) diff --git a/01_Merge_Notes b/01_Merge_Notes index 520a575d41..d6594e5d13 100644 --- a/01_Merge_Notes +++ b/01_Merge_Notes @@ -48,3 +48,7 @@ but the msp430 branch brought those things back in. See the following commit f * TinyOS timing is based on powers of 2. The Z1 used the calibration constants provided by TI but these constants give timing that are base 10. This has been changed in the merge. + +* removed tos/platforms/z1/chips/msp430/timers from z1/.platform. Let Z1 use the clock_bcs + driver. This also disables use of Z1 version of Msp430TimerCapComP (uses scs, syncronous for + capturing). z1/Msp430ClockP renamed to z1/Msp430ClockP_TLV. diff --git a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc index 7603ed6091..1a3a855ec5 100644 --- a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc +++ b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc @@ -34,9 +34,51 @@ * * @author Cory Sharp * @author Vlado Handziski + * @author Xavier Orduna * @author Eric B. Decker */ + +/*************************************************************************** + * + * Perform basic initilization of the clock subsystem on a msp430 (x1, 1611, + * basic_clock) or msp430X (x2, 26xx, basic_clock+, bc2). The clock systems + * on the x1 and x2 devices are similar enough to be supported by the same + * driver. x5 devices use a different system, the Unified Clock System. + * + * FREQ by default is 4MiHz for x1 procs and 8MiHz for x2 procs. Actual + * clock frequency is determined by Msp430DcoSpec.h. + * + * ACLK (Aux Clk) is assumed to be run off the LFXT interface (low-freq) at + * 32KiHz (32768). This clock is used to calibrate the main DCO clock and + * serves as the timer source to run s/w timers when sleeping. + * + * MCLK (Main Clk) is run off the DCO (default FREQ) and is calibrated to + * a 32KiHz (32768) crystal (ACLK). DCO/1. + * + * SMCLK (sub-main clock) is run directly off the DCO (FREQ). DCO/1. All + * peripherals are run off the SMCLK. For example, the SPI on UsciB is + * clocked from SMCLK so to get the maximum speed we want SMCLK to be DCO/1. + * + * TimerA is programmed to for 1uis ticks and is SMCLK/4 or SMCLK/8. /8 is + * the highest divisor available on an x1 or x2 proc. If MCLK is cranked + * faster than 8 MiHz either SMCLK can become DCO/2 (which slows the + * peripherals down) or the timer subsystem is changed to deal with a 500ns + * tick. + * + * XT2 isn't used for an external oscillator because it is expensive. Power + * wise and it has been measured to take roughly 5ms to power up and stabilize. + * You don't want to be doing that if one is putting the cpu to sleep a bunch. + */ + +/* + * Msp430DcoSpec provides cpu/platform data about clock speed. + * + * TARGET_DCO_HZ: DCO frequency + * ACLK_HZ: Auxilary clock frequency + * DIV_UIS: DCO divisor for main clock to yield 1uis ticks. + */ + #include "Msp430DcoSpec.h" #include "Msp430Timer.h" @@ -56,6 +98,25 @@ #error "Msp430ClockP (bcs): processor doesn't support BASIC_CLOCK/BC2" #endif +#ifndef DIV_UIS +/* + * if DIV_UIS is not defined then assume we are running an x1 (1611) at + * 4 MiHz and the DIV_UIS divisor is 4 to yield 1uis ticks. + */ +#warning "ClockP: assuming 4MiHz and /4 divisor" +#define DIV_UIS 4 +#endif + +#if DIV_UIS == 4 +/* divisor 4, 4MiHz/4 = 1uis ticks. */ +#define UIS_DIV ID_2 +#elif DIV_UIS == 8 +/* divisor 8, 8MiHz/8 = 1uis ticks. */ +#define UIS_DIV ID_3 +#else +#error "ClockP: unknown DIV_UIS defined. Need valid DIV_UIS to proceed." +#endif + module Msp430ClockP @safe() { provides { interface Init; @@ -71,6 +132,14 @@ implementation { MSP430REG_NORACE(TBCTL); MSP430REG_NORACE(TBIV); + /* + * TI provides DCO calibration information assuming decimal Hz. This is reflected + * in the baud rate tables for the UART speeds as well as the DCO clock values. + * The x5 series documentation provides both binary and decimal values. + * + * TinyOS defines its clocking using binary values. TEP 102 plus it make sense + * (synchronizing with the 32768 Hz crystal) + */ enum { ACLK_CALIB_PERIOD = 8, TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD, @@ -83,27 +152,41 @@ implementation { command void Msp430ClockInit.defaultSetupDcoCalibrate() { TACTL = TASSEL_2 | MC_2; // SMCLK/1, continuous mode, all else 0 TBCTL = TBSSEL_1 | MC_2; // ACLK/1, continuous - BCSCTL1 = XT2OFF | RSEL_MAX; + + /* + * x1 chips have an extra bit XT5V (same as RSEL3) in BCSCTL1 which is + * required to be 0'd. Given that the x1 RSEL_MAX is RSEL2 this isn't + * a problem. + * + * calibrate changes just RSEL in BCSCTL1. Other bits get set here. + */ + BCSCTL1 = XT2OFF | RSEL_MAX; // set highest RSEL bit to start BCSCTL2 = 0; - TBCCTL0 = CM0; + TBCCTL0 = CM_1; // CM = 1, rising edge + + /* + * leave BCSCTL3 alone, resets to 0x05, + * XCAP 01, 6pF, LFXT1OF (XT1 osc fault) + */ } command void Msp430ClockInit.defaultInitClocks() { // BCSCTL1 - // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK - // .XTS = 0; set low frequency mode for LXFT1 - // .DIVA = 0; set the divisor on ACLK to 1 - // .XT5V = 0, unused. must be 0 - // .RSEL, do not modify + // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK + // .XTS = 0; set low frequency mode for LXFT1 + // .DIVA = 0; set the divisor on ACLK to 1 + // .RSEL do not modify (3 or 4 bits), XT5V is 0 if present BCSCTL1 = XT2OFF | (BCSCTL1 & RSEL_MASK); // BCSCTL2 - // .SELM = 0; select DCOCLK as source for MCLK - // .DIVM = 0; set the divisor of MCLK to 1 - // .SELS = 0; select DCOCLK as source for SCLK - // .DIVS = 2; set the divisor of SCLK to 4 - // .DCOR = 0; select internal resistor for DCO - BCSCTL2 = DIVS_2; /* div/4 */ + // .SELM = 0; select DCOCLK as source for MCLK + // .DIVM = 0; set the divisor of MCLK to 1 + // .SELS = 0; select DCOCLK as source for SMCLK + // .DIVS = 0; set the divisor of SCLK to 1 + // .DCOR = 0; select internal resistor for DCO + BCSCTL2 = 0; + + // BCSCTL3: use default, on reset set to 4, 6pF. // IE1.OFIE = 0; no interrupt for oscillator fault CLR_FLAG( IE1, OFIE ); @@ -113,25 +196,25 @@ implementation { TAR = 0; // TACTL - // .TASSEL = 2; source SMCLK = DCO/4 - // .ID = 0; input divisor of 1 - // .MC = 0; initially disabled + // .TASSEL = 2; source SMCLK = DCO/1 + // .ID = UIS_DIV; input divisor for 1uis ticks. + // .MC = 0; initially disabled // .TACLR = 0; - // .TAIE = 1; enable timer A interrupts - TACTL = TASSEL_2 | TAIE; + // .TAIE = 1; enable timer A interrupts + TACTL = TASSEL_2 | UIS_DIV | TAIE; } command void Msp430ClockInit.defaultInitTimerB() { TBR = 0; // TBCTL - // .TBCLGRP = 0; each TBCL group latched independently - // .CNTL = 0; 16-bit counter - // .TBSSEL = 1; source ACLK - // .ID = 0; input divisor of 1 - // .MC = 0; initially disabled + // .TBCLGRP = 0; each TBCL group latched independently + // .CNTL = 0; 16-bit counter + // .TBSSEL = 1; source ACLK + // .ID = 0; input divisor of 1 + // .MC = 0; initially disabled // .TBCLR = 0; - // .TBIE = 1; enable timer B interrupts + // .TBIE = 1; enable timer B interrupts TBCTL = TBSSEL_1 | TBIE; } @@ -181,8 +264,8 @@ implementation { * * Controls for the algorithm behaviour are: * - * From tos/chips/msp430/timer/Msp430DcoSpec.h: - * TARGET_DCO_HZ frequency for DCO, 4096 KiHz + * From tos/chips/msp430/xxxxx/Msp430DcoSpec.h (or platform override): + * TARGET_DCO_HZ target dco frequency * ACLK_HZ frequency of ACLK, 32768 Hz * * ACLK_CALIB_PERIOD = 8, how many aclk cycles to use for sample period. @@ -190,12 +273,15 @@ implementation { * calibrated. * * A calib control cell is passed around to control the algorithm. This - * control cell is the concatenation of RSEL (3 bits), DCOx (3 bits), and + * control cell is the concatenation of RSEL (3/4 bits), DCOx (3 bits), and * MODx (5 bits). Top byte contains RSEL, lower byte DCO and MOD. * * The key that drives this algorithm is TARGET_DCO_DELTA. This is the value * we look for in a given ACLK_CALIB_PERIOD. It is computed from * TARGET_DCO_HZ and ACLK_HZ. + * + * DCOCTL is the same for x1 and x2 clock systems. x2 processors have a 4 bit + * RSEL in BCSCTL1. */ void set_dco_calib(uint16_t calib) { @@ -217,8 +303,8 @@ implementation { while (aclk_count-- > 0) { TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt TBCCTL0 &= ~CCIFG; // clear pending interrupt - while((TBCCTL0 & CCIFG) == 0) // busy wait - ; + while((TBCCTL0 & CCIFG) == 0) { // busy wait + } dco_prev = dco_curr; dco_curr = TAR; } @@ -228,9 +314,16 @@ implementation { /* * busyCalibrateDCO * - * Should take about 9ms if ACLK_CALIB_PERIOD 8. - * DCOCTL and BCSCTL1 are calibrated when done. - * (9ms needs to be verified). 1611 and 2618. + * With ACLK_CALIB_PERIOD of 8, takes ~6ms to calibrate. + * This is only dependent on ACLK_CALIB_PERIOD and the clock rate of ACLK + * which is most likely 32768. + * + * Tested for freqs >= 1MHz (1000000). Does not seems to work for low + * frequencies. Probably because the counts aren't big enough. But we + * don't care. 4MHz is good, 8Mhz is good. 16MHz not tested yet. + * + * Returns with DCOCTL and BCSCTL1 set with appropriate values of DCO/MOD + * and RSEL. */ void busyCalibrateDco() { uint16_t calib; @@ -251,15 +344,15 @@ implementation { * if dco is 7 then mod bits remain zero they don't do anything if * dco is 7. stop. */ - if ((calib & 0x0e0) == 0x0e0) + if ((calib & 0xe0) == 0xe0) break; } - set_dco_calib( calib ); + set_dco_calib(calib); } command error_t Init.init() { TACTL = TACLR; /* clear should wack the IVs */ - TBCTL = TBCLR; + TBCTL = TBCLR; /* also IVs are read-only */ atomic { signal Msp430ClockInit.setupDcoCalibrate(); diff --git a/tos/chips/msp430/x1xxx/Msp430DcoSpec.h b/tos/chips/msp430/x1xxx/Msp430DcoSpec.h index b160fc48a4..1153972c71 100644 --- a/tos/chips/msp430/x1xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x1xxx/Msp430DcoSpec.h @@ -59,6 +59,7 @@ */ #define TARGET_DCO_HZ 4194304UL #define ACLK_HZ 32768UL +#define DIV_UIS 4 #ifdef notdef /* deprecating in favor of _HZ which works for all cases */ diff --git a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h index 58ad51795a..0e677af04f 100644 --- a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h @@ -55,6 +55,7 @@ /* 8 MIHZ */ #define TARGET_DCO_HZ 8388608UL #define ACLK_HZ 32768UL +#define DIV_UIS 8 #ifdef notdef #define TARGET_DCO_KHZ 8192 // the target DCO clock rate in binary kHz diff --git a/tos/platforms/z1/.platform b/tos/platforms/z1/.platform index 53b97adc09..df329b32b7 100644 --- a/tos/platforms/z1/.platform +++ b/tos/platforms/z1/.platform @@ -2,7 +2,6 @@ push( @includes, qw( %T/platforms/z1 %T/platforms/z1/chips/msp430/adc12 - %T/platforms/z1/chips/msp430/timer %T/platforms/z1/chips/msp430/usci %T/platforms/z1/chips/adxl345 %T/platforms/z1/chips/cc2420 diff --git a/tos/platforms/z1/chips/msp430/timer/Msp430ClockC.nc b/tos/platforms/z1/chips/msp430/timer/Msp430ClockC.nc deleted file mode 100644 index fd4b49dc69..0000000000 --- a/tos/platforms/z1/chips/msp430/timer/Msp430ClockC.nc +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2011 Eric B. Decker - * Copyright (c) 2000-2003 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - * @author Cory Sharp - * @author Eric B. Decker - */ - -configuration Msp430ClockC { - provides interface Init; - provides interface Msp430ClockInit; -} - -implementation { - components Msp430ClockP, Msp430TimerC, McuSleepC; - - Init = Msp430ClockP; - Msp430ClockInit = Msp430ClockP; - McuSleepC.McuPowerOverride -> Msp430ClockP; -} diff --git a/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc b/tos/platforms/z1/chips/msp430/timer/Msp430ClockP_TLV.nc similarity index 100% rename from tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc rename to tos/platforms/z1/chips/msp430/timer/Msp430ClockP_TLV.nc From 902bc9ae503c1d65a1db00932529f53851a6f87e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 29 Mar 2011 01:00:13 -0700 Subject: [PATCH 049/411] make SerialDirect compile for both x1 and x2 processors. --- apps/bootstrap/msp430/SerialDirect/Makefile | 5 +++ .../msp430/SerialDirect/SerialDirectC.nc | 10 ++++-- .../msp430/SerialDirect/SerialDirectP.nc | 35 +++++++++++++++++++ 3 files changed, 47 insertions(+), 3 deletions(-) diff --git a/apps/bootstrap/msp430/SerialDirect/Makefile b/apps/bootstrap/msp430/SerialDirect/Makefile index a2ac8cd360..c5f8590cc6 100644 --- a/apps/bootstrap/msp430/SerialDirect/Makefile +++ b/apps/bootstrap/msp430/SerialDirect/Makefile @@ -1,2 +1,7 @@ COMPONENT=SerialDirectC +# +# if building for a x1 cpu define USE_X1. +# otherwise we are assuming we are building for an x2 cpu. +# +#PFLAGS+=-DUSE_X1 include $(MAKERULES) diff --git a/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc b/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc index 6d353d507f..5e0c0cdd1a 100644 --- a/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc +++ b/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc @@ -3,7 +3,11 @@ implementation { components SerialDirectP as App, MainC; App.Boot -> MainC.Boot; - components HplMsp430UsciA0C as Usci; - App.Port -> Usci; - App.PortInt -> Usci; +#ifdef USE_X1 + components HplMsp430Usart0C as Port; +#else + components HplMsp430UsciA0C as Port; +#endif + App.Port -> Port; + App.PortInt -> Port; } diff --git a/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc b/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc index 284dace9da..138c28d527 100644 --- a/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc +++ b/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc @@ -1,11 +1,40 @@ /** * @author Eric B. Decker * @date Mar 6 2010 + * + * Define USE_X1 if using an x1 family chip, 4 MiHz USART based msp430 + * else assumed x2 8 MiHz 2000 series part. + * + * ie. make debugopt -DUSE_X1 telosb **/ #include "hardware.h" + +#ifdef USE_X1 +#include "msp430usart.h" +#else #include "msp430usci.h" +#endif +#ifdef USE_X1 +const msp430_uart_union_config_t uart_config = { { + ubr : UBR_4MIHZ_4800, + umctl : UMCTL_4MIHZ_4800, + ssel : 2, + pena : 0, + pev : 0, + spb : 0, + clen : 1, + listen : 0, + mm : 0, + ckpl : 0, + urxse : 0, + urxeie : 1, + urxwie : 0, + utxe : 1, + urxe : 1 + } }; +#else const msp430_uart_union_config_t uart_config = { { ubr: UBR_8MIHZ_4800, umctl: UMCTL_8MIHZ_4800, @@ -19,14 +48,20 @@ const msp430_uart_union_config_t uart_config = { { utxe: 1, // enable tx urxe: 1, // enable rx } }; +#endif uint16_t rx_ints, tx_ints; volatile uint16_t start = 1; module SerialDirectP { uses { +#ifdef USE_X1 + interface HplMsp430Usart as Port; + interface HplMsp430UsartInterrupts as PortInt; +#else interface HplMsp430UsciA as Port; interface HplMsp430UsciInterrupts as PortInt; +#endif interface Boot; } } From cef79556c41eb8f6fcedb5b4c57f8bfd3256c3ef Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 30 Mar 2011 04:29:40 -0700 Subject: [PATCH 050/411] msp430: pull out reset code from setUbr. Due to extra paranoia thought it was necessary to force a reset of the Usci h/w when changing the BR divisor. Experimentation with the h/w has shown this is not the case. So remove extraneous code. --- .../msp430/x2xxx/usci/HplMsp430UsciA0P.nc | 22 ++----------------- .../msp430/x2xxx/usci/HplMsp430UsciA1P.nc | 22 ++----------------- .../msp430/x2xxx/usci/HplMsp430UsciB0P.nc | 22 ++----------------- .../msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 22 ++----------------- 4 files changed, 8 insertions(+), 80 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc index eddfac994e..63c9100dcb 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc @@ -108,35 +108,17 @@ implementation { /* * setUbr: change the Baud Rate divisor * - * Modify the baud rate divisor for the usci. For this to - * take effect the module has to be reset. And resetting - * has the effect of bringing TXIFG up. We duplicate the - * behaviour of setModeUart or setModeSpi which would be - * used if setUbr wasn't available. Following the - * config modification any interrupts are cleared out. - * * The BR registers are 2 bytes and accessed as two byte references. * We want it to be atomic. On the x2xxx part can UBR be referenced - * as a single atomic word? (This is how it is done on the x5xxx). + * as a single atomic word? NO. (This is how it is done on the x5xxx). * For now we do it atomically and using two byte references (because * of the address space and according to TI documentation). - * - * WARNING: TXIFG is forced clear after a baud rate change - * similar to what setMode causes. */ async command void Usci.setUbr(uint16_t control) { atomic { - if (UCA0CTL1 & UCSWRST) { /* if already reset, set and bail */ - UCA0BR0 = control & 0x00FF; - UCA0BR1 = (control >> 8) & 0x00FF; - return; - } - call Usci.resetUsci_n(); /* not reset, 1st reset */ - UCA0BR0 = control & 0x00FF; /* then set. */ + UCA0BR0 = control & 0x00FF; UCA0BR1 = (control >> 8) & 0x00FF; - call Usci.unresetUsci_n(); - call Usci.clrIntr(); } } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc index 5db1c4ce75..6b379071c0 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc @@ -108,35 +108,17 @@ implementation { /* * setUbr: change the Baud Rate divisor * - * Modify the baud rate divisor for the usci. For this to - * take effect the module has to be reset. And resetting - * has the effect of bringing TXIFG up. We duplicate the - * behaviour of setModeUart or setModeSpi which would be - * used if setUbr wasn't available. Following the - * config modification any interrupts are cleared out. - * * The BR registers are 2 bytes and accessed as two byte references. * We want it to be atomic. On the x2xxx part can UBR be referenced - * as a single atomic word? (This is how it is done on the x5xxx). + * as a single atomic word? NO. (This is how it is done on the x5xxx). * For now we do it atomically and using two byte references (because * of the address space and according to TI documentation). - * - * WARNING: TXIFG is forced clear after a baud rate change - * similar to what setMode causes. */ async command void Usci.setUbr(uint16_t control) { atomic { - if (UCA1CTL1 & UCSWRST) { /* if already reset, set and bail */ - UCA1BR0 = control & 0x00FF; - UCA1BR1 = (control >> 8) & 0x00FF; - return; - } - call Usci.resetUsci_n(); /* not reset, 1st reset */ - UCA1BR0 = control & 0x00FF; /* then set. */ + UCA1BR0 = control & 0x00FF; UCA1BR1 = (control >> 8) & 0x00FF; - call Usci.unresetUsci_n(); - call Usci.clrIntr(); } } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc index d4451d361d..e797526c9d 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc @@ -112,35 +112,17 @@ implementation { /* * setUbr: change the Baud Rate divisor * - * Modify the baud rate divisor for the usci. For this to - * take effect the module has to be reset. And resetting - * has the effect of bringing TXIFG up. We duplicate the - * behaviour of setModeUart or setModeSpi which would be - * used if setUbr wasn't available. Following the - * config modification any interrupts are cleared out. - * * The BR registers are 2 bytes and accessed as two byte references. * We want it to be atomic. On the x2xxx part can UBR be referenced - * as a single atomic word? (This is how it is done on the x5xxx). + * as a single atomic word? NO. (This is how it is done on the x5xxx). * For now we do it atomically and using two byte references (because * of the address space and according to TI documentation). - * - * WARNING: TXIFG is forced clear after a baud rate change - * similar to what setMode causes. */ async command void Usci.setUbr(uint16_t control) { atomic { - if (UCB0CTL1 & UCSWRST) { /* if already reset, set and bail */ - UCB0BR0 = control & 0x00FF; - UCB0BR1 = (control >> 8) & 0x00FF; - return; - } - call Usci.resetUsci_n(); /* not reset, 1st reset */ - UCB0BR0 = control & 0x00FF; /* then set. */ + UCB0BR0 = control & 0x00FF; UCB0BR1 = (control >> 8) & 0x00FF; - call Usci.unresetUsci_n(); - call Usci.clrIntr(); } } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index 9f1db9d6b7..bf99a0564c 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -112,35 +112,17 @@ implementation { /* * setUbr: change the Baud Rate divisor * - * Modify the baud rate divisor for the usci. For this to - * take effect the module has to be reset. And resetting - * has the effect of bringing TXIFG up. We duplicate the - * behaviour of setModeUart or setModeSpi which would be - * used if setUbr wasn't available. Following the - * config modification any interrupts are cleared out. - * * The BR registers are 2 bytes and accessed as two byte references. * We want it to be atomic. On the x2xxx part can UBR be referenced - * as a single atomic word? (This is how it is done on the x5xxx). + * as a single atomic word? NO. (This is how it is done on the x5xxx). * For now we do it atomically and using two byte references (because * of the address space and according to TI documentation). - * - * WARNING: TXIFG is forced clear after a baud rate change - * similar to what setMode causes. */ async command void Usci.setUbr(uint16_t control) { atomic { - if (UCB1CTL1 & UCSWRST) { /* if already reset, set and bail */ - UCB1BR0 = control & 0x00FF; - UCB1BR1 = (control >> 8) & 0x00FF; - return; - } - call Usci.resetUsci_n(); /* not reset, 1st reset */ - UCB1BR0 = control & 0x00FF; /* then set. */ + UCB1BR0 = control & 0x00FF; UCB1BR1 = (control >> 8) & 0x00FF; - call Usci.unresetUsci_n(); - call Usci.clrIntr(); } } From b1f1ba4196bb7e5faefc5f2c7ea9a0459f409099 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 30 Mar 2011 07:04:28 -0700 Subject: [PATCH 051/411] msp430: rename usci ports, ie. mv UART0 -> UARTA0, etc. Motivation: The original MSP430 port defined i/o ports for the USART as UART0 -> USART0, UART1 -> USART1, SPI0 -> USART0, etc. The x2 and x5 processors have many more ports than the simple USART implementation. Further, it is a platform specific prerogative to determine what ports are called what and how they are wired. The original x2 USCI port followed the precedent established by the x1 USART naming. But after examining the x5 implementation it became clear that was a mistake. Rather a simple naming that ties the function to the actual h/w is superior. --- apps/tests/z1/SimpleADXL/ADXL345C.nc | 2 +- tos/chips/adxl345/ADXL345C.nc | 3 +- .../usci/{Msp430I2C0C.nc => Msp430I2CB0C.nc} | 4 +- .../usci/{Msp430I2C0P.nc => Msp430I2CB0P.nc} | 2 +- .../usci/{Msp430I2C1C.nc => Msp430I2CB1C.nc} | 4 +- .../usci/{Msp430I2C1P.nc => Msp430I2CB1P.nc} | 2 +- .../usci/{Msp430Spi2C.nc => Msp430SpiA0C.nc} | 20 +++-- .../{Msp430Spi2DmaP.nc => Msp430SpiA0DmaP.nc} | 4 +- ...p430Spi2NoDmaP.nc => Msp430SpiA0NoDmaP.nc} | 2 +- .../usci/{Msp430Spi3C.nc => Msp430SpiA1C.nc} | 20 +++-- .../{Msp430Spi3DmaP.nc => Msp430SpiA1DmaP.nc} | 4 +- ...p430Spi3NoDmaP.nc => Msp430SpiA1NoDmaP.nc} | 2 +- .../usci/{Msp430Spi0C.nc => Msp430SpiB0C.nc} | 20 +++-- .../{Msp430Spi0DmaP.nc => Msp430SpiB0DmaP.nc} | 4 +- ...p430Spi0NoDmaP.nc => Msp430SpiB0NoDmaP.nc} | 2 +- .../usci/{Msp430Spi1C.nc => Msp430SpiB1C.nc} | 10 +-- ...p430Spi1NoDmaP.nc => Msp430SpiB1NoDmaP.nc} | 2 +- .../{Msp430Uart0C.nc => Msp430UartA0C.nc} | 6 +- .../{Msp430Uart0P.nc => Msp430UartA0P.nc} | 2 +- .../{Msp430Uart1C.nc => Msp430UartA1C.nc} | 6 +- .../{Msp430Uart1P.nc => Msp430UartA1P.nc} | 2 +- tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc | 2 +- tos/chips/msp430/x2xxx/usci/msp430usci.h | 79 +++++++++++-------- tos/chips/tmp102/SimpleTMP102C.nc | 3 +- tos/platforms/z1/PlatformSerialC.nc | 2 +- .../z1/chips/cc2420/HplCC2420SpiC.nc | 2 +- .../z1/chips/msp430/usci/Msp430I2C1P.nc | 2 +- .../z1/chips/tmp102/TMP102InternalC.nc | 2 +- 31 files changed, 114 insertions(+), 107 deletions(-) rename tos/chips/msp430/x2xxx/usci/{Msp430I2C0C.nc => Msp430I2CB0C.nc} (96%) rename tos/chips/msp430/x2xxx/usci/{Msp430I2C0P.nc => Msp430I2CB0P.nc} (98%) rename tos/chips/msp430/x2xxx/usci/{Msp430I2C1C.nc => Msp430I2CB1C.nc} (96%) rename tos/chips/msp430/x2xxx/usci/{Msp430I2C1P.nc => Msp430I2CB1P.nc} (98%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi2C.nc => Msp430SpiA0C.nc} (84%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi2DmaP.nc => Msp430SpiA0DmaP.nc} (97%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi2NoDmaP.nc => Msp430SpiA0NoDmaP.nc} (98%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi3C.nc => Msp430SpiA1C.nc} (84%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi3DmaP.nc => Msp430SpiA1DmaP.nc} (97%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi3NoDmaP.nc => Msp430SpiA1NoDmaP.nc} (98%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi0C.nc => Msp430SpiB0C.nc} (84%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi0DmaP.nc => Msp430SpiB0DmaP.nc} (97%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi0NoDmaP.nc => Msp430SpiB0NoDmaP.nc} (98%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi1C.nc => Msp430SpiB1C.nc} (94%) rename tos/chips/msp430/x2xxx/usci/{Msp430Spi1NoDmaP.nc => Msp430SpiB1NoDmaP.nc} (98%) rename tos/chips/msp430/x2xxx/usci/{Msp430Uart0C.nc => Msp430UartA0C.nc} (95%) rename tos/chips/msp430/x2xxx/usci/{Msp430Uart0P.nc => Msp430UartA0P.nc} (98%) rename tos/chips/msp430/x2xxx/usci/{Msp430Uart1C.nc => Msp430UartA1C.nc} (95%) rename tos/chips/msp430/x2xxx/usci/{Msp430Uart1P.nc => Msp430UartA1P.nc} (98%) diff --git a/apps/tests/z1/SimpleADXL/ADXL345C.nc b/apps/tests/z1/SimpleADXL/ADXL345C.nc index 9cf569d19c..59406068b5 100644 --- a/apps/tests/z1/SimpleADXL/ADXL345C.nc +++ b/apps/tests/z1/SimpleADXL/ADXL345C.nc @@ -17,7 +17,7 @@ implementation { components LedsC; ADXL345P.Leds -> LedsC; - components new Msp430I2C1C() as I2C; + components new Msp430I2CB1C() as I2C; ADXL345P.Resource -> I2C; ADXL345P.ResourceRequested -> I2C; ADXL345P.I2CBasicAddr -> I2C; diff --git a/tos/chips/adxl345/ADXL345C.nc b/tos/chips/adxl345/ADXL345C.nc index 50d3f7b690..71c4c7565f 100644 --- a/tos/chips/adxl345/ADXL345C.nc +++ b/tos/chips/adxl345/ADXL345C.nc @@ -21,7 +21,8 @@ implementation { ADXL345Control = ADXL345P; Register = ADXL345P.Register; - components new Msp430I2C1C() as I2C; +#warning ADXL345: using generic wiring (usciB1). Should wire actual device in platform wiring. + components new Msp430I2CB1C() as I2C; ADXL345P.Resource -> I2C; ADXL345P.ResourceRequested -> I2C; ADXL345P.I2CBasicAddr -> I2C; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2C0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc similarity index 96% rename from tos/chips/msp430/x2xxx/usci/Msp430I2C0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc index 32b5a37c13..9284045d54 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2C0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc @@ -43,7 +43,7 @@ #include #include "msp430usci.h" -generic configuration Msp430I2C0C() { +generic configuration Msp430I2CB0C() { provides { interface Resource; interface ResourceRequested; @@ -54,7 +54,7 @@ generic configuration Msp430I2C0C() { implementation { enum { - CLIENT_ID = unique(MSP430_I2C0_BUS), + CLIENT_ID = unique(MSP430_I2CB0_BUS), }; components Msp430I2C0P as I2CP; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2C0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CB0P.nc similarity index 98% rename from tos/chips/msp430/x2xxx/usci/Msp430I2C0P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2CB0P.nc index d3e03c0310..74ff23375a 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2C0P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CB0P.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -configuration Msp430I2C0P { +configuration Msp430I2CB0P { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2C1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc similarity index 96% rename from tos/chips/msp430/x2xxx/usci/Msp430I2C1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc index 52dd0c6391..713ee4febb 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2C1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc @@ -43,7 +43,7 @@ #include #include "msp430usci.h" -generic configuration Msp430I2C1C() { +generic configuration Msp430I2CB1C() { provides { interface Resource; interface ResourceRequested; @@ -54,7 +54,7 @@ generic configuration Msp430I2C1C() { implementation { enum { - CLIENT_ID = unique(MSP430_I2C1_BUS), + CLIENT_ID = unique(MSP430_I2CB1_BUS), }; components Msp430I2C1P as I2CP; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2C1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CB1P.nc similarity index 98% rename from tos/chips/msp430/x2xxx/usci/Msp430I2C1P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430I2CB1P.nc index 098a7ff723..ca8dbd50a5 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2C1P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CB1P.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -configuration Msp430I2C1P { +configuration Msp430I2CB1P { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi2C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0C.nc similarity index 84% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi2C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiA0C.nc index 01769debfa..e054339f97 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi2C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0C.nc @@ -35,12 +35,10 @@ */ /* - * SPI2: SPI/USCI_A0. Defaults to no DMA, sw SPI implementation. - * To utilize the DMA, via Msp430Spi2DMAP define ENABLE_SPI2_DMA. + * SpiA0: SPI/USCI_A0. Defaults to no DMA, sw SPI implementation. + * To utilize the DMA, via Msp430SpiA0DMAP define ENABLE_SPIA0_DMA. * - * See msp430usci.h for port mappings. - * - * @author Jonathan Hui + * @author Jonathan Hui * @author Mark Hays * @author Xavier Orduna * @author Eric B. Decker @@ -48,7 +46,7 @@ #include "msp430usci.h" -generic configuration Msp430Spi2C() { +generic configuration Msp430SpiA0C() { provides { interface Resource; interface ResourceRequested; @@ -61,14 +59,14 @@ generic configuration Msp430Spi2C() { implementation { enum { - CLIENT_ID = unique(MSP430_SPI2_BUS), + CLIENT_ID = unique(MSP430_SPIA0_BUS), }; -#ifdef ENABLE_SPI2_DMA -#warning "Enabling DMA for SPI2 (usciA0)" - components Msp430Spi2DmaP as SpiP; +#ifdef ENABLE_SPIA0_DMA +#warning "Enabling DMA for SPI (usciA0)" + components Msp430SpiA0DmaP as SpiP; #else - components Msp430Spi2NoDmaP as SpiP; + components Msp430SpiA0NoDmaP as SpiP; #endif Resource = SpiP.Resource[CLIENT_ID]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi2DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc similarity index 97% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi2DmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc index 5a22d3848a..bb18b7da58 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi2DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc @@ -43,7 +43,7 @@ #include "Msp430Dma.h" -configuration Msp430Spi2DmaP { +configuration Msp430SpiA0DmaP { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; @@ -58,7 +58,7 @@ configuration Msp430Spi2DmaP { } implementation { - components new Msp430SpiDmaXP(IFG2_, + components new Msp430SpiDmaP(IFG2_, UCA0TXBUF_, UCA0TXIFG, (uint16_t) DMA_TRIGGER_UCA0TXIFG, diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi2NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0NoDmaP.nc similarity index 98% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi2NoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiA0NoDmaP.nc index 2f5ec4dc7b..5c6caa6d63 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi2NoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0NoDmaP.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -configuration Msp430Spi2NoDmaP { +configuration Msp430SpiA0NoDmaP { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi3C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1C.nc similarity index 84% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi3C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiA1C.nc index 80a1261341..33a72be393 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi3C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1C.nc @@ -35,12 +35,10 @@ */ /* - * SPI3: SPI/USCI_A1. Defaults to no DMA, sw SPI implementation. - * To utilize the DMA, via Msp430Spi3DmaP define ENABLE_SPI3_DMA. + * SpiA1: SPI/USCI_A1. Defaults to no DMA, sw SPI implementation. + * To utilize the DMA, via Msp430SpiA1DmaP define ENABLE_SPIA1_DMA. * - * See msp430usci.h for port mappings. - * - * @author Jonathan Hui + * @author Jonathan Hui * @author Mark Hays * @author Xavier Orduna * @author Eric B. Decker @@ -48,7 +46,7 @@ #include "msp430usci.h" -generic configuration Msp430Spi3C() { +generic configuration Msp430SpiA1C() { provides { interface Resource; interface ResourceRequested; @@ -61,14 +59,14 @@ generic configuration Msp430Spi3C() { implementation { enum { - CLIENT_ID = unique(MSP430_SPI3_BUS), + CLIENT_ID = unique(MSP430_SPIA1_BUS), }; -#ifdef ENABLE_SPI3_DMA -#warning "Enabling DMA for SPI3 (usciA1)" - components Msp430Spi3DmaP as SpiP; +#ifdef ENABLE_SPIA1_DMA +#warning "Enabling DMA for SPI (usciA1)" + components Msp430SpiA1DmaP as SpiP; #else - components Msp430Spi3NoDmaP as SpiP; + components Msp430SpiA1NoDmaP as SpiP; #endif Resource = SpiP.Resource[CLIENT_ID]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi3DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc similarity index 97% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi3DmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc index 9d9b2f10e4..ef38475452 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi3DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc @@ -43,7 +43,7 @@ #include "Msp430Dma.h" -configuration Msp430Spi3DmaP { +configuration Msp430SpiA1DmaP { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; @@ -58,7 +58,7 @@ configuration Msp430Spi3DmaP { } implementation { - components new Msp430SpiDmaXP(UC1IFG_, + components new Msp430SpiDmaP(UC1IFG_, UCA1TXBUF_, UCA1TXIFG, (uint16_t) DMA_TRIGGER_UCA1TXIFG, diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi3NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1NoDmaP.nc similarity index 98% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi3NoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiA1NoDmaP.nc index d7699e8056..e635d4edc8 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi3NoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1NoDmaP.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -configuration Msp430Spi3NoDmaP { +configuration Msp430SpiA1NoDmaP { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc similarity index 84% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc index 36b187178c..5eb812d806 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc @@ -35,12 +35,10 @@ */ /* - * SPI0: SPI/USCI_B0. Defaults to no DMA, sw SPI implementation. - * To utilize the DMA, via Msp430Spi0DmaP define ENABLE_SPI0_DMA. + * SpiB0: SPI/USCI_B0. Defaults to no DMA, sw SPI implementation. + * To utilize the DMA, via Msp430SpiB0DmaP define ENABLE_SPIB0_DMA. * - * See msp430usci.h for port mappings. - * - * @author Jonathan Hui + * @author Jonathan Hui * @author Mark Hays * @author Xavier Orduna * @author Eric B. Decker @@ -48,7 +46,7 @@ #include "msp430usci.h" -generic configuration Msp430Spi0C() { +generic configuration Msp430SpiB0C() { provides { interface Resource; interface ResourceRequested; @@ -61,14 +59,14 @@ generic configuration Msp430Spi0C() { implementation { enum { - CLIENT_ID = unique(MSP430_SPI0_BUS), + CLIENT_ID = unique(MSP430_SPIB0_BUS), }; -#ifdef ENABLE_SPI0_DMA -#warning "Enabling DMA for SPI0 (usciB0)" - components Msp430Spi0DmaP as SpiP; +#ifdef ENABLE_SPIB0_DMA +#warning "Enabling DMA for SPI (usciB0)" + components Msp430SpiB0DmaP as SpiP; #else - components Msp430Spi0NoDmaP as SpiP; + components Msp430SpiB0NoDmaP as SpiP; #endif Resource = SpiP.Resource[CLIENT_ID]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi0DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc similarity index 97% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi0DmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc index 0fce41150d..5b1248de3d 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi0DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc @@ -43,7 +43,7 @@ #include "Msp430Dma.h" -configuration Msp430Spi0DmaP { +configuration Msp430SpiB0DmaP { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; @@ -58,7 +58,7 @@ configuration Msp430Spi0DmaP { } implementation { - components new Msp430SpiDmaXP(IFG2_, + components new Msp430SpiDmaP(IFG2_, UCB0TXBUF_, UCB0TXIFG, (uint16_t) DMA_TRIGGER_UCB0TXIFG, diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi0NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0NoDmaP.nc similarity index 98% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi0NoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiB0NoDmaP.nc index 1eb218ae24..a8766f11a3 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi0NoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0NoDmaP.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -configuration Msp430Spi0NoDmaP { +configuration Msp430SpiB0NoDmaP { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc similarity index 94% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc index 2bf7af3813..2c02597f79 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc @@ -59,7 +59,7 @@ #include "msp430usci.h" -generic configuration Msp430Spi1C() { +generic configuration Msp430SpiB1C() { provides { interface Resource; interface ResourceRequested; @@ -72,14 +72,14 @@ generic configuration Msp430Spi1C() { implementation { enum { - CLIENT_ID = unique(MSP430_SPI1_BUS), + CLIENT_ID = unique(MSP430_SPIB1_BUS), }; -#ifdef ENABLE_SPI1_DMA -#error "DMA is not available for SPI1 (usci B1)" +#ifdef ENABLE_SPIB1_DMA +#error "DMA is not available for SPI (usci B1)" #endif - components Msp430Spi1NoDmaP as SpiP; + components Msp430SpiB1NoDmaP as SpiP; Resource = SpiP.Resource[CLIENT_ID]; SpiByte = SpiP.SpiByte; SpiPacket = SpiP.SpiPacket[CLIENT_ID]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Spi1NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1NoDmaP.nc similarity index 98% rename from tos/chips/msp430/x2xxx/usci/Msp430Spi1NoDmaP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430SpiB1NoDmaP.nc index 282008c8f1..e91f22bcbb 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Spi1NoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1NoDmaP.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -configuration Msp430Spi1NoDmaP { +configuration Msp430SpiB1NoDmaP { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Uart0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartA0C.nc similarity index 95% rename from tos/chips/msp430/x2xxx/usci/Msp430Uart0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UartA0C.nc index a7857cb0ff..6c108242af 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Uart0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartA0C.nc @@ -42,7 +42,7 @@ #include "msp430usci.h" -generic configuration Msp430Uart0C() { +generic configuration Msp430UartA0C() { provides { interface Resource; interface ResourceRequested; @@ -54,10 +54,10 @@ generic configuration Msp430Uart0C() { implementation { enum { - CLIENT_ID = unique( MSP430_UART0_BUS ), + CLIENT_ID = unique( MSP430_UARTA0_BUS ), }; - components Msp430Uart0P as UartP; + components Msp430UartA0P as UartP; Resource = UartP.Resource[ CLIENT_ID ]; UartStream = UartP.UartStream[ CLIENT_ID ]; UartByte = UartP.UartByte[ CLIENT_ID ]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Uart0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartA0P.nc similarity index 98% rename from tos/chips/msp430/x2xxx/usci/Msp430Uart0P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UartA0P.nc index 1ee525af7a..a630901828 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Uart0P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartA0P.nc @@ -39,7 +39,7 @@ * @author Xavier Orduna */ -configuration Msp430Uart0P { +configuration Msp430UartA0P { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Uart1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartA1C.nc similarity index 95% rename from tos/chips/msp430/x2xxx/usci/Msp430Uart1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UartA1C.nc index ea74739780..334283dc2d 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Uart1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartA1C.nc @@ -42,7 +42,7 @@ #include "msp430usci.h" -generic configuration Msp430Uart1C() { +generic configuration Msp430UartA1C() { provides { interface Resource; interface ResourceRequested; @@ -54,10 +54,10 @@ generic configuration Msp430Uart1C() { implementation { enum { - CLIENT_ID = unique( MSP430_UART1_BUS ), + CLIENT_ID = unique( MSP430_UARTA1_BUS ), }; - components Msp430Uart1P as UartP; + components Msp430UartA1P as UartP; Resource = UartP.Resource[ CLIENT_ID ]; UartStream = UartP.UartStream[ CLIENT_ID ]; UartByte = UartP.UartByte[ CLIENT_ID ]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430Uart1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartA1P.nc similarity index 98% rename from tos/chips/msp430/x2xxx/usci/Msp430Uart1P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UartA1P.nc index da8dadef2d..af6e22e6f3 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430Uart1P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartA1P.nc @@ -39,7 +39,7 @@ * @author Xavier Orduna */ -configuration Msp430Uart1P { +configuration Msp430UartA1P { provides { interface Resource[uint8_t id]; interface ResourceConfigure[uint8_t id]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc index 2f5a508809..1ebae8b46e 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc @@ -33,7 +33,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Provides an interface for usci A0 on the MSP430. + * Arbritrated interface for USCI_A0 for x2 parts. * * @author Jonathan Hui * @author Xavier Orduna diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc index b5e49fa055..a7af3f43fa 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc @@ -33,7 +33,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Provides an interface for usci A1 on the MSP430. + * Arbritrated interface for USCI_A1 for x2 parts. * * @author Jonathan Hui * @author Xavier Orduna diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc index 3e4b35ad9b..bf137936de 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc @@ -33,7 +33,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Provides an interface for usci B0 on the MSP430. + * Arbritrated interface for USCI_B0 for x2 parts. * * @author Jonathan Hui * @author Xavier Orduna diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc index 34d0a2d458..877fb3627d 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc @@ -32,7 +32,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * - * Provides an interface for usci B1 on the MSP430. + * Arbritrated interface for USCI_B1 for x2 parts. * * @author Jonathan Hui * @author Eric B. Decker diff --git a/tos/chips/msp430/x2xxx/usci/msp430usci.h b/tos/chips/msp430/x2xxx/usci/msp430usci.h index 50288e8f7f..1bcfd36515 100644 --- a/tos/chips/msp430/x2xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x2xxx/usci/msp430usci.h @@ -73,56 +73,67 @@ #endif /* - * The MSP430X architecture at least the msp430f2618 family - * has a total of four ports that can be used independently - * usciA0, A1 (uart, spi) and usciB0, B1 (i2c, spi only). + * The x2 family consists of the msp430f261{6,7,8,9} which provides + * 2 USCI_As (UART/SPI) and 2 USCI_Bs (SPI/I2C). These are mapped on a pure + * hardware naming scheme along with appropriate sharing files which enable + * arbitration for each h/w module. * - * We set the resources up so multiple use of a given port - * can be arbritrated. + * usciA0: HplMsp430UsciA0, Msp430UartA0, Msp430SpiA0 + * Msp430UsciA0C, Msp430UsciSharedA0P (arbitrated) + * dma * - * UART0, SPI2 -> usciA0 dma - * UART1, SPI3 -> usciA1 dma - * SPI0, I2C0 -> usciB0 dma - * SPI1, I2C1 -> usciB1 no dma + * usciA1: HplMsp430UsciA1, Msp430UartA1, Msp430SpiA1 + * Msp430UsciA1C, Msp430UsciSharedA1P (arbitrated) + * dma * - * spi2,3 are mapped to usciA0,A1 because the typical - * configuration is to use dual uarts and dual spis - * so the less used configuration maps the SPI on usciA0 - * as 2 and 3. + * usciB0: HplMsp430UsciB0, Msp430SpiB0, Msp430I2CB0 + * Msp430UsciB0C, Msp430UsciSharedB0P (arbitrated) + * dma + * + * usciB1: HplMsp430UsciB1, Msp430SpiB1, Msp430I2CB1 + * Msp430UsciB1C, Msp430UsciSharedB1P (arbitrated) + * no dma + * + * usciB1 does not support dma because the dma engine can't be triggered + * on tx/rx data avail. Not enough bits. + * + * Actual mapping between usci h/w and function is done by platform files. + * ie. tos/platforms//mappings or + * tos/platforms//chips/ */ // USCI A0: UART, SPI -#define MSP430_HPLUSCIA0_RESOURCE "Msp430UsciA0.Resource" -#define MSP430_UART0_BUS "Msp430Uart0.Resource" -#define MSP430_SPI2_BUS "Msp430Spi2.Resource" +#define MSP430_HPLUSCIA0_RESOURCE "Msp430UsciA0.Resource" +#define MSP430_UARTA0_BUS "Msp430UartA0.Resource" +#define MSP430_SPIA0_BUS "Msp430SpiA0.Resource" -//#define MSP430_UART0_BUS MSP430_HPLUSCIA0_RESOURCE -//#define MSP430_SPI2_BUS MSP430_HPLUSCIA0_RESOURCE +//#define MSP430_UARTA0_BUS MSP430_HPLUSCIA0_RESOURCE +//#define MSP430_SPIA0_BUS MSP430_HPLUSCIA0_RESOURCE // USCI A1: UART, SPI -#define MSP430_HPLUSCIA1_RESOURCE "Msp430UsciA1.Resource" -#define MSP430_UART1_BUS "Msp430Uart1.Resource" -#define MSP430_SPI3_BUS "Msp430Spi3.Resource" +#define MSP430_HPLUSCIA1_RESOURCE "Msp430UsciA1.Resource" +#define MSP430_UARTA1_BUS "Msp430UartA1.Resource" +#define MSP430_SPIA1_BUS "Msp430SpiA1.Resource" -//#define MSP430_UART1_BUS MSP430_HPLUSCIA1_RESOURCE -//#define MSP430_SPI3_BUS MSP430_HPLUSCIA1_RESOURCE +//#define MSP430_UARTA1_BUS MSP430_HPLUSCIA1_RESOURCE +//#define MSP430_SPIA1_BUS MSP430_HPLUSCIA1_RESOURCE // USCI B0: SPI, I2C -#define MSP430_HPLUSCIB0_RESOURCE "Msp430UsciB0.Resource" -#define MSP430_SPI0_BUS "Msp430Spi0.Resource" -#define MSP430_I2C0_BUS "Msp430I2C0.Resource" - -//#define MSP430_SPI0_BUS MSP430_HPLUSCIB0_RESOURCE -//#define MSP430_I2C0_BUS MSP430_HPLUSCIB0_RESOURCE +#define MSP430_HPLUSCIB0_RESOURCE "Msp430UsciB0.Resource" +#define MSP430_SPIB0_BUS "Msp430SpiB0.Resource" +#define MSP430_I2CB0_BUS "Msp430I2CB0.Resource" +//#define MSP430_SPIB0_BUS MSP430_HPLUSCIB0_RESOURCE +//#define MSP430_I2CB0_BUS MSP430_HPLUSCIB0_RESOURCE // USCI B1: SPI, I2C -#define MSP430_HPLUSCIB1_RESOURCE "Msp430UsciB1.Resource" -#define MSP430_SPI1_BUS "Msp430Spi1.Resource" -#define MSP430_I2C1_BUS "Msp430I2C1.Resource" +#define MSP430_HPLUSCIB1_RESOURCE "Msp430UsciB1.Resource" +#define MSP430_SPIB1_BUS "Msp430SpiB1.Resource" +#define MSP430_I2CB1_BUS "Msp430I2CB1.Resource" + +//#define MSP430_SPIB1_BUS MSP430_HPLUSCIB1_RESOURCE +//#define MSP430_I2CB1_BUS MSP430_HPLUSCIB1_RESOURCE -//#define MSP430_SPI1_BUS MSP430_HPLUSCIB1_RESOURCE -//#define MSP430_I2C1_BUS MSP430_HPLUSCIB1_RESOURCE typedef enum { USCI_NONE = 0, diff --git a/tos/chips/tmp102/SimpleTMP102C.nc b/tos/chips/tmp102/SimpleTMP102C.nc index 25b0a1cdaa..3b4081e3f8 100644 --- a/tos/chips/tmp102/SimpleTMP102C.nc +++ b/tos/chips/tmp102/SimpleTMP102C.nc @@ -12,7 +12,8 @@ implementation { components new TimerMilliC() as TimerFail; SimpleTMP102P.TimerFail -> TimerFail; - components new Msp430I2C1C() as I2C; +#warning TMP102 using generic wiring (usciB1). Platform specific wiring is preferred. + components new Msp430I2CB1C() as I2C; SimpleTMP102P.Resource -> I2C; SimpleTMP102P.ResourceRequested -> I2C; SimpleTMP102P.I2CBasicAddr -> I2C; diff --git a/tos/platforms/z1/PlatformSerialC.nc b/tos/platforms/z1/PlatformSerialC.nc index 9bac747b53..a88e49c52a 100644 --- a/tos/platforms/z1/PlatformSerialC.nc +++ b/tos/platforms/z1/PlatformSerialC.nc @@ -9,7 +9,7 @@ configuration PlatformSerialC { implementation { - components new Msp430Uart0C() as UartC; + components new Msp430UartA0C() as UartC; UartStream = UartC; UartByte = UartC; diff --git a/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc index f368518b54..8b358fe183 100644 --- a/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc +++ b/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc @@ -47,7 +47,7 @@ generic configuration HplCC2420SpiC() { implementation { - components new Msp430Spi0C() as SpiC; + components new Msp430SpiB0C() as SpiC; Resource = SpiC; SpiByte = SpiC; diff --git a/tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc b/tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc index 5b990c783b..f0a6b01592 100644 --- a/tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc +++ b/tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc @@ -39,7 +39,7 @@ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ */ -configuration Msp430I2C1P { +configuration Msp430I2CB1P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[uint8_t id ]; diff --git a/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc b/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc index 5507a700cf..6d1e0c30ef 100644 --- a/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc +++ b/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc @@ -58,7 +58,7 @@ implementation { Logic.AlertInterrupt -> GeneralIOC.GpioInterrupt[GPIO_TMP102_TEMP_ALERT]; Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TMP102_TEMP_ALERT]; - components new Msp430I2CC() as I2CBus; + components new Msp430I2CB1C() as I2CBus; Logic.I2CPacket -> I2CBus; components TMP102InternalP as Internal; From 0ef84f458d11f9109d7b1076c43a769001966eae Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 30 Mar 2011 09:09:14 -0700 Subject: [PATCH 052/411] msp430: clean up arbitrated interface at the usci level. Motivation: The naming convention was unclear and applied inconsistently with some of the new x2 processor code. Clean it up. Much of this was a hold over from the old x1 USART code that provided a model for the original x2 code. Originally, Msp430Usci{A,B}{0,1}C and Msp430UsciShare{A,B}{0,1}P was a pair that provided an arbitrated interface to the low level Hpl Usci interfaces. Make the names consistent. Msp430Usci{A,B}{0,1}C -> Msp430UsciArb{A,B}{0,1}C Msp430UsciShare{A,B}{0,1}P -> Msp430UsciArb{A,B}{0,1}P Also change Msp430UsciShareP -> Msp430UsciArbIntP. This module is simply an interrupt steering linkage. The new name is significantly better. --- tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430SpiA0C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430SpiA1C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430UartA0C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430UartA1C.nc | 2 +- .../usci/{Msp430UsciA0C.nc => Msp430UsciArbA0C.nc} | 14 +++++++------- .../{Msp430UsciShareA0P.nc => Msp430UsciArbA0P.nc} | 14 +++++++------- .../usci/{Msp430UsciA1C.nc => Msp430UsciArbA1C.nc} | 14 +++++++------- .../{Msp430UsciShareA1P.nc => Msp430UsciArbA1P.nc} | 14 +++++++------- .../usci/{Msp430UsciB0C.nc => Msp430UsciArbB0C.nc} | 14 +++++++------- .../{Msp430UsciShareB0P.nc => Msp430UsciArbB0P.nc} | 14 +++++++------- .../usci/{Msp430UsciB1C.nc => Msp430UsciArbB1C.nc} | 14 +++++++------- .../{Msp430UsciShareB1P.nc => Msp430UsciArbB1P.nc} | 14 +++++++------- .../{Msp430UsciShareP.nc => Msp430UsciArbIntP.nc} | 4 +++- 17 files changed, 67 insertions(+), 65 deletions(-) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciA0C.nc => Msp430UsciArbA0C.nc} (86%) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciShareA0P.nc => Msp430UsciArbA0P.nc} (92%) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciA1C.nc => Msp430UsciArbA1C.nc} (86%) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciShareA1P.nc => Msp430UsciArbA1P.nc} (92%) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciB0C.nc => Msp430UsciArbB0C.nc} (86%) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciShareB0P.nc => Msp430UsciArbB0P.nc} (92%) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciB1C.nc => Msp430UsciArbB1C.nc} (85%) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciShareB1P.nc => Msp430UsciArbB1P.nc} (92%) rename tos/chips/msp430/x2xxx/usci/{Msp430UsciShareP.nc => Msp430UsciArbIntP.nc} (95%) diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc index 9284045d54..640d077fbc 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc @@ -62,7 +62,7 @@ implementation { I2CBasicAddr = I2CP.I2CBasicAddr; Msp430I2CConfigure = I2CP.Msp430I2CConfigure[CLIENT_ID]; - components new Msp430UsciB0C() as UsciC; + components new Msp430UsciArbB0C() as UsciC; ResourceRequested = UsciC; I2CP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; I2CP.UsciResource[CLIENT_ID] -> UsciC.Resource; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc index 713ee4febb..68f27c00d3 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc @@ -62,7 +62,7 @@ implementation { I2CBasicAddr = I2CP.I2CBasicAddr; Msp430I2CConfigure = I2CP.Msp430I2CConfigure[CLIENT_ID]; - components new Msp430UsciB1C() as UsciC; + components new Msp430UsciArbB1C() as UsciC; ResourceRequested = UsciC; I2CP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; I2CP.UsciResource[CLIENT_ID] -> UsciC.Resource; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiA0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0C.nc index e054339f97..285e760e27 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiA0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0C.nc @@ -74,7 +74,7 @@ implementation { SpiPacket = SpiP.SpiPacket[CLIENT_ID]; Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; - components new Msp430UsciA0C() as UsciC; + components new Msp430UsciArbA0C() as UsciC; ResourceRequested = UsciC; SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiA1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1C.nc index 33a72be393..e3ac644417 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiA1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1C.nc @@ -74,7 +74,7 @@ implementation { SpiPacket = SpiP.SpiPacket[CLIENT_ID]; Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; - components new Msp430UsciA1C() as UsciC; + components new Msp430UsciArbA1C() as UsciC; ResourceRequested = UsciC; SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc index 5eb812d806..e7a4b24277 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc @@ -74,7 +74,7 @@ implementation { SpiPacket = SpiP.SpiPacket[CLIENT_ID]; Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; - components new Msp430UsciB0C() as UsciC; + components new Msp430UsciArbB0C() as UsciC; ResourceRequested = UsciC; SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc index 2c02597f79..88242c1af5 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc @@ -85,7 +85,7 @@ implementation { SpiPacket = SpiP.SpiPacket[CLIENT_ID]; Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; - components new Msp430UsciB1C() as UsciC; + components new Msp430UsciArbB1C() as UsciC; ResourceRequested = UsciC; SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UartA0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartA0C.nc index 6c108242af..2a2beb8c6a 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UartA0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartA0C.nc @@ -63,7 +63,7 @@ implementation { UartByte = UartP.UartByte[ CLIENT_ID ]; Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; - components new Msp430UsciA0C() as UsciC; + components new Msp430UsciArbA0C() as UsciC; ResourceRequested = UsciC; UartP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; UartP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UartA1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartA1C.nc index 334283dc2d..9e84a591ae 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UartA1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartA1C.nc @@ -63,7 +63,7 @@ implementation { UartByte = UartP.UartByte[ CLIENT_ID ]; Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; - components new Msp430UsciA1C() as UsciC; + components new Msp430UsciArbA1C() as UsciC; ResourceRequested = UsciC; UartP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; UartP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0C.nc similarity index 86% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0C.nc index 1ebae8b46e..b56fe9ffdd 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0C.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -generic configuration Msp430UsciA0C() { +generic configuration Msp430UsciArbA0C() { provides { interface Resource; /* parameterized */ interface ResourceRequested; /* parameterized */ @@ -56,13 +56,13 @@ implementation { CLIENT_ID = unique( MSP430_HPLUSCIA0_RESOURCE ), }; - components Msp430UsciShareA0P as UsciShareP; + components Msp430UsciArbA0P as UsciArbP; - Resource = UsciShareP.Resource[ CLIENT_ID ]; - ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; - ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; - ArbiterInfo = UsciShareP.ArbiterInfo; - HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; + Resource = UsciArbP.Resource[ CLIENT_ID ]; + ResourceRequested = UsciArbP.ResourceRequested[ CLIENT_ID ]; + ResourceConfigure = UsciArbP.ResourceConfigure[ CLIENT_ID ]; + ArbiterInfo = UsciArbP.ArbiterInfo; + HplMsp430UsciInterrupts = UsciArbP.Interrupts[ CLIENT_ID ]; components HplMsp430UsciA0C as HplUsciC; HplMsp430UsciA = HplUsciC; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareA0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0P.nc similarity index 92% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciShareA0P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0P.nc index b761878525..2d9022d091 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareA0P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0P.nc @@ -38,7 +38,7 @@ * @author Eric B. Decker */ -configuration Msp430UsciShareA0P { +configuration Msp430UsciArbA0P { provides { interface Resource[ uint8_t id ]; interface ResourceRequested[ uint8_t id ]; @@ -50,8 +50,11 @@ configuration Msp430UsciShareA0P { } implementation { - components new Msp430UsciShareP() as UsciShareP; - Interrupts = UsciShareP; + components new Msp430UsciArbIntP() as UsciIntP; + Interrupts = UsciIntP; + + components HplMsp430UsciA0C as HplUsciC; + UsciIntP.RawInterrupts -> HplUsciC; components new FcfsArbiterC( MSP430_HPLUSCIA0_RESOURCE ) as ArbiterC; Resource = ArbiterC; @@ -59,8 +62,5 @@ implementation { ResourceDefaultOwner = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; - - components HplMsp430UsciA0C as HplUsciC; - UsciShareP.RawInterrupts -> HplUsciC; + UsciIntP.ArbiterInfo -> ArbiterC; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1C.nc similarity index 86% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1C.nc index a7af3f43fa..1480752f09 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1C.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -generic configuration Msp430UsciA1C() { +generic configuration Msp430UsciArbA1C() { provides { interface Resource; /* parameterized */ interface ResourceRequested; /* parameterized */ @@ -56,13 +56,13 @@ implementation { CLIENT_ID = unique( MSP430_HPLUSCIA1_RESOURCE ), }; - components Msp430UsciShareA1P as UsciShareP; + components Msp430UsciArbA1P as UsciArbP; - Resource = UsciShareP.Resource[ CLIENT_ID ]; - ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; - ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; - ArbiterInfo = UsciShareP.ArbiterInfo; - HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; + Resource = UsciArbP.Resource[ CLIENT_ID ]; + ResourceRequested = UsciArbP.ResourceRequested[ CLIENT_ID ]; + ResourceConfigure = UsciArbP.ResourceConfigure[ CLIENT_ID ]; + ArbiterInfo = UsciArbP.ArbiterInfo; + HplMsp430UsciInterrupts = UsciArbP.Interrupts[ CLIENT_ID ]; components HplMsp430UsciA1C as HplUsciC; HplMsp430UsciA = HplUsciC; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareA1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc similarity index 92% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciShareA1P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc index 17a6076d82..99331d00ae 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareA1P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc @@ -38,7 +38,7 @@ * @author Eric B. Decker */ -configuration Msp430UsciShareA1P { +configuration Msp430UsciArbA1P { provides { interface Resource[ uint8_t id ]; interface ResourceRequested[ uint8_t id ]; @@ -50,8 +50,11 @@ configuration Msp430UsciShareA1P { } implementation { - components new Msp430UsciShareP() as UsciShareP; - Interrupts = UsciShareP; + components new Msp430UsciArbIntP() as UsciIntP; + Interrupts = UsciIntP; + + components HplMsp430UsciA1C as HplUsciC; + UsciIntP.RawInterrupts -> HplUsciC; components new FcfsArbiterC( MSP430_HPLUSCIA1_RESOURCE ) as ArbiterC; Resource = ArbiterC; @@ -59,8 +62,5 @@ implementation { ResourceDefaultOwner = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; - - components HplMsp430UsciA1C as HplUsciC; - UsciShareP.RawInterrupts -> HplUsciC; + UsciArbP.ArbiterInfo -> ArbiterC; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0C.nc similarity index 86% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0C.nc index bf137936de..ce2a317f3c 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0C.nc @@ -40,7 +40,7 @@ * @author Eric B. Decker */ -generic configuration Msp430UsciB0C() { +generic configuration Msp430UsciArbB0C() { provides { interface Resource; /* parameterized */ interface ResourceRequested; /* parameterized */ @@ -56,13 +56,13 @@ implementation { CLIENT_ID = unique( MSP430_HPLUSCIB0_RESOURCE ), }; - components Msp430UsciShareB0P as UsciShareP; + components Msp430UsciArbB0P as UsciArbP; - Resource = UsciShareP.Resource[ CLIENT_ID ]; - ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; - ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; - ArbiterInfo = UsciShareP.ArbiterInfo; - HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; + Resource = UsciArbP.Resource[ CLIENT_ID ]; + ResourceRequested = UsciArbP.ResourceRequested[ CLIENT_ID ]; + ResourceConfigure = UsciArbP.ResourceConfigure[ CLIENT_ID ]; + ArbiterInfo = UsciArbP.ArbiterInfo; + HplMsp430UsciInterrupts = UsciArbP.Interrupts[ CLIENT_ID ]; components HplMsp430UsciB0C as HplUsciC; HplMsp430UsciB = HplUsciC; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareB0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0P.nc similarity index 92% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciShareB0P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0P.nc index 3d9ed0c371..f6d19dd88e 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0P.nc @@ -38,7 +38,7 @@ * @author Eric B. Decker */ -configuration Msp430UsciShareB0P { +configuration Msp430UsciArbB0P { provides { interface Resource[ uint8_t id ]; interface ResourceRequested[ uint8_t id ]; @@ -50,8 +50,11 @@ configuration Msp430UsciShareB0P { } implementation { - components new Msp430UsciShareP() as UsciShareP; - Interrupts = UsciShareP; + components new Msp430UsciArbIntP() as UsciIntP; + Interrupts = UsciIntP; + + components HplMsp430UsciB0C as HplUsciC; + UsciIntP.RawInterrupts -> HplUsciC; components new FcfsArbiterC( MSP430_HPLUSCIB0_RESOURCE ) as ArbiterC; Resource = ArbiterC; @@ -59,8 +62,5 @@ implementation { ResourceDefaultOwner = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; - - components HplMsp430UsciB0C as HplUsciC; - UsciShareP.RawInterrupts -> HplUsciC; + UsciIntP.ArbiterInfo -> ArbiterC; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1C.nc similarity index 85% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1C.nc index 877fb3627d..2b070bcc22 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1C.nc @@ -38,7 +38,7 @@ * @author Eric B. Decker */ -generic configuration Msp430UsciB1C() { +generic configuration Msp430UsciArbB1C() { provides { interface Resource; /* parameterized */ interface ResourceRequested; /* parameterized */ @@ -54,13 +54,13 @@ implementation { CLIENT_ID = unique( MSP430_HPLUSCIB1_RESOURCE ), }; - components Msp430UsciShareB1P as UsciShareP; + components Msp430UsciArbB1P as UsciArbP; - Resource = UsciShareP.Resource[ CLIENT_ID ]; - ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; - ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; - ArbiterInfo = UsciShareP.ArbiterInfo; - HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; + Resource = UsciArbP.Resource[ CLIENT_ID ]; + ResourceRequested = UsciArbP.ResourceRequested[ CLIENT_ID ]; + ResourceConfigure = UsciArbP.ResourceConfigure[ CLIENT_ID ]; + ArbiterInfo = UsciArbP.ArbiterInfo; + HplMsp430UsciInterrupts = UsciArbP.Interrupts[ CLIENT_ID ]; components HplMsp430UsciB1C as HplUsciC; HplMsp430UsciB = HplUsciC; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareB1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1P.nc similarity index 92% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciShareB1P.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1P.nc index 6c9d360357..54c91c234d 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1P.nc @@ -38,7 +38,7 @@ * @author Eric B. Decker */ -configuration Msp430UsciShareB1P { +configuration Msp430UsciArbB1P { provides { interface Resource[ uint8_t id ]; interface ResourceRequested[ uint8_t id ]; @@ -50,8 +50,11 @@ configuration Msp430UsciShareB1P { } implementation { - components new Msp430UsciShareP() as UsciShareP; - Interrupts = UsciShareP; + components new Msp430UsciArbIntP() as UsciIntP; + Interrupts = UsciIntP; + + components HplMsp430UsciB1C as HplUsciC; + UsciIntP.RawInterrupts -> HplUsciC; components new FcfsArbiterC( MSP430_HPLUSCIB1_RESOURCE ) as ArbiterC; Resource = ArbiterC; @@ -59,8 +62,5 @@ implementation { ResourceDefaultOwner = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; - UsciShareP.ArbiterInfo -> ArbiterC; - - components HplMsp430UsciB1C as HplUsciC; - UsciShareP.RawInterrupts -> HplUsciC; + UsciIntP.ArbiterInfo -> ArbiterC; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareP.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbIntP.nc similarity index 95% rename from tos/chips/msp430/x2xxx/usci/Msp430UsciShareP.nc rename to tos/chips/msp430/x2xxx/usci/Msp430UsciArbIntP.nc index 3aa6fc3684..a08d494c33 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciShareP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbIntP.nc @@ -36,9 +36,11 @@ * @author Jonathan Hui * @author Xavier Orduna * @author Eric B. Decker + * + * Module that provides arbitrated interrupt steering for the x2 processors. */ -generic module Msp430UsciShareP() @safe() { +generic module Msp430UsciArbIntP() @safe() { provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; uses { interface HplMsp430UsciInterrupts as RawInterrupts; From e500da12ff97ced4d6b95260e2c2b48427cc04f8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 30 Mar 2011 09:19:10 -0700 Subject: [PATCH 053/411] Add release notes, move Copyright Template to 10_ --- 00_CopyrightTemplate => 10_CopyrightTemplate | 0 11_Release_Notes | 24 ++++++++++++++++++++ 2 files changed, 24 insertions(+) rename 00_CopyrightTemplate => 10_CopyrightTemplate (100%) create mode 100644 11_Release_Notes diff --git a/00_CopyrightTemplate b/10_CopyrightTemplate similarity index 100% rename from 00_CopyrightTemplate rename to 10_CopyrightTemplate diff --git a/11_Release_Notes b/11_Release_Notes new file mode 100644 index 0000000000..191e5b019b --- /dev/null +++ b/11_Release_Notes @@ -0,0 +1,24 @@ + +Major Changes to the msp430 core software: + +* Remove duplicate files between original x1 and Z1 (x2) + +* change usci port named back to h/w centric. ie. Msp430Uart0 -> Msp430UartA0. Better matches + what will come in with the x5 code where there are lots of ports. + +* Default clocks 1611 (x1) 4 MiHz, 2617/2618 (x2) 8 MiHz, 5137/5438 (x5) 16 MiHz + +* use common clock module for x1 and x2. msp430/clock_bcs. Handles basic_clock and bc2. + +* gdb files to support different processor families, tos/chips/msp430/99_gdb/gdb{x1,x2,x5} + See tos/chips/msp430/99_gdb/gdbinit for details on how to use these files. + +* add stack checking module. This module allows one to monitor how much of the stack + is being use. See tos/chips/msp430/Stack*. + +* Change DCO specifications from KHZ to HZ to eliminate confusion with decimal vs. binary + frequency specs. Make Z1 use binary clocks. + +* Revised DCO calibrator to work with both 1611 and Z1 2617/1618. Z1 uses dco calibrator + to sync up to 8MiHz. + From 663ae66923fbc14e66064410c3853e51d8764e55 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 31 Mar 2011 13:32:19 -0700 Subject: [PATCH 054/411] msp430: Stabilize the 32K xtal on the way up. Bring in wait_for_32K which waits for the 32KiHz xtal clock source to stabilize before we use it to synchronize the DCO clock. --- tos/chips/msp430/clock_bcs/00_Readme | 11 +++-- tos/chips/msp430/clock_bcs/Msp430ClockP.nc | 28 ++++++++++++- tos/platforms/z1/PlatformP.nc | 49 ++++++++++++++++++++++ 3 files changed, 84 insertions(+), 4 deletions(-) diff --git a/tos/chips/msp430/clock_bcs/00_Readme b/tos/chips/msp430/clock_bcs/00_Readme index 8964eb5969..d86ce12ee9 100644 --- a/tos/chips/msp430/clock_bcs/00_Readme +++ b/tos/chips/msp430/clock_bcs/00_Readme @@ -1,3 +1,8 @@ -This directory support the msp430 basic clock (__MSP430_HAS_BASIC_CLOCK) and basic clock plus -(__MSP430_HAS_BC2_). These are clock modules support by 1st gen x1xxx processors and 2nd gen -x2xxx processors (ie. msp430f2618 etc). +This directory contains support for the msp430 basic clock (__MSP430_HAS_BASIC_CLOCK) and +basic clock plus (__MSP430_HAS_BC2_). These are clock modules provided by 1st gen x1xxx +processors and 2nd gen x2xxx processors (ie. msp430f2618 etc). + +The hardware configuration is assumed to include a 32768 Hz external clock crystal that +is used as an accurate timebase. This timebase is used to syncronize internal clocks +and provides clocking for the primary time base. This provides timer clocking while +the processor is sleeping. diff --git a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc index 1a3a855ec5..bbe7aaa7f1 100644 --- a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc +++ b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc @@ -47,7 +47,14 @@ * driver. x5 devices use a different system, the Unified Clock System. * * FREQ by default is 4MiHz for x1 procs and 8MiHz for x2 procs. Actual - * clock frequency is determined by Msp430DcoSpec.h. + * clock frequency is determined by Msp430DcoSpec.h. The default files + * are in the different x1, x2, and x5 directories. + * + * Why the different default speeds? The x1 processors are spec'd by + * TI as having a max speed of 8MHz. We do binary so would set this up + * for 8MiHz which would exceed the stated max. So the default is set to + * 4MiHz. Be conservative. x2s have a max of 16MHz so the default is + * set to 8MiHz. And x5s can be run at 25MHz so the default is 16MiHz. * * ACLK (Aux Clk) is assumed to be run off the LFXT interface (low-freq) at * 32KiHz (32768). This clock is used to calibrate the main DCO clock and @@ -66,9 +73,28 @@ * peripherals down) or the timer subsystem is changed to deal with a 500ns * tick. * + * TimerB is run off the 32KiHz crystal oscillator. This is used to provide + * a stable time base for syncronizing the main DCO clock. It also provides + * a stable timer that runs the timer system especially when the cpu is + * sleeping. + * * XT2 isn't used for an external oscillator because it is expensive. Power * wise and it has been measured to take roughly 5ms to power up and stabilize. * You don't want to be doing that if one is putting the cpu to sleep a bunch. + * + * WARNING: This module assumes that the 32KiHz XTAL has stablized. This + * is assumed to have been performed in the Platform Initilization. + * + * The Platform code gets executed on the way up and so certain assumptions can + * be made about the state of clocking system. Otherwise we have to put the + * clocks into a known state and stabilize the 32KiHz. Once done we can just + * proceed here with calibration of the main DCO. + * + * We may want to revisit this later and move wait_for_32K into this module but + * it needs to be thought through better and what the ramifications are. Placing + * wait_for_32k into the startup code in Platform is safe. It just has the + * downside of having to put into each different platform startup when new platforms + * are added. */ /* diff --git a/tos/platforms/z1/PlatformP.nc b/tos/platforms/z1/PlatformP.nc index a761f5a63c..84ebd3913d 100644 --- a/tos/platforms/z1/PlatformP.nc +++ b/tos/platforms/z1/PlatformP.nc @@ -6,7 +6,56 @@ module PlatformP{ uses interface Init as LedsInit; } implementation { + /* + * We assume that the clock system after reset has been + * set to some reasonable value. ie ~1MHz. We assume that + * all the selects are 0, ie. DIVA/1, XTS 0, XT2OFF, SELM 0, + * DIVM/1, SELS 0, DIVS/1. MCLK <- DCO, SMCLK <- DCO, + * LFXT1S 32768, XCAP ~6pf + * + * We wait about a second for the 32KHz to stablize. + * + * PWR_UP_SEC is the number of times we need to wait for + * TimerA to cycle (16 bits) when clocked at the default + * msp430f2618 dco (about 1 MHz). + */ + +#define PWR_UP_SEC 16 + + void wait_for_32K() __attribute__ ((noinline)) { + uint16_t left; + + TACTL = TACLR; // also zeros out control bits + TBCTL = TBCLR; + TACTL = TASSEL_2 | MC_2; // SMCLK/1, continuous + TBCTL = TBSSEL_1 | MC_2; // ACLK/1, continuous + TBCCTL0 = 0; + + /* + * wait for about a sec for the 32KHz to come up and + * stabilize. We are guessing that it is stable and + * on frequency after about a second but this needs + * to be verified. + * + * FIX ME. Need to verify stability of 32KHz. It definitely + * has a good looking waveform but what about its frequency + * stability. Needs to be measured. + */ + left = PWR_UP_SEC; + while (1) { + if (TACTL & TAIFG) { + /* + * wrapped, clear IFG, and decrement major count + */ + TACTL &= ~TAIFG; + if (--left == 0) + break; + } + } + } + command error_t Init.init() { + wait_for_32K(); call Msp430ClockInit.init(); call LedsInit.init(); return SUCCESS; From 125f4edd1f2ba7703258e6614a5d3890c3503c92 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 1 Apr 2011 18:12:11 -0700 Subject: [PATCH 055/411] Continue port renaming for new x2/x5 multiport naming scheme. Missed some I2C ports that needed the change. --- tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc | 2 +- tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc | 2 +- .../usci/{Msp430I2C1P.nc => Msp430I2CB1P.nc} | 33 +++++++++++-------- ...430SpiNoDmaB0P.nc => Msp430SpiB0NoDmaP.nc} | 4 +-- 4 files changed, 23 insertions(+), 18 deletions(-) rename tos/platforms/z1/chips/msp430/usci/{Msp430I2C1P.nc => Msp430I2CB1P.nc} (81%) rename tos/platforms/z1/chips/msp430/usci/{Msp430SpiNoDmaB0P.nc => Msp430SpiB0NoDmaP.nc} (97%) diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc index 640d077fbc..a1e1b98af3 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CB0C.nc @@ -57,7 +57,7 @@ implementation { CLIENT_ID = unique(MSP430_I2CB0_BUS), }; - components Msp430I2C0P as I2CP; + components Msp430I2CB0P as I2CP; Resource = I2CP.Resource[CLIENT_ID]; I2CBasicAddr = I2CP.I2CBasicAddr; Msp430I2CConfigure = I2CP.Msp430I2CConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc index 68f27c00d3..a3e134430e 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430I2CB1C.nc @@ -57,7 +57,7 @@ implementation { CLIENT_ID = unique(MSP430_I2CB1_BUS), }; - components Msp430I2C1P as I2CP; + components Msp430I2CB1P as I2CP; Resource = I2CP.Resource[CLIENT_ID]; I2CBasicAddr = I2CP.I2CBasicAddr; Msp430I2CConfigure = I2CP.Msp430I2CConfigure[CLIENT_ID]; diff --git a/tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc b/tos/platforms/z1/chips/msp430/usci/Msp430I2CB1P.nc similarity index 81% rename from tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc rename to tos/platforms/z1/chips/msp430/usci/Msp430I2CB1P.nc index f0a6b01592..31a61b906a 100644 --- a/tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc +++ b/tos/platforms/z1/chips/msp430/usci/Msp430I2CB1P.nc @@ -40,30 +40,35 @@ */ configuration Msp430I2CB1P { - - provides interface Resource[ uint8_t id ]; - provides interface ResourceConfigure[uint8_t id ]; - provides interface I2CPacket as I2CBasicAddr; - - uses interface Resource as UsciResource[ uint8_t id ]; - uses interface Msp430I2CConfigure[ uint8_t id ]; - uses interface HplMsp430UsciInterrupts as Interrupts; - + provides { + interface Resource[ uint8_t id ]; + interface ResourceConfigure[uint8_t id ]; + interface I2CPacket as I2CBasicAddr; + } + uses { + interface Resource as UsciResource[ uint8_t id ]; + interface Msp430I2CConfigure[ uint8_t id ]; + interface HplMsp430UsciInterrupts as Interrupts; + } } implementation { - components new Msp430I2CP() as I2CP; - components new Z1UsciP() as Z1UsciP; Resource = I2CP.Resource; ResourceConfigure = I2CP.ResourceConfigure; Msp430I2CConfigure = I2CP.Msp430I2CConfigure; - I2CP.Msp430I2CConfigure -> Z1UsciP.Msp430I2CConfigure; I2CBasicAddr = I2CP.I2CBasicAddr; UsciResource = I2CP.UsciResource; Interrupts = I2CP.Interrupts; - + components HplMsp430UsciB1C as UsciC; I2CP.UsciB -> UsciC; - + + /* + * This is one way of doing this... The intended way of doing this + * however is to wire in Msp430I2CConfigure at the top level which + * would be Msp430I2CB1C.Msp430I2CConfigure. + */ + components new Z1UsciP() as Z1UsciP; + I2CP.Msp430I2CConfigure -> Z1UsciP.Msp430I2CConfigure; } diff --git a/tos/platforms/z1/chips/msp430/usci/Msp430SpiNoDmaB0P.nc b/tos/platforms/z1/chips/msp430/usci/Msp430SpiB0NoDmaP.nc similarity index 97% rename from tos/platforms/z1/chips/msp430/usci/Msp430SpiNoDmaB0P.nc rename to tos/platforms/z1/chips/msp430/usci/Msp430SpiB0NoDmaP.nc index 5b28442fc6..89e5b6eafa 100644 --- a/tos/platforms/z1/chips/msp430/usci/Msp430SpiNoDmaB0P.nc +++ b/tos/platforms/z1/chips/msp430/usci/Msp430SpiB0NoDmaP.nc @@ -38,7 +38,7 @@ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ */ -configuration Msp430SpiNoDmaB0P { +configuration Msp430SpiB0NoDmaP { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[uint8_t id ]; @@ -53,7 +53,7 @@ configuration Msp430SpiNoDmaB0P { implementation { - components new Msp430SpiNoDmaBP() as SpiP; + components new Msp430SpiNoDmaP() as SpiP; components new Z1UsciP() as Z1UsciP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; From fc313bee6a09cb8b9e347fbb1c17bd4dbe05094a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 3 Apr 2011 08:39:21 -0700 Subject: [PATCH 056/411] msp430 adc: Change ADC_VECTOR to ADC12_VECTOR Early toolchains included a define that mapped ADC_VECTOR to ADC12_VECTOR. ADC12_VECTOR was also available in the msp430 include files that came with those toolchains but the code used ADC_VECTOR. Newer toolchains using the TI HEADERS don't define ADC_VECTOR. The correct vector name to use in any case is ADC12_VECTOR and this works with the old toolchains as well as the new ones. --- tos/chips/msp430/adc12/HplAdc12P.nc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc index cf96fdcc76..165993b6c6 100644 --- a/tos/chips/msp430/adc12/HplAdc12P.nc +++ b/tos/chips/msp430/adc12/HplAdc12P.nc @@ -40,6 +40,9 @@ * The HplAdc12 interface exports low-level access to the ADC12 registers * of the MSP430 MCU. * + * Older msp430 include files defined ADC_VECTOR (defined to be ADC12_VECTOR) + * new includes (TI_HEADERS etc) don't define ADC_VECTOR. Use the blessed + * vector: ADC12_VECTOR. */ #if !defined(__MSP430_HAS_ADC12__) && !defined(__MSP430_HAS_ADC12_PLUS__) @@ -125,7 +128,7 @@ implementation async command bool HplAdc12.isBusy(){ return (ADC12CTL1 & ADC12BUSY); } - TOSH_SIGNAL(ADC_VECTOR) { + TOSH_SIGNAL(ADC12_VECTOR) { signal HplAdc12.conversionDone(ADC12IV); } } From e9f7c567451d458b78d5f6b7e8090c60547ee629 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 3 Apr 2011 16:06:43 -0700 Subject: [PATCH 057/411] msp430 gdb: move top level tos/chips/msp430/99_gdb files around a bit. clean up gdbinit --- tos/chips/msp430/99_gdb/{gdbx1 => gdb_x1} | 0 tos/chips/msp430/99_gdb/{gdbx2 => gdb_x2} | 0 tos/chips/msp430/99_gdb/{gdbx5 => gdb_x5} | 0 tos/chips/msp430/99_gdb/gdbinit | 16 +++++++++------- 4 files changed, 9 insertions(+), 7 deletions(-) rename tos/chips/msp430/99_gdb/{gdbx1 => gdb_x1} (100%) rename tos/chips/msp430/99_gdb/{gdbx2 => gdb_x2} (100%) rename tos/chips/msp430/99_gdb/{gdbx5 => gdb_x5} (100%) diff --git a/tos/chips/msp430/99_gdb/gdbx1 b/tos/chips/msp430/99_gdb/gdb_x1 similarity index 100% rename from tos/chips/msp430/99_gdb/gdbx1 rename to tos/chips/msp430/99_gdb/gdb_x1 diff --git a/tos/chips/msp430/99_gdb/gdbx2 b/tos/chips/msp430/99_gdb/gdb_x2 similarity index 100% rename from tos/chips/msp430/99_gdb/gdbx2 rename to tos/chips/msp430/99_gdb/gdb_x2 diff --git a/tos/chips/msp430/99_gdb/gdbx5 b/tos/chips/msp430/99_gdb/gdb_x5 similarity index 100% rename from tos/chips/msp430/99_gdb/gdbx5 rename to tos/chips/msp430/99_gdb/gdb_x5 diff --git a/tos/chips/msp430/99_gdb/gdbinit b/tos/chips/msp430/99_gdb/gdbinit index 786bb9350e..458b87c1d6 100644 --- a/tos/chips/msp430/99_gdb/gdbinit +++ b/tos/chips/msp430/99_gdb/gdbinit @@ -27,7 +27,9 @@ # a proxy using a remote protocol. # -source ../../.gdb2618 +#source ../../.gdb_x1 + source ../../.gdb_x2 +#source ../../.gdb_x5 set remoteaddresssize 0d64 set remotetimeout 0d999999 @@ -37,12 +39,12 @@ disp/i $pc x/i $pc set pri ele 0 -b RealMainP.nc:75 -b RealMainP.nc:82 -b SchedulerBasicP.nc:151 -b SchedulerBasicP.nc:148 -b VirtualizeTimerC.nc:81 -dis +#b RealMainP.nc:75 +#b RealMainP.nc:82 +#b SchedulerBasicP.nc:151 +#b SchedulerBasicP.nc:148 +#b VirtualizeTimerC.nc:81 +#dis define nx fini From 8c43175d6e196ce9923ef0cbdf720b36ab15c969 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 3 Apr 2011 21:04:36 -0700 Subject: [PATCH 058/411] msp430 usci: Finish checking the use of MSP430REG_NORACE on port registers. All generate single instructions so no atomics needed. Also added test code for playing with interface in tos/chips/msp430/x2xxx/usci/test. --- .../msp430/x2xxx/usci/HplMsp430UsciA0P.nc | 4 +- .../msp430/x2xxx/usci/HplMsp430UsciA1P.nc | 6 +- .../msp430/x2xxx/usci/HplMsp430UsciB0P.nc | 4 +- .../msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 6 +- .../x2xxx/usci/test/UsciInterface/Makefile | 2 + .../x2xxx/usci/test/UsciInterface/TestC.nc | 10 +++ .../x2xxx/usci/test/UsciInterface/TestP.nc | 82 +++++++++++++++++++ 7 files changed, 102 insertions(+), 12 deletions(-) create mode 100644 tos/chips/msp430/x2xxx/usci/test/UsciInterface/Makefile create mode 100644 tos/chips/msp430/x2xxx/usci/test/UsciInterface/TestC.nc create mode 100644 tos/chips/msp430/x2xxx/usci/test/UsciInterface/TestP.nc diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc index 63c9100dcb..f4e59f2785 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc @@ -71,14 +71,14 @@ module HplMsp430UsciA0P @safe() { } implementation { -#ifdef notdef MSP430REG_NORACE(IE2); MSP430REG_NORACE(IFG2); MSP430REG_NORACE(UCA0CTL0); MSP430REG_NORACE(UCA0CTL1); MSP430REG_NORACE(UCA0STAT); -#endif + MSP430REG_NORACE(UCA0MCTL); MSP430REG_NORACE(UCA0TXBUF); + MSP430REG_NORACE(UCA0RXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc index 6b379071c0..e1a32d7fca 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc @@ -71,14 +71,14 @@ module HplMsp430UsciA1P @safe() { } implementation { -#ifdef notdef MSP430REG_NORACE(UC1IE); - MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCA1CTL0); MSP430REG_NORACE(UCA1CTL1); MSP430REG_NORACE(UCA1STAT); -#endif + MSP430REG_NORACE(UC1IFG); + MSP430REG_NORACE(UCA1MCTL); MSP430REG_NORACE(UCA1TXBUF); + MSP430REG_NORACE(UCA1RXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc index e797526c9d..66ea871536 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc @@ -72,17 +72,15 @@ module HplMsp430UsciB0P @safe() { } implementation { -#ifdef notdef MSP430REG_NORACE(IE2); MSP430REG_NORACE(IFG2); MSP430REG_NORACE(UCB0CTL0); MSP430REG_NORACE(UCB0CTL1); MSP430REG_NORACE(UCB0STAT); + MSP430REG_NORACE(UCB0TXBUF); MSP430REG_NORACE(UCB0RXBUF); MSP430REG_NORACE(UCB0I2COA); MSP430REG_NORACE(UCB0I2CIE); -#endif - MSP430REG_NORACE(UCB0TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index bf99a0564c..7a97ac0fa9 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -72,17 +72,15 @@ module HplMsp430UsciB1P @safe() { } implementation { -#ifdef notdef MSP430REG_NORACE(UC1IE); - MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCB1CTL0); MSP430REG_NORACE(UCB1CTL1); MSP430REG_NORACE(UCB1STAT); - MSP430REG_NORACE(UCB1RXBUF); MSP430REG_NORACE(UCB1I2COA); MSP430REG_NORACE(UCB1I2CIE); -#endif + MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCB1TXBUF); + MSP430REG_NORACE(UCB1RXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); diff --git a/tos/chips/msp430/x2xxx/usci/test/UsciInterface/Makefile b/tos/chips/msp430/x2xxx/usci/test/UsciInterface/Makefile new file mode 100644 index 0000000000..045b191fef --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci/test/UsciInterface/Makefile @@ -0,0 +1,2 @@ +COMPONENT=TestC +include $(MAKERULES) \ No newline at end of file diff --git a/tos/chips/msp430/x2xxx/usci/test/UsciInterface/TestC.nc b/tos/chips/msp430/x2xxx/usci/test/UsciInterface/TestC.nc new file mode 100644 index 0000000000..2f1e447755 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci/test/UsciInterface/TestC.nc @@ -0,0 +1,10 @@ +configuration TestC { +} +implementation { + components MainC, TestP as App; + App -> MainC.Boot; + + components HplMsp430UsciA0C as UsciC; + App.Usci -> UsciC; + App.Interrupt -> UsciC; +} diff --git a/tos/chips/msp430/x2xxx/usci/test/UsciInterface/TestP.nc b/tos/chips/msp430/x2xxx/usci/test/UsciInterface/TestP.nc new file mode 100644 index 0000000000..ada3117c3d --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci/test/UsciInterface/TestP.nc @@ -0,0 +1,82 @@ +#include "Timer.h" +#include + +void test(uint16_t oa) { +//if (oa) { + while(oa) { + oa++; + } +//} +} + +uint16_t goa0, goa1; + +module TestP { + uses { + interface Boot; + interface HplMsp430UsciA as Usci; + interface HplMsp430UsciInterrupts as Interrupt; + } +} +implementation { + event void Boot.booted() { + uint16_t oa0; + uint16_t oa1; + + call Usci.setUctl0(int2uctl0(0xfe)); + call Usci.getUctl0(); + call Usci.setUctl1(int2uctl1(0xfe)); + call Usci.getUctl1(); + call Usci.setUstat(0xfe); + call Usci.getUstat(); + call Usci.setModeSpi(&msp430_spi_default_config); + call Usci.getUmctl(); + call Usci.setUmctl(0x54); + call Usci.setUbr(call Usci.getUbr()); + call Usci.resetUsci_n(); + call Usci.unresetUsci_n(); + if (call Usci.isSpi()) { + while(1) { + nop(); + } + } + if (call Usci.isUart()) { + while(1) { + nop(); + } + } + call Usci.getMode(); + call Usci.disableTxIntr(); + call Usci.disableRxIntr(); + call Usci.disableIntr(); + call Usci.enableTxIntr(); + call Usci.clrIntr(); + call Usci.clrRxIntr(); + call Usci.clrTxIntr(); +#ifdef notdef + call Usci.setModeI2C(&msp430_i2c_default_config); + call Usci.setModeI2C(&msp430_i2c_default_config); + call Usci.setGeneralCall(); + oa0 = call Usci.getOwnAddress(); + test(oa0); + goa0 = oa0; + call Usci.clearGeneralCall(); + oa1 = call Usci.getOwnAddress(); + test(oa1); + goa1 = oa1; + call Usci.disableStopInt(); + call Usci.enableStopInt(); + call Usci.setOwnAddress(0x1000); + call Usci.disableI2C(); +#endif + while (call Usci.isTxIntrPending()) { + nop(); + } + while (call Usci.isRxIntrPending()) { + nop(); + } + } + + async event void Interrupt.rxDone(uint8_t data) {} + async event void Interrupt.txDone() {} +} From 1970c42fee04486c7160a136ee11933513bc17f9 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 3 Apr 2011 21:08:58 -0700 Subject: [PATCH 059/411] msp430 usci: remove unneeded temp variables used for clearing rx interrupts. --- tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc | 6 ++---- tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc | 6 ++---- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc | 9 ++++----- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 6 ++---- 4 files changed, 10 insertions(+), 17 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc index f4e59f2785..f1e5df0a46 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc @@ -268,7 +268,7 @@ implementation { * atomically cleans out any error indicators and the IFG. */ async command void Usci.clrRxIntr() { - uint8_t temp = call Usci.rx(); + call Usci.rx(); } /* @@ -278,10 +278,8 @@ implementation { * starting up a port and we want a pristine state. */ async command void Usci.clrIntr() { - uint8_t temp; - atomic { - temp = call Usci.rx(); /* clean rx side out */ + call Usci.rx(); /* clean rx side out */ IFG2 &= ~UCA0TXIFG; /* and turn off tx ifg */ } } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc index e1a32d7fca..c34d45f5a6 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc @@ -268,7 +268,7 @@ implementation { * atomically cleans out any error indicators and the IFG. */ async command void Usci.clrRxIntr() { - uint8_t temp = call Usci.rx(); + call Usci.rx(); } /* @@ -278,10 +278,8 @@ implementation { * starting up a port and we want a pristine state. */ async command void Usci.clrIntr() { - uint8_t temp; - atomic { - temp = call Usci.rx(); /* clean rx side out */ + call Usci.rx(); /* clean rx side out */ UC1IFG &= ~UCA1TXIFG; /* and turn off tx ifg */ } } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc index 66ea871536..2467adf705 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc @@ -141,7 +141,7 @@ implementation { /* * Reset/unReset * - * resetUsci(bool): (deprecated) TRUE puts device into reset, FALSE takes it out. But this + * resetUsci(bool): (DEPRECATED) TRUE puts device into reset, FALSE takes it out. But this * requires pushing the parameter on the stack and all those extra instructions. * * {un,}resetUsci_n(): reset and unreset the device but result in single instruction that @@ -253,7 +253,7 @@ implementation { * atomically cleans out any error indicators and the IFG. */ async command void Usci.clrRxIntr() { - uint8_t temp = call Usci.rx(); + call Usci.rx(); } /* @@ -262,11 +262,10 @@ implementation { * clear any pending interrupts. Intended to be used when * starting up a port and we want a pristine state. */ - async command void Usci.clrIntr() { - uint8_t temp; + async command void Usci.clrIntr() { atomic { - temp = call Usci.rx(); /* clean rx side out */ + call Usci.rx(); /* clean rx side out */ IFG2 &= ~UCB0TXIFG; /* and turn off tx ifg */ } } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index 7a97ac0fa9..62c815191d 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -253,7 +253,7 @@ implementation { * atomically cleans out any error indicators and the IFG. */ async command void Usci.clrRxIntr() { - uint8_t temp = call Usci.rx(); + call Usci.rx(); } /* @@ -263,10 +263,8 @@ implementation { * starting up a port and we want a pristine state. */ async command void Usci.clrIntr() { - uint8_t temp; - atomic { - temp = call Usci.rx(); /* clean rx side out */ + call Usci.rx(); /* clean rx side out */ UC1IFG &= ~UCB1TXIFG; /* and turn off tx ifg */ } } From 6b8fe9338d0ae8b7ffa058eac5a1586cb48adac3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 3 Apr 2011 21:09:54 -0700 Subject: [PATCH 060/411] msp430 usci: setOwnAddress (i2c) works in parts. Disable interrupts (atomic) --- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc | 5 +++-- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 7 ++++--- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc index 2467adf705..4234689c04 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc @@ -413,8 +413,9 @@ implementation { } async command void Usci.setOwnAddress( uint16_t addr ) { - UCB0I2COA &= UCGCEN; /* currently preserves GC enable */ - UCB0I2COA |= (addr & ~UCGCEN); + atomic { + UCB0I2COA = (addr & ~UCGCEN) | (UCB0I2COA & UCGCEN); + } } /* set whether to respond to GeneralCall. */ diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index 62c815191d..b359371cbd 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -405,15 +405,16 @@ implementation { /* * get/set I2COA, Own Address register - * clears UCGCEN, Genernal Call response enable */ async command uint16_t Usci.getOwnAddress() { return (UCB1I2COA & ~UCGCEN); } async command void Usci.setOwnAddress( uint16_t addr ) { - UCB1I2COA &= UCGCEN; /* currently preserves GC enable */ - UCB1I2COA |= (addr & ~UCGCEN); + atomic { + UCB1I2COA &= UCGCEN; + UCB1I2COA |= (addr & ~UCGCEN); + } } /* set whether to respond to GeneralCall. */ From 7b63d78169306786d123498cc7ef3f56d1a50e58 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 3 Apr 2011 23:22:02 -0700 Subject: [PATCH 061/411] msp430 dma: rework dma_vector computation to make a bit clearer clean up "__" and change to XX_DMA_VECTOR_XX to be blatant. --- tos/chips/msp430/dma/HplMsp430DmaP.nc | 10 +++++++--- tos/chips/msp430/dma/Msp430DmaC.nc | 2 +- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaP.nc index 0e590d2c70..c2d7ad1541 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaP.nc @@ -42,10 +42,14 @@ #error "HplMsp430DmaP: processor not supported, need DMA_3 or DMAX_3" #endif +/* + * The x1 family shares the DMA and DAC interrupt vector. Strange. + * While the x2 has a dedicated interrupt vector. + */ #if defined(DACDMA_VECTOR) -#define __DMA_VECTOR DACDMA_VECTOR +#define XX_DMA_VECTOR_XX DACDMA_VECTOR #elif defined(DMA_VECTOR) -#define __DMA_VECTOR DMA_VECTOR +#define XX_DMA_VECTOR_XX DMA_VECTOR #else #error "DMA VECTOR not defined for cpu selected" #endif @@ -60,7 +64,7 @@ implementation { MSP430REG_NORACE( DMACTL0 ); MSP430REG_NORACE( DMACTL1 ); - TOSH_SIGNAL(__DMA_VECTOR) { + TOSH_SIGNAL(XX_DMA_VECTOR_XX) { signal Interrupt.fired(); } diff --git a/tos/chips/msp430/dma/Msp430DmaC.nc b/tos/chips/msp430/dma/Msp430DmaC.nc index 0015b73a3a..629daf65fc 100644 --- a/tos/chips/msp430/dma/Msp430DmaC.nc +++ b/tos/chips/msp430/dma/Msp430DmaC.nc @@ -48,7 +48,7 @@ */ #if !defined(__MSP430_HAS_DMA_3__) && !defined(__MSP430_HAS_DMAX_3__) -#error "Msp430DmaC: processor not supported, need 3 DMA channels" +#error "Msp430DmaC: processor not supported, 3 DMA channels" #endif configuration Msp430DmaC { From 5f32bf8e05cb37aa5451c2e562e8447c7e54eaa6 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 4 Apr 2011 00:18:33 -0700 Subject: [PATCH 062/411] msp430: update documentation, Release_Notes and Chip_Notes --- 11_Release_Notes | 87 +++++++++++++++++++++++++++++----- tos/chips/msp430/00_Chip_Notes | 12 +++-- 2 files changed, 82 insertions(+), 17 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index 191e5b019b..f8d82a5738 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -1,24 +1,87 @@ Major Changes to the msp430 core software: +Welcome to a major rework of the core msp430 files. Originally, msp430 support +was for the first generation msp430 cpus. Later the MSP430X and MSP430XV2 +processor chips were released by TI. As newer cpu chips have been ported to +TinyOS the architecture of the msp430 s/w has needed changes. + +Major areas of impact include: peripheral register access, clock modules, dma +support, usart vs. usci support, and interrupt architecture. In addition the +s/w has been reorganized to support major differences between the cpus by +grouping support into families. + +This release has also had initial testing done on newer toolchains. The msp430 +core has been modified to support toolchains listed below. Test builds have been +done using the following: + + mspgcc3.2.3: original tinyos 2.1.1 toolchain + mspgcc3.2.3-z1 z1 modified toolchain (supports MSP430X architectural + changes, 26xx processors. Does not properly support + x5 chips. + mspgcc4.4.5(20110312) Initial mspgcc4 supports x5 chips. experimental. + mspgcc4.5.2 (uniarch) Uniarch varient supports all chips. experimental. + slated to become new main toolchain. + + +It is recommended that all verification work be done using the uniarch toolchain. +The sooner we get that toolchain squared away the better. + + +Families: + +A family is a group of similar msp430 processor chips that have been instantiated +in TinyOS. + +x1: 1st generation MSP430. Supported: msp430f149, msp430f1611 (telosb) + +x2: 2nd generation MSP430X. Modified cpu ISA, 20 bit addresses. + Supported: msp430f2616, 2617, 2618, 2619 + +x5: 3rd generation MSP430X. Modified instruction timings. Peripheral modifications. + Supported: cc430f5137, msp430f5438, 5438a. + + +Other notable changes: + * Remove duplicate files between original x1 and Z1 (x2) -* change usci port named back to h/w centric. ie. Msp430Uart0 -> Msp430UartA0. Better matches - what will come in with the x5 code where there are lots of ports. +* change low level usci port naming back to h/w centric. + ie. Msp430Uart0 -> Msp430UartA0. Better matches what will come in with + the x5 code where there are lots of ports. + +* Default clocks 1611 (x1) 4 MiHz, 2617/2618 (x2) 8 MiHz, + 5137/5438 (x5) 16 MiHz + +* use common clock module for x1 and x2. msp430/clock_bcs. Handles + basic_clock and bc2. + +* gdb files to support different processor families, + tos/chips/msp430/99_gdb/gdb{x1,x2,x5}. See tos/chips/msp430/99_gdb/gdbinit + for details on how to use these files. + +* add stack checking module. This module allows one to monitor how much of the + stack is being use. See tos/chips/msp430/Stack*. -* Default clocks 1611 (x1) 4 MiHz, 2617/2618 (x2) 8 MiHz, 5137/5438 (x5) 16 MiHz +* Change DCO specifications from KHZ to HZ to eliminate confusion with decimal vs. + binary frequency specs. Make Z1 use binary clocks. -* use common clock module for x1 and x2. msp430/clock_bcs. Handles basic_clock and bc2. +* Revised DCO calibrator to work with both 1611 and Z1 2617/1618. Z1 uses dco + calibrator to sync up to 8MiHz. -* gdb files to support different processor families, tos/chips/msp430/99_gdb/gdb{x1,x2,x5} - See tos/chips/msp430/99_gdb/gdbinit for details on how to use these files. +* DMA rework. -* add stack checking module. This module allows one to monitor how much of the stack - is being use. See tos/chips/msp430/Stack*. + - Simplify Hpl and make more easily adaptable cross cpu (handles x1, x2, and x5). + - x1/x2 driver and x5 driver independent. + - split out Dma.h for x1/x2 and x5. Too many differences. Could be combined but + just a little too ugly. Mostly due to the number of Tsel registers and what they + are called. + - Make module naming clearer. -* Change DCO specifications from KHZ to HZ to eliminate confusion with decimal vs. binary - frequency specs. Make Z1 use binary clocks. -* Revised DCO calibrator to work with both 1611 and Z1 2617/1618. Z1 uses dco calibrator - to sync up to 8MiHz. +WARNING: tosthreads hasn't been modified for the new core msp430 structure. +TosThreads duplicated files rather than modified in place. This creates +a lot more work and is not recommended. +TosThreads should be modified to place any necessary hooks into the actual device +drivers themselves rather than duplicating the files and then shadowing. diff --git a/tos/chips/msp430/00_Chip_Notes b/tos/chips/msp430/00_Chip_Notes index 42449f5cf3..681776178a 100644 --- a/tos/chips/msp430/00_Chip_Notes +++ b/tos/chips/msp430/00_Chip_Notes @@ -99,10 +99,10 @@ clock_ucs: low level interface to x5 on board clocking. Unified Clock System in __MSP430_HAS_UCS_RF__ driver. Waiting for 5137 (surf) and mm5 (5438) integration. dma: potential for 1 to 8 independent dma channels. (We only use processors that define 3 - channels). MSP430X cpus can address 20 bits via the DMA engines. 20 bits increases - the overhead significantly and should only be used if really needed. ie. Most cpus only - provide RAM in the lower 64K so there really isn't much need for 20 bit addresses, - unless one is DMAing out of high memory (ROM). + channels, including the x5). MSP430X cpus can address 20 bits via the DMA engines. + 20 bits increases the overhead significantly and should only be used if really needed. + ie. Most cpus only provide RAM in the lower 64K so there really isn't much need for + 20 bit addresses, unless one is DMAing out of high memory (ROM). Currently, only a 16 bit dma interface is provided. In the future a dma32 interface could be defined to provide access to the full 20 bits of addressing. This should wait until @@ -114,7 +114,9 @@ dma: potential for 1 to 8 independent dma channels. (We only use processors tha x5 processors have the potential for significantly more triggers than x1 or x2 processors. This is indicated by the presence of DMA0TSEL4 (a 5th TSEL bit, DMA0 is in the unshifted - lsb position). + lsb position). The larger TSEL field changes the format for DMACTRLn and changes the + number of registers. This also changes where the Common Control work lives. This controls + different things depending on the processor but includes RoundRobin and ENNMI. pins: interface to digital I/O. Different processors can have radically different amounts of digitial I/O. These pins are organized into ports. x2 and x5 processors have enhanced From 81d992af782236ea67d36473c5b6543478daf072 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 4 Apr 2011 00:31:08 -0700 Subject: [PATCH 063/411] z1 FastADC: fix makefile, remove define of Only_With_Dma, already in adc12.h --- apps/tests/z1/FastADC/Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/apps/tests/z1/FastADC/Makefile b/apps/tests/z1/FastADC/Makefile index ae69519d20..c798f0e236 100644 --- a/apps/tests/z1/FastADC/Makefile +++ b/apps/tests/z1/FastADC/Makefile @@ -1,6 +1,7 @@ COMPONENT=FastADCAppC CFLAGS += -DPRINTFUART_ENABLED -CFLAGS += -DADC12_TIMERA_ENABLED CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED -include $(MAKERULES) \ No newline at end of file +include $(MAKERULES) From fe41adbdaab2b32199da9b6c22c6d383a7fcb6a8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 4 Apr 2011 00:32:03 -0700 Subject: [PATCH 064/411] msp430 dma: prep for dma rewrite, fix copyrights and other cosmetics. --- tos/chips/msp430/dma/HplMsp430DmaC.nc | 53 +++++-------------- tos/chips/msp430/dma/HplMsp430DmaChannel.nc | 11 ++-- tos/chips/msp430/dma/HplMsp430DmaControl.nc | 11 ++-- tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc | 3 +- tos/chips/msp430/dma/HplMsp430DmaP.nc | 2 + tos/chips/msp430/dma/Msp430Dma.h | 41 +++----------- tos/chips/msp430/dma/Msp430DmaChannel.nc | 11 ++-- tos/chips/msp430/dma/Msp430DmaChannelP.nc | 41 +++----------- tos/chips/msp430/dma/Msp430DmaControl.nc | 11 ++-- tos/chips/msp430/dma/Msp430DmaControlP.nc | 41 +++----------- 10 files changed, 57 insertions(+), 168 deletions(-) diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc index b15eb216f4..7e88ddaaf7 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaC.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaC.nc @@ -1,35 +1,6 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -39,11 +10,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -59,21 +32,19 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein * @author Jonathan Hui - * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ configuration HplMsp430DmaC { - - provides interface HplMsp430DmaControl as Control; - provides interface HplMsp430DmaChannel as Channel0; - provides interface HplMsp430DmaChannel as Channel1; - provides interface HplMsp430DmaChannel as Channel2; - + provides { + interface HplMsp430DmaControl as Control; + interface HplMsp430DmaChannel as Channel0; + interface HplMsp430DmaChannel as Channel1; + interface HplMsp430DmaChannel as Channel2; + } } implementation { diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc index d5ef3bd047..fa3a54a2d7 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -8,11 +9,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -28,11 +31,9 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ interface HplMsp430DmaChannel { diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc index febe987701..0e487bd1fe 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaControl.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaControl.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -8,11 +9,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -28,11 +31,9 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ #include "Msp430Dma.h" diff --git a/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc index 869f2fc498..6b8bc67a06 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc @@ -12,7 +12,7 @@ * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -32,7 +32,6 @@ /** * @author Ben Greenstein - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ interface HplMsp430DmaInterrupt { diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaP.nc index c2d7ad1541..a7fe71e511 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaP.nc @@ -10,10 +10,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h index a63ba010f2..0aaf08678d 100644 --- a/tos/chips/msp430/dma/Msp430Dma.h +++ b/tos/chips/msp430/dma/Msp430Dma.h @@ -1,35 +1,6 @@ -/** +/* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -39,11 +10,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -59,9 +32,7 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein * @author Jonathan Hui * @author Mark Hays diff --git a/tos/chips/msp430/dma/Msp430DmaChannel.nc b/tos/chips/msp430/dma/Msp430DmaChannel.nc index f476b37fc9..6e58bcd86e 100644 --- a/tos/chips/msp430/dma/Msp430DmaChannel.nc +++ b/tos/chips/msp430/dma/Msp430DmaChannel.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -8,11 +9,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -28,12 +31,10 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein * @author Joe Polastre - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ #include "Msp430Dma.h" diff --git a/tos/chips/msp430/dma/Msp430DmaChannelP.nc b/tos/chips/msp430/dma/Msp430DmaChannelP.nc index d77ceb88fb..8cd4d6f28e 100644 --- a/tos/chips/msp430/dma/Msp430DmaChannelP.nc +++ b/tos/chips/msp430/dma/Msp430DmaChannelP.nc @@ -1,35 +1,6 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -39,11 +10,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -59,13 +32,11 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ #include "Msp430Dma.h" diff --git a/tos/chips/msp430/dma/Msp430DmaControl.nc b/tos/chips/msp430/dma/Msp430DmaControl.nc index 4a7fee26b9..3a8a0e4079 100644 --- a/tos/chips/msp430/dma/Msp430DmaControl.nc +++ b/tos/chips/msp430/dma/Msp430DmaControl.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -8,11 +9,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -28,11 +31,9 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ #include "Msp430Dma.h" diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc index b360f4c228..3e3c82203b 100644 --- a/tos/chips/msp430/dma/Msp430DmaControlP.nc +++ b/tos/chips/msp430/dma/Msp430DmaControlP.nc @@ -1,35 +1,6 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * @@ -39,11 +10,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -59,13 +32,11 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** + * * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + * @author Eric B. Decker */ #include "Msp430Dma.h" From 8eb8788dd5ce73114772401376a58c1aa703e1dd Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 10 Apr 2011 14:20:41 -0700 Subject: [PATCH 065/411] msp430 dma: New dma driver for x1,2,5 cpus. Unified dma driver. - update Chip Notes and Dependencies - handle different trigger fields (4 bit x1,x2, 5 bit x5) Implement algorithm using TSEL_base, TSEL_mask, and TSEL_shift to access 16 bit Trigger select fields on the DMA engine. - change Msp430DmaControl.init into .reset - collapse Control.setFlags into a single word write setOpControl - DMAChannel.setupTransfer collapses to using one control word. - minimize redefinitions low level h/w. Use defines in TI HEADERS as is. - Make DMA module names be more descriptive: HplMsp430DmaP -> HplMsp430DmaControlP HplMsp430DmaXP -> HplMsp430DmaChannelP - Collapse HplMsp430DmaChannel to only include commands that are actually used. Collapse all commands that tweak control bits into a single command that sets the control word. This is then used with cpu dependent defines rather than redefining things. - add HplMsp430DmaChannel.reset - remove intermediate state that was maintained in the Msp430DmaChannelP. Use actual h/w when returning state information about the DMA engines. - remove all h/w definitions from Msp430Dma.h. H/W definitions come from cpu dependent files. - Make Msp430Dma.h is now used to generate defines that need to change to adapt the DMA driver whatever cpu is being used. - make all triggers and trigger usage use dma_trigger_t. Define triggers depending on what cpu is being used. - clean up client usage to reflect new interfaces. --- tos/chips/msp430/00_Chip_Notes | 12 +- tos/chips/msp430/01_Dependencies | 30 +- tos/chips/msp430/adc12/Msp430Adc12DMAP.nc | 46 ++- tos/chips/msp430/dma/HplMsp430DmaC.nc | 38 +- tos/chips/msp430/dma/HplMsp430DmaChannel.nc | 89 +++-- tos/chips/msp430/dma/HplMsp430DmaChannelP.nc | 188 ++++++++++ tos/chips/msp430/dma/HplMsp430DmaControl.nc | 13 +- ...lMsp430DmaP.nc => HplMsp430DmaControlP.nc} | 49 +-- tos/chips/msp430/dma/HplMsp430DmaXP.nc | 268 -------------- tos/chips/msp430/dma/Msp430Dma.h | 342 ++++++++++-------- tos/chips/msp430/dma/Msp430DmaC.nc | 2 +- tos/chips/msp430/dma/Msp430DmaChannel.nc | 55 +-- tos/chips/msp430/dma/Msp430DmaChannelP.nc | 81 ++--- tos/chips/msp430/dma/Msp430DmaControl.nc | 6 +- tos/chips/msp430/dma/Msp430DmaControlP.nc | 36 +- tos/chips/msp430/usart/Msp430SpiDma0P.nc | 4 +- tos/chips/msp430/usart/Msp430SpiDma1P.nc | 4 +- tos/chips/msp430/usart/Msp430SpiDmaP.nc | 47 ++- .../msp430/x2xxx/usci/Msp430SpiA0DmaP.nc | 8 +- .../msp430/x2xxx/usci/Msp430SpiA1DmaP.nc | 8 +- .../msp430/x2xxx/usci/Msp430SpiB0DmaP.nc | 8 +- tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc | 62 ++-- tos/platforms/shimmer/shimmerAnalogSetupP.nc | 32 +- 23 files changed, 674 insertions(+), 754 deletions(-) create mode 100644 tos/chips/msp430/dma/HplMsp430DmaChannelP.nc rename tos/chips/msp430/dma/{HplMsp430DmaP.nc => HplMsp430DmaControlP.nc} (77%) delete mode 100644 tos/chips/msp430/dma/HplMsp430DmaXP.nc diff --git a/tos/chips/msp430/00_Chip_Notes b/tos/chips/msp430/00_Chip_Notes index 681776178a..1eaf8c85c6 100644 --- a/tos/chips/msp430/00_Chip_Notes +++ b/tos/chips/msp430/00_Chip_Notes @@ -102,12 +102,14 @@ dma: potential for 1 to 8 independent dma channels. (We only use processors tha channels, including the x5). MSP430X cpus can address 20 bits via the DMA engines. 20 bits increases the overhead significantly and should only be used if really needed. ie. Most cpus only provide RAM in the lower 64K so there really isn't much need for - 20 bit addresses, unless one is DMAing out of high memory (ROM). + 20 bit addresses, unless one is DMAing out of high memory (ROM). DMAing into ROM is + left as an exercise for the student (there really is an application for this). Currently, only a 16 bit dma interface is provided. In the future a dma32 interface could be defined to provide access to the full 20 bits of addressing. This should wait until - there is an explicit need to access memory above 64K (ie. DMA out of ROM). Until then who - cares. + there is an explicit need to access memory above 64K (ie. DMA out of ROM). It is possible + to still keep a singular driver by keying off the size of the address pointers passed into + the various routines. Until then who cares. __MSP430_HAS_DMA_3__ 3 channel, 16 bit addresses (x1) __MSP430_HAS_DMAX_3__ 3 channel, 20 bit addresses (x2, x5). @@ -115,8 +117,8 @@ dma: potential for 1 to 8 independent dma channels. (We only use processors tha x5 processors have the potential for significantly more triggers than x1 or x2 processors. This is indicated by the presence of DMA0TSEL4 (a 5th TSEL bit, DMA0 is in the unshifted lsb position). The larger TSEL field changes the format for DMACTRLn and changes the - number of registers. This also changes where the Common Control work lives. This controls - different things depending on the processor but includes RoundRobin and ENNMI. + number of registers. This also changes where the common control register lives. This + controls different things depending on the processor but includes RoundRobin and ENNMI. pins: interface to digital I/O. Different processors can have radically different amounts of digitial I/O. These pins are organized into ports. x2 and x5 processors have enhanced diff --git a/tos/chips/msp430/01_Dependencies b/tos/chips/msp430/01_Dependencies index cd07291fcd..9455542994 100644 --- a/tos/chips/msp430/01_Dependencies +++ b/tos/chips/msp430/01_Dependencies @@ -2,7 +2,7 @@ CPU families: We currently define 3 cpu families that group similar TI msp430 chips together. Two chips -can be grouped together if for that module or interface the behaviour is the similar enough. +can be grouped together if the module/interface behaviour is similar enough. The main family is simply "msp430" and whenever possible we endevour to put everything we can into the generic msp430 directory. This is the top level. However when it becomes too cumbersome to make @@ -117,14 +117,24 @@ DMA: The lower 16 bit object is equivilent to a DMA address on a non-DMAX module. When this lower object is written the upper is automatically zeroed. This provides backward compatibility for drivers written for non-DMAX modules. These drivers will work fine with DMAX modules - when accessing the lower 64K of memory. + when accessing the lower 64K of memory. We will provide a dma16 driver initially and will + support 20 bits when there is a well defined need to do so. Under what circumstances does + one actually want to dma out of ROM? Please feel free to dma into ROM :-) -2) DMA Transfer select. Transfer select fields determine what a DMA engine (channel) should - use to initiate a transfer cycle. These fields maybe 4 or 5 bits wide and the driver needs - to know how to construct an appropriate control word when interacting with the h/w. +2) TSEL size. Transfer_Select determines what triggers a DMA cycle. + TSEL is 4 bits on x1 and x2 processors and 5 bits on x5 cpus. + +3) TSEL values. Trigger values depend tightly on h/w present (processor dependent) and visible + to client. Can this be hidden from the application layer? + +4) TSEL location. 3 channels using 4 bit TSELs will fit in one 16 bit control word (x1, x2 + processors). The x5 uses 5 bit TSELS organized 2 TSELs per 16 bit word. (one per byte). + DMA_TSEL_BASE, TSEL_MASK and TSEL_SHIFT values will vary depending on processor family. + +5) Operation Control word. This control word on the x1/x2 processors controls DMA_ONFETCH, + ROUND_ROBIN, and ENNMI. (DMACTL1). The x5 replaces DMA_ONFETCH with DMARMWDIS which + disallows dma transfers form oocuring whil read-modify-write operations are occuring. - x1xxx and x2xxx support 4 bit triggers. x5xxx cpus support 5 bit triggers. Number of triggers - can be determined by looking at what TSEL bits are defined in the cpu header files. 3) Interrupt vector: @@ -134,7 +144,8 @@ DMA: The driver uses either DACDMA_VECTOR or DMA_VECTOR if defined. Otherwise complains about lack of support. -4) Clocks. + +Clocks: The x1xxx family has the original basic clock system (BCS) and has a 3 bit range select field. The x2xxx family has revision 2 of this system (BC2) with a 4 bit range field but is essentially @@ -142,7 +153,8 @@ DMA: The x5xxx family has the Unified Clock System which is different (__MSP430_HAS_UCS__). -5) I0 Port naming. + +I0 Port naming: TI defines 8 bit numbered ports (P1 ... P). In later families 16 bit lettered ports PORTA, etc. are also defined. Layout of these ports varies by family. In later parts, lettered ports are diff --git a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc index 09118b377f..9315ea2a5b 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc @@ -55,6 +55,23 @@ implementation MULTIPLE_SINGLE_AGAIN, }; + /* + * ADC12_DMA_OP_CTRL is set depending on what class of machine the + * DMA is running on. X5 cpus define DMARWMDIS instead of DMAONFETCH. + * + * We set ENNMI, no Round Robin, and then either DMARWMDIS or + * DMAONFETCH depending on the cpu family. Existence of DMARWMDIS + * which comes from the cpu dependent headers determines which + * family we are on and how the DMA engine behaves. + */ +enum { +#ifdef DMARMWDIS + ADC12_DMA_OP_CTRL = (DMARMWDIS | ENNMI), // x5 flavor +#else + ADC12_DMA_OP_CTRL = (DMAONFETCH | ENNMI), // x1/x2 flavor +#endif + }; + // norace declarations are safe here, because Msp430Adc12P.nc implements // a lock mechanism which guarantees that no two clients can access the ADC // and the module variables below are only changed after the lock was acquired @@ -86,21 +103,18 @@ implementation // the end of the whole sequence and DMA has done all the copying error_t result = call SubSingleChannel.configureSingleRepeat[id](config, jiffies); if (result == SUCCESS){ - call DMAControl.init(); - call DMAControl.setFlags(ENABLE_NMI, NOT_ROUND_ROBIN, ON_FETCH); + call DMAControl.reset(); + call DMAControl.setOpControl(ADC12_DMA_OP_CTRL); call DMAChannel.setupTransfer( - DMA_REPEATED_SINGLE_TRANSFER, - DMA_TRIGGER_ADC12IFGx, - DMA_EDGE_SENSITIVE, - (void*) ADC12MEM_, - buf, - length, - DMA_WORD, - DMA_WORD, - DMA_ADDRESS_UNCHANGED, - DMA_ADDRESS_INCREMENTED - ); - call DMAChannel.startTransfer(); + DMA_DT_RPT | DMA_DT_SINGLE | // repeated single, edge sensitive + DMA_SW_DW | // SRC word, DST word + DMA_SRC_NO_CHNG | // SRC address, no increment + DMA_DST_INC, // DST address, increment + DMA_TRIGGER_ADC12IFG, + (uint16_t) ADC12MEM_, + (uint16_t) buf, + length); + call DMAChannel.enableDma(); client = id; mode = _mode; buffer = buf; @@ -127,7 +141,7 @@ implementation async command error_t SingleChannel.getData[uint8_t id]() { if (mode == MULTIPLE_SINGLE_AGAIN) - call DMAChannel.repeatTransfer((void*) ADC12MEM_, buffer, numSamples); + call DMAChannel.repeatDma((uint16_t) ADC12MEM_, (uint16_t) buffer, numSamples); return call SubSingleChannel.getData[id](); } @@ -154,7 +168,7 @@ implementation next = signal SingleChannel.multipleDataReady[client](buffer, numSamples); if (oldMode == MULTIPLE_REPEAT) if (next){ - call DMAChannel.repeatTransfer((void*) ADC12MEM_, next, numSamples); + call DMAChannel.repeatDma((uint16_t) ADC12MEM_, (uint16_t) next, numSamples); call AsyncAdcControl.start[client](); } else call AsyncAdcControl.stop[client](); diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc index 7e88ddaaf7..1a0afb0777 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaC.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaC.nc @@ -49,23 +49,27 @@ configuration HplMsp430DmaC { implementation { - components HplMsp430DmaP; - components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_, - DMA0SZ_, DMA0TSEL_MASK, - DMA0TSEL_SHIFT ) as Dma0; - components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_, - DMA1SZ_, DMA1TSEL_MASK, - DMA1TSEL_SHIFT ) as Dma1; - components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_, - DMA2SZ_, DMA2TSEL_MASK, - DMA2TSEL_SHIFT ) as Dma2; + components HplMsp430DmaControlP as ControlP; + components new + HplMsp430DmaChannelP(DMA0CTL_, DMA0SA_, DMA0DA_, DMA0SZ_, + TSEL0_BASE, TSEL_MASK, TSEL0_SHIFT) + as Dma0P; - Control = HplMsp430DmaP; - Channel0 = Dma0; - Channel1 = Dma1; - Channel2 = Dma2; - Dma0.Interrupt -> HplMsp430DmaP; - Dma1.Interrupt -> HplMsp430DmaP; - Dma2.Interrupt -> HplMsp430DmaP; + components new + HplMsp430DmaChannelP(DMA1CTL_, DMA1SA_, DMA1DA_, DMA1SZ_, + TSEL1_BASE, TSEL_MASK, TSEL1_SHIFT) + as Dma1P; + components new + HplMsp430DmaChannelP(DMA2CTL_, DMA2SA_, DMA2DA_, DMA2SZ_, + TSEL2_BASE, TSEL_MASK, TSEL2_SHIFT) + as Dma2P; + + Control = ControlP; + Channel0 = Dma0P; + Channel1 = Dma1P; + Channel2 = Dma2P; + Dma0P.Interrupt -> ControlP; + Dma1P.Interrupt -> ControlP; + Dma2P.Interrupt -> ControlP; } diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc index fa3a54a2d7..ec3c64fd2d 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc @@ -34,54 +34,65 @@ * * @author Ben Greenstein * @author Eric B. Decker + * + * See Msp430Dma.h for major changes. */ +#include + interface HplMsp430DmaChannel { - async command error_t setTrigger(dma_trigger_t trigger); - async command void clearTrigger(); - async command void setSingleMode(); - async command void setBlockMode(); - async command void setBurstMode(); - async command void setRepeatedSingleMode(); - async command void setRepeatedBlockMode(); - async command void setRepeatedBurstMode(); - async command void setSrcNoIncrement(); - async command void setSrcDecrement(); - async command void setSrcIncrement(); - async command void setDstNoIncrement(); - async command void setDstDecrement(); - async command void setDstIncrement(); - async command void setWordToWord(); - async command void setByteToWord(); - async command void setWordToByte(); - async command void setByteToByte(); - async command void setEdgeSensitive(); - async command void setLevelSensitive(); - async command void enableDMA(); - async command void disableDMA(); + /* + * Set/Get the DMA Channel Control word. + * + * Use cpu defines to control a dma channel. ie. + * + * call DMA.setChannelControl( DMA_DT_SINGLE | DMA_DT_RPT | DMASBDB + * | DMA_SRC_INC | DMA_DST_INC | DMAEN); + * + * You should leave the following bits alone: + * + * DMAREQ, DMAABORT, DMAIE, and DMAIFG + * + * There are seperate routines for manipulating or testing + * those bits. + */ + async command void setChannelControl(uint16_t ctl); + async command uint16_t getChannelControl(); + + async command error_t setTrigger(dma_trigger_t trigger); + async command dma_trigger_t getTrigger(); + + async command void enableDMA(); + async command void disableDMA(); + + async command void enableInterrupt(); + async command void disableInterrupt(); + + async command bool interruptPending(); + async command void clearInterrupt(); - async command void enableInterrupt() ; - async command void disableInterrupt() ; + async command bool aborted(); - async command bool interruptPending(); + async command void triggerDMA(); - async command bool aborted(); - async command void triggerDMA(); + async command void setSrc(uint16_t saddr); + async command void* getSrc(); - async command void setSrc(void *saddr); - async command void setDst(void *daddr); - async command void setSize(uint16_t sz); + async command void setDst(uint16_t daddr); + async command void* getDst(); - async command void setState(dma_channel_state_t s, dma_channel_trigger_t t, void* src, void* dest, uint16_t size); - async command void setStateRaw(uint16_t state, uint16_t trigger, void* src, void* dest, uint16_t size); - async command dma_channel_state_t getState(); - async command void* getSource(); - async command void* getDestination(); - async command uint16_t getSize(); - async command dma_channel_trigger_t getTrigger(); + async command void setSize(uint16_t sz); + async command uint16_t getSize(); - async command void reset(); + /* + * Channel Reset + * + * Turn a dma channel off. Force reset. + * will set Channel Control to 0 + * will set Channel trigger to 0 + */ + async command void reset(); - async event void transferDone(error_t success); + async event void transferDone(error_t success); } diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc new file mode 100644 index 0000000000..60cd3cfdec --- /dev/null +++ b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc @@ -0,0 +1,188 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Ben Greenstein + * @author Joe Polastre + * @author Mark Hays + * @author Eric B. Decker + */ + +#if !defined(__MSP430_HAS_DMA_3__) && !defined(__MSP430_HAS_DMAX_3__) +#error "HplMsp430DmaChannelP: processor not supported, need DMA_3 or DMAX_3" +#endif + +/* + * Define a DMA channel. + * + * DMAxCTL: Channel control word. ie. DMA0CTL (control word for + * channel 0. This word contains various selects including + * byte/word, transfer mode, increment, DMAEN, DMAIE, DMAIFG, etc. + * + * It is intended that DMAxCTL is set using various defines from + * a processor specific include. ie. + * + * call DMA.setChannelControl(DMA_DT_SINGLE | DMASWDW | DMAEN + * | DMASRC_INC | DMADST_INC); + * + * DMAxSA: Channel Source Address. 16 bits. + * DMAxDA: Channel Dest Address. 16 bits. + * DMAxSZ: Channel Size. 16 bits. 1 - 65535 bytes or words. 0 disables. + * TSEL_base: byte pointer to TSEL (trigger select) control word. If TSEL is + * 4 bits, there are two TSELs per word. 5 bit TSELs show up one + * byte. + * TSEL_mask: 0xf for 4 bit TSELs and 0x1f for 5 bit. + * TSEL_shift: Used to select either the left nibble or right nibble of the + * TSEL byte. + * + * Actual values for these puppies are set in Msp430Dma.h based on what + * processor is being used. + */ + +generic module + HplMsp430DmaChannelP( uint16_t DMAxCTL_addr, + uint16_t DMAxSA_addr, + uint16_t DMAxDA_addr, + uint16_t DMAxSZ_addr, + uint16_t DMAxTSEL_base, + uint16_t DMAxTSEL_mask, + uint16_t DMAxTSEL_shift) @safe() { + + provides interface HplMsp430DmaChannel as DMA; + uses interface HplMsp430DmaInterrupt as Interrupt; + +} + +implementation { + +#define DMAxCTL (*(volatile TYPE_DMA0CTL *) DMAxCTL_addr) +#define DMAxSA (*(volatile TYPE_DMA0SA *) DMAxSA_addr) +#define DMAxDA (*(volatile TYPE_DMA0DA *) DMAxDA_addr) +#define DMAxSZ (*(volatile TYPE_DMA0SZ *) DMAxSZ_addr) +#define TSEL (*(volatile TYPE_DMACTL0 *) DMAxTSEL_base) + + async command void DMA.setChannelControl(uint16_t ctl) { + DMAxCTL = ctl; + } + + async command uint16_t DMA.getChannelControl() { + return DMAxCTL; + } + + async error_t command DMA.setTrigger( dma_trigger_t trigger ) { + if ( DMAxCTL & DMAEN ) + return FAIL; + atomic { + TSEL = ((TSEL & ~(DMAxTSEL_mask << DMAxTSEL_shift)) | + ((trigger & DMAxTSEL_mask) << DMAxTSEL_shift)); + } + return SUCCESS; + } + + async command dma_trigger_t DMA.getTrigger() { + atomic { + return ((TSEL >> DMAxTSEL_shift) & DMAxTSEL_mask); + } + } + + async command void DMA.enableDMA() { + DMAxCTL |= DMAEN; + } + + async command void DMA.disableDMA() { + DMAxCTL &= ~DMAEN; + } + + async command void DMA.enableInterrupt() { + DMAxCTL |= DMAIE; + } + + async command void DMA.disableInterrupt() { + DMAxCTL &= ~DMAIE; + } + + async command bool DMA.interruptPending() { + return (DMAxCTL & DMAIFG); + } + + async command void DMA.clearInterrupt() { + DMAxCTL &= ~DMAIFG; + } + + async command bool DMA.aborted() { + return (DMAxCTL & DMAABORT); + } + + async command void DMA.triggerDMA() { + DMAxCTL |= DMAREQ; + } + + async command void DMA.setSrc(uint16_t saddr) { + DMAxSA = ((uint16_t) saddr); + } + + async command void* DMA.getSrc() { + return ((void*) DMAxSA); + } + + async command void DMA.setDst(uint16_t daddr) { + DMAxDA = ((uint16_t) daddr); + } + + async command void* DMA.getDst() { + return ((void*) DMAxDA); + } + + async command void DMA.setSize(uint16_t sz) { + DMAxSZ = sz; + } + + async command uint16_t DMA.getSize() { + return DMAxSZ; + } + + async command void DMA.reset() { + call DMA.setChannelControl(0); /* will kill DMAEN */ + call DMA.setTrigger(0); /* will set to sw/dmareq */ + } + + async event void Interrupt.fired() { + error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS; + if ( DMAxCTL & DMAIFG ) { + DMAxCTL &= ~DMAIFG; + DMAxCTL &= ~DMAABORT; + signal DMA.transferDone( error ); + } + } +} diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc index 0e487bd1fe..15dc6c224d 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaControl.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaControl.nc @@ -39,14 +39,7 @@ #include "Msp430Dma.h" interface HplMsp430DmaControl { - - async command void setOnFetch(); - async command void clearOnFetch(); - async command void setRoundRobin(); - async command void clearRoundRobin(); - async command void setENNMI(); - async command void clearENNMI(); - async command void setState(dma_state_t s); - async command dma_state_t getState(); - async command void reset(); + async command void setOpControl(uint16_t op); + async command uint16_t getOpControl(); + async command void reset(); } diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaControlP.nc similarity index 77% rename from tos/chips/msp430/dma/HplMsp430DmaP.nc rename to tos/chips/msp430/dma/HplMsp430DmaControlP.nc index a7fe71e511..12cac85a18 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaControlP.nc @@ -40,6 +40,8 @@ * @author Eric B. Decker */ +#include "Msp430Dma.h" + #if !defined(__MSP430_HAS_DMA_3__) && !defined(__MSP430_HAS_DMAX_3__) #error "HplMsp430DmaP: processor not supported, need DMA_3 or DMAX_3" #endif @@ -56,55 +58,28 @@ #error "DMA VECTOR not defined for cpu selected" #endif -module HplMsp430DmaP { +module HplMsp430DmaControlP { provides interface HplMsp430DmaControl as DmaControl; provides interface HplMsp430DmaInterrupt as Interrupt; } implementation { - MSP430REG_NORACE( DMACTL0 ); - MSP430REG_NORACE( DMACTL1 ); - - TOSH_SIGNAL(XX_DMA_VECTOR_XX) { - signal Interrupt.fired(); - } - - async command void DmaControl.setOnFetch(){ - DMACTL1 |= DMAONFETCH; - } - - async command void DmaControl.clearOnFetch(){ - DMACTL1 &= ~DMAONFETCH; - } - - async command void DmaControl.setRoundRobin(){ - DMACTL1 |= ROUNDROBIN; - } - async command void DmaControl.clearRoundRobin(){ - DMACTL1 &= ~ROUNDROBIN; - } - - async command void DmaControl.setENNMI(){ - DMACTL1 |= ENNMI; - } +#define DMA_OP_CTRL (*(volatile uint8_t *) DMA_OP_CTRL_) - async command void DmaControl.clearENNMI(){ - DMACTL1 &= ~ENNMI; + async command void DmaControl.setOpControl(uint16_t op) { + DMA_OP_CTRL = op; } - async command void DmaControl.setState(dma_state_t s){ - DMACTL1 = *(int*)&s; + async command uint16_t DmaControl.getOpControl() { + return DMA_OP_CTRL; } - async command dma_state_t DmaControl.getState(){ - dma_state_t s; - s = *(dma_state_t*)&DMACTL1; - return s; + async command void DmaControl.reset(){ + DMA_OP_CTRL = 0; } - async command void DmaControl.reset(){ - DMACTL0 = 0; - DMACTL1 = 0; + TOSH_SIGNAL(XX_DMA_VECTOR_XX) { + signal Interrupt.fired(); } } diff --git a/tos/chips/msp430/dma/HplMsp430DmaXP.nc b/tos/chips/msp430/dma/HplMsp430DmaXP.nc deleted file mode 100644 index a109875b0e..0000000000 --- a/tos/chips/msp430/dma/HplMsp430DmaXP.nc +++ /dev/null @@ -1,268 +0,0 @@ -/* - * Copyright (c) 2011 Eric B. Decker - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @author Mark Hays - * @author Eric B. Decker - */ - -#if !defined(__MSP430_HAS_DMA_3__) && !defined(__MSP430_HAS_DMAX_3__) -#error "HplMsp430DmaXP: processor not supported, need DMA_3 or DMAX_3" -#endif - -generic module HplMsp430DmaXP( uint16_t DMAxCTL_addr, - uint16_t DMAxSA_addr, - uint16_t DMAxDA_addr, - uint16_t DMAxSZ_addr, - uint16_t DMAxTSEL_mask, - uint16_t DMAxTSEL_shift ) @safe() { - - provides interface HplMsp430DmaChannel as DMA; - uses interface HplMsp430DmaInterrupt as Interrupt; - -} - -implementation { - - MSP430REG_NORACE( DMACTL0 ); - -#define DMAxCTL (*(volatile TYPE_DMA0CTL*)DMAxCTL_addr) -#define DMAxSA (*(volatile TYPE_DMA0SA*)DMAxSA_addr) -#define DMAxDA (*(volatile TYPE_DMA0DA*)DMAxDA_addr) -#define DMAxSZ (*(volatile TYPE_DMA0SZ*)DMAxSZ_addr) - - async event void Interrupt.fired() { - error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS; - if ( DMAxCTL & DMAIFG ) { - DMAxCTL &= ~DMAIFG; - DMAxCTL &= ~DMAABORT; - signal DMA.transferDone( error ); - } - } - - async error_t command DMA.setTrigger( dma_trigger_t trigger ) { - - if ( DMAxCTL & DMAEN ) - return FAIL; - - DMACTL0 = ( ( DMACTL0 & ~DMAxTSEL_mask ) | - ( ( trigger << DMAxTSEL_shift ) & DMAxTSEL_mask ) ); - - return SUCCESS; - - } - - async command void DMA.clearTrigger() { - DMACTL0 &= ~DMAxTSEL_mask; - } - - async command void DMA.setSingleMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_SINGLE_TRANSFER; - } - - async command void DMA.setBlockMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_BLOCK_TRANSFER; - } - - async command void DMA.setBurstMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_BURST_BLOCK_TRANSFER; - } - - async command void DMA.setRepeatedSingleMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_SINGLE_TRANSFER; - } - - async command void DMA.setRepeatedBlockMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_BLOCK_TRANSFER; - } - - async command void DMA.setRepeatedBurstMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_BURST_BLOCK_TRANSFER; - } - - async command void DMA.setSrcNoIncrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_UNCHANGED; - } - - async command void DMA.setSrcDecrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_DECREMENTED; - } - - async command void DMA.setSrcIncrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_INCREMENTED; - } - - async command void DMA.setDstNoIncrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_UNCHANGED; - } - - async command void DMA.setDstDecrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_DECREMENTED; - } - - async command void DMA.setDstIncrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_INCREMENTED; - } - - async command void DMA.setWordToWord() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASWDW; - } - - async command void DMA.setByteToWord() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASBDW; - } - - async command void DMA.setWordToByte() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASWDB; - } - - async command void DMA.setByteToByte() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASBDB; - } - - async command void DMA.setEdgeSensitive() { - DMAxCTL &= ~DMALEVEL; - } - - async command void DMA.setLevelSensitive() { - DMAxCTL |= DMALEVEL; - } - - async command void DMA.enableDMA() { - DMAxCTL |= DMAEN; - } - - async command void DMA.disableDMA() { - DMAxCTL &= ~DMAEN; - } - - async command void DMA.enableInterrupt() { - DMAxCTL |= DMAIE; - } - - async command void DMA.disableInterrupt() { - DMAxCTL &= ~DMAIE; - } - - async command bool DMA.interruptPending() { - return !!( DMAxCTL & DMAIFG ); - } - - async command bool DMA.aborted() { - return !!( DMAxCTL & DMAABORT ); - } - - async command void DMA.triggerDMA() { - DMAxCTL |= DMAREQ; - } - - async command void DMA.setSrc( void *saddr ) { - DMAxSA = (uint16_t)saddr; - } - - async command void DMA.setDst( void *daddr ) { - DMAxDA = (uint16_t)daddr; - } - - async command void DMA.setSize( uint16_t sz ) { - DMAxSZ = sz; - } - - async command void DMA.setState( dma_channel_state_t s, - dma_channel_trigger_t t, - void* src, void* dest, - uint16_t size ) { - call DMA.setStateRaw( *(uint16_t*)&s, *(uint16_t*)&t, - src, dest, size); - } - - async command void DMA.setStateRaw( uint16_t s, uint16_t t, - void* src, void* dest, - uint16_t size ) { - DMAxSA = (uint16_t)src; - DMAxDA = (uint16_t)dest; - DMAxSZ = size; - call DMA.setTrigger((dma_trigger_t) t); - DMAxCTL = s; - } - - async command dma_channel_state_t DMA.getState() { - dma_channel_state_t s = *(dma_channel_state_t*) &DMAxCTL; - return s; - } - - async command void* DMA.getSource() { - return (void*)DMAxSA; - } - - async command void* DMA.getDestination() { - return (void*)DMAxDA; - } - - async command uint16_t DMA.getSize() { - return DMAxSZ; - } - - async command dma_channel_trigger_t DMA.getTrigger() { - dma_channel_trigger_t t; - t.trigger = ( DMACTL0 & DMAxTSEL_mask ) >> DMAxTSEL_shift; - return t; - } - - async command void DMA.reset() { - DMAxCTL = 0; - DMAxSA = 0; - DMAxDA = 0; - DMAxSZ = 0; - } -} - diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h index 0aaf08678d..cd30e1a236 100644 --- a/tos/chips/msp430/dma/Msp430Dma.h +++ b/tos/chips/msp430/dma/Msp430Dma.h @@ -37,170 +37,222 @@ * @author Jonathan Hui * @author Mark Hays * @author Eric B. Decker - */ - -/* - * This approach is broken. * - * This file is defining alot of h/w definitions which should come from the cpu - * definition file. This file should define what is needed for the interface between - * tinyos and the h/w. + * Major rewrite: 4/4/2011 (is that US or European order?) + * Rewrite to support the x1, x2, and x5 families, single driver. + * + * + * - Make a minimal driver. Only include what is actually used and no more. + * Simplify what one needs to pay attention to and what needs to be + * supported. + * + * - Remove internal state variable. Make the h/w be the keeper of the faith. + * This is fine as long as the h/w tells the truth. If we think in the + * future that there is an issue with the h/w then we will need to revisit + * this. This also works because there is no write only h/w nonsense. + * + * - Eliminate redefinition of h/w defines in Msp430Dma.h. Rather force use + * of the h/w defines provided by cpu headers (ie. msp430/include/ + * msp430f1611.h). This allows us to adapt the code for different processors + * (ie. x1 vs x2 vs x5) without having our own processor dependent files we + * have to find. + * + * + * - DMA OpControl + * + * each DMA Controller (as opposed to a DMA Channel) has 3 bits that control + * certain parameters of the overall DMA operations. + * + * x1/x2: DMAONFETCH, ROUNDROBIN, and ENNMI. + * x5: DMARMWDIS, ROUNDROBIN, and ENNMI. + * + * These are set via (HplMsp430DmaControlP) DmaControl. We default to all + * off. This can be overridden by use of the DmaControl.setOpControl + * interface. Note: turning on DMAONFETCH or DMARMWDIS will slow the DMA + * down but possibly avoids DMA/cpu interaction side effects. + * * - * Currently only works for 3 channel DMA and 4 bit TSEL fields. ie. x1xxx and - * x2xxx processors. This will need to be reworked for the 5438 with 5 bit - * TSEL fields. + * - 3 vars control Trigger Select. * - * This file defines how many channels are available but this should come from - * the cpu definition file. + * TSEL_BASE: address of control word. Indicates where trigger + * select for a given DMA channel lives. + * TSEL_SHIFT: Any shift needed (left shift) to find where TSEL starts. + * TSEL_MASK: Mask denoting how wide TSEL is (4 or 5 bits). * - * This file defines what the Triggers (Transfer select) values are and how - * wide the field is. + * These are established when creating a DMA channel via HplMsp430DmaChannelP. * - * Needs to be rewritten. Possible approach is to abstract the request which - * then maps it into the appropriate TSEL value. Driver needs to compensate - * for the TSEL width and needs to know how to correctly build the control - * word for the h/w. + * WARNING: Care must be taken when accessing the control cells where TSEL lives. + * On the x1 and x2 processors, these control cells live in the 16 bit i/o memory + * starting at 0x0100. This area MUST be accessed using only 16 bit instructions, + * ie. mov not mov.b. mov.b to an odd IO16 address does nothing. mov.b to + * an even IO16 will zero the upper byte. * - * Want to start moving this to a less cpu centric abstraction layer. + * + * - Interrupt Vector + * + * The x1 processors have no DMAIV register, so determining which dma engine + * is interrupting has do be done by hand. The x2 and x5 processors provide + * the DMAIV register which indicates which channel is interrupting. + * + * - DMA Channel Control is the same across all three processor families. + * + * - DMA trigger values are provided by the dma_trigger_t enum. It changes + * for the different processor being selected. The names are carefully + * chosen so a compile error will be generated if used on processor where + * the trigger value isn't supported. */ #ifndef MSP430DMA_H #define MSP430DMA_H -// General stuff -enum { - DMA_CHANNELS = 3 -}; - -enum { - DMA_CHANNEL0 = 0, - DMA_CHANNEL1 = 1, - DMA_CHANNEL2 = 2, - DMA_CHANNEL_UNKNOWN = 3 -}; - -enum { - DMA_CHANNEL_AVAILABLE = 0, - DMA_CHANNEL_IN_USE = 1 -}; - -//////////////////////////////////////// -// Per-channel fields in DMACTL0 -enum { - DMA0TSEL_SHIFT = 0, - DMA1TSEL_SHIFT = 4, - DMA2TSEL_SHIFT = 8, - DMATSEL_MASK = (uint16_t)0xf, - DMA0TSEL_MASK = ( 0xf ), - DMA1TSEL_MASK = ( 0xf0 ), - DMA2TSEL_MASK = ( 0xf00 ), -}; - -// Per-field (channel) in DMACTL0 +/* + * We key off the existence of the 5th TSEL bit. If TSEL4 is defined + * then we assume we have an x5 family processor. + * + * x5 (TSEL4 defined): + * + * TSEL registers (DMACTL{0,1} start at 0x500 (DMACTL0_). + * TSEL is 5 bits and packed one TSEL field per byte. + * TSEL_SHIFT denotes which byte. + * OpControl (DMACTL4_) is at 0x508, and is DMARMWDIS | ROUNDROBIN | ENNMI. + * + * x1/x2 (TSEL4 not defined): + * + * TSEL fields live in DMACTL0 0x122. + * TSEL is 4 bits and packed two TSEL fields per byte. + * TSEL_SHIFT denotes which nibble. + * OpControl (DMACTL1_) is at 0x124, and is DMAONFETCH | ROUNDROBIN | ENNMI. + */ + +#if defined(OLD_TOOLCHAIN) && defined(__msp430x26x) && !defined(DMA0TSEL_12) +/* + * The old toolchain uses msp430/dma.h to define stuff for the dma engines. + * The defines are based on the 1st gen and don't define TSEL_12/13. The + * 261x cpus use TSEL_12/13 as triggers for UCSI_B. + * + * New toolchains use the TI HEADERS which define everything correctly. So + * OLD_TOOLCHAIN only needs to be defined if still using the old toolchain + * and compiling a program for a 261x cpu. The old toolchain doesn't handle + * newer chips properly so don't bother. + */ +#define DMA0TSEL_12 12 +#define DMA0TSEL_13 13 +#endif + +#ifdef DMA0TSEL4 +/* DMA0TSEL4 is defined --> 5 bit --> x5 family */ + +#define TSEL_MASK 0x1f + +#define TSEL0_BASE DMACTL0_ +#define TSEL0_SHIFT 0 +#define TSEL1_BASE DMACTL0_ +#define TSEL1_SHIFT 8 +#define TSEL2_BASE DMACTL1_ +#define TSEL2_SHIFT 0 + +#define DMA_OP_CTRL_ DMACTL4_ + typedef enum { - DMA_TRIGGER_DMAREQ = 0x0, // software trigger - DMA_TRIGGER_TACCR2 = 0x1, - DMA_TRIGGER_TBCCR2 = 0x2, - DMA_TRIGGER_URXIFG0 = 0x3, // RX on USART0 (UART/SPI) - DMA_TRIGGER_UTXIFG0 = 0x4, // TX on USART0 (UART/SPI) - DMA_TRIGGER_DAC12IFG = 0x5, // DAC12_0CTL DAC12IFG bit - DMA_TRIGGER_ADC12IFGx = 0x6, - DMA_TRIGGER_TACCR0 = 0x7, // CCIFG bit - DMA_TRIGGER_TBCCR0 = 0x8, // CCIFG bit - DMA_TRIGGER_URXIFG1 = 0x9, // RX on USART1 (UART/SPI) - DMA_TRIGGER_UTXIFG1 = 0xa, // TX on USART1 (UART/SPI) - DMA_TRIGGER_MULT = 0xb, // Hardware Multiplier Ready - DMA_TRIGGER_DMAxIFG = 0xe, // DMA0IFG triggers DMA channel 1 - // DMA1IFG triggers DMA channel 2 - // DMA2IFG triggers DMA channel 0 - DMA_TRIGGER_DMAE0 = 0xf // External Trigger DMAE0 + DMA_TRIGGER_DMAREQ = DMA0TSEL_0, // DMA_REQ (sw) + DMA_TRIGGER_TA0CCR2 = DMA0TSEL_1, // Timer0_A (TA0CCR0.IFG) + DMA_TRIGGER_TA0CCR2 = DMA0TSEL_2, // Timer0_A (TA0CCR2.IFG) + DMA_TRIGGER_TA1CCR0 = DMA0TSEL_3, // Timer1_A (TA1CCR0.IFG) + DMA_TRIGGER_TA1CCR2 = DMA0TSEL_4, // Timer1_A (TA1CCR2.IFG) + DMA_TRIGGER_TB0CCR0 = DMA0TSEL_5, // TimerB (TB0CCR0.IFG) + DMA_TRIGGER_TB0CCR2 = DMA0TSEL_6, // TimerB (TB0CCR2.IFG) + + /* 7 through 15 are reserved */ + + DMA_TRIGGER_UCA0RXIFG = DMA0TSEL_16, // USCIA0 receive + DMA_TRIGGER_UCA0TXIFG = DMA0TSEL_17, // USCIA0 transmit + DMA_TRIGGER_UCB0RXIFG = DMA0TSEL_18, // USCIB0 receive + DMA_TRIGGER_UCB0TXIFG = DMA0TSEL_19, // USCIB0 transmit + DMA_TRIGGER_UCA1RXIFG = DMA0TSEL_20, // USCIA1 receive + DMA_TRIGGER_UCA1TXIFG = DMA0TSEL_21, // USCIA1 transmit + DMA_TRIGGER_UCB1RXIFG = DMA0TSEL_22, // USCIB1 receive + DMA_TRIGGER_UCB1TXIFG = DMA0TSEL_23, // USCIB1 transmit + DMA_TRIGGER_ADC12IFG = DMA0TSEL_24, // ADC12IFGx + + /* 25 - 28 are reserved. */ + + DMA_TRIGGER_MULT = DMA0TSEL_29, // Multiplier ready + DMA_TRIGGER_DMAxIFG = DMA0TSEL_30, // DMA0IFG triggers DMA channel 1 + // DMA1IFG triggers DMA channel 2 + // DMA2IFG triggers DMA channel 0 + DMA_TRIGGER_DMAE0 = DMA0TSEL_31, // ext. Trigger (DMAE0) } dma_trigger_t; -typedef struct dma_channel_trigger_s { - unsigned int trigger : 4; - unsigned int reserved : 12; -} __attribute__ ((packed)) dma_channel_trigger_t; - -//////////////////////////////////////// -// Bits in DMACTL1 -enum { - DISABLE_NMI = 0, - ENABLE_NMI = 1, -}; - -enum { - NOT_ROUND_ROBIN = 0, - ROUND_ROBIN = 1, -}; - -enum { - NOT_ON_FETCH = 0, - ON_FETCH = 1, -}; - -typedef struct dma_state_s { - unsigned int enableNMI : 1; - unsigned int roundRobin : 1; - unsigned int onFetch : 1; - unsigned int reserved : 13; -} __attribute__ ((packed)) dma_state_t; - -//////////////////////////////////////// -// Stuff in DMAxCTL - -// DMADTx -enum { - DMADT_SHIFT = 12, - DMADT_MASK = 0x7, -}; +#else +/* DMA0TSEL4 not defined --> 4 bit --> x1/x2 families */ -typedef enum { - DMA_SINGLE_TRANSFER = 0x0, - DMA_BLOCK_TRANSFER = 0x1, - DMA_BURST_BLOCK_TRANSFER = 0x2, - DMA_REPEATED_SINGLE_TRANSFER = 0x4, - DMA_REPEATED_BLOCK_TRANSFER = 0x5, - DMA_REPEATED_BURST_BLOCK_TRANSFER = 0x7 -} dma_transfer_mode_t; - -// DMA{SRC,DST}INCRx -enum { - DMASRCINCR_SHIFT = 8, - DMADSTINCR_SHIFT = 10, - DMAINCR_MASK = 0x3, -}; +#define TSEL_MASK 0xf -typedef enum { - DMA_ADDRESS_UNCHANGED = 0x0, - DMA_ADDRESS_DECREMENTED = 0x2, - DMA_ADDRESS_INCREMENTED = 0x3 -} dma_incr_t; +#define TSEL0_BASE DMACTL0_ +#define TSEL0_SHIFT 0 +#define TSEL1_BASE DMACTL0_ +#define TSEL1_SHIFT 4 +#define TSEL2_BASE DMACTL0_ +#define TSEL2_SHIFT 8 -typedef enum { - DMA_WORD = 0x0, - DMA_BYTE = 0x1 -} dma_byte_t; +#define DMA_OP_CTRL_ DMACTL1_ -// DMALEVEL typedef enum { - DMA_EDGE_SENSITIVE = 0x0, - DMA_LEVEL_SENSITIVE = 0x1 -} dma_level_t; - -typedef struct dma_channel_state_s { - unsigned int request : 1; - unsigned int abort : 1; - unsigned int interruptEnable : 1; - unsigned int interruptFlag : 1; - unsigned int enable : 1; - unsigned int level : 1; /* or edge- triggered */ - unsigned int srcByte : 1; /* or word */ - unsigned int dstByte : 1; - unsigned int srcIncrement : 2; /* or no-increment, decrement */ - unsigned int dstIncrement : 2; - unsigned int transferMode : 3; - unsigned int reserved2 : 1; -} __attribute__ ((packed)) dma_channel_state_t; + DMA_TRIGGER_DMAREQ = DMA0TSEL_0, // software trigger + DMA_TRIGGER_TACCR2 = DMA0TSEL_1, // TA CCR2.IFG + DMA_TRIGGER_TBCCR2 = DMA0TSEL_2, // TB CCR2.IFG + + DMA_TRIGGER_URXIFG0 = DMA0TSEL_3, // RX on USART0 (UART/SPI/I2C) + DMA_TRIGGER_UCA0RXIFG = DMA0TSEL_3, // also USCIA0 RX (x2) + + DMA_TRIGGER_UTXIFG0 = DMA0TSEL_4, // TX on USART0 (UART/SPI/I2C) + DMA_TRIGGER_UCA0TXIFG = DMA0TSEL_4, // also USCIA0 TX (x2) + + DMA_TRIGGER_DAC12IFG = DMA0TSEL_5, // DAC12_0CTL DAC12IFG bit + DMA_TRIGGER_ADC12IFG = DMA0TSEL_6, + DMA_TRIGGER_TACCR0 = DMA0TSEL_7, // CCIFG bit + DMA_TRIGGER_TBCCR0 = DMA0TSEL_8, // CCIFG bit + DMA_TRIGGER_URXIFG1 = DMA0TSEL_9, // RX on USART1 (UART/SPI) + DMA_TRIGGER_UCA1RXIFG = DMA0TSEL_9, // also USCIA1 RX (x2) + DMA_TRIGGER_UTXIFG1 = DMA0TSEL_10, // TX on USART1 (UART/SPI) + // also USCIA1 TX (x2) + DMA_TRIGGER_MULT = DMA0TSEL_11, // Hardware Multiplier Ready + + /* + * note: old mspgcc 3.2.3 toolchains don't define DMA0TSEL_12,13. Nor is + * it defined for the x1 processors no matter what. This is only a problem + * if compiling a x2 processor with the old toolchain and one needs to use + * USCIB0. Don't worry about it. + */ +#ifdef DMA0TSEL_12 + DMA_TRIGGER_UCB0RXIFG = DMA0TSEL_12, // USCIB0 receive (x2 only) + DMA_TRIGGER_UCB0TXIFG = DMA0TSEL_13, // USCIB0 receive (x2 only) +#endif + + DMA_TRIGGER_DMAxIFG = DMA0TSEL_14, // DMA0IFG triggers DMA channel 1 + // DMA1IFG triggers DMA channel 2 + // DMA2IFG triggers DMA channel 0 + DMA_TRIGGER_DMAE0 = DMA0TSEL_15 // External Trigger DMAE0 +} dma_trigger_t; #endif +#define DMA_SW_DW DMASWDW +#define DMA_SB_DW DMASBDW +#define DMA_SW_DB DMASWDB +#define DMA_SB_DB DMASBDB + +#define DMA_SRC_NO_CHNG DMASRCINCR_0 +#define DMA_SRC_DEC DMASRCINCR_2 +#define DMA_SRC_INC DMASRCINCR_3 + +#define DMA_DST_NO_CHNG DMADSTINCR_0 +#define DMA_DST_DEC DMADSTINCR_2 +#define DMA_DST_INC DMADSTINCR_3 + +#define DMA_DT_RPT DMADT_4 +#define DMA_DT_SINGLE DMADT_0 +#define DMA_DT_BLOCK DMADT_1 +#define DMA_DT_BURST_BLOCK DMADT_2 + +#endif // MSP430DMA_H diff --git a/tos/chips/msp430/dma/Msp430DmaC.nc b/tos/chips/msp430/dma/Msp430DmaC.nc index 629daf65fc..33ccd96e5f 100644 --- a/tos/chips/msp430/dma/Msp430DmaC.nc +++ b/tos/chips/msp430/dma/Msp430DmaC.nc @@ -77,7 +77,7 @@ implementation { components Msp430DmaControlP as ControlP; Control = ControlP; - ControlP.HplControl -> HplDmaC; + ControlP.HplControl -> HplDmaC; ControlP.HplChannel0 -> HplDmaC.Channel0; ControlP.HplChannel1 -> HplDmaC.Channel1; ControlP.HplChannel2 -> HplDmaC.Channel2; diff --git a/tos/chips/msp430/dma/Msp430DmaChannel.nc b/tos/chips/msp430/dma/Msp430DmaChannel.nc index 6e58bcd86e..f4997dbf7a 100644 --- a/tos/chips/msp430/dma/Msp430DmaChannel.nc +++ b/tos/chips/msp430/dma/Msp430DmaChannel.nc @@ -41,56 +41,26 @@ interface Msp430DmaChannel { - /** - * Setup a transfer using explicit argument (most robust and simple - * mechanism and recommended for novice users) - * - * See MSP430DMA.h for parameter options - */ - async command error_t setupTransfer( dma_transfer_mode_t transfer_mode, - dma_trigger_t trigger, - dma_level_t level, - void *src_addr, - void *dst_addr, - uint16_t size, - dma_byte_t src_byte, - dma_byte_t dst_byte, - dma_incr_t src_incr, - dma_incr_t dst_incr ); - - /** - * Raw interface for setting up a DMA transfer. This function is - * intended to provide as much raw performance as possible but - * sacrifices type checking in the process. Recommended ONLY for - * advanced users that have very intricate knowledge of the MSP430 - * DMA module described in the user's guide. - * - * @param state The control register value, as specified by - * dma_control_state_t in MSP430DMA.h - * @param trigger The trigger for the DMA transfer. Should be one - * of the options from dma_trigger_t in MSP430DMA.h - * @param src Pointer to the source address - * @param dest Pointer to the destination address - * @param size Size of the DMA transfer - * - * See MSP430DMA.h for parameter options - */ - async command void setupTransferRaw( uint16_t state, uint16_t trigger, - void* src, void* dest, int size ); + async command error_t setupTransfer(uint16_t control, + dma_trigger_t trigger, + uint16_t src_addr, + uint16_t dst_addr, + uint16_t size); /** * Enable the DMA module. Equivalent to setting the DMA enable bit. * This function does not force a transfer. */ - async command error_t startTransfer(); + async command error_t enableDma(); /** * Repeat a DMA transfer using previous settings but new pointers - * and transfer size. Automatically starts the transfer (sets the - * enable bit). + * and transfer size. Also sets the enable bit but doesn't + * necessarily start the transfer (depends on the dma settings. */ - async command error_t repeatTransfer( void *src_addr, void *dst_addr, - uint16_t size ); + async command error_t repeatDma(uint16_t src_addr, + uint16_t dst_addr, + uint16_t size); /** * Trigger a DMA transfer using software @@ -100,11 +70,10 @@ interface Msp430DmaChannel { /** * Stop a DMA transfer in progress */ - async command error_t stopTransfer(); + async command error_t stopDma(); /** * Notification that the transfer has completed */ async event void transferDone(error_t success); - } diff --git a/tos/chips/msp430/dma/Msp430DmaChannelP.nc b/tos/chips/msp430/dma/Msp430DmaChannelP.nc index 8cd4d6f28e..b1502ec761 100644 --- a/tos/chips/msp430/dma/Msp430DmaChannelP.nc +++ b/tos/chips/msp430/dma/Msp430DmaChannelP.nc @@ -42,64 +42,35 @@ #include "Msp430Dma.h" generic module Msp430DmaChannelP() { - provides interface Msp430DmaChannel as Channel; uses interface HplMsp430DmaChannel as HplChannel; - } implementation { - - norace dma_channel_state_t gChannelState; - norace dma_channel_trigger_t gChannelTrigger; - - async command void Channel.setupTransferRaw( uint16_t s, uint16_t t, - void* src, void* dest, - int size ) { - call HplChannel.setStateRaw( s, t, src, dest, size ); - } - - async command error_t Channel.setupTransfer( dma_transfer_mode_t transfer_mode, - dma_trigger_t trigger, - dma_level_t level, - void *src_addr, - void *dst_addr, - uint16_t size, - dma_byte_t src_byte, - dma_byte_t dst_byte, - dma_incr_t src_incr, - dma_incr_t dst_incr ) { - - gChannelState.request = 0; - gChannelState.abort = 0; - gChannelState.interruptEnable = 1; - gChannelState.interruptFlag = 0; - gChannelState.enable = 0; /* don't start an xfer */ - gChannelState.level = level; - gChannelState.srcByte = src_byte; - gChannelState.dstByte = dst_byte; - gChannelState.srcIncrement = src_incr; - gChannelState.dstIncrement = dst_incr; - gChannelState.transferMode = transfer_mode; - - gChannelTrigger.trigger = trigger; - - call HplChannel.setState( gChannelState, gChannelTrigger, - src_addr, dst_addr, size ); - + async command error_t + Channel.setupTransfer(uint16_t control, + dma_trigger_t trigger, + uint16_t src_addr, + uint16_t dst_addr, + uint16_t size) { + call HplChannel.setSrc(src_addr); + call HplChannel.setDst(dst_addr); + call HplChannel.setSize(size); + call HplChannel.setTrigger(trigger); + call HplChannel.setChannelControl(control); return SUCCESS; - } - async command error_t Channel.startTransfer() { + async command error_t Channel.enableDma() { call HplChannel.enableDMA(); return SUCCESS; } - async command error_t Channel.repeatTransfer( void *src_addr, - void *dst_addr, - uint16_t size ) { - call HplChannel.setSrc( src_addr ); + async command error_t + Channel.repeatDma(uint16_t src_addr, + uint16_t dst_addr, + uint16_t size ) { + call HplChannel.setSrc(src_addr); call HplChannel.setDst(dst_addr); call HplChannel.setSize(size); call HplChannel.enableDMA(); @@ -107,25 +78,27 @@ implementation { } async command error_t Channel.softwareTrigger() { - if (gChannelTrigger.trigger != DMA_TRIGGER_DMAREQ) + if (call HplChannel.getTrigger() != DMA_TRIGGER_DMAREQ) return FAIL; call HplChannel.triggerDMA(); return SUCCESS; } - async command error_t Channel.stopTransfer() { - if ( gChannelState.transferMode != DMA_BURST_BLOCK_TRANSFER || - gChannelState.transferMode != DMA_REPEATED_BURST_BLOCK_TRANSFER) + async command error_t Channel.stopDma() { + uint16_t control; + + control = call HplChannel.getChannelControl(); + control &= DMADT_3; /* isolate low two bits of DT field */ + if (control != DMA_DT_BURST_BLOCK) return FAIL; call HplChannel.disableDMA(); return SUCCESS; } - async event void HplChannel.transferDone( error_t error ) { - signal Channel.transferDone( error ); + async event void HplChannel.transferDone(error_t error) { + signal Channel.transferDone(error); } - default async event void Channel.transferDone( error_t error ) {} - + default async event void Channel.transferDone(error_t error) {} } diff --git a/tos/chips/msp430/dma/Msp430DmaControl.nc b/tos/chips/msp430/dma/Msp430DmaControl.nc index 3a8a0e4079..17da558edd 100644 --- a/tos/chips/msp430/dma/Msp430DmaControl.nc +++ b/tos/chips/msp430/dma/Msp430DmaControl.nc @@ -39,7 +39,7 @@ #include "Msp430Dma.h" interface Msp430DmaControl { - async command void init(); - async command void setFlags( bool enable_nmi, bool round_robin, - bool on_fetch); + async command void setOpControl(uint16_t op); + async command uint16_t getOpControl(); + async command void reset(); } diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc index 3e3c82203b..e5cbc5edfa 100644 --- a/tos/chips/msp430/dma/Msp430DmaControlP.nc +++ b/tos/chips/msp430/dma/Msp430DmaControlP.nc @@ -45,38 +45,32 @@ module Msp430DmaControlP { provides interface Msp430DmaControl as Control; - uses interface HplMsp430DmaControl as HplControl; - uses interface HplMsp430DmaChannel as HplChannel0; - uses interface HplMsp430DmaChannel as HplChannel1; - uses interface HplMsp430DmaChannel as HplChannel2; - + uses { + interface HplMsp430DmaControl as HplControl; + interface HplMsp430DmaChannel as HplChannel0; + interface HplMsp430DmaChannel as HplChannel1; + interface HplMsp430DmaChannel as HplChannel2; + } } implementation { - async command void Control.init() { + async command void Control.setOpControl(uint16_t op) { + call HplControl.setOpControl(op); + } + + async command uint16_t Control.getOpControl() { + return call HplControl.getOpControl(); + } + + async command void Control.reset() { call HplControl.reset(); call HplChannel0.reset(); call HplChannel1.reset(); call HplChannel2.reset(); } - - async command void Control.setFlags( bool enable_nmi, bool round_robin, - bool on_fetch ) { - - // NOTE: on_fetch must be true when dst addr is flash - - if (enable_nmi) call HplControl.setENNMI(); - else call HplControl.clearENNMI(); - if (round_robin) call HplControl.setRoundRobin(); - else call HplControl.clearRoundRobin(); - if (on_fetch) call HplControl.setOnFetch(); - else call HplControl.clearOnFetch(); - - } async event void HplChannel0.transferDone( error_t error ) {} async event void HplChannel1.transferDone( error_t error ) {} async event void HplChannel2.transferDone( error_t error ) {} - } diff --git a/tos/chips/msp430/usart/Msp430SpiDma0P.nc b/tos/chips/msp430/usart/Msp430SpiDma0P.nc index 9996e65390..eeeb62a9b1 100644 --- a/tos/chips/msp430/usart/Msp430SpiDma0P.nc +++ b/tos/chips/msp430/usart/Msp430SpiDma0P.nc @@ -55,10 +55,10 @@ implementation { components new Msp430SpiDmaP(IFG1_, U0TXBUF_, UTXIFG0, - (uint16_t) DMA_TRIGGER_UTXIFG0, + DMA_TRIGGER_UTXIFG0, U0RXBUF_, URXIFG0, - (uint16_t) DMA_TRIGGER_URXIFG0) as SpiP; + DMA_TRIGGER_URXIFG0) as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; diff --git a/tos/chips/msp430/usart/Msp430SpiDma1P.nc b/tos/chips/msp430/usart/Msp430SpiDma1P.nc index a669dcc659..0e519f0cb7 100644 --- a/tos/chips/msp430/usart/Msp430SpiDma1P.nc +++ b/tos/chips/msp430/usart/Msp430SpiDma1P.nc @@ -55,10 +55,10 @@ implementation { components new Msp430SpiDmaP(IFG2_, U1TXBUF_, UTXIFG1, - (uint16_t) DMA_TRIGGER_UTXIFG1, + DMA_TRIGGER_UTXIFG1, U1RXBUF_, URXIFG1, - (uint16_t) DMA_TRIGGER_URXIFG1) as SpiP; + DMA_TRIGGER_URXIFG1) as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; diff --git a/tos/chips/msp430/usart/Msp430SpiDmaP.nc b/tos/chips/msp430/usart/Msp430SpiDmaP.nc index 48307b2b0b..5aa805acd3 100644 --- a/tos/chips/msp430/usart/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiDmaP.nc @@ -138,34 +138,29 @@ implementation { IFG &= ~( TXIFG | RXIFG ); // set up the RX xfer - call DmaChannel1.setupTransfer(DMA_SINGLE_TRANSFER, - RXTRIG, - DMA_EDGE_SENSITIVE, - (void *) RXBUF_addr, - rx_buf ? rx_buf : &m_dump, - len, - DMA_BYTE, - DMA_BYTE, - DMA_ADDRESS_UNCHANGED, - rx_buf ? - DMA_ADDRESS_INCREMENTED : - DMA_ADDRESS_UNCHANGED); - // this doesn't start a transfer; it simply enables the channel - call DmaChannel1.startTransfer(); + call DmaChannel1.setupTransfer( + DMA_DT_SINGLE | // single, edge triggered + DMA_SB_DB | // byte to byte + DMA_SRC_NO_CHNG | // src rxbuf, no inc + (rx_buf ? DMA_DST_INC : DMA_DST_NO_CHNG), + // if buf inc, else dumping + RXTRIG, // specified trigger + (uint16_t) RXBUF_addr, + (rx_buf ? rx_buf : &m_dump), + len); + call DmaChannel1.enableDma(); // set up the TX xfer - call DmaChannel2.setupTransfer(DMA_SINGLE_TRANSFER, - TXTRIG, - DMA_EDGE_SENSITIVE, - tx_buf, - (void *) TXBUF_addr, - len, - DMA_BYTE, - DMA_BYTE, - DMA_ADDRESS_INCREMENTED, - DMA_ADDRESS_UNCHANGED); - // this doesn't start a transfer; it simply enables the channel - call DmaChannel2.startTransfer(); + call DmaChannel2.setupTransfer( + DMA_DT_SINGLE | // single, edge triggered + DMA_SB_DB | // byte to byte + DMA_SRC_INC | // src tx_buf, inc + DMA_DST_NO_CHNG, // dst, TXBUF, no inc + TXTRIG, // specified trigger + (uint16_t) tx_buf, + (uint16_t) TXBUF_addr, + len); + call DmaChannel2.enableDma(); // pong the tx flag to get things rolling IFG |= TXIFG; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc index bb18b7da58..66cdfb9c3a 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc @@ -61,10 +61,11 @@ implementation { components new Msp430SpiDmaP(IFG2_, UCA0TXBUF_, UCA0TXIFG, - (uint16_t) DMA_TRIGGER_UCA0TXIFG, + DMA_TRIGGER_UCA0TXIFG, // USCI_A0 TX on x2 UCA0RXBUF_, UCA0RXIFG, - (uint16_t) DMA_TRIGGER_UCA0RXIFG) as SpiP; + DMA_TRIGGER_UCA0RXIFG) // USCI_A0 RX on x2 + as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; @@ -80,6 +81,9 @@ implementation { components Msp430DmaC as DmaC; SpiP.DmaChannel1 -> DmaC.Channel1; SpiP.DmaChannel2 -> DmaC.Channel2; +#ifdef DMA_VERBOSE +#warning Msp430SpiA0DmaP: using dma channels 1 and 2 +#endif components LedsC as Leds; SpiP.Leds -> Leds; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc index ef38475452..f820b5db35 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc @@ -61,10 +61,11 @@ implementation { components new Msp430SpiDmaP(UC1IFG_, UCA1TXBUF_, UCA1TXIFG, - (uint16_t) DMA_TRIGGER_UCA1TXIFG, + DMA_TRIGGER_UCA1TXIFG, // USCI_A1 TX on x2 UCA1RXBUF_, UCA1RXIFG, - (uint16_t) DMA_TRIGGER_UCA1RXIFG) as SpiP; + DMA_TRIGGER_UCA1RXIFG) // USCI_A1 RX on x2 + as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; @@ -80,6 +81,9 @@ implementation { components Msp430DmaC as DmaC; SpiP.DmaChannel1 -> DmaC.Channel1; SpiP.DmaChannel2 -> DmaC.Channel2; +#ifdef DMA_VERBOSE +#warning Msp430SpiA1DmaP: using dma channels 1 and 2 +#endif components LedsC as Leds; SpiP.Leds -> Leds; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc index 5b1248de3d..3776d4e98b 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc @@ -61,10 +61,11 @@ implementation { components new Msp430SpiDmaP(IFG2_, UCB0TXBUF_, UCB0TXIFG, - (uint16_t) DMA_TRIGGER_UCB0TXIFG, + DMA_TRIGGER_UCB0TXIFG, // USCI_B0 TX on x2 UCB0RXBUF_, UCB0RXIFG, - (uint16_t) DMA_TRIGGER_UCB0RXIFG) as SpiP; + DMA_TRIGGER_UCB0RXIFG) // USCI_B0 RX on x2 + as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; @@ -80,6 +81,9 @@ implementation { components Msp430DmaC as DmaC; SpiP.DmaChannel1 -> DmaC.Channel1; SpiP.DmaChannel2 -> DmaC.Channel2; +#ifdef DMA_VERBOSE +#warning Msp430SpiB0DmaP: using dma channels 1 and 2 +#endif components LedsC as Leds; SpiP.Leds -> Leds; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc index fbe8dbe500..ad29feceec 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc @@ -42,13 +42,13 @@ * @author Eric B. Decker */ -generic module Msp430SpiDmaP( uint16_t IFG_addr, - uint16_t TXBUF_addr, - uint8_t TXIFG, - uint16_t TXTRIG, - uint16_t RXBUF_addr, - uint8_t RXIFG, - uint16_t RXTRIG ) { +generic module Msp430SpiDmaP( uint16_t IFG_addr, + uint16_t TXBUF_addr, + uint8_t TXIFG, + dma_trigger_t TXTRIG, + uint16_t RXBUF_addr, + uint8_t RXIFG, + dma_trigger_t RXTRIG ) { provides { interface Resource[ uint8_t id ]; @@ -138,38 +138,34 @@ implementation { } if ( len ) { + // clear the interrupt flags IFG &= ~( TXIFG | RXIFG ); // set up the RX xfer - call DmaChannel1.setupTransfer(DMA_SINGLE_TRANSFER, - RXTRIG, - DMA_EDGE_SENSITIVE, - (void *) RXBUF_addr, - rx_buf ? rx_buf : &m_dump, - len, - DMA_BYTE, - DMA_BYTE, - DMA_ADDRESS_UNCHANGED, - rx_buf ? - DMA_ADDRESS_INCREMENTED : - DMA_ADDRESS_UNCHANGED); - // this doesn't start a transfer; it simply enables the channel - call DmaChannel1.startTransfer(); + call DmaChannel1.setupTransfer( + DMA_DT_SINGLE | // single, edge triggered + DMA_SB_DB | // byte to byte + DMA_SRC_NO_CHNG | // src rxbuf, no inc + (rx_buf ? DMA_DST_INC : DMA_DST_NO_CHNG), + // if buf inc, else dumping + RXTRIG, // specified trigger + RXBUF_addr, + (uint16_t) (rx_buf ? rx_buf : &m_dump), + len); + call DmaChannel1.enableDma(); // set up the TX xfer - call DmaChannel2.setupTransfer(DMA_SINGLE_TRANSFER, - TXTRIG, - DMA_EDGE_SENSITIVE, - tx_buf, - (void *) TXBUF_addr, - len, - DMA_BYTE, - DMA_BYTE, - DMA_ADDRESS_INCREMENTED, - DMA_ADDRESS_UNCHANGED); - // this doesn't start a transfer; it simply enables the channel - call DmaChannel2.startTransfer(); + call DmaChannel2.setupTransfer( + DMA_DT_SINGLE | // single, edge triggered + DMA_SB_DB | // byte to byte + DMA_SRC_INC | // src tx_buf, inc + DMA_DST_NO_CHNG, // dst, TXBUF, no inc + TXTRIG, // specified trigger + (uint16_t) tx_buf, + TXBUF_addr, + len); + call DmaChannel2.enableDma(); // pong the tx flag to get things rolling IFG |= TXIFG; diff --git a/tos/platforms/shimmer/shimmerAnalogSetupP.nc b/tos/platforms/shimmer/shimmerAnalogSetupP.nc index 07687852de..0b9ab8cf71 100644 --- a/tos/platforms/shimmer/shimmerAnalogSetupP.nc +++ b/tos/platforms/shimmer/shimmerAnalogSetupP.nc @@ -171,7 +171,7 @@ implementation { } command void shimmerAnalogSetup.triggerConversion() { - call Msp430DmaChannel.startTransfer(); + call Msp430DmaChannel.enableDma(); call HplAdc12.startConversion(); } @@ -263,25 +263,23 @@ implementation { } void setupDMA(uint16_t * destAddr) { - call Msp430DmaControl.init(); // blanks registers - - call Msp430DmaControl.setFlags(FALSE, FALSE, FALSE); // enable_nmi, round_robin, on_fetch - - call Msp430DmaChannel.setupTransfer(DMA_BLOCK_TRANSFER, //dma_transfer_mode_t transfer_mode, - DMA_TRIGGER_ADC12IFGx, //dma_trigger_t trigger, - DMA_EDGE_SENSITIVE, //dma_level_t level, - (void *)ADC12MEM0_, //void *src_addr, - (void *)destAddr, //void *dst_addr, - NUM_ADC_CHANS, //uint16_t size, - DMA_WORD, //dma_byte_t src_byte, - DMA_WORD, //dma_byte_t dst_byte, - DMA_ADDRESS_INCREMENTED, //dma_incr_t src_incr, - DMA_ADDRESS_INCREMENTED); //dma_incr_t dst_incr - - call Msp430DmaChannel.startTransfer(); + call Msp430DmaControl.reset(); // blanks registers + call Msp430DmaControl.setOpControl(0); // DMAONFETCH, ROUNDROBIN, ENNMI all off + call Msp430DmaChannel.setupTransfer( + DMA_DT_BLOCK | // block mode, edge sensitive + DMA_SW_DW | // word to word + DMA_SRC_INC | // src/dst increment + DMA_DST_INC, + DMA_TRIGGER_ADC12IFG, // trigger + (uint16_t) ADC12MEM0_, // src + (uint16_t) destAddr, // dst + NUM_ADC_CHANS); // length + call Msp430DmaChannel.enableDma(); } + async event void Msp430DmaChannel.transferDone(error_t success) { } + async event void HplAdc12.conversionDone(uint16_t iv) { } } From 9c056c6db43490fa93f38831241543a18322edfe Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 10 Apr 2011 14:54:16 -0700 Subject: [PATCH 066/411] add npc (x/16i ) to gdbinit --- tos/chips/msp430/99_gdb/gdbinit | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/tos/chips/msp430/99_gdb/gdbinit b/tos/chips/msp430/99_gdb/gdbinit index 458b87c1d6..3b614f5102 100644 --- a/tos/chips/msp430/99_gdb/gdbinit +++ b/tos/chips/msp430/99_gdb/gdbinit @@ -56,3 +56,10 @@ define noint printf "cur sr: %02x\n", $r2 set $r2=0 end + +define npc +x/16i $pc +end +document npc +display next (16) instructions from $pc +end From b004cf62356d94f581a856cc16cc4db927bd6d8d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 10 Apr 2011 14:54:52 -0700 Subject: [PATCH 067/411] make msp430hardware.h old toolchain __msp430x261x -> define __msp430x26x old toolchain used __msp430x261x. new toolchain and new code uses __msp430x26x. Be backward compatible. --- tos/chips/msp430/msp430hardware.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index fdacd35134..6562753f4a 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -52,6 +52,18 @@ #include #endif +#if defined(__msp430x261x) && !defined(__msp430x26x) +/* + * The old 3.2.3 toolchain defined __msp430x261x when compiling for the + * 261x series of chips. The new TI HEADER based toolchains however define + * __msp430x26x instead. + * + * We are migrating to using the newer toolchain and the newer __msp430x26x + * define. For backward compatibility, create the new define too if needed. + */ +#define __msp430x26x +#endif + /* * signal.h defines lots of interesting things including dint(), eint() and * how to hook interrupts in. From 2bcabdd156e200be6319d80b9a53d5744d4810bd Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 10 Apr 2011 14:57:10 -0700 Subject: [PATCH 068/411] printZ1.h: setup code lied. fix for 8MiHz and 115200 baud. --- tos/platforms/z1/chips/msp430/usci/printfZ1.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tos/platforms/z1/chips/msp430/usci/printfZ1.h b/tos/platforms/z1/chips/msp430/usci/printfZ1.h index 7b613fc485..8ff6a7d4a2 100644 --- a/tos/platforms/z1/chips/msp430/usci/printfZ1.h +++ b/tos/platforms/z1/chips/msp430/usci/printfZ1.h @@ -195,12 +195,12 @@ void printfUART_init_private() CKEN |= CKEN5_STUART; //enable the UART's clk #elif defined(PLATFORM_Z1) - P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD - UCA0CTL1 |= UCSSEL_2; // CLK = ACLK - UCA0BR0 = 0x45; // 32kHz/9600 = 3.41 - UCA0BR1 = 0x00; // - UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 - UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** + P3SEL |= 0x30; // P3.4,5 = USCI_A0 TXD/RXD + UCA0CTL1 |= UCSSEL_2; // CLK = SMCLK, 8MiHz + UCA0BR0 = 4; // set 115200 baud + UCA0BR1 = 0; + UCA0MCTL = 0x91; + UCA0CTL1 &= ~UCSWRST; #else // assume TelosA, TelosB, etc. // Variabel baud From 944d420295d0a8d673ae552fd9712454a4e84e9d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 16 Apr 2011 07:35:07 -0700 Subject: [PATCH 069/411] msp430 dma: add test program for dma (tos/chips/msp430/dma/tests) --- tos/chips/msp430/dma/tests/DmaC.nc | 11 ++ tos/chips/msp430/dma/tests/DmaP.nc | 154 ++++++++++++++++++++++++++ tos/chips/msp430/dma/tests/Makefile | 2 + tos/chips/msp430/dma/tests/README.txt | 17 +++ 4 files changed, 184 insertions(+) create mode 100644 tos/chips/msp430/dma/tests/DmaC.nc create mode 100644 tos/chips/msp430/dma/tests/DmaP.nc create mode 100644 tos/chips/msp430/dma/tests/Makefile create mode 100644 tos/chips/msp430/dma/tests/README.txt diff --git a/tos/chips/msp430/dma/tests/DmaC.nc b/tos/chips/msp430/dma/tests/DmaC.nc new file mode 100644 index 0000000000..99723803d3 --- /dev/null +++ b/tos/chips/msp430/dma/tests/DmaC.nc @@ -0,0 +1,11 @@ +configuration DmaC {} +implementation { + components DmaP as App, MainC; + App.Boot -> MainC.Boot; + + components Msp430DmaC; + App.Dma -> Msp430DmaC.Control; + App.Dma0 -> Msp430DmaC.Channel0; + App.Dma1 -> Msp430DmaC.Channel1; + App.Dma2 -> Msp430DmaC.Channel2; +} diff --git a/tos/chips/msp430/dma/tests/DmaP.nc b/tos/chips/msp430/dma/tests/DmaP.nc new file mode 100644 index 0000000000..52281e0fe7 --- /dev/null +++ b/tos/chips/msp430/dma/tests/DmaP.nc @@ -0,0 +1,154 @@ +/** + * @author Eric B. Decker + * @date Apr 14, 2011 + **/ + +#include + +typedef enum { + DS_STAGE_ONE = 1, + DS_CHECK, +} dma_state_t; + +volatile uint16_t start = 0; +norace dma_state_t m_dma_state; + + +#define BUFSIZE_BYTES 512 +#define BUFSIZE_WORDS (BUFSIZE_BYTES/2) + +typedef struct { + uint16_t maj_a; + uint8_t buf[BUFSIZE_BYTES]; + uint16_t maj_b; +} buf_t; + +buf_t B0; +buf_t B1; +buf_t B2; +buf_t B3; + +#define B0_MAJ 0xefef +#define B1_MAJ 0x0101 +#define B2_MAJ 0x2020 +#define B3_MAJ 0x3333 + +module DmaP { + uses { + interface Boot; + interface Msp430DmaControl as Dma; + interface Msp430DmaChannel as Dma0; + interface Msp430DmaChannel as Dma1; + interface Msp430DmaChannel as Dma2; + } +} +implementation { + + task void dmatask() { + switch (m_dma_state) { + case DS_STAGE_ONE: + call Dma.reset(); + call Dma0.setupTransfer( + DMA_DT_BURST_BLOCK | // interleaved, block, edge sensitive + DMA_SW_DW | // SRC word, DST word + DMA_SRC_INC | // SRC address, increment + DMA_DST_INC | // DST address, increment + DMAEN | DMAIE, + DMA_TRIGGER_DMAREQ, + (uint16_t) B0.buf, + (uint16_t) B1.buf, + BUFSIZE_WORDS); + call Dma1.setupTransfer( + DMA_DT_BURST_BLOCK | // interleaved, block, edge sensitive + DMA_SW_DW | // SRC word, DST word + DMA_SRC_INC | // SRC address, increment + DMA_DST_INC | // DST address, increment + DMAEN | DMAIE, + DMA_TRIGGER_DMAxIFG, + (uint16_t) B1.buf, + (uint16_t) B2.buf, + BUFSIZE_WORDS); + call Dma2.setupTransfer( + DMA_DT_BURST_BLOCK | // interleaved, block, edge sensitive + DMA_SW_DW | // SRC word, DST word + DMA_SRC_INC | // SRC address, increment + DMA_DST_INC | // DST address, increment + DMAEN | DMAIE, + DMA_TRIGGER_DMAxIFG, + (uint16_t) B2.buf, + (uint16_t) B3.buf, + BUFSIZE_WORDS); + nop(); + call Dma0.softwareTrigger(); + break; + case DS_CHECK: + nop(); + break; + } + } + + event void Boot.booted() { + int i; + uint32_t addr; + + while (!start) + nop(); + + atomic { + DMACTL0 = 0x4321; + DMACTL1 = 0x432f; + + addr = 0xfefefe; + DMA0CTL = 0xffe0; +#ifdef __MSP430_HAS_DMAX_3__ + __asm__ __volatile__ ("movx.a %1,%0":"=m" (DMA0SA):"m" (addr)); + __asm__ __volatile__ ("movx.a %1,%0":"=m" (DMA0DA):"m" (addr)); + DMA0SZ = 0xfffe; + DMA1CTL = 0xffe0; + __asm__ __volatile__ ("movx.a %1,%0":"=m" (DMA1SA):"m" (addr)); + __asm__ __volatile__ ("movx.a %1,%0":"=m" (DMA1DA):"m" (addr)); + DMA1SZ = 0xfffe; + DMA2CTL = 0xffe0; + __asm__ __volatile__ ("movx.a %1,%0":"=m" (DMA2SA):"m" (addr)); + __asm__ __volatile__ ("movx.a %1,%0":"=m" (DMA2DA):"m" (addr)); + DMA2SZ = 0xfffe; +#else + DMA0SA = addr; + DMA0DA = addr; + DMA0SZ = 0xfffe; + DMA1CTL = 0xffe0; + DMA1SA = addr; + DMA1DA = addr; + DMA1SZ = 0xfffe; + DMA2CTL = 0xffe0; + DMA2SA = addr; + DMA2DA = addr; + DMA2SZ = 0xfffe; +#endif + } + + B0.maj_a = B0_MAJ; + B0.maj_b = B0_MAJ; + B1.maj_a = B1_MAJ; + B1.maj_b = B1_MAJ; + B2.maj_a = B2_MAJ; + B2.maj_b = B2_MAJ; + B3.maj_a = B3_MAJ; + B3.maj_b = B3_MAJ; + for (i = 0; i < BUFSIZE_BYTES; i++) + B0.buf[i] = i; + m_dma_state = DS_STAGE_ONE; + post dmatask(); + } + + async event void Dma0.transferDone() { + nop(); + } + async event void Dma1.transferDone() { + nop(); + } + async event void Dma2.transferDone() { + m_dma_state = DS_CHECK; + post dmatask(); + } +} diff --git a/tos/chips/msp430/dma/tests/Makefile b/tos/chips/msp430/dma/tests/Makefile new file mode 100644 index 0000000000..63427019cf --- /dev/null +++ b/tos/chips/msp430/dma/tests/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DmaC +include $(MAKERULES) diff --git a/tos/chips/msp430/dma/tests/README.txt b/tos/chips/msp430/dma/tests/README.txt new file mode 100644 index 0000000000..8c107e0e8d --- /dev/null +++ b/tos/chips/msp430/dma/tests/README.txt @@ -0,0 +1,17 @@ +README for Dma +Author/Contact: Eric B. Decker + +Description: + +This test module is used for simple testing of the DMA driver. +It should just work on the x1, x2, or x5 cpu families. + +It sets up an initial 512 byte buffer that is filled with a +known value. Cascading dma transactions are set up to +copy that buffer (B0n) into 3 other buffers using the 3 dma +engines. Dma0 copies B0 -> B1, Dma1 B1 -> B2, and Dma2 +does B2 -> B3. B3 is checked against B0 for correctness. + +This is done for each of the different transfer modes. The +code can be tweaked to do things in different orders and +with different combinations. From 2d17a102d811372334978fef161899447a544ada Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 16 Apr 2011 07:37:40 -0700 Subject: [PATCH 070/411] tweak gitignore to ignore .gdb* --- .gitignore | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/.gitignore b/.gitignore index 9341fb79d3..e14fcec05f 100644 --- a/.gitignore +++ b/.gitignore @@ -4,7 +4,4 @@ build #*# .#* -.gdbinit -.gdbx1 -.gdbx2 -.gdbx5 +.gdb* From ce668a7b171ecae8c4c0f85072645f8c329ec02b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 16 Apr 2011 08:57:59 -0700 Subject: [PATCH 071/411] msp430 dma: move channel interrupts to a parameterized interface. Clean up interrupt delivery. Only deliver an interrupt to the channel actually interrupting. Previously, all channels would see the delivery, they would check to see if they wanted it and would bail appropriately. Eliminate all the extra checks. Don't need the extra work. Make interrupt delivery more efficient. Also only process one dma interrupt handler before reti. This allows any higher priority interrupts to get in prior to handling any other dma interrupts that might be there. --- tos/chips/msp430/dma/HplMsp430DmaC.nc | 6 +++--- tos/chips/msp430/dma/HplMsp430DmaControlP.nc | 19 +++++++++++++++++-- 2 files changed, 20 insertions(+), 5 deletions(-) diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc index 1a0afb0777..450b1bcb0d 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaC.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaC.nc @@ -69,7 +69,7 @@ implementation { Channel0 = Dma0P; Channel1 = Dma1P; Channel2 = Dma2P; - Dma0P.Interrupt -> ControlP; - Dma1P.Interrupt -> ControlP; - Dma2P.Interrupt -> ControlP; + Dma0P.Interrupt -> ControlP.DmaInterrupt[0]; + Dma1P.Interrupt -> ControlP.DmaInterrupt[1]; + Dma2P.Interrupt -> ControlP.DmaInterrupt[2]; } diff --git a/tos/chips/msp430/dma/HplMsp430DmaControlP.nc b/tos/chips/msp430/dma/HplMsp430DmaControlP.nc index 12cac85a18..f269402db4 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaControlP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaControlP.nc @@ -60,7 +60,7 @@ module HplMsp430DmaControlP { provides interface HplMsp430DmaControl as DmaControl; - provides interface HplMsp430DmaInterrupt as Interrupt; + provides interface HplMsp430DmaInterrupt as DmaInterrupt[uint8_t chnl]; } implementation { @@ -79,7 +79,22 @@ implementation { DMA_OP_CTRL = 0; } + + /* + * some processors have a DMAIV, interrupt vector that + * can be used for accessing a jump table. But we don't + * have a jump table and the code here turns out to be more + * efficient because we know there are only 3 possible and + * we wire directly into the DmaInterrupt.fired[x]. + */ TOSH_SIGNAL(XX_DMA_VECTOR_XX) { - signal Interrupt.fired(); + if ((DMA0CTL & DMAIFG) && (DMA0CTL & DMAIE)) + signal DmaInterrupt.fired[0](); + else if ((DMA1CTL & DMAIFG) && (DMA1CTL & DMAIE)) + signal DmaInterrupt.fired[1](); + else if ((DMA2CTL & DMAIFG) && (DMA2CTL & DMAIE)) + signal DmaInterrupt.fired[2](); } + + default async event void DmaInterrupt.fired[uint8_t chnl] () { } } From 3b73deda0a618467065454cac2b1f5ffa12031af Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 16 Apr 2011 09:13:35 -0700 Subject: [PATCH 072/411] msp430 dma: Make it blatantly obvious that the DMA addressing is 16 bits. void * is unclear as to the size of the addressing. Yes it is currently 16 bits but in the future this becomes model dependent. Are pointers 16 bits or are they 20 bits (space for 32 but only 20 significant). Don't leave this important detail up for guessing. Rather make it blatantly obvious. --- tos/chips/msp430/dma/HplMsp430DmaChannel.nc | 4 ++-- tos/chips/msp430/dma/HplMsp430DmaChannelP.nc | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc index ec3c64fd2d..29b5682068 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc @@ -77,10 +77,10 @@ interface HplMsp430DmaChannel { async command void triggerDMA(); async command void setSrc(uint16_t saddr); - async command void* getSrc(); + async command uint16_t getSrc(); async command void setDst(uint16_t daddr); - async command void* getDst(); + async command uint16_t getDst(); async command void setSize(uint16_t sz); async command uint16_t getSize(); diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc index 60cd3cfdec..4fcb1db62c 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc @@ -149,19 +149,19 @@ implementation { } async command void DMA.setSrc(uint16_t saddr) { - DMAxSA = ((uint16_t) saddr); + DMAxSA = saddr; } - async command void* DMA.getSrc() { - return ((void*) DMAxSA); + async command uint16_t DMA.getSrc() { + return DMAxSA; } async command void DMA.setDst(uint16_t daddr) { - DMAxDA = ((uint16_t) daddr); + DMAxDA = daddr; } - async command void* DMA.getDst() { - return ((void*) DMAxDA); + async command uint16_t DMA.getDst() { + return DMAxDA; } async command void DMA.setSize(uint16_t sz) { From 63d59956eac36850798b015aedb20bf978d79fd5 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 16 Apr 2011 09:28:48 -0700 Subject: [PATCH 073/411] msp430 dma: fix DmaControl.reset. Control.reset now does a full reset of all engines. Higher layer interface Msp430DmaControlP.reset formerly did a Control.reset (only cleared the opControl word) followed by clears of the channel control words and the channel trigger selects. This generated verbose code with lots of atomics and was inefficient and ugly. Replace with the simpler idea that Control.reset kills everything and resets the full dma engine. This is much cleaner and generates minimal code. --- tos/chips/msp430/dma/HplMsp430DmaControl.nc | 15 +++++++++++ tos/chips/msp430/dma/HplMsp430DmaControlP.nc | 26 +++++++++++++++++++- tos/chips/msp430/dma/Msp430Dma.h | 17 ++++++++++++- tos/chips/msp430/dma/Msp430DmaControlP.nc | 3 --- 4 files changed, 56 insertions(+), 5 deletions(-) diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc index 15dc6c224d..53a573e342 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaControl.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaControl.nc @@ -39,7 +39,22 @@ #include "Msp430Dma.h" interface HplMsp430DmaControl { + /* + * setOpControl + * getOpControl + * + * set/get the DMA engine operational Control cell. This controls + * such things as DMAONFETCH/DMARMWDIS, ROUNDROBIN, ENNMI which sets + * overall DMA engine operation. + */ async command void setOpControl(uint16_t op); async command uint16_t getOpControl(); + + /* + * reset + * + * Fully reset the dma engines. Clears out any operational Control + * cell as well as all DMA engines. + */ async command void reset(); } diff --git a/tos/chips/msp430/dma/HplMsp430DmaControlP.nc b/tos/chips/msp430/dma/HplMsp430DmaControlP.nc index f269402db4..2e53ac0c7e 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaControlP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaControlP.nc @@ -65,7 +65,24 @@ module HplMsp430DmaControlP { implementation { -#define DMA_OP_CTRL (*(volatile uint8_t *) DMA_OP_CTRL_) + MSP430REG_NORACE(DMA0CTL); + MSP430REG_NORACE(DMA1CTL); + MSP430REG_NORACE(DMA2CTL); + +#ifdef TSELW_1 + /* + * X5, DMA_OP_CTRL (DMACTL4), TSELW_0 (DMACTL0), TSELW_1 (DMACTL1) + */ + MSP430REG_NORACE(DMACTL0); + MSP430REG_NORACE(DMACTL1); + MSP430REG_NORACE(DMACTL4); +#else + /* + * x1/2, DMA_OP_CTRL (DMACTL1), TSELW_0 (DMACTL0) + */ + MSP430REG_NORACE(DMACTL0); + MSP430REG_NORACE(DMACTL1); +#endif async command void DmaControl.setOpControl(uint16_t op) { DMA_OP_CTRL = op; @@ -77,6 +94,13 @@ implementation { async command void DmaControl.reset(){ DMA_OP_CTRL = 0; + TSELW_0 = 0; +#ifdef TSELW_1 + TSELW_1 = 0; +#endif + DMA0CTL = 0; + DMA1CTL = 0; + DMA2CTL = 0; } diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h index cd30e1a236..43263a1817 100644 --- a/tos/chips/msp430/dma/Msp430Dma.h +++ b/tos/chips/msp430/dma/Msp430Dma.h @@ -85,7 +85,14 @@ * On the x1 and x2 processors, these control cells live in the 16 bit i/o memory * starting at 0x0100. This area MUST be accessed using only 16 bit instructions, * ie. mov not mov.b. mov.b to an odd IO16 address does nothing. mov.b to - * an even IO16 will zero the upper byte. + * an even IO16 will do strange things. Only use full 16 bit instructions. + * + * There are one or more TSEL words. These words get zeroed on a full reset of + * the DMA engines. The x1 and x2 dma engine (using 4 bit TSEL fields) have one + * TSEL word and all 3 TSEL fields fit in this word. The x5 dma engine uses + * 5 bit TSEL fields and has 2 TSEL words. We define TSELW_x for each TSEL + * control word that exists for the processor. These are used in the reset + * routine that hits all the engines. * * * - Interrupt Vector @@ -114,6 +121,7 @@ * TSEL registers (DMACTL{0,1} start at 0x500 (DMACTL0_). * TSEL is 5 bits and packed one TSEL field per byte. * TSEL_SHIFT denotes which byte. + * TSELW_0 and TSELW_1 are defined (3 TSEL fields take 2 words) * OpControl (DMACTL4_) is at 0x508, and is DMARMWDIS | ROUNDROBIN | ENNMI. * * x1/x2 (TSEL4 not defined): @@ -121,6 +129,7 @@ * TSEL fields live in DMACTL0 0x122. * TSEL is 4 bits and packed two TSEL fields per byte. * TSEL_SHIFT denotes which nibble. + * TSELW_0 is defined. * OpControl (DMACTL1_) is at 0x124, and is DMAONFETCH | ROUNDROBIN | ENNMI. */ @@ -144,14 +153,18 @@ #define TSEL_MASK 0x1f +#define TSELW_0 DMACTL0 #define TSEL0_BASE DMACTL0_ #define TSEL0_SHIFT 0 #define TSEL1_BASE DMACTL0_ #define TSEL1_SHIFT 8 + +#define TSELW_1 DMACTL1 #define TSEL2_BASE DMACTL1_ #define TSEL2_SHIFT 0 #define DMA_OP_CTRL_ DMACTL4_ +#define DMA_OP_CTRL DMACTL4 typedef enum { DMA_TRIGGER_DMAREQ = DMA0TSEL_0, // DMA_REQ (sw) @@ -188,6 +201,7 @@ typedef enum { #define TSEL_MASK 0xf +#define TSELW_0 DMACTL0 #define TSEL0_BASE DMACTL0_ #define TSEL0_SHIFT 0 #define TSEL1_BASE DMACTL0_ @@ -196,6 +210,7 @@ typedef enum { #define TSEL2_SHIFT 8 #define DMA_OP_CTRL_ DMACTL1_ +#define DMA_OP_CTRL DMACTL1 typedef enum { DMA_TRIGGER_DMAREQ = DMA0TSEL_0, // software trigger diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc index e5cbc5edfa..62823c5134 100644 --- a/tos/chips/msp430/dma/Msp430DmaControlP.nc +++ b/tos/chips/msp430/dma/Msp430DmaControlP.nc @@ -65,9 +65,6 @@ implementation { async command void Control.reset() { call HplControl.reset(); - call HplChannel0.reset(); - call HplChannel1.reset(); - call HplChannel2.reset(); } async event void HplChannel0.transferDone( error_t error ) {} From dabff9acf720d73e2eb10d5e11667c1f4745c9c3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 16 Apr 2011 09:45:21 -0700 Subject: [PATCH 074/411] msp430 dma: nuke ABORT. Motivation: ABORT gets set when DMA has been nuked by a NMI occuring. This can only happen if ENNMI is set in the opControl word. ABORT impacted the DMA interfaces by causing there to be an error return to the transferDone signal. Note if one is really doing something off the NMI then shutting down the DMA to focus the CPU on handling the NMI is a reasonable thing to do. But there are no known uses of NMI. Further this complicates the interfaces to the DMA without a sufficiently good payback. And no known handles for the error return exist. In other words interface was added without there really being a good justification for the complexity. Now that said, it is a good idea to check to make sure that the DMA has actually completed and hasn't failed in some fashion. DMA can hang or fail. ABORT is an example of the DMA failing to complete. So the ABORT error interface above handles part of the problem. A more complete solution requires any DMA transaction to be wrapped by a timer to detect timeouts. This same mechanism would also detect non-completion due to an ABORT. In other words the ABORT error interface doesn't really buy anything and complicates the interface for no good reason. See ya ABORT. --- tos/chips/msp430/dma/HplMsp430DmaChannel.nc | 2 +- tos/chips/msp430/dma/HplMsp430DmaChannelP.nc | 17 +++++++++++------ tos/chips/msp430/dma/Msp430DmaChannel.nc | 5 ++++- tos/chips/msp430/dma/Msp430DmaChannelP.nc | 6 +++--- tos/chips/msp430/dma/Msp430DmaControlP.nc | 6 +++--- 5 files changed, 22 insertions(+), 14 deletions(-) diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc index 29b5682068..feff99cfd6 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc @@ -94,5 +94,5 @@ interface HplMsp430DmaChannel { */ async command void reset(); - async event void transferDone(error_t success); + async event void transferDone(); } diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc index 4fcb1db62c..ed3fd7aec0 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc @@ -177,12 +177,17 @@ implementation { call DMA.setTrigger(0); /* will set to sw/dmareq */ } + /* + * Interaction between NMI and DMA resulting in the ABORT + * isn't clear. Hasn't really been fleshed out and is mostly + * ignored for now. ABORT is stupid as is a maskable NMI. + * It isn't at all clear what needs to happen if the DMA is + * actually aborted because of a NMI. Also no one seems to + * actually look at the return status of a transferDone(). + * So remove it for now. + */ async event void Interrupt.fired() { - error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS; - if ( DMAxCTL & DMAIFG ) { - DMAxCTL &= ~DMAIFG; - DMAxCTL &= ~DMAABORT; - signal DMA.transferDone( error ); - } + DMAxCTL &= ~DMAIFG; + signal DMA.transferDone(); } } diff --git a/tos/chips/msp430/dma/Msp430DmaChannel.nc b/tos/chips/msp430/dma/Msp430DmaChannel.nc index f4997dbf7a..9df0af76c4 100644 --- a/tos/chips/msp430/dma/Msp430DmaChannel.nc +++ b/tos/chips/msp430/dma/Msp430DmaChannel.nc @@ -74,6 +74,9 @@ interface Msp430DmaChannel { /** * Notification that the transfer has completed + * + * Used to have an error return but this could only fail + * because of an ABORT. This has been nuked. */ - async event void transferDone(error_t success); + async event void transferDone(); } diff --git a/tos/chips/msp430/dma/Msp430DmaChannelP.nc b/tos/chips/msp430/dma/Msp430DmaChannelP.nc index b1502ec761..c9aeacd09f 100644 --- a/tos/chips/msp430/dma/Msp430DmaChannelP.nc +++ b/tos/chips/msp430/dma/Msp430DmaChannelP.nc @@ -96,9 +96,9 @@ implementation { } - async event void HplChannel.transferDone(error_t error) { - signal Channel.transferDone(error); + async event void HplChannel.transferDone() { + signal Channel.transferDone(); } - default async event void Channel.transferDone(error_t error) {} + default async event void Channel.transferDone() {} } diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc index 62823c5134..db8d457f68 100644 --- a/tos/chips/msp430/dma/Msp430DmaControlP.nc +++ b/tos/chips/msp430/dma/Msp430DmaControlP.nc @@ -67,7 +67,7 @@ implementation { call HplControl.reset(); } - async event void HplChannel0.transferDone( error_t error ) {} - async event void HplChannel1.transferDone( error_t error ) {} - async event void HplChannel2.transferDone( error_t error ) {} + async event void HplChannel0.transferDone() {} + async event void HplChannel1.transferDone() {} + async event void HplChannel2.transferDone() {} } From d6ab7457fe604e69f7da49cd619ac196d73cdf17 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 16 Apr 2011 09:59:11 -0700 Subject: [PATCH 075/411] msp430 dma: nuke error return from setTrigger Motivation: setTrigger could only fail if DMAEN was set. And no calls to setTrigger actually checked the return value. Now if DMAEN is set, changing the trigger is ignored by the h/w. But if someone is using setTrigger they should a) know what they are doing (and so will know that DMAEN had better be off) and b) should check their work, ie. actually look to see that the DMA configuration they are setting up is done correctly. Now once it is done correctly it won't ever fail so why have the extra complexity. In other words there really isn't a good reason to generate an error return. --- tos/chips/msp430/dma/HplMsp430DmaChannel.nc | 2 +- tos/chips/msp430/dma/HplMsp430DmaChannelP.nc | 5 +---- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc index feff99cfd6..4fb7caea69 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc @@ -60,7 +60,7 @@ interface HplMsp430DmaChannel { async command void setChannelControl(uint16_t ctl); async command uint16_t getChannelControl(); - async command error_t setTrigger(dma_trigger_t trigger); + async command void setTrigger(dma_trigger_t trigger); async command dma_trigger_t getTrigger(); async command void enableDMA(); diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc index ed3fd7aec0..cb0a87fd39 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc @@ -100,14 +100,11 @@ implementation { return DMAxCTL; } - async error_t command DMA.setTrigger( dma_trigger_t trigger ) { - if ( DMAxCTL & DMAEN ) - return FAIL; + async void command DMA.setTrigger( dma_trigger_t trigger ) { atomic { TSEL = ((TSEL & ~(DMAxTSEL_mask << DMAxTSEL_shift)) | ((trigger & DMAxTSEL_mask) << DMAxTSEL_shift)); } - return SUCCESS; } async command dma_trigger_t DMA.getTrigger() { From 024909bd9e6b7afa344cbcecda23de66cc88e5c4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 16 Apr 2011 17:14:21 -0700 Subject: [PATCH 076/411] update Release_Notes --- 11_Release_Notes | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index f8d82a5738..6cc057db83 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -72,11 +72,18 @@ Other notable changes: * DMA rework. - Simplify Hpl and make more easily adaptable cross cpu (handles x1, x2, and x5). - - x1/x2 driver and x5 driver independent. - - split out Dma.h for x1/x2 and x5. Too many differences. Could be combined but - just a little too ugly. Mostly due to the number of Tsel registers and what they - are called. + - unified driver for x1, x2 and x5. - Make module naming clearer. + - simplify interfaces for setTrigger. + - msp430 dma: nuke ABORT. ABORT was used to determine the error return from + transferDone. Only comes from NMI abort if ENNMI was on. This doesn't really + buy anything still need to use a timer for DMA hangs. Further there are no + known users of the error return and it isn't checked. + - make DmaControl.reset do a full reset. Simplifies code in Msp430DmaControlP.reset + and makes better sense then doing it piece meal. + - force src/dst addresses to be 16 bits (was void *). Be blatant. + - make interrupts be parameterized. This routes dma interrupts to the appropriate + channel handler. WARNING: tosthreads hasn't been modified for the new core msp430 structure. From 7f0b1fad7b64a597f4348fb221800044d4ccad9c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 25 Apr 2011 13:44:03 -0700 Subject: [PATCH 077/411] clean up Msp430Adc12DMAP and update release notes (config block in rom) --- 11_Release_Notes | 4 ++ tos/chips/msp430/adc12/Msp430Adc12DMAP.nc | 67 ++++++++++++----------- 2 files changed, 38 insertions(+), 33 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index 6cc057db83..0ff25ce138 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -69,6 +69,10 @@ Other notable changes: * Revised DCO calibrator to work with both 1611 and Z1 2617/1618. Z1 uses dco calibrator to sync up to 8MiHz. +* Device configuration blocks by default moved to ROM. This saves start up cpu + cycles and space in RAM. Config blocks can still be placed in RAM and modified + if needed. + * DMA rework. - Simplify Hpl and make more easily adaptable cross cpu (handles x1, x2, and x5). diff --git a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc index 9315ea2a5b..68d94d03ae 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc @@ -1,54 +1,55 @@ /* + * Copyright (c) 2011, Eric B. Decker * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. * - * - Revision ------------------------------------------------------------- - * $Revision: 1.5 $ - * $Date: 2008-06-23 20:25:15 $ * @author: Jan Hauer - * ======================================================================== + * @author: Eric B. Decker */ #include #include -module Msp430Adc12DMAP @safe() -{ - provides { - interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; - } - uses { + +module Msp430Adc12DMAP @safe() { + provides interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; + uses { interface Msp430DmaControl as DMAControl; interface Msp430DmaChannel as DMAChannel; interface Msp430Adc12SingleChannel as SubSingleChannel[uint8_t id]; interface AsyncStdControl as AsyncAdcControl[uint8_t id]; - } + } } -implementation -{ + +implementation { enum { MULTIPLE_SINGLE, MULTIPLE_REPEAT, From f8b9bd64be7bb70c4efae300f8f8f3a369a2b84b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 3 Jun 2011 13:47:29 -0700 Subject: [PATCH 078/411] msp430 timer (x1x2): split out timer code for x1 and x2 families into x1x2/timer dir. Organize x1 and x2 timer code into a shared directory x1x2/timer. This is akin to what the x5 does. The x1x2 timer code assumes a TA/TB configuration. The x5 timer code assumes a T0A T1A configuration. --- tos/chips/msp430/00_Chip_Notes | 2 ++ tos/chips/msp430/01_Dependencies | 25 ++++++++++++++++--- tos/chips/msp430/clock_bcs/00_Readme | 7 ++++++ .../{ => x1x2}/timer/Msp430Counter32khzC.nc | 0 .../{ => x1x2}/timer/Msp430CounterMicroC.nc | 0 .../{ => x1x2}/timer/Msp430Timer32khzMapC.nc | 0 .../msp430/{ => x1x2}/timer/Msp430TimerC.nc | 0 .../{ => x1x2}/timer/Msp430TimerCommonP.nc | 0 .../{ => x1x2}/timer/Msp430TimerMicroMapC.nc | 0 tos/platforms/epic/.platform | 1 + tos/platforms/eyesIFX/.family | 1 + tos/platforms/shimmer/.platform | 1 + tos/platforms/shimmer2/.platform | 1 + tos/platforms/shimmer2r/.platform | 1 + tos/platforms/span/.platform | 1 + tos/platforms/telosa/.platform | 1 + tos/platforms/telosb/.platform | 1 + tos/platforms/tinynode/.platform | 1 + tos/platforms/z1/.platform | 1 + 19 files changed, 40 insertions(+), 4 deletions(-) rename tos/chips/msp430/{ => x1x2}/timer/Msp430Counter32khzC.nc (100%) rename tos/chips/msp430/{ => x1x2}/timer/Msp430CounterMicroC.nc (100%) rename tos/chips/msp430/{ => x1x2}/timer/Msp430Timer32khzMapC.nc (100%) rename tos/chips/msp430/{ => x1x2}/timer/Msp430TimerC.nc (100%) rename tos/chips/msp430/{ => x1x2}/timer/Msp430TimerCommonP.nc (100%) rename tos/chips/msp430/{ => x1x2}/timer/Msp430TimerMicroMapC.nc (100%) diff --git a/tos/chips/msp430/00_Chip_Notes b/tos/chips/msp430/00_Chip_Notes index 1eaf8c85c6..61e3511d8f 100644 --- a/tos/chips/msp430/00_Chip_Notes +++ b/tos/chips/msp430/00_Chip_Notes @@ -54,6 +54,8 @@ x1xxx (x1): msp430f1611, msp430f149 x2xxx (x2): msp430f261{6,7,8,9} Z1 (2617), MM4 (mam-mark mote, 2618) +x1x2: contains low level cpu interfaces shared between the x1 and x2 families. + x5xxx (x5): cc430f5137, msp430f5438{,a} surf (cc430f5137), ev430-5137, ev430-5438, mm5 (mam-mark mote, msp430f5438a) diff --git a/tos/chips/msp430/01_Dependencies b/tos/chips/msp430/01_Dependencies index 9455542994..009dc3cab0 100644 --- a/tos/chips/msp430/01_Dependencies +++ b/tos/chips/msp430/01_Dependencies @@ -134,12 +134,11 @@ DMA: 5) Operation Control word. This control word on the x1/x2 processors controls DMA_ONFETCH, ROUND_ROBIN, and ENNMI. (DMACTL1). The x5 replaces DMA_ONFETCH with DMARMWDIS which disallows dma transfers form oocuring whil read-modify-write operations are occuring. - - -3) Interrupt vector: +6) Interrupt vector: - On the x1xxx family, the vector is named DACDMA_VECTOR and other families use DMA_VECTOR. + On the x1xxx family, the vector is named DACDMA_VECTOR (shared with the DAC) and other + families use DMA_VECTOR. The driver uses either DACDMA_VECTOR or DMA_VECTOR if defined. Otherwise complains about lack of support. @@ -154,6 +153,24 @@ Clocks: The x5xxx family has the Unified Clock System which is different (__MSP430_HAS_UCS__). +Timers: + + The Msp430 processors have various flavors of timers, the two main categories are TA and TB + which have slightly different operational characteristics. Different cpus support different + combinations of timers and compare registers. + + The current TinyOS msp430 interface implements 32KiHz and a 1MiHz timers. The mapping between + a cpu h/w timer and appropriate s/w timer is cpu/family/platform dependent. + + Supported X1 (msp430f149/1611) and X2 (msp430f2615-18) processors provide TA3 and TB7. The + low level driver for timing and clocks is provided in the x1x2 directory and is shared across + the x1 and x2 processors. Mapping from h/w to s/w is provided in the x1x2/timer directory. + + Supported X5 processors (cc430f5137 and msp430f5138) provide T0A5 and T1A3. Mappings are provided + in the x5xxx/timer directory. + + + I0 Port naming: TI defines 8 bit numbered ports (P1 ... P). In later families 16 bit lettered ports PORTA, etc. diff --git a/tos/chips/msp430/clock_bcs/00_Readme b/tos/chips/msp430/clock_bcs/00_Readme index d86ce12ee9..ced31540b6 100644 --- a/tos/chips/msp430/clock_bcs/00_Readme +++ b/tos/chips/msp430/clock_bcs/00_Readme @@ -6,3 +6,10 @@ The hardware configuration is assumed to include a 32768 Hz external clock cryst is used as an accurate timebase. This timebase is used to syncronize internal clocks and provides clocking for the primary time base. This provides timer clocking while the processor is sleeping. + +x1: msp430f1611, TA3 and TB7. +x2: msp430f261[6-9], TA3 and TB7. + +By default, TA is wired to the 32KiHz timebase and TB is wired to a 1MiHz timebase. + +Other msp430 x1/x2 family chips will have various mixtures of TA and TB. diff --git a/tos/chips/msp430/timer/Msp430Counter32khzC.nc b/tos/chips/msp430/x1x2/timer/Msp430Counter32khzC.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430Counter32khzC.nc rename to tos/chips/msp430/x1x2/timer/Msp430Counter32khzC.nc diff --git a/tos/chips/msp430/timer/Msp430CounterMicroC.nc b/tos/chips/msp430/x1x2/timer/Msp430CounterMicroC.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430CounterMicroC.nc rename to tos/chips/msp430/x1x2/timer/Msp430CounterMicroC.nc diff --git a/tos/chips/msp430/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430Timer32khzMapC.nc rename to tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc diff --git a/tos/chips/msp430/timer/Msp430TimerC.nc b/tos/chips/msp430/x1x2/timer/Msp430TimerC.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430TimerC.nc rename to tos/chips/msp430/x1x2/timer/Msp430TimerC.nc diff --git a/tos/chips/msp430/timer/Msp430TimerCommonP.nc b/tos/chips/msp430/x1x2/timer/Msp430TimerCommonP.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430TimerCommonP.nc rename to tos/chips/msp430/x1x2/timer/Msp430TimerCommonP.nc diff --git a/tos/chips/msp430/timer/Msp430TimerMicroMapC.nc b/tos/chips/msp430/x1x2/timer/Msp430TimerMicroMapC.nc similarity index 100% rename from tos/chips/msp430/timer/Msp430TimerMicroMapC.nc rename to tos/chips/msp430/x1x2/timer/Msp430TimerMicroMapC.nc diff --git a/tos/platforms/epic/.platform b/tos/platforms/epic/.platform index b8ff11fa37..de403ab265 100644 --- a/tos/platforms/epic/.platform +++ b/tos/platforms/epic/.platform @@ -28,6 +28,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/eyesIFX/.family b/tos/platforms/eyesIFX/.family index e903d7ad44..dbcc978f51 100644 --- a/tos/platforms/eyesIFX/.family +++ b/tos/platforms/eyesIFX/.family @@ -15,6 +15,7 @@ push( @includes, qw( %T/chips/tda5250 %T/chips/tda5250/mac %T/chips/ad5200 + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/shimmer/.platform b/tos/platforms/shimmer/.platform index dc4df6a1d3..48f5486b77 100644 --- a/tos/platforms/shimmer/.platform +++ b/tos/platforms/shimmer/.platform @@ -32,6 +32,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/shimmer2/.platform b/tos/platforms/shimmer2/.platform index 2d977625fd..647c2cb507 100644 --- a/tos/platforms/shimmer2/.platform +++ b/tos/platforms/shimmer2/.platform @@ -42,6 +42,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/shimmer2r/.platform b/tos/platforms/shimmer2r/.platform index dd6ede5f2c..a18f57f900 100644 --- a/tos/platforms/shimmer2r/.platform +++ b/tos/platforms/shimmer2r/.platform @@ -42,6 +42,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/span/.platform b/tos/platforms/span/.platform index ca2737e7c2..0cb84356c6 100644 --- a/tos/platforms/span/.platform +++ b/tos/platforms/span/.platform @@ -27,6 +27,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/telosa/.platform b/tos/platforms/telosa/.platform index 5972d7d456..9711003d32 100644 --- a/tos/platforms/telosa/.platform +++ b/tos/platforms/telosa/.platform @@ -25,6 +25,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/at45db + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/telosb/.platform b/tos/platforms/telosb/.platform index 18a6414769..8dd6553366 100644 --- a/tos/platforms/telosb/.platform +++ b/tos/platforms/telosb/.platform @@ -27,6 +27,7 @@ push( @includes, qw( %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/tinynode/.platform b/tos/platforms/tinynode/.platform index 4f60b13954..383b304d7a 100644 --- a/tos/platforms/tinynode/.platform +++ b/tos/platforms/tinynode/.platform @@ -17,6 +17,7 @@ push( @includes, qw( %T/chips/mm74hc595 + %T/chips/msp430/x1x2/timer %T/chips/msp430/x1xxx %T/chips/msp430 %T/chips/msp430/clock_bcs diff --git a/tos/platforms/z1/.platform b/tos/platforms/z1/.platform index df329b32b7..ff19c03a3b 100644 --- a/tos/platforms/z1/.platform +++ b/tos/platforms/z1/.platform @@ -21,6 +21,7 @@ push( @includes, qw( %T/chips/cc2420/spi %T/chips/cc2420/transmit %T/chips/cc2420/unique + %T/chips/msp430/x1x2/timer %T/chips/msp430/x2xxx %T/chips/msp430/x2xxx/usci %T/chips/msp430 From ea9fc0542ff3e7d69b38ec544a067eb7bda404d5 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 3 Jun 2011 13:54:51 -0700 Subject: [PATCH 079/411] msp430: misc clean up. no code changes. --- tos/chips/msp430/00_Chip_Notes | 19 ++++++++++--------- tos/chips/msp430/msp430hardware.h | 2 +- tos/chips/msp430/msp430iar.h | 2 +- tos/chips/msp430/msp430regtypes.h | 10 +++------- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 6 ++++-- tos/chips/msp430/x1xxx/McuSleepC.nc | 16 ++++++++-------- tos/chips/msp430/x2xxx/McuSleepC.nc | 13 +++++-------- 7 files changed, 32 insertions(+), 36 deletions(-) diff --git a/tos/chips/msp430/00_Chip_Notes b/tos/chips/msp430/00_Chip_Notes index 61e3511d8f..fab0d6ba6a 100644 --- a/tos/chips/msp430/00_Chip_Notes +++ b/tos/chips/msp430/00_Chip_Notes @@ -66,17 +66,17 @@ msp430hardware.h and msp430regtypes.h define various other attributes that inter to the tinyos environment. These files coupled with the chip definition file define the cpu and other capabilities available. -The original architecture, the MSP430, provides 16 bit addresses. A subsequent revision denoted +The original architecture, the MSP430, provided 16 bit addresses. A subsequent revision denoted MSP430X modifies the cpu and addressing to provide 20 bit addresses. Backward compatibilty to the MSP430 was considered. A further modification is denoted the MSP430XV2 but it is unclear exactly -what this modified. The functional defines __MSP430_HAS_MSP430X_CPU__ and __MSP430_HAS_MSP430XV2_CPU__ -indicate the potential for 20 bit addresses. Switches to the toolchain will determine the instructions -used and the size of pointers. +what this modified. The functional defines __MSP430_HAS_MSP430X_CPU__ and +__MSP430_HAS_MSP430XV2_CPU__ indicate the potential for 20 bit addresses. Switches to the +toolchain will determine the instructions used and the size of pointers. MSP430 processors are highly integrated, combining a cpu with various peripherals. The toolchain provides chip definition files (includes) for each processor. These files indicate what peripherals -and other functions are present by the use of switches. These switches are of the form __MSP430_HAS___, -where indicates the function provided. +and other functions are present by the use of switches. These switches are of the form +__MSP430_HAS___, where indicates the function provided. Drivers for the different peripherals are provided in appropriately named subdirectories of the main msp430 directory. Presence of the peripheral can be detected by checking appropriate values in the @@ -124,9 +124,10 @@ dma: potential for 1 to 8 independent dma channels. (We only use processors tha pins: interface to digital I/O. Different processors can have radically different amounts of digitial I/O. These pins are organized into ports. x2 and x5 processors have enhanced - port electronics which adds pull up/down resistor control and drive strength. Some processors - implement drive strength. Drive Strength presence can be determined by testing for the presence - of the appropriate register define (ie. PADS_). Currently drive strength isn't supported. + port electronics which adds pull up/down resistor control and drive strength. Some + processors implement drive strength. Drive Strength presence can be determined by testing + for the presence of the appropriate register define (ie. PADS_). Currently drive strength + isn't supported. x2 and x5 processors define 16 bit overlapping ports denoted using letters (ie. PA). diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 6562753f4a..9a88daeb7c 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -482,7 +482,7 @@ inline void __nesc_enable_interrupt(void) @safe() { * using the uint16_t (native width of the msp430) fits in with how interrupts * are checked below, see definition of __nesc_atomic_start. * - * This should be checked to verify that it generates minimal code. + * This should be checked to verify that it generates minimal code. It does. */ typedef uint16_t __nesc_atomic_t; __nesc_atomic_t __nesc_atomic_start(void); diff --git a/tos/chips/msp430/msp430iar.h b/tos/chips/msp430/msp430iar.h index 2edc77ef2f..b5ca936f8c 100644 --- a/tos/chips/msp430/msp430iar.h +++ b/tos/chips/msp430/msp430iar.h @@ -64,7 +64,7 @@ #define _BIC_SR_IRQ(_x) __bic_SR_register_on_exit(_x) /* - * Avoid gcc whining from gcc about IAR intrinsics by declaring them; + * Avoid gcc whining about IAR intrinsics by declaring them; * but mark them so the mangler script doesn't leave these bogus * prototypes in the source for IAR to find. */ diff --git a/tos/chips/msp430/msp430regtypes.h b/tos/chips/msp430/msp430regtypes.h index 665733c8b4..d448c90fbb 100644 --- a/tos/chips/msp430/msp430regtypes.h +++ b/tos/chips/msp430/msp430regtypes.h @@ -51,12 +51,9 @@ * the cpu definitions that are currently being used and supported by the * msp430 TinyOS trunk. * - * But really, how are these values used and how do we want to use them if - * any going forward. It seems like a different way of using these kinds - * of things should be found and then this file goes away. Or becomes minimal - * - * -#ifdef notdef + * These values get used in various low level msp430 drivers. At some point + * it may make sense to figure a different way to do this and then get rid + * of this file. Well maybe next year. :-) * * No longer supported. Kept for historical reference: * @@ -72,7 +69,6 @@ * print "#define TYPE_$1 $r{$2}\n" if $r{$2}; * } * ' | sort -u -#endif */ #define TYPE_ACTL uint16_t diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 4f1b1fda0a..b0eb07768f 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -113,6 +113,7 @@ configuration HplMsp430GeneralIOC // provides special ports explicitly // this section of HplMsp430GeneralIOC supports the F14x series + // x1 family: msp430f149 #ifdef __msp430x14x provides interface HplMsp430GeneralIO as STE0; provides interface HplMsp430GeneralIO as SIMO0; @@ -139,7 +140,7 @@ configuration HplMsp430GeneralIOC #endif // this section of HplMsp430GeneralIOC supports the F16x series - // In particular, msp430f1611 + // x1 family: msp430f1611 #ifdef __msp430x16x provides interface HplMsp430GeneralIO as STE0; provides interface HplMsp430GeneralIO as SIMO0; @@ -174,7 +175,7 @@ configuration HplMsp430GeneralIOC #endif /* - * Support for the f261{6,7,8,9} processors + * x2 family: msp430f261{6,7,8,9} processors * * Old headers: mspgccX (3.2.3) includes msp430x261x.h (-mmcu=msp430x2617) * which defines __msp430x261x. @@ -228,6 +229,7 @@ configuration HplMsp430GeneralIOC provides interface HplMsp430GeneralIO as SVSOUT; #endif + // x5 family: cc430f5137, msp430f5438{,a} #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) provides interface HplMsp430GeneralIO as CBOUT0; provides interface HplMsp430GeneralIO as TA0CLK; diff --git a/tos/chips/msp430/x1xxx/McuSleepC.nc b/tos/chips/msp430/x1xxx/McuSleepC.nc index 333d5fedce..e3b6e43bee 100644 --- a/tos/chips/msp430/x1xxx/McuSleepC.nc +++ b/tos/chips/msp430/x1xxx/McuSleepC.nc @@ -9,11 +9,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * @@ -29,7 +31,6 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. - * */ /** @@ -42,7 +43,7 @@ * @author Vlado Handziski * @author Joe Polastre * @author Cory Sharp - * @author Eric B. Decker + * @author Eric B. Decker */ module McuSleepC @safe() { @@ -85,7 +86,7 @@ MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL); ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) || ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1)) -/* the following doesn't work for x2 family (but this is x1 file so who cares) */ +/* the following is only for x1 chips. */ #if defined(__msp430_have_usart0_with_i2c) || defined(__MSP430_HAS_I2C__) // registers end in "nr" to prevent nesC race condition detection || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) && @@ -137,8 +138,7 @@ MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL); atomic dirty = 1; } - default async command mcu_power_t McuPowerOverride.lowestState() { - return MSP430_POWER_LPM4; - } - + default async command mcu_power_t McuPowerOverride.lowestState() { + return MSP430_POWER_LPM4; + } } diff --git a/tos/chips/msp430/x2xxx/McuSleepC.nc b/tos/chips/msp430/x2xxx/McuSleepC.nc index 1e1265a3ba..d8d17f700e 100644 --- a/tos/chips/msp430/x2xxx/McuSleepC.nc +++ b/tos/chips/msp430/x2xxx/McuSleepC.nc @@ -1,5 +1,6 @@ /* - * Copyright (c) 2005 Stanford University. All rights reserved. + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2005 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -42,9 +43,7 @@ * @author Vlado Handziski * @author Joe Polastre * @author Cory Sharp - * @date October 26, 2005 - * @see Please refer to TEP 112 for more information about this component and its - * intended use. + * @author Eric B. Decker */ module McuSleepC @safe() { @@ -81,11 +80,10 @@ implementation { ((UCA1CTL1 & UCSSEL_3) != UCSSEL_0) || ((UCB0CTL1 & UCSSEL_3) != UCSSEL_0) || ((UCB1CTL1 & UCSSEL_3) != UCSSEL_0) - ) + ) pState = MSP430_POWER_LPM1; - -#ifdef __msp430_have_adc12 +#if defined(__msp430_have_adc12) || defined(__MSP430_HAS_ADC12__) // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE if (ADC12CTL0 & ADC12ON){ if (ADC12CTL1 & ADC12SSEL_2){ @@ -117,7 +115,6 @@ implementation { computePowerState(); //dirty = 0; } - temp = msp430PowerBits[powerState] | SR_GIE; __asm__ __volatile__( "bis %0, r2" : : "m" (temp) ); // All of memory may change at this point... From fbb097246a849801e252ec3e935e5ac891aafb00 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 3 Jun 2011 15:59:32 -0700 Subject: [PATCH 080/411] msp430 (adc12): x5 integration, >8 input channels, PLATFORM_ADC o 16 input channels supported. inch (input channel) in the control structure expanded to 5 bits. Additional channel place holders defined. o ADC12 and ADC12_PLUS supported. Newer chips provide the ADC12_PLUS module. o PLATFORM_ADC support added for per platfrom configuration of timer and i/o pins. Backward compatible with prior configuration mechanism. o ADC12_PINS_AVAILABLE defined to denote how many pins are available for ADC use. o headers include bitfield structures for use of new TI HEADERS. o ADC pins in configurations now named An vs. previous PortMN. --- 11_Release_Notes | 14 +- tos/chips/msp430/adc12/HplAdc12P.nc | 3 +- tos/chips/msp430/adc12/Msp430Adc12.h | 93 ++++++++- tos/chips/msp430/adc12/Msp430Adc12DMAP.nc | 6 +- tos/chips/msp430/adc12/Msp430Adc12ImplP.nc | 188 +++++++++++------- tos/chips/msp430/adc12/Msp430Adc12P.nc | 91 ++++++--- .../msp430/adc12/Msp430RefVoltArbiterImplP.nc | 17 +- tos/chips/msp430/adc12/README.txt | 9 +- 8 files changed, 298 insertions(+), 123 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index 0ff25ce138..4e277c0f08 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -4,7 +4,7 @@ Major Changes to the msp430 core software: Welcome to a major rework of the core msp430 files. Originally, msp430 support was for the first generation msp430 cpus. Later the MSP430X and MSP430XV2 processor chips were released by TI. As newer cpu chips have been ported to -TinyOS the architecture of the msp430 s/w has needed changes. +TinyOS the architecture of the core msp430 s/w has needed changes. Major areas of impact include: peripheral register access, clock modules, dma support, usart vs. usci support, and interrupt architecture. In addition the @@ -73,6 +73,18 @@ Other notable changes: cycles and space in RAM. Config blocks can still be placed in RAM and modified if needed. +* ADC12 mods: + + o 16 input channels supported. inch (input channel) in the control structure + expanded to 5 bits. Additional channel place holders defined. + o ADC12 and ADC12_PLUS supported. Newer chips provide the ADC12_PLUS module. + o PLATFORM_ADC support added for per platfrom configuration of timer and i/o pins. + Backward compatible with prior configuration mechanism. + o ADC12_PINS_AVAILABLE defined to denote how many pins are available for ADC use. + o headers include bitfield structures for use of new TI HEADERS. + o ADC pins in configurations now named An vs. previous PortMN. + + * DMA rework. - Simplify Hpl and make more easily adaptable cross cpu (handles x1, x2, and x5). diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc index 165993b6c6..e2f672faed 100644 --- a/tos/chips/msp430/adc12/HplAdc12P.nc +++ b/tos/chips/msp430/adc12/HplAdc12P.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011, Eric B. Decker * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * @@ -132,4 +132,3 @@ implementation signal HplAdc12.conversionDone(ADC12IV); } } - diff --git a/tos/chips/msp430/adc12/Msp430Adc12.h b/tos/chips/msp430/adc12/Msp430Adc12.h index ae64343a51..9e36f0a36f 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12.h +++ b/tos/chips/msp430/adc12/Msp430Adc12.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * @@ -31,6 +32,7 @@ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Jan Hauer + * @author Peter A. Bigot * @author Eric B. Decker */ @@ -38,21 +40,41 @@ #define MSP430ADC12_H #include "Msp430RefVoltGenerator.h" -#if !defined(__msp430_have_adc12) && !defined(__MSP430_HAS_ADC12__) +#if !defined(__msp430_have_adc12) +#if !defined(__MSP430_HAS_ADC12__) +#if !defined(__MSP430_HAS_ADC12_PLUS__) #error Target msp430 device does not have ADC12 module #endif +#endif +#endif + +/* + * ADC12_USE_PLATFORM_ADC: Assume the platform defines a PlatformAdcC + * component that provides the necessary timer and IO pin interfaces. + * + * ADC12_PINS_AVAILABLE: The number of pins available on the hardware. + * If not defined, defaults to 8. + * + * ADC12_PIN_AUTO_CONFIGURE: Define to automatically configure all + * available pins. Only applies if ADC12_USE_PLATFORM_ADC is defined; + * otherwise refer to ADC12_P6PIN_AUTO_CONFIGURE. + */ #define ADC12_TIMERA_ENABLED #define ADC12_P6PIN_AUTO_CONFIGURE #define ADC12_CHECK_ARGS //#define ADC12_ONLY_WITH_DMA +#ifndef ADC12_PINS_AVAILABLE +#define ADC12_PINS_AVAILABLE 8 +#endif /* ADC12_PINS_AVAILABLE */ + // for HIL clients #define REF_VOLT_AUTO_CONFIGURE typedef struct { // see README.txt - unsigned int inch: 4; // input channel + unsigned int inch: 5; // input channel unsigned int sref: 3; // reference voltage unsigned int ref2_5v: 1; // reference voltage level unsigned int adc12ssel: 2; // clock source sample-hold-time @@ -86,8 +108,12 @@ enum inch_enum EXTERNAL_REF_VOLTAGE_CHANNEL = 8, // VeREF+ (input channel 8) REF_VOLTAGE_NEG_TERMINAL_CHANNEL = 9, // VREF-/VeREF- (input channel 9) TEMPERATURE_DIODE_CHANNEL = 10, // Temperature diode (input channel 10) - SUPPLY_VOLTAGE_HALF_CHANNEL = 11, // (AVcc-AVss)/2 (input channel 11-15) - INPUT_CHANNEL_NONE = 12 // illegal (identifies invalid settings) + SUPPLY_VOLTAGE_HALF_CHANNEL = 11, // (AVcc-AVss)/2 + INPUT_CHANNEL_A12 = 12, // input channel A12 + INPUT_CHANNEL_A13 = 13, // input channel A13 + INPUT_CHANNEL_A14 = 14, // input channel A14 + INPUT_CHANNEL_A15 = 15, // input channel A15 + INPUT_CHANNEL_NONE, // illegal (identifies invalid settings) }; enum sref_enum @@ -176,9 +202,20 @@ enum sampcon_id_enum // use the masks defined in the TI headers." // (https://www.millennium.berkeley.edu/pipermail/tinyos-devel/2011-March/004804.html) // - // Until the ADC driver is updated our temporary workaround is to re-define - // the old structures -- this may may result in faulty ADC code and should be - // checked carefully for your specific device (note: msp430x1611 is safe)! + // Older versions of cpu header files included register definitions using bit field + // structures. Current versions using TI_HEADERS no longer include these bit field + // structure definitions. + // + // One could rewrite the drivers to use masks as is recommended in the tinyos-devel + // excerpt listed above. Technically there is nothing wrong with using bit fields + // as long as they work (there have been problems in different versions of the compiler). + // The big problem with bit fields is endianess and portability (related) but neither + // of those issues should be a problem here. + // + // So it is left as an exercise for the student to reimplement the driver if someone + // feels it is worth the time to do so. + // + // Be sure to check the generated code with a current compiler (which are in flux). typedef struct { volatile unsigned @@ -206,6 +243,46 @@ typedef struct { cstartadd:4; } __attribute__ ((packed)) adc12ctl1_t; + +#ifdef __MSP430_HAS_ADC12_PLUS__ + +typedef struct { + volatile unsigned + bit0:1, + bit1:1, + bit2:1, + bit3:1, + bit4:1, + bit5:1, + bit6:1, + bit7:1, + bit8:1, + bit9:1, + bit10:1, + bit11:1, + bit12:1, + bit13:1, + bit14:1, + bit15:1; +} __attribute__ ((packed)) adc12xflg_t; + +/* The adc12 declaration itself */ +struct adc12_t { + adc12ctl0_t ctl0; + adc12ctl1_t ctl1; + adc12xflg_t ifg; + adc12xflg_t ie; + adc12xflg_t iv; +}; + +#endif /* __MSP430_HAS_ADC12_PLUS__ */ + +#ifdef notdef +#define ENC ADC12ENC +#define CONSEQ0 ADC12CONSEQ0 +#define CONSEQ1 ADC12CONSEQ1 +#endif + #endif /* __MSP430_TI_HEADERS__ */ #if __GNUC__ >= 4 diff --git a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc index 68d94d03ae..f33b37f0d9 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc @@ -204,8 +204,6 @@ enum { uint16_t buf[], uint16_t num) { return 0;} - default async command error_t AsyncAdcControl.stop[uint8_t id]() - { return FAIL; } - default async command error_t AsyncAdcControl.start[uint8_t id]() - { return FAIL; } + default async command error_t AsyncAdcControl.stop[uint8_t id]() { return FAIL; } + default async command error_t AsyncAdcControl.start[uint8_t id]() { return FAIL; } } diff --git a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc index 630f9bb728..bb1f1ae10c 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc @@ -1,38 +1,49 @@ /* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. * - * - Revision ------------------------------------------------------------- - * $Revision: 1.14 $ - * $Date: 2008-11-10 14:56:12 $ - * @author: Jan Hauer + * @author Jan Hauer + * @author Peter A. Bigot + * @author Eric B. Decker * ======================================================================== */ +#if (! ADC12_USE_PLATFORM_ADC) && defined(ADC12_P6PIN_AUTO_CONFIGURE) +/* Convert ADC12_P6PIN_AUTO_CONFIGURE to new signal */ +#define ADC12_PIN_AUTO_CONFIGURE 1 +#endif /* P6PIN auto configure without PlatformAdcC */ + #include module Msp430Adc12ImplP @safe() { @@ -51,14 +62,26 @@ module Msp430Adc12ImplP @safe() interface Msp430TimerControl as ControlA1; interface Msp430Compare as CompareA0; interface Msp430Compare as CompareA1; - interface HplMsp430GeneralIO as Port60; - interface HplMsp430GeneralIO as Port61; - interface HplMsp430GeneralIO as Port62; - interface HplMsp430GeneralIO as Port63; - interface HplMsp430GeneralIO as Port64; - interface HplMsp430GeneralIO as Port65; - interface HplMsp430GeneralIO as Port66; - interface HplMsp430GeneralIO as Port67; + interface HplMsp430GeneralIO as A0; + interface HplMsp430GeneralIO as A1; + interface HplMsp430GeneralIO as A2; + interface HplMsp430GeneralIO as A3; + interface HplMsp430GeneralIO as A4; + interface HplMsp430GeneralIO as A5; +#if 6 < ADC12_PINS_AVAILABLE + interface HplMsp430GeneralIO as A6; + interface HplMsp430GeneralIO as A7; +#if 8 < ADC12_PINS_AVAILABLE + interface HplMsp430GeneralIO as A8; + interface HplMsp430GeneralIO as A9; + interface HplMsp430GeneralIO as A10; + interface HplMsp430GeneralIO as A11; + interface HplMsp430GeneralIO as A12; + interface HplMsp430GeneralIO as A13; + interface HplMsp430GeneralIO as A14; + interface HplMsp430GeneralIO as A15; +#endif /* ADC12_PINS_AVAILABLE : 8 */ +#endif /* ADC12_PINS_AVAILABLE : 6 */ } } implementation @@ -92,11 +115,19 @@ implementation command error_t Init.init() { adc12ctl0_t ctl0; - call HplAdc12.stopConversion(); - ctl0 = call HplAdc12.getCtl0(); - ctl0.adc12tovie = 1; - ctl0.adc12ovie = 1; - call HplAdc12.setCtl0(ctl0); + + atomic { + call HplAdc12.stopConversion(); /* data unreliable */ + call HplAdc12.resetIFGs(); /* clear relicts from SWReset */ + ctl0 = call HplAdc12.getCtl0(); + ctl0.adc12tovie = 1; + ctl0.adc12ovie = 1; + call HplAdc12.setCtl0(ctl0); +#ifdef __MSP430_HAS_REF__ + // Clear REFMSTR: use ADC12CTL to configure reference generate for backwards compatibility + REFCTL0 &= (~REFMSTR); +#endif // __MSP430_HAS_REF__ + } return SUCCESS; } @@ -141,34 +172,58 @@ implementation void configureAdcPin( uint8_t inch ) { -#ifdef ADC12_P6PIN_AUTO_CONFIGURE +#if ADC12_PIN_AUTO_CONFIGURE switch (inch) { - case 0: call Port60.selectModuleFunc(); call Port60.makeInput(); break; - case 1: call Port61.selectModuleFunc(); call Port61.makeInput(); break; - case 2: call Port62.selectModuleFunc(); call Port62.makeInput(); break; - case 3: call Port63.selectModuleFunc(); call Port63.makeInput(); break; - case 4: call Port64.selectModuleFunc(); call Port64.makeInput(); break; - case 5: call Port65.selectModuleFunc(); call Port65.makeInput(); break; - case 6: call Port66.selectModuleFunc(); call Port66.makeInput(); break; - case 7: call Port67.selectModuleFunc(); call Port67.makeInput(); break; + case 0: call A0.selectModuleFunc(); call A0.makeInput(); break; + case 1: call A1.selectModuleFunc(); call A1.makeInput(); break; + case 2: call A2.selectModuleFunc(); call A2.makeInput(); break; + case 3: call A3.selectModuleFunc(); call A3.makeInput(); break; + case 4: call A4.selectModuleFunc(); call A4.makeInput(); break; + case 5: call A5.selectModuleFunc(); call A5.makeInput(); break; +#if 6 < ADC12_PINS_AVAILABLE + case 6: call A6.selectModuleFunc(); call A6.makeInput(); break; + case 7: call A7.selectModuleFunc(); call A7.makeInput(); break; +#if 8 < ADC12_PINS_AVAILABLE + case 8: call A8.selectModuleFunc(); call A8.makeInput(); break; + case 9: call A9.selectModuleFunc(); call A9.makeInput(); break; + case 10: call A10.selectModuleFunc(); call A10.makeInput(); break; + case 11: call A11.selectModuleFunc(); call A11.makeInput(); break; + case 12: call A12.selectModuleFunc(); call A12.makeInput(); break; + case 13: call A13.selectModuleFunc(); call A13.makeInput(); break; + case 14: call A14.selectModuleFunc(); call A14.makeInput(); break; + case 15: call A15.selectModuleFunc(); call A15.makeInput(); break; +#endif /* ADC12_PINS_AVAILABLE : 8 */ +#endif /* ADC12_PINS_AVAILABLE : 6 */ } #endif } void resetAdcPin( uint8_t inch ) { -#ifdef ADC12_P6PIN_AUTO_CONFIGURE +#if ADC12_PIN_AUTO_CONFIGURE switch (inch) { - case 0: call Port60.selectIOFunc(); break; - case 1: call Port61.selectIOFunc(); break; - case 2: call Port62.selectIOFunc(); break; - case 3: call Port63.selectIOFunc(); break; - case 4: call Port64.selectIOFunc(); break; - case 5: call Port65.selectIOFunc(); break; - case 6: call Port66.selectIOFunc(); break; - case 7: call Port67.selectIOFunc(); break; + case 0: call A0.selectIOFunc(); break; + case 1: call A1.selectIOFunc(); break; + case 2: call A2.selectIOFunc(); break; + case 3: call A3.selectIOFunc(); break; + case 4: call A4.selectIOFunc(); break; + case 5: call A5.selectIOFunc(); break; +#if 6 < ADC12_PINS_AVAILABLE + case 6: call A6.selectIOFunc(); break; + case 7: call A7.selectIOFunc(); break; +#if 8 < ADC12_PINS_AVAILABLE + case 8: call A8.selectIOFunc(); break; + case 9: call A9.selectIOFunc(); break; + case 10: call A10.selectIOFunc(); break; + case 11: call A11.selectIOFunc(); break; + case 12: call A12.selectIOFunc(); break; + case 13: call A13.selectIOFunc(); break; + case 14: call A14.selectIOFunc(); break; + case 15: call A15.selectIOFunc(); break; +#endif /* ADC12_PINS_AVAILABLE : 8 */ +#endif /* ADC12_PINS_AVAILABLE : 6 */ } #endif } @@ -634,24 +689,23 @@ implementation break; } #endif + + default: + stopConversion(); + break; } // switch } - default async event error_t SingleChannel.singleDataReady[uint8_t id](uint16_t data) - { + default async event error_t SingleChannel.singleDataReady[uint8_t id](uint16_t data) { return FAIL; } - + default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id]( - uint16_t *buf, uint16_t numSamples) - { - return 0; - } - - default async event void MultiChannel.dataReady[uint8_t id](uint16_t *buffer, uint16_t numSamples) {}; - - default async event void Overflow.memOverflow[uint8_t id](){} - default async event void Overflow.conversionTimeOverflow[uint8_t id](){} + uint16_t *buf, uint16_t numSamples) { return 0; } -} + default async event void MultiChannel.dataReady[uint8_t id]( + uint16_t *buffer, uint16_t numSamples) {}; + default async event void Overflow.memOverflow[uint8_t id]() {} + default async event void Overflow.conversionTimeOverflow[uint8_t id]() {} +} diff --git a/tos/chips/msp430/adc12/Msp430Adc12P.nc b/tos/chips/msp430/adc12/Msp430Adc12P.nc index ae0bde2e40..dea0443287 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12P.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12P.nc @@ -1,35 +1,41 @@ /* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. + * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitaet Berlin nor the names - * of its contributors may be used to endorse or promote products derived + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. * - * - Revision ------------------------------------------------------------- - * $Revision: 1.7 $ - * $Date: 2008-05-15 23:57:13 $ - * @author: Jan Hauer + * @author Jan Hauer + * @author Peter A. Bigot + * @author Eric B. Decker * ======================================================================== */ @@ -57,16 +63,48 @@ configuration Msp430Adc12P Msp430Adc12ImplP.ADCArbiterInfo -> Arbiter; Msp430Adc12ImplP.HplAdc12 -> HplAdc12P; +#if ADC12_USE_PLATFORM_ADC + components PlatformAdcC ; + + Msp430Adc12ImplP.TimerA -> PlatformAdcC.TimerA; + Msp430Adc12ImplP.ControlA0 -> PlatformAdcC.ControlA0; + Msp430Adc12ImplP.ControlA1 -> PlatformAdcC.ControlA1; + Msp430Adc12ImplP.CompareA0 -> PlatformAdcC.CompareA0; + Msp430Adc12ImplP.CompareA1 -> PlatformAdcC.CompareA1; + + Msp430Adc12ImplP.A0 -> PlatformAdcC.A0; + Msp430Adc12ImplP.A1 -> PlatformAdcC.A1; + Msp430Adc12ImplP.A2 -> PlatformAdcC.A2; + Msp430Adc12ImplP.A3 -> PlatformAdcC.A3; + Msp430Adc12ImplP.A4 -> PlatformAdcC.A4; + Msp430Adc12ImplP.A5 -> PlatformAdcC.A5; +#if 6 < ADC12_PINS_AVAILABLE + Msp430Adc12ImplP.A6 -> PlatformAdcC.A6; + Msp430Adc12ImplP.A7 -> PlatformAdcC.A7; +#if 8 < ADC12_PINS_AVAILABLE + Msp430Adc12ImplP.A8 -> PlatformAdcC.A8; + Msp430Adc12ImplP.A9 -> PlatformAdcC.A9; + Msp430Adc12ImplP.A10 -> PlatformAdcC.A10; + Msp430Adc12ImplP.A11 -> PlatformAdcC.A11; + Msp430Adc12ImplP.A12 -> PlatformAdcC.A12; + Msp430Adc12ImplP.A13 -> PlatformAdcC.A13; + Msp430Adc12ImplP.A14 -> PlatformAdcC.A14; + Msp430Adc12ImplP.A15 -> PlatformAdcC.A15; +#endif /* ADC12_PINS_AVAILABLE : 8 */ +#endif /* ADC12_PINS_AVAILABLE : 6 */ + +#else /* ADC12_USE_PLATFORM_ADC */ + #ifdef ADC12_P6PIN_AUTO_CONFIGURE components HplMsp430GeneralIOC; - Msp430Adc12ImplP.Port60 -> HplMsp430GeneralIOC.Port60; - Msp430Adc12ImplP.Port61 -> HplMsp430GeneralIOC.Port61; - Msp430Adc12ImplP.Port62 -> HplMsp430GeneralIOC.Port62; - Msp430Adc12ImplP.Port63 -> HplMsp430GeneralIOC.Port63; - Msp430Adc12ImplP.Port64 -> HplMsp430GeneralIOC.Port64; - Msp430Adc12ImplP.Port65 -> HplMsp430GeneralIOC.Port65; - Msp430Adc12ImplP.Port66 -> HplMsp430GeneralIOC.Port66; - Msp430Adc12ImplP.Port67 -> HplMsp430GeneralIOC.Port67; + Msp430Adc12ImplP.A0 -> HplMsp430GeneralIOC.Port60; + Msp430Adc12ImplP.A1 -> HplMsp430GeneralIOC.Port61; + Msp430Adc12ImplP.A2 -> HplMsp430GeneralIOC.Port62; + Msp430Adc12ImplP.A3 -> HplMsp430GeneralIOC.Port63; + Msp430Adc12ImplP.A4 -> HplMsp430GeneralIOC.Port64; + Msp430Adc12ImplP.A5 -> HplMsp430GeneralIOC.Port65; + Msp430Adc12ImplP.A6 -> HplMsp430GeneralIOC.Port66; + Msp430Adc12ImplP.A7 -> HplMsp430GeneralIOC.Port67; #endif #ifdef ADC12_TIMERA_ENABLED @@ -77,5 +115,6 @@ configuration Msp430Adc12P Msp430Adc12ImplP.CompareA0 -> Msp430TimerC.CompareA0; Msp430Adc12ImplP.CompareA1 -> Msp430TimerC.CompareA1; #endif -} +#endif /* ADC12_USE_PLATFORM_ADC */ +} diff --git a/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc b/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc index 29a41d82c0..33aa3c136f 100644 --- a/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc +++ b/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc @@ -150,25 +150,20 @@ module Msp430RefVoltArbiterImplP } } - event void RefVolt_1_5V.stopDone(error_t error) - { - } + event void RefVolt_1_5V.stopDone(error_t error) {} - event void RefVolt_2_5V.stopDone(error_t error) - { - } + event void RefVolt_2_5V.stopDone(error_t error) {} - async command bool ClientResource.isOwner[uint8_t client]() - { + async command bool ClientResource.isOwner[uint8_t client]() { return call AdcResource.isOwner[client](); } - default event void ClientResource.granted[uint8_t client](){} + default event void ClientResource.granted[uint8_t client]() {} default async command error_t AdcResource.request[uint8_t client]() { return FAIL; } default async command error_t AdcResource.immediateRequest[uint8_t client]() { return FAIL; } default async command bool AdcResource.isOwner[uint8_t client]() { return FALSE; } - default async command error_t AdcResource.release[uint8_t client](){return FAIL;} - const msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; + default async command error_t AdcResource.release[uint8_t client]() { return FAIL; } + const msp430adc12_channel_config_t defaultConfig = { INPUT_CHANNEL_NONE,0,0,0,0,0,0,0 }; default async command const msp430adc12_channel_config_t* Config.getConfiguration[uint8_t client]() { return &defaultConfig; diff --git a/tos/chips/msp430/adc12/README.txt b/tos/chips/msp430/adc12/README.txt index 71bae58b60..4b84dd656f 100644 --- a/tos/chips/msp430/adc12/README.txt +++ b/tos/chips/msp430/adc12/README.txt @@ -76,6 +76,11 @@ Currently Msp430Adc12MultiChannel is only provided by the first two components. I/O PINs -------------------------------------------------------------------- +New hardware platforms should define ADC12_USE_PLAFORM_ADC in their +hardware.h, then provide PlatformAdcC component that provides the pins and +timer information appropriate for that platform. See Msp430Adc12.h for +additional configuration information. + During a conversion the respective ADC port pin (ports 6.0 - 6.7) must be configured such that the peripheral module function is selected and the port pin is switched to input direction. By default, for every client this is done @@ -177,7 +182,3 @@ tinyos-2.x/tos/chips/msp430/sensors, an HAL test app can be found in tinyos-2.x/apps/tests/msp430/Adc12. ----- - -$Date: 2008/04/07 09:41:55 $ -@author: Jan Hauer - From 35e2ae2826593c03798de3d50f580378290236f8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 4 Jun 2011 02:02:51 -0700 Subject: [PATCH 081/411] msp430 x5: bring in x5 (cc430f5137) base timer/clock files from OSIAN --- 11_Release_Notes | 6 + .../msp430/x5xxx/timer/Msp430Counter32khzC.nc | 61 +++ .../msp430/x5xxx/timer/Msp430CounterMicroC.nc | 61 +++ .../x5xxx/timer/Msp430Timer32khzMapC.nc | 85 +++++ tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc | 351 ++++++++++++++++++ .../msp430/x5xxx/timer/Msp430TimerCommonP.nc | 45 +++ .../msp430/x5xxx/timer/Msp430XV2ClockC.nc | 82 ++++ .../x5xxx/timer/Msp430XV2ClockControl.nc | 125 +++++++ .../x5xxx/timer/Msp430XV2ClockControlP.nc | 284 ++++++++++++++ .../msp430/x5xxx/timer/Msp430XV2ClockP.nc | 88 +++++ tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h | 71 ++++ 11 files changed, 1259 insertions(+) create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430Counter32khzC.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430CounterMicroC.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h diff --git a/11_Release_Notes b/11_Release_Notes index 4e277c0f08..afc26cdf4b 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -102,6 +102,12 @@ Other notable changes: channel handler. +* X5 additions: + + - X5 (T0A, T1A) Msp430Timers. T0A 32KiHz, T1A 1MiHz timebase. + - X5 UCS clock driver. tos/chips/x5xxx/timer/Msp430XV2Clock*. + + WARNING: tosthreads hasn't been modified for the new core msp430 structure. TosThreads duplicated files rather than modified in place. This creates a lot more work and is not recommended. diff --git a/tos/chips/msp430/x5xxx/timer/Msp430Counter32khzC.nc b/tos/chips/msp430/x5xxx/timer/Msp430Counter32khzC.nc new file mode 100644 index 0000000000..29644cebf7 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430Counter32khzC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Msp430Counter32khC provides the standard 32khz counter for the MSP430. + * + * @author Cory Sharp + * @author Peter A. Bigot + * @author Eric B. Decker + * + * @see Please refer to TEP 102 for more information about this component and its + * intended use. + * + * The cc430f5137 and the msp430f5138{,a} (both x5 family) have at a minimum the + * T0A5 and T1A3 timer h/w. We assign T0A to the 32KiHz timer an T1A to the + * 1 MiHz (TMicro) timer (see Msp430CounterMicro). + */ + +configuration Msp430Counter32khzC { + provides interface Counter as Msp430Counter32khz; +} +implementation { + components Msp430TimerC; + components new Msp430CounterC(T32khz) as Counter; + + Msp430Counter32khz = Counter; + Counter.Msp430Timer -> Msp430TimerC.Timer0_A; +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430CounterMicroC.nc b/tos/chips/msp430/x5xxx/timer/Msp430CounterMicroC.nc new file mode 100644 index 0000000000..07b87615d7 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430CounterMicroC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Msp430CounterMicroC provides the standard 1 MiHz counter for the MSP430. + * + * @author Cory Sharp + * @author Peter A. Bigot + * @author Eric B. Decker + * + * @see Please refer to TEP 102 for more information about this component and its + * intended use. + * + * The cc430f5137 and the msp430f5138{,a} (both x5 family) have at a minimum the + * T0A5 and T1A3 timer h/w. We assign T0A to the 32KiHz timer an T1A to the + * 1 MiHz (TMicro) timer (see Msp430CounterMicro). + */ + +configuration Msp430CounterMicroC { + provides interface Counter as Msp430CounterMicro; +} +implementation { + components Msp430TimerC, + new Msp430CounterC(TMicro) as Counter; + + Msp430CounterMicro = Counter; + Counter.Msp430Timer -> Msp430TimerC.Timer1_A; +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc new file mode 100644 index 0000000000..20a5a33653 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz + * hardware timers on the MSP430 that are available for compile time allocation + * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. + * + * Platforms based on the MSP430 are encouraged to copy in and override this + * file, presenting only the hardware timers that are available for allocation + * on that platform. + * + * @author Cory Sharp + * @author Peter A. Bigot + */ + +/* + * Currently, all MSP430XV2 architectures support T0A5, so we'll use + * that for the 32KHz timer suite. If you clone this to a platform + * area, remember to also clone Msp430Counter32khzC if you change to a + * different timer. + */ + +configuration Msp430Timer32khzMapC { + provides { + interface Msp430Timer[ uint8_t id ]; + interface Msp430TimerControl[ uint8_t id ]; + interface Msp430Compare[ uint8_t id ]; + } +} +implementation { + components Msp430TimerC; + + Msp430Timer[0] = Msp430TimerC.Timer0_A; + Msp430TimerControl[0] = Msp430TimerC.Control0_A0; + Msp430Compare[0] = Msp430TimerC.Compare0_A0; + + Msp430Timer[1] = Msp430TimerC.Timer0_A; + Msp430TimerControl[1] = Msp430TimerC.Control0_A1; + Msp430Compare[1] = Msp430TimerC.Compare0_A1; + + Msp430Timer[2] = Msp430TimerC.Timer0_A; + Msp430TimerControl[2] = Msp430TimerC.Control0_A2; + Msp430Compare[2] = Msp430TimerC.Compare0_A2; + + Msp430Timer[3] = Msp430TimerC.Timer0_A; + Msp430TimerControl[3] = Msp430TimerC.Control0_A3; + Msp430Compare[3] = Msp430TimerC.Compare0_A3; + + Msp430Timer[4] = Msp430TimerC.Timer0_A; + Msp430TimerControl[4] = Msp430TimerC.Control0_A4; + Msp430Compare[4] = Msp430TimerC.Compare0_A4; +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc new file mode 100644 index 0000000000..5d66571639 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc @@ -0,0 +1,351 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * TinyOS Msp430 support started with the msp430f1611 which provided + * 1 TA3 (3 CCRs) and 1 TB7 (7 CCRs). The cc430 and 5438 cpus (both x5) + * provide a TA5 and TA3 but no TBs. Other chips in the MSP430XV2 + * series have different suites. Current TI headers indicate the + * following sets are available: + * + * T0A5 T0B7 + * T1A2 T1A3 T1A5 + * T2A3 + * + * Timer_B extends Timer_A with some extra features that are not + * currently supported in TinyOS. Until those features are needed, + * Timer_B instances use the same interfaces as Timer_A instances. + * + * @note As of this writing, only T0A5 and T1A3 have been tested. + * + * @author Peter A. Bigot + * @author Eric B. Decker + */ + +configuration Msp430TimerC { +#if defined(__MSP430_HAS_T0A5__) + provides interface Msp430Timer as Timer0_A; + + provides interface Msp430TimerControl as Control0_A0; + provides interface Msp430Compare as Compare0_A0; + provides interface Msp430Capture as Capture0_A0; + + provides interface Msp430TimerControl as Control0_A1; + provides interface Msp430Compare as Compare0_A1; + provides interface Msp430Capture as Capture0_A1; + + provides interface Msp430TimerControl as Control0_A2; + provides interface Msp430Compare as Compare0_A2; + provides interface Msp430Capture as Capture0_A2; + + provides interface Msp430TimerControl as Control0_A3; + provides interface Msp430Compare as Compare0_A3; + provides interface Msp430Capture as Capture0_A3; + + provides interface Msp430TimerControl as Control0_A4; + provides interface Msp430Compare as Compare0_A4; + provides interface Msp430Capture as Capture0_A4; +#endif /* __MSP430_HAS_T0A5__ */ + +#if defined(__MSP430_HAS_T0B7__) + provides interface Msp430Timer as Timer0_B; + + provides interface Msp430TimerControl as Control0_B0; + provides interface Msp430Compare as Compare0_B0; + provides interface Msp430Capture as Capture0_B0; + + provides interface Msp430TimerControl as Control0_B1; + provides interface Msp430Compare as Compare0_B1; + provides interface Msp430Capture as Capture0_B1; + + provides interface Msp430TimerControl as Control0_B2; + provides interface Msp430Compare as Compare0_B2; + provides interface Msp430Capture as Capture0_B2; + + provides interface Msp430TimerControl as Control0_B3; + provides interface Msp430Compare as Compare0_B3; + provides interface Msp430Capture as Capture0_B3; + + provides interface Msp430TimerControl as Control0_B4; + provides interface Msp430Compare as Compare0_B4; + provides interface Msp430Capture as Capture0_B4; + + provides interface Msp430TimerControl as Control0_B5; + provides interface Msp430Compare as Compare0_B5; + provides interface Msp430Capture as Capture0_B5; + + provides interface Msp430TimerControl as Control0_B6; + provides interface Msp430Compare as Compare0_B6; + provides interface Msp430Capture as Capture0_B6; +#endif /* __MSP430_HAS_T0A5__ */ + +#if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + provides interface Msp430Timer as Timer1_A; + + provides interface Msp430TimerControl as Control1_A0; + provides interface Msp430Compare as Compare1_A0; + provides interface Msp430Capture as Capture1_A0; + + provides interface Msp430TimerControl as Control1_A1; + provides interface Msp430Compare as Compare1_A1; + provides interface Msp430Capture as Capture1_A1; + +#if defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + provides interface Msp430TimerControl as Control1_A2; + provides interface Msp430Compare as Compare1_A2; + provides interface Msp430Capture as Capture1_A2; + +#if defined(__MSP430_HAS_T1A5__) + provides interface Msp430TimerControl as Control1_A3; + provides interface Msp430Compare as Compare1_A3; + provides interface Msp430Capture as Capture1_A3; + + provides interface Msp430TimerControl as Control1_A4; + provides interface Msp430Compare as Compare1_A4; + provides interface Msp430Capture as Capture1_A4; +#endif /* __MSP430_HAS_T1A5__ */ + +#endif /* __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + +#endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + +#if defined(__MSP430_HAS_T2A3__) + provides interface Msp430Timer as Timer2_A; + + provides interface Msp430TimerControl as Control2_A0; + provides interface Msp430Compare as Compare2_A0; + provides interface Msp430Capture as Capture2_A0; + + provides interface Msp430TimerControl as Control2_A1; + provides interface Msp430Compare as Compare2_A1; + provides interface Msp430Capture as Capture2_A1; + + provides interface Msp430TimerControl as Control2_A2; + provides interface Msp430Compare as Compare2_A2; + provides interface Msp430Capture as Capture2_A2; +#endif /* __MSP430_HAS_T2A3__ */ + +} +implementation { + components Msp430TimerCommonP as Common; + +#if defined(__MSP430_HAS_T0A5__) + components new Msp430TimerP( TA0IV_, TA0R_, TA0CTL_, TAIFG, TACLR, TAIE, + TASSEL0, TASSEL1, FALSE ) as Msp430Timer0_A; + + Timer0_A = Msp430Timer0_A.Timer; + Msp430Timer0_A.VectorTimerX0 -> Common.VectorTimer0_A0; + Msp430Timer0_A.VectorTimerX1 -> Common.VectorTimer0_A1; + Msp430Timer0_A.Overflow -> Msp430Timer0_A.Event[7]; + + components new Msp430TimerCapComP( TA0CCTL0_, TA0CCR0_ ) as Msp430Timer0_A0; + Control0_A0 = Msp430Timer0_A0.Control; + Compare0_A0 = Msp430Timer0_A0.Compare; + Capture0_A0 = Msp430Timer0_A0.Capture; + Msp430Timer0_A0.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A0.Event -> Msp430Timer0_A.Event[0]; + + components new Msp430TimerCapComP( TA0CCTL1_, TA0CCR1_ ) as Msp430Timer0_A1; + Control0_A1 = Msp430Timer0_A1.Control; + Compare0_A1 = Msp430Timer0_A1.Compare; + Capture0_A1 = Msp430Timer0_A1.Capture; + Msp430Timer0_A1.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A1.Event -> Msp430Timer0_A.Event[1]; + + components new Msp430TimerCapComP( TA0CCTL2_, TA0CCR2_ ) as Msp430Timer0_A2; + Control0_A2 = Msp430Timer0_A2.Control; + Compare0_A2 = Msp430Timer0_A2.Compare; + Capture0_A2 = Msp430Timer0_A2.Capture; + Msp430Timer0_A2.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A2.Event -> Msp430Timer0_A.Event[2]; + + components new Msp430TimerCapComP( TA0CCTL3_, TA0CCR3_ ) as Msp430Timer0_A3; + Control0_A3 = Msp430Timer0_A3.Control; + Compare0_A3 = Msp430Timer0_A3.Compare; + Capture0_A3 = Msp430Timer0_A3.Capture; + Msp430Timer0_A3.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A3.Event -> Msp430Timer0_A.Event[3]; + + components new Msp430TimerCapComP( TA0CCTL4_, TA0CCR4_ ) as Msp430Timer0_A4; + Control0_A4 = Msp430Timer0_A4.Control; + Compare0_A4 = Msp430Timer0_A4.Compare; + Capture0_A4 = Msp430Timer0_A4.Capture; + Msp430Timer0_A4.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A4.Event -> Msp430Timer0_A.Event[4]; + +#endif /* __MSP430_HAS_T0A5__ */ + +#if defined(__MSP430_HAS_T0B7__) + components new Msp430TimerP( TB0IV_, TB0R_, TB0CTL_, TBIFG, TBCLR, TBIE, + TBSSEL0, TBSSEL1, FALSE ) as Msp430Timer0_B; + + Timer0_B = Msp430Timer0_B.Timer; + Msp430Timer0_B.VectorTimerX0 -> Common.VectorTimer0_B0; + Msp430Timer0_B.VectorTimerX1 -> Common.VectorTimer0_B1; + Msp430Timer0_B.Overflow -> Msp430Timer0_B.Event[7]; + + components new Msp430TimerCapComP( TB0CCTL0_, TB0CCR0_ ) as Msp430Timer0_B0; + Control0_B0 = Msp430Timer0_B0.Control; + Compare0_B0 = Msp430Timer0_B0.Compare; + Capture0_B0 = Msp430Timer0_B0.Capture; + Msp430Timer0_B0.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B0.Event -> Msp430Timer0_B.Event[0]; + + components new Msp430TimerCapComP( TB0CCTL1_, TB0CCR1_ ) as Msp430Timer0_B1; + Control0_B1 = Msp430Timer0_B1.Control; + Compare0_B1 = Msp430Timer0_B1.Compare; + Capture0_B1 = Msp430Timer0_B1.Capture; + Msp430Timer0_B1.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B1.Event -> Msp430Timer0_B.Event[1]; + + components new Msp430TimerCapComP( TB0CCTL2_, TB0CCR2_ ) as Msp430Timer0_B2; + Control0_B2 = Msp430Timer0_B2.Control; + Compare0_B2 = Msp430Timer0_B2.Compare; + Capture0_B2 = Msp430Timer0_B2.Capture; + Msp430Timer0_B2.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B2.Event -> Msp430Timer0_B.Event[2]; + + components new Msp430TimerCapComP( TB0CCTL3_, TB0CCR3_ ) as Msp430Timer0_B3; + Control0_B3 = Msp430Timer0_B3.Control; + Compare0_B3 = Msp430Timer0_B3.Compare; + Capture0_B3 = Msp430Timer0_B3.Capture; + Msp430Timer0_B3.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B3.Event -> Msp430Timer0_B.Event[3]; + + components new Msp430TimerCapComP( TB0CCTL4_, TB0CCR4_ ) as Msp430Timer0_B4; + Control0_B4 = Msp430Timer0_B4.Control; + Compare0_B4 = Msp430Timer0_B4.Compare; + Capture0_B4 = Msp430Timer0_B4.Capture; + Msp430Timer0_B4.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B4.Event -> Msp430Timer0_B.Event[4]; + + components new Msp430TimerCapComP( TB0CCTL5_, TB0CCR5_ ) as Msp430Timer0_B5; + Control0_B5 = Msp430Timer0_B5.Control; + Compare0_B5 = Msp430Timer0_B5.Compare; + Capture0_B5 = Msp430Timer0_B5.Capture; + Msp430Timer0_B5.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B5.Event -> Msp430Timer0_B.Event[5]; + + components new Msp430TimerCapComP( TB0CCTL6_, TB0CCR6_ ) as Msp430Timer0_B6; + Control0_B6 = Msp430Timer0_B6.Control; + Compare0_B6 = Msp430Timer0_B6.Compare; + Capture0_B6 = Msp430Timer0_B6.Capture; + Msp430Timer0_B6.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B6.Event -> Msp430Timer0_B.Event[6]; + +#endif /* __MSP430_HAS_T0B7__ */ + +#if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + components new Msp430TimerP( TA1IV_, TA1R_, TA1CTL_, TAIFG, TACLR, TAIE, + TASSEL0, TASSEL1, FALSE ) as Msp430Timer1_A; + + Timer1_A = Msp430Timer1_A.Timer; + Msp430Timer1_A.VectorTimerX0 -> Common.VectorTimer1_A0; + Msp430Timer1_A.VectorTimerX1 -> Common.VectorTimer1_A1; + Msp430Timer1_A.Overflow -> Msp430Timer1_A.Event[7]; + + components new Msp430TimerCapComP( TA1CCTL0_, TA1CCR0_ ) as Msp430Timer1_A0; + Control1_A0 = Msp430Timer1_A0.Control; + Compare1_A0 = Msp430Timer1_A0.Compare; + Capture1_A0 = Msp430Timer1_A0.Capture; + Msp430Timer1_A0.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A0.Event -> Msp430Timer1_A.Event[0]; + + components new Msp430TimerCapComP( TA1CCTL1_, TA1CCR1_ ) as Msp430Timer1_A1; + Control1_A1 = Msp430Timer1_A1.Control; + Compare1_A1 = Msp430Timer1_A1.Compare; + Capture1_A1 = Msp430Timer1_A1.Capture; + Msp430Timer1_A1.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A1.Event -> Msp430Timer1_A.Event[1]; + +#if defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + components new Msp430TimerCapComP( TA1CCTL2_, TA1CCR2_ ) as Msp430Timer1_A2; + Control1_A2 = Msp430Timer1_A2.Control; + Compare1_A2 = Msp430Timer1_A2.Compare; + Capture1_A2 = Msp430Timer1_A2.Capture; + Msp430Timer1_A2.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A2.Event -> Msp430Timer1_A.Event[2]; + +#if defined(__MSP430_HAS_T1A5__) + components new Msp430TimerCapComP( TA1CCTL3_, TA1CCR3_ ) as Msp430Timer1_A3; + Control1_A3 = Msp430Timer1_A3.Control; + Compare1_A3 = Msp430Timer1_A3.Compare; + Capture1_A3 = Msp430Timer1_A3.Capture; + Msp430Timer1_A3.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A3.Event -> Msp430Timer1_A.Event[3]; + + components new Msp430TimerCapComP( TA1CCTL4_, TA1CCR4_ ) as Msp430Timer1_A4; + Control1_A4 = Msp430Timer1_A4.Control; + Compare1_A4 = Msp430Timer1_A4.Compare; + Capture1_A4 = Msp430Timer1_A4.Capture; + Msp430Timer1_A4.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A4.Event -> Msp430Timer1_A.Event[4]; +#endif /* __MSP430_HAS_T1A5__ */ + +#endif /* __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + +#endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + +#if defined(__MSP430_HAS_T2A3__) + components new Msp430TimerP( TA2IV_, TA2R_, TA2CTL_, TAIFG, TACLR, TAIE, + TASSEL0, TASSEL1, FALSE ) as Msp430Timer2_A; + + Timer2_A = Msp430Timer2_A.Timer; + Msp430Timer2_A.VectorTimerX0 -> Common.VectorTimer2_A0; + Msp430Timer2_A.VectorTimerX1 -> Common.VectorTimer2_A1; + Msp430Timer2_A.Overflow -> Msp430Timer2_A.Event[7]; + + components new Msp430TimerCapComP( TA2CCTL0_, TA2CCR0_ ) as Msp430Timer2_A0; + Control2_A0 = Msp430Timer2_A0.Control; + Compare2_A0 = Msp430Timer2_A0.Compare; + Capture2_A0 = Msp430Timer2_A0.Capture; + Msp430Timer2_A0.Timer -> Msp430Timer2_A.Timer; + Msp430Timer2_A0.Event -> Msp430Timer2_A.Event[0]; + + components new Msp430TimerCapComP( TA2CCTL1_, TA2CCR1_ ) as Msp430Timer2_A1; + Control2_A1 = Msp430Timer2_A1.Control; + Compare2_A1 = Msp430Timer2_A1.Compare; + Capture2_A1 = Msp430Timer2_A1.Capture; + Msp430Timer2_A1.Timer -> Msp430Timer2_A.Timer; + Msp430Timer2_A1.Event -> Msp430Timer2_A.Event[1]; + + components new Msp430TimerCapComP( TA2CCTL2_, TA2CCR2_ ) as Msp430Timer2_A2; + Control2_A2 = Msp430Timer2_A2.Control; + Compare2_A2 = Msp430Timer2_A2.Compare; + Capture2_A2 = Msp430Timer2_A2.Capture; + Msp430Timer2_A2.Timer -> Msp430Timer2_A.Timer; + Msp430Timer2_A2.Event -> Msp430Timer2_A.Event[2]; + +#endif /* __MSP430_HAS_T2A3__ */ +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc new file mode 100644 index 0000000000..7266ebca54 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc @@ -0,0 +1,45 @@ + +module Msp430TimerCommonP @safe() { + provides { +#if defined(__MSP430_HAS_T0A5__) + interface Msp430TimerEvent as VectorTimer0_A0; + interface Msp430TimerEvent as VectorTimer0_A1; +#endif /* __MSP430_HAS_T0A5__ */ + +#if defined(__MSP430_HAS_T0B7__) + interface Msp430TimerEvent as VectorTimer0_B0; + interface Msp430TimerEvent as VectorTimer0_B1; +#endif /* __MSP430_HAS_T0A5__ */ + +#if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + interface Msp430TimerEvent as VectorTimer1_A0; + interface Msp430TimerEvent as VectorTimer1_A1; +#endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + +#if defined(__MSP430_HAS_T2A3__) + interface Msp430TimerEvent as VectorTimer2_A0; + interface Msp430TimerEvent as VectorTimer2_A1; +#endif /* __MSP430_HAS_T2A3__ */ + } +} +implementation { +#if defined(__MSP430_HAS_T0A5__) + TOSH_SIGNAL(TIMER0_A0_VECTOR) { signal VectorTimer0_A0.fired(); } + TOSH_SIGNAL(TIMER0_A1_VECTOR) { signal VectorTimer0_A1.fired(); } +#endif /* __MSP430_HAS_T0A5__ */ + +#if defined(__MSP430_HAS_T0B7__) + TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer0_B0.fired(); } + TOSH_SIGNAL(TIMER1_A1_VECTOR) { signal VectorTimer0_B1.fired(); } +#endif /* __MSP430_HAS_T0A5__ */ + +#if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer1_A0.fired(); } + TOSH_SIGNAL(TIMER1_A1_VECTOR) { signal VectorTimer1_A1.fired(); } +#endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + +#if defined(__MSP430_HAS_T2A3__) + TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer2_A0.fired(); } + TOSH_SIGNAL(TIMER1_A1_VECTOR) { signal VectorTimer2_A1.fired(); } +#endif /* __MSP430_HAS_T2A3__ */ +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc new file mode 100644 index 0000000000..06152fedb0 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Configuration for the clocks and timers on an x5 family processor + * (MSP430XV2). + * + * The actual setting of the h/w occurs in Msp430XV2ClockP. T0A5 is + * used to provide a 32KiHz timebase and T1A3 is used to provide + * a 1MiHz timebase. + * + * If your board requires other configurations, implement + * Msp430XV2ClockInit in your own component and connect to this + * implementation's events to override each configuration step as + * necessary. + * + * @author Cory Sharp + * @author Peter A. Bigot + * @author Eric B. Decker + */ + +configuration Msp430XV2ClockC { + provides { + interface Init; + interface Msp430XV2ClockControl; + interface StdControl as InhibitUcs7WorkaroundControl; +} +implementation { + components Msp430XV2ClockP; + Init = Msp430XV2ClockP; + + /* + * Must reference Msp430TimerC, since the Msp430XV2ClockInit code + * will enable interrupts that are only defined if that component is + * linked in. + */ + components Msp430TimerC; + + components Msp430XV2ClockControlP; + Msp430XV2ClockControl = Msp430XV2ClockControlP; + InhibitUcs7WorkaroundControl = Msp430XV2ClockControlP.InhibitUcs7WorkaroundControl; + Msp430XV2ClockP.Msp430XV2ClockControl -> Msp430XV2ClockControlP; + + components McuSleepC; + McuSleepC.McuPowerOverride -> Msp430XV2ClockControlP; + + /* Work around UCS7 */ + Msp430XV2ClockControlP.McuSleepEvents -> McuSleepC; +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc new file mode 100644 index 0000000000..071ab786d8 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + * @author Peter A. Bigot + */ + +/** + * Assistance with controlling an MSP430XV2 clock/timer infrastructure. + * + * This interface provides the ability to configure the DCO, and to + * individually start and stop the 32KHz and 1MHz timers. + * + * @author Peter A. Bigot + */ + +interface Msp430XV2ClockControl { + /* + * Configure the unified clock system for a specified DCO (MCLK) + * rate. Generally, the parameter is a value from the + * Msp430XV2DcoConfig_e enumeration, but non-default implementations + * may use alternative encodings. + * + * This operation can be invoked after startup to change the clock + * speed (and hence power consumption), though doing so may disrupt + * timers. It is recommended that both the 32KHz and Micro timers + * be stopped while changing the DCO configuration. + */ + async command void configureUnifiedClockSystem (int dco_config); + + /* + * Configure the 32KHz (T32Khz) and 1MHz (TMicro) timers + * + * Upon completion, the timers are configured but off. Invoking + * this will reset the values of hardware timer counters. + */ + command void configureTimers (); + + /* + * Start the 32KHz timer. + * + * Upon completion of this command, the timer is running in + * continuous mode. + * + * This is normally invoked during platform initialization through + * Msp430XV2ClockC.Init. + */ + async command void start32khzTimer (); + + /* + * Stop the 32KHz timer. + * + * Upon completion of this command, the timer is stopped and + * interrupts are disabled. + * + * This is normally never invoked, but might be useful to enter + * really low-power modes. + */ + async command void stop32khzTimer (); + + /** Return TRUE iff T32khz is running. */ + async command bool is32khzTimerRunning (); + + /* + * Start the 1MHz timer. + * + * Upon completion of this command, the timer is running in + * continuous mode. + * + * This is normally invoked during platform initialization through + * Msp430XV2ClockC.Init. It may be invoked in certain cases upon + * return from a low power mode for which the timer was disabled. + * + * It is safe to invoke this while the timer is running; do so will + * not affect the running system. + */ + async command void startMicroTimer (); + + /* + * Stop the 1MHz timer. + * + * Upon completion of this command, the timer is stopped. + * + * Certain MSP430 chips will not enter the requested low power modes + * if a running timer depends on SMCLK (which is often used as + * TMicro). Use of this command can temporarily turn off the + * timers. It is safe to re-invoke this operation while the timer + * is stopped. + * + * @note While TMicro is stopped, certain facilities such as + * BusyWaitMicro will not work. + */ + async command void stopMicroTimer (); + + /** Return TRUE iff TMicro is running. */ + async command bool isMicroTimerRunning (); +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc new file mode 100644 index 0000000000..3713b0c6e3 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc @@ -0,0 +1,284 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Configuration for MSP430 Unified Clock System and Timer A modules. + * + * X5 (cc430f5137, msp430f5438, MSP430XV2 and friends). Assumed that + * T0A5 and T1A3 timers are available. T0A is used for 32KiHz and + * T1A is used for 1MiHz. + * + * @author Peter A. Bigot + */ + +#include "hardware.h" +#include "Msp430XV2Dco.h" + +module Msp430XV2ClockControlP @safe() { + uses { + interface McuSleepEvents; + } + provides { + interface Msp430XV2ClockControl; + interface McuPowerOverride; + interface StdControl as InhibitUcs7WorkaroundControl; + } +} implementation { + + async command void Msp430XV2ClockControl.configureUnifiedClockSystem (int dco_config) { + uint16_t divs; + + atomic { + /* ACLK is to be set to XT1CLK, assumed to be 32KiHz (2^15Hz), + * falls back to REFOCLK if absent. + * + * DCO is to be set as configured. The clock divider is the + * minimum value of 2. + * + * MCLK is set to DCOCLKDIV, or half the DCO rate. + * + * SMLCK is set to DCOCLKDIV / N such that it has a value of ~ 1MiHz (2^20 Hz) + * + * The technique used here is cribbed from the TI Example programs + * for the CC430, cc430x613x_UCS_2.c. */ + + /* Disable FLL control */ + __bis_SR_register(SR_SCG0); + + /* Use XT1CLK as the FLL input: if it isn't valid, the module + * will fall back to REFOCLK. Use FLLREFDIV value 1 (selected + * by bits 000) */ + UCSCTL3 = SELREF__XT1CLK; + + /* The appropriate value for DCORSEL is obtained from the DCO + * Frequency table of the device datasheet. Find the DCORSEL + * value from that table where the minimum frequency with DCOx=31 + * is closest to your desired DCO frequency. */ + UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx + + switch (dco_config) { + /* If unrecognized, default to the CC430 power-up value */ + case MSP430XV2_DCO_2MHz_RSEL2: + default: + UCSCTL1 = DCORSEL_2; + UCSCTL2 = FLLD_1 + 31; + divs = DIVS__1; + break; + case MSP430XV2_DCO_4MHz_RSEL3: + UCSCTL1 = DCORSEL_3; + UCSCTL2 = FLLD_1 + 63; + divs = DIVS__2; + break; + case MSP430XV2_DCO_8MHz_RSEL3: + UCSCTL1 = DCORSEL_3; + UCSCTL2 = FLLD_1 + 127; + divs = DIVS__4; + break; + case MSP430XV2_DCO_8MHz_RSEL4: + UCSCTL1 = DCORSEL_4; + UCSCTL2 = FLLD_1 + 127; + divs = DIVS__4; + break; + case MSP430XV2_DCO_16MHz_RSEL4: + UCSCTL1 = DCORSEL_4; + UCSCTL2 = FLLD_1 + 255; + divs = DIVS__8; + break; + case MSP430XV2_DCO_16MHz_RSEL5: + UCSCTL1 = DCORSEL_5; + UCSCTL2 = FLLD_1 + 255; + divs = DIVS__8; + break; + case MSP430XV2_DCO_32MHz_RSEL5: + UCSCTL1 = DCORSEL_5; + UCSCTL2 = FLLD_1 + 511; + divs = DIVS__16; + break; + case MSP430XV2_DCO_32MHz_RSEL6: + UCSCTL1 = DCORSEL_6; + UCSCTL2 = FLLD_1 + 511; + divs = DIVS__16; + break; + case MSP430XV2_DCO_64MHz_RSEL6: + UCSCTL1 = DCORSEL_6; + UCSCTL2 = FLLD_1 + 1023; + divs = DIVS__32; + break; + case MSP430XV2_DCO_64MHz_RSEL7: + UCSCTL1 = DCORSEL_7; + UCSCTL2 = FLLD_1 + 1023; + divs = DIVS__32; + break; + } + + __bic_SR_register(SR_SCG0); // Enable the FLL control loop + +#ifdef notdef + /* No __delay_cycles intrinsic on MSPGCC (yet) */ + // Worst-case settling time for the DCO when the DCO range bits have been + // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx + // UG for optimization. + // 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle + __delay_cycles(250000); +#endif + + // Loop until DCO fault flag is cleared. Ignore OFIFG, since it + // incorporates XT1 and XT2 fault detection. + do { + UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); + // Clear XT2,XT1,DCO fault flags + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while (UCSCTL7 & DCOFFG); // Test DCO fault flag + + /* Use REFOCLK for ACLK, and DCOCLKDIV for MCLK and SMCLK */ + UCSCTL4 = SELA__REFOCLK | SELS__DCOCLKDIV | SELM__DCOCLKDIV; + + /* DIVPA routes ACLK to external pin, undivided + * DIVA uses ACLK at 2^15 Hz, undivided + * DIVS (SMCLK) uses DCOCLKDIV / N to produce 2^20Hz + * DIVM (MCLK) uses DCOCLKDIV to produce DCO/2, undivided + */ + UCSCTL5 = DIVPA__1 | DIVA__1 | divs | DIVM__1; + } + } + + command void Msp430XV2ClockControl.configureTimers () { + atomic { + TA0CTL = TASSEL__ACLK | TACLR | MC__STOP | TAIE; + TA0R = 0; + TA1CTL = TASSEL__SMCLK | TACLR | MC__STOP | TAIE; + TA1R = 0; + } + } + + async command void Msp430XV2ClockControl.start32khzTimer () { + atomic TA0CTL = MC__CONTINOUS | (TA0CTL & ~(MC0|MC1)); + } + + async command void Msp430XV2ClockControl.stop32khzTimer () { + atomic TA0CTL = MC__STOP | (TA0CTL & ~(MC0|MC1)); + } + + async command bool Msp430XV2ClockControl.is32khzTimerRunning () { + atomic return (MC_STOP != (TA0CTL & ~(MC0|MC1))); + } + + async command void Msp430XV2ClockControl.startMicroTimer () { + atomic TA1CTL = MC__CONTINOUS | (TA1CTL & ~(MC0|MC1)); + } + + async command void Msp430XV2ClockControl.stopMicroTimer () { + atomic TA1CTL = MC__STOP | (TA1CTL & ~(MC0|MC1)); + } + + async command bool Msp430XV2ClockControl.isMicroTimerRunning () { + atomic return (MC_STOP != (TA1CTL & ~(MC0|MC1))); + } + + /* + * Support for UCS7 workaround. This chip erratum causes DCO + * drift if the MCU is not active for at least three reference + * count periods when coming out of LPM2 or higher. What we'll do + * is, if the last time we came out of sleep in such a mode isn't + * at least that long ago, go to sleep in LPM0 instead. This + * relies on TA0 being active and at the same rate as REFCLK, + * which it is. + * + * Validate the need for this using the LocalTime bootstrap program. + * Errors-per-thousand should remain zero if the workaround is + * effective, and is generally greater than 10 if not effective and + * the erratum is present in the chip. Alternatively, verify with + * SerialEcho and large incoming packets. (Disable the workaround + * by setting the minimum active duration value below to zero.) + * + * NB: The current implementation means that at most 50% of the time + * will be in a true low power mode; when the inter-wakeup duration + * is long, a whole period will be spent in LPM0 while it would be + * sufficient to wake up after three reference clock periods and + * re-enter sleep at a deeper level. To do so would require + * configuring a timer here, which is a bit too deep in the + * implementation. Applications that are particularly concerned + * about power may implement their own workaround, disabling this + * one through the InhibitUcs7WorkaroundControl interface. + */ + + enum { + /** UCS7 suggests waiting at least 3 reference clock periods + * before disabling FLL. */ + MinimumFLLActiveDuration_refclk = 3 + }; + + /** Set to TRUE to inhibit the UCS7 workaround code. */ + bool inhibitUCS7_; + + command error_t InhibitUcs7WorkaroundControl.start() { + atomic inhibitUCS7_ = TRUE; + return SUCCESS; + } + + command error_t InhibitUcs7WorkaroundControl.stop() { + atomic inhibitUCS7_ = FALSE; + return SUCCESS; + } + + /** TA0R value at the last wake-up which re-enabled FLL */ + uint16_t fllRestart_refclk; + + async command mcu_power_t McuPowerOverride.lowestState() { + mcu_power_t rv = MSP430_POWER_LPM4; + + if (! inhibitUCS7_) { + uint16_t now_refclk; + uint16_t fll_active_refclk; + atomic now_refclk = TA0R; + if (now_refclk >= fllRestart_refclk) { + fll_active_refclk = now_refclk - fllRestart_refclk; + } else { + fll_active_refclk = fllRestart_refclk - now_refclk; + } + if (MinimumFLLActiveDuration_refclk > fll_active_refclk) { + rv = MSP430_POWER_LPM0; + } + } + return rv; + } + + async event void McuSleepEvents.preSleep(mcu_power_t sleep_mode) { } + + async event void McuSleepEvents.postSleep(mcu_power_t sleep_mode) { + if (sleep_mode >= MSP430_POWER_LPM1) { + atomic fllRestart_refclk = TA0R; + } + } +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc new file mode 100644 index 0000000000..747d367061 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Clock configuration for an MSP430XV2 board. + * + * @note If changing the rate for SMCLK, also update the UART configuration in + * hardware/usci/PlatformSerialP.nc + * + * @author Peter A. Bigot + * @author Eric B. Decker + */ + +#include "msp430hardware.h" +#include "Msp430XV2Dco.h" + +module Msp430XV2ClockP @safe() { + provides { + interface Init; + } + uses { + interface Msp430XV2ClockControl; + } +} implementation { + +/* + * Determine a default value for the DCO configuration, unless we + * already have one. + */ +#ifndef MSP430XV2_DCO_CONFIG +/* + * If somebody hasn't told us the preferred target DCO, look for it in + * the legacy location + */ +#ifndef TARGET_DCO_KHZ +#include "Msp430DcoSpec.h" +#endif /* TARGET_DCO_KHZ */ + +/* Pick something based on target DCO */ +#if 4096 == TARGET_DCO_KHZ +#define MSP430XV2_DCO_CONFIG MSP430XV2_DCO_8MHz_RSEL3 +#else /* TARGET_DCO_KHZ value */ +#define MSP430XV2_DCO_CONFIG MSP430XV2_DCO_8MHz_RSEL3 +#endif /* TARGET_DCO_KHZ value */ +#endif /* MSP430XV2_DCO_CONFIG */ + + command error_t Init.init() { + atomic { + call Msp430XV2ClockControl.configureUnifiedClockSystem(MSP430XV2_DCO_CONFIG); + call Msp430XV2ClockControl.configureTimers(); + call Msp430XV2ClockControl.start32khzTimer(); + call Msp430XV2ClockControl.startMicroTimer(); + } + return SUCCESS; + } +} diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h b/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h new file mode 100644 index 0000000000..f6beba339e --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter A. Bigot + */ + +#ifndef _MSP430XV2DCO_H +#define _MSP430XV2DCO_H + +/* + * Define material relevant to configuring the DCO on an MSP430 + * Unified Clock System module. + * + * DCO configuration is normally performed in Msp430XV2ClockControlP. + * DCO rates below are in binary megahertz (viz., 4MiHz == 2^24Hz). In + * the default implementation ACLK is always at 2^15 Hz (32KiHz), MCLK + * is always half the DCO rate, and SMCLK is scaled to be 1MHz + * (2^20Hz). The frequency range selection value is taken from the + * "DCO Frequency" table in the chip-specific electrical + * characteristics datasheet. Where one DCO frequency is available as + * multiple RSEL values, it is because that frequency can be obtained + * with two different configurations, which may have different + * stability characteristics. It is the developer's responsibility to + * select the correct DCO/RSEL pairing for the target chip. + */ + +/** Constants used to configure specific DCO rates on MSP430 chips. */ +typedef enum Msp430XV2DcoConfig_e { + MSP430XV2_DCO_2MHz_RSEL2, + MSP430XV2_DCO_4MHz_RSEL3, + MSP430XV2_DCO_8MHz_RSEL3, + MSP430XV2_DCO_8MHz_RSEL4, + MSP430XV2_DCO_16MHz_RSEL4, + MSP430XV2_DCO_16MHz_RSEL5, + MSP430XV2_DCO_32MHz_RSEL5, + MSP430XV2_DCO_32MHz_RSEL6, + MSP430XV2_DCO_64MHz_RSEL6, + MSP430XV2_DCO_64MHz_RSEL7, +} Msp430XV2DcoConfig_e; + +#endif // _MSP430XV2DCO_H From 805023b40c5d64acc43960ce45325555896292a6 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 4 Jun 2011 02:53:58 -0700 Subject: [PATCH 082/411] msp430 x5: x5 timer code now handles T0A3 case. --- .../msp430/x5xxx/timer/Msp430Counter32khzC.nc | 2 +- .../msp430/x5xxx/timer/Msp430CounterMicroC.nc | 2 +- .../x5xxx/timer/Msp430Timer32khzMapC.nc | 14 +++++++-- tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc | 30 +++++++++++++------ .../msp430/x5xxx/timer/Msp430TimerCommonP.nc | 12 ++++---- 5 files changed, 40 insertions(+), 20 deletions(-) diff --git a/tos/chips/msp430/x5xxx/timer/Msp430Counter32khzC.nc b/tos/chips/msp430/x5xxx/timer/Msp430Counter32khzC.nc index 29644cebf7..21382d7405 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430Counter32khzC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430Counter32khzC.nc @@ -45,7 +45,7 @@ * intended use. * * The cc430f5137 and the msp430f5138{,a} (both x5 family) have at a minimum the - * T0A5 and T1A3 timer h/w. We assign T0A to the 32KiHz timer an T1A to the + * T0A5 and T1A3 timer h/w. We assign T0A to the 32KiHz timer and T1A to the * 1 MiHz (TMicro) timer (see Msp430CounterMicro). */ diff --git a/tos/chips/msp430/x5xxx/timer/Msp430CounterMicroC.nc b/tos/chips/msp430/x5xxx/timer/Msp430CounterMicroC.nc index 07b87615d7..28fcc9438b 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430CounterMicroC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430CounterMicroC.nc @@ -45,7 +45,7 @@ * intended use. * * The cc430f5137 and the msp430f5138{,a} (both x5 family) have at a minimum the - * T0A5 and T1A3 timer h/w. We assign T0A to the 32KiHz timer an T1A to the + * T0A5 and T1A3 timer h/w. We assign T0A to the 32KiHz timer and T1A to the * 1 MiHz (TMicro) timer (see Msp430CounterMicro). */ diff --git a/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc index 20a5a33653..fa982059f6 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc @@ -47,9 +47,15 @@ */ /* - * Currently, all MSP430XV2 architectures support T0A5, so we'll use - * that for the 32KHz timer suite. If you clone this to a platform - * area, remember to also clone Msp430Counter32khzC if you change to a + * Inspection of cpu header files shows that the following defines exist. + * (all of the form __msp430_has___ where xxxx gets replace with + * which timer module. Modules seen: TA3, T0A3, T0A5, T1A2, T1A3, T1A5, + * T2A3, T0B7, T0D3, T1D3. Which modules are actually present depends + * on which chip is being used and is reflected in the cpu header file. + * + * All supported x5 (msp430xv2) chips support T0An, so we'll use that + * for the 32KHz timer suite. If you clone this to a platform area, + * remember to also clone Msp430Counter32khzC if you change to a * different timer. */ @@ -75,6 +81,7 @@ implementation { Msp430TimerControl[2] = Msp430TimerC.Control0_A2; Msp430Compare[2] = Msp430TimerC.Compare0_A2; +#if defined(__MSP430_HAS_T0A5__) Msp430Timer[3] = Msp430TimerC.Timer0_A; Msp430TimerControl[3] = Msp430TimerC.Control0_A3; Msp430Compare[3] = Msp430TimerC.Compare0_A3; @@ -82,4 +89,5 @@ implementation { Msp430Timer[4] = Msp430TimerC.Timer0_A; Msp430TimerControl[4] = Msp430TimerC.Control0_A4; Msp430Compare[4] = Msp430TimerC.Compare0_A4; +#endif /* __MSP430_HAS_T0A5__ */ } diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc index 5d66571639..dd779aba29 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -35,17 +36,23 @@ /* * TinyOS Msp430 support started with the msp430f1611 which provided * 1 TA3 (3 CCRs) and 1 TB7 (7 CCRs). The cc430 and 5438 cpus (both x5) - * provide a TA5 and TA3 but no TBs. Other chips in the MSP430XV2 + * provide a T0A5 and T1A3 but no TBs. Other chips in the MSP430XV2 * series have different suites. Current TI headers indicate the * following sets are available: * - * T0A5 T0B7 + * T0A3, T0A5 * T1A2 T1A3 T1A5 * T2A3 + * T0B7 + * T0D3, T1D3 + * + * TA3 is also defined but not in any of the x5 cpu headers. This may + * become an issue when we start to support the x4 family. * * Timer_B extends Timer_A with some extra features that are not * currently supported in TinyOS. Until those features are needed, * Timer_B instances use the same interfaces as Timer_A instances. + * Ditto for Timer_D. * * @note As of this writing, only T0A5 and T1A3 have been tested. * @@ -54,7 +61,7 @@ */ configuration Msp430TimerC { -#if defined(__MSP430_HAS_T0A5__) +#if defined(__MSP430_HAS_T0A3__) || defined(__MSP430_HAS_T0A5__) provides interface Msp430Timer as Timer0_A; provides interface Msp430TimerControl as Control0_A0; @@ -69,6 +76,7 @@ configuration Msp430TimerC { provides interface Msp430Compare as Compare0_A2; provides interface Msp430Capture as Capture0_A2; +#if defined(__MSP430_HAS_T0A5__) provides interface Msp430TimerControl as Control0_A3; provides interface Msp430Compare as Compare0_A3; provides interface Msp430Capture as Capture0_A3; @@ -77,6 +85,7 @@ configuration Msp430TimerC { provides interface Msp430Compare as Compare0_A4; provides interface Msp430Capture as Capture0_A4; #endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0A3__ || __MSP430_HAS_T0A5__ */ #if defined(__MSP430_HAS_T0B7__) provides interface Msp430Timer as Timer0_B; @@ -108,7 +117,7 @@ configuration Msp430TimerC { provides interface Msp430TimerControl as Control0_B6; provides interface Msp430Compare as Compare0_B6; provides interface Msp430Capture as Capture0_B6; -#endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0B7__ */ #if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) provides interface Msp430Timer as Timer1_A; @@ -135,11 +144,10 @@ configuration Msp430TimerC { provides interface Msp430Compare as Compare1_A4; provides interface Msp430Capture as Capture1_A4; #endif /* __MSP430_HAS_T1A5__ */ - #endif /* __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ - #endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + #if defined(__MSP430_HAS_T2A3__) provides interface Msp430Timer as Timer2_A; @@ -160,7 +168,7 @@ configuration Msp430TimerC { implementation { components Msp430TimerCommonP as Common; -#if defined(__MSP430_HAS_T0A5__) +#if defined(__MSP430_HAS_T0A3__) || defined(__MSP430_HAS_T0A5__) components new Msp430TimerP( TA0IV_, TA0R_, TA0CTL_, TAIFG, TACLR, TAIE, TASSEL0, TASSEL1, FALSE ) as Msp430Timer0_A; @@ -190,6 +198,7 @@ implementation { Msp430Timer0_A2.Timer -> Msp430Timer0_A.Timer; Msp430Timer0_A2.Event -> Msp430Timer0_A.Event[2]; +#if defined(__MSP430_HAS_T0A5__) components new Msp430TimerCapComP( TA0CCTL3_, TA0CCR3_ ) as Msp430Timer0_A3; Control0_A3 = Msp430Timer0_A3.Control; Compare0_A3 = Msp430Timer0_A3.Compare; @@ -205,6 +214,8 @@ implementation { Msp430Timer0_A4.Event -> Msp430Timer0_A.Event[4]; #endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0A3__ || __MSP430_HAS_T0A5__ */ + #if defined(__MSP430_HAS_T0B7__) components new Msp430TimerP( TB0IV_, TB0R_, TB0CTL_, TBIFG, TBCLR, TBIE, @@ -266,6 +277,7 @@ implementation { #endif /* __MSP430_HAS_T0B7__ */ + #if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) components new Msp430TimerP( TA1IV_, TA1R_, TA1CTL_, TAIFG, TACLR, TAIE, TASSEL0, TASSEL1, FALSE ) as Msp430Timer1_A; @@ -311,12 +323,12 @@ implementation { Capture1_A4 = Msp430Timer1_A4.Capture; Msp430Timer1_A4.Timer -> Msp430Timer1_A.Timer; Msp430Timer1_A4.Event -> Msp430Timer1_A.Event[4]; -#endif /* __MSP430_HAS_T1A5__ */ +#endif /* __MSP430_HAS_T1A5__ */ #endif /* __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ - #endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + #if defined(__MSP430_HAS_T2A3__) components new Msp430TimerP( TA2IV_, TA2R_, TA2CTL_, TAIFG, TACLR, TAIE, TASSEL0, TASSEL1, FALSE ) as Msp430Timer2_A; diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc index 7266ebca54..b3126db44b 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc @@ -1,15 +1,15 @@ module Msp430TimerCommonP @safe() { provides { -#if defined(__MSP430_HAS_T0A5__) +#if defined(__MSP430_HAS_T0A3__) || defined(__MSP430_HAS_T0A5__) interface Msp430TimerEvent as VectorTimer0_A0; interface Msp430TimerEvent as VectorTimer0_A1; -#endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0A3__ || __MSP430_HAS_T0A5__ */ #if defined(__MSP430_HAS_T0B7__) interface Msp430TimerEvent as VectorTimer0_B0; interface Msp430TimerEvent as VectorTimer0_B1; -#endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0B7__ */ #if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) interface Msp430TimerEvent as VectorTimer1_A0; @@ -23,15 +23,15 @@ module Msp430TimerCommonP @safe() { } } implementation { -#if defined(__MSP430_HAS_T0A5__) +#if defined(__MSP430_HAS_T0A3__) || defined(__MSP430_HAS_T0A5__) TOSH_SIGNAL(TIMER0_A0_VECTOR) { signal VectorTimer0_A0.fired(); } TOSH_SIGNAL(TIMER0_A1_VECTOR) { signal VectorTimer0_A1.fired(); } -#endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0A3__ || __MSP430_HAS_T0A5__ */ #if defined(__MSP430_HAS_T0B7__) TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer0_B0.fired(); } TOSH_SIGNAL(TIMER1_A1_VECTOR) { signal VectorTimer0_B1.fired(); } -#endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0B7__ */ #if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer1_A0.fired(); } From acb8696c5a8900986d615abd4aab21258a1448f9 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 4 Jun 2011 22:30:21 -0700 Subject: [PATCH 083/411] msp430: add more info about chips to msp430/00_Chip_Notes --- tos/chips/msp430/00_Chip_Notes | 89 +++++++++++++++++++++++++++++++--- 1 file changed, 83 insertions(+), 6 deletions(-) diff --git a/tos/chips/msp430/00_Chip_Notes b/tos/chips/msp430/00_Chip_Notes index fab0d6ba6a..11b5383e43 100644 --- a/tos/chips/msp430/00_Chip_Notes +++ b/tos/chips/msp430/00_Chip_Notes @@ -42,8 +42,8 @@ The following families and their associated cpus are listed below. When a new c it can first be isolated and supported independently. When commonalities are understood, any duplication can be removed and subsumed into a flat file via #ifdef's as appropriate. Any remaining interfaces that are too cumbersome, can be supported by an existing cpu family interface or a new family -can be defined as appropriate. The intent is to provide a mechanism that allows gradual refactorization as -new cpus are brought into the fold. +can be defined as appropriate. The intent is to provide a mechanism that allows evolutionary +refactorization as new cpus are brought into the fold. The following families currently exist. Included are what cpus have been verified. Only add cpus that have actually been instantiated. @@ -60,6 +60,9 @@ x5xxx (x5): cc430f5137, msp430f5438{,a} surf (cc430f5137), ev430-5137, ev430-5438, mm5 (mam-mark mote, msp430f5438a) + +TinyOS Interface: + The tinyos interface is split into several sections: msp430hardware.h and msp430regtypes.h define various other attributes that interface the cpu @@ -74,9 +77,13 @@ __MSP430_HAS_MSP430XV2_CPU__ indicate the potential for 20 bit addresses. Swit toolchain will determine the instructions used and the size of pointers. MSP430 processors are highly integrated, combining a cpu with various peripherals. The toolchain -provides chip definition files (includes) for each processor. These files indicate what peripherals -and other functions are present by the use of switches. These switches are of the form -__MSP430_HAS___, where indicates the function provided. +provides chip definition files (includes) for each processor. These files are located in +the directory /msp430/include and look like .h, ie. msp430f5438a.h. + +The header includes switches that describe what peripherals and other functions are present. +These switches are of the form __MSP430_HAS___, where indicates the function provided. +See the end of this document for a list of current families, cpus, and what _HAS_ clauses are +provided. Drivers for the different peripherals are provided in appropriately named subdirectories of the main msp430 directory. Presence of the peripheral can be detected by checking appropriate values in the @@ -95,7 +102,9 @@ clock_bcs: low level interface to on board clocking. BASIC CLOCK SYSTEM (x1, x2 __MSP430_HAS_BC2__ indicates 2nd rev of BASIC CLOCK. Same driver supports. (x2) clock_ucs: low level interface to x5 on board clocking. Unified Clock System introduced with the - x5 processors. + x5 processors. Currently only the x5 family uses the UCS so its files currently reside + in the x5xxx/timer directory. If another family makes use of the UCS then these files + should get moved to clock_ucs. __MSP430_HAS_UCS__ differences are minor and can probably be supported by the same __MSP430_HAS_UCS_RF__ driver. Waiting for 5137 (surf) and mm5 (5438) integration. @@ -177,5 +186,73 @@ usci: interface to USCI (Universal Serial Communications Interface) modules UART __MSP430_HAS_USCI_A0__ x5. excellent module base registers, reasonable independent __MSP430_HAS_USCI_B0__ interrupt vectors. + Given the strange x2 cpu/usci interface (registers, byte vs. word, interrupt interface) + there are seperate x2/x5 usci drivers. For the time being it is simpler that way. The + x5 usci driver is implemented as a model that is used to generate drivers for each + individual port. x5 processors can have many usci ports. + When implementing new functionality a good approach is to base a driver off of one of the __MSP430_HAS switches with an appropriately named directory. + + + +Only the clause is listed. ie. __MSP430_HAS___ is the actual switch defined. + +x1, msp430f149: + BASIC_CLOCK TA3 TB7 + WDT MPY ADC12 + PORT1 PORT2 PORT3 PORT4 PORT5 PORT6 + UART0 UART1 + FLASH COMPA + +x1, msp430f1611: + BASIC_CLOCK TA3 TB7 + WDT MPY ADC12 DMA_3 + PORT1 PORT2 PORT3 PORT4 PORT5 PORT6 + UART0 UART1 I2C + SVS FLASH COMPA DAC12_2 + +x2, msp430f2618 (msp430f261[6-9] similar): + MSP430X_CPU BC2 TA3 TB7 + WDT MPY ADC12 DMAX_3 + PORT1_R PORT2_R PORT3_R PORT4_R PORT5_R PORT6_R PORT7_R PORT8_R PORTA_R + USCI USCI_AB0 USCI_AB1 + SVS FLASH2 CAPLUS DAC12_2 + +x1?, msp430f2274 (currently unsupported) + BC2 TA3 TB3 + WDT ADC10 + PORT1_R PORT2_R PORT3_R PORT4_R + USCI + FLASH2 OA_2 + +x1?, msp430f2370 (currently unsupported) + BC2 TA3 TB3 + WDT MPY + PORT1_R PORT2_R PORT3_R PORT4_R + USCI + FLASH2 CAPLUS + +x5, cc430f5137 + MSP430XV2_CPU UCS_RF T0A5 T1A3 + WDT_A MPY32 ADC12_PLUS DMAX_3 + PORT1_R PORT2_R PORTA_R PORT3_R PORT4_R PORTB_R PORT5_R PORTC_R + PORTJ_R PORT_MAPPING PORT1_MAPPING PORT2_MAPPING PORT3_MAPPING + USCI_A0 USCI_B0 + CC1101 + AES CRC COMPB FLASH + PMM RC REF RTC SYS SFR TLV + +x5, msp430f5438a + MSP430XV2_CPU UCS T0A5 T1A3 T0B7 + WDT_A MPY32 ADC12_PLUS DMAX_3 + PORT1_R PORT2_R PORTA_R PORT3_R PORT4_R PORTB_R PORT5_R PORT6_R PORTC_R + PORT7_R PORT8_R PORTD_R PORT9_R PORT10_R PORTE_R PORT11_R PORTF_R + PORTJ_R + USCI_A0 USCI_B0 USCI_A1 USCI_B1 USCI_A2 USCI_B2 USCI_A3 USCI_B3 + CRC FLASH + PMM RC REF RTC SYS SFR TLV + + + + From d952a128529c7394cce218659f91a95f25d5cc04 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 5 Jun 2011 01:09:53 -0700 Subject: [PATCH 084/411] msp430: protect x1/x2 timer code, handle TA3, TB3/TB7 cases. chips with TB3 only define the appropriate Control, Compare, and Captures. add error clauses to bitch if we don't have the right hardware. --- .../msp430/x1x2/timer/Msp430Timer32khzMapC.nc | 28 +++++--- tos/chips/msp430/x1x2/timer/Msp430TimerC.nc | 70 +++++++++++-------- 2 files changed, 59 insertions(+), 39 deletions(-) diff --git a/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc index df68c38ff6..93eee6b123 100644 --- a/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc +++ b/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc @@ -1,6 +1,6 @@ -//$Id: Msp430Timer32khzMapC.nc,v 1.5 2010-06-29 22:07:45 scipio Exp $ - -/* Copyright (c) 2000-2003 The Regents of the University of California. +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -9,10 +9,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -36,21 +38,23 @@ * hardware timers on the MSP430 that are available for compile time allocation * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. * - * Platforms based on the MSP430 are encouraged to copy in and override this - * file, presenting only the hardware timers that are available for allocation - * on that platform. - * * @author Cory Sharp + * @author Eric B. Decker + */ + +/* + * Currently only support TB3 and TB7 modules */ +#if !defined(__MSP430_HAS_TB3__) && !defined(__MSP430_HAS_TB7__) +#error "x1x2/timer/Msp430Timer32khzMapC: need either TB3 or TB7." +#endif -configuration Msp430Timer32khzMapC -{ +configuration Msp430Timer32khzMapC { provides interface Msp430Timer[ uint8_t id ]; provides interface Msp430TimerControl[ uint8_t id ]; provides interface Msp430Compare[ uint8_t id ]; } -implementation -{ +implementation { components Msp430TimerC; Msp430Timer[0] = Msp430TimerC.TimerB; @@ -65,6 +69,7 @@ implementation Msp430TimerControl[2] = Msp430TimerC.ControlB2; Msp430Compare[2] = Msp430TimerC.CompareB2; +#if defined(__MSP430_HAS_TB7__) Msp430Timer[3] = Msp430TimerC.TimerB; Msp430TimerControl[3] = Msp430TimerC.ControlB3; Msp430Compare[3] = Msp430TimerC.CompareB3; @@ -80,5 +85,6 @@ implementation Msp430Timer[6] = Msp430TimerC.TimerB; Msp430TimerControl[6] = Msp430TimerC.ControlB6; Msp430Compare[6] = Msp430TimerC.CompareB6; +#endif /* __MSP430_HAS_TB7__ */ } diff --git a/tos/chips/msp430/x1x2/timer/Msp430TimerC.nc b/tos/chips/msp430/x1x2/timer/Msp430TimerC.nc index 4230468af4..ccffd98f5b 100644 --- a/tos/chips/msp430/x1x2/timer/Msp430TimerC.nc +++ b/tos/chips/msp430/x1x2/timer/Msp430TimerC.nc @@ -1,5 +1,6 @@ - -/* Copyright (c) 2000-2003 The Regents of the University of California. +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -8,10 +9,12 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. + * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @@ -29,49 +32,57 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ - + /** * @author Cory Sharp + * @author Eric B. Decker */ -configuration Msp430TimerC -{ +#if !defined(__MSP430_HAS_TA3__) +#error "x1x2/timer/Msp430TimerC: need TA3." +#endif +#if !defined(__MSP430_HAS_TB3__) && !defined(__MSP430_HAS_TB7__) +#error "x1x2/timer/Msp430TimerC: need either TB3 or TB7." +#endif + +configuration Msp430TimerC { provides interface Msp430Timer as TimerA; provides interface Msp430TimerControl as ControlA0; + provides interface Msp430Compare as CompareA0; + provides interface Msp430Capture as CaptureA0; provides interface Msp430TimerControl as ControlA1; + provides interface Msp430Compare as CompareA1; + provides interface Msp430Capture as CaptureA1; provides interface Msp430TimerControl as ControlA2; - provides interface Msp430Compare as CompareA0; - provides interface Msp430Compare as CompareA1; - provides interface Msp430Compare as CompareA2; - provides interface Msp430Capture as CaptureA0; - provides interface Msp430Capture as CaptureA1; - provides interface Msp430Capture as CaptureA2; + provides interface Msp430Compare as CompareA2; + provides interface Msp430Capture as CaptureA2; provides interface Msp430Timer as TimerB; provides interface Msp430TimerControl as ControlB0; + provides interface Msp430Compare as CompareB0; + provides interface Msp430Capture as CaptureB0; provides interface Msp430TimerControl as ControlB1; + provides interface Msp430Compare as CompareB1; + provides interface Msp430Capture as CaptureB1; provides interface Msp430TimerControl as ControlB2; + provides interface Msp430Compare as CompareB2; + provides interface Msp430Capture as CaptureB2; +#if defined(__MSP430_HAS_TB7__) provides interface Msp430TimerControl as ControlB3; + provides interface Msp430Compare as CompareB3; + provides interface Msp430Capture as CaptureB3; provides interface Msp430TimerControl as ControlB4; + provides interface Msp430Compare as CompareB4; + provides interface Msp430Capture as CaptureB4; provides interface Msp430TimerControl as ControlB5; + provides interface Msp430Compare as CompareB5; + provides interface Msp430Capture as CaptureB5; provides interface Msp430TimerControl as ControlB6; - provides interface Msp430Compare as CompareB0; - provides interface Msp430Compare as CompareB1; - provides interface Msp430Compare as CompareB2; - provides interface Msp430Compare as CompareB3; - provides interface Msp430Compare as CompareB4; - provides interface Msp430Compare as CompareB5; - provides interface Msp430Compare as CompareB6; - provides interface Msp430Capture as CaptureB0; - provides interface Msp430Capture as CaptureB1; - provides interface Msp430Capture as CaptureB2; - provides interface Msp430Capture as CaptureB3; - provides interface Msp430Capture as CaptureB4; - provides interface Msp430Capture as CaptureB5; - provides interface Msp430Capture as CaptureB6; + provides interface Msp430Compare as CompareB6; + provides interface Msp430Capture as CaptureB6; +#endif /* __MSP430_HAS_TB7__ */ } -implementation -{ +implementation { components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE, TASSEL0, TASSEL1, FALSE ) as Msp430TimerA , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE, @@ -82,10 +93,12 @@ implementation , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0 , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1 , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2 +#if defined(__MSP430_HAS_TB7__) , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3 , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4 , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5 , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6 +#endif /* __MSP430_HAS_TB7__ */ , Msp430TimerCommonP as Common ; @@ -143,6 +156,7 @@ implementation Msp430TimerB2.Timer -> Msp430TimerB.Timer; Msp430TimerB2.Event -> Msp430TimerB.Event[2]; +#if defined(__MSP430_HAS_TB7__) // Timer B3 ControlB3 = Msp430TimerB3.Control; CompareB3 = Msp430TimerB3.Compare; @@ -170,5 +184,5 @@ implementation CaptureB6 = Msp430TimerB6.Capture; Msp430TimerB6.Timer -> Msp430TimerB.Timer; Msp430TimerB6.Event -> Msp430TimerB.Event[6]; +#endif /* __MSP430_HAS_TB7__ */ } - From 5d674960827fd14970890218280c0484c395307f Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 5 Jun 2011 03:00:30 -0700 Subject: [PATCH 085/411] msp430: bring tos/chips/memory from OSIAN repo --- tos/chips/memory/Memory.nc | 120 ++++++++++ tos/chips/memory/norflash/ExternalMemoryC.nc | 76 ++++++ .../memory/norflash/MemoryImplementationC.nc | 58 +++++ tos/chips/memory/norflash/NorFlashCommands.nc | 77 ++++++ tos/chips/memory/norflash/NorFlashMasterC.nc | 71 ++++++ tos/chips/memory/norflash/NorFlashMasterP.nc | 226 ++++++++++++++++++ .../norflash/at25s010/memoryproperties.h | 72 ++++++ tos/chips/memory/norflash/flashcommands.h | 77 ++++++ .../memory/norflash/m25p10/memoryproperties.h | 74 ++++++ .../memory/norflash/m25p80/memoryproperties.h | 73 ++++++ 10 files changed, 924 insertions(+) create mode 100644 tos/chips/memory/Memory.nc create mode 100644 tos/chips/memory/norflash/ExternalMemoryC.nc create mode 100644 tos/chips/memory/norflash/MemoryImplementationC.nc create mode 100644 tos/chips/memory/norflash/NorFlashCommands.nc create mode 100644 tos/chips/memory/norflash/NorFlashMasterC.nc create mode 100644 tos/chips/memory/norflash/NorFlashMasterP.nc create mode 100644 tos/chips/memory/norflash/at25s010/memoryproperties.h create mode 100644 tos/chips/memory/norflash/flashcommands.h create mode 100644 tos/chips/memory/norflash/m25p10/memoryproperties.h create mode 100644 tos/chips/memory/norflash/m25p80/memoryproperties.h diff --git a/tos/chips/memory/Memory.nc b/tos/chips/memory/Memory.nc new file mode 100644 index 0000000000..37cfa51fac --- /dev/null +++ b/tos/chips/memory/Memory.nc @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Rationale for a single-phase memory interface: + * Previous platforms had a radio chip and a flash chip tied to the same + * SPI bus. This caused problems because both might want access simultaneously. + * Since then, some platforms have opted to put the flash and radio on + * separate SPI buses, or built the radio into the microcontroller as an SoC. + * The radio / flash conflicts are not as prevalent as they used to be. + * + * Several issues arose from a split-phase interface: + * + * 1. Too much code to both generate and handle the events + * + * 2. Some events implemented as single-phase underneath could cause stack + * overflows when the same command was called from its event. + * + * A single-phase interface is easy to implement and can be very small. It + * can avoid the stack overflow problems of a split-phase interface. + * + * Questions have also arisen in the past about whether eraseChip() and/or crc() + * belong in a generic memory interface or a chip-specific one. After several + * years of use, we've found the answer to be yes for both. Even if a chip + * doesn't provide an explicit eraseChip() command, the command can be + * emulated so the behavior stays as expected. The crc(..) command can also + * be implemented at a lower level much more efficiently than at a higher + * level because bytes can be read from memory and wrung through the crc + * calculation without dedicating a buffer in RAM or spending cycles on + * overhead. + * + * To be compatible across most memory chips, the flush() command should be + * called when you're done writing. If flush() is not implemented for your + * memory chip, the command will be optimized out by the compiler. Cases where + * flush() would be implemented include writing to a RAM buffer on the + * microcontroller to save up a page worth of memory before dumping to + * flash, and a NOR-flash chip emulating the behavior of an EEPROM by providing + * built-in RAM buffers. + */ + +interface Memory { + + /** + * Read bytes from memory + * @param addr - the address to read from + * @param *buf - the buffer to read into + * @param len - the amount to read + */ + command void read(uint32_t addr, void *buf, uint32_t len); + + /** + * Write bytes to memory + * @param addr - the address to write to + * @param *buf - the buffer to write from + * @param len - the amount to write + */ + command void write(uint32_t addr, void *buf, uint32_t len); + + /** + * Erase a single erase unit + * The first block index is 0, the second is 1, etc. + * @param eraseUnitIndex the erase unit to erase, 0-indexed + */ + command void eraseBlock(uint16_t eraseUnitIndex); + + /** + * Erase the entire flash. Whether the chip was erased or not depends on if + * there were any protected blocks or sectors. + */ + command void eraseChip(); + + /** + * Flush written data to memory. This only applies to some memory chips. + */ + command void flush(); + + /** + * Obtain the CRC of some data sitting in memory + * @param addr - the address to start the CRC computation + * @param len - the amount of data to obtain the CRC for + * @param baseCrc - the initial crc + * @return the computed CRC-16 + */ + command uint16_t crc(uint32_t addr, uint32_t len, uint16_t baseCrc); + +} + diff --git a/tos/chips/memory/norflash/ExternalMemoryC.nc b/tos/chips/memory/norflash/ExternalMemoryC.nc new file mode 100644 index 0000000000..edb5a42b38 --- /dev/null +++ b/tos/chips/memory/norflash/ExternalMemoryC.nc @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This is the easy-to-find fa�ade for the specific NOR-flash memory chip + * implementation. A platform should include the memory/norflash directory at + * compile time, as well as a specific NOR-flash chip sub-directory. + * + * The ExternalMemoryC configuration is the generic entry point that + * applications should typically use. The generic name "ExternalMemoryC" + * was chosen because the type of external memory on other platforms may + * not be a NOR-flash type. Other types of memory may include EEPROM and + * NAND-flash, which can provide a similar generic Memory interface but + * have different properties / master implementations behind them to make + * them behave the same. + * + * To access chip-specific commands and features, wire directly to extra + * interfaces that can be provided by the chip-specific FlashImplementationC + * configuration. Remember, extra redirected plumbing costs nothing in terms of + * application footprint. + * + * Specific flash chips do not have to add any extra chip-specific interfaces + * and may simply forward the mandatory Resource and DirectStorage interfaces + * to the NorFlashMasterC component. Each flash chip should provide a + * flashproperties.h file which describes the erase units and write units + * of the flash. + * + * @author David Moss + */ + +configuration ExternalMemoryC { + provides { + interface Resource; + interface Memory; + } +} + +implementation { + + components MemoryImplementationC; + Resource = MemoryImplementationC; + Memory = MemoryImplementationC; +} diff --git a/tos/chips/memory/norflash/MemoryImplementationC.nc b/tos/chips/memory/norflash/MemoryImplementationC.nc new file mode 100644 index 0000000000..e2f50c2fb1 --- /dev/null +++ b/tos/chips/memory/norflash/MemoryImplementationC.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * The memory implementation for this flash chip does not provide + * any chip-specific interfaces or modifications to the base interfaces. + * The mandatory memory interfaces are simply forwarded onto the NorFlashMasterC + * configuration. + * + * @author David Moss + */ + +configuration MemoryImplementationC { + provides { + interface Resource; + interface Memory; + } +} + +implementation { + + components NorFlashMasterC; + Resource = NorFlashMasterC; + Memory = NorFlashMasterC; +} diff --git a/tos/chips/memory/norflash/NorFlashCommands.nc b/tos/chips/memory/norflash/NorFlashCommands.nc new file mode 100644 index 0000000000..7d25b09b99 --- /dev/null +++ b/tos/chips/memory/norflash/NorFlashCommands.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This interface allows external components to take advantage of existing + * command instructions to send raw commands to the flash chip + * over the single-phase SpiByte interface. + * + * You could use this interface to implement chip-specific commands, + * or access it to put the flash chip manually into deep sleep mode. + * + * @author David Moss + */ + +interface NorFlashCommands { + + /** + * Start a new command to the flash chip. Pay close attention to the + * behavior of this command! It will always clear the chip select line CSn + * in order to send the command to the chip, and will not set the CSn line + * high again because you may want to continue sending the flash chip + * bytes. You must manually set the CSn line high when you're done + * with your new command. + * + * @param cmd The command byte to send + * @param addr The address to send as part of the command + * If FLASH_INVALID_ADDRESS is given, the address isn't sent. + * @param write TRUE to properly enable write access to the chip + */ + + command void newCommand(uint8_t cmd, uint32_t addr, bool write); + + /** + * Blocks until the chip is ready and done writing + */ + command void wait(); + + /** + * Put the flash chip to sleep. Some flash chips do this automatically + * when you release CSn, some don't. In the generic implementation, + * we'll send the command either way. + */ + command void sleep(); +} diff --git a/tos/chips/memory/norflash/NorFlashMasterC.nc b/tos/chips/memory/norflash/NorFlashMasterC.nc new file mode 100644 index 0000000000..a021c7fdc3 --- /dev/null +++ b/tos/chips/memory/norflash/NorFlashMasterC.nc @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "flashcommands.h" + +/** + * This is the low level component that implements the basic commands + * in the Memory interface. It is recommended that users access the + * ExternalMemoryC configuration directly instead of this one. + * + * @author David Moss + */ + +configuration NorFlashMasterC { + provides { + interface Resource; + interface Memory; + interface NorFlashCommands; + } +} + +implementation { + + components NorFlashMasterP; + Memory = NorFlashMasterP; + NorFlashCommands = NorFlashMasterP; + + components PlatformFlashC; + Resource = PlatformFlashC; + NorFlashMasterP.Csn -> PlatformFlashC; + NorFlashMasterP.SpiByte -> PlatformFlashC; + + components Crc16C; + NorFlashMasterP.CrcX -> Crc16C; + + components BusyWaitMicroC; + NorFlashMasterP.BusyWait -> BusyWaitMicroC; +} diff --git a/tos/chips/memory/norflash/NorFlashMasterP.nc b/tos/chips/memory/norflash/NorFlashMasterP.nc new file mode 100644 index 0000000000..43150958c0 --- /dev/null +++ b/tos/chips/memory/norflash/NorFlashMasterP.nc @@ -0,0 +1,226 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "flashcommands.h" +#include "platformflash.h" + +/** + * @author David Moss + */ +module NorFlashMasterP { + provides { + interface Memory; + interface NorFlashCommands; + } + uses { + interface GeneralIO as Csn; + interface SpiByte; + interface CrcX; + interface BusyWait; + } +} + +implementation { + + /***************** Prototypes ****************/ + + /***************** Memory Commands ****************/ + command void Memory.read(uint32_t addr, void *buf, uint32_t len) { + int i; + uint8_t *data = buf; + + call NorFlashCommands.newCommand(FLASH_READ, addr, FALSE); + + for(i = 0; i < len; i++) { + *data = call SpiByte.write(0x0); + data++; + } + call Csn.set(); + call NorFlashCommands.sleep(); + } + + command void Memory.write(uint32_t addr, void *buf, uint32_t len) { + uint8_t *data = buf; + uint32_t currentAddress = addr; + + while(addr < currentAddress + len) { + call NorFlashCommands.newCommand(FLASH_PROGRAM, addr, TRUE); + + /* + * After call NorFlashCommands.newCommand(), Csn is low and ready to go. + * + * Write a byte and increment the write address. + * If the write address is on a page boundary, then the following is true: + * + * addr % MEMORY_PAGE_SIZE == 0 + * + * This means we should timeout on writing, raise Csn, and wait for the + * page to finish up. Same thing goes for running out of total bytes + * to write. + * + * After that we loop back and see how we're doing with + * our total progress. If we need to do more, we do more... or the + * loop exits. + */ + do { + call SpiByte.write(*data); + data++; + addr++; + } while(((addr % MEMORY_PAGE_SIZE) > 0) + && (addr < (currentAddress + len))); + + // Wait for the current page to finish writing by reading the status + // byte and waiting for the ^RDY bit to go low + call NorFlashCommands.wait(); + } + call Csn.set(); + call NorFlashCommands.sleep(); + } + + command void Memory.eraseBlock(uint16_t eraseUnitIndex) { + uint32_t addr = eraseUnitIndex << MEMORY_ERASEUNIT_SIZE_LOG2; + + call NorFlashCommands.newCommand(FLASH_BLOCKERASE, addr, TRUE); + call NorFlashCommands.wait(); + call NorFlashCommands.sleep(); + } + + command void Memory.eraseChip() { + call NorFlashCommands.newCommand(FLASH_CHIPERASE, FLASH_INVALID_ADDRESS, TRUE); + call NorFlashCommands.wait(); + call NorFlashCommands.sleep(); + } + + command void Memory.flush() { + } + + command uint16_t Memory.crc(uint32_t addr, uint32_t len, uint16_t baseCrc) { + uint32_t currentAddress = addr; + uint8_t latestRead; + + call NorFlashCommands.newCommand(FLASH_READ, addr, FALSE); + for( ; addr < currentAddress + len; addr++) { + latestRead = call SpiByte.write(0x0); + baseCrc = call CrcX.seededCrc(baseCrc, &latestRead, 1); + } + call Csn.set(); + call NorFlashCommands.sleep(); + return baseCrc; + } + + /***************** NorFlashCommands ****************/ + /** + * Start a new command to the flash chip. Pay close attention to the + * behavior of this command! It will always clear the chip select line CSn + * in order to send the command to the chip, and will not set the CSn line + * high again because you may want to continue sending the flash chip + * bytes. You must manually set the CSn line high when you're done + * with your new command. + * + * @param cmd The command byte to send + * @param addr The address to send as part of the command + * If FLASH_INVALID_ADDRESS is given, the address isn't sent. + * @param write TRUE to properly enable write access to the chip + */ + + command void NorFlashCommands.newCommand(uint8_t cmd, uint32_t addr, bool write) { + +#if FLASH_IMPLEMENTS_POWERDOWN + uint8_t i; + + call Csn.clr(); + + /* + * The release from deep power-down command takes a FLASH_RES command byte, + * 3 dummy address bytes, and 1 more dummy byte to read out the ID of the + * flash chip. We loop the command 5 times to do this. + * + * If the flash chip is already awake or doing something else, this + * command has no effect. + */ + for(i = 0; i < 5; i++) { + call SpiByte.write(FLASH_RES); + } + + call Csn.set(); + + // Wait until the flash chip is awake + call BusyWait.wait(FLASH_TRES_MICROSECONDS); +#endif + + call NorFlashCommands.wait(); + call Csn.clr(); + if(write) { + call SpiByte.write(FLASH_WREN); + call Csn.set(); + call Csn.clr(); + } + + call SpiByte.write(cmd); + if(addr != FLASH_INVALID_ADDRESS) { + call SpiByte.write(addr >> 16); + call SpiByte.write(addr >> 8); + call SpiByte.write(addr); + } + } + + /** + * Wait for the flash chip to be ready + */ + command void NorFlashCommands.wait() { + bool notReady; + uint16_t ctr = 0; + + do { + call Csn.set(); + call Csn.clr(); + call SpiByte.write(FLASH_RDSR); + notReady = call SpiByte.write(0x0) & FLASH_STATUS_WRITING; + } while(notReady && --ctr); + call Csn.set(); + } + + /** + * Put the flash chip to sleep. Some flash chips do this automatically + * when you release CSn, some don't. In the generic implementation, + * we'll send the command either way. + */ + command void NorFlashCommands.sleep() { +#if FLASH_IMPLEMENTS_POWERDOWN + call NorFlashCommands.newCommand(FLASH_POWERDOWN, FLASH_INVALID_ADDRESS, FALSE); +#endif + } +} diff --git a/tos/chips/memory/norflash/at25s010/memoryproperties.h b/tos/chips/memory/norflash/at25s010/memoryproperties.h new file mode 100644 index 0000000000..ea063f4d43 --- /dev/null +++ b/tos/chips/memory/norflash/at25s010/memoryproperties.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + */ + +/** + * @author David Moss + */ + +#ifndef FLASHPROPERTIES_H +#define FLASHPROPERTIES_H + +/** + * Set this to a 1 if this flash chip provides a deep power-down command + */ +#ifndef FLASH_IMPLEMENTS_POWERDOWN +#define FLASH_IMPLEMENTS_POWERDOWN 0 +#endif + +/** + * Flash properties + * We match these to the default commands in flashcommands.h + * Specifically, the erase command is 0xD8 which is a block erase, which is + * 32 kB. The AT25S010 also has a sector erase, but that can be implemented + * on a chip-specific interface. + */ + +enum { + MEMORY_NUM_ERASEUNITS = 4, + MEMORY_ERASEUNIT_SIZE_LOG2 = 15, // In other words, 1000000000000000'b = 0x8000 = 32kB + MEMORY_ERASEUNIT_SIZE = 1L << MEMORY_ERASEUNIT_SIZE_LOG2, + + MEMORY_NUM_PAGES = 128, + MEMORY_PAGE_SIZE_LOG2 = 8, // In other words, 100000000'b = 0x100 = 256 B + MEMORY_PAGE_SIZE = 1 << MEMORY_PAGE_SIZE_LOG2, + + MEMORY_INVALID_ADDRESS = 0xFFFFFFFF, +}; + +#endif diff --git a/tos/chips/memory/norflash/flashcommands.h b/tos/chips/memory/norflash/flashcommands.h new file mode 100644 index 0000000000..e03d0ed703 --- /dev/null +++ b/tos/chips/memory/norflash/flashcommands.h @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef FLASHCOMMANDS_H +#define FLASHCOMMANDS_H + +/** + * Flash SPI bus commands + * These were selected as the union between AT25 and M25 flash chip commands + */ + +enum flash_commands_e { + FLASH_WREN = 0x06, // Set write enable latch + FLASH_WRDI = 0x04, // Reset write enable latch + FLASH_RDSR = 0x05, // Read status register + FLASH_WRSR = 0x01, // Write status register + FLASH_READ = 0x03, // Read data from memory array + FLASH_FASTREAD = 0x0B, // Read data from memory array (with dummy cycles) + FLASH_PROGRAM = 0x02, // Program data into memory array + + FLASH_BLOCKERASE = 0xD8, // Erase one block in memory array + FLASH_CHIPERASE = 0xC7, // Erase all memory array + FLASH_RDID = 0x9F, // Read manufacturer and product ID (on most chips) + + FLASH_POWERDOWN = 0xB9, // Deep power down on some flash chips + FLASH_RES = 0xAB, // Release from deep power down and read ID +}; + +/** + * Status bit definitions, where they're the same across multiple flash chips + */ +enum flash_status_e { + FLASH_STATUS_WRITING = 0x1, +}; + +/** + * Special flash address definitions + */ + +enum flash_address_e { + FLASH_INVALID_ADDRESS = 0xFFFFFFFF, +}; + +#endif diff --git a/tos/chips/memory/norflash/m25p10/memoryproperties.h b/tos/chips/memory/norflash/m25p10/memoryproperties.h new file mode 100644 index 0000000000..dffaf6ba9c --- /dev/null +++ b/tos/chips/memory/norflash/m25p10/memoryproperties.h @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +#ifndef MEMORYPROPERTIES_H +#define MEMORYPROPERTIES_H + +/** + * Set this to a 1 if this flash chip provides a deep power-down command + */ +#ifndef FLASH_IMPLEMENTS_POWERDOWN +#define FLASH_IMPLEMENTS_POWERDOWN 1 +#endif + +/** + * Since this chip implements a power-down command, we must specify + * the FLASH_TRES_COMMAND_MICROSECONDS. According to the datasheet, + * tRes2(max) is 30 us. This is the time from which we execute a RES + * command to the time we can drop the CSn line again + */ +#ifndef FLASH_TRES_MICROSECONDS +#define FLASH_TRES_MICROSECONDS 30 +#endif + +/** + * Memory properties + */ +enum { + MEMORY_NUM_ERASEUNITS = 4, + MEMORY_ERASEUNIT_SIZE_LOG2 = 15, // In other words, 1000000000000000'b = 0x8000 = 32kB + MEMORY_ERASEUNIT_SIZE = 1L << MEMORY_ERASEUNIT_SIZE_LOG2, + + MEMORY_NUM_PAGES = 128, + MEMORY_PAGE_SIZE_LOG2 = 8, // In other words, 100000000'b = 0x100 = 256 B + MEMORY_PAGE_SIZE = 1 << MEMORY_PAGE_SIZE_LOG2, +}; + +#endif diff --git a/tos/chips/memory/norflash/m25p80/memoryproperties.h b/tos/chips/memory/norflash/m25p80/memoryproperties.h new file mode 100644 index 0000000000..131be3d661 --- /dev/null +++ b/tos/chips/memory/norflash/m25p80/memoryproperties.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ +#ifndef MEMORYPROPERTIES_H +#define MEMORYPROPERTIES_H + +/** + * Set this to a 1 if this flash chip provides a deep power-down command + */ +#ifndef FLASH_IMPLEMENTS_POWERDOWN +#define FLASH_IMPLEMENTS_POWERDOWN 1 +#endif + +/** + * Since this chip implements a power-down command, we must specify + * the FLASH_TRES_COMMAND_MICROSECONDS. According to the datasheet, + * tRes2(max) is 30 us. This is the time from which we execute a RES + * command to the time we can drop the CSn line again + */ +#ifndef FLASH_TRES_MICROSECONDS +#define FLASH_TRES_MICROSECONDS 30 +#endif + +/** + * Memory properties + */ +enum { + MEMORY_NUM_ERASEUNITS = 16, + MEMORY_ERASEUNIT_SIZE_LOG2 = 16, // In other words, 10000000000000000'b = 0x10000 = 64kB + MEMORY_ERASEUNIT_SIZE = 1L << MEMORY_ERASEUNIT_SIZE_LOG2, + + MEMORY_NUM_PAGES = 4096U, + MEMORY_PAGE_SIZE_LOG2 = 8, // In other words, 100000000'b = 0x100 = 256 B + MEMORY_PAGE_SIZE = 1 << MEMORY_PAGE_SIZE_LOG2, +}; + +#endif From 5678a5d05fffcc1dbb8599c544660a13b1de763c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 5 Jun 2011 03:10:28 -0700 Subject: [PATCH 086/411] bring in OSIAN pmm code --- tos/chips/msp430/pmm/Msp430Pmm.h | 17 ++++++++++ tos/chips/msp430/pmm/Msp430PmmC.nc | 22 ++++++++++++ tos/chips/msp430/pmm/Msp430PmmP.nc | 54 ++++++++++++++++++++++++++++++ tos/chips/msp430/pmm/Pmm.nc | 21 ++++++++++++ 4 files changed, 114 insertions(+) create mode 100644 tos/chips/msp430/pmm/Msp430Pmm.h create mode 100644 tos/chips/msp430/pmm/Msp430PmmC.nc create mode 100644 tos/chips/msp430/pmm/Msp430PmmP.nc create mode 100644 tos/chips/msp430/pmm/Pmm.nc diff --git a/tos/chips/msp430/pmm/Msp430Pmm.h b/tos/chips/msp430/pmm/Msp430Pmm.h new file mode 100644 index 0000000000..760821902f --- /dev/null +++ b/tos/chips/msp430/pmm/Msp430Pmm.h @@ -0,0 +1,17 @@ + +#ifndef MSP430PMM_H +#define MSP430PMM_H + +/** + * A minimum level of 2 is needed for CC1101 radio operation + * This CC1101 references the integrated CC1101 (RF1A) on + * the cc430f5137 chip used by the surf board. + * + * Other chips have the PMM module so this needs to move at some point. + */ + +#ifndef DEFAULT_VCORE_LEVEL +#define DEFAULT_VCORE_LEVEL 0x2 +#endif + +#endif diff --git a/tos/chips/msp430/pmm/Msp430PmmC.nc b/tos/chips/msp430/pmm/Msp430PmmC.nc new file mode 100644 index 0000000000..e2dae67581 --- /dev/null +++ b/tos/chips/msp430/pmm/Msp430PmmC.nc @@ -0,0 +1,22 @@ + +#include "Msp430Pmm.h" + +/** + * Power Management Module + * @author David Moss + */ + +configuration Msp430PmmC { + provides { + interface Init; + interface Pmm; + } +} + +implementation { + + components Msp430PmmP; + Init = Msp430PmmP; + Pmm = Msp430PmmP; + +} diff --git a/tos/chips/msp430/pmm/Msp430PmmP.nc b/tos/chips/msp430/pmm/Msp430PmmP.nc new file mode 100644 index 0000000000..acec1445cc --- /dev/null +++ b/tos/chips/msp430/pmm/Msp430PmmP.nc @@ -0,0 +1,54 @@ + +#include "Msp430Pmm.h" + +/** + * @author David Moss + */ + +module Msp430PmmP { + provides { + interface Init; + interface Pmm; + } +} + +implementation { + + command error_t Init.init() { + call Pmm.setVoltage(DEFAULT_VCORE_LEVEL); + return SUCCESS; + } + + /** + * Set the voltage level of the MSP430x core + * 0x0 => DVcc > 1.8V + * 0x1 => DVcc > 2.0V + * 0x2 => DVcc > 2.2V + * 0x3 => DVcc > 2.4V + * + * The CC1101 radio core requires 0x2. + * @param level The voltage level between 0-3 + */ + + command void Pmm.setVoltage(uint8_t level) { + // Open PMM registers for write access + PMMCTL0_H = 0xA5; + // Set SVS/SVM high side new level + SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level; + // Set SVM low side to new level + SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level; + // Wait till SVM is settled + while ((PMMIFG & SVSMLDLYIFG) == 0); + // Clear already set flags + PMMIFG &= ~(SVMLVLRIFG + SVMLIFG); + // Set VCore to new level + PMMCTL0_L = PMMCOREV0 * level; + // Wait till new level reached + if ((PMMIFG & SVMLIFG)) + while ((PMMIFG & SVMLVLRIFG) == 0); + // Set SVS/SVM low side to new level + SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level; + // Lock PMM registers for write access + PMMCTL0_H = 0x00; + } +} diff --git a/tos/chips/msp430/pmm/Pmm.nc b/tos/chips/msp430/pmm/Pmm.nc new file mode 100644 index 0000000000..4e69f13279 --- /dev/null +++ b/tos/chips/msp430/pmm/Pmm.nc @@ -0,0 +1,21 @@ + + +/** + * Power Management Interface + * @author David Moss + */ + +interface Pmm { + + /** + * Set the voltage level of the MSP430x core + * 0x0 => DVcc > 1.8V + * 0x1 => DVcc > 2.0V + * 0x2 => DVcc > 2.2V + * 0x3 => DVcc > 2.4V + * + * The CC1101 radio core requires 0x2. + * @param level The voltage level between 0-3 + */ + command void setVoltage(uint8_t level); +} From 2f31c70c40effccc8831efe7f0444a4d382a0d7e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 5 Jun 2011 04:18:03 -0700 Subject: [PATCH 087/411] msp430/x5: timer, more clean up --- .../x5xxx/timer/Msp430Timer32khzMapC.nc | 2 +- tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc | 2 +- .../x5xxx/timer/Msp430XV2ClockControl.nc | 23 +++++++++++-------- .../x5xxx/timer/Msp430XV2ClockControlP.nc | 21 ++++++++++------- 4 files changed, 28 insertions(+), 20 deletions(-) diff --git a/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc index fa982059f6..0263b96e5c 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc @@ -48,7 +48,7 @@ /* * Inspection of cpu header files shows that the following defines exist. - * (all of the form __msp430_has___ where xxxx gets replace with + * (all of the form __MSP430_HAS___ where xxxx gets replace with * which timer module. Modules seen: TA3, T0A3, T0A5, T1A2, T1A3, T1A5, * T2A3, T0B7, T0D3, T1D3. Which modules are actually present depends * on which chip is being used and is reflected in the cpu header file. diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc index dd779aba29..7cfb3aca15 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc @@ -1,4 +1,4 @@ -/* +/* * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009-2010 People Power Co. * All rights reserved. diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc index 071ab786d8..a950b4fdba 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc @@ -7,28 +7,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Peter A. Bigot */ @@ -40,7 +43,7 @@ * individually start and stop the 32KHz and 1MHz timers. * * @author Peter A. Bigot - */ + */ interface Msp430XV2ClockControl { /* @@ -74,7 +77,7 @@ interface Msp430XV2ClockControl { * Msp430XV2ClockC.Init. */ async command void start32khzTimer (); - + /* * Stop the 32KHz timer. * @@ -85,7 +88,7 @@ interface Msp430XV2ClockControl { * really low-power modes. */ async command void stop32khzTimer (); - + /** Return TRUE iff T32khz is running. */ async command bool is32khzTimerRunning (); @@ -103,7 +106,7 @@ interface Msp430XV2ClockControl { * not affect the running system. */ async command void startMicroTimer (); - + /* * Stop the 1MHz timer. * diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc index 3713b0c6e3..a0d057801c 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc @@ -58,9 +58,10 @@ module Msp430XV2ClockControlP @safe() { async command void Msp430XV2ClockControl.configureUnifiedClockSystem (int dco_config) { uint16_t divs; - + atomic { - /* ACLK is to be set to XT1CLK, assumed to be 32KiHz (2^15Hz), + /* + * ACLK is to be set to XT1CLK, assumed to be 32KiHz (2^15Hz), * falls back to REFOCLK if absent. * * DCO is to be set as configured. The clock divider is the @@ -71,20 +72,25 @@ module Msp430XV2ClockControlP @safe() { * SMLCK is set to DCOCLKDIV / N such that it has a value of ~ 1MiHz (2^20 Hz) * * The technique used here is cribbed from the TI Example programs - * for the CC430, cc430x613x_UCS_2.c. */ + * for the CC430, cc430x613x_UCS_2.c. + */ /* Disable FLL control */ __bis_SR_register(SR_SCG0); - /* Use XT1CLK as the FLL input: if it isn't valid, the module + /* + * Use XT1CLK as the FLL input: if it isn't valid, the module * will fall back to REFOCLK. Use FLLREFDIV value 1 (selected - * by bits 000) */ + * by bits 000) + */ UCSCTL3 = SELREF__XT1CLK; - /* The appropriate value for DCORSEL is obtained from the DCO + /* + * The appropriate value for DCORSEL is obtained from the DCO * Frequency table of the device datasheet. Find the DCORSEL * value from that table where the minimum frequency with DCOx=31 - * is closest to your desired DCO frequency. */ + * is closest to your desired DCO frequency. + */ UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx switch (dco_config) { @@ -141,7 +147,6 @@ module Msp430XV2ClockControlP @safe() { divs = DIVS__32; break; } - __bic_SR_register(SR_SCG0); // Enable the FLL control loop #ifdef notdef From 92823a8e844110700890e20b3710d314db118673 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 5 Jun 2011 04:19:23 -0700 Subject: [PATCH 088/411] msp430/x5: bring in (with clean up) usci files from OSIAN --- tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc | 304 +++++++++++++ tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc | 90 ++++ .../x5xxx/usci/HplMsp430UsciInterrupts.nc | 53 +++ .../x5xxx/usci/HplMsp430UsciInterruptsA0P.nc | 19 + .../x5xxx/usci/HplMsp430UsciInterruptsA1P.nc | 21 + .../x5xxx/usci/HplMsp430UsciInterruptsA2P.nc | 21 + .../x5xxx/usci/HplMsp430UsciInterruptsA3P.nc | 21 + .../x5xxx/usci/HplMsp430UsciInterruptsB0P.nc | 21 + .../x5xxx/usci/HplMsp430UsciInterruptsB1P.nc | 21 + .../x5xxx/usci/HplMsp430UsciInterruptsB2P.nc | 21 + .../x5xxx/usci/HplMsp430UsciInterruptsB3P.nc | 21 + tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc | 196 ++++++++ tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc | 29 ++ tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc | 31 ++ tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc | 31 ++ tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc | 31 ++ tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc | 31 ++ tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc | 31 ++ tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc | 31 ++ tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc | 31 ++ .../msp430/x5xxx/usci/Msp430UsciConfigure.nc | 48 ++ .../msp430/x5xxx/usci/Msp430UsciError.nc | 50 +++ .../msp430/x5xxx/usci/Msp430UsciSpiA0C.nc | 67 +++ .../msp430/x5xxx/usci/Msp430UsciSpiA0P.nc | 33 ++ .../msp430/x5xxx/usci/Msp430UsciSpiA1C.nc | 67 +++ .../msp430/x5xxx/usci/Msp430UsciSpiA1P.nc | 33 ++ .../msp430/x5xxx/usci/Msp430UsciSpiA2C.nc | 67 +++ .../msp430/x5xxx/usci/Msp430UsciSpiA2P.nc | 33 ++ .../msp430/x5xxx/usci/Msp430UsciSpiA3C.nc | 67 +++ .../msp430/x5xxx/usci/Msp430UsciSpiA3P.nc | 33 ++ .../msp430/x5xxx/usci/Msp430UsciSpiB0C.nc | 65 +++ .../msp430/x5xxx/usci/Msp430UsciSpiB0P.nc | 31 ++ .../msp430/x5xxx/usci/Msp430UsciSpiB1C.nc | 67 +++ .../msp430/x5xxx/usci/Msp430UsciSpiB1P.nc | 33 ++ .../msp430/x5xxx/usci/Msp430UsciSpiB2C.nc | 67 +++ .../msp430/x5xxx/usci/Msp430UsciSpiB2P.nc | 33 ++ .../msp430/x5xxx/usci/Msp430UsciSpiB3C.nc | 67 +++ .../msp430/x5xxx/usci/Msp430UsciSpiB3P.nc | 33 ++ tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc | 195 ++++++++ .../msp430/x5xxx/usci/Msp430UsciUartA0C.nc | 63 +++ .../msp430/x5xxx/usci/Msp430UsciUartA0P.nc | 33 ++ .../msp430/x5xxx/usci/Msp430UsciUartA1C.nc | 65 +++ .../msp430/x5xxx/usci/Msp430UsciUartA1P.nc | 35 ++ .../msp430/x5xxx/usci/Msp430UsciUartA2C.nc | 65 +++ .../msp430/x5xxx/usci/Msp430UsciUartA2P.nc | 35 ++ .../msp430/x5xxx/usci/Msp430UsciUartA3C.nc | 65 +++ .../msp430/x5xxx/usci/Msp430UsciUartA3P.nc | 35 ++ .../msp430/x5xxx/usci/Msp430UsciUartP.nc | 424 ++++++++++++++++++ tos/chips/msp430/x5xxx/usci/README.txt | 119 +++++ tos/chips/msp430/x5xxx/usci/generate.sh | 65 +++ tos/chips/msp430/x5xxx/usci/generated.lst | 34 ++ tos/chips/msp430/x5xxx/usci/msp430usci.h | 94 ++++ 52 files changed, 3276 insertions(+) create mode 100644 tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc create 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provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Control of an MSP430 USCI module. + * + * This interface is completely agnostic of the modes supported by a + * particular USCI module. It supports the union of the module + * registers across all modes. + * + * Where the same memory location reflects different registers + * depending on USCI mode, independent functions are provided. + * + * Access to individual halves of a 16-bit register is not supported + * except where the halves have independent functions, as with IRTCTL + * and IRRCTL. For example, UCmxCTLW0 is not made available as + * UCmxCTL1 and UCmxCTL0 halves, as it is unlikely that one would be + * set without simultaneously setting the other. + * + * @author Peter A. Bigot + */ + +#include "msp430usci.h" + +interface HplMsp430Usci { + + /* ---------------------------------------- + * Introspection to identify a module when given a reference to its + * component */ + + /** + * Return a unique identifier for this module among all USCI modules on the chip. + * + * There is a one-to-one correspondence between the value returned + * by this function and the set of pairs of (module_type, + * module_instance). + */ + async command uint8_t getModuleIdentifier (); + + /* ---------------------------------------- + * Read and write the module registers. + */ + + /** + * Reads the UCmxCTLW0 Control register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint16_t getCtlw0(); + + /** + * Writes the UCmxCTLW0 Control register. + * This register is present on all USCI modules. + */ + async command void setCtlw0(uint16_t v); + + /** + * Reads the UCmxBRW Baud Rate Control registers. + * This register is present on all USCI modules. + */ + async command uint16_t getBrw(); + + /** + * Writes the UCmxBRW Baud Rate Control registers. + * This register is present on all USCI modules. + */ + async command void setBrw(uint16_t v); + + /** + * Reads the USCmBxMCTL Modulation Control register. + * This register is present on all USCI modules except I2C. + */ + async command uint8_t getMctl(); + + /** + * Write the UCmxMCTL Modulation Control register. + * This register is present on all USCI modules except I2C. + */ + async command void setMctl(uint8_t v); + + /** + * Read the UCmxSTAT Status register. + * This register is present on all USCI modules. + */ + async command uint8_t getStat(); + + /** + * Write the UCmxSTAT Status register. + * This register is present on all USCI modules. + */ + async command void setStat(uint8_t v); + + /** + * Read the UCmxRXBUF Receive Buffer register. + * This register is present on all USCI modules. + */ + async command uint8_t getRxbuf(); + + /** + * Write the UCmxRX Receive Buffer register. + * This register is present on all USCI modules. + */ + async command void setRxbuf(uint8_t v); + + /** + * Read the UCmxTXBUF Transmit Buffer register. + * This register is present on all USCI modules. + */ + async command uint8_t getTxbuf(); + + /** + * Write the UCmxTX Transmit Buffer register. + * This register is present on all USCI modules. + */ + async command void setTxbuf(uint8_t v); + + /** + * Read the UCmxABCTL Auto Baud Rate Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command uint8_t getAbctl(); + + /** + * Write the UCmxABCTL Auto Baud Rate Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command void setAbctl(uint8_t v); + + /** + * Read the UCmxI2COA I2C Own Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command uint16_t getI2coa(); + + /** + * Write the UCmxI2COA I2C Own Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command void setI2coa(uint16_t v); + + /** + * Read the UCmxIRCTL IrDA Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command uint16_t getIrctl(); + + /** + * Write the UCmxIRCTL IrDA Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command void setIrctl(uint16_t v); + + /** + * Read the UCmxIRTCTL IrDA Transmit Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command uint8_t getIrtctl(); + + /** + * Write the UCmxIRTCTL IrDA Transmit Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command void setIrtctl(uint8_t v); + + /** + * Read the UCmxIRRCTL IrDA Receive Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command uint8_t getIrrctl(); + + /** + * Write the UCmxIRRCTL IrDA Receive Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command void setIrrctl(uint8_t v); + + /** + * Read the UCmxI2CSA I2C Slave Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command uint16_t getI2csa(); + + /** + * Write the UCmxI2CSA I2C Slave Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command void setI2csa(uint16_t v); + + /** + * Reads the UCmxICTL Interrupt Control register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint16_t getIctl(); + + /** + * Writes the UCmxICTL Interrupt Control register. + * This register is present on all USCI modules. + */ + async command uint16_t setIctl(uint16_t v); + + /** + * Reads the UCmxIE Interrupt Enable register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint8_t getIe(); + + /** + * Writes the UCmxIE Interrupt Enable register. + * This register is present on all USCI modules. + */ + async command void setIe(uint8_t v); + + /** + * Reads the UCmxIFG Interrupt Enable register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint8_t getIfg(); + + /** + * Writes the UCmxIFG Interrupt Flag register. + * This register is present on all USCI modules. + */ + async command void setIfg(uint8_t v); + + /** + * Reads the UCmxIV Interrupt Vector register. + * This register is present on all USCI modules, and is used in all modes. + * It is read-only. + */ + async command uint8_t getIv(); + + /* ---------------------------------------- + * Higher-level operations consistent across all modes. + */ + + /** + * Set the USCI to the mode and speed specified in the given configuration. + * + * @param config The speed-relevant parameters for module + * configuration. Must be provided. + * + * @param leave_in_reset If TRUE, the module is left in software + * reset mode upon exit, allowing the caller to perform additional + * configuration steps such as configuring mode-specific ports. It + * is the caller's responsibility to invoke leaveResetMode_() upon + * completion. + */ + async command void configure (const msp430_usci_config_t* config, + bool leave_in_reset); + + /** + * Place the USCI into software reset mode. + * This command should only be invoked by modules that implement + * specific USCI modes, in their mode-specific configuration + * functions. + */ + async command void enterResetMode_ (); + + /** + * Take the USCI out of software reset mode. + * This command should only be invoked by modules that implement + * specific USCI modes, in their mode-specific configuration + * functions. + */ + async command void leaveResetMode_ (); + + /** + * Return an enumeration value indicating the currently configured USCI + * mode. Values are from the MSP430_USCI_Mode_e enumeration. + */ + async command uint8_t currentMode (); +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc new file mode 100644 index 0000000000..cf8c595ecb --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Core configuration for any USCI module present on an MSP430 chip. + * + * There should be exactly one instance of this configuration for each + * USCI module; e.g., USCI_A0 or USCI_B3. Each instance provides + * access to the USCI registers for its module, and maintains the + * resource management information required to determine which of the + * module's modes is currently active. + * + * @author Peter A. Bigot + */ + +generic configuration HplMsp430UsciC( + /** Offset of UCmxCTLW0_ register for m=module_type and x=module_instance */ + unsigned int UCmxCTLW0_, + /** Name of resource used to arbitrate modes of this USCI instance */ + char RESOURCE_NAME[] +) @safe() { + provides { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts[ uint8_t mode ]; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + } + uses { + interface HplMsp430UsciInterrupts as RawInterrupts; + interface ResourceConfigure[uint8_t client]; + } +} implementation { + + enum { + USCI_ID = unique(MSP430_USCI_RESOURCE), + }; + + components new HplMsp430UsciP(USCI_ID, UCmxCTLW0_) as HplUsciP; + Usci = HplUsciP; + RawInterrupts = HplUsciP; + Interrupts = HplUsciP; + + components new FcfsArbiterC( RESOURCE_NAME ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ResourceDefaultOwner = ArbiterC; + ArbiterInfo = ArbiterC; + HplUsciP.ArbiterInfo -> ArbiterC; + + components LedsC; + HplUsciP.Leds -> LedsC; +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterrupts.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterrupts.nc new file mode 100644 index 0000000000..568a50298c --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterrupts.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Interrupt events for an MSP430 USCI module. + * + * @author Peter A. Bigot + */ + +interface HplMsp430UsciInterrupts { + /** The only event is the reception of the interrupt. Notification + * includes the value of the interrupt vector register. + * + * @note Do not attempt to distinguish tx and rx interrupts here; + * delegate it to the mode-specific handler. For example, a receive + * interrupt for UART and SPI modes is indicated by a UCmxIV value + * of 2 using constant USCI_UCRXIFG; in I2C mode, the value 2 means + * USCI_I2C_UCALIFG. USCI_I2C_UCRXIFG has a value of 10. */ + async event void interrupted(uint8_t iv); +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc new file mode 100644 index 0000000000..c3616d1900 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc @@ -0,0 +1,19 @@ +/** + * Define the interrupt handlers for USCI module A0. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsA0P { + provides { + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} implementation { + TOSH_SIGNAL(USCI_A0_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc new file mode 100644 index 0000000000..a88ef4e0ff --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc @@ -0,0 +1,21 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for A1 */ +/** + * Define the interrupt handlers for USCI module A1. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsA1P { + provides { + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} implementation { + TOSH_SIGNAL(USCI_A1_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc new file mode 100644 index 0000000000..a5fdf43007 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc @@ -0,0 +1,21 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for A2 */ +/** + * Define the interrupt handlers for USCI module A2. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsA2P { + provides { + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} implementation { + TOSH_SIGNAL(USCI_A2_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc new file mode 100644 index 0000000000..f11c704a21 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc @@ -0,0 +1,21 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for A3 */ +/** + * Define the interrupt handlers for USCI module A3. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsA3P { + provides { + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} implementation { + TOSH_SIGNAL(USCI_A3_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc new file mode 100644 index 0000000000..408d6bcdb1 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc @@ -0,0 +1,21 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for B0 */ +/** + * Define the interrupt handlers for USCI module B0. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsB0P { + provides { + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} implementation { + TOSH_SIGNAL(USCI_B0_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc new file mode 100644 index 0000000000..bc3e3644df --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc @@ -0,0 +1,21 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for B1 */ +/** + * Define the interrupt handlers for USCI module B1. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsB1P { + provides { + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} implementation { + TOSH_SIGNAL(USCI_B1_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc new file mode 100644 index 0000000000..2534aa706d --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc @@ -0,0 +1,21 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for B2 */ +/** + * Define the interrupt handlers for USCI module B2. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsB2P { + provides { + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} implementation { + TOSH_SIGNAL(USCI_B2_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc new file mode 100644 index 0000000000..79f16d3e9b --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc @@ -0,0 +1,21 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for B3 */ +/** + * Define the interrupt handlers for USCI module B3. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsB3P { + provides { + interface HplMsp430UsciInterrupts as Interrupts; + } + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} implementation { + TOSH_SIGNAL(USCI_B3_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc new file mode 100644 index 0000000000..00ba4ed8e9 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc @@ -0,0 +1,196 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Core implementation for any USCI module present on an MSP430 chip. + * + * This module makes available the module-specific registers, along + * with a small number of higher-level functions like generic USCI + * chip configuration that are shared among the various modes of the + * module. + * + * @author Peter A. Bigot + */ + +generic module HplMsp430UsciP( + /** Identifier for this USCI module, unique across (type, instance) pairs */ + uint8_t USCI_ID, + /** Offset of UCmxCTLW0_ register for m=module_type and x=module_instance */ + unsigned int UCmxCTLW0_ +) @safe() { + provides { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts[ uint8_t mode ]; + } + uses { + interface HplMsp430UsciInterrupts as RawInterrupts; + interface ArbiterInfo; + interface Leds; + } +} + +implementation { + +#define UCmxCTLW0 (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_)) +#define UCmxCTL1 (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x00)) // yes, ctl1 is at offset zero +#define UCmxCTL0 (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x01)) // and, ctl0 is at offset one +#define UCmxBRW (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x06)) +#define UCmxMCTL (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x08)) +#define UCmxSTAT (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x0a)) +#define UCmxRXBUF (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x0c)) +#define UCmxTXBUF (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x0e)) +#define UCmxABCTL (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x10)) +#define UCmxI2COA (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x10)) +#define UCmxIRCTL (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x12)) +#define UCmxIRTCTL (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x12)) +#define UCmxIRRCTL (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x13)) +#define UCmxI2CSA (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x12)) +#define UCmxICTL (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x1c)) +#define UCmxIE (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x1c)) +#define UCmxIFG (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x1d)) +#define UCmxIV (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x1e)) + + async command uint8_t Usci.getModuleIdentifier() { return USCI_ID; } + + async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } + async command void Usci.setCtlw0(uint16_t v) { UCmxCTLW0 = v; } + async command uint16_t Usci.getBrw() { return UCmxBRW; } + async command void Usci.setBrw(uint16_t v) { UCmxBRW = v; } + async command uint8_t Usci.getMctl() { return UCmxMCTL; } + async command void Usci.setMctl(uint8_t v) { UCmxMCTL = v; } + async command uint8_t Usci.getStat() { return UCmxSTAT; } + async command void Usci.setStat(uint8_t v) { UCmxSTAT = v; } + async command uint8_t Usci.getRxbuf() { return UCmxRXBUF; } + async command void Usci.setRxbuf(uint8_t v) { UCmxRXBUF = v; } + async command uint8_t Usci.getTxbuf() { return UCmxTXBUF; } + async command void Usci.setTxbuf(uint8_t v) { UCmxTXBUF = v; } + async command uint8_t Usci.getAbctl() { return UCmxABCTL; } + async command void Usci.setAbctl(uint8_t v) { UCmxABCTL = v; } + async command uint16_t Usci.getI2coa() { return UCmxI2COA; } + async command void Usci.setI2coa(uint16_t v) { UCmxI2COA = v; } + async command uint16_t Usci.getIrctl() { return UCmxIRCTL; } + async command void Usci.setIrctl(uint16_t v) { UCmxIRCTL = v; } + async command uint8_t Usci.getIrtctl() { return UCmxIRTCTL; } + async command void Usci.setIrtctl(uint8_t v) { UCmxIRTCTL = v; } + async command uint8_t Usci.getIrrctl() { return UCmxIRRCTL; } + async command void Usci.setIrrctl(uint8_t v) { UCmxIRRCTL = v; } + async command uint16_t Usci.getI2csa() { return UCmxI2CSA; } + async command void Usci.setI2csa(uint16_t v) { UCmxI2CSA = v; } + async command uint16_t Usci.getIctl() { return UCmxICTL; } + async command uint16_t Usci.setIctl(uint16_t v) { UCmxICTL = v; } + async command uint8_t Usci.getIe() { return UCmxIE; } + async command void Usci.setIe(uint8_t v) { UCmxIE = v; } + async command uint8_t Usci.getIfg() { return UCmxIFG; } + async command void Usci.setIfg(uint8_t v) { UCmxIFG = v; } + async command uint8_t Usci.getIv() { return UCmxIV; } + + async command void Usci.enterResetMode_ () { +#if defined(WITH_IAR) + UCmxCTL1 |= UCSWRST; +#else + __asm__ __volatile__("bis %0, %1" : : "i" UCSWRST, "m" UCmxCTL1); +#endif + } + + async command void Usci.leaveResetMode_ () { +#if defined(WITH_IAR) + UCmxCTL1 &= ~UCSWRST; +#else + __asm__ __volatile__("bic %0, %1" : : "i" UCSWRST, "m" UCmxCTL1); +#endif + } + + async command void Usci.configure (const msp430_usci_config_t* config, + bool leave_in_reset) { + if (! config) { + return; + } + call Usci.enterResetMode_(); + UCmxCTLW0 = config->ctlw0 + UCSWRST; + UCmxBRW = config->brw; + UCmxMCTL = config->mctl; + if (! leave_in_reset) { + call Usci.leaveResetMode_(); + } + } + + async command uint8_t Usci.currentMode () { + atomic { + if (! (UCmxCTL0 & UCSYNC)) { + return MSP430_USCI_UART; + } + if (UCMODE_3 == (UCmxCTL0 & (UCMODE0 | UCMODE1))) { + return MSP430_USCI_I2C; + } + return MSP430_USCI_SPI; + } + } + + /* + * Upon receipt of an interrupt, if the USCI is active then demux + * the interrupt to the handler for the appropriate USCI mode. + */ + + async event void RawInterrupts.interrupted (uint8_t iv) { + if (call ArbiterInfo.inUse()) { + signal Interrupts.interrupted[ call Usci.currentMode() ](iv); + } + } + + default async event void Interrupts.interrupted[uint8_t mode] (uint8_t iv) { } + +#undef UCmxIV +#undef UCmxIFG +#undef UCmxIE +#undef UCmxICTL +#undef UCmxI2CSA +#undef UCmxIRRCTL +#undef UCmxIRTCTL +#undef UCmxIRCTL +#undef UCmxI2COA +#undef UCmxABCTL +#undef UCmxTXBUF +#undef UCmxRXBUF +#undef UCmxSTAT +#undef UCmxMCTL +#undef UCmxBRW +#undef UCmxCTL0 +#undef UCmxCTL1 +#undef UCmxCTLW0 + +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc new file mode 100644 index 0000000000..ee4d39a26b --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc @@ -0,0 +1,29 @@ +/** A non-generic instance of Msp430UsciC for USCI_A0. */ +configuration Msp430UsciA0P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + + components new HplMsp430UsciC(UCA0CTLW0_, MSP430_USCI_A0_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsA0P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc new file mode 100644 index 0000000000..6175af0017 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc @@ -0,0 +1,31 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for A1 */ +/** A non-generic instance of Msp430UsciC for USCI_A1. */ +configuration Msp430UsciA1P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + + components new HplMsp430UsciC(UCA1CTLW0_, MSP430_USCI_A1_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsA1P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc new file mode 100644 index 0000000000..3db1621309 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc @@ -0,0 +1,31 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for A2 */ +/** A non-generic instance of Msp430UsciC for USCI_A2. */ +configuration Msp430UsciA2P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + + components new HplMsp430UsciC(UCA2CTLW0_, MSP430_USCI_A2_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsA2P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc new file mode 100644 index 0000000000..aa8f8bcbcb --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc @@ -0,0 +1,31 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for A3 */ +/** A non-generic instance of Msp430UsciC for USCI_A3. */ +configuration Msp430UsciA3P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + + components new HplMsp430UsciC(UCA3CTLW0_, MSP430_USCI_A3_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsA3P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc new file mode 100644 index 0000000000..39192141d3 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc @@ -0,0 +1,31 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for B0 */ +/** A non-generic instance of Msp430UsciC for USCI_B0. */ +configuration Msp430UsciB0P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + + components new HplMsp430UsciC(UCB0CTLW0_, MSP430_USCI_B0_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsB0P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc new file mode 100644 index 0000000000..2b6e686ff5 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc @@ -0,0 +1,31 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for B1 */ +/** A non-generic instance of Msp430UsciC for USCI_B1. */ +configuration Msp430UsciB1P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + + components new HplMsp430UsciC(UCB1CTLW0_, MSP430_USCI_B1_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsB1P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc new file mode 100644 index 0000000000..54e781bf8a --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc @@ -0,0 +1,31 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for B2 */ +/** A non-generic instance of Msp430UsciC for USCI_B2. */ +configuration Msp430UsciB2P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + + components new HplMsp430UsciC(UCB2CTLW0_, MSP430_USCI_B2_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsB2P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc new file mode 100644 index 0000000000..658926d281 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc @@ -0,0 +1,31 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for B3 */ +/** A non-generic instance of Msp430UsciC for USCI_B3. */ +configuration Msp430UsciB3P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + + components new HplMsp430UsciC(UCB3CTLW0_, MSP430_USCI_B3_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsB3P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciConfigure.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciConfigure.nc new file mode 100644 index 0000000000..ef6488244f --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciConfigure.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Obtain access to a client-specific USCI configuration. + */ + +#include "msp430usci.h" + +interface Msp430UsciConfigure { + /** + * Return a pointer to the configuration that should be used for a + * particular USCI client. */ + async command const msp430_usci_config_t* getConfiguration (); +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciError.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciError.nc new file mode 100644 index 0000000000..6b9c1b6037 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciError.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Support notification of errors detected in MSP430 USCI modules. + */ + +interface Msp430UsciError { + /** Signalled when the USCI infrastructure detects a hardware error. + * + * The passed parameter is a bit set comprising values defined in + * msp430usci.h; these generally map to bits in the USCI UCxySTAT + * register. Note that this event is usually signalled from within + * an interrupt handler. + */ + async event void condition (unsigned int errors); +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc new file mode 100644 index 0000000000..70b70d9208 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc @@ -0,0 +1,67 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for A0 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A0 in SPI mode. + */ + +generic configuration Msp430UsciSpiA0C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiByte; + interface Msp430UsciError; + } + +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), + }; + + components Msp430UsciA0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiA0P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc new file mode 100644 index 0000000000..a7185af139 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc @@ -0,0 +1,33 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for A0 */ +configuration Msp430UsciSpiA0P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} implementation { + + components Msp430UsciA0P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc new file mode 100644 index 0000000000..17dae4c9ce --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc @@ -0,0 +1,67 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for A1 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A1 in SPI mode. + */ + +generic configuration Msp430UsciSpiA1C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiByte; + interface Msp430UsciError; + } + +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A1_RESOURCE), + }; + + components Msp430UsciA1P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiA1P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc new file mode 100644 index 0000000000..04cb9e3fe8 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc @@ -0,0 +1,33 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for A1 */ +configuration Msp430UsciSpiA1P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} implementation { + + components Msp430UsciA1P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc new file mode 100644 index 0000000000..15c06eb424 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc @@ -0,0 +1,67 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for A2 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A2 in SPI mode. + */ + +generic configuration Msp430UsciSpiA2C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiByte; + interface Msp430UsciError; + } + +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A2_RESOURCE), + }; + + components Msp430UsciA2P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiA2P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc new file mode 100644 index 0000000000..d44539fa14 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc @@ -0,0 +1,33 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for A2 */ +configuration Msp430UsciSpiA2P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} implementation { + + components Msp430UsciA2P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc new file mode 100644 index 0000000000..63b900592f --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc @@ -0,0 +1,67 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for A3 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A3 in SPI mode. + */ + +generic configuration Msp430UsciSpiA3C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiByte; + interface Msp430UsciError; + } + +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A3_RESOURCE), + }; + + components Msp430UsciA3P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiA3P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc new file mode 100644 index 0000000000..49c00329b1 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc @@ -0,0 +1,33 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for A3 */ +configuration Msp430UsciSpiA3P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} implementation { + + components Msp430UsciA3P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc new file mode 100644 index 0000000000..9560ea0200 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B0 in SPI mode. + */ + +generic configuration Msp430UsciSpiB0C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiByte; + interface Msp430UsciError; + } + +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), + }; + + components Msp430UsciB0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiB0P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc new file mode 100644 index 0000000000..7255083b66 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc @@ -0,0 +1,31 @@ +configuration Msp430UsciSpiB0P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} implementation { + + components Msp430UsciB0P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc new file mode 100644 index 0000000000..bc06df1bcf --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc @@ -0,0 +1,67 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for B1 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B1 in SPI mode. + */ + +generic configuration Msp430UsciSpiB1C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiByte; + interface Msp430UsciError; + } + +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B1_RESOURCE), + }; + + components Msp430UsciB1P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiB1P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc new file mode 100644 index 0000000000..4290252095 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc @@ -0,0 +1,33 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for B1 */ +configuration Msp430UsciSpiB1P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} implementation { + + components Msp430UsciB1P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc new file mode 100644 index 0000000000..43dc524734 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc @@ -0,0 +1,67 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for B2 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B2 in SPI mode. + */ + +generic configuration Msp430UsciSpiB2C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiByte; + interface Msp430UsciError; + } + +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B2_RESOURCE), + }; + + components Msp430UsciB2P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiB2P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc new file mode 100644 index 0000000000..f8262db2eb --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc @@ -0,0 +1,33 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for B2 */ +configuration Msp430UsciSpiB2P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} implementation { + + components Msp430UsciB2P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc new file mode 100644 index 0000000000..d03d080acf --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc @@ -0,0 +1,67 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for B3 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B3 in SPI mode. + */ + +generic configuration Msp430UsciSpiB3C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiByte; + interface Msp430UsciError; + } + +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B3_RESOURCE), + }; + + components Msp430UsciB3P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiB3P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc new file mode 100644 index 0000000000..6ec0401514 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc @@ -0,0 +1,33 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for B3 */ +configuration Msp430UsciSpiB3P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} implementation { + + components Msp430UsciB3P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc new file mode 100644 index 0000000000..3adac1a662 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc @@ -0,0 +1,195 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Implement the SPI-related interfaces for a MSP430 USCI module + * instance. + * + * @author Peter A. Bigot + */ + +generic module Msp430UsciSpiP () @safe() { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + + interface Msp430UsciConfigure[ uint8_t client ]; + interface ArbiterInfo; + interface Leds; + } +} implementation { + + /** The SPI is busy if it's actively transmitting/receiving, or if + * there is an active buffered I/O operation. + */ + bool isBusy () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + return 0; + } + + /** The given client is the owner if the USCI is in SPI mode and + * the client is the user stored in the SPI arbiter. + */ + error_t checkIsOwner (uint8_t client) { + /* Ensure the USCI is in SPI mode and we're the owning client */ + if (! (call ArbiterInfo.inUse())) { + return EOFF; + } + if ((call ArbiterInfo.userId() != client)) { + return EBUSY; + } + return SUCCESS; + } + + /** Take the USCI out of SPI mode. + * + * Assumes the USCI is currently in SPI mode. This will busy-wait + * until any characters being actively transmitted or received are + * out of their shift register. It disables the interrupts, puts + * the USCI into software resent, and returns the SPI-related pins + * to their IO rather than module role. + * + * The USCI is left in software reset mode to avoid power drain per + * CC430 errata UCS6. + */ + void unconfigure_ () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + + call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); + call Usci.enterResetMode_(); + call SIMO.makeOutput(); + call SIMO.selectIOFunc(); + call SOMI.makeOutput(); + call SOMI.selectIOFunc(); + call CLK.makeOutput(); + call CLK.selectIOFunc(); + } + + /** Configure the USCI for SPI mode. + * + * Invoke the USCI configuration to set up the serial speed, but + * leaves USCI in reset mode on completion. This function then + * follows up by setting the SPI-related pins to their module role + * prior to taking the USCI out of reset mode. All interrupts are + * left off. + */ + error_t configure_ (const msp430_usci_config_t* config) { + if (! config) { + return FAIL; + } + + /* + * Do basic configuration, leaving USCI in reset mode. Configure + * the SPI pins, enable the USCI, and turn on the interrupts. + */ + call Usci.configure(config, TRUE); + call SIMO.makeOutput(); + call SIMO.selectModuleFunc(); + call SOMI.makeInput(); + call SOMI.selectModuleFunc(); + call CLK.makeOutput(); + call CLK.selectModuleFunc(); + + call Usci.leaveResetMode_(); + call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); + + return SUCCESS; + } + + async command uint8_t SpiByte.write (uint8_t data) { + uint8_t stat; + while (! (UCTXIFG & call Usci.getIfg())) { + ; /* busywait */ + } + call Usci.setTxbuf(data); + + while (! (UCRXIFG & call Usci.getIfg())) { + ; /* busywait */ + } + stat = call Usci.getStat(); + data = call Usci.getRxbuf(); + stat = MSP430_USCI_ERR_UCxySTAT & (stat | (call Usci.getStat())); + if (stat) { + signal Msp430UsciError.condition(stat); + } + return data; + } + + async command error_t SpiPacket.send[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { + /* Not supported yet */ + return FAIL; + } + + default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error ) { } + + async event void Interrupts.interrupted (uint8_t iv) { + if (! call ArbiterInfo.inUse()) { + return; + } + if (USCI_UCRXIFG == iv) { + } else if (USCI_UCTXIFG == iv) { + } + } + + default async command const msp430_usci_config_t* + Msp430UsciConfigure.getConfiguration[uint8_t client] () { + return &msp430_usci_spi_default_config; + } + + async command void ResourceConfigure.configure[uint8_t client] () { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[uint8_t client] () { + unconfigure_(); + } + + default async event void Msp430UsciError.condition (unsigned int errors) { } +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc new file mode 100644 index 0000000000..6a77c6d21d --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A0 in UART mode. + */ +generic configuration Msp430UsciUartA0C() { + provides { + interface Resource; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), + }; + + components Msp430UsciA0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA0P as UartC; + UartStream = UartC.UartStream[CLIENT_ID]; + UartByte = UartC.UartByte[CLIENT_ID]; + Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + + UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc new file mode 100644 index 0000000000..c5e3b75083 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc @@ -0,0 +1,33 @@ +configuration Msp430UsciUartA0P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} implementation { + + components Msp430UsciA0P as UsciC; + + components new Msp430UsciUartP() as UartC; + + UartC.Usci -> UsciC; + UartC.Interrupts -> UsciC.Interrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc new file mode 100644 index 0000000000..abf9d7073c --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc @@ -0,0 +1,65 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0C.nc for A1 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A1 in UART mode. + */ +generic configuration Msp430UsciUartA1C() { + provides { + interface Resource; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A1_RESOURCE), + }; + + components Msp430UsciA1P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA1P as UartC; + UartStream = UartC.UartStream[CLIENT_ID]; + UartByte = UartC.UartByte[CLIENT_ID]; + Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + + UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc new file mode 100644 index 0000000000..a8225f1713 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc @@ -0,0 +1,35 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0P.nc for A1 */ +configuration Msp430UsciUartA1P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} implementation { + + components Msp430UsciA1P as UsciC; + + components new Msp430UsciUartP() as UartC; + + UartC.Usci -> UsciC; + UartC.Interrupts -> UsciC.Interrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc new file mode 100644 index 0000000000..9d2e55cd03 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc @@ -0,0 +1,65 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0C.nc for A2 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A2 in UART mode. + */ +generic configuration Msp430UsciUartA2C() { + provides { + interface Resource; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A2_RESOURCE), + }; + + components Msp430UsciA2P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA2P as UartC; + UartStream = UartC.UartStream[CLIENT_ID]; + UartByte = UartC.UartByte[CLIENT_ID]; + Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + + UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc new file mode 100644 index 0000000000..31487ab407 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc @@ -0,0 +1,35 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0P.nc for A2 */ +configuration Msp430UsciUartA2P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} implementation { + + components Msp430UsciA2P as UsciC; + + components new Msp430UsciUartP() as UartC; + + UartC.Usci -> UsciC; + UartC.Interrupts -> UsciC.Interrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc new file mode 100644 index 0000000000..d780212dd7 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc @@ -0,0 +1,65 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0C.nc for A3 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A3 in UART mode. + */ +generic configuration Msp430UsciUartA3C() { + provides { + interface Resource; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A3_RESOURCE), + }; + + components Msp430UsciA3P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA3P as UartC; + UartStream = UartC.UartStream[CLIENT_ID]; + UartByte = UartC.UartByte[CLIENT_ID]; + Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + + UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc new file mode 100644 index 0000000000..a52b692d11 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc @@ -0,0 +1,35 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0P.nc for A3 */ +configuration Msp430UsciUartA3P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} implementation { + + components Msp430UsciA3P as UsciC; + + components new Msp430UsciUartP() as UartC; + + UartC.Usci -> UsciC; + UartC.Interrupts -> UsciC.Interrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc new file mode 100644 index 0000000000..3c3158f906 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc @@ -0,0 +1,424 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Implement the UART-related interfaces for a MSP430 USCI module + * instance. + * + * Interrupt Management + * -------------------- + * + * Upon grant of the USCI in UART mode to a client, interrupts are + * turned off. + * + * On the MSP430, when the TX interrupt is raised the MCU + * automatically clears the UCTXIFG bit that indicates that the TXBUF + * is available for writing characters. Rather than maintain local + * state managed by cooperation between the TX interrupt handler and + * the send code, we leave the TX interrupt disabled and rely on the + * UCTXIFG flag to indicate that single-byte transmission is + * permitted. + * + * An exception to this is in support of the UartSerial.send() + * function. The transmit interrupt is enabled when the outgoing + * message is provided; subsequent sends are interrupt-driven, and the + * interrupt is disabled just prior to transmitting the last character + * of the packet. This leaves the UCTXIFG flag set upon completion of + * the transfer. + * + * The receive interrupt is enabled upon configuration. It is + * controlled using the UartStream functions. While a buffered + * receive operation is active, received characters will be stored and + * no notification provided until the full packet has been received. + * If no buffered receive operation is active, the receivedByte() + * event will be signaled for each received character. + * + * As with the transmit interrupt, MCU execution of the receive + * interrupt clears the UCRXIFG flag, making interrupt-driven + * reception fundamentally incompatible with the busy-waiting + * UartByte.receive() method. + * + * @author Peter A. Bigot + */ + +generic module Msp430UsciUartP () @safe() { + provides { + interface UartStream[ uint8_t client ]; + interface UartByte[ uint8_t client ]; + interface ResourceConfigure[ uint8_t client ]; + interface Msp430UsciError[ uint8_t client ]; + } + + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + + interface Msp430UsciConfigure[ uint8_t client ]; + interface ArbiterInfo; + interface LocalTime as LocalTime_bms; + } +} implementation { + + norace uint16_t m_tx_len, m_rx_len; + norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; + norace uint16_t m_tx_pos, m_rx_pos; + + /** + * The UART is busy if it's actively transmitting/receiving, or if + * there is an active buffered I/O operation. + */ + bool isBusy () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + return (0 != m_tx_buf) || (0 != m_rx_buf); + } + + /** + * The given client is the owner if the USCI is in UART mode and + * the client is the user stored in the UART arbiter. + */ + error_t checkIsOwner (uint8_t client) { + /* Ensure the USCI is in UART mode and we're the owning client */ + const uint8_t current_client = call ArbiterInfo.userId(); + + if (0xFF == current_client) { + return EOFF; + } + if (current_client != client) { + return EBUSY; + } + return SUCCESS; + } + + /** + * Take the USCI out of UART mode. + * + * Assumes the USCI is currently in UART mode. This will busy-wait + * until any characters being actively transmitted or received are + * out of their shift register. It disables the interrupts, puts + * the USCI into software resent, and returns the UART-related pins + * to their IO rather than module role. + * + * The USCI is left in software reset mode to avoid power drain per + * CC430 errata UCS6. + */ + void unconfigure_ () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); + call Usci.enterResetMode_(); + call URXD.makeOutput(); + call URXD.selectIOFunc(); + call UTXD.makeOutput(); + call UTXD.selectIOFunc(); + } + + /** + * Configure the USCI for UART mode. + * + * Invoke the USCI configuration to set up the serial speed, but + * leaves USCI in reset mode on completion. This function then + * follows up by setting the UART-related pins to their module role + * prior to taking the USCI out of reset mode. The RX interrupt is + * enabled, and TX is disabled.. + */ + error_t configure_ (const msp430_usci_config_t* config) { + if (! config) { + return FAIL; + } + + /* + * Do basic configuration, leaving USCI in reset mode. Configure + * the UART pins, enable the USCI, and turn on the interrupts. + */ + call Usci.configure(config, TRUE); + call URXD.makeInput(); + call URXD.selectModuleFunc(); + call UTXD.makeOutput(); + call UTXD.selectModuleFunc(); + call Usci.leaveResetMode_(); + call Usci.setIe((UCRXIE | call Usci.getIe()) & (~ UCTXIE)); + m_tx_buf = m_rx_buf = 0; + + return SUCCESS; + } + + /** + * Transmit the next character in the outgoing message. + * + * Assumes the USCI is in UART mode and the owning client has + * supplied a transmission buffer using UartStream. This method is + * only invoked by the transmit interrupt handler when TXBUF is + * ready to receive a new character. + */ + void nextStreamTransmit (uint8_t client) { + atomic { + uint8_t ch = m_tx_buf[m_tx_pos++]; + bool last_char = (m_tx_pos == m_tx_len); + + if (last_char) { + /* + * Disable interrupts and release hold on UART before we + * transmit the character; this ensures that UCTXIFG remains + * set for subsequent byte transfers + */ + call Usci.setIe(call Usci.getIe() & (~ UCTXIE)); + } + call Usci.setTxbuf(ch); + + /* + * On completion, disable the transmit infrastructure prior to + * signaling completion. + */ + if (last_char) { + uint8_t* tx_buf = m_tx_buf; + uint16_t tx_len = m_tx_len; + m_tx_buf = 0; + signal UartStream.sendDone[client](tx_buf, tx_len, SUCCESS); + } + } + } + + async command error_t UartStream.send[uint8_t client]( uint8_t* buf, uint16_t len ) { + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (isBusy()) { + return EBUSY; + } + if ((0 == len) || (0 == buf)) { + return FAIL; + } + m_tx_buf = buf; + m_tx_len = len; + m_tx_pos = 0; + /* + * Enabling the interrupt causes the ISR to be invoked which + * transmits the first character. + */ + call Usci.setIe((call Usci.getIe()) | UCTXIE); + return SUCCESS; + } + + default async event void UartStream.sendDone[uint8_t client] + (uint8_t* buf, uint16_t len, error_t error ) { } + + /* + * The behavior of UartStream during reception is not well defined. + * In the original Msp430UartP implementation, both transmit and + * receive interrupts were enabled upon UART configuration. As + * noted earlier, we keep the transmit interrupt disabled to + * simplify control flow, but we do enable the receive interrupt for + * backwards compatibility. + * + * If receive(uint8_t*,uint16_t) is called, then subsequent received + * characters will be stored into the buffer until completion, and + * the receivedByte(uint8_t) event will not be signaled. If no + * buffered receive is active, then receivedByte(uint8_t) will be + * signaled. + * + * There is no coordination with UartByte, for which the receive + * operation simply busy-waits until the interrupt register + * indicates data is available. If UartStream's + * enableReceiveInterrupt() is in force, it is probable that the + * loop will timeout as the interrupt will clear the flag + * register. + * + * When the UART client releases control (unconfigures the UART), + * all interrupts are disabled. + */ + + async command error_t UartStream.enableReceiveInterrupt[uint8_t client]() { + error_t rv = checkIsOwner(client); + if (SUCCESS == rv) { + call Usci.setIe((call Usci.getIe()) | UCRXIE); + } + return rv; + } + + async command error_t UartStream.disableReceiveInterrupt[uint8_t client]() { + error_t rv = checkIsOwner(client); + if (SUCCESS == rv) { + call Usci.setIe((call Usci.getIe()) & (~ UCRXIE)); + } + return rv; + } + + default async event void UartStream.receivedByte[uint8_t client]( uint8_t byte ) { } + + async command error_t UartStream.receive[uint8_t client]( uint8_t* buf, uint16_t len ) { + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if ((0 == len) || (0 == buf)) { + return FAIL; + } + atomic { + if (m_rx_buf) { + return EBUSY; + } + m_rx_buf = buf; + m_rx_len = len; + m_rx_pos = 0; + } + return SUCCESS; + } + + default async event void UartStream.receiveDone[uint8_t client] + (uint8_t* buf, uint16_t len, error_t error) { } + + async command error_t UartByte.send[uint8_t client]( uint8_t byte ) { + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (m_tx_buf) { + return EBUSY; + } + + /* Wait for TXBUF to become available */ + while (! (UCTXIFG & call Usci.getIfg())) { + } + /* Transmit the character. Note that it hasn't actually gone out + * over the wire until UCBUSY on UCmxSTAT is cleared. */ + call Usci.setTxbuf(byte); + return SUCCESS; + } + + + enum { + /** + * The timeout for UartByte.receive is specified in "byte times", + * which we can't know without reverse engineering the clock + * subsystem. Assuming a 57600 baud system, one byte takes + * roughly 170usec to transmit (ten bits per byte), or about five + * byte times per (binary) millisecond. + */ + ByteTimesPerMillisecond = 5, + + /** + * Using an 8-bit value to represent a count of events with + * sub-millisecond duration is a horrible interface for humans: + * gives us at most 52msec to react. For testing purposes, scale + * that by some value (e.g., 100 will increase the maximum delay + * to 5 seconds). + */ + ByteTimeScaleFactor = 1, + }; + + async command error_t UartByte.receive[uint8_t client]( uint8_t* byte, uint8_t timeout_bt ) { + uint32_t startTime_bms; + uint32_t timeout_bms = ByteTimeScaleFactor * ((ByteTimesPerMillisecond + timeout_bt - 1) / ByteTimesPerMillisecond); + + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (! byte) { + return FAIL; + } + if (m_rx_buf) { + return EBUSY; + } + + startTime_bms = call LocalTime_bms.get(); + while (! (UCRXIFG & (call Usci.getIfg()))) { + if((call LocalTime_bms.get() - startTime_bms) > timeout_bms) { + return FAIL; + } + } + + *byte = call Usci.getRxbuf(); + return SUCCESS; + } + + async event void Interrupts.interrupted (uint8_t iv) { + uint8_t current_client = call ArbiterInfo.userId(); + if (0xFF == current_client) { + return; + } + if (USCI_UCRXIFG == iv) { + uint8_t stat = call Usci.getStat(); + uint8_t data = call Usci.getRxbuf(); + + /* + * SLAU259 16.3.6: Errors are cleared by reading UCAxRXD. Grab + * the old errors, read the incoming data, then read the errors + * again in case an overrun occurred between reading STATx and + * RXD. Mask off the bits we don't care about, and if there are + * any left on notify somebody. + */ + stat = MSP430_USCI_ERR_UCxySTAT & (stat | (call Usci.getStat())); + if (stat) { + signal Msp430UsciError.condition[current_client](stat); + } + if (m_rx_buf) { + m_rx_buf[m_rx_pos++] = data; + if (m_rx_len == m_rx_pos) { + uint8_t* rx_buf = m_rx_buf; + uint16_t rx_len = m_rx_len; + m_rx_buf = 0; + signal UartStream.receiveDone[current_client](rx_buf, rx_len, SUCCESS); + } + } else { + signal UartStream.receivedByte[current_client](data); + } + } else if (USCI_UCTXIFG == iv) { + nextStreamTransmit(current_client); + } + } + + default async command const msp430_usci_config_t* + Msp430UsciConfigure.getConfiguration[uint8_t client] () { + return &msp430_usci_uart_default_config; + } + + async command void ResourceConfigure.configure[uint8_t client] () { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[uint8_t client] () { + unconfigure_(); + } + + default async event void Msp430UsciError.condition[uint8_t client] (unsigned int errors) { } +} diff --git a/tos/chips/msp430/x5xxx/usci/README.txt b/tos/chips/msp430/x5xxx/usci/README.txt new file mode 100644 index 0000000000..0daa9caecc --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/README.txt @@ -0,0 +1,119 @@ +This directory contains support for the Universal Serial Controller +Interface as implemented on MSP430 chips in families 4xx, 5xx, and some +chips in the 2xx family. + +============================== + +@TODO@ There are at least three USCI implementations supported over the +MSP430 family. The implementations are distinguished by the functional +presence preproprocessor macro as defined in the TI standard headers from +Code Composer Studio distribution: + + __MSP430_HAS_USCI__ -- indicates the original USCI implementation on chips: + msp430x21x2 msp430x22x2 msp430x22x4 msp430x23x msp430x23x0 msp430x241x + msp430x24x msp430x24x1 msp430x26x msp430x41x2 msp430x471x6 msp430x471x7 + msp430x47x msp430x47x3 msp430x47x4 msp430xG46x msp430xG47x + + __MSP430_HAS_USCI_AB0__ -- second generation USCI implementation on chips: + msp430x241x msp430x24x msp430x24x1 msp430x26x msp430x471x6 msp430x471x7 + msp430x47x3 msp430x47x4 msp430x241x msp430x24x msp430x24x1 msp430x26x + msp430x471x6 msp430x471x7 msp430x47x3 msp430x47x4 + + __MSP430_HAS_USCI_A0__, __MSP430_HAS_USCI_B0__ -- third generation USCI + implementation on chips: + cc430x513x cc430x612x cc430x613x msp430x54x msp430x54xA msp430x551x + msp430x552x + +It was once hypothesized that all USCI implementations could be supported by +this module by creating alternative HplMSP430UsciInterrupts*P components. A +second look implies this is not the case, but the appropriate abstractions +and architecture have not been identified. + +See tos/chips/msp430/00_Chip_Notes for more information. + +============================== + +There is a generic concept of a USCI module. Different chip families +support different types of module; these are denoted by a suffix letter +(e.g., USCI_Ax or USCI_Bx). The types of module differ by the functional +modes they support: USCI_Ax supports UART and SPI, while USCI_Bx supports +SPI and I2C. There can be any number of instances of a given module type on +a given chip; the MSP430x54xx chips support up to four each of USCI_Ax and +USCI_Bx. + +The legacy of the earliest MSP430 chips, and the need to support arbitrary +numbers of different modules, had made the original USART module a +maintenance nightmare, and the USCI module has been reworked from the ground +up. + +The 2nd gen of TI chips, MSP430X, implemented a USCI but didn't get it quite +right. Register access is non-uniform and the interrupt interface is +quite cumbersome. This is denoted by __MSP430_USCI_AB0__. It is problematic +to have one usci driver that supports both the x2 and x5 parts. + +The driver for the refactoring was elimination of duplicated code. +Since NesC does not support the level of genericity required to do this +within the language, one characteristic instance of each capability is +maintained, and the others are generated from it using the generate.sh +script. + +The list of files that are derived are maintained in the file generated.lst, +which itself is generated as a side effect of running generate.sh. When +attempting to understand the system and do basic maintainance, it may be +worth running: + + cat generated.lst | xargs rm + +to clear the clutter out of the way. + +Common USCI Support +------------------- + +The interface HplMsp430Usci supports the common control registers present +in both A and B modules. A corresponding HplMsp430UsciP provides a +generic implementation that is derived from the module base register +address. HplMsp430UsciC bundles this with TEP108-style resource +management, which is done on a whole-module basis rather than the per-mode +approach used in the original implementation. + +HplMsp430UsciInterrupts.nc specifies the USCI interrupts interface for +the MSP430XV2. Because interrupt handlers cannot be defined in generic +modules, HplMsp430UsciA0P.nc is a maintained non-generic module that +defines the interrupt vector. + +Msp430UsciA0P.nc is the maintained configuration implementation for +top-level USCI instances, linking the instantiated generic USCI +implementation with proper the non-generic interrupt implementation. + +Uart Mode Support +----------------- + +Msp430UsciP.nc is a maintained generic module that supports parameterized +versions of the standard UART interfaces, relative to an externally provided +USCI interface. + +Msp430UsciUartA0P.nc is the maintained non-generic configuration for the UART +capability on a specific module instance. Platform-specific configurations +should wire up the appropriate chip pins for URXD and UTXD. + +Msp430UsciUartA0C.nc is the maintained generic configuration that is used +by applications that need a UART client. + +SPI Mode Support +---------------- + +Msp430UsciSpiP.nc is a maintained generic module that supports +parameterized versions of the standard SPI interfaces, relative to an +externally provided USCI interface. + +For historical reasons, the maintained implementation for SPI is in files +Msp430UsciSpiB0P.nc and Msp430UsciSpiB0C.nc. Platform-specific +configurations should wire the appropriate chip pins to Msp430UsciSpiB0P. + +I2C Mode Support +---------------- + +Due to lack of I2C support on a platform based on an MSP430XV2 chip, I2C +support has not yet been implemented. Adding support for this should be a +straightforward extension from that for the other USCI modes. + diff --git a/tos/chips/msp430/x5xxx/usci/generate.sh b/tos/chips/msp430/x5xxx/usci/generate.sh new file mode 100755 index 0000000000..447d314bda --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/generate.sh @@ -0,0 +1,65 @@ +#!/bin/sh +# +# Given implementations for USCI_A0 and USCI_B0, generate equivalent +# configurations for the higher-numbered module instances. +# +# Much of the USCI implementation is identical except for varying +# based on the instance number of the module to which a component +# belongs. To avoid implementation divergence, we maintain and evolve +# only one of each type of component, and generate the remainder from +# that template. +# +# @author Peter A. Bigot + +# List of tags for USCI_Ax modules. The first is the template. +A_MODULES='A0 A1 A2 A3' +# List of tags for USCI_Bx modules. The first is the template. +B_MODULES='B0 B1 B2 B3' + +# Initialize a file that will contain a list of all generated files, +# so we can remove them during basic maintenance. Their presence +# clutters the directory and makes it difficult to see what's really +# important. +rm -f generated.lst + +clone_module () { + source="$1" ; shift + target="$1" ; shift + basis="$1" ; shift + clone="$1" ; shift + ( cat< ${target} + echo ${target} >> generated.lst +} + +# The base USCI module capability is independent of module type; +# we use A0 as the template. +for m in ${A_MODULES} ${B_MODULES} ; do + if [ A0 = "${m}" ] ; then + continue + fi + clone_module HplMsp430UsciInterruptsA0P.nc "HplMsp430UsciInterrupts${m}P.nc" A0 "${m}" + clone_module Msp430UsciA0P.nc "Msp430Usci${m}P.nc" A0 "${m}" +done + +# Clone the mode-specific configurations for a given module type +clone_mode_modules () { + mode="${1}" ; shift + basis="${1}" ; shift + for source in Msp430Usci${mode}${basis}?.nc ; do + for clone in "${@}" ; do + target=`echo ${source} | sed -e "s@${basis}@${clone}@g"` + clone_module ${source} ${target} ${basis} ${clone} + done + done +} + +# Clone the mode-specific configurations +clone_mode_modules Uart ${A_MODULES} +clone_mode_modules Spi ${B_MODULES} ${A_MODULES} +# clone_mode_modules I2c ${B_MODULES} diff --git a/tos/chips/msp430/x5xxx/usci/generated.lst b/tos/chips/msp430/x5xxx/usci/generated.lst new file mode 100644 index 0000000000..d4d33bc51f --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/generated.lst @@ -0,0 +1,34 @@ +HplMsp430UsciInterruptsA1P.nc +Msp430UsciA1P.nc +HplMsp430UsciInterruptsA2P.nc +Msp430UsciA2P.nc +HplMsp430UsciInterruptsA3P.nc +Msp430UsciA3P.nc +HplMsp430UsciInterruptsB0P.nc +Msp430UsciB0P.nc +HplMsp430UsciInterruptsB1P.nc +Msp430UsciB1P.nc +HplMsp430UsciInterruptsB2P.nc +Msp430UsciB2P.nc +HplMsp430UsciInterruptsB3P.nc +Msp430UsciB3P.nc +Msp430UsciUartA1C.nc +Msp430UsciUartA2C.nc +Msp430UsciUartA3C.nc +Msp430UsciUartA1P.nc +Msp430UsciUartA2P.nc +Msp430UsciUartA3P.nc +Msp430UsciSpiB1C.nc +Msp430UsciSpiB2C.nc +Msp430UsciSpiB3C.nc +Msp430UsciSpiA0C.nc +Msp430UsciSpiA1C.nc +Msp430UsciSpiA2C.nc +Msp430UsciSpiA3C.nc +Msp430UsciSpiB1P.nc +Msp430UsciSpiB2P.nc +Msp430UsciSpiB3P.nc +Msp430UsciSpiA0P.nc +Msp430UsciSpiA1P.nc +Msp430UsciSpiA2P.nc +Msp430UsciSpiA3P.nc diff --git a/tos/chips/msp430/x5xxx/usci/msp430usci.h b/tos/chips/msp430/x5xxx/usci/msp430usci.h new file mode 100644 index 0000000000..bac2ee5f03 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/msp430usci.h @@ -0,0 +1,94 @@ +#ifndef _H_Msp430Usci_h +#define _H_Msp430Usci_h + +#include "msp430hardware.h" + +#define MSP430_USCI_RESOURCE "Msp430Usci.Resource" + +#define MSP430_USCI_A0_RESOURCE "Msp430Usci.A0.Resource" +#define MSP430_USCI_B0_RESOURCE "Msp430Usci.B0.Resource" +#define MSP430_USCI_A1_RESOURCE "Msp430Usci.A1.Resource" +#define MSP430_USCI_B1_RESOURCE "Msp430Usci.B1.Resource" +#define MSP430_USCI_A2_RESOURCE "Msp430Usci.A2.Resource" +#define MSP430_USCI_B2_RESOURCE "Msp430Usci.B2.Resource" +#define MSP430_USCI_A3_RESOURCE "Msp430Usci.A3.Resource" +#define MSP430_USCI_B3_RESOURCE "Msp430Usci.B3.Resource" + +enum { + MSP430_USCI_Inactive, + MSP430_USCI_UART, + MSP430_USCI_SPI, + MSP430_USCI_I2C, +}; + +/** + * Aggregates basic configuration registers for an MSP430 USCI. + * These are specifically the registers common to all configurations. + * Mode-specific configuration data should be provided elsewise. + */ +typedef struct msp430_usci_config_t { + uint16_t ctlw0; + uint16_t brw; + uint8_t mctl; +} msp430_usci_config_t; + +#ifndef TOS_DEFAULT_BAUDRATE +#define TOS_DEFAULT_BAUDRATE 115200 +#endif /* TOS_DEFAULT_BAUDRATE */ + +msp430_usci_config_t msp430_usci_uart_default_config = { + /* N81 UART mode driven by SMCLK */ + ctlw0 : (0 << 8) | UCSSEL__SMCLK, + +#if 9600 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 9600: UBR=109, BRS=2, BRF=0 */ + brw : 109, // 9600 + mctl : UCBRF_0 + UCBRS_2 +#elif 19200 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 19200: UBR=54, BRS=2, BRF=0 */ + brw : 54, // 19200 + mctl : UCBRF_0 + UCBRS_2 +#elif 38400 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 38400: UBR=27, BRS=2, BRF=0 */ + brw : 27, // 38400 + mctl : UCBRF_0 + UCBRS_2 +#elif 57600 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 57600: UBR=18, BRS=1, BRF=0 */ + brw : 18, // 57600 + mctl : UCBRF_0 + UCBRS_1 +#elif 115200 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 115200: UBR=9, BRS=1, BRF=0 */ + brw : 9, // 115200 + mctl : UCBRF_0 + UCBRS_1 +#else +#warning Unrecognized value for TOS_DEFAULT_BAUDRATE, using 115200 + brw : 9, // 115200 + mctl : UCBRF_0 + UCBRS_1 +#endif +}; + +msp430_usci_config_t msp430_usci_spi_default_config = { + /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ + ctlw0 : ((UCCKPL + UCMSB + UCMST + UCSYNC) << 8) | UCSSEL__SMCLK, + /* 2x Prescale */ + brw : 2, + mctl : 0 /* Always 0 in SPI mode */ +}; + +enum { + /** Bit set in Msp430UsciError.condition parameter when a framing + * error (UART) or bus conflict (SPI) has been detected. Applies in + * UART mode, and SPI 4-wire master mode. */ + MSP430_USCI_ERR_Framing = UCFE, + /** Bit set in Msp430UsciError.condition parameter when an overrun + * error (lost character on input) has been detected. Applies in + * UART and SPI modes. */ + MSP430_USCI_ERR_Overrun = UCOE, + /** Bit set in Msp430UsciError.condition parameter when a parity + * error has been detected. Applies in UART mode. */ + MSP430_USCI_ERR_Parity = UCPE, + /** Mask for all UCxySTAT bits that represent reportable errors. */ + MSP430_USCI_ERR_UCxySTAT = MSP430_USCI_ERR_Framing | MSP430_USCI_ERR_Overrun | MSP430_USCI_ERR_Parity, +}; + +#endif // _H_Msp430Usci_h From 7fa54189c4a8e9ff50c212d7c9021bc369f44a85 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 5 Jun 2011 04:20:37 -0700 Subject: [PATCH 089/411] msp430/x5: bring in remainder of x5 files from OSIAN tree --- tos/chips/msp430/x5xxx/BootInfoC.nc | 87 +++++++++++++++ tos/chips/msp430/x5xxx/Msp430DcoSpec.h | 66 ++++++++++++ tos/chips/msp430/x5xxx/lpm/McuSleepC.nc | 76 +++++++++++++ tos/chips/msp430/x5xxx/lpm/McuSleepEvents.nc | 62 +++++++++++ tos/chips/msp430/x5xxx/lpm/McuSleepP.nc | 106 +++++++++++++++++++ 5 files changed, 397 insertions(+) create mode 100644 tos/chips/msp430/x5xxx/BootInfoC.nc create mode 100644 tos/chips/msp430/x5xxx/Msp430DcoSpec.h create mode 100644 tos/chips/msp430/x5xxx/lpm/McuSleepC.nc create mode 100644 tos/chips/msp430/x5xxx/lpm/McuSleepEvents.nc create mode 100644 tos/chips/msp430/x5xxx/lpm/McuSleepP.nc diff --git a/tos/chips/msp430/x5xxx/BootInfoC.nc b/tos/chips/msp430/x5xxx/BootInfoC.nc new file mode 100644 index 0000000000..dfbddac8ae --- /dev/null +++ b/tos/chips/msp430/x5xxx/BootInfoC.nc @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +/** Display reset codes on an MSP430 supporting the SYSRSTIV register. + * + * @author Peter A. Bigot + */ + +module BootInfoC { + provides interface Init; +} implementation { + + typedef struct vector_t { + uint16_t value; + char* description; + } vector_t; + + static const vector_t reset_types[] = { + { 0x0000, "None" }, + { 0x0002, "Brownout" }, + { 0x0004, "RST#/NMI" }, + { 0x0006, "PMMSWBOR" }, + { 0x0008, "Wake from LPM5" }, + { 0x000a, "Security violation" }, + { 0x000c, "SVSL" }, + { 0x000e, "SVSH" }, + { 0x0010, "SVML_OVP" }, + { 0x0012, "SVMH_OVP" }, + { 0x0014, "PMMSWPOR" }, + { 0x0016, "WDT timeout" }, + { 0x0018, "WDT key violation" }, + { 0x001a, "KEYV flash key violation" }, + { 0x001c, "PLL unlock" }, + { 0x001e, "PERF peripheral/configuration area fetch" }, + { 0x0020, "PMM key violation" }, + { 0, 0 } + }; + + command error_t Init.init () { + uint16_t iv = SYSRSTIV; + if (0 != iv) { + printf("*** RESET DATA:\r\n"); + do { + const vector_t* vp = reset_types; + while ((vp->value != iv) && vp->description) { + ++vp; + } + printf(" %02x (%s)\r\n", iv, vp->description ?: "UNRECOGNIZED"); + iv = SYSRSTIV; + } while (0 != iv); + } + return SUCCESS; + } +} diff --git a/tos/chips/msp430/x5xxx/Msp430DcoSpec.h b/tos/chips/msp430/x5xxx/Msp430DcoSpec.h new file mode 100644 index 0000000000..43fe4ac656 --- /dev/null +++ b/tos/chips/msp430/x5xxx/Msp430DcoSpec.h @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2007 Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Andreas Koepke + * @author Eric B. Decker + * + * + * Specify the target cpu clock speed of your platform by overriding this file. + * + * Be aware that tinyos relies on binary 4MiHz, that is 4096 binary kiHz (4MiHZ). Some + * platforms have an external high frequency oscilator to generate the SMCLK + * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These + * oscillators provide decimal frequencies, but may not run in power down + * modes. Here, we need to switch the SMCLK source, which is easier if + * the external and the DCO source frequency are the same. + * + * change frequencies to use pure HZ to avoid confusion between powers of 10 + * and powers of 2. TI specifies many frequencies as powers of 10. TinyOS + * uses binary frequencies (because of the 32 KiHz clock xtal). + */ + +#ifndef MS430DCOSPEC_H +#define MS430DCOSPEC_H + +/* 16 MiHZ */ +#define TARGET_DCO_HZ 16777216UL +#define ACLK_HZ 32768UL +#define DIV_UIS 16 + +#ifdef notdef +#define TARGET_DCO_KHZ 16384 // the target DCO clock rate in binary kHz +#define ACLK_KHZ 32 // the ACLK rate in binary kHz +#endif + +#endif diff --git a/tos/chips/msp430/x5xxx/lpm/McuSleepC.nc b/tos/chips/msp430/x5xxx/lpm/McuSleepC.nc new file mode 100644 index 0000000000..32c5997e83 --- /dev/null +++ b/tos/chips/msp430/x5xxx/lpm/McuSleepC.nc @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2009-2010 People Power Co. + * Copyright (c) 2005 Stanford University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of TEP 112 (Microcontroller Power Management) for + * the MSP430. Code for low power calculation copied from older + * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp. + * + * Uses TI defines to identify which USCI resources are present. + * Locate these by searching for __MSP430_HAS_ in the toolchain + * header files in msp430/include. + * + * This pass-through configuration allows us to wire other things directly into + * McuSleep at a later time, without breaking architecture to do so. + * + * @author Philip Levis + * @author Vlado Handziski + * @author Joe Polastre + * @author Cory Sharp + * @author Peter A. Bigot + * @author Eric B. Decker + */ + +configuration McuSleepC @safe() { + provides { + interface McuSleep; + interface McuPowerState; + interface McuSleepEvents; + } + uses { + interface McuPowerOverride; + } +} + +implementation { + + components McuSleepP; + McuSleep = McuSleepP; + McuPowerState = McuSleepP; + McuSleepEvents = McuSleepP; + + McuPowerOverride = McuSleepP; +} diff --git a/tos/chips/msp430/x5xxx/lpm/McuSleepEvents.nc b/tos/chips/msp430/x5xxx/lpm/McuSleepEvents.nc new file mode 100644 index 0000000000..15789cdec8 --- /dev/null +++ b/tos/chips/msp430/x5xxx/lpm/McuSleepEvents.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430hardware.h" + +/** + * Microcontroller Sleep Events allows other components in the system + * to perform actions when the microcontroller is thinking about going to + * sleep, going to sleep, or waking up. + * + * @author David Moss + * @author Peter Bigot + */ + +interface McuSleepEvents { + + /** Invoked by McuSleep prior to sleeping. + * + * The microcontroller is going to sleep in the given mode now. + * Perform any final actions necessary before the microcontroller enters + * this mode. + * @param sleep_mode The mode of sleep the microcontroller is entering + */ + async event void preSleep (mcu_power_t sleep_mode); + + /** Invoked by McuSleep immediately after waking. + * + * @param sleep_mode The mode of sleep from which the microcontroller woke. + */ + async event void postSleep (mcu_power_t sleep_mode); +} diff --git a/tos/chips/msp430/x5xxx/lpm/McuSleepP.nc b/tos/chips/msp430/x5xxx/lpm/McuSleepP.nc new file mode 100644 index 0000000000..81143eb13e --- /dev/null +++ b/tos/chips/msp430/x5xxx/lpm/McuSleepP.nc @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2009-2010 People Power Co. + * Copyright (c) 2005 Stanford University. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of TEP 112 (Microcontroller Power Management) for + * the MSP430. Code for low power calculation copied from older + * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp. + * + * Uses TI defines to identify which USCI resources are present. + * Locate these by searching for HAS_T in the TI Code Composer Studio + * header files in ccsv4/msp430/include. MSPGCC and IAR should match + * these definitions. + * + * @author Philip Levis + * @author Vlado Handziski + * @author Joe Polastre + * @author Cory Sharp + * @author Peter A. Bigot + * @author Eric B. Decker + */ + +module McuSleepP @safe() { + provides { + interface McuSleep; + interface McuPowerState; + interface McuSleepEvents; + } + uses { + interface McuPowerOverride; + } +} + +implementation { + + /* Note that the power values are maintained in an order + * based on their active components, NOT on their values.*/ + // NOTE: This table should be in progmem. + // NOTE: On 5xx architectures, we assume SMCLKOFF is not set + + const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = { + 0, // ACTIVE + SR_CPUOFF, // LPM0 + SR_SCG0+SR_CPUOFF, // LPM1 + SR_SCG1+SR_CPUOFF, // LPM2 + SR_SCG1+SR_SCG0+SR_CPUOFF, // LPM3 + SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF, // LPM4 + }; + + async command void McuSleep.sleep() { + uint16_t temp; + mcu_power_t power_state; + + power_state = call McuPowerOverride.lowestState(); + signal McuSleepEvents.preSleep(power_state); + temp = msp430PowerBits[power_state] | SR_GIE; + __asm__ __volatile__( "bis %0, r2" : : "m" (temp) ); + // All of memory may change at this point... + asm volatile ("" : : : "memory"); + __nesc_disable_interrupt(); + signal McuSleepEvents.postSleep(power_state); + } + + async command void McuPowerState.update () { + // Do nothing; we always recalculate + } + + default async command mcu_power_t McuPowerOverride.lowestState() { + return MSP430_POWER_LPM4; + } + + default async event void McuSleepEvents.preSleep(mcu_power_t sleep_mode) { } + default async event void McuSleepEvents.postSleep(mcu_power_t sleep_mode) { } +} From 8aa8a228bd9f7337e1080341714f0204f79fe749 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 9 Jun 2011 13:39:42 -0700 Subject: [PATCH 090/411] update to use legacymsp430.h --- tos/chips/msp430/msp430hardware.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 9a88daeb7c..925871153e 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -48,9 +48,17 @@ */ #ifdef __MSPGCC__ #include +#include #else #include -#endif + +/* + * signal.h defines lots of interesting things including dint(), eint() and + * how to hook interrupts in. + */ +#include + +#endif /* __MSPGCC__ */ #if defined(__msp430x261x) && !defined(__msp430x26x) /* @@ -64,11 +72,6 @@ #define __msp430x26x #endif -/* - * signal.h defines lots of interesting things including dint(), eint() and - * how to hook interrupts in. - */ -#include #include "msp430regtypes.h" /* From f65d349d89217ef6c31bb66833be8846ec7ee4a8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 12 Jun 2011 01:51:02 -0700 Subject: [PATCH 091/411] bring in main surf platform files --- apps/tests/TestLed/BlinkLed/TestAppC.nc | 26 +- apps/tests/TestLed/BlinkLed/TestP.nc | 28 +- apps/tests/TestLed/LedColor/TestAppC.nc | 25 +- apps/tests/TestLed/LedColor/TestP.nc | 30 +- apps/tests/TestLed/MultiLed/TestAppC.nc | 26 +- apps/tests/TestLed/MultiLed/TestP.nc | 26 +- apps/tests/TestLed/MultiLedSingle/TestAppC.nc | 26 +- apps/tests/TestLed/MultiLedSingle/TestP.nc | 27 +- support/make/surf.target | 23 ++ support/make/surf/dco.extra | 22 ++ tos/interfaces/MultiLed.nc | 16 +- tos/platforms/surf/.platform | 112 +++++++ tos/platforms/surf/ActiveMessageC.nc | 79 +++++ tos/platforms/surf/Ieee154MessageC.nc | 77 +++++ tos/platforms/surf/PlatformC.nc | 110 +++++++ tos/platforms/surf/PlatformP.nc | 87 ++++++ .../surf/compatibility/system/LedsC.nc | 53 ++++ tos/platforms/surf/hardware.h | 80 +++++ .../surf/hardware/adc/DemoSensorC.nc | 55 ++++ .../surf/hardware/adc/DemoSensorNowC.nc | 58 ++++ .../surf/hardware/adc/DemoSensorStreamC.nc | 54 ++++ .../surf/hardware/adc/LightSensorC.nc | 61 ++++ .../surf/hardware/adc/LightSensorP.nc | 60 ++++ .../surf/hardware/adc/PlatformAdcC.nc | 70 +++++ tos/platforms/surf/hardware/adc/VoltageC.nc | 59 ++++ tos/platforms/surf/hardware/adc/VoltageP.nc | 89 ++++++ .../surf/hardware/buttons/ButtonBridge.nc | 60 ++++ .../surf/hardware/buttons/ButtonBridgeP.nc | 172 +++++++++++ .../surf/hardware/buttons/ButtonP.nc | 139 +++++++++ .../surf/hardware/buttons/PlatformButtons.h | 46 +++ .../surf/hardware/buttons/PlatformButtonsC.nc | 140 +++++++++ .../surf/hardware/buttons/UserButton.h | 46 +++ .../surf/hardware/buttons/UserButtonC.nc | 55 ++++ .../surf/hardware/clock/PlatformClockC.nc | 50 ++++ .../surf/hardware/clock/PlatformClockP.nc | 132 +++++++++ .../surf/hardware/flash/PlatformFlashC.nc | 76 +++++ .../surf/hardware/flash/PlatformFlashInitC.nc | 59 ++++ .../surf/hardware/flash/PlatformFlashInitP.nc | 62 ++++ .../surf/hardware/flash/PlatformFlashP.nc | 65 +++++ .../surf/hardware/flash/platformflash.h | 48 +++ .../surf/hardware/leds/PlatformLed.h | 42 +++ .../surf/hardware/leds/PlatformLedC.nc | 61 ++++ .../surf/hardware/leds/PlatformLedP.nc | 204 +++++++++++++ .../surf/hardware/onewire/PlatformOneWireC.nc | 65 +++++ .../hardware/onewire/PlatformOneWireInitC.nc | 61 ++++ .../hardware/onewire/PlatformOneWireInitP.nc | 59 ++++ .../surf/hardware/pins/PlatformPinsC.nc | 48 +++ .../surf/hardware/pins/PlatformPinsP.nc | 123 ++++++++ .../surf/hardware/radio/RadioChannelC.nc | 54 ++++ .../surf/hardware/radio/RadioChannelP.nc | 86 ++++++ .../surf/hardware/radio/RadioRssiC.nc | 61 ++++ .../surf/hardware/radio/RadioRssiP.nc | 60 ++++ .../hardware/rtc/PlatformRealTimeClockC.nc | 56 ++++ .../hardware/rtc/PlatformRealTimeClockP.nc | 276 ++++++++++++++++++ .../surf/hardware/usci/PlatformSerialC.nc | 73 +++++ .../surf/hardware/usci/PlatformSerialP.nc | 60 ++++ .../surf/hardware/usci/PlatformUsciInitC.nc | 53 ++++ tos/platforms/surf/platform.h | 0 tos/platforms/surf/platform_message.h | 24 ++ tos/platforms/surf/revisions.txt | 44 +++ 60 files changed, 3947 insertions(+), 92 deletions(-) create mode 100644 support/make/surf.target create mode 100644 support/make/surf/dco.extra create mode 100644 tos/platforms/surf/.platform create mode 100644 tos/platforms/surf/ActiveMessageC.nc create mode 100644 tos/platforms/surf/Ieee154MessageC.nc create mode 100644 tos/platforms/surf/PlatformC.nc create mode 100644 tos/platforms/surf/PlatformP.nc create mode 100644 tos/platforms/surf/compatibility/system/LedsC.nc create mode 100644 tos/platforms/surf/hardware.h create mode 100644 tos/platforms/surf/hardware/adc/DemoSensorC.nc create mode 100644 tos/platforms/surf/hardware/adc/DemoSensorNowC.nc create mode 100644 tos/platforms/surf/hardware/adc/DemoSensorStreamC.nc create mode 100644 tos/platforms/surf/hardware/adc/LightSensorC.nc create mode 100644 tos/platforms/surf/hardware/adc/LightSensorP.nc create mode 100644 tos/platforms/surf/hardware/adc/PlatformAdcC.nc create mode 100644 tos/platforms/surf/hardware/adc/VoltageC.nc create mode 100644 tos/platforms/surf/hardware/adc/VoltageP.nc create mode 100644 tos/platforms/surf/hardware/buttons/ButtonBridge.nc create mode 100644 tos/platforms/surf/hardware/buttons/ButtonBridgeP.nc create mode 100644 tos/platforms/surf/hardware/buttons/ButtonP.nc create mode 100644 tos/platforms/surf/hardware/buttons/PlatformButtons.h create mode 100644 tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc create mode 100644 tos/platforms/surf/hardware/buttons/UserButton.h create mode 100644 tos/platforms/surf/hardware/buttons/UserButtonC.nc create mode 100644 tos/platforms/surf/hardware/clock/PlatformClockC.nc create mode 100644 tos/platforms/surf/hardware/clock/PlatformClockP.nc create mode 100644 tos/platforms/surf/hardware/flash/PlatformFlashC.nc create mode 100644 tos/platforms/surf/hardware/flash/PlatformFlashInitC.nc create mode 100644 tos/platforms/surf/hardware/flash/PlatformFlashInitP.nc create mode 100644 tos/platforms/surf/hardware/flash/PlatformFlashP.nc create mode 100644 tos/platforms/surf/hardware/flash/platformflash.h create mode 100644 tos/platforms/surf/hardware/leds/PlatformLed.h create mode 100644 tos/platforms/surf/hardware/leds/PlatformLedC.nc create mode 100644 tos/platforms/surf/hardware/leds/PlatformLedP.nc create mode 100644 tos/platforms/surf/hardware/onewire/PlatformOneWireC.nc create mode 100644 tos/platforms/surf/hardware/onewire/PlatformOneWireInitC.nc create mode 100644 tos/platforms/surf/hardware/onewire/PlatformOneWireInitP.nc create mode 100644 tos/platforms/surf/hardware/pins/PlatformPinsC.nc create mode 100644 tos/platforms/surf/hardware/pins/PlatformPinsP.nc create mode 100644 tos/platforms/surf/hardware/radio/RadioChannelC.nc create mode 100644 tos/platforms/surf/hardware/radio/RadioChannelP.nc create mode 100644 tos/platforms/surf/hardware/radio/RadioRssiC.nc create mode 100644 tos/platforms/surf/hardware/radio/RadioRssiP.nc create mode 100644 tos/platforms/surf/hardware/rtc/PlatformRealTimeClockC.nc create mode 100644 tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc create mode 100644 tos/platforms/surf/hardware/usci/PlatformSerialC.nc create mode 100644 tos/platforms/surf/hardware/usci/PlatformSerialP.nc create mode 100644 tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc create mode 100644 tos/platforms/surf/platform.h create mode 100644 tos/platforms/surf/platform_message.h create mode 100644 tos/platforms/surf/revisions.txt diff --git a/apps/tests/TestLed/BlinkLed/TestAppC.nc b/apps/tests/TestLed/BlinkLed/TestAppC.nc index 5bbfb520d8..a7731394e9 100644 --- a/apps/tests/TestLed/BlinkLed/TestAppC.nc +++ b/apps/tests/TestLed/BlinkLed/TestAppC.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @@ -36,16 +39,20 @@ * TESTS: Timer * * @author David Moss - * @author Peter A. Bigot */ + * @author Peter A. Bigot + */ + configuration TestAppC { -} implementation { +} + +implementation { components TestP, MainC, new TimerMilliC() as Timer1C, new TimerMilliC() as Timer2C, new TimerMilliC() as Timer3C, LedC; - + TestP.Boot -> MainC; TestP.Led1 -> LedC.Led0; TestP.Led2 -> LedC.Led1; @@ -53,5 +60,4 @@ configuration TestAppC { TestP.Timer1 -> Timer1C; TestP.Timer2 -> Timer2C; TestP.Timer3 -> Timer3C; - } diff --git a/apps/tests/TestLed/BlinkLed/TestP.nc b/apps/tests/TestLed/BlinkLed/TestP.nc index a3d43c2a5e..d4c1eab02c 100644 --- a/apps/tests/TestLed/BlinkLed/TestP.nc +++ b/apps/tests/TestLed/BlinkLed/TestP.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @@ -36,7 +39,9 @@ * TESTS: Timer * * @author David Moss - * @author Peter A. Bigot */ + * @author Peter A. Bigot + */ + module TestP { uses { interface Boot; @@ -47,7 +52,9 @@ module TestP { interface Led as Led2; interface Led as Led3; } -} implementation { +} + +implementation { event void Boot.booted() { call Led1.on(); @@ -55,11 +62,11 @@ module TestP { call Timer2.startPeriodic(512); call Timer3.startPeriodic(1024); } - + event void Timer1.fired() { call Led1.toggle(); } - + event void Timer2.fired() { call Led2.toggle(); } @@ -67,5 +74,4 @@ module TestP { event void Timer3.fired() { call Led3.toggle(); } - } diff --git a/apps/tests/TestLed/LedColor/TestAppC.nc b/apps/tests/TestLed/LedColor/TestAppC.nc index 8f2e618693..e5031b47ec 100644 --- a/apps/tests/TestLed/LedColor/TestAppC.nc +++ b/apps/tests/TestLed/LedColor/TestAppC.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** Colored LED test. @@ -38,19 +41,23 @@ * TESTS: MultiLed interface * TESTS: Led color interfaces * - * @author Peter A. Bigot */ + * @author Peter A. Bigot + */ configuration TestAppC { -} implementation { +} + +implementation { components TestP, MainC, new TimerMilliC() as TimerC, LedC; - + TestP.Boot -> MainC; TestP.Timer -> TimerC; // Get access to the definitions that enable specific colors */ + #include "PlatformLed.h" #if defined(PLATFORM_LED_GREEN) diff --git a/apps/tests/TestLed/LedColor/TestP.nc b/apps/tests/TestLed/LedColor/TestP.nc index d42659dce0..0f9ce83fa0 100644 --- a/apps/tests/TestLed/LedColor/TestP.nc +++ b/apps/tests/TestLed/LedColor/TestP.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** Colored LED test. @@ -67,7 +70,9 @@ module TestP { #endif // BLUE interface MultiLed; } -} implementation { +} + +implementation { enum { LC_Red, @@ -80,14 +85,14 @@ module TestP { }; enum { - TIMER_DELAY_BMS = 2048, + TIMER_DELAY_MIS = 2048, }; unsigned int color_index; - task void showColor_task () - { - int delay = TIMER_DELAY_BMS; + task void showColor_task () { + int delay = TIMER_DELAY_MIS; + call MultiLed.set(0); switch (color_index) { #if defined(PLATFORM_LED_RED) @@ -141,9 +146,8 @@ module TestP { color_index = 0; post showColor_task(); } - + event void Timer.fired() { post showColor_task(); } - } diff --git a/apps/tests/TestLed/MultiLed/TestAppC.nc b/apps/tests/TestLed/MultiLed/TestAppC.nc index 5f6433d820..2b9df3ebc8 100644 --- a/apps/tests/TestLed/MultiLed/TestAppC.nc +++ b/apps/tests/TestLed/MultiLed/TestAppC.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** Multiple-LED test. @@ -41,20 +44,23 @@ * TESTS: MultiLed interface * TESTS: Timer * - * @author Peter A. Bigot */ + * @author Peter A. Bigot + */ configuration TestAppC { -} implementation { +} + +implementation { components TestP, MainC, new TimerMilliC() as TimerC, LedC; - + TestP.Boot -> MainC; TestP.MultiLed -> LedC; TestP.Timer -> TimerC; - + components SerialPrintfC; } diff --git a/apps/tests/TestLed/MultiLed/TestP.nc b/apps/tests/TestLed/MultiLed/TestP.nc index 509254ef0f..4312f91d88 100644 --- a/apps/tests/TestLed/MultiLed/TestP.nc +++ b/apps/tests/TestLed/MultiLed/TestP.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** Multiple-LED test. @@ -51,13 +54,13 @@ module TestP { interface Timer as Timer; interface MultiLed; } -} implementation { +} +implementation { unsigned int last_set; unsigned int counter; - - task void showState_task () - { + + task void showState_task () { printf("count=%04x, led=%04x\r\n", last_set, call MultiLed.get()); } @@ -65,11 +68,10 @@ module TestP { counter = 0; call Timer.startPeriodic(512); } - + event void Timer.fired() { last_set = ++counter; call MultiLed.set(last_set); post showState_task(); } - } diff --git a/apps/tests/TestLed/MultiLedSingle/TestAppC.nc b/apps/tests/TestLed/MultiLedSingle/TestAppC.nc index c91d45a1d6..49bbdcf65d 100644 --- a/apps/tests/TestLed/MultiLedSingle/TestAppC.nc +++ b/apps/tests/TestLed/MultiLedSingle/TestAppC.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @@ -37,9 +40,13 @@ * TESTS: Timer * * @author David Moss - * @author Peter A. Bigot */ + * @author Peter A. Bigot + */ + configuration TestAppC { -} implementation { +} + +implementation { components TestP, MainC, @@ -49,7 +56,7 @@ configuration TestAppC { new TimerMilliC() as Timer4C, new TimerMilliC() as Timer5C, LedC; - + TestP.Boot -> MainC; TestP.MultiLed -> LedC; TestP.Timer1 -> Timer1C; @@ -57,5 +64,4 @@ configuration TestAppC { TestP.Timer3 -> Timer3C; TestP.Timer4 -> Timer4C; TestP.Timer5 -> Timer5C; - } diff --git a/apps/tests/TestLed/MultiLedSingle/TestP.nc b/apps/tests/TestLed/MultiLedSingle/TestP.nc index 42d18eb0b2..30de083e09 100644 --- a/apps/tests/TestLed/MultiLedSingle/TestP.nc +++ b/apps/tests/TestLed/MultiLedSingle/TestP.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @@ -37,7 +40,8 @@ * TESTS: Timer * * @author David Moss - * @author Peter A. Bigot */ + * @author Peter A. Bigot + */ module TestP { uses { @@ -49,7 +53,9 @@ module TestP { interface Timer as Timer5; interface MultiLed; } -} implementation { +} + +implementation { event void Boot.booted() { call Timer5.startPeriodic(4096); @@ -58,11 +64,11 @@ module TestP { call Timer2.startPeriodic(512); call Timer1.startPeriodic(256); } - + event void Timer1.fired() { call MultiLed.toggle(0); } - + event void Timer2.fired() { call MultiLed.toggle(1); } @@ -78,5 +84,4 @@ module TestP { event void Timer5.fired() { call MultiLed.toggle(4); } - } diff --git a/support/make/surf.target b/support/make/surf.target new file mode 100644 index 0000000000..a767c1d65f --- /dev/null +++ b/support/make/surf.target @@ -0,0 +1,23 @@ +# Target definition for the People Power Company Sensor Ultra Radio Frequency +# development board. + +# Unless otherwise specified, assume revision B2 of the SuRF board +SURF_REV ?= B2 +HAS_FLASH ?= 1 + +#IAR_MCU_GROUP = cc430x513x +#IAR_LINKER_XCL = lnkcc430F5137.xcl + +PLATFORM ?= surf +MSP_MCU = cc430x5137 +PFLAGS += -DSURF_REV_$(SURF_REV) +PFLAGS += -DPLATFORM_HAS_FLASH=$(HAS_FLASH) + +MSP_BSL ?= cc430-bsl +MSP_BSL_FLAGS += --surf + +$(call TOSMake_include_platform,msp) +$(call TOSMake_include_platform,surf) + +surf: $(BUILD_DEPS) + @: diff --git a/support/make/surf/dco.extra b/support/make/surf/dco.extra new file mode 100644 index 0000000000..6017991518 --- /dev/null +++ b/support/make/surf/dco.extra @@ -0,0 +1,22 @@ +ifeq ($(DCO),) +DCO=8 +endif +ifeq (2,$(DCO)) +SEL=2MHz_RSEL2 +endif +ifeq (4,$(DCO)) +SEL=4MHz_RSEL3 +endif +ifeq (8,$(DCO)) +SEL=8MHz_RSEL3 +endif +ifeq (16,$(DCO)) +SEL=16MHz_RSEL4 +endif +ifeq (32,$(DCO)) +SEL=32MHz_RSEL6 +endif +ifeq (64,$(DCO)) +SEL=64MHz_RSEL7 +endif +PFLAGS += -DMSP430XV2_DCO_CONFIG=MSP430XV2_DCO_$(SEL) diff --git a/tos/interfaces/MultiLed.nc b/tos/interfaces/MultiLed.nc index d10ebde18e..8260d2880e 100644 --- a/tos/interfaces/MultiLed.nc +++ b/tos/interfaces/MultiLed.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** An interface to control a series of LEDs. @@ -38,6 +41,7 @@ * * @author Peter A. Bigot */ + interface MultiLed { /** Read the value represented by the on status of the LEDs. */ diff --git a/tos/platforms/surf/.platform b/tos/platforms/surf/.platform new file mode 100644 index 0000000000..9eb470f286 --- /dev/null +++ b/tos/platforms/surf/.platform @@ -0,0 +1,112 @@ +# Includes that should take precedence come first. Platforms come before +# chips because they may override files. These must be specified as +# @includes instead of -I's to @opts, otherwise the %T won't be processed +# by ncc. + +for (split(/\n/, <<'EOText' + + %P/hardware/pins + %P/hardware/buttons + %P/hardware/leds + %P/hardware/usci + %P/hardware/onewire + %P/hardware/flash + %P/hardware/radio + %P/hardware/adc + %P/hardware/clock + %P/hardware/rtc + + %P/compatibility/system + + %T/chips/msp430/x5xxx + %T/chips/msp430/x5xxx/lpm + %T/chips/msp430/x5xxx/timer + %T/chips/msp430/x5xxx/usci + +# %T/chips/msp430/msp430xv2 +# %T/chips/msp430/msp430xv2/lpm +# %T/chips/msp430/msp430xv2/timer +# %T/chips/msp430/usci + + %T/chips/msp430 + %T/chips/msp430/pins + %T/chips/msp430/timer + %T/chips/msp430/pmm + %T/chips/msp430/adc12 + %T/chips/msp430/sensors + +# %T/chips/memory +# %T/chips/memory/norflash + +# %T/chips/msp430/rf1a +# %T/chips/msp430/rf1a/interfaces +# %T/chips/msp430/rf1a/system +# %T/chips/msp430/rf1a/physical +# %T/chips/msp430/rf1a/am +# %T/chips/msp430/rf1a/ieee154 +# %T/chips/msp430/rf1a/layers + + %T/lib/timer + +# %T/lib/util/keyvaluerecord + + %T/lib/serial + %T/lib/serialprintf + +EOText +)) { + s/\#.*$//; + s/^\s*//g; + s/\s*$//g; + +# if ($_) { +# local $idx = 0; +# while (($idx = index $_, "%", $idx) >= 0) { +# $char = substr $_, $idx + 1, 1; +# $rep = "%$char"; +# $rep = $OSIAN_ROOT if $char eq "O"; +# substr($_, $idx, 2) = $rep; +# $idx += length $rep; +# } +# push(@includes, $_) if $_; +# } + push(@includes, $_) if $_; +} + +@opts = qw( + -gcc=msp430-gcc + -mmcu=cc430x5137 + -fnesc-target=msp430 + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask +); + + + +#push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; +#push @opts, "-mingw-gcc" if $cygwin; + +$ENV{'CIL_MACHINE'} = + "version_major=3 " . + "version_minor=2 " . + "version=msp430-3.2.3 " . + "short=2,2 " . + "int=2,2 " . + "long=4,2 " . + "long_long=8,2 " . + "pointer=2,2 " . + "enum=2,2 " . + "float=4,2 " . + "double=4,2 " . + "long_double=4,2 " . + "void=1,1 " . + "fun=1,2 " . + "wchar_size_size=2,2 " . + "alignof_string=1 " . + "max_alignment=1 " . + "char_wchar_signed=true,true " . + "const_string_literals=true " . + "big_endian=false " . + "underscore_name=false " . + "__builtin_va_list=true " . + "__thread_is_keyword=true"; + diff --git a/tos/platforms/surf/ActiveMessageC.nc b/tos/platforms/surf/ActiveMessageC.nc new file mode 100644 index 0000000000..40852c7744 --- /dev/null +++ b/tos/platforms/surf/ActiveMessageC.nc @@ -0,0 +1,79 @@ +// $Id: ActiveMessageC.nc,v 1.8 2009/09/16 00:51:51 razvanm Exp $ + +/* + * "Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2004-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/* + * + * Authors: Philip Levis + * Date last modified: $Id: ActiveMessageC.nc,v 1.8 2009/09/16 00:51:51 razvanm Exp $ + * + */ + +/** + * + * The Active Message layer on the Telos platform. This is a naming wrapper + * around the CC2420 Active Message layer. + * + * @author Philip Levis + * @version $Revision: 1.8 $ $Date: 2009/09/16 00:51:51 $ + */ + +configuration ActiveMessageC { + provides { + interface SplitControl; + + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; +// interface PacketTimeStamp as PacketTimeStamp32khz; +// interface PacketTimeStamp as PacketTimeStampMilli; +// interface LowPowerListening; + } +} +implementation { + components Rf1aActiveMessageC as AM; + + SplitControl = AM; + + AMSend = AM; + Receive = AM.Receive; + Snoop = AM.Snoop; + Packet = AM; + AMPacket = AM; + PacketAcknowledgements = AM; +// LowPowerListening = AM; + +// components Rf1aPacketC; +// PacketTimeStamp32khz = CC2420PacketC; +// PacketTimeStampMilli = CC2420PacketC; +} diff --git a/tos/platforms/surf/Ieee154MessageC.nc b/tos/platforms/surf/Ieee154MessageC.nc new file mode 100644 index 0000000000..96b2878c45 --- /dev/null +++ b/tos/platforms/surf/Ieee154MessageC.nc @@ -0,0 +1,77 @@ +/* Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +/** Generic network stack interface for Ieee154-based applications. + * + * @author Peter A. Bigot + */ +configuration Ieee154MessageC { + provides { + interface SplitControl; + + interface Ieee154Send; + interface Receive as Ieee154Receive; + + interface Packet; + interface Ieee154Packet; + + interface MessageLqi; + interface MessageRssi; + + interface PacketAcknowledgements; /* @TODO@ implement */ + interface LowPowerListening; + interface Resource; + } +} implementation { + components Rf1aIeee154MessageC as MsgC; + SplitControl = MsgC; + Ieee154Send = MsgC; + Ieee154Receive = MsgC; + Packet = MsgC; + Ieee154Packet = MsgC; + PacketAcknowledgements = MsgC; + LowPowerListening = MsgC; + Resource = MsgC; + + MessageLqi = MsgC; + MessageRssi = MsgC; + + components RadioRssiC; + RadioRssiC.Rf1aPhysical -> MsgC; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/platforms/surf/PlatformC.nc b/tos/platforms/surf/PlatformC.nc new file mode 100644 index 0000000000..27b266d5c9 --- /dev/null +++ b/tos/platforms/surf/PlatformC.nc @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/* "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * @author Joe Polastre + * @author Cory Sharp + * @author David Moss + */ + +#include "hardware.h" + +configuration PlatformC { + provides { + interface Init as PlatformInit; + } + + uses { + interface Init as PeripheralInit; + } +} + +implementation { + + components PlatformP; + PlatformInit = PlatformP; + PeripheralInit = PlatformP.PeripheralInit; + + /* The following components require no initialization: + * Button + * Rf1a + * RealTimeClock + * + * The following components require wiring initialization, but no + * code initialization: + * Usci */ + + components PlatformPinsC; + PlatformP.PlatformPins -> PlatformPinsC; + + components PlatformLedC; + PlatformP.PlatformLed -> PlatformLedC; + + components PlatformUsciInitC; + // No code initialization required; just connect the pins + + components Msp430PmmC; + PlatformP.Msp430Pmm -> Msp430PmmC; + + components PlatformClockC; + PlatformP.PlatformClock -> PlatformClockC; + + components PlatformOneWireInitC; + PlatformP.OneWire -> PlatformOneWireInitC; + +#if PLATFORM_HAS_FLASH + components PlatformFlashInitC; + PlatformP.PlatformFlash -> PlatformFlashInitC; +#endif // PLATFORM_HAS_FLASH + +} + diff --git a/tos/platforms/surf/PlatformP.nc b/tos/platforms/surf/PlatformP.nc new file mode 100644 index 0000000000..1670de12ac --- /dev/null +++ b/tos/platforms/surf/PlatformP.nc @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +module PlatformP { + provides { + interface Init; + } + + uses { + interface Init as PlatformPins; + interface Init as PlatformLed; + interface Init as Msp430Pmm; + interface Init as PlatformClock; + interface Init as OneWire; + +#if PLATFORM_HAS_FLASH + interface Init as PlatformFlash; +#endif // PLATFORM_HAS_FLASH + + interface Init as PeripheralInit; + } +} + +implementation { + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + command error_t Init.init() { + WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer + + call PlatformPins.init(); + call PlatformLed.init(); + call Msp430Pmm.init(); + call PlatformClock.init(); + call OneWire.init(); + +#if PLATFORM_HAS_FLASH + call PlatformFlash.init(); +#endif // PLATFORM_HAS_FLASH + + call PeripheralInit.init(); + + // Wait an arbitrary 10 milliseconds for the FLL to calibrate the DCO + // before letting the system continue on into a low power mode. + uwait(1024*10); + + return SUCCESS; + } + + /***************** Defaults ***************/ + default command error_t PeripheralInit.init() { + return SUCCESS; + } + +} + diff --git a/tos/platforms/surf/compatibility/system/LedsC.nc b/tos/platforms/surf/compatibility/system/LedsC.nc new file mode 100644 index 0000000000..d55ad3948a --- /dev/null +++ b/tos/platforms/surf/compatibility/system/LedsC.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2010 People Power Co. + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * + * The basic TinyOS LEDs abstraction. + * OSIAN compatibility layer: Remove init (handled elsewhere); use active-high. + * + * @author Phil Buonadonna + * @author David Gay + * @author Philip Levis + * @author Joe Polastre + * @author Peter A. Bigot + */ + +configuration LedsC { + provides interface Leds; +} implementation { + components PlatformLedC; + Leds = PlatformLedC; +} diff --git a/tos/platforms/surf/hardware.h b/tos/platforms/surf/hardware.h new file mode 100644 index 0000000000..61edc41593 --- /dev/null +++ b/tos/platforms/surf/hardware.h @@ -0,0 +1,80 @@ +/* Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + * @author Peter Bigot + * + */ + +#ifndef _H_hardware_h +#define _H_hardware_h + +#include "msp430hardware.h" + +// enum so components can override power saving, +// as per TEP 112. +enum { + TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, +}; + +/* Translate specific revision variant information into an indication + * of the generic revision. */ +#if defined(SURF_REV_B1) && ! defined(SURF_REV_B) +#define SURF_REV_B 1 +#endif /* SURF_REV_B1 */ +#if defined(SURF_REV_B2) && ! defined(SURF_REV_B) +#define SURF_REV_B 2 +#endif /* SURF_REV_B2 */ + +#if WITH_OSIAN + +#include "odi.h" +#include "odi_types.h" + +#ifndef OSIAN_DEVICE_SENSOR +#define OSIAN_DEVICE_SENSOR 1 +#endif /* OSIAN_DEVICE_SENSOR */ +#ifndef OSIAN_DEVICE_ACTUATOR +#define OSIAN_DEVICE_ACTUATOR 1 +#endif /* OSIAN_DEVICE_ACTUATOR */ +#ifndef OSIAN_DEVICE_CLASS +#define OSIAN_DEVICE_CLASS ODI_CLS_Communications +#endif /* OSIAN_DEVICE_CLASS */ +#ifndef OSIAN_DEVICE_TYPE +#define OSIAN_DEVICE_TYPE ODI_COMM_SuRF +#endif /* OSIAN_DEVICE_TYPE */ + +#endif /* WITH_OSIAN */ + +/* Use the PlatformAdcC component, and enable 6 pins */ +#define ADC12_USE_PLATFORM_ADC 1 +#define ADC12_PIN_AUTO_CONFIGURE 1 +#define ADC12_PINS_AVAILABLE 6 + +#endif // _H_hardware_h + diff --git a/tos/platforms/surf/hardware/adc/DemoSensorC.nc b/tos/platforms/surf/hardware/adc/DemoSensorC.nc new file mode 100644 index 0000000000..1f506cada6 --- /dev/null +++ b/tos/platforms/surf/hardware/adc/DemoSensorC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular Demo Sensor on the SuRF platform provides a + * photodiode reading, using LightSensorC. + * + * @author Gilman Tolle + * @author David Moss + */ + +generic configuration DemoSensorC() { + provides interface Read; +} + +implementation { + components new LightSensorC() as DemoSensor; + Read = DemoSensor; +} diff --git a/tos/platforms/surf/hardware/adc/DemoSensorNowC.nc b/tos/platforms/surf/hardware/adc/DemoSensorNowC.nc new file mode 100644 index 0000000000..a8785eda2d --- /dev/null +++ b/tos/platforms/surf/hardware/adc/DemoSensorNowC.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorNowC is a generic sensor device that provides a 16-bit + * value that can be read from async context. The platform author + * chooses which sensor actually sits behind DemoSensorNowC, and + * though it's probably Voltage, Light, or Temperature, there are no + * guarantees. + * + * This particular Demo Sensor on the SuRF platform provides a + * photodiode reading, using LightSensorC. + * + * @author Gilman Tolle + * @author David Moss + */ + +generic configuration DemoSensorNowC() { + provides interface Resource; + provides interface ReadNow; +} +implementation { + components new LightSensorC() as DemoSensorNow; + + Resource = DemoSensorNow; + ReadNow = DemoSensorNow; +} diff --git a/tos/platforms/surf/hardware/adc/DemoSensorStreamC.nc b/tos/platforms/surf/hardware/adc/DemoSensorStreamC.nc new file mode 100644 index 0000000000..5cda8076c6 --- /dev/null +++ b/tos/platforms/surf/hardware/adc/DemoSensorStreamC.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorStreamC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorStreamC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular Demo Sensor on the SuRF platform provides a + * photodiode reading, using LightSensorC. + * + * @author Gilman Tolle + * @author David Moss + */ + +generic configuration DemoSensorStreamC() { + provides interface ReadStream; +} +implementation { + components new LightSensorC() as DemoSensor; + ReadStream = DemoSensor; +} diff --git a/tos/platforms/surf/hardware/adc/LightSensorC.nc b/tos/platforms/surf/hardware/adc/LightSensorC.nc new file mode 100644 index 0000000000..6d243f177d --- /dev/null +++ b/tos/platforms/surf/hardware/adc/LightSensorC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +generic configuration LightSensorC() { + provides { + interface Resource; + interface Read; + interface ReadStream; + interface ReadNow; + } +} + +implementation { + components new AdcReadClientC(); + Read = AdcReadClientC; + + components new AdcReadStreamClientC(); + ReadStream = AdcReadStreamClientC; + + components new AdcReadNowClientC(); + Resource = AdcReadNowClientC; + ReadNow = AdcReadNowClientC; + + components LightSensorP; + AdcReadClientC.AdcConfigure -> LightSensorP; + AdcReadStreamClientC.AdcConfigure -> LightSensorP; + AdcReadNowClientC.AdcConfigure -> LightSensorP; +} diff --git a/tos/platforms/surf/hardware/adc/LightSensorP.nc b/tos/platforms/surf/hardware/adc/LightSensorP.nc new file mode 100644 index 0000000000..f5433dc408 --- /dev/null +++ b/tos/platforms/surf/hardware/adc/LightSensorP.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Msp430Adc12.h" + +module LightSensorP { + provides { + interface AdcConfigure; + } +} +implementation { + + const msp430adc12_channel_config_t config = { + inch: INPUT_CHANNEL_A5, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_1_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() { + return &config; + } +} diff --git a/tos/platforms/surf/hardware/adc/PlatformAdcC.nc b/tos/platforms/surf/hardware/adc/PlatformAdcC.nc new file mode 100644 index 0000000000..2065296dc0 --- /dev/null +++ b/tos/platforms/surf/hardware/adc/PlatformAdcC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +configuration PlatformAdcC { + provides { + interface HplMsp430GeneralIO as A0; + interface HplMsp430GeneralIO as A1; + interface HplMsp430GeneralIO as A2; + interface HplMsp430GeneralIO as A3; + interface HplMsp430GeneralIO as A4; + interface HplMsp430GeneralIO as A5; + + interface Msp430Timer as TimerA; + interface Msp430TimerControl as ControlA0; + interface Msp430TimerControl as ControlA1; + interface Msp430Compare as CompareA0; + interface Msp430Compare as CompareA1; + } +} + +implementation { + + components HplMsp430GeneralIOC; + A0 = HplMsp430GeneralIOC.Port20; + A1 = HplMsp430GeneralIOC.Port21; + A2 = HplMsp430GeneralIOC.Port22; + A3 = HplMsp430GeneralIOC.Port23; + A4 = HplMsp430GeneralIOC.Port24; + A5 = HplMsp430GeneralIOC.Port25; + + components Msp430TimerC; + TimerA = Msp430TimerC.Timer0_A; + ControlA0 = Msp430TimerC.Control0_A0; + ControlA1 = Msp430TimerC.Control0_A1; + CompareA0 = Msp430TimerC.Compare0_A0; + CompareA1 = Msp430TimerC.Compare0_A1; +} diff --git a/tos/platforms/surf/hardware/adc/VoltageC.nc b/tos/platforms/surf/hardware/adc/VoltageC.nc new file mode 100644 index 0000000000..d32098f1a7 --- /dev/null +++ b/tos/platforms/surf/hardware/adc/VoltageC.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * VoltageC is a common name for the Msp430InternalVoltageC voltage + * sensor available on the telosb platform. + * + * To convert from ADC counts to actual voltage, divide by 4096 and + * multiply by 3. + * + * @author Gilman Tolle + */ + +configuration VoltageC { + provides { + /** Return the voltage in millivolts */ + interface Read; + } +} + +implementation { + + components VoltageP; + Read = VoltageP; + + components new Msp430InternalVoltageC(); + VoltageP.SubRead -> Msp430InternalVoltageC.Read; +} diff --git a/tos/platforms/surf/hardware/adc/VoltageP.nc b/tos/platforms/surf/hardware/adc/VoltageP.nc new file mode 100644 index 0000000000..3cf6fec336 --- /dev/null +++ b/tos/platforms/surf/hardware/adc/VoltageP.nc @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +module VoltageP { + provides { + interface Read; + } + uses { + interface Read as SubRead; + } +} + +implementation { + + /** Warning: These locations are confirmed valid for only CC430Fxxx uC's */ + extern const uint16_t CAL_REF_20VREF_FACTOR asm("0x01a2a"); + extern const uint16_t CAL_ADC_GAIN_FACTOR asm("0x01a16"); + extern const uint16_t CAL_ADC_OFFSET asm("0x1a18"); + + /***************** Read Commands ****************/ + command error_t Read.read() { + /* + * Work around the TinyOS deprecated method of setting the reference voltage + * by enabling it manually. This is a temporary solution: a full + * solution will involve upgrading the ADC12 module in chips/msp430/adc12 + * + * Due to the broken architecture, this will not work when other components + * are also accessing the ADC12. You should not call Resource.request() + * before attempting to Read, because the system will lock up. + * + * The following line enables 2.0V operation. + */ + REFCTL0 |= REFMSTR + REFVSEL_1 + REFON; + return call SubRead.read(); + } + + /***************** SubRead Events ****************/ + event void SubRead.readDone( error_t result, uint16_t conversion ) { + REFCTL0 &= ~(REFON); + + // Calibrate the values for the 2.0V REF and ADC12 gain / offset: + // First correct for REF + MPY = (conversion * 2); + OP2 = CAL_REF_20VREF_FACTOR; + + // Now the result is stored in RESHI + MPY = (RESHI * 2); + OP2 = CAL_ADC_GAIN_FACTOR; + + // Now the calibrated ADC12 conversion is stored in (RESHI + CAL_ADC_OFFSET) + + /* + * Conversion is: (2.0[V] * val) / 2048 = voltage + * Return the value in millivolts, so multiply by 1000. + */ + signal Read.readDone(result, (2000 * (uint32_t) (RESHI + CAL_ADC_OFFSET)) / 2048); + } +} diff --git a/tos/platforms/surf/hardware/buttons/ButtonBridge.nc b/tos/platforms/surf/hardware/buttons/ButtonBridge.nc new file mode 100644 index 0000000000..16c2b86834 --- /dev/null +++ b/tos/platforms/surf/hardware/buttons/ButtonBridge.nc @@ -0,0 +1,60 @@ +/* Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + + +#include "UserButton.h" + +/** Interface used to bridge the async Button events with the + * non-async legacy Get/Notify interfaces. + * + * @author Peter A. Bigot + */ +interface ButtonBridge { + /** Set the initial state of the button upon its being enabled. + * This command is invoked by the ButtonP code whenever the button + * is enabled. + * @return the passed value of pressed */ + async command bool initializeState (bool pressed); + + /** Indicate a new button state. */ + async command void stateChange (bool is_pressed); + + /** Enable or disable the button. + * + * This event is signaled by the legacy Notify interface upon + * enabling and disabling the button, and serves as the callback + * mechanism to forward the operation to the underlying + * implementation in the truly legacy environment where the Button + * interface is unavailable. */ + async event void setEnabled (bool enabledp); +} diff --git a/tos/platforms/surf/hardware/buttons/ButtonBridgeP.nc b/tos/platforms/surf/hardware/buttons/ButtonBridgeP.nc new file mode 100644 index 0000000000..e9c2c40cde --- /dev/null +++ b/tos/platforms/surf/hardware/buttons/ButtonBridgeP.nc @@ -0,0 +1,172 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** Bridge the async/sync gap for legacy button notification. + * + * Though TinyOS has not previously provided a button interface + * supported by all platforms, the common flavor seems to be to define + * a UserButtonC component which provides a Get interface to read + * button state, and a Notify interface to enable buttons and detect + * changes in state. Unfortunately, both these interfaces are + * synchronous. + * + * The OSIAN Button interface is asynchronous, because this allows it + * to be used in development to simulate async events and to define + * the order of those events. Supporting the legacy interface + * requires a mechanism to convert those async events into non-async + * Get and Notify. + * + * This component supports that translation for up to eight buttons, + * by caching an abstraction of the async events and posting a task + * which re-generates them in synchronous context. Multiple async + * events may occur before the task fires. If a button changes state + * at least once, at least one synchronous event will be generated. + * If a button changes state multiple times, the events will be + * collapsed so either one (if the end result is a change in state) or + * two (if the end result is the same state) events are generated. + * + * @author Peter A. Bigot + */ + +module ButtonBridgeP { + provides { + interface Get[uint8_t button_id]; + interface Notify[uint8_t button_id]; + interface ButtonBridge[uint8_t button_id]; + } +} implementation { + + /** Indicate the state of enabled buttons on completion of the last + * state management task. When button i is enabled, bit i is set + * iff button i was in pressed state. The bit for disabled buttons + * is undefined. */ + uint8_t lastState_; + + /** Latched set of buttons that changed state since the last task + * execution. */ + uint8_t changedState_; + + /** Atomically tracks the state as indicated by the asynchronous + * button events. Bits not set in changedState_ must be zero. */ + uint8_t currentState_; + + task void signalState_task () + { + uint8_t changed_state; + uint8_t old_state; + uint8_t new_state; + uint8_t button_id = 0; + + atomic { + /* Cache the values based on which we'll do the notification, + * then update the last state to reflect the latest value. */ + changed_state = changedState_; + old_state = lastState_; + lastState_ = (lastState_ & (~ changedState_)) | currentState_; + new_state = lastState_; + currentState_ = changedState_ = 0; + } + /* Generate events for all buttons that changed state */ + while (changed_state) { + uint8_t bit = (1 << button_id); + bool was_pressed = !!(bit & old_state); + if (bit & changed_state) { + bool is_pressed = !!(bit & new_state); + if (was_pressed == is_pressed) { + signal Notify.notify[button_id](was_pressed ? BUTTON_RELEASED : BUTTON_PRESSED); + } + signal Notify.notify[button_id](is_pressed ? BUTTON_PRESSED : BUTTON_RELEASED); + changed_state ^= bit; + } + ++button_id; + } + } + + command button_state_t Get.get[uint8_t button_id] () + { + /* Consult our state cache rather than the current state so this + * is consistent with delivered notifications. */ + atomic return (lastState_ & (1 << button_id)) ? BUTTON_PRESSED : BUTTON_RELEASED; + } + + command error_t Notify.enable[uint8_t button_id] () + { + atomic { + /* NB: The ButtonP component will call back into this one to + * initialize the button's state. This allows the state to be + * correct even if the button was enabled through another + * interface. */ + signal ButtonBridge.setEnabled[button_id](TRUE); + } + return SUCCESS; + } + + command error_t Notify.disable[uint8_t button_id] () + { + atomic { + signal ButtonBridge.setEnabled[button_id](FALSE); + } + return SUCCESS; + } + + default event void Notify.notify[uint8_t button_id] (button_state_t val) { } + + async command bool ButtonBridge.initializeState[uint8_t button_id] (bool pressed) + { + uint8_t bit = (1 << button_id); + atomic { + if (pressed) { + lastState_ |= bit; + } else { + lastState_ &= ~bit; + } + } + return pressed; + } + + async command void ButtonBridge.stateChange[uint8_t button_id] (bool pressed) + { + uint8_t bit = (1 << button_id); + atomic { + changedState_ |= bit; + if (pressed) { + currentState_ |= bit; + } else { + currentState_ &= ~bit; + } + post signalState_task(); + } + } + + default async event void ButtonBridge.setEnabled[uint8_t button_id] (bool enabledp) { } + +} + diff --git a/tos/platforms/surf/hardware/buttons/ButtonP.nc b/tos/platforms/surf/hardware/buttons/ButtonP.nc new file mode 100644 index 0000000000..5e2e0e0636 --- /dev/null +++ b/tos/platforms/surf/hardware/buttons/ButtonP.nc @@ -0,0 +1,139 @@ +/* Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +/** Implemement the Button interface for the SuRF board. + * @author Peter A. Bigot + */ +generic module ButtonP (bool active_high, + uint8_t button_id) { +#if WITH_OSIAN + provides { + interface Button; + } +#endif // WITH_OSIAN + uses { + interface HplMsp430GeneralIO as ButtonPin; + interface GpioInterrupt as ButtonInterrupt; + interface ButtonBridge; + } +} implementation { + + /** Read the pin status, and return TRUE iff the status corresponds + * to a pressed button. Optionally configure the interrupts to + * detect a change from the current state. */ + bool checkAndConfigure_atomic (bool set_interrupt) + { + bool rv = !! call ButtonPin.get(); + if (set_interrupt) { + if (rv) { + call ButtonInterrupt.enableFallingEdge(); + } else { + call ButtonInterrupt.enableRisingEdge(); + } + } + return (!! active_high) == rv; + } + + /** Return TRUE iff the button is currently pressed */ + bool isPressed_ () { atomic return checkAndConfigure_atomic(FALSE); } + + /** Return TRUE iff the button is enabled */ + bool isEnabled_ () { atomic return call ButtonPin.isInput(); } + + /** Enable the button. + * @return TRUE iff the button is currently pressed */ + bool enable_ () + { + atomic { + call ButtonPin.makeInput(); + if (active_high) { + call ButtonPin.setResistor(MSP430_PORT_RESISTOR_PULLDOWN); + } else { + call ButtonPin.setResistor(MSP430_PORT_RESISTOR_PULLUP); + } + return call ButtonBridge.initializeState(checkAndConfigure_atomic(TRUE)); + } + } + + /** Disable the button. */ + void disable_ () + { + call ButtonInterrupt.disable(); + call ButtonPin.makeOutput(); + call ButtonPin.clr(); + } + + async event void ButtonInterrupt.fired () + { + bool is_pressed; + + /* Read the button state, and configure the interrupt to detect a + * change. */ + atomic { + is_pressed = checkAndConfigure_atomic(TRUE); + call ButtonBridge.stateChange(is_pressed); + } +#if WITH_OSIAN + /* Signal the appropriate event */ + if (is_pressed) { + signal Button.pressed(); + } else { + signal Button.released(); + } +#endif + } + + async event void ButtonBridge.setEnabled (bool enablep) + { + if (enablep) { + enable_(); + } else { + disable_(); + } + } + +#if WITH_OSIAN + async command bool Button.isPressed () { return isPressed_(); } + async command bool Button.isEnabled () { return isEnabled_(); } + async command bool Button.enable () { return enable_(); } + async command void Button.disable () { return disable_(); } + default async event void Button.pressed () { } + default async event void Button.released () { } +#endif // WITH_OSIAN +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/platforms/surf/hardware/buttons/PlatformButtons.h b/tos/platforms/surf/hardware/buttons/PlatformButtons.h new file mode 100644 index 0000000000..e2fd7195e4 --- /dev/null +++ b/tos/platforms/surf/hardware/buttons/PlatformButtons.h @@ -0,0 +1,46 @@ +/* Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef PLATFORMBUTTONS_H +#define PLATFORMBUTTONS_H + +/** + * Define the total number of buttons featured on this hardware platform + */ +#if defined(SURF_REV_B) +#define PLATFORM_BUTTON_COUNT 4 +#else +#define PLATFORM_BUTTON_COUNT 2 +#endif + +#endif /* PLATFORMBUTTONS_H */ diff --git a/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc b/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc new file mode 100644 index 0000000000..32f3eed0ff --- /dev/null +++ b/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + + +/** + * @author David Moss + */ + +#include "UserButton.h" +#include "PlatformButtons.h" + +configuration PlatformButtonsC { + provides { + interface Get[uint8_t button_id]; + interface Notify[uint8_t button_id]; +#if WITH_OSIAN + interface Button as Button0; + interface Button as Button1; +#if 2 < PLATFORM_BUTTON_COUNT + interface Button as Button2; +#if 3 < PLATFORM_BUTTON_COUNT + interface Button as Button3; +#endif // 3 < PLATFORM_BUTTON_COUNT +#endif // 2 < PLATFORM_BUTTON_COUNT +#endif // WITH_OSIAN + } +} implementation { + + components HplMsp430GeneralIOC as GeneralIoC; + components HplMsp430InterruptC as InterruptC; + + /* + * Define as many Buttons's as your platform has available + */ + + enum { + BUTTON_0 = 0, + BUTTON_1 = 1, +#if 2 < PLATFORM_BUTTON_COUNT + BUTTON_2 = 2, +#if 3 < PLATFORM_BUTTON_COUNT + BUTTON_3 = 3, +#endif // 3 < PLATFORM_BUTTON_COUNT +#endif // 2 < PLATFORM_BUTTON_COUNT + }; + + components ButtonBridgeP; + Get = ButtonBridgeP.Get; + Notify = ButtonBridgeP.Notify; + + components new ButtonP(FALSE, 0) as Button0C; + components new Msp430InterruptC() as Button0InterruptC; + Button0C.ButtonInterrupt -> Button0InterruptC; + ButtonBridgeP.ButtonBridge[0] <- Button0C; +#if WITH_OSIAN + Button0 = Button0C; +#endif // WITH_OSIAN + + components new ButtonP(FALSE, 1) as Button1C; + components new Msp430InterruptC() as Button1InterruptC; + Button1C.ButtonInterrupt -> Button1InterruptC; + ButtonBridgeP.ButtonBridge[1] <- Button1C; +#if WITH_OSIAN + Button1 = Button1C; +#endif // WITH_OSIAN + +#if 2 < PLATFORM_BUTTON_COUNT + components new ButtonP(FALSE, 2) as Button2C; + components new Msp430InterruptC() as Button2InterruptC; + Button2C.ButtonInterrupt -> Button2InterruptC; + ButtonBridgeP.ButtonBridge[2] <- Button2C; +#if WITH_OSIAN + Button2 = Button2C; +#endif // WITH_OSIAN + +#if 3 < PLATFORM_BUTTON_COUNT + components new ButtonP(FALSE, 3) as Button3C; + components new Msp430InterruptC() as Button3InterruptC; + Button3C.ButtonInterrupt -> Button3InterruptC; + ButtonBridgeP.ButtonBridge[3] <- Button3C; + +#if WITH_OSIAN + Button3 = Button3C; +#endif // WITH_OSIAN +#endif // 3 < PLATFORM_BUTTON_COUNT +#endif // 2 < PLATFORM_BUTTON_COUNT + +#if defined(SURF_REV_A) + Button0InterruptC.HplInterrupt -> InterruptC.Port20; + Button0C.ButtonPin -> GeneralIoC.Port20; + Button1InterruptC.HplInterrupt -> InterruptC.Port21; + Button1C.ButtonPin -> GeneralIoC.Port21; +#else // all other SuRF models + Button0InterruptC.HplInterrupt -> InterruptC.Port10; + Button0C.ButtonPin -> GeneralIoC.Port10; + Button1InterruptC.HplInterrupt -> InterruptC.Port11; + Button1C.ButtonPin -> GeneralIoC.Port11; +#if 2 < PLATFORM_BUTTON_COUNT + Button2InterruptC.HplInterrupt -> InterruptC.Port26; + Button2C.ButtonPin -> GeneralIoC.Port26; +#if 3 < PLATFORM_BUTTON_COUNT + Button3InterruptC.HplInterrupt -> InterruptC.Port27; + Button3C.ButtonPin -> GeneralIoC.Port27; +#endif // 3 < PLATFORM_BUTTON_COUNT +#endif // 2 < PLATFORM_BUTTON_COUNT +#endif // SURF_REV_x + +} + diff --git a/tos/platforms/surf/hardware/buttons/UserButton.h b/tos/platforms/surf/hardware/buttons/UserButton.h new file mode 100644 index 0000000000..9a6adebe3c --- /dev/null +++ b/tos/platforms/surf/hardware/buttons/UserButton.h @@ -0,0 +1,46 @@ +/** + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + * @version $Revision: 1.1 $ + */ + +#ifndef USERBUTTON_H +#define USERBUTTON_H + +#include "PlatformButtons.h" + +typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t; + +#endif diff --git a/tos/platforms/surf/hardware/buttons/UserButtonC.nc b/tos/platforms/surf/hardware/buttons/UserButtonC.nc new file mode 100644 index 0000000000..2ba97b1d8f --- /dev/null +++ b/tos/platforms/surf/hardware/buttons/UserButtonC.nc @@ -0,0 +1,55 @@ +/** + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Implementation of the user button for the telosb platform. Get + * returns the current state of the button by reading the pin, + * regardless of whether enable() or disable() has been called on the + * Interface. Notify.enable() and Notify.disable() modify the + * underlying interrupt state of the pin, and have the effect of + * enabling or disabling notifications that the button has changed + * state. + * + * @author Gilman Tolle + * @version $Revision: 1.1 $ + */ + +#include + +configuration UserButtonC { + provides interface Get; + provides interface Notify; +} +implementation { + components PlatformButtonsC; + Get = PlatformButtonsC.Get[0]; + Notify = PlatformButtonsC.Notify[0]; +} diff --git a/tos/platforms/surf/hardware/clock/PlatformClockC.nc b/tos/platforms/surf/hardware/clock/PlatformClockC.nc new file mode 100644 index 0000000000..ad3798eaa4 --- /dev/null +++ b/tos/platforms/surf/hardware/clock/PlatformClockC.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Top-level initialization of anything to do with the clock + * subsystem. + * + * @author Peter A. Bigot + */ + +configuration PlatformClockC { + provides interface Init; +} implementation { + components Msp430XV2ClockC; + components PlatformClockP; + PlatformClockP.SubInit -> Msp430XV2ClockC; + Init = PlatformClockP; +} diff --git a/tos/platforms/surf/hardware/clock/PlatformClockP.nc b/tos/platforms/surf/hardware/clock/PlatformClockP.nc new file mode 100644 index 0000000000..8710733f57 --- /dev/null +++ b/tos/platforms/surf/hardware/clock/PlatformClockP.nc @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Top-level initialization of anything to do with the clock + * subsystem. + * + * We mostly use the standard initialization in + * Msp430XV2ClockControlP, except that we may or may not have an + * external 32kHz crystal populated. + * + * If the PLATFORM_MSP430_HAS_XT1 preprocessor symbol is undefined, or is defined + * to a non-zero value, the XIN and XOUT pins are configured to their + * XT1 function. The code loops up to 625ms waiting for XT1 + * stability. If stability is not achieved, the XT1 functionality is + * disabled. Stabilization appears to take roughly 150ms, for the one + * sample point I have available. + * + * If the PLATFORM_MSP430_HAS_XT1 preprocessor symbol is defined to zero, the XT1 + * functionality is left disabled per power-up, and no start-up delay + * is incurred. + * + * @author Peter A. Bigot + */ + +module PlatformClockP { + provides interface Init; + uses interface Init as SubInit; +} implementation { + + default command error_t SubInit.init () { } + + command error_t Init.init () { + +#if defined(PLATFORM_MSP430_HAS_XT1) && (0 == PLATFORM_MSP430_HAS_XT1) + /* Specifically told that there is no crystal. Do nothing. */ + +#else /* PLATFORM_MSP430_HAS_XT1 */ + /* Either we don't know whether there's a crystal, or we've been + * told to expect one. Configure it and see whether a stable XT1 + * can be identified. If so, run with it; if not, restore the + * default configuration. + * + * If we were told there should be a crystal present, but it + * doesn't stabilize, this is probably an error, but can't do + * anything about it here. */ + + /* Enable XT1, permanently, with no additional capacitance. + * + * @note Both 5.0 and 5.1 must be cleared in P5DIR. + * + * @note If the default capacitance of XCAP_3 is retained, SMCLK + * measures 4 per-mil faster than it should. On the SuRF + * hardware, setting XCAP to zero appears to work. Other values + * may be necessary on other hardware. */ + + P5DIR &= ~(BIT0 | BIT1); + P5SEL |= (BIT0 | BIT1); + UCSCTL6 &= ~(XT1OFF | XCAP_3); + + /* Spin waiting for a stable signal. This loop runs somewhere + * between 10K and 20K times; if it gets to 65536 without success, + * assume the crystal's absent or broken. At the power-up DCO + * rate of 2MHz and no crystal, the loop takes 625ms to + * complete. + * + * @note The UCS module will fall back to REFOCLK if configured + * for LF-mode XT1 and XT1 is not stable. It does not, however, + * revert to XT1 upon stabilization: the UCS module documentation + * implies that OFIFG must be cleared for this to occur. + * Consequently, we have to wait for stabilization even if we + * "know" a crystal is present. */ + { + uint16_t ctr = 0; + do { + UCSCTL7 &= ~(XT1LFOFFG + DCOFFG); + SFRIFG1 &= ~OFIFG; + } while (++ctr && (SFRIFG1 & OFIFG)); + } + + /* If the XT1 signal is still not valid, disable it; otherwise, + * lower the power it uses. (XT1DRIVE setting suggested by TI + * example code.) */ + + if (UCSCTL7 & XT1LFOFFG) { + P5DIR |= (BIT0 | BIT1); + P5SEL &= ~(BIT0| BIT1); + UCSCTL6 |= XT1OFF; + } else { + /* TI example code suggests clearing XT1DRIVE to reduce power. + * Current measurement does not indicate any value in doing so, + * at least not in LPM4, but it doesn't seem to hurt either. */ + UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive + } + +#endif /* PLATFORM_MSP430_HAS_XT1 */ + + return call SubInit.init(); + } +} diff --git a/tos/platforms/surf/hardware/flash/PlatformFlashC.nc b/tos/platforms/surf/hardware/flash/PlatformFlashC.nc new file mode 100644 index 0000000000..bc80a316a8 --- /dev/null +++ b/tos/platforms/surf/hardware/flash/PlatformFlashC.nc @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + + +/** + * @author David Moss + */ +configuration PlatformFlashC { + provides { + interface Init as DriverInit; + + interface Resource; + interface SpiByte; + interface SpiPacket; + interface Msp430UsciError; + + interface GeneralIO as Csn; + } +} + +implementation { + + components new Msp430UsciSpiB0C() as SpiC; + Resource = SpiC; + SpiByte = SpiC; + SpiPacket = SpiC; + Msp430UsciError = SpiC; + + components PlatformFlashInitC; + + components new Msp430GpioC() as CsnC; + CsnC -> PlatformFlashInitC.CsnIO; + Csn = CsnC; + + components PlatformFlashP; + DriverInit = PlatformFlashP; + + components BusyWaitMicroC; + PlatformFlashP.BusyWait -> BusyWaitMicroC; + + components NorFlashMasterC; + PlatformFlashP.NorFlashCommands -> NorFlashMasterC; + PlatformFlashP.Resource -> NorFlashMasterC; + +} diff --git a/tos/platforms/surf/hardware/flash/PlatformFlashInitC.nc b/tos/platforms/surf/hardware/flash/PlatformFlashInitC.nc new file mode 100644 index 0000000000..2e15559253 --- /dev/null +++ b/tos/platforms/surf/hardware/flash/PlatformFlashInitC.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + + +/** + * @author David Moss + */ +configuration PlatformFlashInitC { + provides { + interface Init; + interface HplMsp430GeneralIO as CsnIO; + } +} + +implementation { + + components PlatformFlashInitP; + Init = PlatformFlashInitP; + +#if WITH_OSIAN + components PlatformFlashC; + PlatformFlashInitP.DriverInit -> PlatformFlashC; +#endif + + components HplMsp430GeneralIOC as GeneralIOC; + CsnIO = GeneralIOC.Port17; + PlatformFlashInitP.CsnIO -> GeneralIOC.Port17; +} diff --git a/tos/platforms/surf/hardware/flash/PlatformFlashInitP.nc b/tos/platforms/surf/hardware/flash/PlatformFlashInitP.nc new file mode 100644 index 0000000000..7f46de390f --- /dev/null +++ b/tos/platforms/surf/hardware/flash/PlatformFlashInitP.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * @author David Moss + */ +module PlatformFlashInitP { + provides { + interface Init; + } + + uses { + interface HplMsp430GeneralIO as CsnIO; +#if WITH_OSIAN + interface Init as DriverInit; +#endif + } +} + +implementation { + + command error_t Init.init() { + call CsnIO.set(); + call CsnIO.makeOutput(); +#if WITH_OSIAN + return call DriverInit.init(); +#else + return SUCCESS; +#endif + } +} diff --git a/tos/platforms/surf/hardware/flash/PlatformFlashP.nc b/tos/platforms/surf/hardware/flash/PlatformFlashP.nc new file mode 100644 index 0000000000..65ac8a95b5 --- /dev/null +++ b/tos/platforms/surf/hardware/flash/PlatformFlashP.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * @author David Moss + */ +module PlatformFlashP { + provides { + interface Init as DriverInit; + } + + uses { + interface NorFlashCommands; + interface Resource; + interface BusyWait; + } +} + +implementation { + + command error_t DriverInit.init() { + // The datasheet says the M25P10 flash chip takes ~10 ms to power up + call BusyWait.wait(10240U); + call Resource.immediateRequest(); + call NorFlashCommands.sleep(); + call Resource.release(); + + return SUCCESS; + } + + event void Resource.granted() { + } + +} diff --git a/tos/platforms/surf/hardware/flash/platformflash.h b/tos/platforms/surf/hardware/flash/platformflash.h new file mode 100644 index 0000000000..9da0d16684 --- /dev/null +++ b/tos/platforms/surf/hardware/flash/platformflash.h @@ -0,0 +1,48 @@ +/* Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef PLATFORMFLASH_H_ +#define PLATFORMFLASH_H_ + +#include "hardware.h" + +#if SURF_REV_A || SURF_REV_B1 +#include +#elif SURF_REV_B || SURF_REV_BLOCK_A +#include +#else +#error Unable to determine flash ship for SuRF revision +// #include +#endif + +#endif /* PLATFORMFLASH_H_ */ diff --git a/tos/platforms/surf/hardware/leds/PlatformLed.h b/tos/platforms/surf/hardware/leds/PlatformLed.h new file mode 100644 index 0000000000..b0eb3b20a5 --- /dev/null +++ b/tos/platforms/surf/hardware/leds/PlatformLed.h @@ -0,0 +1,42 @@ +#ifndef _OSIAN_PLATFORM_SURF_LED_H_ +#define _OSIAN_PLATFORM_SURF_LED_H_ + +/** Constant used in the generic LedC module to determine how many + * named Led interfaces should be published. The value should match + * the size of the table in PlatformLedsP, but we're not going to + * guess that table's public name. */ + +#if defined(SURF_REV_BLOCK_A) +#define PLATFORM_LED_COUNT 2 +#else +#define PLATFORM_LED_COUNT 5 +#endif + +#if defined(SURF_REV_A) +#define PLATFORM_LED_BLUE 0 +#define PLATFORM_LED_WHITE 1 +#define PLATFORM_LED_RED 2 +#define PLATFORM_LED_YELLOW 3 +#define PLATFORM_LED_GREEN 4 + +#elif defined(SURF_REV_B) +#define PLATFORM_LED_GREEN 0 +#define PLATFORM_LED_RED 1 +#if 1 == SURF_REV_B +#define PLATFORM_LED_WHITE 2 +#define PLATFORM_LED_ORANGE 3 +#else +#define PLATFORM_LED_ORANGE 2 +#define PLATFORM_LED_WHITE 3 +#endif +#define PLATFORM_LED_BLUE 4 + +#elif defined(SURF_REV_BLOCK_A) +#define PLATFORM_LED_GREEN 0 +#define PLATFORM_LED_RED 1 + +#else +#warning Unrecognized SuRF revision: cannot determine LED colors +#endif // SURF_REV_x + +#endif // _OSIAN_PLATFORM_SURF_LED_H_ diff --git a/tos/platforms/surf/hardware/leds/PlatformLedC.nc b/tos/platforms/surf/hardware/leds/PlatformLedC.nc new file mode 100644 index 0000000000..a6983f3b8c --- /dev/null +++ b/tos/platforms/surf/hardware/leds/PlatformLedC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* SuRF LED configuration. + * + * @note Traditionally, the PlatformLedsC component has exported named + * GeneralIO interfaces. We don't do that anymore; see PlatformLedsP + * for the rationale. + * + * @author Peter A. Bigot + */ + +configuration PlatformLedC { + provides { + interface Init; + interface Leds; + interface MultiLed; + interface Led[uint8_t led_id]; + } +} + +implementation { + components PlatformLedP; + Init = PlatformLedP.Init; + Leds = PlatformLedP; + Led = PlatformLedP; + MultiLed = PlatformLedP; +} diff --git a/tos/platforms/surf/hardware/leds/PlatformLedP.nc b/tos/platforms/surf/hardware/leds/PlatformLedP.nc new file mode 100644 index 0000000000..536551bae2 --- /dev/null +++ b/tos/platforms/surf/hardware/leds/PlatformLedP.nc @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implement the LED-relevant interfaces for the SuRF platform. + * + * Traditionally, the PlatformLedsC component has exported named + * GeneralIO interfaces, which are subsequently used in a LedsP + * implementation to support the Leds interface. Whether an LED is + * active-high or active-low is platform specific, and therefore + * should not be delegated to a supposedly platform-dependent + * component. + * + * We need to implement the LED functionality here. But we're in the + * platform-specific file, so we know we're using an MSP430. There's + * no point in trying to use generic GeneralIO interfaces to interact + * with the registers. Eliminating them, while using a table to + * identify LED positions, drops the code size by about 64 bytes and + * makes the interface cleaner. + * + * @author Peter A. Bigot + */ + +module PlatformLedP { + provides { + interface Init; + interface Leds; + interface Led[uint8_t led_id]; + interface MultiLed; + } +} implementation { + +#include "PlatformLed.h" + + /** + * Layout of the relevant portions of an MSP430XV2 digital IO port + * bank. + */ + typedef struct port_t { + uint16_t pxin; /* 0x00: Input */ + uint16_t pxout; /* 0x02: Output */ + uint16_t pxdir; /* 0x04: Direction */ + uint16_t pxren; /* 0x06: Resistor Enable */ + uint16_t pxds; /* 0x08: Drive Strength */ + uint16_t pxsel; /* 0x0A: Port Select */ + } port_t; + + /** Required information to specify a digital pin that controls an LED */ + typedef struct led_t { + volatile port_t* port; + uint16_t bit; + } led_t; + + /* + * @TODO@ When msp430-libc is corrected, reference PAIN and PBIN, to + * make it more clear that we're operating on the 16-bit interface + * to the ports. + */ + + const static led_t leds[] = { +#if defined(SURF_REV_BLOCK_A) + { (port_t*)P3IN_, 1 << 1 }, // Green + { (port_t*)P3IN_, 1 << 2 }, // Red + +#elif defined(SURF_REV_A) + { (port_t*)P1IN_, 1 << 0 }, // Blue + { (port_t*)P1IN_, 1 << 1 }, // White + { (port_t*)P1IN_, 1 << 2 }, // Red + { (port_t*)P3IN_, 1 << 6 }, // Yellow + { (port_t*)P3IN_, 1 << 7 }, // Green +#else + { (port_t*)P3IN_, 1 << 0 }, // Green + { (port_t*)P3IN_, 1 << 1 }, // Red + { (port_t*)P3IN_, 1 << 2 }, // White + { (port_t*)P3IN_, 1 << 3 }, // Orange + { (port_t*)P3IN_, 1 << 4 }, // Blue +#endif /* SURF_REV_BLOCK_A */ + }; + + static const int nleds = sizeof(leds) / sizeof(*leds); + + command error_t Init.init() { + atomic { + int li; + + for (li = 0; li < nleds; ++li) { + const led_t* lp = leds + li; + lp->port->pxout &= ~lp->bit; + lp->port->pxdir |= lp->bit; + } + } + return SUCCESS; + } + + void _LEDon (uint8_t led_id) { + if(led_id < nleds) { + const led_t* lp = leds + led_id; + atomic lp->port->pxout |= lp->bit; + } + } + + void _LEDoff (uint8_t led_id) { + if(led_id < nleds) { + const led_t* lp = leds + led_id; + atomic lp->port->pxout &= ~lp->bit; + } + } + + void _LEDtoggle (uint8_t led_id) { + if (led_id < nleds) { + const led_t* lp = leds + led_id; + atomic lp->port->pxout ^= lp->bit; + } + } + + unsigned int _LEDread () { + unsigned int val = 0; + int li; + + for (li = 0; li < nleds; ++li) { + const led_t* lp = leds + li; + val |= (!! (lp->port->pxout & lp->bit)) << li; + } + return val; + } + + void _LEDwrite (unsigned int value) { + int li; + + for (li = 0; li < nleds; ++li) { + if (value & (1 << li)) { + _LEDon(li); + } else { + _LEDoff(li); + } + } + } + + /* + * I don't think we'd save much space by not implementing the legacy + * interface always, so rather than complicate compilation let's + * always support it. + */ + async command void Leds.led0Off () { _LEDoff(0); } + async command void Leds.led0On () { _LEDon(0); } + async command void Leds.led0Toggle () { _LEDtoggle(0); } + async command void Leds.led1Off () { _LEDoff(1); } + async command void Leds.led1On () { _LEDon(1); } + async command void Leds.led1Toggle () { _LEDtoggle(1); } + async command void Leds.led2Off () { _LEDoff(2); } + async command void Leds.led2On () { _LEDon(2); } + async command void Leds.led2Toggle () { _LEDtoggle(2); } + async command uint8_t Leds.get () { return _LEDread(); } + async command void Leds.set (uint8_t v) { _LEDwrite(v); } + + async command unsigned int MultiLed.get () { return _LEDread(); } + async command void MultiLed.set (unsigned int value) { _LEDwrite(value); } + async command void MultiLed.on (unsigned int led_id) { _LEDon(led_id); } + async command void MultiLed.off (unsigned int led_id) { _LEDoff(led_id); } + + async command void MultiLed.setSingle (unsigned int led_id, bool on) { + if (on) { _LEDon(led_id); } + else { _LEDoff(led_id); } + } + + async command void MultiLed.toggle (unsigned int led_id) { _LEDtoggle(led_id); } + async command void Led.on[uint8_t led_id] () { call MultiLed.on(led_id); } + async command void Led.off[uint8_t led_id] () { call MultiLed.off(led_id); } + async command void Led.set[uint8_t led_id] (bool on) { call MultiLed.setSingle(led_id, on); } + async command void Led.toggle[uint8_t led_id] () { call MultiLed.toggle(led_id); } +} diff --git a/tos/platforms/surf/hardware/onewire/PlatformOneWireC.nc b/tos/platforms/surf/hardware/onewire/PlatformOneWireC.nc new file mode 100644 index 0000000000..093544f530 --- /dev/null +++ b/tos/platforms/surf/hardware/onewire/PlatformOneWireC.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Platform hardware presentation layer for the DS24xx one-wire chip + * @author David Moss + */ + +configuration PlatformOneWireC { + provides { + interface OneWire as PrimaryOneWire; + interface Read as TemperatureCC; + } +} + +implementation { + components PlatformOneWireInitC; + + /* SuRF boards use a DS1825 as the primary one-wire device. This + * happens to also provide the ambient temperature. */ + + components new OneWireMasterC() as Ds1825MasterC; + components new Msp430GpioC() as Ds1825PinC; + Ds1825MasterC.Pin -> Ds1825PinC; + Ds1825PinC -> PlatformOneWireInitC.Ds1825IO; + + components new Ds1825OneWireImplementationC() as Ds1825ImplC; + PrimaryOneWire = Ds1825ImplC; + TemperatureCC = Ds1825ImplC; + Ds1825ImplC.OneWireMaster -> Ds1825MasterC; + +} diff --git a/tos/platforms/surf/hardware/onewire/PlatformOneWireInitC.nc b/tos/platforms/surf/hardware/onewire/PlatformOneWireInitC.nc new file mode 100644 index 0000000000..d87afe1ba4 --- /dev/null +++ b/tos/platforms/surf/hardware/onewire/PlatformOneWireInitC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Platform hardware presentation layer for the DS1825 one-wire chip + * @author David Moss + */ + +configuration PlatformOneWireInitC { + provides { + interface Init; + interface HplMsp430GeneralIO as Ds1825IO; + } +} implementation { + + components PlatformOneWireInitP; + Init = PlatformOneWireInitP; + + components HplMsp430GeneralIOC as GeneralIOC; +#if defined(SURF_REV_A) + Ds1825IO = GeneralIOC.Port35; + PlatformOneWireInitP.Ds1825IO -> GeneralIOC.Port35; +#else + Ds1825IO = GeneralIOC.Port37; + PlatformOneWireInitP.Ds1825IO -> GeneralIOC.Port37; +#endif + +} diff --git a/tos/platforms/surf/hardware/onewire/PlatformOneWireInitP.nc b/tos/platforms/surf/hardware/onewire/PlatformOneWireInitP.nc new file mode 100644 index 0000000000..b540c3ac59 --- /dev/null +++ b/tos/platforms/surf/hardware/onewire/PlatformOneWireInitP.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +module PlatformOneWireInitP { + provides { + interface Init; + } + + uses { + interface HplMsp430GeneralIO as Ds1825IO; + } +} + +implementation { + + command error_t Init.init() { + call Ds1825IO.setResistor(MSP430_PORT_RESISTOR_OFF); + call Ds1825IO.makeInput(); + return SUCCESS; + } + +} diff --git a/tos/platforms/surf/hardware/pins/PlatformPinsC.nc b/tos/platforms/surf/hardware/pins/PlatformPinsC.nc new file mode 100644 index 0000000000..9868376d92 --- /dev/null +++ b/tos/platforms/surf/hardware/pins/PlatformPinsC.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * @author David Moss + * @author Peter A. Bigot + */ +configuration PlatformPinsC { + provides { + interface Init; + } +} + +implementation { + components PlatformPinsP; + Init = PlatformPinsP; +} diff --git a/tos/platforms/surf/hardware/pins/PlatformPinsP.nc b/tos/platforms/surf/hardware/pins/PlatformPinsP.nc new file mode 100644 index 0000000000..fad7c15242 --- /dev/null +++ b/tos/platforms/surf/hardware/pins/PlatformPinsP.nc @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformPinsP { + provides { + interface Init; + } +} + +implementation { + + command error_t Init.init() { + atomic { + +#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) + P1DIR = 0xFF; + P1OUT = 0x0; +#endif + +#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) + P2DIR = 0xFF; + P2OUT = 0x0; +#endif + +#if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) + P3DIR = 0xFF; + P3OUT = 0x0; +#endif + +#if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__) + P4DIR = 0xFF; + P4OUT = 0x0; +#endif + +#if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) + P5DIR = 0xFF; + P5OUT = 0x0; +#endif + +#if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__) + P6DIR = 0xFF; + P6OUT = 0x0; +#endif + +#if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) + P7DIR = 0xFF; + P7OUT = 0x0; +#endif + +#if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) + P8DIR = 0xFF; + P8OUT = 0x0; +#endif + +#if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) + P9DIR = 0xFF; + P9OUT = 0x0; +#endif + +#if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) + P10DIR = 0xFF; + P10OUT = 0x0; +#endif + +#if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) + P11DIR = 0xFF; + P11OUT = 0x0; +#endif + +#if defined(__msp430_have_portJ) || defined(__MSP430_HAS_PORTJ__) || defined(__MSP430_HAS_PORTJ_R__) + PJDIR = 0xFF; + PJOUT = 0x0; +#endif + +#if 0 /* Disabled: these specific setting sare defaults, but others might not be */ + PMAPPWD = PMAPPW; // Get write-access to port mapping regs + P1MAP5 = PM_UCA0RXD; // Map UCA0RXD output to P1.5 + P1MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6 + PMAPPWD = 0; // Lock port mapping registers +#endif // + + } + return SUCCESS; + + } + +} diff --git a/tos/platforms/surf/hardware/radio/RadioChannelC.nc b/tos/platforms/surf/hardware/radio/RadioChannelC.nc new file mode 100644 index 0000000000..c493acc289 --- /dev/null +++ b/tos/platforms/surf/hardware/radio/RadioChannelC.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + + +/** + * Abstraction layer for setting and getting the radio channel + * @author David Moss + */ +configuration RadioChannelC { + provides { + interface Channel; + } +} + +implementation { + + components RadioChannelP; + Channel = RadioChannelP; + + components Rf1aIeee154MessageC as MsgC; + RadioChannelP.Rf1aPhysical -> MsgC; + +} diff --git a/tos/platforms/surf/hardware/radio/RadioChannelP.nc b/tos/platforms/surf/hardware/radio/RadioChannelP.nc new file mode 100644 index 0000000000..b26bd2b70b --- /dev/null +++ b/tos/platforms/surf/hardware/radio/RadioChannelP.nc @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +module RadioChannelP { + provides { + interface Channel; + } + + uses { + interface Rf1aPhysical; + } +} + +implementation { + + /***************** Channel Commands ****************/ + command uint8_t Channel.getMinimumChannel() { + return RF1A_CHANNEL_MIN; + } + + command uint8_t Channel.getMaximumChannel() { + return RF1A_CHANNEL_MAX; + } + + command uint8_t Channel.getTotalChannels() { + return RF1A_CHANNEL_MAX - RF1A_CHANNEL_MIN + 1; + } + + command void Channel.setChannel(uint8_t channel) { + call Rf1aPhysical.setChannel(channel); + } + + command uint8_t Channel.getChannel() { + return call Rf1aPhysical.getChannel(); + } + + async event void Rf1aPhysical.sendDone (int result) { } + async event void Rf1aPhysical.receiveStarted (unsigned int length) { } + async event void Rf1aPhysical.receiveDone (uint8_t* buffer, + unsigned int count, + int result) { } + async event void Rf1aPhysical.receiveBufferFilled (uint8_t* buffer, + unsigned int count) { } + async event void Rf1aPhysical.frameStarted () { } + async event void Rf1aPhysical.clearChannel () { } + async event void Rf1aPhysical.carrierSense () { } + async event void Rf1aPhysical.released () { } + + + +} + diff --git a/tos/platforms/surf/hardware/radio/RadioRssiC.nc b/tos/platforms/surf/hardware/radio/RadioRssiC.nc new file mode 100644 index 0000000000..edd1cc08bc --- /dev/null +++ b/tos/platforms/surf/hardware/radio/RadioRssiC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + + + +/** + * Abstraction layer for getting the RSSI and producing a random number + * based on the Radio's RSSI + * @author David Moss + */ +configuration RadioRssiC { + provides { + interface Get; + interface Random; + } + uses { + interface Rf1aPhysical; + } +} + +implementation { + + components RadioRssiP; + Rf1aPhysical = RadioRssiP; + Get = RadioRssiP; + + components RandomC; + Random = RandomC; + +} diff --git a/tos/platforms/surf/hardware/radio/RadioRssiP.nc b/tos/platforms/surf/hardware/radio/RadioRssiP.nc new file mode 100644 index 0000000000..0461067b2c --- /dev/null +++ b/tos/platforms/surf/hardware/radio/RadioRssiP.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +module RadioRssiP { + provides interface Get; + uses interface Rf1aPhysical; +} implementation { + command int8_t Get.get () + { + int rssi = call Rf1aPhysical.rssi_dBm(); + if (rssi < -128) { + rssi = -128; + } + return rssi; + } + + async event void Rf1aPhysical.sendDone (int result) { } + async event void Rf1aPhysical.receiveStarted (unsigned int length) { } + async event void Rf1aPhysical.receiveDone (uint8_t* buffer, + unsigned int count, + int result) { } + async event void Rf1aPhysical.receiveBufferFilled (uint8_t* buffer, + unsigned int count) { } + async event void Rf1aPhysical.frameStarted () { } + async event void Rf1aPhysical.clearChannel () { } + async event void Rf1aPhysical.carrierSense () { } + async event void Rf1aPhysical.released () { } + +} + diff --git a/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockC.nc b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockC.nc new file mode 100644 index 0000000000..7851103ce3 --- /dev/null +++ b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockC.nc @@ -0,0 +1,56 @@ +/* Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +/** Provide the RealTimeClock interface, but only when building under + * OSIAN since the interface is not in TinyOS proper. Otherwise, + * provide it, but the StdControl functions always fail. + * + * Note that this component does not require boot-time initialization, + * so is not linked to PlatformC. + * + * @author Peter A. Bigot + */ +configuration PlatformRealTimeClockC { + provides { + interface StdControl; +#if WITH_OSIAN + interface RealTimeClock; +#endif /* WITH_OSIAN */ + } +} implementation { + components PlatformRealTimeClockP; + StdControl = PlatformRealTimeClockP; +#if WITH_OSIAN + RealTimeClock = PlatformRealTimeClockP; +#endif /* WITH_OSIAN */ +} diff --git a/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc new file mode 100644 index 0000000000..741560a3a3 --- /dev/null +++ b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc @@ -0,0 +1,276 @@ +/* Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#include "RealTimeClock.h" + +module PlatformRealTimeClockP { + provides { + interface StdControl; +#if WITH_OSIAN + interface RealTimeClock; +#endif /* WITH_OSIAN */ + } +} implementation { + +#if WITH_OSIAN + +/* TI renamed RTC_A_VECTOR to RTC_VECTOR in more recent header + * releases. Use the former if we don't have the latter. */ +#ifndef RTC_VECTOR +#define RTC_VECTOR RTC_A_VECTOR +#endif /* RTC_VECTOR */ + +/* Alarm Enable bit for alarm registers */ +#ifndef RTC_AE +#define RTC_AE 0x80 +#endif /* RTC_AE */ + + /** User-requested event codes */ + unsigned int eventSet__; + + command error_t StdControl.start () { + atomic { + /* Remove hold, calendar mode, binary values, source ACLK */ + RTCCTL01 = RTCMODE; + /* Clear the event mask */ + eventSet__ = 0; + } + return SUCCESS; + } + command error_t StdControl.stop () + { + atomic { + RTCCTL01 |= RTCHOLD; + } + return SUCCESS; + } + + command error_t RealTimeClock.setTime (const struct tm* time) + { + if (! time) { + return EINVAL; + } + atomic { + if (RTCHOLD & RTCCTL01) { + return EOFF; + } + RTCCTL01 |= RTCHOLD; + RTCSEC = time->tm_sec; + RTCMIN = time->tm_min; + RTCHOUR = time->tm_hour; + RTCDOW = time->tm_wday; + RTCDAY = time->tm_mday; + RTCMON = 1 + time->tm_mon; + RTCYEAR = 1900 + time->tm_year; + RTCCTL01 &= ~RTCHOLD; + } + return SUCCESS; + } + + command error_t RealTimeClock.requestTime (unsigned int event_set) + { + atomic { + if (RTCCTL01 & RTCHOLD) { + return EOFF; + } + eventSet__ |= event_set; + RTCCTL01 |= RTCRDYIE; + return SUCCESS; + } + } + command error_t RealTimeClock.setIntervalMode (RtcIntervalMode_e interval_mode) + { + error_t rv = SUCCESS; + + atomic { + /* Start by disabling any interval-related interrupt */ + RTCCTL01 &= ~(RTCTEVIE | RTCTEVIFG); + if (RTC_INTERVAL_MODE_NONE == interval_mode) { + /* Leave everything disabled */ + ; + } else { + uint16_t rtctev = 0; + + /* Turn on the selected event, or return an error if the + * argument was bogus */ + switch (interval_mode) { + case RTC_INTERVAL_MODE_MIN: + rtctev = RTCTEV__MIN; + break; + case RTC_INTERVAL_MODE_HOUR: + rtctev = RTCTEV__HOUR; + break; + case RTC_INTERVAL_MODE_1200: + rtctev = RTCTEV__1200; + break; + case RTC_INTERVAL_MODE_0000: + rtctev = RTCTEV__0000; + break; + default: + rv = EINVAL; + break; + } + if (SUCCESS == rv) { + RTCCTL01 = (RTCCTL01 & ~(RTCTEV0 | RTCTEV1)) | RTCTEVIE | rtctev; + } + } + } + return rv; + } + + command RtcIntervalMode_e RealTimeClock.getIntervalMode () + { + atomic { + if (! (RTCTEVIE & RTCCTL01)) { + return RTC_INTERVAL_MODE_NONE; + } + switch (RTCCTL01 & (RTCTEV0 | RTCTEV1)) { + case RTCTEV__MIN: + return RTC_INTERVAL_MODE_MIN; + case RTCTEV__HOUR: + return RTC_INTERVAL_MODE_HOUR; + case RTCTEV__1200: + return RTC_INTERVAL_MODE_1200; + case RTCTEV__0000: + return RTC_INTERVAL_MODE_0000; + } + } + /*NOTREACHED*/ + return RTC_INTERVAL_MODE_NONE; + } + command error_t RealTimeClock.setAlarm (const struct tm* time, + unsigned int field_set) + { + atomic { + /* Start by disabling the alarm */ + RTCCTL0 &= ~(RTCAIE | RTCAIFG); + if (time) { + RTCAMIN = time->tm_min; + RTCAHOUR = time->tm_hour; + RTCADOW = time->tm_wday; + RTCADAY = time->tm_mday; + } else { + RTCAMIN = RTCAHOUR = RTCADOW = RTCADAY = 0; + } + if (field_set & RTC_ALARM_MINUTE) { + RTCAMIN |= RTC_AE; + } + if (field_set & RTC_ALARM_HOUR) { + RTCAHOUR |= RTC_AE; + } + if (field_set & RTC_ALARM_DOW) { + RTCADOW |= RTC_AE; + } + if (field_set & RTC_ALARM_DOM) { + RTCADAY |= RTC_AE; + } + if (field_set) { + RTCCTL0 |= RTCAIE; + } + } + return SUCCESS; + } + + command unsigned int RealTimeClock.getAlarm (struct tm* time) { return 0; } + + default async event void RealTimeClock.currentTime (const struct tm* timep, + unsigned int reason_set) { } + + TOSH_SIGNAL(RTC_VECTOR) { + struct tm now; + int time_is_valid; + volatile uint16_t rtciv; + + /* The only reason we should ever get an interrupt is that + * something happened for which we want the time. In some cases, + * RTCRDY may be reset at the time the event is signalled. For + * example, this happens with RTCAIFG. Similarly, any use of a + * prescale-based interval event is not synchronized with RTC + * register updates. + * + * What we do is set RTCRDYIE, then sample RTCRDY. If it's good, + * we proceed with the read, then resample it again at the end. + * If it's still good, the time is valid, and we clear RTCRDYIE, + * do whatever else we need to do, and signal the user. + * + * If we didn't read a valid time, we just accumulate the reasons, + * and leave RTCRDYIE enabled so we get another interrupt as soon + * as the time is valid. */ + RTCCTL01 |= RTCRDYIE; + memset(&now, 0, sizeof(now)); + time_is_valid = RTCRDY & RTCCTL01; + if (time_is_valid) { + now.tm_sec = RTCSEC; + now.tm_min = RTCMIN; + now.tm_hour = RTCHOUR; + now.tm_wday = RTCDOW; + now.tm_mday = RTCDAY; + now.tm_mon = RTCMON - 1; + now.tm_year = RTCYEAR - 1900; + time_is_valid = RTCRDY & RTCCTL01; + } + if (time_is_valid) { + RTCCTL01 &= ~(RTCRDYIE | RTCRDYIFG); + } + + do { + rtciv = RTCIV; + switch (rtciv) { + case RTC_RTCRDYIFG: /* RTC ready: RTCRDYIFG */ + eventSet__ |= RTC_REASON_NONE; + break; + case RTC_RTCTEVIFG: /* RTC interval timer: RTCTEVIFG */ + case RTC_RT1PSIFG: /* RTC prescaler 1: RT1PSIFG */ + eventSet__ |= RTC_REASON_INTERVAL; + break; + case RTC_RTCAIFG: /* RTC user alarm: RTCAIFG */ + eventSet__ |= RTC_REASON_ALARM; + break; + default: + case RTC_NONE: /* No Interrupt pending */ + case RTC_RT0PSIFG: /* RTC prescaler 0: RT0PSIFG */ + break; + } + } while (RTC_NONE != rtciv); + + if (time_is_valid) { + unsigned int event_set = eventSet__; + eventSet__ = 0; + signal RealTimeClock.currentTime(&now, event_set); + } + } + +#else /* WITH_OSIAN */ + command error_t start () { return FAIL; } + command error_t stop () { return EOFF; } +#endif /* WITH_OSIAN */ +} diff --git a/tos/platforms/surf/hardware/usci/PlatformSerialC.nc b/tos/platforms/surf/hardware/usci/PlatformSerialC.nc new file mode 100644 index 0000000000..ab5b4a36f3 --- /dev/null +++ b/tos/platforms/surf/hardware/usci/PlatformSerialC.nc @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * De-facto standard component for platform independent access to a serial port. + * + * This implementation supports the TI EM430 and other MSP430XV2-based boards. + * + * Note that, since the standard practice is to use StdControl to + * start and stop this module (which requests and releases the + * corresponding USCI UART module), inclusion of this into an + * application is incompatible with sharing the UART among multiple + * clients in the TEP108 sense of resource sharing. + * + * @author David Moss + * @author Peter A. Bigot + */ +configuration PlatformSerialC { + provides { + interface StdControl; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSerialP; + StdControl = PlatformSerialP; + + components new Msp430UsciUartA0C() as UartC; + + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + PlatformSerialP.Resource -> UartC.Resource; + + components LedsC; + PlatformSerialP.Leds -> LedsC; + +} diff --git a/tos/platforms/surf/hardware/usci/PlatformSerialP.nc b/tos/platforms/surf/hardware/usci/PlatformSerialP.nc new file mode 100644 index 0000000000..25a9c8f8d0 --- /dev/null +++ b/tos/platforms/surf/hardware/usci/PlatformSerialP.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ +module PlatformSerialP { + provides { + interface StdControl; + } + + uses { + interface Resource; + interface Leds; + } +} + +implementation { + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop(){ + return call Resource.release(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc b/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc new file mode 100644 index 0000000000..1cb418e815 --- /dev/null +++ b/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc @@ -0,0 +1,53 @@ +/* Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "msp430usci.h" + +/** + * Connect the appropriate pins for USCI support on a CC430. + * + * @author Peter A. Bigot + */ + +configuration PlatformUsciInitC { +} implementation { + components HplMsp430GeneralIOC as GIO; + + components Msp430UsciUartA0P as UartA0C; + UartA0C.URXD -> GIO.UCA0RXD; + UartA0C.UTXD -> GIO.UCA0TXD; + + components Msp430UsciSpiB0P as SpiB0C; + SpiB0C.SIMO -> GIO.UCB0SIMO; + SpiB0C.SOMI -> GIO.UCB0SOMI; + SpiB0C.CLK -> GIO.UCB0CLK; + +} diff --git a/tos/platforms/surf/platform.h b/tos/platforms/surf/platform.h new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tos/platforms/surf/platform_message.h b/tos/platforms/surf/platform_message.h new file mode 100644 index 0000000000..67df30cbb8 --- /dev/null +++ b/tos/platforms/surf/platform_message.h @@ -0,0 +1,24 @@ + +/** + * @author Philip Levis + * @author David Moss + * @author Peter A. Bigot + */ + +#ifndef PLATFORM_MESSAGE_H +#define PLATFORM_MESSAGE_H + +#include "Rf1aPacket.h" + +typedef union message_header { + rf1a_ieee154_t rf1a_ieee154; +} message_header_t; + +typedef union TOSRadioFooter { +} message_footer_t; + +typedef union TOSRadioMetadata { + rf1a_metadata_t rf1a; +} message_metadata_t; + +#endif diff --git a/tos/platforms/surf/revisions.txt b/tos/platforms/surf/revisions.txt new file mode 100644 index 0000000000..dbd43455e7 --- /dev/null +++ b/tos/platforms/surf/revisions.txt @@ -0,0 +1,44 @@ +The SuRF hardware has undergone various revisions. The differences between +those revisions are documented in this file. A preprocessor symbol +SURF_REV_XX should be defined when compiling for revision XX. + +SuRF Board +========== + +Revision A (Internal) +--------------------- + +Evaluation Verification and Testing (EVT) board. + +- Five LEDs: P1.0 blue, P1.1 white, P1.2 red, P3.6 yellow, P3.7 green +- Two buttons: P2.0, P2.1 + +Revision B1 (Internal) +---------------------- + +Design Verification and Testing (DVT) board. + +- Pin changes for more flexibility +- LED colors/pins changed: P3.0 green, P3.1 red, P3.2 white, P3.3 orange, P3.4 blue +- Four buttons: P1.0, P1.1, P2.6, P2.7 +- Hardware reset button +- Improved PCB antenna + +Revision B2 (External) +---------------------- + +Production Verification and Testing (PVT) board. + +- Photodiode moved away from LEDs +- LED colors changed: P1.0 green, P1.1 red, P1.2 *orange*, P1.3 *white*, P1.4 blue +- 28-pin header instead of 24-pin header +- Flash chip changed from AT25S010 to Numonyx M25P10 + + +SuRF Block +========== + +Revision BLOCK_A (Internal) +--------------------------- + +Evaluation Verification and Testing (EVT) board. From b978c7f393b08e206cb2ac04714ec997a37a2162 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 8 Jun 2011 16:31:41 -0700 Subject: [PATCH 092/411] support uniarch compiler cherry picked from mainline 9bb2e3e (origin/uniarch off t2/master) Conflicts: tos/chips/msp430/msp430hardware.h tos/platforms/shimmer/chips/msp430/msp430hardware.h tos/platforms/span/chips/msp430/msp430hardware.h --- tos/chips/msp430/msp430hardware.h | 2 +- .../shimmer/chips/msp430/msp430hardware.h | 21 +++++++++++++++---- .../span/chips/msp430/msp430hardware.h | 19 +++++++++++++++-- 3 files changed, 35 insertions(+), 7 deletions(-) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 925871153e..15de1eb246 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -554,4 +554,4 @@ enum { #define STATIC_ARRAY_SIZE(_s) (_s) #endif /* STATIC_ARRAY_SIZE */ -#endif /* _H_msp430hardware_h */ +#endif // _H_msp430hardware_h diff --git a/tos/platforms/shimmer/chips/msp430/msp430hardware.h b/tos/platforms/shimmer/chips/msp430/msp430hardware.h index 79ab0858f0..70ebdcf17c 100644 --- a/tos/platforms/shimmer/chips/msp430/msp430hardware.h +++ b/tos/platforms/shimmer/chips/msp430/msp430hardware.h @@ -44,19 +44,33 @@ */ #ifdef __MSPGCC__ #include +#include #else #include -#endif /* * signal.h defines lots of interesting things including dint(), eint() and * how to hook interrupts in. */ #include + +#endif /* __MSPGCC__ */ + +#if defined(__msp430x261x) && !defined(__msp430x26x) +/* + * The old 3.2.3 toolchain defined __msp430x261x when compiling for the + * 261x series of chips. The new TI HEADER based toolchains however define + * __msp430x26x instead. + * + * We are migrating to using the newer toolchain and the newer __msp430x26x + * define. For backward compatibility, create the new define too if needed. + */ +#define __msp430x26x +#endif + #include "msp430regtypes.h" #include "Msp430DcoSpec.h" - #ifdef __MSP430_TI_HEADERS__ /* TI's msp430 headers define FAIL to be 0x80 in the flash module. @@ -489,5 +503,4 @@ enum { MSP430_PORT_RESISTOR_PULLUP, /**< Pullup resistor enabled */ }; -#endif//_H_msp430hardware_h - +#endif //_H_msp430hardware_h diff --git a/tos/platforms/span/chips/msp430/msp430hardware.h b/tos/platforms/span/chips/msp430/msp430hardware.h index 70f7942304..f454b6569c 100644 --- a/tos/platforms/span/chips/msp430/msp430hardware.h +++ b/tos/platforms/span/chips/msp430/msp430hardware.h @@ -44,15 +44,30 @@ */ #ifdef __MSPGCC__ #include +#include #else #include -#endif /* * signal.h defines lots of interesting things including dint(), eint() and * how to hook interrupts in. */ #include + +#endif /* __MSPGCC__ */ + +#if defined(__msp430x261x) && !defined(__msp430x26x) +/* + * The old 3.2.3 toolchain defined __msp430x261x when compiling for the + * 261x series of chips. The new TI HEADER based toolchains however define + * __msp430x26x instead. + * + * We are migrating to using the newer toolchain and the newer __msp430x26x + * define. For backward compatibility, create the new define too if needed. + */ +#define __msp430x26x +#endif + #include "msp430regtypes.h" #include "Msp430DcoSpec.h" @@ -318,4 +333,4 @@ enum { MSP430_PORT_RESISTOR_PULLUP, /**< Pullup resistor enabled */ }; -#endif//_H_msp430hardware_h +#endif //_H_msp430hardware_h From b9271cd032ebe8fd2ec0f4d6f0518badc562c2c3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 12 Jun 2011 12:46:39 -0700 Subject: [PATCH 093/411] forgot closing brace on the provides block, x5xxx/timer/Msp430XV2ClockC --- tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc | 1 + 1 file changed, 1 insertion(+) diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc index 06152fedb0..1b4ef722e8 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockC.nc @@ -57,6 +57,7 @@ configuration Msp430XV2ClockC { interface Init; interface Msp430XV2ClockControl; interface StdControl as InhibitUcs7WorkaroundControl; + } } implementation { components Msp430XV2ClockP; From e5e28cf06f59cc6b1b73e723c770bcb42a298ba4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 12 Jun 2011 14:08:09 -0700 Subject: [PATCH 094/411] clean up copyrights, clean up. no code changes. --- tos/chips/msp430/msp430hardware.h | 4 +- tos/interfaces/MultiLed.nc | 4 +- .../shimmer/chips/msp430/msp430hardware.h | 4 +- .../span/chips/msp430/msp430hardware.h | 8 ++- tos/platforms/surf/ActiveMessageC.nc | 64 +++++++++---------- tos/platforms/surf/Ieee154MessageC.nc | 23 ++++--- tos/platforms/surf/PlatformC.nc | 55 ++++++---------- tos/platforms/surf/PlatformP.nc | 37 ++++++----- tos/platforms/surf/hardware.h | 20 +++--- .../surf/hardware/buttons/ButtonBridge.nc | 21 +++--- .../surf/hardware/buttons/ButtonBridgeP.nc | 19 +++--- .../surf/hardware/buttons/ButtonP.nc | 26 +++++--- .../surf/hardware/buttons/PlatformButtons.h | 19 +++--- .../surf/hardware/buttons/PlatformButtonsC.nc | 32 +++++----- .../surf/hardware/buttons/UserButton.h | 16 +++-- .../surf/hardware/buttons/UserButtonC.nc | 16 +++-- .../surf/hardware/clock/PlatformClockP.nc | 40 ++++++++---- .../surf/hardware/flash/PlatformFlashC.nc | 29 +++++---- .../surf/hardware/flash/PlatformFlashInitC.nc | 18 +++--- .../surf/hardware/flash/PlatformFlashInitP.nc | 20 +++--- .../surf/hardware/flash/PlatformFlashP.nc | 24 +++---- .../surf/hardware/flash/platformflash.h | 16 +++-- .../surf/hardware/leds/PlatformLedC.nc | 3 +- .../surf/hardware/leds/PlatformLedP.nc | 1 - .../surf/hardware/onewire/PlatformOneWireC.nc | 1 - .../hardware/onewire/PlatformOneWireInitC.nc | 5 +- .../hardware/onewire/PlatformOneWireInitP.nc | 5 +- .../surf/hardware/pins/PlatformPinsC.nc | 17 +++-- .../surf/hardware/pins/PlatformPinsP.nc | 38 +++++------ .../surf/hardware/radio/RadioChannelC.nc | 22 +++---- .../surf/hardware/radio/RadioChannelP.nc | 30 ++++----- .../surf/hardware/radio/RadioRssiC.nc | 23 +++---- .../surf/hardware/radio/RadioRssiP.nc | 21 +++--- .../hardware/rtc/PlatformRealTimeClockC.nc | 17 +++-- .../hardware/rtc/PlatformRealTimeClockP.nc | 47 +++++++------- .../surf/hardware/usci/PlatformSerialC.nc | 22 ++++--- .../surf/hardware/usci/PlatformSerialP.nc | 27 ++++---- .../surf/hardware/usci/PlatformUsciInitC.nc | 17 ++--- tos/platforms/surf/platform_message.h | 1 - 39 files changed, 423 insertions(+), 389 deletions(-) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 15de1eb246..e842b38394 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -10,11 +10,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * diff --git a/tos/interfaces/MultiLed.nc b/tos/interfaces/MultiLed.nc index 8260d2880e..846eafc82e 100644 --- a/tos/interfaces/MultiLed.nc +++ b/tos/interfaces/MultiLed.nc @@ -31,7 +31,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ - + /** An interface to control a series of LEDs. * * Allows use of a series of LEDs as a visual binary register. Bit i @@ -43,7 +43,7 @@ */ interface MultiLed { - + /** Read the value represented by the on status of the LEDs. */ async command unsigned int get (); diff --git a/tos/platforms/shimmer/chips/msp430/msp430hardware.h b/tos/platforms/shimmer/chips/msp430/msp430hardware.h index 70ebdcf17c..99a9114491 100644 --- a/tos/platforms/shimmer/chips/msp430/msp430hardware.h +++ b/tos/platforms/shimmer/chips/msp430/msp430hardware.h @@ -8,11 +8,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * diff --git a/tos/platforms/span/chips/msp430/msp430hardware.h b/tos/platforms/span/chips/msp430/msp430hardware.h index f454b6569c..16bd93ceb2 100644 --- a/tos/platforms/span/chips/msp430/msp430hardware.h +++ b/tos/platforms/span/chips/msp430/msp430hardware.h @@ -1,5 +1,5 @@ - -/* Copyright (c) 2000-2003 The Regents of the University of California. +/* + * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -8,11 +8,13 @@ * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the copyright holder nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * diff --git a/tos/platforms/surf/ActiveMessageC.nc b/tos/platforms/surf/ActiveMessageC.nc index 40852c7744..a43af5ae45 100644 --- a/tos/platforms/surf/ActiveMessageC.nc +++ b/tos/platforms/surf/ActiveMessageC.nc @@ -1,47 +1,42 @@ -// $Id: ActiveMessageC.nc,v 1.8 2009/09/16 00:51:51 razvanm Exp $ - /* - * "Copyright (c) 2004-2005 The Regents of the University of California. + * Copyright (c) 2004-2005 The Regents of the University of California. + * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * Copyright (c) 2004-2005 Intel Corporation - * All rights reserved. + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. * - * This file is distributed under the terms in the attached INTEL-LICENSE - * file. If you do not find these files, copies can be found by writing to - * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, - * 94704. Attention: Intel License Inquiry. - */ -/* + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. * - * Authors: Philip Levis - * Date last modified: $Id: ActiveMessageC.nc,v 1.8 2009/09/16 00:51:51 razvanm Exp $ + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * - * The Active Message layer on the Telos platform. This is a naming wrapper - * around the CC2420 Active Message layer. - * - * @author Philip Levis - * @version $Revision: 1.8 $ $Date: 2009/09/16 00:51:51 $ + * The Active Message layer for the SURF platform. This is a naming wrapper + * around the RF1A Active Message layer. */ configuration ActiveMessageC { @@ -60,11 +55,12 @@ configuration ActiveMessageC { // interface LowPowerListening; } } + implementation { components Rf1aActiveMessageC as AM; SplitControl = AM; - + AMSend = AM; Receive = AM.Receive; Snoop = AM.Snoop; diff --git a/tos/platforms/surf/Ieee154MessageC.nc b/tos/platforms/surf/Ieee154MessageC.nc index 96b2878c45..5102f3d42a 100644 --- a/tos/platforms/surf/Ieee154MessageC.nc +++ b/tos/platforms/surf/Ieee154MessageC.nc @@ -1,4 +1,5 @@ -/* Copyright (c) 2010 People Power Co. +/* + * Copyright (c) 2010 People Power Co. * All rights reserved. * * This open source code was developed with funding from People Power Company @@ -6,35 +7,39 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ -/** Generic network stack interface for Ieee154-based applications. +/** + * Generic network stack interface for Ieee154-based applications. * * @author Peter A. Bigot */ + configuration Ieee154MessageC { provides { interface SplitControl; diff --git a/tos/platforms/surf/PlatformC.nc b/tos/platforms/surf/PlatformC.nc index 27b266d5c9..703891d443 100644 --- a/tos/platforms/surf/PlatformC.nc +++ b/tos/platforms/surf/PlatformC.nc @@ -1,53 +1,36 @@ /* * Copyright (c) 2009-2010 People Power Co. + * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - - -/* "Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @@ -55,14 +38,13 @@ * @author Cory Sharp * @author David Moss */ - + #include "hardware.h" configuration PlatformC { provides { interface Init as PlatformInit; } - uses { interface Init as PeripheralInit; } @@ -73,7 +55,7 @@ implementation { components PlatformP; PlatformInit = PlatformP; PeripheralInit = PlatformP.PeripheralInit; - + /* The following components require no initialization: * Button * Rf1a @@ -81,30 +63,29 @@ implementation { * * The following components require wiring initialization, but no * code initialization: - * Usci */ + * Usci + */ components PlatformPinsC; PlatformP.PlatformPins -> PlatformPinsC; - + components PlatformLedC; PlatformP.PlatformLed -> PlatformLedC; - + components PlatformUsciInitC; // No code initialization required; just connect the pins components Msp430PmmC; PlatformP.Msp430Pmm -> Msp430PmmC; - + components PlatformClockC; PlatformP.PlatformClock -> PlatformClockC; components PlatformOneWireInitC; PlatformP.OneWire -> PlatformOneWireInitC; - + #if PLATFORM_HAS_FLASH components PlatformFlashInitC; PlatformP.PlatformFlash -> PlatformFlashInitC; #endif // PLATFORM_HAS_FLASH - } - diff --git a/tos/platforms/surf/PlatformP.nc b/tos/platforms/surf/PlatformP.nc index 1670de12ac..5ad3580fc9 100644 --- a/tos/platforms/surf/PlatformP.nc +++ b/tos/platforms/surf/PlatformP.nc @@ -5,42 +5,44 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - + module PlatformP { provides { interface Init; } - uses { interface Init as PlatformPins; interface Init as PlatformLed; interface Init as Msp430Pmm; interface Init as PlatformClock; interface Init as OneWire; - + #if PLATFORM_HAS_FLASH interface Init as PlatformFlash; #endif // PLATFORM_HAS_FLASH @@ -48,40 +50,37 @@ module PlatformP { interface Init as PeripheralInit; } } - implementation { - + void uwait(uint16_t u) { uint16_t t0 = TA0R; while((TA0R - t0) <= u); } - + command error_t Init.init() { WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer - + call PlatformPins.init(); call PlatformLed.init(); call Msp430Pmm.init(); call PlatformClock.init(); call OneWire.init(); - + #if PLATFORM_HAS_FLASH call PlatformFlash.init(); #endif // PLATFORM_HAS_FLASH call PeripheralInit.init(); - + // Wait an arbitrary 10 milliseconds for the FLL to calibrate the DCO // before letting the system continue on into a low power mode. uwait(1024*10); - + return SUCCESS; } - + /***************** Defaults ***************/ default command error_t PeripheralInit.init() { return SUCCESS; } - } - diff --git a/tos/platforms/surf/hardware.h b/tos/platforms/surf/hardware.h index 61edc41593..1e24aec4dd 100644 --- a/tos/platforms/surf/hardware.h +++ b/tos/platforms/surf/hardware.h @@ -1,34 +1,37 @@ -/* Copyright (c) 2009-2010 People Power Co. +/* + * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Peter Bigot - * */ #ifndef _H_hardware_h @@ -77,4 +80,3 @@ enum { #define ADC12_PINS_AVAILABLE 6 #endif // _H_hardware_h - diff --git a/tos/platforms/surf/hardware/buttons/ButtonBridge.nc b/tos/platforms/surf/hardware/buttons/ButtonBridge.nc index 16c2b86834..fa2088058e 100644 --- a/tos/platforms/surf/hardware/buttons/ButtonBridge.nc +++ b/tos/platforms/surf/hardware/buttons/ButtonBridge.nc @@ -1,4 +1,5 @@ -/* Copyright (c) 2010 People Power Co. +/* + * Copyright (c) 2010 People Power Co. * All rights reserved. * * This open source code was developed with funding from People Power Company @@ -6,32 +7,33 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - #include "UserButton.h" /** Interface used to bridge the async Button events with the @@ -39,6 +41,7 @@ * * @author Peter A. Bigot */ + interface ButtonBridge { /** Set the initial state of the button upon its being enabled. * This command is invoked by the ButtonP code whenever the button diff --git a/tos/platforms/surf/hardware/buttons/ButtonBridgeP.nc b/tos/platforms/surf/hardware/buttons/ButtonBridgeP.nc index e9c2c40cde..1e3566d43e 100644 --- a/tos/platforms/surf/hardware/buttons/ButtonBridgeP.nc +++ b/tos/platforms/surf/hardware/buttons/ButtonBridgeP.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** Bridge the async/sync gap for legacy button notification. @@ -84,7 +87,7 @@ module ButtonBridgeP { uint8_t old_state; uint8_t new_state; uint8_t button_id = 0; - + atomic { /* Cache the values based on which we'll do the notification, * then update the last state to reflect the latest value. */ @@ -167,6 +170,4 @@ module ButtonBridgeP { } default async event void ButtonBridge.setEnabled[uint8_t button_id] (bool enabledp) { } - } - diff --git a/tos/platforms/surf/hardware/buttons/ButtonP.nc b/tos/platforms/surf/hardware/buttons/ButtonP.nc index 5e2e0e0636..b6b259bcc1 100644 --- a/tos/platforms/surf/hardware/buttons/ButtonP.nc +++ b/tos/platforms/surf/hardware/buttons/ButtonP.nc @@ -1,4 +1,5 @@ -/* Copyright (c) 2009-2010 People Power Co. +/* + * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * * This open source code was developed with funding from People Power Company @@ -6,34 +7,37 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** Implemement the Button interface for the SuRF board. * @author Peter A. Bigot */ + generic module ButtonP (bool active_high, uint8_t button_id) { #if WITH_OSIAN @@ -48,9 +52,11 @@ generic module ButtonP (bool active_high, } } implementation { - /** Read the pin status, and return TRUE iff the status corresponds + /** + * Read the pin status, and return TRUE iff the status corresponds * to a pressed button. Optionally configure the interrupts to - * detect a change from the current state. */ + * detect a change from the current state. + */ bool checkAndConfigure_atomic (bool set_interrupt) { bool rv = !! call ButtonPin.get(); diff --git a/tos/platforms/surf/hardware/buttons/PlatformButtons.h b/tos/platforms/surf/hardware/buttons/PlatformButtons.h index e2fd7195e4..cd91f36b52 100644 --- a/tos/platforms/surf/hardware/buttons/PlatformButtons.h +++ b/tos/platforms/surf/hardware/buttons/PlatformButtons.h @@ -1,4 +1,5 @@ -/* Copyright (c) 2009-2010 People Power Co. +/* + * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * * This open source code was developed with funding from People Power Company @@ -6,29 +7,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef PLATFORMBUTTONS_H diff --git a/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc b/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc index 32f3eed0ff..18ba664483 100644 --- a/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc +++ b/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc @@ -7,36 +7,37 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - - /** * @author David Moss */ - + #include "UserButton.h" #include "PlatformButtons.h" @@ -56,14 +57,14 @@ configuration PlatformButtonsC { #endif // WITH_OSIAN } } implementation { - + components HplMsp430GeneralIOC as GeneralIoC; components HplMsp430InterruptC as InterruptC; - + /* * Define as many Buttons's as your platform has available */ - + enum { BUTTON_0 = 0, BUTTON_1 = 1, @@ -78,7 +79,7 @@ configuration PlatformButtonsC { components ButtonBridgeP; Get = ButtonBridgeP.Get; Notify = ButtonBridgeP.Notify; - + components new ButtonP(FALSE, 0) as Button0C; components new Msp430InterruptC() as Button0InterruptC; Button0C.ButtonInterrupt -> Button0InterruptC; @@ -86,7 +87,7 @@ configuration PlatformButtonsC { #if WITH_OSIAN Button0 = Button0C; #endif // WITH_OSIAN - + components new ButtonP(FALSE, 1) as Button1C; components new Msp430InterruptC() as Button1InterruptC; Button1C.ButtonInterrupt -> Button1InterruptC; @@ -103,7 +104,7 @@ configuration PlatformButtonsC { #if WITH_OSIAN Button2 = Button2C; #endif // WITH_OSIAN - + #if 3 < PLATFORM_BUTTON_COUNT components new ButtonP(FALSE, 3) as Button3C; components new Msp430InterruptC() as Button3InterruptC; @@ -137,4 +138,3 @@ configuration PlatformButtonsC { #endif // SURF_REV_x } - diff --git a/tos/platforms/surf/hardware/buttons/UserButton.h b/tos/platforms/surf/hardware/buttons/UserButton.h index 9a6adebe3c..0f42ad904a 100644 --- a/tos/platforms/surf/hardware/buttons/UserButton.h +++ b/tos/platforms/surf/hardware/buttons/UserButton.h @@ -5,35 +5,37 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the user button for the telosb platform * * @author Gilman Tolle - * @version $Revision: 1.1 $ */ #ifndef USERBUTTON_H diff --git a/tos/platforms/surf/hardware/buttons/UserButtonC.nc b/tos/platforms/surf/hardware/buttons/UserButtonC.nc index 2ba97b1d8f..0c80e2f948 100644 --- a/tos/platforms/surf/hardware/buttons/UserButtonC.nc +++ b/tos/platforms/surf/hardware/buttons/UserButtonC.nc @@ -5,28 +5,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @@ -39,7 +42,6 @@ * state. * * @author Gilman Tolle - * @version $Revision: 1.1 $ */ #include diff --git a/tos/platforms/surf/hardware/clock/PlatformClockP.nc b/tos/platforms/surf/hardware/clock/PlatformClockP.nc index 8710733f57..14f9f2f7b4 100644 --- a/tos/platforms/surf/hardware/clock/PlatformClockP.nc +++ b/tos/platforms/surf/hardware/clock/PlatformClockP.nc @@ -34,12 +34,12 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -/** Top-level initialization of anything to do with the clock +/** + * Top-level initialization of anything to do with the clock * subsystem. * - * We mostly use the standard initialization in - * Msp430XV2ClockControlP, except that we may or may not have an - * external 32kHz crystal populated. + * We mostly use the standard initialization in Msp430XV2ClockControlP, + * except that we may or may not have an external 32kHz crystal populated. * * If the PLATFORM_MSP430_HAS_XT1 preprocessor symbol is undefined, or is defined * to a non-zero value, the XIN and XOUT pins are configured to their @@ -68,29 +68,35 @@ module PlatformClockP { /* Specifically told that there is no crystal. Do nothing. */ #else /* PLATFORM_MSP430_HAS_XT1 */ - /* Either we don't know whether there's a crystal, or we've been + + /* + * Either we don't know whether there's a crystal, or we've been * told to expect one. Configure it and see whether a stable XT1 * can be identified. If so, run with it; if not, restore the * default configuration. * * If we were told there should be a crystal present, but it * doesn't stabilize, this is probably an error, but can't do - * anything about it here. */ + * anything about it here. + */ - /* Enable XT1, permanently, with no additional capacitance. + /* + * Enable XT1, permanently, with no additional capacitance. * * @note Both 5.0 and 5.1 must be cleared in P5DIR. * * @note If the default capacitance of XCAP_3 is retained, SMCLK * measures 4 per-mil faster than it should. On the SuRF * hardware, setting XCAP to zero appears to work. Other values - * may be necessary on other hardware. */ + * may be necessary on other hardware. + */ P5DIR &= ~(BIT0 | BIT1); P5SEL |= (BIT0 | BIT1); UCSCTL6 &= ~(XT1OFF | XCAP_3); - /* Spin waiting for a stable signal. This loop runs somewhere + /* + * Spin waiting for a stable signal. This loop runs somewhere * between 10K and 20K times; if it gets to 65536 without success, * assume the crystal's absent or broken. At the power-up DCO * rate of 2MHz and no crystal, the loop takes 625ms to @@ -101,7 +107,9 @@ module PlatformClockP { * revert to XT1 upon stabilization: the UCS module documentation * implies that OFIFG must be cleared for this to occur. * Consequently, we have to wait for stabilization even if we - * "know" a crystal is present. */ + * "know" a crystal is present. + */ + { uint16_t ctr = 0; do { @@ -110,18 +118,22 @@ module PlatformClockP { } while (++ctr && (SFRIFG1 & OFIFG)); } - /* If the XT1 signal is still not valid, disable it; otherwise, + /* + * If the XT1 signal is still not valid, disable it; otherwise, * lower the power it uses. (XT1DRIVE setting suggested by TI - * example code.) */ + * example code.) + */ if (UCSCTL7 & XT1LFOFFG) { P5DIR |= (BIT0 | BIT1); P5SEL &= ~(BIT0| BIT1); UCSCTL6 |= XT1OFF; } else { - /* TI example code suggests clearing XT1DRIVE to reduce power. + /* + * TI example code suggests clearing XT1DRIVE to reduce power. * Current measurement does not indicate any value in doing so, - * at least not in LPM4, but it doesn't seem to hurt either. */ + * at least not in LPM4, but it doesn't seem to hurt either. + */ UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive } diff --git a/tos/platforms/surf/hardware/flash/PlatformFlashC.nc b/tos/platforms/surf/hardware/flash/PlatformFlashC.nc index bc80a316a8..a5791baf3b 100644 --- a/tos/platforms/surf/hardware/flash/PlatformFlashC.nc +++ b/tos/platforms/surf/hardware/flash/PlatformFlashC.nc @@ -7,44 +7,46 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - - /** * @author David Moss */ + configuration PlatformFlashC { provides { interface Init as DriverInit; - + interface Resource; interface SpiByte; interface SpiPacket; interface Msp430UsciError; - + interface GeneralIO as Csn; } } @@ -62,15 +64,14 @@ implementation { components new Msp430GpioC() as CsnC; CsnC -> PlatformFlashInitC.CsnIO; Csn = CsnC; - + components PlatformFlashP; DriverInit = PlatformFlashP; - + components BusyWaitMicroC; PlatformFlashP.BusyWait -> BusyWaitMicroC; - + components NorFlashMasterC; PlatformFlashP.NorFlashCommands -> NorFlashMasterC; PlatformFlashP.Resource -> NorFlashMasterC; - } diff --git a/tos/platforms/surf/hardware/flash/PlatformFlashInitC.nc b/tos/platforms/surf/hardware/flash/PlatformFlashInitC.nc index 2e15559253..66afb6de43 100644 --- a/tos/platforms/surf/hardware/flash/PlatformFlashInitC.nc +++ b/tos/platforms/surf/hardware/flash/PlatformFlashInitC.nc @@ -7,35 +7,37 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - - /** * @author David Moss */ + configuration PlatformFlashInitC { provides { interface Init; diff --git a/tos/platforms/surf/hardware/flash/PlatformFlashInitP.nc b/tos/platforms/surf/hardware/flash/PlatformFlashInitP.nc index 7f46de390f..a03d00f817 100644 --- a/tos/platforms/surf/hardware/flash/PlatformFlashInitP.nc +++ b/tos/platforms/surf/hardware/flash/PlatformFlashInitP.nc @@ -7,39 +7,41 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - /** * @author David Moss */ + module PlatformFlashInitP { provides { interface Init; } - uses { interface HplMsp430GeneralIO as CsnIO; #if WITH_OSIAN @@ -49,7 +51,7 @@ module PlatformFlashInitP { } implementation { - + command error_t Init.init() { call CsnIO.set(); call CsnIO.makeOutput(); diff --git a/tos/platforms/surf/hardware/flash/PlatformFlashP.nc b/tos/platforms/surf/hardware/flash/PlatformFlashP.nc index 65ac8a95b5..10bfc9d1cb 100644 --- a/tos/platforms/surf/hardware/flash/PlatformFlashP.nc +++ b/tos/platforms/surf/hardware/flash/PlatformFlashP.nc @@ -7,39 +7,41 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - /** * @author David Moss */ + module PlatformFlashP { provides { interface Init as DriverInit; } - uses { interface NorFlashCommands; interface Resource; @@ -48,18 +50,16 @@ module PlatformFlashP { } implementation { - + command error_t DriverInit.init() { // The datasheet says the M25P10 flash chip takes ~10 ms to power up call BusyWait.wait(10240U); call Resource.immediateRequest(); call NorFlashCommands.sleep(); call Resource.release(); - return SUCCESS; } - + event void Resource.granted() { } - } diff --git a/tos/platforms/surf/hardware/flash/platformflash.h b/tos/platforms/surf/hardware/flash/platformflash.h index 9da0d16684..8a372a1523 100644 --- a/tos/platforms/surf/hardware/flash/platformflash.h +++ b/tos/platforms/surf/hardware/flash/platformflash.h @@ -6,29 +6,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef PLATFORMFLASH_H_ diff --git a/tos/platforms/surf/hardware/leds/PlatformLedC.nc b/tos/platforms/surf/hardware/leds/PlatformLedC.nc index a6983f3b8c..d3ab1e0f91 100644 --- a/tos/platforms/surf/hardware/leds/PlatformLedC.nc +++ b/tos/platforms/surf/hardware/leds/PlatformLedC.nc @@ -34,7 +34,8 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* SuRF LED configuration. +/* + * SuRF LED configuration. * * @note Traditionally, the PlatformLedsC component has exported named * GeneralIO interfaces. We don't do that anymore; see PlatformLedsP diff --git a/tos/platforms/surf/hardware/leds/PlatformLedP.nc b/tos/platforms/surf/hardware/leds/PlatformLedP.nc index 536551bae2..f63c2f0f9c 100644 --- a/tos/platforms/surf/hardware/leds/PlatformLedP.nc +++ b/tos/platforms/surf/hardware/leds/PlatformLedP.nc @@ -94,7 +94,6 @@ module PlatformLedP { #if defined(SURF_REV_BLOCK_A) { (port_t*)P3IN_, 1 << 1 }, // Green { (port_t*)P3IN_, 1 << 2 }, // Red - #elif defined(SURF_REV_A) { (port_t*)P1IN_, 1 << 0 }, // Blue { (port_t*)P1IN_, 1 << 1 }, // White diff --git a/tos/platforms/surf/hardware/onewire/PlatformOneWireC.nc b/tos/platforms/surf/hardware/onewire/PlatformOneWireC.nc index 093544f530..91d58e62c8 100644 --- a/tos/platforms/surf/hardware/onewire/PlatformOneWireC.nc +++ b/tos/platforms/surf/hardware/onewire/PlatformOneWireC.nc @@ -61,5 +61,4 @@ implementation { PrimaryOneWire = Ds1825ImplC; TemperatureCC = Ds1825ImplC; Ds1825ImplC.OneWireMaster -> Ds1825MasterC; - } diff --git a/tos/platforms/surf/hardware/onewire/PlatformOneWireInitC.nc b/tos/platforms/surf/hardware/onewire/PlatformOneWireInitC.nc index d87afe1ba4..4974093006 100644 --- a/tos/platforms/surf/hardware/onewire/PlatformOneWireInitC.nc +++ b/tos/platforms/surf/hardware/onewire/PlatformOneWireInitC.nc @@ -45,10 +45,10 @@ configuration PlatformOneWireInitC { interface HplMsp430GeneralIO as Ds1825IO; } } implementation { - + components PlatformOneWireInitP; Init = PlatformOneWireInitP; - + components HplMsp430GeneralIOC as GeneralIOC; #if defined(SURF_REV_A) Ds1825IO = GeneralIOC.Port35; @@ -57,5 +57,4 @@ configuration PlatformOneWireInitC { Ds1825IO = GeneralIOC.Port37; PlatformOneWireInitP.Ds1825IO -> GeneralIOC.Port37; #endif - } diff --git a/tos/platforms/surf/hardware/onewire/PlatformOneWireInitP.nc b/tos/platforms/surf/hardware/onewire/PlatformOneWireInitP.nc index b540c3ac59..04e4ae3fee 100644 --- a/tos/platforms/surf/hardware/onewire/PlatformOneWireInitP.nc +++ b/tos/platforms/surf/hardware/onewire/PlatformOneWireInitP.nc @@ -37,23 +37,20 @@ /** * @author David Moss */ - + module PlatformOneWireInitP { provides { interface Init; } - uses { interface HplMsp430GeneralIO as Ds1825IO; } } implementation { - command error_t Init.init() { call Ds1825IO.setResistor(MSP430_PORT_RESISTOR_OFF); call Ds1825IO.makeInput(); return SUCCESS; } - } diff --git a/tos/platforms/surf/hardware/pins/PlatformPinsC.nc b/tos/platforms/surf/hardware/pins/PlatformPinsC.nc index 9868376d92..4d32815649 100644 --- a/tos/platforms/surf/hardware/pins/PlatformPinsC.nc +++ b/tos/platforms/surf/hardware/pins/PlatformPinsC.nc @@ -7,35 +7,38 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - /** * @author David Moss * @author Peter A. Bigot */ + configuration PlatformPinsC { provides { interface Init; diff --git a/tos/platforms/surf/hardware/pins/PlatformPinsP.nc b/tos/platforms/surf/hardware/pins/PlatformPinsP.nc index fad7c15242..f91ab73952 100644 --- a/tos/platforms/surf/hardware/pins/PlatformPinsP.nc +++ b/tos/platforms/surf/hardware/pins/PlatformPinsP.nc @@ -7,31 +7,33 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - /** * @author David Moss * @author Peter A. Bigot @@ -47,17 +49,17 @@ implementation { command error_t Init.init() { atomic { - + #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) P1DIR = 0xFF; P1OUT = 0x0; #endif - + #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) P2DIR = 0xFF; P2OUT = 0x0; #endif - + #if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) P3DIR = 0xFF; P3OUT = 0x0; @@ -67,7 +69,7 @@ implementation { P4DIR = 0xFF; P4OUT = 0x0; #endif - + #if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) P5DIR = 0xFF; P5OUT = 0x0; @@ -77,32 +79,32 @@ implementation { P6DIR = 0xFF; P6OUT = 0x0; #endif - + #if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) P7DIR = 0xFF; P7OUT = 0x0; #endif - + #if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) P8DIR = 0xFF; P8OUT = 0x0; #endif - + #if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) P9DIR = 0xFF; P9OUT = 0x0; #endif - + #if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) P10DIR = 0xFF; P10OUT = 0x0; #endif - + #if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) P11DIR = 0xFF; P11OUT = 0x0; #endif - + #if defined(__msp430_have_portJ) || defined(__MSP430_HAS_PORTJ__) || defined(__MSP430_HAS_PORTJ_R__) PJDIR = 0xFF; PJOUT = 0x0; @@ -117,7 +119,5 @@ implementation { } return SUCCESS; - } - } diff --git a/tos/platforms/surf/hardware/radio/RadioChannelC.nc b/tos/platforms/surf/hardware/radio/RadioChannelC.nc index c493acc289..75fb526e50 100644 --- a/tos/platforms/surf/hardware/radio/RadioChannelC.nc +++ b/tos/platforms/surf/hardware/radio/RadioChannelC.nc @@ -7,48 +7,48 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - - /** * Abstraction layer for setting and getting the radio channel * @author David Moss */ + configuration RadioChannelC { provides { interface Channel; } } - implementation { components RadioChannelP; Channel = RadioChannelP; - + components Rf1aIeee154MessageC as MsgC; RadioChannelP.Rf1aPhysical -> MsgC; - } diff --git a/tos/platforms/surf/hardware/radio/RadioChannelP.nc b/tos/platforms/surf/hardware/radio/RadioChannelP.nc index b26bd2b70b..c63456d937 100644 --- a/tos/platforms/surf/hardware/radio/RadioChannelP.nc +++ b/tos/platforms/surf/hardware/radio/RadioChannelP.nc @@ -7,39 +7,41 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author David Moss */ - + module RadioChannelP { provides { interface Channel; } - uses { interface Rf1aPhysical; } @@ -51,15 +53,15 @@ implementation { command uint8_t Channel.getMinimumChannel() { return RF1A_CHANNEL_MIN; } - + command uint8_t Channel.getMaximumChannel() { return RF1A_CHANNEL_MAX; } - + command uint8_t Channel.getTotalChannels() { return RF1A_CHANNEL_MAX - RF1A_CHANNEL_MIN + 1; } - + command void Channel.setChannel(uint8_t channel) { call Rf1aPhysical.setChannel(channel); } @@ -67,7 +69,7 @@ implementation { command uint8_t Channel.getChannel() { return call Rf1aPhysical.getChannel(); } - + async event void Rf1aPhysical.sendDone (int result) { } async event void Rf1aPhysical.receiveStarted (unsigned int length) { } async event void Rf1aPhysical.receiveDone (uint8_t* buffer, @@ -79,8 +81,4 @@ implementation { async event void Rf1aPhysical.clearChannel () { } async event void Rf1aPhysical.carrierSense () { } async event void Rf1aPhysical.released () { } - - - } - diff --git a/tos/platforms/surf/hardware/radio/RadioRssiC.nc b/tos/platforms/surf/hardware/radio/RadioRssiC.nc index edd1cc08bc..85673deb86 100644 --- a/tos/platforms/surf/hardware/radio/RadioRssiC.nc +++ b/tos/platforms/surf/hardware/radio/RadioRssiC.nc @@ -7,38 +7,40 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - - - /** * Abstraction layer for getting the RSSI and producing a random number * based on the Radio's RSSI + * * @author David Moss */ + configuration RadioRssiC { provides { interface Get; @@ -54,8 +56,7 @@ implementation { components RadioRssiP; Rf1aPhysical = RadioRssiP; Get = RadioRssiP; - + components RandomC; Random = RandomC; - } diff --git a/tos/platforms/surf/hardware/radio/RadioRssiP.nc b/tos/platforms/surf/hardware/radio/RadioRssiP.nc index 0461067b2c..0e5715b984 100644 --- a/tos/platforms/surf/hardware/radio/RadioRssiP.nc +++ b/tos/platforms/surf/hardware/radio/RadioRssiP.nc @@ -7,36 +7,39 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ module RadioRssiP { provides interface Get; uses interface Rf1aPhysical; } implementation { - command int8_t Get.get () - { + + command int8_t Get.get () { int rssi = call Rf1aPhysical.rssi_dBm(); if (rssi < -128) { rssi = -128; @@ -55,6 +58,4 @@ module RadioRssiP { async event void Rf1aPhysical.clearChannel () { } async event void Rf1aPhysical.carrierSense () { } async event void Rf1aPhysical.released () { } - } - diff --git a/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockC.nc b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockC.nc index 7851103ce3..ca29f316e6 100644 --- a/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockC.nc +++ b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockC.nc @@ -6,29 +6,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** Provide the RealTimeClock interface, but only when building under @@ -40,6 +42,7 @@ * * @author Peter A. Bigot */ + configuration PlatformRealTimeClockC { provides { interface StdControl; diff --git a/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc index 741560a3a3..8ee188d088 100644 --- a/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc +++ b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc @@ -6,30 +6,33 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ + #include "RealTimeClock.h" module PlatformRealTimeClockP { @@ -40,11 +43,12 @@ module PlatformRealTimeClockP { #endif /* WITH_OSIAN */ } } implementation { - + #if WITH_OSIAN /* TI renamed RTC_A_VECTOR to RTC_VECTOR in more recent header * releases. Use the former if we don't have the latter. */ + #ifndef RTC_VECTOR #define RTC_VECTOR RTC_A_VECTOR #endif /* RTC_VECTOR */ @@ -66,16 +70,15 @@ module PlatformRealTimeClockP { } return SUCCESS; } - command error_t StdControl.stop () - { + + command error_t StdControl.stop () { atomic { RTCCTL01 |= RTCHOLD; } return SUCCESS; } - command error_t RealTimeClock.setTime (const struct tm* time) - { + command error_t RealTimeClock.setTime (const struct tm* time) { if (! time) { return EINVAL; } @@ -96,8 +99,7 @@ module PlatformRealTimeClockP { return SUCCESS; } - command error_t RealTimeClock.requestTime (unsigned int event_set) - { + command error_t RealTimeClock.requestTime (unsigned int event_set) { atomic { if (RTCCTL01 & RTCHOLD) { return EOFF; @@ -107,10 +109,10 @@ module PlatformRealTimeClockP { return SUCCESS; } } - command error_t RealTimeClock.setIntervalMode (RtcIntervalMode_e interval_mode) - { + + command error_t RealTimeClock.setIntervalMode (RtcIntervalMode_e interval_mode) { error_t rv = SUCCESS; - + atomic { /* Start by disabling any interval-related interrupt */ RTCCTL01 &= ~(RTCTEVIE | RTCTEVIFG); @@ -147,8 +149,7 @@ module PlatformRealTimeClockP { return rv; } - command RtcIntervalMode_e RealTimeClock.getIntervalMode () - { + command RtcIntervalMode_e RealTimeClock.getIntervalMode () { atomic { if (! (RTCTEVIE & RTCCTL01)) { return RTC_INTERVAL_MODE_NONE; @@ -167,9 +168,9 @@ module PlatformRealTimeClockP { /*NOTREACHED*/ return RTC_INTERVAL_MODE_NONE; } + command error_t RealTimeClock.setAlarm (const struct tm* time, - unsigned int field_set) - { + unsigned int field_set) { atomic { /* Start by disabling the alarm */ RTCCTL0 &= ~(RTCAIE | RTCAIFG); @@ -224,7 +225,9 @@ module PlatformRealTimeClockP { * * If we didn't read a valid time, we just accumulate the reasons, * and leave RTCRDYIE enabled so we get another interrupt as soon - * as the time is valid. */ + * as the time is valid. + */ + RTCCTL01 |= RTCRDYIE; memset(&now, 0, sizeof(now)); time_is_valid = RTCRDY & RTCCTL01; diff --git a/tos/platforms/surf/hardware/usci/PlatformSerialC.nc b/tos/platforms/surf/hardware/usci/PlatformSerialC.nc index ab5b4a36f3..93af3454d6 100644 --- a/tos/platforms/surf/hardware/usci/PlatformSerialC.nc +++ b/tos/platforms/surf/hardware/usci/PlatformSerialC.nc @@ -7,31 +7,33 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ - /** * De-facto standard component for platform independent access to a serial port. * @@ -46,6 +48,7 @@ * @author David Moss * @author Peter A. Bigot */ + configuration PlatformSerialC { provides { interface StdControl; @@ -56,7 +59,7 @@ configuration PlatformSerialC { } implementation { - + components PlatformSerialP; StdControl = PlatformSerialP; @@ -66,8 +69,7 @@ implementation { UartByte = UartC; Msp430UsciError = UartC; PlatformSerialP.Resource -> UartC.Resource; - + components LedsC; PlatformSerialP.Leds -> LedsC; - } diff --git a/tos/platforms/surf/hardware/usci/PlatformSerialP.nc b/tos/platforms/surf/hardware/usci/PlatformSerialP.nc index 25a9c8f8d0..1a31866ae4 100644 --- a/tos/platforms/surf/hardware/usci/PlatformSerialP.nc +++ b/tos/platforms/surf/hardware/usci/PlatformSerialP.nc @@ -7,39 +7,42 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author David Moss * @author Peter A. Bigot */ + module PlatformSerialP { provides { interface StdControl; } - uses { interface Resource; interface Leds; @@ -47,14 +50,14 @@ module PlatformSerialP { } implementation { - - command error_t StdControl.start(){ + + command error_t StdControl.start() { return call Resource.immediateRequest(); } - - command error_t StdControl.stop(){ + + command error_t StdControl.stop() { return call Resource.release(); } - + event void Resource.granted() { } } diff --git a/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc b/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc index 1cb418e815..bd6d90b1d6 100644 --- a/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc +++ b/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc @@ -4,29 +4,31 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the People Power Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usci.h" @@ -49,5 +51,4 @@ configuration PlatformUsciInitC { SpiB0C.SIMO -> GIO.UCB0SIMO; SpiB0C.SOMI -> GIO.UCB0SOMI; SpiB0C.CLK -> GIO.UCB0CLK; - } diff --git a/tos/platforms/surf/platform_message.h b/tos/platforms/surf/platform_message.h index 67df30cbb8..f243ef48d9 100644 --- a/tos/platforms/surf/platform_message.h +++ b/tos/platforms/surf/platform_message.h @@ -1,4 +1,3 @@ - /** * @author Philip Levis * @author David Moss From fe573de7017306d41019d22d6a992f1d1b89579c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 12 Jun 2011 16:10:26 -0700 Subject: [PATCH 095/411] bring rtc code in from OSIAN --- apps/tests/msp430/rtc/Rfc868/Makefile | 2 + apps/tests/msp430/rtc/Rfc868/TestAppC.nc | 12 + apps/tests/msp430/rtc/Rfc868/TestP.nc | 76 +++++ tos/chips/msp430/rtc/Rtc.h | 37 +++ tos/chips/msp430/rtc/Rtc.nc | 173 ++++++++++ tos/chips/msp430/rtc/RtcAlarm.nc | 115 +++++++ tos/chips/msp430/rtc/RtcC.nc | 70 ++++ tos/chips/msp430/rtc/RtcP.nc | 405 +++++++++++++++++++++++ tos/lib/rtc/RealTimeClock.h | 70 ++++ tos/lib/rtc/RealTimeClock.nc | 156 +++++++++ tos/lib/rtc/RealTimeClockC.nc | 14 + tos/lib/rtc/Rfc868.nc | 78 +++++ tos/lib/rtc/Rfc868P.nc | 191 +++++++++++ tos/lib/rtc/convert.c | 176 ++++++++++ 14 files changed, 1575 insertions(+) create mode 100644 apps/tests/msp430/rtc/Rfc868/Makefile create mode 100644 apps/tests/msp430/rtc/Rfc868/TestAppC.nc create mode 100644 apps/tests/msp430/rtc/Rfc868/TestP.nc create mode 100644 tos/chips/msp430/rtc/Rtc.h create mode 100644 tos/chips/msp430/rtc/Rtc.nc create mode 100644 tos/chips/msp430/rtc/RtcAlarm.nc create mode 100644 tos/chips/msp430/rtc/RtcC.nc create mode 100644 tos/chips/msp430/rtc/RtcP.nc create mode 100644 tos/lib/rtc/RealTimeClock.h create mode 100644 tos/lib/rtc/RealTimeClock.nc create mode 100644 tos/lib/rtc/RealTimeClockC.nc create mode 100644 tos/lib/rtc/Rfc868.nc create mode 100644 tos/lib/rtc/Rfc868P.nc create mode 100644 tos/lib/rtc/convert.c diff --git a/apps/tests/msp430/rtc/Rfc868/Makefile b/apps/tests/msp430/rtc/Rfc868/Makefile new file mode 100644 index 0000000000..8726a77a70 --- /dev/null +++ b/apps/tests/msp430/rtc/Rfc868/Makefile @@ -0,0 +1,2 @@ +COMPONENT=TestAppC +include $(MAKERULES) diff --git a/apps/tests/msp430/rtc/Rfc868/TestAppC.nc b/apps/tests/msp430/rtc/Rfc868/TestAppC.nc new file mode 100644 index 0000000000..0231bb3019 --- /dev/null +++ b/apps/tests/msp430/rtc/Rfc868/TestAppC.nc @@ -0,0 +1,12 @@ +configuration TestAppC { +} implementation { + components TestP; + components MainC; + + TestP.Boot -> MainC; + + components Rfc868P; + TestP.Rfc868 -> Rfc868P; + +#include +} diff --git a/apps/tests/msp430/rtc/Rfc868/TestP.nc b/apps/tests/msp430/rtc/Rfc868/TestP.nc new file mode 100644 index 0000000000..4611d47ccc --- /dev/null +++ b/apps/tests/msp430/rtc/Rfc868/TestP.nc @@ -0,0 +1,76 @@ +#include + +module TestP { + uses interface Boot; + uses interface Rfc868; +#include +} implementation { + +#include + + typedef struct test_t { + uint32_t time_rfc868; + struct tm time_tm; + } test_t; + + const test_t tests[] = { + { 2208988800UL, { tm_yday:0, tm_wday: 4, tm_year: 70, tm_mon: 0, tm_mday: 1, tm_hour: 0, tm_min: 0, tm_sec: 0 } }, + { 2398291200UL, { tm_yday:0, tm_wday: 4, tm_year: 76, tm_mon: 0, tm_mday: 1, tm_hour: 0, tm_min: 0, tm_sec: 0 } }, + { 2524521600UL, { tm_yday:0, tm_wday: 2, tm_year: 80, tm_mon: 0, tm_mday: 1, tm_hour: 0, tm_min: 0, tm_sec: 0 } }, + { 2629584000UL, { tm_yday:120, tm_wday: 0, tm_year: 83, tm_mon: 4, tm_mday: 1, tm_hour: 0, tm_min: 0, tm_sec: 0 } }, + { 3498384181UL, { tm_yday:313, tm_wday: 3, tm_year: 110, tm_mon: 10, tm_mday: 10, tm_hour: 13, tm_min: 23, tm_sec: 1 } }, + { 0, { tm_yday:0, tm_wday: 1, tm_year: 0, tm_mon: 0, tm_mday: 1, tm_hour: 0, tm_min: 0, tm_sec: 0 } }, + }; + + void testConversion () { + const test_t* tp = tests; + + while (1) { + error_t rc; + struct tm time_tm; + uint32_t time_rfc868; + + memset(&time_tm, 0xff, sizeof(time_tm)); + rc = call Rfc868.toTime(tp->time_rfc868, &time_tm); + ASSERT_EQUAL(time_tm.tm_sec, tp->time_tm.tm_sec); + ASSERT_EQUAL(time_tm.tm_min, tp->time_tm.tm_min); + ASSERT_EQUAL(time_tm.tm_hour, tp->time_tm.tm_hour); + ASSERT_EQUAL(time_tm.tm_mday, tp->time_tm.tm_mday); + ASSERT_EQUAL(time_tm.tm_mon, tp->time_tm.tm_mon); + ASSERT_EQUAL(time_tm.tm_year, tp->time_tm.tm_year); + ASSERT_EQUAL(time_tm.tm_wday, tp->time_tm.tm_wday); + ASSERT_EQUAL(time_tm.tm_yday, tp->time_tm.tm_yday); + + time_rfc868 = call Rfc868.fromTime(&tp->time_tm); + ASSERT_EQUAL_U32(time_rfc868, tp->time_rfc868); + + if (! tp->time_rfc868) { + break; + } + ++tp; + } + } + + void testEpochConstant () { + error_t rc; + struct tm posix; + + ASSERT_EQUAL_U32(2208988800UL, call Rfc868.posixEpochOffset()); + memset(&posix, 0xff, sizeof(posix)); + rc = call Rfc868.toTime(call Rfc868.posixEpochOffset(), &posix); + ASSERT_EQUAL(0, posix.tm_sec); + ASSERT_EQUAL(0, posix.tm_min); + ASSERT_EQUAL(0, posix.tm_hour); + ASSERT_EQUAL(1, posix.tm_mday); + ASSERT_EQUAL(0, posix.tm_mon); + ASSERT_EQUAL(70, posix.tm_year); + ASSERT_EQUAL(4, posix.tm_wday); + ASSERT_EQUAL(0, posix.tm_yday); + } + + event void Boot.booted () { + testEpochConstant(); + testConversion(); + ALL_TESTS_PASSED(); + } +} diff --git a/tos/chips/msp430/rtc/Rtc.h b/tos/chips/msp430/rtc/Rtc.h new file mode 100644 index 0000000000..e9c15db4f3 --- /dev/null +++ b/tos/chips/msp430/rtc/Rtc.h @@ -0,0 +1,37 @@ +/** + * @author David Moss + */ + +#ifndef RTC_H +#define RTC_H + +/** + * Real-Time Clock Control Register 1 Bit Positions + */ +enum rtcctl1_e { + RTCCTL1_RTCBCD = 7, + RTCCTL1_RTCHOLD = 6, + RTCCTL1_RTCMODE = 5, + RTCCTL1_RTCRDY = 4, + RTCCTL1_RTCSSEL = 2, + RTCCTL1_RTCTEV = 0, +}; + +/** + * Real-Time Clock Control 0 Register Bit Positions + */ +enum rtcctl0_e { + RTCCTL0_RTCTEVIE = 6, + RTCCTL0_RTCAIE = 5, + RTCCTL0_RTCRDYIE = 4, + + RTCCTL0_RTCTEVIFT = 2, + RTCCTL0_RTCAIFG = 1, + RTCCTL0_RTCRDYIFG = 0, +}; + +enum rtc_alarm_e { + RTC_ENABLE_ALARM = 0x80, +}; + +#endif diff --git a/tos/chips/msp430/rtc/Rtc.nc b/tos/chips/msp430/rtc/Rtc.nc new file mode 100644 index 0000000000..c2f3cadf40 --- /dev/null +++ b/tos/chips/msp430/rtc/Rtc.nc @@ -0,0 +1,173 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +interface Rtc { + + /** + * RTC was updated + */ + async event void fired(); + + /** + * Use binary coded decimal instead of hex + * @param useBcd TRUE to report units in BCD, FALSE to report units in hex + */ + command void setBcd(bool useBcd); + + /** + * @return TRUE if we're using BCD, FALSE if we're using Hex + */ + command bool isBcd(); + + /** + * @return TRUE if values are safe to read, FALSE if they're not + */ + command bool isReady(); + + /** + * Hex : [0][0][seconds 0 to 59] + * BCD : [0][3: Seconds - high digit 0 to 5][4: Seconds - low digit 0 to 9] + * @return seconds + */ + command uint8_t getSecond(); + + /** + * Hex : [0][0][minutes 0 to 59] + * BCD : [0][3: minutes - high digit 0 to 5][4: minutes - low digit 0 to 9] + * @return minutes + */ + command uint8_t getMinute(); + + /** + * Hex : [0][0][0][hours 0 to 24] + * BCD : [0][0][2: hours - high digit 0 to 2][4: hours - low digit 0 to 9] + * @return hours + */ + command uint8_t getHour(); + + /** + * [0][0][0][0][0][day of week 0 to 6] + * @return the day of the week + */ + command uint8_t getDayOfWeek(); + + /** + * Hex : [0][0][0][day of month 1 to 28, 29, 30, 31] + * BCD : [0][0][2: d.o.m. - high digit 0 to 3][4: d.o.m - low digit 0 to 9] + * @return the day of the month + */ + command uint8_t getDayOfMonth(); + + /** + * Hex : [0][0][0][0][month 1 to 12] + * BCD : [0][0][0][1: month - high digit 0 to 3][4: month - low digit 0 to 9] + * @return the month + */ + command uint8_t getMonth(); + + /** + * Hex : [8: year - low byt of 0 to 4095] + * BCD : [4: decade 0 to 9][4: year - lowest digit 0 to 9] + * @return the year low-byte + */ + command uint8_t getYearL(); + + /** + * Hex : [0][0][0][0][4: year - high byte of 0 to 4095] + * BCD : [0][3: century - high digit 0 to 4][4: century - low digit 0 to 9] + * @return the year high-byte + */ + command uint8_t getYearH(); + + /** + * Hex : [0][0][seconds 0 to 59] + * BCD : [0][3: Seconds - high digit 0 to 5][4: Seconds - low digit 0 to 9] + * @param second The current second + */ + command void setSecond(uint8_t second); + + /** + * Hex : [0][0][minutes 0 to 59] + * BCD : [0][3: minutes - high digit 0 to 5][4: minutes - low digit 0 to 9] + * @param minute The current minute + */ + command void setMinute(uint8_t minute); + + /** + * Hex : [0][0][0][hours 0 to 24] + * BCD : [0][0][2: hours - high digit 0 to 2][4: hours - low digit 0 to 9] + * @param hour The current hour + */ + command void setHour(uint8_t hour); + + /** + * [0][0][0][0][0][day of week 0 to 6] + * @param dayOfWeek the current day of the week + */ + command void setDayOfWeek(uint8_t dayOfWeek); + + /** + * Hex : [0][0][0][day of month 1 to 28, 29, 30, 31] + * BCD : [0][0][2: d.o.m. - high digit 0 to 3][4: d.o.m - low digit 0 to 9] + * @param dayOfMonth the current day of the month + */ + command void setDayOfMonth(uint8_t dayOfMonth); + + /** + * Hex : [0][0][0][0][month 1 to 12] + * BCD : [0][0][0][1: month - high digit 0 to 3][4: month - low digit 0 to 9] + * @param month the current month + */ + command void setMonth(uint8_t month); + + /** + * Hex : [8: year - low byt of 0 to 4095] + * BCD : [4: decade 0 to 9][4: year - lowest digit 0 to 9] + * @param yearL the current year low-byte + */ + command void setYearL(uint8_t yearL); + + /** + * Hex : [0][0][0][0][4: year - high byte of 0 to 4095] + * BCD : [0][3: century - high digit 0 to 4][4: century - low digit 0 to 9] + * @param yearH the current year high-byte + */ + command void setYearH(uint8_t yearH); +} diff --git a/tos/chips/msp430/rtc/RtcAlarm.nc b/tos/chips/msp430/rtc/RtcAlarm.nc new file mode 100644 index 0000000000..0bea4f32ba --- /dev/null +++ b/tos/chips/msp430/rtc/RtcAlarm.nc @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ +interface RtcAlarm { + + /** + * Start the RTC alarm + */ + command void start(); + + /** + * Stop the alarm without clearing the settings + */ + command void stop(); + + /** + * Clear the alarm settings and stop the alarm + */ + command void clear(); + + /** + * Hex : [0][0][minutes 0 to 59] + * BCD : [0][3: minutes - high digit 0 to 5][4: minutes - low digit 0 to 9] + * @param minute The current minute + */ + command void setMinute(uint8_t minute); + + /** + * Hex : [0][0][0][hours 0 to 24] + * BCD : [0][0][2: hours - high digit 0 to 2][4: hours - low digit 0 to 9] + * @param hour The current hour + */ + command void setHour(uint8_t hour); + + /** + * [0][0][0][0][0][day of week 0 to 6] + * @param dayOfWeek the current day of the week + */ + command void setDayOfWeek(uint8_t dayOfWeek); + + /** + * Hex : [0][0][0][day of month 1 to 28, 29, 30, 31] + * BCD : [0][0][2: d.o.m. - high digit 0 to 3][4: d.o.m - low digit 0 to 9] + * @param dayOfMonth the current day of the month + */ + command void setDayOfMonth(uint8_t dayOfMonth); + + /** + * Hex : [0][0][minutes 0 to 59] + * BCD : [0][3: minutes - high digit 0 to 5][4: minutes - low digit 0 to 9] + * @return minutes + */ + command uint8_t getMinute(); + + /** + * Hex : [0][0][0][hours 0 to 24] + * BCD : [0][0][2: hours - high digit 0 to 2][4: hours - low digit 0 to 9] + * @return hours + */ + command uint8_t getHour(); + + /** + * [0][0][0][0][0][day of week 0 to 6] + * @return the day of the week + */ + command uint8_t getDayOfWeek(); + + /** + * Hex : [0][0][0][day of month 1 to 28, 29, 30, 31] + * BCD : [0][0][2: d.o.m. - high digit 0 to 3][4: d.o.m - low digit 0 to 9] + * @return the day of the month + */ + command uint8_t getDayOfMonth(); + + /** + * The alarm fired + */ + async event void fired(); +} diff --git a/tos/chips/msp430/rtc/RtcC.nc b/tos/chips/msp430/rtc/RtcC.nc new file mode 100644 index 0000000000..f1b0e51c2e --- /dev/null +++ b/tos/chips/msp430/rtc/RtcC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * TODO : The interrupt causes the microcontroller to enter a low power + * state and not come out of it, so other code (like a spinning task somewhere + * in the background) is not executed properly. + * + * We need to revisit that remaining issue and finish unit testing + * Also, the atomic block added to the interrupt might be redundant since + * a TOSH_SIGNAL should be atomic. IAR mangler might not make it so though. + * + * @author David Moss + */ + +configuration RtcC { + provides { + interface StdControl; + interface Rtc; + interface RtcAlarm; + } +} + +implementation { + + components RtcP; + StdControl = RtcP; + Rtc = RtcP; + RtcAlarm = RtcP; + + // Since RTC is optional, we don't want to include it just to initialize it. + // So if this happens to be included at compile time, we make sure it's wired + // in properly for initialization through PlatformC.PeripheralInit. + + components PlatformC; + PlatformC.PeripheralInit -> RtcP; +} diff --git a/tos/chips/msp430/rtc/RtcP.nc b/tos/chips/msp430/rtc/RtcP.nc new file mode 100644 index 0000000000..917ca0779e --- /dev/null +++ b/tos/chips/msp430/rtc/RtcP.nc @@ -0,0 +1,405 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rtc.h" + +/** + * TODO Year should be a single 16-bit number + * @author David Moss + * @author Peter Bigot + */ + +module RtcP { + provides { + interface Init; + interface StdControl; + interface Rtc; + interface RtcAlarm; + } +} + +implementation { + + /** The rtc interrupt vector contents from the last async interrupt event */ + volatile uint8_t rtciv; + + /***************** Prototypes ****************/ + bool ready(); + task void rtcInterruptHandler(); + + /***************** Init Commands ****************/ + command error_t Init.init() { + RTCCTL1 = (1 << RTCCTL1_RTCMODE); + return SUCCESS; + } + + /***************** StdControl Commands ****************/ + command error_t StdControl.start() { + RTCCTL1 = (RTCCTL1 & ~(1 << RTCCTL1_RTCHOLD)); + RTCCTL0 |= (1 << RTCCTL0_RTCRDYIE); + return SUCCESS; + } + + command error_t StdControl.stop() { + RTCCTL1 &= ~(1 << RTCCTL1_RTCHOLD); + return SUCCESS; + } + + /***************** Rtc Commands ****************/ + + /** + * Use binary coded decimal instead of hex + * @param useBcd TRUE to report units in BCD, FALSE to report units in hex + */ + command void Rtc.setBcd(bool useBcd) { + RTCCTL1 = (RTCCTL1 & ~(1 << RTCCTL1_RTCBCD)) | (useBcd << RTCCTL1_RTCBCD); + } + + /** + * @return TRUE if we're using BCD, FALSE if we're using Hex + */ + command bool Rtc.isBcd() { + return (RTCCTL1 >> RTCCTL1_RTCBCD) & 0x1; + } + + /** + * @return TRUE if values are safe to read, FALSE if they're not + */ + command bool Rtc.isReady() { + return ready(); + } + + /** + * Hex : [0][0][seconds 0 to 59] + * BCD : [0][3: Seconds - high digit 0 to 5][4: Seconds - low digit 0 to 9] + * @return seconds + */ + command uint8_t Rtc.getSecond() { + return RTCSEC; + } + + /** + * Hex : [0][0][minutes 0 to 59] + * BCD : [0][3: minutes - high digit 0 to 5][4: minutes - low digit 0 to 9] + * @return minutes + */ + command uint8_t Rtc.getMinute() { + return RTCMIN; + } + + /** + * Hex : [0][0][0][hours 0 to 24] + * BCD : [0][0][2: hours - high digit 0 to 2][4: hours - low digit 0 to 9] + * @return hours + */ + command uint8_t Rtc.getHour() { + return RTCHOUR; + } + + /** + * [0][0][0][0][0][day of week 0 to 6] + * @return the day of the week + */ + command uint8_t Rtc.getDayOfWeek() { + return RTCDOW; + } + + /** + * Hex : [0][0][0][day of month 1 to 28, 29, 30, 31] + * BCD : [0][0][2: d.o.m. - high digit 0 to 3][4: d.o.m - low digit 0 to 9] + * @return the day of the month + */ + command uint8_t Rtc.getDayOfMonth() { + return RTCDAY; + } + + /** + * Hex : [0][0][0][0][month 1 to 12] + * BCD : [0][0][0][1: month - high digit 0 to 3][4: month - low digit 0 to 9] + * @return the month + */ + command uint8_t Rtc.getMonth() { + return RTCMON; + } + + /** + * Hex : [8: year - low byt of 0 to 4095] + * BCD : [4: decade 0 to 9][4: year - lowest digit 0 to 9] + * @return the year low-byte + */ + command uint8_t Rtc.getYearL() { + return RTCYEARL; + } + + /** + * Hex : [0][0][0][0][4: year - high byte of 0 to 4095] + * BCD : [0][3: century - high digit 0 to 4][4: century - low digit 0 to 9] + * @return the year high-byte + */ + command uint8_t Rtc.getYearH() { + return RTCYEARH; + } + + /** + * Hex : [0][0][seconds 0 to 59] + * BCD : [0][3: Seconds - high digit 0 to 5][4: Seconds - low digit 0 to 9] + * @param second The current second + */ + command void Rtc.setSecond(uint8_t second) { + RTCSEC = second; + } + + /** + * Hex : [0][0][minutes 0 to 59] + * BCD : [0][3: minutes - high digit 0 to 5][4: minutes - low digit 0 to 9] + * @param minute The current minute + */ + command void Rtc.setMinute(uint8_t minute) { + RTCMIN = minute; + } + + /** + * Hex : [0][0][0][hours 0 to 24] + * BCD : [0][0][2: hours - high digit 0 to 2][4: hours - low digit 0 to 9] + * @param hour The current hour + */ + command void Rtc.setHour(uint8_t hour) { + RTCHOUR = hour; + } + + /** + * [0][0][0][0][0][day of week 0 to 6] + * @param dayOfWeek the current day of the week + */ + command void Rtc.setDayOfWeek(uint8_t dayOfWeek) { + RTCDOW = dayOfWeek; + } + + /** + * Hex : [0][0][0][day of month 1 to 28, 29, 30, 31] + * BCD : [0][0][2: d.o.m. - high digit 0 to 3][4: d.o.m - low digit 0 to 9] + * @param dayOfMonth the current day of the month + */ + command void Rtc.setDayOfMonth(uint8_t dayOfMonth) { + RTCDAY = dayOfMonth; + } + + /** + * Hex : [0][0][0][0][month 1 to 12] + * BCD : [0][0][0][1: month - high digit 0 to 3][4: month - low digit 0 to 9] + * @param month the current month + */ + command void Rtc.setMonth(uint8_t month) { + RTCMON = month; + } + + /** + * Hex : [8: year - low byt of 0 to 4095] + * BCD : [4: decade 0 to 9][4: year - lowest digit 0 to 9] + * @param yearL the current year low-byte + */ + command void Rtc.setYearL(uint8_t yearL) { + RTCYEARL = yearL; + } + + /** + * Hex : [0][0][0][0][4: year - high byte of 0 to 4095] + * BCD : [0][3: century - high digit 0 to 4][4: century - low digit 0 to 9] + * @param yearH the current year high-byte + */ + command void Rtc.setYearH(uint8_t yearH) { + RTCYEARH = yearH; + } + + /***************** RtcAlarm Commands ****************/ + /** + * Start the RTC alarm + */ + command void RtcAlarm.start() { + RTCCTL0 |= (1 << RTCCTL0_RTCAIE); + } + + /** + * Stop the alarm without clearing the settings + */ + command void RtcAlarm.stop() { + RTCCTL0 = (RTCCTL0 & ~(1 << RTCCTL0_RTCAIE)); + } + + /** + * Clear the alarm settings and stop the alarm + */ + command void RtcAlarm.clear() { + call RtcAlarm.stop(); + RTCAMIN = 0; + RTCAHOUR = 0; + RTCADOW = 0; + RTCADAY = 0; + } + + /** + * Hex : [0][0][minutes 0 to 59] + * BCD : [0][3: minutes - high digit 0 to 5][4: minutes - low digit 0 to 9] + * @param minute The current minute + */ + command void RtcAlarm.setMinute(uint8_t minute) { + RTCAMIN = RTC_ENABLE_ALARM | minute; + } + + /** + * Hex : [0][0][0][hours 0 to 24] + * BCD : [0][0][2: hours - high digit 0 to 2][4: hours - low digit 0 to 9] + * @param hour The current hour + */ + command void RtcAlarm.setHour(uint8_t hour) { + RTCAHOUR = RTC_ENABLE_ALARM | hour; + } + + /** + * [0][0][0][0][0][day of week 0 to 6] + * @param dayOfWeek the current day of the week + */ + command void RtcAlarm.setDayOfWeek(uint8_t dayOfWeek) { + RTCADOW = RTC_ENABLE_ALARM | dayOfWeek; + } + + /** + * Hex : [0][0][0][day of month 1 to 28, 29, 30, 31] + * BCD : [0][0][2: d.o.m. - high digit 0 to 3][4: d.o.m - low digit 0 to 9] + * @param dayOfMonth the current day of the month + */ + command void RtcAlarm.setDayOfMonth(uint8_t dayOfMonth) { + RTCADAY = RTC_ENABLE_ALARM | dayOfMonth; + } + + /** + * Hex : [0][0][minutes 0 to 59] + * BCD : [0][3: minutes - high digit 0 to 5][4: minutes - low digit 0 to 9] + * @return minutes + */ + command uint8_t RtcAlarm.getMinute() { + return RTCAMIN & 0x7F; + } + + /** + * Hex : [0][0][0][hours 0 to 24] + * BCD : [0][0][2: hours - high digit 0 to 2][4: hours - low digit 0 to 9] + * @return hours + */ + command uint8_t RtcAlarm.getHour() { + return RTCAHOUR & 0x7F; + } + + /** + * [0][0][0][0][0][day of week 0 to 6] + * @return the day of the week + */ + command uint8_t RtcAlarm.getDayOfWeek() { + return RTCADOW & 0x7F; + } + + /** + * Hex : [0][0][0][day of month 1 to 28, 29, 30, 31] + * BCD : [0][0][2: d.o.m. - high digit 0 to 3][4: d.o.m - low digit 0 to 9] + * @return the day of the month + */ + command uint8_t RtcAlarm.getDayOfMonth() { + return RTCADAY & 0x7F; + } + + /***************** Interrupts ****************/ + + TOSH_SIGNAL(RTC_VECTOR) { + __bic_SR_register_on_exit(LPM4_bits); + + atomic { + rtciv = RTCIV; + post rtcInterruptHandler(); + } + } + + /***************** Functions ***************/ + + /** + * @return TRUE if the RTC values can safely be read + */ + bool ready() { + return (RTCCTL1 >> RTCCTL1_RTCRDY) & 0x1; + } + + /** + * The interrupt handler removes puts us back in synchronous context + * making it safer to execute code from the application layer. + */ + task void rtcInterruptHandler() { + switch(rtciv) { + case 0: + break; // No interrupts + + case 2: + signal Rtc.fired(); + break; // RTCRDYIFG + + case 4: + break; // RTCEVIFG + + case 6: + signal RtcAlarm.fired(); + break; // RTCAIFG + + case 8: + break; // RT0PSIFG + + case 10: + break; // RT1PSIFG + + case 12: + break; // Reserved + + case 14: + break; // Reserved + + case 16: + break; // Reserved + + default: + break; + } + } + + /***************** Defaults ****************/ + default async event void RtcAlarm.fired() { } +} diff --git a/tos/lib/rtc/RealTimeClock.h b/tos/lib/rtc/RealTimeClock.h new file mode 100644 index 0000000000..78fc15772a --- /dev/null +++ b/tos/lib/rtc/RealTimeClock.h @@ -0,0 +1,70 @@ +#ifndef REALTIMECLOCK_H_ +#define REALTIMECLOCK_H_ + +// msp430-libc include files do not define this. + +#if ! HAVE_STRUCT_TM +struct tm { + int tm_sec; /* seconds */ + int tm_min; /* minutes */ + int tm_hour; /* hours */ + int tm_mday; /* day of the month */ + int tm_mon; /* month */ + int tm_year; /* year */ + int tm_wday; /* day of the week */ + int tm_yday; /* day in the year */ + int tm_isdst; /* daylight saving time */ +}; +#endif /* HAVE_STRUCT_TM */ + +/** Options for the interval alarm. These times are expected to be + * synchronous with the RTC. A one-second interval that is not so + * synchronous is not appropriate for this interface. + */ + +typedef enum RtcIntervalMode_e { + /** Interval alarms disabled */ + RTC_INTERVAL_MODE_NONE = 0, + /** Fires each minute */ + RTC_INTERVAL_MODE_MIN, + /** Fires each hour */ + RTC_INTERVAL_MODE_HOUR, + /** Fires at noon */ + RTC_INTERVAL_MODE_1200, + /** Fires at midnight */ + RTC_INTERVAL_MODE_0000, +} RtcIntervalMode_e; + +/** Reasons why a currentTime event was signalled */ +typedef enum RtcTimeEventReason_b { + /** No specific reason (e.g., requestTime() from user) */ + RTC_REASON_NONE = 0x00, + /** Interval event occurred */ + RTC_REASON_INTERVAL = 0x01, + /** Alarm event occurred */ + RTC_REASON_ALARM = 0x02, + /** First user-level event*/ + RTC_REASON_USER1 = 0x10, + /** Second user-level event*/ + RTC_REASON_USER2 = 0x20, + /** Third user-level event*/ + RTC_REASON_USER3 = 0x40, + /** Fourth user-level event*/ + RTC_REASON_USER4 = 0x80, +} RtcTimeEventReason_b; + +/** Fields that trigger an alarm event. All enabled fields must match + * the set value for the event to fire. + */ +typedef enum RtcAlarmField_b { + /** Trigger on minute match */ + RTC_ALARM_MINUTE = 0x01, + /** Trigger on hour match */ + RTC_ALARM_HOUR = 0x02, + /** Trigger on day-of-week match */ + RTC_ALARM_DOW = 0x04, + /** Trigger on day-of-month match */ + RTC_ALARM_DOM = 0x08, +} RtcAlarmField_b; + +#endif /* REALTIMECLOCK_H_ */ diff --git a/tos/lib/rtc/RealTimeClock.nc b/tos/lib/rtc/RealTimeClock.nc new file mode 100644 index 0000000000..75f3f817ac --- /dev/null +++ b/tos/lib/rtc/RealTimeClock.nc @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "RealTimeClock.h" + +/** Interface to a real-time clock. + * + * This interface assumes hardware support for a calendar-based clock + * including date and time, with nominally one-second resolution. + * Events and operations on this clock are assumed to be synchronous + * with these date/time changes. + * + * @author Peter A. Bigot + */ + +interface RealTimeClock { + + /** Set the local time. + * + * The clock must be running. + * + * @return SUCCESS normally; EINVAL if the time pointer is null or + * the referenced structure does not represent a valid time; EOFF if + * the clock is not running. + */ + command error_t setTime (const struct tm* time); + + /** Request that the current time be provided. + * + * Since reading clock registers is not an atomic action for some + * clocks, and the instability period can be long (3ms on MSP430), + * rather than potentially delay or return an error, invoking this + * function will cause a currentTime() event to be raised the next + * time the clock is updated, possibly during the execution of this + * function. Consequently, the returned time will not be the exact + * "current time", but rather the time at which the next + * calendar-second rollover event completes. + * + * @param event_code An event bit from RtcTimeEventReason_b that + * will be included in the notification event set. Pass zero if you + * don't need to distinguish this particular event. + * + * @note The delay until a valid time is provided may be up to one + * second. + * + * @note A 1Hz or coarser event synchronous with clock rollovers can + * be obtained by using a standard timer and invoking this method in + * its notification event, providing one of the RTC_REASON_USER + * codes. + * + * @return SUCCESS, probably. + */ + command error_t requestTime (unsigned int event_code); + + /** Configure events at a periodic real-time interval. + * + * Prior to reconfiguring, any current interval event is disabled, + * meaning that if you provide an invalid argument, your previous + * configuration gets wiped. + * + * @param interval_mode the type of interval for which events should + * be signaled + * + * @return SUCCESS if the event is scheduled; EINVAL if the mode is + * not supported on this hardware. + */ + command error_t setIntervalMode (RtcIntervalMode_e interval_mode); + + /** Read the current periodic event interval mode. */ + command RtcIntervalMode_e getIntervalMode (); + + /** Set the alarm to occur at a particular time. + * + * The time of the alarm is mediated by a set of bits that indicate + * which time fields contribute to the alarm scheduling. For + * example, setting an alarm for 10:23am with field RTC_ALARM_MIN + * set but RTC_ALARM_HOUR clear would initiate an alarm at 23 + * minutes after every hour, not just 10am. + * + * @param time The time at which the alarm should occur. Only those + * fields that are specified in field_set affect the alarm schedule. + * Pass a null pointer to disable the alarm. + * + * @param field_set A bit set comprising values from RtcAlarmField_b + * indicating which fields affect the alarm. Some field conditions + * may not be supported on some RTC hardware; in that case, the + * request should be rejected with an error. + * + * @return SUCCESS if the alarm was properly scheduled; EINVAL if + * the field_set specifies an unsupported field. The alarm is + * cleared if this function does not return SUCCESS. + */ + command error_t setAlarm (const struct tm* time, + unsigned int field_set); + + /** Read the current alarm setting. + * + * @param time Where the alarm values should be stored. If + * provided, all relevant alarm fields are stored, even if they are + * not part of the field set. + * + * @return A bit set comprising values from RtcAlarmField_b + * indicating which fields are part of the alarm. A return value of + * zero indicates that no alarm is scheduled. + */ + command unsigned int getAlarm (struct tm* time); + + /** Notification of the time of an activity. + * + * This event is synchronous with completion of a roll-over to a + * specific time. That is, all events associated with a specific + * time should be reflected in the reason_set. + * + * @param timep Pointer to the time of the event. + * + * @param reason_set Bits are set to fields from + * RtcTimeEventReason_b to indicate what caused this event to fire. + * Examples are RTC_REASON_INTERVAL, RTC_REASON_ALARM, and anything + * provided by invoking requestTime(). + */ + async event void currentTime (const struct tm* timep, + unsigned int reason_set); +} diff --git a/tos/lib/rtc/RealTimeClockC.nc b/tos/lib/rtc/RealTimeClockC.nc new file mode 100644 index 0000000000..ef98e92d35 --- /dev/null +++ b/tos/lib/rtc/RealTimeClockC.nc @@ -0,0 +1,14 @@ +configuration RealTimeClockC { + provides { + interface StdControl; + interface RealTimeClock; + interface Rfc868; + } +} implementation { + components PlatformRealTimeClockC; + StdControl = PlatformRealTimeClockC; + RealTimeClock = PlatformRealTimeClockC; + + components Rfc868P; + Rfc868 = Rfc868P; +} diff --git a/tos/lib/rtc/Rfc868.nc b/tos/lib/rtc/Rfc868.nc new file mode 100644 index 0000000000..7307a7857d --- /dev/null +++ b/tos/lib/rtc/Rfc868.nc @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "RealTimeClock.h" + +/** Support conversions between RFC868 seconds-since-epoch and + * standard struct tm breakdowns. + * + * @author Peter A. Bigot + */ + +interface Rfc868 { + /** Calculate an RFC868 time from a time structure. + * + * RFC868 expresses times as the number of atomic seconds since its + * epoch, 1900-01-01T00:00:00Z. + * + * @param time The time for which an epoch-relative offset is + * required. tm_sec, tm_min, tm_hour, tm_mon, tm_mday, and tm_year + * contribute; all other fields are ignored. + * + * @return Atomic seconds since epoch. Zero if the timepor + */ + command uint32_t fromTime (const struct tm* time); + + /** Convert an RFC868 time to a time structure. + * + * @param time_rfc868 Atomic seconds since the RFC868 epoch. + * + * @param time Where to store the resulting time. Fields tm_sec, + * tm_min, tm_hour, tm_mday, tm_mon, tm_year, tm_wday, and tm_yday + * are set. + * + * @return SUCCESS, or EINVAL if time is a null pointer. + */ + command error_t toTime (uint32_t time_rfc868, + struct tm* time); + + /** Return the offset, in seconds, of the POSIX epoch + * (1970-01-01T00:00:00Z) from the RFC868 epoch + * (1900-01-01T00:00:00Z). + * + * @return 2208988800 */ + command uint32_t posixEpochOffset (); +} diff --git a/tos/lib/rtc/Rfc868P.nc b/tos/lib/rtc/Rfc868P.nc new file mode 100644 index 0000000000..4e22f65b7e --- /dev/null +++ b/tos/lib/rtc/Rfc868P.nc @@ -0,0 +1,191 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "RealTimeClock.h" + +/** Implement conversions between RFC868 seconds-since-epoch and + * standard struct tm breakdowns. + * + * @author Peter A. Bigot + */ + +module Rfc868P { + provides { + interface Rfc868; + } +} implementation { + +#define SECONDS_PER_MINUTE (60) +#define SECONDS_PER_HOUR (60L * SECONDS_PER_MINUTE) +#define SECONDS_PER_DAY (24L * SECONDS_PER_HOUR) + +/** RFC868 epoch is 1900-01-01T00:00:00Z which was a Monday */ +#define EPOCH_WDAY (1) +#define DAYS_PER_WEEK (7) +#define DAYS_PER_YEAR (365) +#define MONTH_IDX_FEBRUARY (1) + + static const uint8_t daysPerMonth[] = { 31, 28, 31, 30, 31, 30, + 31, 31, 30, 31, 30, 31 }; + + /* Convert a POSIX tm structure to an RFC868 time (seconds since + * 1900-01-01T00:00:00Z), without assuming that day-of-year is valid + * on input + */ + command uint32_t Rfc868.fromTime (const struct tm* time) { + uint32_t time_sec = 0; + unsigned int days_since_epoch; + int is_leap_year; + int i; + + time_sec = time->tm_sec; + time_sec += time->tm_min * SECONDS_PER_MINUTE; + time_sec += time->tm_hour * SECONDS_PER_HOUR; + + /* 1900CE (year zero) is the only leap year in the representable + * range that is not correctly identified by checking for a multiple + * of four + */ + is_leap_year = (0 == (time->tm_year % 4)) && (0 != time->tm_year); + + days_since_epoch = time->tm_mday - 1; + for (i = 0; i < time->tm_mon; ++i) { + days_since_epoch += daysPerMonth[i]; + if (is_leap_year && (MONTH_IDX_FEBRUARY == i)) { + ++days_since_epoch; + } + } + for (i = time->tm_year - 1; 0 <= i; --i) { + days_since_epoch += DAYS_PER_YEAR; + if ((0 == (i % 4)) && (0 != i)) { + ++days_since_epoch; + } + } + time_sec += days_since_epoch * SECONDS_PER_DAY; + return time_sec; + } + + /* Convert an RFC868 time (seconds since 1900-01-01T00:00:00Z) into + * a POSIX tm structure, including correct values for day-of-week + * and day-of-year + */ + command error_t Rfc868.toTime (uint32_t time_rfc868, + struct tm* time) { + int is_leap_year; + unsigned int days_since_epoch; + int days_per_year; + long int seconds_per_year; + int days_per_month; + long int seconds_per_month; + + if (! time) { + return EINVAL; + } + memset(time, 0, sizeof(*time)); + + /* To simplify the loop, we adjust for the previous year before + * calculating the adjustment for the current year to see if it + * needs to be applied. Note that we have to special-case 1900, + * which is not a leap year though it is exactly divisible by + * four. + */ + time->tm_year = -1; + days_since_epoch = 0; + days_per_year = 0; + seconds_per_year = 0; + do { + days_since_epoch += days_per_year; + time_rfc868 -= seconds_per_year; + ++time->tm_year; + days_per_year = DAYS_PER_YEAR; + is_leap_year = (0 == (time->tm_year % 4)) && (0 != time->tm_year); + if (is_leap_year) { + ++days_per_year; + } + seconds_per_year = days_per_year * SECONDS_PER_DAY; + } while (time_rfc868 >= seconds_per_year); + + /* Same trick: adjust for previous month, calculate duration of + * month, see if we're in that month. Special-case February in leap + * years. + */ + days_per_month = 0; + seconds_per_month = 0; + time->tm_mon = -1; + do { + days_since_epoch += days_per_month; + time->tm_yday += days_per_month; + time_rfc868 -= seconds_per_month; + ++time->tm_mon; + days_per_month = daysPerMonth[time->tm_mon]; + if (is_leap_year && (MONTH_IDX_FEBRUARY == time->tm_mon)) { + ++days_per_month; + } + seconds_per_month = days_per_month * SECONDS_PER_DAY; + } while (time_rfc868 >= seconds_per_month); + + /* Loop with subtraction rather than divide/modulus because this + * goes on an embedded device and code size is smaller this way. + * This calculation is not time-critical, and the loops are short + * anyway. + */ + while (time_rfc868 >= SECONDS_PER_DAY) { + time_rfc868 -= SECONDS_PER_DAY; + ++time->tm_mday; + } + + /* Adjust epoch/year day count then change tm_mday base to be 1 */ + days_since_epoch += time->tm_mday; + time->tm_yday += time->tm_mday; + ++time->tm_mday; + + while (time_rfc868 >= SECONDS_PER_HOUR) { + time_rfc868 -= SECONDS_PER_HOUR; + ++time->tm_hour; + } + + while (time_rfc868 >= SECONDS_PER_MINUTE) { + time_rfc868 -= SECONDS_PER_MINUTE; + ++time->tm_min; + } + + time->tm_sec = time_rfc868; + time->tm_wday = (EPOCH_WDAY + days_since_epoch) % DAYS_PER_WEEK; + return SUCCESS; + } + + command uint32_t Rfc868.posixEpochOffset () { return 2208988800UL; } +} diff --git a/tos/lib/rtc/convert.c b/tos/lib/rtc/convert.c new file mode 100644 index 0000000000..f9290cf63d --- /dev/null +++ b/tos/lib/rtc/convert.c @@ -0,0 +1,176 @@ +#include +#include +#include +#include +#include + +enum { + SECONDS_PER_MINUTE = 60, + SECONDS_PER_HOUR = 60 * SECONDS_PER_MINUTE, + SECONDS_PER_DAY = 24 * SECONDS_PER_HOUR, + /** RFC868 epoch is 1900-01-01T00:00:00Z which was a Monday */ + EPOCH_WDAY = 1, + DAYS_PER_WEEK = 7, + DAYS_PER_YEAR = 365, + MONTH_IDX_FEBRUARY = 1, +}; + +static const uint8_t daysPerMonth[] = { 31, 28, 31, 30, 31, 30, + 31, 31, 30, 31, 30, 31 }; + +/** Convert an RFC868 time (seconds since 1900-01-01T00:00:00Z) into a + * POSIX tm structure, including correct values for day-of-week and + * day-of-year + */ + +static const struct tm* +rfc868ToStruct (uint32_t time_sec) { + static struct tm time_tm; + int is_leap_year; + unsigned int days_since_epoch; + int days_per_year; + long int seconds_per_year; + int days_per_month; + long int seconds_per_month; + + memset(&time_tm, 0, sizeof(time_tm)); + + /* To simplify the loop, we adjust for the previous year before + * calculating the adjustment for the current year to see if it + * needs to be applied. Note that we have to special-case 1900, + * which is not a leap year though it is exactly divisible by + * four. + */ + + time_tm.tm_year = -1; + days_since_epoch = 0; + days_per_year = 0; + seconds_per_year = 0; + do { + days_since_epoch += days_per_year; + time_sec -= seconds_per_year; + ++time_tm.tm_year; + days_per_year = DAYS_PER_YEAR; + is_leap_year = (0 == (time_tm.tm_year % 4)) && (0 != time_tm.tm_year); + if (is_leap_year) { + ++days_per_year; + } + seconds_per_year = days_per_year * SECONDS_PER_DAY; + } while (time_sec >= seconds_per_year); + + /* Same trick: adjust for previous month, calculate duration of + * month, see if we're in that month. Special-case February in leap + * years. + */ + + days_per_month = 0; + seconds_per_month = 0; + time_tm.tm_mon = -1; + do { + days_since_epoch += days_per_month; + time_tm.tm_yday += days_per_month; + time_sec -= seconds_per_month; + ++time_tm.tm_mon; + days_per_month = daysPerMonth[time_tm.tm_mon]; + if (is_leap_year && (MONTH_IDX_FEBRUARY == time_tm.tm_mon)) { + ++days_per_month; + } + seconds_per_month = days_per_month * SECONDS_PER_DAY; + } while (time_sec >= seconds_per_month); + + /* Loop with subtraction rather than divide/modulus because this + * goes on an embedded device and code size is smaller this way. + * This calculation is not time-critical, and the loops are short + * anyway. + */ + while (time_sec >= SECONDS_PER_DAY) { + time_sec -= SECONDS_PER_DAY; + ++time_tm.tm_mday; + } + + /* Adjust epoch/year day count then change tm_mday base to be 1 */ + days_since_epoch += time_tm.tm_mday; + time_tm.tm_yday += time_tm.tm_mday; + ++time_tm.tm_mday; + + while (time_sec >= SECONDS_PER_HOUR) { + time_sec -= SECONDS_PER_HOUR; + ++time_tm.tm_hour; + } + + while (time_sec >= SECONDS_PER_MINUTE) { + time_sec -= SECONDS_PER_MINUTE; + ++time_tm.tm_min; + } + time_tm.tm_sec = time_sec; + time_tm.tm_wday = (EPOCH_WDAY + days_since_epoch) % DAYS_PER_WEEK; + return &time_tm; +} + +/** Convert a POSIX tm structure to an RFC868 time (seconds since + * 1900-01-01T00:00:00Z), without assuming that day-of-year is valid + * on input + */ + +static uint32_t +structToRfc868 (const struct tm* tmp) { + uint32_t time_sec = 0; + unsigned int days_since_epoch; + int is_leap_year; + int i; + + time_sec = tmp->tm_sec; + time_sec += tmp->tm_min * SECONDS_PER_MINUTE; + time_sec += tmp->tm_hour * SECONDS_PER_HOUR; + + /* 1900CE (year zero) is the only leap year in the representable + * range that is not correctly identified by checking for a multiple + * of four + */ + is_leap_year = (0 == (tmp->tm_year % 4)) && (0 != tmp->tm_year); + + days_since_epoch = tmp->tm_mday - 1; + for (i = 0; i < tmp->tm_mon; ++i) { + days_since_epoch += daysPerMonth[i]; + if (is_leap_year && (MONTH_IDX_FEBRUARY == i)) { + ++days_since_epoch; + } + } + for (i = tmp->tm_year - 1; 0 <= i; --i) { + days_since_epoch += DAYS_PER_YEAR; + if ((0 == (i % 4)) && (0 != i)) { + ++days_since_epoch; + } + } + time_sec += days_since_epoch * SECONDS_PER_DAY; + return time_sec; +} + + +int main (int argc, + char* argv[]) { + int ai; + uint32_t time_sec; + + // date +'%s %c' + // 1289395381 Wed 10 Nov 2010 07:23:01 AM CST => RFC868 3498384181 + // Test args: 2208988800 2398291200 2524521600 2629584000 3498384181 + + for (ai = 1; ai < argc; ++ai) { + char* ep; + time_sec = strtoul(argv[ai], &ep, 0); + if (ULONG_MAX == time_sec) { + printf("Invalid integer: %s\n", argv[ai]); + } else { + const struct tm* time_tm = rfc868ToStruct(time_sec); + + if (time_tm) { + uint32_t rtime_sec = structToRfc868(time_tm); + printf("RFC868 time %u is yday %d inverts %u: %s", time_sec, time_tm->tm_yday, rtime_sec, asctime(time_tm)); + printf("RFC868 error %d\n", rtime_sec - time_sec); + } else { + printf("Error converting RFC868 time %u\n", time_sec); + } + } + } +} From 5524f19977b8a1f8b5d66ddcc88e4e702b728e20 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 13 Jun 2011 00:21:27 -0700 Subject: [PATCH 096/411] bring in OSIAN rf1a, fix copyrights. --- apps/tests/msp430/rf1a/3103194/Makefile | 8 + apps/tests/msp430/rf1a/3103194/README.txt | 45 + apps/tests/msp430/rf1a/3103194/TestAppC.nc | 17 + apps/tests/msp430/rf1a/3103194/TestC.nc | 56 + apps/tests/msp430/rf1a/3103194/signature.asc | 7 + apps/tests/msp430/rf1a/RapidReconfig/Makefile | 3 + .../msp430/rf1a/RapidReconfig/TestAppC.nc | 21 + apps/tests/msp430/rf1a/RapidReconfig/TestP.nc | 67 + .../tests/msp430/rf1a/Rf1aRadioPower/Makefile | 3 + .../msp430/rf1a/Rf1aRadioPower/TestAppC.nc | 24 + .../tests/msp430/rf1a/Rf1aRadioPower/TestP.nc | 234 +++ tos/chips/msp430/rf1a/BareRf1aC.nc | 62 + tos/chips/msp430/rf1a/BareRf1aP.nc | 240 +++ tos/chips/msp430/rf1a/Ipv6BareRf1aC.nc | 58 + tos/chips/msp430/rf1a/Rf1a.h | 75 + tos/chips/msp430/rf1a/Rf1aC.nc | 77 + tos/chips/msp430/rf1a/Rf1aPacket.h | 91 + tos/chips/msp430/rf1a/am/Rf1aAMPacketC.nc | 72 + tos/chips/msp430/rf1a/am/Rf1aAMPacketP.nc | 119 ++ .../msp430/rf1a/am/Rf1aActiveMessageC.nc | 135 ++ .../msp430/rf1a/am/Rf1aActiveMessageP.nc | 111 ++ .../rf1a/ieee154/Rf1aIeee154MessageC.nc | 153 ++ .../rf1a/ieee154/Rf1aIeee154MessageP.nc | 86 + .../msp430/rf1a/ieee154/Rf1aIeee154PacketC.nc | 75 + .../msp430/rf1a/ieee154/Rf1aIeee154PacketP.nc | 190 ++ tos/chips/msp430/rf1a/ieee154/Rf1aPacket.nc | 96 + .../msp430/rf1a/interfaces/Ieee154Address.nc | 64 + .../msp430/rf1a/interfaces/MessageLqi.nc | 50 + .../msp430/rf1a/interfaces/MessageRssi.nc | 51 + tos/chips/msp430/rf1a/layers/Rf1aAckC.nc | 103 ++ tos/chips/msp430/rf1a/layers/Rf1aAckP.nc | 492 ++++++ .../rf1a/layers/StubLowPowerListeningC.nc | 50 + .../layers/StubPacketAcknowledgementsC.nc | 46 + .../msp430/rf1a/layers/UniqueReceiveC.nc | 64 + .../msp430/rf1a/layers/UniqueReceiveP.nc | 87 + .../msp430/rf1a/physical/HplMsp430Rf1aC.nc | 103 ++ .../msp430/rf1a/physical/HplMsp430Rf1aIf.nc | 452 +++++ .../msp430/rf1a/physical/HplMsp430Rf1aIfP.nc | 323 ++++ .../rf1a/physical/HplMsp430Rf1aInterruptP.nc | 147 ++ .../msp430/rf1a/physical/HplMsp430Rf1aP.nc | 1552 +++++++++++++++++ .../msp430/rf1a/physical/Rf1aConfigure.h | 281 +++ .../msp430/rf1a/physical/Rf1aConfigure.nc | 99 ++ .../msp430/rf1a/physical/Rf1aDumpConfig.nc | 57 + .../msp430/rf1a/physical/Rf1aDumpConfigC.nc | 365 ++++ .../msp430/rf1a/physical/Rf1aInterrupts.nc | 96 + .../msp430/rf1a/physical/Rf1aPhysical.nc | 398 +++++ .../msp430/rf1a/physical/Rf1aPhysicalC.nc | 79 + .../rf1a/physical/Rf1aPhysicalIntrospect.nc | 93 + .../rf1a/physical/Rf1aPhysicalIntrospectC.nc | 140 ++ .../rf1a/physical/Rf1aPhysicalMetadata.nc | 92 + .../msp430/rf1a/physical/Rf1aRadioPower.h | 91 + .../msp430/rf1a/physical/Rf1aRadioPower.nc | 102 ++ .../msp430/rf1a/physical/Rf1aRadioPowerC.nc | 156 ++ tos/chips/msp430/rf1a/physical/Rf1aStatus.nc | 43 + .../rf1a/physical/Rf1aTinyOsPhysicalC.nc | 82 + .../rf1a/physical/Rf1aTinyOsPhysicalP.nc | 404 +++++ .../rf1a/physical/Rf1aTransmitFragment.nc | 85 + tos/chips/msp430/rf1a/physical/smartrf_RF1A.h | 73 + .../rf1a/smartrf/CC430_50kbps_135kHzBw.h | 64 + .../rf1a/smartrf/CC430_50kbps_162kHzBw.h | 64 + tos/chips/msp430/rf1a/smartrf/README.txt | 447 +++++ tos/chips/msp430/rf1a/smartrf/RESET.h | 74 + .../rf1a/smartrf/SRFS6_868_2FSK_1p2K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_100K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_100K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_10K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_10K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_175K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_175K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_1p2K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_1p2K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_250K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_250K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_2p4K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_2p4K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_38p4K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_38p4K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_4p8K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_4p8K_SENS.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_76p8K_CUR.h | 63 + .../rf1a/smartrf/SRFS6_868_GFSK_76p8K_SENS.h | 63 + .../msp430/rf1a/smartrf/SRFS6_868_MSK_500K.h | 63 + .../msp430/rf1a/smartrf/SRFS6_PRE802154G.h | 63 + tos/chips/msp430/rf1a/smartrf/SRFS6_RESET.h | 63 + .../msp430/rf1a/smartrf/SRFS7_779_MSK_250K.h | 64 + .../rf1a/smartrf/SRFS7_868_2FSK_1p2K_SENS.h | 64 + .../rf1a/smartrf/SRFS7_868_GFSK_175K_CUR.h | 64 + .../rf1a/smartrf/SRFS7_868_GFSK_175K_SENS.h | 64 + .../rf1a/smartrf/SRFS7_868_GFSK_1p2K_CUR.h | 64 + .../rf1a/smartrf/SRFS7_868_GFSK_1p2K_SENS.h | 64 + .../rf1a/smartrf/SRFS7_868_GFSK_250K_CUR.h | 64 + .../rf1a/smartrf/SRFS7_868_GFSK_250K_SENS.h | 64 + .../rf1a/smartrf/SRFS7_868_GFSK_38p4K_CUR.h | 64 + .../rf1a/smartrf/SRFS7_868_GFSK_38p4K_SENS.h | 64 + .../rf1a/smartrf/SRFS7_902p2_GFSK_50K_135B.h | 64 + .../rf1a/smartrf/SRFS7_902p2_GFSK_50K_163B.h | 64 + tos/chips/msp430/rf1a/smartrf/SRFS7_RESET.h | 64 + .../rf1a/smartrf/SRFS7_STI_902_GFSK_1p2K.h | 64 + .../rf1a/smartrf/SRFS7_STI_902_GFSK_250K.h | 64 + tos/chips/msp430/rf1a/smartrf/TINYOSRF1A.h | 74 + .../rf1a/smartrf/configs/902_2GFSK_1p2K.srfs | Bin 0 -> 2202 bytes .../rf1a/smartrf/configs/902_2GFSK_250K.srfs | Bin 0 -> 2202 bytes .../msp430/rf1a/smartrf/configs/BASE.srfs | Bin 0 -> 2202 bytes .../rf1a/smartrf/configs/PRE802154G.srfs | Bin 0 -> 2202 bytes .../msp430/rf1a/smartrf/configs/RESET.srfs | Bin 0 -> 2202 bytes .../msp430/rf1a/smartrf/configs/SRFSBASE.srfs | Bin 0 -> 2202 bytes .../rf1a/smartrf/configs/SRFSRESET.srfs | Bin 0 -> 2202 bytes .../smartrf/configs/SRFS_902_2GFSK_1p2K.srfs | Bin 0 -> 2202 bytes .../smartrf/configs/SRFS_902_2GFSK_250K.srfs | Bin 0 -> 2202 bytes .../rf1a/smartrf/configs/SRFS_PRE802154G.srfs | Bin 0 -> 2202 bytes .../rf1a/smartrf/configs/SRFS_TINYOSRF1A.srfs | Bin 0 -> 2202 bytes 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mode 100644 index 0000000000..33b1cf519c --- /dev/null +++ b/apps/tests/msp430/rf1a/3103194/Makefile @@ -0,0 +1,8 @@ +# -*- Makefile -*- + +COMPONENT = TestAppC +BUILDDIR = build +CFLAGS = -g +OPTFLAGS = -Os + +include $(MAKERULES) diff --git a/apps/tests/msp430/rf1a/3103194/README.txt b/apps/tests/msp430/rf1a/3103194/README.txt new file mode 100644 index 0000000000..eed860cd0c --- /dev/null +++ b/apps/tests/msp430/rf1a/3103194/README.txt @@ -0,0 +1,45 @@ +Reproducer for bug 3103194 + +make surf install +make surf reinstall,2 bsl,/dev/mote/1 + +If the bug is still present, the LEDs on one of the boards will stop +blinking (due to deadlock) at some point. You decide how long you want to +wait. Prior to the fix, deadlock would generally occur within 30 seconds. + +Submitter's description of problem: + +Hi, + +I have encountered some problems using the Rf1a stack. The issue occur +(randomly) when trying to send messages, with the symptom that the send +attempt gets stuck in a loop at line 708 in HplMsp430Rf1aP.nc: + + /* Delay until we're sure the RSSI measurement is valid. + * Trick: clearChannel says RSSI is below threshold; CCA_MODE + * set XX allows carrierSense to check that it's above + * threshold. When one of those signals is asserted, RSSI is + * valid. */ + call Rf1aIf.writeRegister(MCSM1, 0x10 | (0x0f & mcsm1)); // <-- stuck here! + while (! ((IFG_clearChannel | IFG_carrierSense | IFG_rxFifoAboveThreshold) & call Rf1aIf.getIn())) { + ; // busywait + } + +mcsm1 is 51 (0x33) and RF1AIN is constantly 16 (0x10). + +I experimented with forcing 'with_cca' to FALSE but that caused it to +get stuck elsewhere or otherwise fail instead. + +Any ideas to what's going on here, and how to fix it? + +The apparent bug is fairly easy to reproduce (usually takes only a +couple of seconds) in a high contention scenario using a pair of EM430 +boards. A simple test case is attached. I used the default +smartrf_RF1A.h configuration. The test simply sends a lot of messages +and blink the LEDs upon receive and successful sends -- when the LEDs +stop blinking it's stuck. + +I'm using the latest sources from the git repository, with the latest +mspgcc4 version. + +/Staffan diff --git a/apps/tests/msp430/rf1a/3103194/TestAppC.nc b/apps/tests/msp430/rf1a/3103194/TestAppC.nc new file mode 100644 index 0000000000..903917e917 --- /dev/null +++ b/apps/tests/msp430/rf1a/3103194/TestAppC.nc @@ -0,0 +1,17 @@ +configuration TestAppC +{ +} + +implementation +{ + components MainC, ActiveMessageC, LedsC, TestC as App; + components new AMSenderC(0) as AMSenderC; + components new TimerMilliC() as Timer; + + App.Boot -> MainC; + App.Leds -> LedsC; + App.SplitControl -> ActiveMessageC; + App.Timer -> Timer; + App.AMSend -> AMSenderC; + App.Receive -> ActiveMessageC.Receive[0]; +} \ No newline at end of file diff --git a/apps/tests/msp430/rf1a/3103194/TestC.nc b/apps/tests/msp430/rf1a/3103194/TestC.nc new file mode 100644 index 0000000000..489b92adee --- /dev/null +++ b/apps/tests/msp430/rf1a/3103194/TestC.nc @@ -0,0 +1,56 @@ +module TestC +{ + uses + { + interface SplitControl; + interface Leds; + interface Boot; + interface AMSend; + interface Receive; + interface Timer as Timer; + } +} + +implementation +{ + bool m_locked = FALSE; + message_t m_msg; + + event void Boot.booted() + { + call SplitControl.start(); + } + + event void SplitControl.startDone(error_t err) + { + call Timer.startPeriodic(30); + } + + event void SplitControl.stopDone(error_t err) + { + } + + event void Timer.fired() + { + if( !m_locked ) + { + m_locked = call AMSend.send(AM_BROADCAST_ADDR, &m_msg, 0) == SUCCESS; + } + } + + event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) + { + call Leds.led0Toggle(); + return msg; + } + + event void AMSend.sendDone(message_t *msg, error_t error) + { + if( error == SUCCESS ) + { + call Leds.led1Toggle(); + } + + m_locked = FALSE; + } +} \ No newline at end of file diff --git a/apps/tests/msp430/rf1a/3103194/signature.asc b/apps/tests/msp430/rf1a/3103194/signature.asc new file mode 100644 index 0000000000..9aa8dbde3e --- /dev/null +++ b/apps/tests/msp430/rf1a/3103194/signature.asc @@ -0,0 +1,7 @@ +-----BEGIN PGP SIGNATURE----- +Version: GnuPG v1.4.11 (GNU/Linux) + +iEYEABECAAYFAkzSyL4ACgkQw4hhc9mde4GMkACgiKUTQDnHpbNb549WC489OM+r +3hYAoKsjdmycGDF5LPe0rGYYi7M1BySc +=fnZy +-----END PGP SIGNATURE----- diff --git a/apps/tests/msp430/rf1a/RapidReconfig/Makefile b/apps/tests/msp430/rf1a/RapidReconfig/Makefile new file mode 100644 index 0000000000..5345e92261 --- /dev/null +++ b/apps/tests/msp430/rf1a/RapidReconfig/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TestAppC +PFLAGS += -I$(TOSDIR)/lib/serialprintf +include $(MAKERULES) diff --git a/apps/tests/msp430/rf1a/RapidReconfig/TestAppC.nc b/apps/tests/msp430/rf1a/RapidReconfig/TestAppC.nc new file mode 100644 index 0000000000..138d185840 --- /dev/null +++ b/apps/tests/msp430/rf1a/RapidReconfig/TestAppC.nc @@ -0,0 +1,21 @@ +configuration TestAppC { +} implementation { + components TestP; + components MainC; + + TestP.Boot -> MainC; + + components new Rf1aPhysicalC(); + TestP.Rf1aResource -> Rf1aPhysicalC; + TestP.Rf1aPhysical -> Rf1aPhysicalC; + + components new MuxAlarmMilli16C(); + TestP.Alarm -> MuxAlarmMilli16C; + + components RadioMonitorC; + components LedC; + RadioMonitorC.TxActiveLed -> LedC.Green; + RadioMonitorC.RxActiveLed -> LedC.Red; + + components SerialPrintfC; +} diff --git a/apps/tests/msp430/rf1a/RapidReconfig/TestP.nc b/apps/tests/msp430/rf1a/RapidReconfig/TestP.nc new file mode 100644 index 0000000000..1079b1a1d5 --- /dev/null +++ b/apps/tests/msp430/rf1a/RapidReconfig/TestP.nc @@ -0,0 +1,67 @@ +#include + +module TestP { + uses { + interface Boot; + interface Resource as Rf1aResource; + interface Alarm; + interface Rf1aPhysical; + } +} implementation { + + bool active; + error_t result__; + + task void nextState_task() + { + error_t rc; + + if (active) { + atomic rc = result__; + printf("Send got %d\r\n", rc); + rc = call Rf1aResource.release(); + printf("Release got %d\r\n", rc); + if (SUCCESS == rc) { + active = FALSE; + call Alarm.start(10); + } + } else { + rc = call Rf1aResource.immediateRequest(); + printf("Request got %d\r\n", rc); + if (SUCCESS == rc) { + do { + rc = call Rf1aPhysical.send(&rc, sizeof(rc)); + printf("Send got %d\r\n", rc); + } while (SUCCESS != rc); + } + if (SUCCESS == rc) { + active = TRUE; + } + } + } + + async event void Alarm.fired () { post nextState_task(); } + + event void Rf1aResource.granted () { } + + async event void Rf1aPhysical.sendDone (int result) + { + atomic result__ = result; + post nextState_task(); + } + + async event void Rf1aPhysical.receiveStarted (unsigned int length) { } + async event void Rf1aPhysical.receiveDone (uint8_t* buffer, + unsigned int count, + int result) { } + async event void Rf1aPhysical.receiveBufferFilled (uint8_t* buffer, + unsigned int count) { } + async event void Rf1aPhysical.frameStarted () { } + async event void Rf1aPhysical.clearChannel () { } + async event void Rf1aPhysical.carrierSense () { } + async event void Rf1aPhysical.released () { } + + event void Boot.booted () { + post nextState_task(); + } +} diff --git a/apps/tests/msp430/rf1a/Rf1aRadioPower/Makefile b/apps/tests/msp430/rf1a/Rf1aRadioPower/Makefile new file mode 100644 index 0000000000..5345e92261 --- /dev/null +++ b/apps/tests/msp430/rf1a/Rf1aRadioPower/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TestAppC +PFLAGS += -I$(TOSDIR)/lib/serialprintf +include $(MAKERULES) diff --git a/apps/tests/msp430/rf1a/Rf1aRadioPower/TestAppC.nc b/apps/tests/msp430/rf1a/Rf1aRadioPower/TestAppC.nc new file mode 100644 index 0000000000..15a0d6db6b --- /dev/null +++ b/apps/tests/msp430/rf1a/Rf1aRadioPower/TestAppC.nc @@ -0,0 +1,24 @@ +configuration TestAppC { +} implementation { + components TestP; + components MainC; + + TestP.Boot -> MainC; + + components new Rf1aPhysicalC(); + TestP.Resource -> Rf1aPhysicalC; + TestP.Rf1aIf -> Rf1aPhysicalC; + // TestP.Rf1aPhysical -> Rf1aPhysicalC; + // TestP.Rf1aPhysicalMetadata -> Rf1aPhysicalC; + + components new Rf1aPhysicalIntrospectC(); + Rf1aPhysicalIntrospectC.Rf1aIf -> Rf1aPhysicalC; + TestP.Rf1aPhysicalIntrospect -> Rf1aPhysicalIntrospectC; + + components new Rf1aRadioPowerC(); + Rf1aRadioPowerC.Rf1aIf -> Rf1aPhysicalC; + Rf1aRadioPowerC.Rf1aPhysicalIntrospect -> Rf1aPhysicalIntrospectC; + TestP.Rf1aRadioPower -> Rf1aRadioPowerC; + +#include +} diff --git a/apps/tests/msp430/rf1a/Rf1aRadioPower/TestP.nc b/apps/tests/msp430/rf1a/Rf1aRadioPower/TestP.nc new file mode 100644 index 0000000000..1d6cd03397 --- /dev/null +++ b/apps/tests/msp430/rf1a/Rf1aRadioPower/TestP.nc @@ -0,0 +1,234 @@ +#include +#include "Rf1aConfigure.h" +#include "Rf1aRadioPower.h" + +module TestP { + uses interface Boot; + uses { + interface HplMsp430Rf1aIf as Rf1aIf; + interface Rf1aPhysicalIntrospect; + interface Rf1aRadioPower; + interface Resource; + } +#include +} implementation { +#include + + enum { + DEFAULT_TX_POWER = SMARTRF_SETTING_PATABLE0, + PATABLE_LEN = 8, + }; + + const rf1a_patable_t _patables[] = { + RF1A_TX_PATABLE_SETTINGS_INIT + }; + const int8_t _pa_levels[] = RF1A_TX_PATABLE_LEVELS_INIT; + + void resetPATABLE () + { + uint8_t patable[PATABLE_LEN]; + memset(&patable, 0, sizeof(patable)); + patable[0] = DEFAULT_TX_POWER; + call Rf1aIf.writeBurstRegister(PATABLE, patable, sizeof(patable)); + } + + bool checkPATABLEIsReset () + { + uint8_t patable[PATABLE_LEN]; + int i; + + memset(patable, 255, sizeof(patable)); + call Rf1aIf.readBurstRegister(PATABLE, patable, sizeof(patable)); + if (DEFAULT_TX_POWER != patable[0]) { + return FALSE; + } + for (i = 1; i < PATABLE_LEN; ++i) { + if (0 != patable[i]) { + return FALSE; + } + } + return TRUE; + } + + void testDefaultPower () + { + ASSERT_EQUAL(DEFAULT_TX_POWER, call Rf1aRadioPower.getTxPower_reg()); + ASSERT_TRUE(checkPATABLEIsReset()); + ASSERT_EQUAL(0, RF1A_MIN_TX_POWER_INDEX); + ASSERT_EQUAL(7, RF1A_MAX_TX_POWER_INDEX); + } + + void testBurstWrite () + { + const rf1a_patable_t* tp = _patables; + uint8_t patable[PATABLE_LEN]; + + ASSERT_TRUE(checkPATABLEIsReset()); + ASSERT_EQUAL(315, tp->freq_MHz); + ASSERT_EQUAL(PATABLE_LEN, sizeof(tp->patable)); + call Rf1aIf.writeBurstRegister(PATABLE, tp->patable, sizeof(tp->patable)); + ASSERT_TRUE(! checkPATABLEIsReset()); + call Rf1aIf.readBurstRegister(PATABLE, patable, sizeof(patable)); + ASSERT_TRUE(0 == memcmp(patable, tp->patable, sizeof(patable))); + resetPATABLE(); + } + + void testSingleReadWrite () + { + const rf1a_patable_t* tp = _patables; + uint8_t patable[PATABLE_LEN]; + int i; + + ASSERT_TRUE(checkPATABLEIsReset()); + ASSERT_EQUAL(315, tp->freq_MHz); + for (i = 0; i < PATABLE_LEN; ++i) { + call Rf1aIf.writeRegister(PATABLE, tp->patable[i]); + } + ASSERT_TRUE(! checkPATABLEIsReset()); + call Rf1aIf.readBurstRegister(PATABLE, patable, sizeof(patable)); + ASSERT_TRUE(0 == memcmp(patable, tp->patable, sizeof(patable))); + for (i = 0; i < PATABLE_LEN; ++i) { + patable[i] = call Rf1aIf.readRegister(PATABLE); + } + ASSERT_TRUE(0 == memcmp(patable, tp->patable, sizeof(patable))); + resetPATABLE(); + } + + void testSetTxPowerReg () + { + const rf1a_patable_t* tp = _patables + sizeof(_patables)/sizeof(*_patables) - 1; + uint8_t max_power; + ASSERT_TRUE(checkPATABLEIsReset()); + ASSERT_EQUAL(915, tp->freq_MHz); + max_power = tp->patable[RF1A_MAX_TX_POWER_INDEX]; + ASSERT_EQUAL(0xc0, max_power); + ASSERT_EQUAL(DEFAULT_TX_POWER, call Rf1aRadioPower.getTxPower_reg()); + call Rf1aRadioPower.setTxPower_reg(max_power); + ASSERT_EQUAL(max_power, call Rf1aRadioPower.getTxPower_reg()); + ASSERT_TRUE((max_power == DEFAULT_TX_POWER) || (! checkPATABLEIsReset())); + resetPATABLE(); + } + + void testSetTxPowerIdx () + { + const rf1a_patable_t* tp = _patables + sizeof(_patables)/sizeof(*_patables) - 1; + uint8_t idx; + int rv; + + ASSERT_TRUE(checkPATABLEIsReset()); + + rv = call Rf1aRadioPower.setTxPower_idx(RF1A_MIN_TX_POWER_INDEX); + ASSERT_EQUAL(_pa_levels[RF1A_MIN_TX_POWER_INDEX], rv); + rv = call Rf1aRadioPower.setTxPower_idx(RF1A_MAX_TX_POWER_INDEX); + ASSERT_EQUAL(_pa_levels[RF1A_MAX_TX_POWER_INDEX], rv); + rv = call Rf1aRadioPower.setTxPower_idx(RF1A_MAX_TX_POWER_INDEX + 1); + ASSERT_EQUAL(INT_MAX, rv); + + idx = (RF1A_MAX_TX_POWER_INDEX + RF1A_MIN_TX_POWER_INDEX) / 2; + ASSERT_EQUAL(3, idx); + ASSERT_EQUAL(-10, _pa_levels[idx]); + rv = call Rf1aRadioPower.setTxPower_idx(idx); + ASSERT_EQUAL(_pa_levels[idx], rv); + ASSERT_EQUAL(tp->patable[idx], call Rf1aRadioPower.getTxPower_reg()); + + resetPATABLE(); + } + + void testSetTxPowerDbm () + { + const rf1a_patable_t* tp = _patables + sizeof(_patables)/sizeof(*_patables) - 1; + int idx; + int dbm; + int rv; + + ASSERT_TRUE(checkPATABLEIsReset()); + dbm = _pa_levels[0] - 1; + rv = call Rf1aRadioPower.setTxPower_dBm(dbm); + ASSERT_EQUAL(_pa_levels[0], rv); + ASSERT_EQUAL(tp->patable[0], call Rf1aRadioPower.getTxPower_reg()); + + dbm = (_pa_levels[2] + _pa_levels[3]) / 2; + ASSERT_EQUAL(-12, dbm); + idx = 3; + rv = call Rf1aRadioPower.setTxPower_dBm(dbm); + ASSERT_EQUAL(_pa_levels[idx], rv); + ASSERT_EQUAL(tp->patable[idx], call Rf1aRadioPower.getTxPower_reg()); + + dbm -= 1; + ASSERT_EQUAL(-13, dbm); + idx = 2; + rv = call Rf1aRadioPower.setTxPower_dBm(dbm); + ASSERT_EQUAL(_pa_levels[idx], rv); + ASSERT_EQUAL(tp->patable[idx], call Rf1aRadioPower.getTxPower_reg()); + + dbm = 7; + idx = 6; + ASSERT_EQUAL(_pa_levels[idx], dbm); + rv = call Rf1aRadioPower.setTxPower_dBm(dbm); + ASSERT_EQUAL(_pa_levels[idx], rv); + ASSERT_EQUAL(tp->patable[idx], call Rf1aRadioPower.getTxPower_reg()); + + dbm = 50; + idx = 7; + rv = call Rf1aRadioPower.setTxPower_dBm(dbm); + ASSERT_EQUAL(_pa_levels[idx], rv); + ASSERT_EQUAL(tp->patable[idx], call Rf1aRadioPower.getTxPower_reg()); + + resetPATABLE(); + } + + void testRxAttenuationDbm () + { + int rv; + + ASSERT_EQUAL(0, call Rf1aRadioPower.getRxAttenuation_dBm()); + rv = call Rf1aRadioPower.setRxAttenuation_dBm(2); + ASSERT_EQUAL(0, rv); + ASSERT_EQUAL(0, call Rf1aRadioPower.getRxAttenuation_dBm()); + + rv = call Rf1aRadioPower.setRxAttenuation_dBm(3); + ASSERT_EQUAL(6, rv); + ASSERT_EQUAL(6, call Rf1aRadioPower.getRxAttenuation_dBm()); + + rv = call Rf1aRadioPower.setRxAttenuation_dBm(6); + ASSERT_EQUAL(6, rv); + ASSERT_EQUAL(6, call Rf1aRadioPower.getRxAttenuation_dBm()); + + rv = call Rf1aRadioPower.setRxAttenuation_dBm(8); + ASSERT_EQUAL(6, rv); + ASSERT_EQUAL(6, call Rf1aRadioPower.getRxAttenuation_dBm()); + + rv = call Rf1aRadioPower.setRxAttenuation_dBm(14); + ASSERT_EQUAL(12, rv); + ASSERT_EQUAL(12, call Rf1aRadioPower.getRxAttenuation_dBm()); + + rv = call Rf1aRadioPower.setRxAttenuation_dBm(20); + ASSERT_EQUAL(18, rv); + ASSERT_EQUAL(18, call Rf1aRadioPower.getRxAttenuation_dBm()); + + rv = call Rf1aRadioPower.setRxAttenuation_dBm(50); + ASSERT_EQUAL(18, rv); + ASSERT_EQUAL(18, call Rf1aRadioPower.getRxAttenuation_dBm()); + + // Ha-ha---yeah, nice try. Physics don't work that way. + rv = call Rf1aRadioPower.setRxAttenuation_dBm(-10); + ASSERT_EQUAL(0, rv); + ASSERT_EQUAL(0, call Rf1aRadioPower.getRxAttenuation_dBm()); + } + + event void Boot.booted () { + error_t rc = call Resource.immediateRequest(); + ASSERT_EQUAL(SUCCESS, rc); + testDefaultPower(); + testBurstWrite(); + testSingleReadWrite(); + testSetTxPowerReg(); + testSetTxPowerIdx(); + testSetTxPowerDbm(); + testRxAttenuationDbm(); + ALL_TESTS_PASSED(); + } + + event void Resource.granted () { } + +} diff --git a/tos/chips/msp430/rf1a/BareRf1aC.nc b/tos/chips/msp430/rf1a/BareRf1aC.nc new file mode 100644 index 0000000000..4543494fe3 --- /dev/null +++ b/tos/chips/msp430/rf1a/BareRf1aC.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * A component that supports transmitting and receiving bare packets + * using the RF1A infrastructure. + * + * @param BUFFER_SIZE The number of octets reserved for each of the + * transmission and reception buffers. + * + * @author Peter A. Bigot + */ + +generic configuration BareRf1aC (unsigned int BUFFER_SIZE) { + provides { + interface BareTxRx; + interface BareMetadata; + interface SplitControl; + } +} implementation { + components new BareRf1aP(BUFFER_SIZE); + + components new Rf1aPhysicalC(); + BareRf1aP.Resource -> Rf1aPhysicalC; + BareRf1aP.Rf1aPhysical -> Rf1aPhysicalC; + BareRf1aP.Rf1aPhysicalMetadata -> Rf1aPhysicalC; + + BareTxRx = BareRf1aP; + BareMetadata = BareRf1aP; + SplitControl = BareRf1aP; +} diff --git a/tos/chips/msp430/rf1a/BareRf1aP.nc b/tos/chips/msp430/rf1a/BareRf1aP.nc new file mode 100644 index 0000000000..8186efe2c6 --- /dev/null +++ b/tos/chips/msp430/rf1a/BareRf1aP.nc @@ -0,0 +1,240 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +generic module BareRf1aP (unsigned int BUFFER_SIZE) { + provides { + interface BareTxRx; + interface BareMetadata; + interface SplitControl; + } + uses { + interface Resource; + interface Rf1aPhysical; + interface Rf1aPhysicalMetadata; + } +} implementation { + + /** Indicate that this component has taken ownership of the radio. + * When false, all Rf1aPhysical events are ignored. + */ + bool active__; + + /** Space into which the outgoing message is copied, so the caller + * can proceed while the data is being transmitted. + */ + uint8_t txBuffer_[BUFFER_SIZE]; + + /** The ultimate result of a successfully initiated + * Rf1aPhysical.send operation. + */ + error_t txResult__; + + /** True iff the txBuffer_ holds data that is actively being + * transmitted. + */ + bool txActive; + + /** Space into which incoming messages may be copied. When this + * component owns the radio, this buffer is provided as a single-use + * receive buffer. Upon receipt of a message, a task fires to + * verify message integrity and if all is well to signal the + * connected component. The buffer is re-installed after these + * steps have completed. + */ + uint8_t rxBuffer_[BUFFER_SIZE]; + + /** Metadata associated with the most recently received packet */ + rf1a_metadata_t metadata_; + + /** The reception status provided by Rf1aPhysical.receiveDone */ + error_t rxResult__; + + /** The number of octets in the rxBuffer_ */ + uint8_t rxLength__; + + command void* BareTxRx.transmitBuffer () { return txBuffer_; } + + command unsigned int BareTxRx.transmitBufferLength () { return sizeof(txBuffer_); } + + task void signalSplitControlStartDone_task () { signal SplitControl.startDone(SUCCESS); } + task void signalSplitControlStopDone_task () { signal SplitControl.stopDone(SUCCESS); } + + command error_t SplitControl.start () { + error_t rc; + + atomic { + if (active__) { + return EBUSY; + } + } + rc = call Resource.immediateRequest(); + if (SUCCESS == rc) { + rc = call Rf1aPhysical.setReceiveBuffer(rxBuffer_, sizeof(rxBuffer_), TRUE); + } + if (SUCCESS == rc) { + atomic active__ = TRUE; + post signalSplitControlStartDone_task(); + } + return rc; + } + + command error_t SplitControl.stop () { + error_t rc; + + atomic { + if (! active__) { + return EOFF; + } + active__ = FALSE; + } + call Rf1aPhysical.setReceiveBuffer(0, 0, FALSE); + rc = call Resource.release(); + if (SUCCESS == rc) { + post signalSplitControlStopDone_task(); + } + return rc; + } + + task void sendDone_task () { + error_t rc; + atomic rc = txResult__; + txActive = FALSE; + signal BareTxRx.sendDone(rc); + } + + async event void Rf1aPhysical.sendDone (int result) { + atomic { + /* Ignore irrelevant events */ + if (! active__) { + return; + } + /* Save result for task processing */ + txResult__ = result; + } + post sendDone_task(); + } + + command error_t BareTxRx.send (const void* data, + unsigned int length) { + error_t rc; + uint8_t* tbp = txBuffer_; + + /* Ensure we're allowed to use the radio */ + atomic { + if (! active__) { + return EOFF; + } + } + + /* Ensure we're not already using the radio */ + if (txActive) { + return EBUSY; + } + + /* Ensure we have room for the data */ + if (length > sizeof(txBuffer_)) { + return EINVAL; + } + + /* Copy the data into the transmit buffer (if it's not already + * there), and append the CRC */ + if ((0 != data) && (tbp != data)) { + memcpy(tbp, data, length); + } + tbp += length; + + rc = call Rf1aPhysical.send(txBuffer_, tbp - txBuffer_); + if (SUCCESS == rc) { + txActive = TRUE; + } + return rc; + } + + command int BareMetadata.rssi () { return call Rf1aPhysicalMetadata.rssi(&metadata_); } + command int BareMetadata.lqi () { return call Rf1aPhysicalMetadata.lqi(&metadata_); } + + task void receiveDone_task () { + error_t rc; + uint8_t len; + bool ok; + + /* Extract the results from the Rf1aPhysical event */ + atomic { + rc = rxResult__; + len = rxLength__; + } + + /* Must have successfully received a message, and radio-level CRC passed */ + ok = (SUCCESS == rc) && call Rf1aPhysicalMetadata.crcPassed(&metadata_); + + /* Only signal reception if all checks passed */ + if (ok) { + signal BareTxRx.receive(rxBuffer_, len); + } + call Rf1aPhysical.setReceiveBuffer(rxBuffer_, sizeof(rxBuffer_), TRUE); + } + + default event void BareTxRx.sendDone (error_t rc) { } + + default event void BareTxRx.receive (const void* data, + unsigned int length) { } + + event void Resource.granted () { } + + async event void Rf1aPhysical.receiveDone (uint8_t* buffer, + unsigned int count, + int result) { + atomic { + /* Ignore irrelevant events */ + if (! active__) { + return; + } + /* Cache results for task */ + rxResult__ = result; + rxLength__ = count; + } + call Rf1aPhysicalMetadata.store(&metadata_); + post receiveDone_task(); + } + + /* Ignore irrelevant Rf1aPhysical events */ + + async event void Rf1aPhysical.receiveStarted (unsigned int length) { } + async event void Rf1aPhysical.receiveBufferFilled (uint8_t* buffer, + unsigned int count) { } + async event void Rf1aPhysical.frameStarted () { } + async event void Rf1aPhysical.clearChannel () { } + async event void Rf1aPhysical.carrierSense () { } + async event void Rf1aPhysical.released () { } +} diff --git a/tos/chips/msp430/rf1a/Ipv6BareRf1aC.nc b/tos/chips/msp430/rf1a/Ipv6BareRf1aC.nc new file mode 100644 index 0000000000..558eb64079 --- /dev/null +++ b/tos/chips/msp430/rf1a/Ipv6BareRf1aC.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Composite to provide what's needed for an IPv6 NIC entry point + * using the BareRf1aC component. + * + * @author Peter A. Bigot + */ + +configuration Ipv6BareRf1aC { + provides { + interface NetworkInterface; + interface SplitControl; + } +} implementation { + components Ipv6BareLinkLayerC; + components new BareRf1aC(255); + + NetworkInterface = Ipv6BareLinkLayerC; + SplitControl = Ipv6BareLinkLayerC; + + Ipv6BareLinkLayerC.BareControl -> BareRf1aC; + Ipv6BareLinkLayerC.BareTxRx -> BareRf1aC; + Ipv6BareLinkLayerC.BareMetadata -> BareRf1aC; +} diff --git a/tos/chips/msp430/rf1a/Rf1a.h b/tos/chips/msp430/rf1a/Rf1a.h new file mode 100644 index 0000000000..bee696cf9e --- /dev/null +++ b/tos/chips/msp430/rf1a/Rf1a.h @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Common types and definitions used throughout the RF1A module. + * + * @author Peter A. Bigot + */ + +#ifndef _Rf1a_h_ +#define _Rf1a_h_ + +/** The unique() key to identify individual RF1A modules, should a + * chip ever support more than one. + */ +#define UQ_MSP430_RF1A "Msp430.Rf1a" + +/** The unique() key to identify clients of an RF1A module instance. */ +#define UQ_RF1A_CLIENT "Msp430.0.Rf1a" + +/** The type used to represent RF1A status */ +typedef uint8_t rf1a_status_t; + +/** Enumeration values relevant to RF1A status. + * + * Most of the values represent bits 6 through 4 of the RF1A status + * byte, extracted by using the RF1A_S_MASK mask. A radio that is + * offline (clock is not stable) is represented by RF1A_S_OFFLINE. + */ + +typedef enum rf1a_status_e{ + RF1A_S_MASK = 0x70, + RF1A_S_FIFOMASK = 0x0F, + RF1A_S_IDLE = 0x00, + RF1A_S_RX = 0x10, + RF1A_S_TX = 0x20, + RF1A_S_FSTXON = 0x30, + RF1A_S_CALIBRATE = 0x40, + RF1A_S_SETTLING = 0x50, + RF1A_S_RXFIFO_OVERFLOW = 0x60, + RF1A_S_TXFIFO_UNDERFLOW = 0x70, + RF1A_S_OFFLINE = 0xFF, +} rf1a_status_e; + +#endif // _Rf1a_h_ diff --git a/tos/chips/msp430/rf1a/Rf1aC.nc b/tos/chips/msp430/rf1a/Rf1aC.nc new file mode 100644 index 0000000000..21d8196ee6 --- /dev/null +++ b/tos/chips/msp430/rf1a/Rf1aC.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1a.h" + +/** + * Master configuration for a single RF1A module. + * + * @author Peter A. Bigot + */ +configuration Rf1aC { + + provides { + interface HplMsp430Rf1aIf; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ArbiterInfo; + interface Rf1aPhysical[uint8_t client]; + interface Rf1aPhysicalMetadata; + interface Rf1aStatus; + } + uses { + interface Rf1aTransmitFragment[uint8_t client]; + interface Rf1aConfigure[uint8_t client]; + } +} implementation { + + components new HplMsp430Rf1aC(RF1AIFCTL0_, UQ_RF1A_CLIENT) as HplRf1aC; + HplMsp430Rf1aIf = HplRf1aC; + Resource = HplRf1aC; + ResourceRequested = HplRf1aC; + ArbiterInfo = HplRf1aC; + Rf1aPhysical = HplRf1aC; + Rf1aPhysicalMetadata = HplRf1aC; + Rf1aTransmitFragment = HplRf1aC; + Rf1aConfigure = HplRf1aC; + Rf1aStatus = HplRf1aC; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/Rf1aPacket.h b/tos/chips/msp430/rf1a/Rf1aPacket.h new file mode 100644 index 0000000000..7d6de208d1 --- /dev/null +++ b/tos/chips/msp430/rf1a/Rf1aPacket.h @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Define the structures for packets transported using the RF1A radio. + * + * All RF1A packets fundamentally use the frame layout described in + * IEEE Std 802.15.4-2006. At the moment, we assume 16-bit short + * address values, and PAN ID compression. + * + * TinyOS ActiveMessage packets insert a Not-A-LoWPAN header after the + * MAC header. Contrary to the practices recommended in TEP111, this + * and any other link-layer headers and footers are placed within the + * message_t data section, since the infrastructure cannot assume that + * any other headers are present and therefore cannot reserve space + * for them in the message_t header section. + * + * @author Peter A. Bigot + */ + +#ifndef _Rf1aPacket_H_ +#define _Rf1aPacket_H_ + +#include "Ieee154.h" + +enum { + /** NALP code for ActiveMessage type field */ + LOWPAN_NALP_TINYOS = 0x3f +}; + +/** Base header is the stock IEEE 802.15.4 MAC header (MHR) */ +typedef ieee154_header_t rf1a_ieee154_t; + +/** ActiveMessage packets add a NALP header */ +typedef nx_struct rf1a_nalp_am_t { + nxle_uint8_t nalp_tinyos; + nxle_uint8_t am_type; +} rf1a_nalp_am_t; + +/** Metadata common to all packet types */ +typedef nx_struct rf1a_metadata_t { + /** Length of packet payload, including all payload-stored layer + * headers/footers */ + nxle_uint16_t payload_length; + /** Raw RSSI value from radio APPEND_STATUS */ + nxle_uint8_t rssi; + /** Raw LQI+CRC value from radio APPEND_STATUS */ + nxle_uint8_t lqi; +} rf1a_metadata_t; + +#ifndef TOSH_DATA_LENGTH +/** Although the RF1A radio stack can accommodate a physical packet up + * to 255 bytes, to reduce overhead we default to a physical frame + * limit of 127 bytes, less the size of the fixed header. Beware that + * rf1a_nalp_am_t headers cut into this payload space. */ +#define TOSH_DATA_LENGTH (127 - sizeof(rf1a_ieee154_t)) +#endif // TOSH_DATA_LENGTH + +#endif _Rf1aPacket_H_ diff --git a/tos/chips/msp430/rf1a/am/Rf1aAMPacketC.nc b/tos/chips/msp430/rf1a/am/Rf1aAMPacketC.nc new file mode 100644 index 0000000000..c80c099042 --- /dev/null +++ b/tos/chips/msp430/rf1a/am/Rf1aAMPacketC.nc @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** RF1A-specific support for ActiveMessage packets. + * + * This component inserts into the payload a two-octet Not-A-LoWPAN + * header to hold a TinyOS ActiveMessage type id. It also provides + * the necessary interfaces to re-use transport-agnostic ActiveMessage + * components. + * + * @author Peter A. Bigot + */ + +configuration Rf1aAMPacketC { + provides { + interface Packet; + interface AMPacket; + } + uses { + interface Packet as SubPacket; + interface Rf1aPacket; + interface Ieee154Packet; + interface ActiveMessageAddress; + } +} implementation { + components Rf1aAMPacketP as PacketP; + Packet = PacketP; + AMPacket = PacketP; + SubPacket = PacketP; + Rf1aPacket = PacketP; + Ieee154Packet = PacketP; + ActiveMessageAddress = PacketP; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/am/Rf1aAMPacketP.nc b/tos/chips/msp430/rf1a/am/Rf1aAMPacketP.nc new file mode 100644 index 0000000000..652060bf5a --- /dev/null +++ b/tos/chips/msp430/rf1a/am/Rf1aAMPacketP.nc @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Implementation of ActiveMessage-relevant packet management + * interfaces for RF1A. + * + * @author Peter A. Bigot + */ + +module Rf1aAMPacketP { + provides { + interface Packet; + interface AMPacket; + } + uses { + interface Packet as SubPacket; + interface Ieee154Packet; + interface Rf1aPacket; + interface ActiveMessageAddress; + } +} implementation { + + /** Convenience typedef denoting the structure used as a header in + * this packet layout. */ + + typedef rf1a_nalp_am_t layer_header_t; + + /** Get a cast pointer to the extension header introduced at this layer */ + layer_header_t* layerHeader (message_t* msg) { return (layer_header_t*) call SubPacket.getPayload(msg, 0); } + + command void Packet.clear(message_t* msg) { + layer_header_t* lhp; + + /* Execute the normal clear process */ + call SubPacket.clear(msg); + + /* Store the dispatch code */ + lhp = layerHeader(msg); + lhp->nalp_tinyos = LOWPAN_NALP_TINYOS; + } + + /** Adjust the payload to account for the layer header. There is no + * footer at this layer. + */ + + command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(layer_header_t); } + command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg, len + sizeof(layer_header_t)); } + command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(layer_header_t); } + command void* Packet.getPayload(message_t* msg, uint8_t len) { return (void*)(1 + layerHeader(msg)); } + + command am_addr_t AMPacket.address() { return call ActiveMessageAddress.amAddress(); } + command am_addr_t AMPacket.destination(message_t* amsg) { return call Ieee154Packet.destination(amsg); } + command am_addr_t AMPacket.source(message_t* amsg) { return call Ieee154Packet.source(amsg); } + command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { call Ieee154Packet.setDestination(amsg, addr); } + command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { call Ieee154Packet.setSource(amsg, addr); } + + command bool AMPacket.isForMe(message_t* amsg) { + return (call AMPacket.destination(amsg) == call AMPacket.address() || + call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); + } + + command am_id_t AMPacket.type(message_t* amsg) { + layer_header_t* lhp = layerHeader(amsg); + return lhp->am_type; + } + + command void AMPacket.setType(message_t* amsg, am_id_t t) { + layer_header_t* lhp = layerHeader(amsg); + + lhp->nalp_tinyos = LOWPAN_NALP_TINYOS; + lhp->am_type = t; + } + + /** Store the active message group in the 802.15.4 PAN_ID field */ + command am_group_t AMPacket.group(message_t* amsg) { return call Ieee154Packet.pan(amsg); } + command void AMPacket.setGroup(message_t* amsg, am_group_t grp) { call Ieee154Packet.setPan(amsg, grp); } + command am_group_t AMPacket.localGroup() { return call Ieee154Packet.localPan(); } + + async event void ActiveMessageAddress.changed() { } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/am/Rf1aActiveMessageC.nc b/tos/chips/msp430/rf1a/am/Rf1aActiveMessageC.nc new file mode 100644 index 0000000000..0e2c3b274a --- /dev/null +++ b/tos/chips/msp430/rf1a/am/Rf1aActiveMessageC.nc @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * TinyOS network stack for ActiveMessage communication on an RF1A radio. + * + * This is a demonstration stack; applications may choose to use + * another with additional features such as low-power listening. + * + * Stack structure: + * - ActiveMessage support + * - TinyOS/Physical bridge + * - Rf1a physical layer + * + * @author Peter A. Bigot + */ + +configuration Rf1aActiveMessageC { + provides { + interface SplitControl; + interface AMSend[am_id_t id]; + interface SendNotifier[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface Packet; + interface AMPacket; + interface Resource; + interface PacketAcknowledgements; + + interface HplMsp430Rf1aIf; + interface Rf1aPacket; + interface Rf1aPhysical; + interface Rf1aStatus; + } +} +implementation { + /* Packet architecture: The Rf1aIeee154PacketC component provides + * the core packet layout. Active message support is inserted into + * the payload of that structure. */ + components Rf1aAMPacketC as PacketC; + Packet = PacketC; + AMPacket = PacketC; + + components new Rf1aIeee154PacketC() as PhyPacketC; + PacketC.Ieee154Packet -> PhyPacketC; + PacketC.SubPacket -> PhyPacketC; + PacketC.Rf1aPacket -> PhyPacketC; + Rf1aPacket = PhyPacketC; + + /* Get support for identifying the node's address. Implementation + * derives from underlying 802.15.4 address. */ + components Ieee154AMAddressC; + PacketC.ActiveMessageAddress -> Ieee154AMAddressC; + + /* Stack architecture: A module that supports the + * ActiveMessage-relevant interfaces is laid on top of a + * TinyOS/physical bridge which uses an Rf1a physical layer. */ + components new Rf1aPhysicalC() as PhysicalC; + Resource = PhysicalC; + HplMsp430Rf1aIf = PhysicalC; + Rf1aPhysical = PhysicalC; + Rf1aStatus = PhysicalC; + PhyPacketC.Rf1aPhysicalMetadata -> PhysicalC; + + components new Rf1aTinyOsPhysicalC() as TinyOsPhysicalC; + SplitControl = TinyOsPhysicalC; + TinyOsPhysicalC.Resource -> PhysicalC; + TinyOsPhysicalC.Rf1aPhysical -> PhysicalC; + TinyOsPhysicalC.Rf1aPhysicalMetadata -> PhysicalC; + TinyOsPhysicalC.Packet -> PacketC; + TinyOsPhysicalC.Rf1aPacket -> PhyPacketC; + + components new Rf1aAckC() as AckC; + AckC.SubSend -> TinyOsPhysicalC.Send[IEEE154_TYPE_DATA]; + AckC.SubReceive -> TinyOsPhysicalC.Receive[IEEE154_TYPE_DATA]; + AckC.AckSend -> TinyOsPhysicalC.Send[IEEE154_TYPE_ACK]; + AckC.AckReceive -> TinyOsPhysicalC.Receive[IEEE154_TYPE_ACK]; + AckC.Rf1aPacket -> PhyPacketC; + AckC.Rf1aPhysicalMetadata -> PhysicalC; + PacketAcknowledgements = AckC; + + components new UniqueReceiveC(); + UniqueReceiveC.SubReceive -> AckC.Receive; + + components Rf1aActiveMessageP as AM; + AMSend = AM; + SendNotifier = AM; + Receive = AM.Receive; + Snoop = AM.Snoop; + AM.Rf1aPacket -> PhyPacketC; + AM.Ieee154Packet -> PhyPacketC; + AM.Packet -> PacketC; + AM.AMPacket -> PacketC; + AM.SubSend -> AckC.Send; + AM.SubReceive -> UniqueReceiveC.Receive; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/am/Rf1aActiveMessageP.nc b/tos/chips/msp430/rf1a/am/Rf1aActiveMessageP.nc new file mode 100644 index 0000000000..0e01887962 --- /dev/null +++ b/tos/chips/msp430/rf1a/am/Rf1aActiveMessageP.nc @@ -0,0 +1,111 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Implementation of ActiveMessage interfaces on RF1A. + * + * @author Peter A. Bigot + */ + +module Rf1aActiveMessageP { + provides { + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface SendNotifier[am_id_t id]; + } + uses { + interface Rf1aPacket; + interface Ieee154Packet; + interface Packet; + interface AMPacket; + interface Send as SubSend; + interface Receive as SubReceive; + } +} +implementation { + /** Convenience typedef denoting the structure used as a header in + * this packet layout. */ + typedef rf1a_nalp_am_t layer_header_t; + + command error_t AMSend.send[am_id_t id](am_addr_t addr, + message_t* msg, + uint8_t len) { + call Rf1aPacket.configureAsData(msg); + call AMPacket.setSource(msg, call AMPacket.address()); + call Ieee154Packet.setPan(msg, call Ieee154Packet.localPan()); + call AMPacket.setDestination(msg, addr); + call AMPacket.setType(msg, id); + signal SendNotifier.aboutToSend[id](addr, msg); + // Account for layer header in payload length + return call SubSend.send(msg, len + sizeof(layer_header_t)); + } + + command uint8_t AMSend.maxPayloadLength[am_id_t id]() { + return call Packet.maxPayloadLength(); + } + + command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { + return call Packet.getPayload(m, len); + } + + command error_t AMSend.cancel[am_id_t id](message_t* msg) { + return call SubSend.cancel(msg); + } + + event void SubSend.sendDone(message_t* msg, error_t error) { + signal AMSend.sendDone[call AMPacket.type(msg)](msg, error); + } + + event message_t* SubReceive.receive(message_t* msg, void* payload_, uint8_t len) { + uint8_t* payload = (uint8_t*)payload_ + sizeof(layer_header_t); + len -= sizeof(layer_header_t); + if (call AMPacket.isForMe(msg)) { + return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); + } + return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); + } + + default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } + default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } + default event void SendNotifier.aboutToSend[am_id_t amId](am_addr_t addr, message_t *msg) { } + default event void AMSend.sendDone[am_id_t amId](message_t* msg, error_t error) { } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154MessageC.nc b/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154MessageC.nc new file mode 100644 index 0000000000..0cdc77235d --- /dev/null +++ b/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154MessageC.nc @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * TinyOS network stack for IEEE154 communication on an RF1A radio. + * + * This is a demonstration stack; applications may choose to use + * another with additional features such as low-power listening. + * + * Stack structure: + * - Ieee154 support + * - TinyOS/Physical bridge + * - Rf1a physical layer + * + * @author Peter A. Bigot + */ + +configuration Rf1aIeee154MessageC { + provides { + interface SplitControl; + + interface Ieee154Send; + interface Receive as Ieee154Receive; + + interface Packet; + interface Ieee154Packet; + + interface MessageLqi; + interface MessageRssi; + + interface PacketAcknowledgements; /* @TODO@ implement */ + interface LowPowerListening; + interface Resource; + + interface HplMsp430Rf1aIf; + interface Rf1aPacket; + interface Rf1aPhysical; + interface Rf1aPhysicalMetadata; + interface Rf1aStatus; + } + uses { + interface Rf1aConfigure; + } +} implementation { + + /* Packet architecture: The Rf1aIeee154PacketC component provides + * the core packet layout. + */ + components new Rf1aIeee154PacketC() as PacketC; + Packet = PacketC; + Ieee154Packet = PacketC; + MessageLqi = PacketC; + MessageRssi = PacketC; + + /* Stack architecture: A module that supports the Ieee154-relevant + * interfaces is laid on top of a TinyOS/physical bridge which uses + * an Rf1a physical layer. + */ + components new Rf1aPhysicalC() as PhysicalC; + Resource = PhysicalC; + HplMsp430Rf1aIf = PhysicalC; + Rf1aPhysical = PhysicalC; + Rf1aPhysicalMetadata = PhysicalC; + Rf1aStatus = PhysicalC; + Rf1aConfigure = PhysicalC; + PacketC.Rf1aPhysicalMetadata -> PhysicalC; + + components new Rf1aTinyOsPhysicalC() as TinyOsPhysicalC; + SplitControl = TinyOsPhysicalC; + TinyOsPhysicalC.Resource -> PhysicalC; + TinyOsPhysicalC.Rf1aPhysical -> PhysicalC; + TinyOsPhysicalC.Rf1aPhysicalMetadata -> PhysicalC; + TinyOsPhysicalC.Packet -> PacketC; + TinyOsPhysicalC.Rf1aPacket -> PacketC; + Rf1aPacket = PacketC; + + components new Rf1aAckC() as AckC; + AckC.SubSend -> TinyOsPhysicalC.Send[IEEE154_TYPE_DATA]; + AckC.SubReceive -> TinyOsPhysicalC.Receive[IEEE154_TYPE_DATA]; + AckC.AckSend -> TinyOsPhysicalC.Send[IEEE154_TYPE_ACK]; + AckC.AckReceive -> TinyOsPhysicalC.Receive[IEEE154_TYPE_ACK]; + AckC.Rf1aPacket -> PacketC; + AckC.Rf1aPhysicalMetadata -> PhysicalC; + PacketAcknowledgements = AckC; + + components Rf1aIeee154MessageP as MsgP; + MsgP.Packet -> PacketC; + MsgP.Rf1aPacket -> PacketC; + MsgP.Ieee154Packet -> PacketC; + MsgP.SubSend -> AckC.Send; + MsgP.SubReceive -> AckC.Receive; + Ieee154Send = MsgP; + +#if 0 + /* This would filter out any messages with a DSN in the + * recently-received queue. Since the DSN derives from RandomC, and + * the standard RandomC resets to the same starting point each time + * the board is restarted, when it's enabled the link layer will + * drop packets sent from a node if it's rebooted before sending + * enough traffic to flush the cache. + * + * Since the only reason to use this is when using link-layer + * retransmissions, and we're not, it's now disabled. + */ + components new UniqueReceiveC(); + UniqueReceiveC.SubReceive -> MsgP.Ieee154Receive; + Ieee154Receive = UniqueReceiveC.Receive; +#else + Ieee154Receive = MsgP.Ieee154Receive; +#endif + + components StubLowPowerListeningC; + LowPowerListening = StubLowPowerListeningC; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154MessageP.nc b/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154MessageP.nc new file mode 100644 index 0000000000..050cf5c95d --- /dev/null +++ b/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154MessageP.nc @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Implementation of Ieee154 interfaces on RF1A. + * + * @author Peter A. Bigot + */ + +module Rf1aIeee154MessageP { + provides { + interface Ieee154Send; + interface Receive as Ieee154Receive; + } + uses { + interface Packet; + interface Rf1aPacket; + interface Ieee154Packet; + interface Send as SubSend; + interface Receive as SubReceive; + } +} +implementation { + command error_t Ieee154Send.send(ieee154_saddr_t addr, message_t* msg, uint8_t len) { + call Rf1aPacket.configureAsData(msg); + call Ieee154Packet.setPan(msg, call Ieee154Packet.localPan()); + call Ieee154Packet.setSource(msg, call Ieee154Packet.address()); + call Ieee154Packet.setDestination(msg, addr); + return call SubSend.send(msg, len); + } + + event void SubSend.sendDone(message_t* msg, error_t error) { signal Ieee154Send.sendDone(msg, error); } + + command error_t Ieee154Send.cancel(message_t* msg) { return FAIL; } + + default event void Ieee154Send.sendDone(message_t* msg, error_t error) { } + + command uint8_t Ieee154Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } + + command void* Ieee154Send.getPayload(message_t* msg, uint8_t len) { return call Packet.getPayload(msg, len); } + + event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { + if (call Ieee154Packet.isForMe(msg)) { + return signal Ieee154Receive.receive(msg, payload, len); + } + return msg; + } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154PacketC.nc b/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154PacketC.nc new file mode 100644 index 0000000000..12d5c0f1b0 --- /dev/null +++ b/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154PacketC.nc @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** RF1A-specific support for TinyOS message structures. + * + * @author Peter A. Bigot + */ +generic configuration Rf1aIeee154PacketC () { + provides { + interface Packet; + interface Ieee154Packet; + interface Rf1aPacket; + interface MessageLqi; + interface MessageRssi; + } + uses { + interface Rf1aPhysicalMetadata; + } +} implementation { + components new Rf1aIeee154PacketP() as PacketP; + Packet = PacketP; + Ieee154Packet = PacketP; + Rf1aPacket = PacketP; + Rf1aPhysicalMetadata = PacketP; + MessageLqi = PacketP; + MessageRssi = PacketP; + + components Ieee154AddressC; + PacketP.Ieee154Address -> Ieee154AddressC; + + components RandomC; + PacketP.Random -> RandomC; + + components MainC; + MainC.SoftwareInit -> PacketP; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154PacketP.nc b/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154PacketP.nc new file mode 100644 index 0000000000..032acf07f3 --- /dev/null +++ b/tos/chips/msp430/rf1a/ieee154/Rf1aIeee154PacketP.nc @@ -0,0 +1,190 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1aPacket.h" + +/** Implementation of core packet management interfaces for RF1A. + * + * @author Peter A. Bigot + */ +generic module Rf1aIeee154PacketP () { + provides { + interface Init; + interface Packet; + interface Ieee154Packet; + interface Rf1aPacket; + interface MessageLqi; + interface MessageRssi; + } + uses { + interface Random; + interface Rf1aPhysicalMetadata; + interface Ieee154Address; + } +} implementation { + + enum { + /** Mask for header FCF bits that should be left at their + * caller-provided settings + */ + FCF_PRESERVE = ( (1 << IEEE154_FCF_SECURITY_ENABLED) + | (1 << IEEE154_FCF_FRAME_PENDING) + | (1 << IEEE154_FCF_ACK_REQ) ), + + /** Constant FCF subfield settings for any message transmitted + * through this interface. This value is constant due to the + * current choice of a fixed rf1a_ieee154_t structure. + */ + FCF_FIXED = ( (IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE) + | (IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE) + | (1 << IEEE154_FCF_INTRAPAN) + | (IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE) ), + }; + + /** The data sequence number to be used. */ + uint8_t macDSN; + + command error_t Init.init () { + /* Initialize the DSN */ + macDSN = (uint8_t) call Random.rand16(); + return SUCCESS; + } + + /** Convenience typedef denoting the structure used as a header in + * this packet layout. + */ + typedef rf1a_ieee154_t header_t; + + /** Get a cast pointer to the layer header */ + header_t* header (message_t* msg) { return (header_t*)(msg->data - sizeof(header_t)); } + + /** Convenience typedef denoting the structure used to hold + * packet-relevant metadata + */ + typedef rf1a_metadata_t metadata_t; + + /** Get a cast pointer to the packet metadata */ + metadata_t* metadata_ (message_t* msg) { return (rf1a_metadata_t*)msg->metadata; } + const metadata_t* cmetadata_ (const message_t* msg) { return (const rf1a_metadata_t*)msg->metadata; } + + async command rf1a_metadata_t* Rf1aPacket.metadata (message_t* msg) { return metadata_(msg); } + + async command void Rf1aPacket.configureAsData (message_t* msg) { + header_t* hp = header(msg); + metadata_t* mp = metadata_(msg); + + /* Preserve the FCF bits that might be configured through other + * interfaces. Override anything else. But do it first, in case + * somebody extends Ieee154Packet to be more flexible. + */ + hp->fcf = (hp->fcf & FCF_PRESERVE) | FCF_FIXED; + atomic { + hp->dsn = macDSN++; + } + + /* Reset the RSSI and LQI fields, allow constant (if "undefined") + * values to be read back for unacknowledged sent packets + */ + mp->rssi = mp->lqi = 0; + } + + inline + async command int Rf1aPacket.rssi (const message_t* msg) { return call Rf1aPhysicalMetadata.rssi(cmetadata_(msg)); } + + command int MessageRssi.rssi (const message_t* msg) { return call Rf1aPhysicalMetadata.rssi(cmetadata_(msg)); } + + async command int Rf1aPacket.lqi (const message_t* msg) { return call Rf1aPhysicalMetadata.lqi(cmetadata_(msg)); } + + command int MessageLqi.lqi (const message_t* msg) { return call Rf1aPhysicalMetadata.lqi(cmetadata_(msg)); } + + async command bool Rf1aPacket.crcPassed (const message_t* msg) { return call Rf1aPhysicalMetadata.crcPassed(cmetadata_(msg)); } + + command ieee154_saddr_t Ieee154Packet.address() { return call Ieee154Address.shortAddress(); } + + command ieee154_saddr_t Ieee154Packet.destination(message_t* msg) { return header(msg)->dest; } + + command ieee154_saddr_t Ieee154Packet.source(message_t* msg) { return header(msg)->src; } + + command void Ieee154Packet.setDestination(message_t* msg, ieee154_saddr_t addr) { header(msg)->dest = addr; } + + command void Ieee154Packet.setSource(message_t* msg, ieee154_saddr_t addr) { header(msg)->src = addr; } + + command bool Ieee154Packet.isForMe(message_t* msg) { + /* IEEE 802.5.4-2006 section 7.5.6.2, reduced: The packet is for + * me if the destination PAN matches my PAN or the broadcast PAN; + * and the destination address matches my address or the broadcast + * address. + * + * @TODO@ Until macPromiscuousMode is supported, setting the node + * panId() to IEEE154_BROADCAST_PAN is used to accept packets from + * arbitrary PANs. 7.5.6.2 sanctions this only for beacon + * frames. The local short address is similarly interpreted. + */ + ieee154_panid_t dpan = call Ieee154Packet.pan(msg); + ieee154_saddr_t daddr = call Ieee154Packet.destination(msg); + + return (((call Ieee154Address.panId() == dpan) || (IEEE154_BROADCAST_PAN == dpan) || (IEEE154_BROADCAST_PAN == call Ieee154Address.panId())) + && ((call Ieee154Address.shortAddress() == daddr) || (IEEE154_BROADCAST_ADDR == daddr) || (IEEE154_BROADCAST_ADDR == call Ieee154Address.shortAddress()))); + } + + command ieee154_panid_t Ieee154Packet.pan(message_t* msg) { return header(msg)->destpan; } + + command void Ieee154Packet.setPan(message_t* msg, ieee154_panid_t grp) { header(msg)->destpan = grp; } + + command ieee154_panid_t Ieee154Packet.localPan() { return call Ieee154Address.panId(); } + + command void Packet.clear(message_t* msg) { + memset(msg, 0, sizeof(*msg)); + } + + command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } + + command void Packet.setPayloadLength(message_t* msg, uint8_t len) { metadata_(msg)->payload_length = len + sizeof(header_t); } + + command uint8_t Packet.payloadLength(message_t* msg) { return cmetadata_(msg)->payload_length - sizeof(header_t); } + + command void* Packet.getPayload(message_t* msg, uint8_t len) { + return ((len + sizeof(header_t)) <= TOSH_DATA_LENGTH) ? (void*)msg->data : 0; + } + + async event void Ieee154Address.changed () { } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/ieee154/Rf1aPacket.nc b/tos/chips/msp430/rf1a/ieee154/Rf1aPacket.nc new file mode 100644 index 0000000000..a6d1381060 --- /dev/null +++ b/tos/chips/msp430/rf1a/ieee154/Rf1aPacket.nc @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1aPacket.h" +#include "message.h" + +/** Extract packet information required to transmit a message on an + * RF1A radio. + * + * @author Peter A. Bigot + */ + +interface Rf1aPacket { + + /** Get a pointer to the metadata for the given message. + * + * This is a convenience function, and should simply return a cast + * pointer to the message_t metadata section. + */ + async command rf1a_metadata_t* metadata (message_t* msg); + + /** Configure the IEEE 802.15.4 header to mark this as a data packet. + * + * This sets the DSN, as well as those FCF fields that must be + * consistent with the structure used for rf1a_ieee154_t. It + * preserves those FCF fields that might be externally configured + * (Security Enabled, Frame Pending, and Acknowledgment Requested). + * It should be invoked somewhere in the stack exactly once per + * high-level TinyOS send operation. + */ + async command void configureAsData (message_t* msg); + + /** Get the received signal strength indicator for a given packet. + * + * Forwards to Rf1aPhysicalMetadata.rssi(). For sent packets, the + * value is provided from the acknowledgment, and is undefined if + * no acknowledgment was received. + */ + async command int rssi (const message_t* msg); + + /** Get link quality indicator for a given packet. + * + * Forwards to Rf1aPhysicalMetadata.lqi(). For sent packets, the + * value is provided from the acknowledgment, and is undefined if + * no acknowledgment was received. + */ + async command int lqi (const message_t* msg); + + /** Indicate whether the hardware CRC passed for the received + * packet. + * + * Forwards to Rf1aPhysicalMetadata.crcPassed(). For sent packets, the + * value is provided from the acknowledgment, and is FALSE if + * no acknowledgment was received. + */ + async command bool crcPassed (const message_t* msg); +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/interfaces/Ieee154Address.nc b/tos/chips/msp430/rf1a/interfaces/Ieee154Address.nc new file mode 100644 index 0000000000..0a879f513d --- /dev/null +++ b/tos/chips/msp430/rf1a/interfaces/Ieee154Address.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Ieee154.h" + +/** Just like ActiveMessageAddress, but for IEEE 802.15.4-based systems. + * + * @author Peter A. Bigot + */ +interface Ieee154Address { + /** Set the IEEE 802.15.4 short address and PAN ID. + * @param panid The node's PAN ID + * @param addr The node's short (16-bit) address + */ + async command void setAddress (ieee154_panid_t panid, ieee154_saddr_t addr); + + /** The short (16-bite) address of this node. */ + async command ieee154_saddr_t shortAddress (); + + /** The PAN ID of this node. */ + async command ieee154_panid_t panId (); + + /** Notification that the node's PAN ID or address changed. */ + async event void changed (); +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/interfaces/MessageLqi.nc b/tos/chips/msp430/rf1a/interfaces/MessageLqi.nc new file mode 100644 index 0000000000..8565271d16 --- /dev/null +++ b/tos/chips/msp430/rf1a/interfaces/MessageLqi.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Interface to allow platform-independent message components to + * provide link-quality indicator data. + * + * @author Peter A. Bigot + */ + +interface MessageLqi { + /** Get the link quality indicator for a given packet. + * + * The interpretation of this value depends on the underlying + * radio. + */ + command int lqi (const message_t* msg); +} diff --git a/tos/chips/msp430/rf1a/interfaces/MessageRssi.nc b/tos/chips/msp430/rf1a/interfaces/MessageRssi.nc new file mode 100644 index 0000000000..c19cf13a59 --- /dev/null +++ b/tos/chips/msp430/rf1a/interfaces/MessageRssi.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Interface to allow platform-independent message components to + * provide received signal strength indicator data. + * + * @author Peter A. Bigot + */ + +interface MessageRssi { + /** Get the received signal strength indicator for a given packet. + * + * This is the RSSI provided by the radio as locked at the point the + * sync word was demodulated for the received packet. The value is + * in dBm. + */ + command int rssi (const message_t* msg); +} diff --git a/tos/chips/msp430/rf1a/layers/Rf1aAckC.nc b/tos/chips/msp430/rf1a/layers/Rf1aAckC.nc new file mode 100644 index 0000000000..304e9cb50a --- /dev/null +++ b/tos/chips/msp430/rf1a/layers/Rf1aAckC.nc @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Component to assist with retransmission and acknowledgement + * processing of 802.15.4 packets using the RF1A radio stack. + * + * This component must be wedged into the network stack between a + * (upper) level that configures the packet's DSN, and the lower level + * that transmits it. The lower level Send operation may be invoked + * multiple times for a single packet. If the first attempt to send + * the message fails immediately, that failure is immediately + * communicated to the caller. However, if the first send succeeds, + * retransmit sends are implicitly treated as successful. + * + * @TODO@ prevent the stack from being shut down while an ack + * transmission is active. + * + * @note The IEEE 802.15.4-2006 specification presumes that timing is + * adequate to identify the message for which an ack is received. + * Since the 802.15.4 implementation supported by this implementation + * is not clocked at the symbol level, this assumption is invalid. + * Therefore, we do not use IEEE 802.15.4-2006 acknowledgment frames, + * but instead use a header that includes source and destination + * addresses. + * + * @note This component mixes retransmission with acknowledgment + * processing. These could be separated by placing acknowledgements + * below retransmissions, though doing so would risk missing an + * acknowledgement received between a ENOACK sendDone and the next + * transmission. Besides, the current state machine works, and we + * probably should be using tkn154 anyway. + */ + +generic configuration Rf1aAckC () { + provides { + interface Send; + interface Receive; + interface PacketAcknowledgements; + } + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface Send as AckSend; + interface Receive as AckReceive; + interface Rf1aPacket; + interface Rf1aPhysicalMetadata; + } +} implementation { + components new Rf1aAckP(); + Send = Rf1aAckP.Send; + Receive = Rf1aAckP; + PacketAcknowledgements = Rf1aAckP; + SubSend = Rf1aAckP.SubSend; + SubReceive = Rf1aAckP.SubReceive; + AckSend = Rf1aAckP.AckSend; + AckReceive = Rf1aAckP.AckReceive; + Rf1aPacket = Rf1aAckP; + Rf1aPhysicalMetadata = Rf1aAckP; + + /* NB: Can't use AlarmMultiplexC here until it's been made robust in + * the face of asynchronous uncoordinated users. + */ + components new Alarm32khz16C(); + Rf1aAckP.AckWaitAlarm -> Alarm32khz16C; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/layers/Rf1aAckP.nc b/tos/chips/msp430/rf1a/layers/Rf1aAckP.nc new file mode 100644 index 0000000000..930a881a03 --- /dev/null +++ b/tos/chips/msp430/rf1a/layers/Rf1aAckP.nc @@ -0,0 +1,492 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +generic module Rf1aAckP () { + provides { + interface Send; + interface Receive; + interface PacketAcknowledgements; + } + uses { + interface Alarm as AckWaitAlarm; + interface Send as SubSend; + interface Receive as SubReceive; + interface Send as AckSend; + interface Receive as AckReceive; + interface Rf1aPhysicalMetadata; + interface Rf1aPacket; + } +} implementation { + +#include "Ieee154.h" + + /** Bare physical header structure */ + typedef rf1a_ieee154_t phy_header_t; + + /** Get a cast pointer to the physical layer header */ + phy_header_t* header (message_t* msg) { return (phy_header_t*)(msg->data - sizeof(phy_header_t)); } + + /** Get a cast pointer to the frame control field union */ + ieee154_fcf_t* fcf (message_t* msg) { return (ieee154_fcf_t*)(& header(msg)->fcf); } + + /** The structure used for acknowledgments. + * + * @note The IEEE 802.15.4-2006 specification assumes that precise + * timing is available to identify the message for which an ack is + * received, and consequently elides the source and destination + * addresses from the acknowledgment frame. Since the 802.15.4 + * implementation supported by this implementation is not clocked at + * the symbol level, precise timing cannot be assumed and this + * assumption is invalid. Therefore, we do not use IEEE + * 802.15.4-2006 acknowledgment frames, but instead use a header + * that includes source and destination addresses. Which might as + * well be the standard 802.15.4 header, though it need not always + * be so. + */ + typedef rf1a_ieee154_t ack_t; + + /** The structure used for acknowledgement messages. + * + * We don't use a message_t because that's way too large given we + * have no payload and no need for a metadata section. However, we + * can't use a raw rf1a_ieee154_t because the interfaces expect a + * message_t pointer, and the rf1a_ieee154_t is a 9-byte structure + * with two-byte alignment requirements: casting between pointers + * screws up the offsets. Besides, somebody might have stuck + * something else in the header union as well. + */ + typedef nx_struct { + nx_uint8_t header[sizeof(message_header_t)]; + nx_uint8_t data[1]; + } ack_message_t; + + /** State machine for acknowledgment processing on the transmit + * side. Note that the lower-level send might involve + * low-power-listening, with significant delays and intervening + * receives between the SubSend.send() and the corresponding + * SubSend.sendDone(). We will assume, however, that although + * SubSend.send() is not asynchronous, nothing during that + * invocation can affect the transmission state machine. + * + * The TinyOS Alarm interface does not provide clear guarantees that + * allow us to break out of the state machine (e.g., no guarantee on + * whether a fired() event will fire when stopping the alarm). + * Therefore, receiving an ack when the AckWaitAlarm may be set will + * be processed through that alarm's fired() event. + */ + enum { + /** State indicates there is no active transmission that requires + * an acknowledgment. Transition to TX_S_sending occurs on + * upper level send. AckWaitAlarm is not set. */ + TX_S_idle, + /** State indicates there is an active transmission that requires + * acknowledgment, and we are between having successfully invoked + * the low level send and receiving its sendDone. Transition to + * TX_S_waiting occurs on lower level sendDone. AckWaitAlarm is + * not set. */ + TX_S_sending, + /** State indicates there is an active transmission for which we + * have completed an initial or retransmit send and are waiting on + * the timeout. AckWaitAlarm is set. Always transitions to + * TX_S_alarmFired, and only by the firing of the alarm. */ + TX_S_waiting, + /** State indicates that the alarm has fired, and we're waiting + * for the corresponding task to get executed. AckWaitAlarm is + * not set. */ + TX_S_alarmFired, + + /** A mask used to extract the state identifier from the state + * variable, excluding meta-information like whether the + * acknowledgment had been asynchronously received. */ + TX_S_MASK = 0x0F, + /** Bit set to indicate that an ACK was received while in the + * current state. See SubReceive.receive() for transition + * details. */ + TX_S_ACKED = 0x80, + }; + + /** The current transmission acknowledgment processing state */ + uint8_t tx_state; + + /** The number of retries left for the current send. */ + uint8_t tx_attempts_remaining; + + /** The message being transmitted that requires acknowledgments. + * Only valid when tx_state is not TX_S_idle. */ + message_t* tx_message; + + /** The length paired with tx_message. */ + uint8_t tx_length; + + /** The result code to be provided when signaling send completion */ + error_t tx_result; + + /** TRUE iff the most packet for which the next sendDone will be + * signalled was acknowledgeable and acknowledged. */ + bool tx_acked; + + /** State machine for acknowledgment processing on the receive side. + * Upon receipt of a message that should be acknowledged, a base + * rf1a_ieee154_t header is initialized containing the DSN of the + * incoming message and is transmitted back to the sender. */ + enum { + /** State indicates that no transmission of an acknowledgment is + * in progress. */ + RX_S_idle, + /** State indicates that an acknowledgment has been sent, but the + * AckSend interface has not indicated completion of the + * transmission. */ + RX_S_transmitting, + }; + /** The current receive acknowledgment processing state */ + uint8_t rx_state; + + /** The structure used to transmit an acknowledgment message */ + ack_message_t ack_message; + + enum { + /** The number of 32KHz ticks to wait, after completion of + * sendDone, before assuming the remote has failed to acknowledge + * the transmission. */ + CFG_macAckWaitDuration_32k = 3277, // 100ms + + /** The number of retransmissions allowed. Note that a value of 0 + * is legitimate, and requires acknowledgment on the first + * transmission. */ + CFG_macMaxFrameRetries = 4, + }; + + /** Signal the upper layer that the send has completed, and reset + * the state machine. + */ + void signalSendDone_ () { + message_t* msg; + error_t rv; + + /* tx_acked should have been correctly set by whoever invoked this + * function, so that it's valid at the time the signal is + * delivered. + */ + atomic { + tx_state = TX_S_idle; + msg = tx_message; + tx_message = 0; + rv = tx_result; + } + if (msg) { + signal Send.sendDone(msg, rv); + } + } + + /** Helper function to transition the state machine to TX_S_waiting + * and configure the alarm for the appropriate delay. Must only be + * invoked while in an atomic section. + */ + void transitionToWaiting_atomic_ () { + call AckWaitAlarm.start(CFG_macAckWaitDuration_32k); + tx_state = TX_S_waiting; + } + + /** Process a completed low-level send operation. + * + * Transition to the appropriate state, which depends on the result + * of the send, whether an ack has been received, and whether there + * are retry attempts remaining. Returns a flag to indicate when + * the state machine should exit and the caller be notified of the + * ultimate disposition of the send. + * + * @param result the result of the send + * @return TRUE iff the caller should invoke signalSendDone_ + */ + bool completeSend_atomic_ (error_t result) { + bool rv = tx_acked = TX_S_ACKED & tx_state; + if (! tx_acked) { + if ((SUCCESS != result) && (0 == tx_attempts_remaining)) { + rv = TRUE; + } else { + transitionToWaiting_atomic_(); + } + } + return rv; + } + + /** Process state changes resulting from, or occurring after, an ack alarm. */ + task void ackWaitAlarmFired_task () { + bool signal_done = FALSE; + atomic { + signal_done = tx_acked = TX_S_ACKED & tx_state; + if (! tx_acked) { + /* If we're waiting for a result, and haven't received an ack, + * and there are no retransmit attempts remaining, consider this + * a failure. */ + if (0 == tx_attempts_remaining--) { + tx_result = ENOACK; + signal_done = TRUE; + } + } + if (! signal_done) { + tx_state = TX_S_sending; + } + } + if (! signal_done) { + error_t rv = call SubSend.send(tx_message, tx_length); + if (SUCCESS != rv) { + atomic { + /* If we won't get a sendDone, do now what it would have done. + * Yes, if this is the last retransmission, we could fail now, + * but we'll optimize that after things work. */ + signal_done = completeSend_atomic_(rv); + } + } + } + if (signal_done) { + signalSendDone_(); + } + } + + command error_t Send.send (message_t* msg, uint8_t len) { + error_t rv = SUCCESS; + bool need_ack = FALSE; + + atomic { + phy_header_t* hp = header(msg); + ieee154_fcf_t* fcfp = fcf(msg); + + /* TEP116 specifies no nested sends, even though we could do + * transmit non-ack messages while awaiting an ack. */ + if (TX_S_idle != tx_state) { + return EBUSY; + } + + /* IEEE 802.15.4-2006 section 7.5.6.4: data and MAC command + * frames may request acks, as long as they are not broadcast. + * AcknowledgmentRequest must be zero for beacon and ack + * frames, and anything broadcast. We can't enforce that, so we + * just assume it. */ + if ((IEEE154_TYPE_DATA == fcfp->frame_type) + && fcfp->ack_request + && (IEEE154_BROADCAST_ADDR != hp->dest)) { + /* Need an ack, but we can only wait for one at a time. */ + need_ack = TRUE; + tx_state = TX_S_sending; + } + /* This send has not been acked, even if we're processing + * another one that could be. */ + tx_acked = FALSE; + } + rv = call SubSend.send(msg, len); + + /* Correct state based on success or failure if this packet + * requires acknowledgment. */ + if (need_ack) { + atomic { + if (SUCCESS == rv) { + /* Success: store the relevant information so we can execute + * the state machine to eventually provide a sendDone signal + * to the caller. */ + tx_attempts_remaining = CFG_macMaxFrameRetries; + tx_message = msg; + tx_length = len; + tx_result = SUCCESS; + } else { + /* Failure: the machine stops now, and the error is returned + * to the caller. */ + tx_state = TX_S_idle; + } + } + } + + return rv; + } + + command error_t Send.cancel(message_t* msg) { + /* @TODO@ We explicitly disallow cancelling transmission until + * such time as the appropriate cleanup can be identified. + */ + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { return call SubSend.maxPayloadLength(); } + + command void* Send.getPayload(message_t* msg, uint8_t len) { return call SubSend.getPayload(msg, len); } + + async event void AckWaitAlarm.fired () { + atomic { + /* Set state to TX_S_alarmFired, preserving TX_S_ACKED if set */ + tx_state = (tx_state & ~TX_S_MASK) | TX_S_alarmFired; + } + post ackWaitAlarmFired_task(); + } + + default event void Send.sendDone(message_t* msg, error_t error) { } + + event void SubSend.sendDone (message_t* msg, error_t error) { + bool do_bypass_signal = TRUE; + bool do_state_signal = FALSE; + + atomic { + uint8_t bare_state = TX_S_MASK & tx_state; + + /* Only interested if we're awaiting a sendDone that's relevant + * to the transmission ack state. */ + if (TX_S_sending == bare_state) { + /* This is paired with one of our send() invocations, so don't + * signal this result. If the ack has come in, do complete + * the state machine. */ + do_bypass_signal = FALSE; + do_state_signal = completeSend_atomic_(error); + } + } + if (do_state_signal) { + signalSendDone_(); + } else if (do_bypass_signal) { + signal Send.sendDone(msg, error); + } + } + + default event message_t* Receive.receive (message_t* msg, void* payload, uint8_t len) { return msg; } + + enum { + /** Discard Frame Type, Acknowledgment Requested, and Frame Pending */ + FCF_ACK_PRESERVE = ~ ((IEEE154_TYPE_MASK << IEEE154_FCF_FRAME_TYPE) + | (1 << IEEE154_FCF_ACK_REQ) + | (1 << IEEE154_FCF_FRAME_PENDING)), + + /** Value to set in cleared acknowledgment FCF */ + FCF_ACK_FIXED = (IEEE154_TYPE_ACK << IEEE154_FCF_FRAME_TYPE), + }; + + event message_t* SubReceive.receive (message_t* msg, void* payload, uint8_t len) { + phy_header_t* hp = header(msg); + ieee154_fcf_t* fcfp = fcf(msg); + + if (fcfp->ack_request) { + /* Need to transmit an Ack, though we won't if we're still + * waiting for one to finish transmitting. */ + bool invoke_send = FALSE; + atomic { + if (RX_S_idle == rx_state) { + ack_t* ap = (ack_t*)header((message_t*)&ack_message); + *ap = *hp; + + /* NB: Assumption is src and dest address modes are the same. */ + ap->fcf = (ap->fcf & FCF_ACK_PRESERVE) | FCF_ACK_FIXED; + ap->dest = hp->src; + ap->src = hp->dest; + rx_state = RX_S_transmitting; + invoke_send = TRUE; + } + } + if (invoke_send) { + error_t rv = call AckSend.send((message_t*)&ack_message, 0); + if (SUCCESS != rv) { + /* If the transmission didn't succeed, reset the state so we + * don't wait for PhySend.sendDone(). */ + atomic { + rx_state = RX_S_idle; + } + } + } + } + return signal Receive.receive(msg, payload, len); + } + + event message_t* AckReceive.receive (message_t* msg, void* payload, uint8_t len) { + phy_header_t* hp = header(msg); + + atomic { + uint8_t bare_state = TX_S_MASK & tx_state; + if ((TX_S_idle != bare_state) && (! (TX_S_ACKED & tx_state))) { + ack_t* ap = (ack_t*)header(tx_message); + bool acked = ((hp->src == ap->dest) + && (hp->dest == ap->src) + && (hp->dsn == ap->dsn)); + if (acked) { + /* Set the flag indicating the ack was received + * successfully. If we're waiting, short the alarm; + * otherwise the signal will be handled at the point where + * the next transition would occur (sendDone or alarm task + * execution). */ + tx_state |= TX_S_ACKED; + tx_result = SUCCESS; + if (TX_S_waiting == bare_state) { + call AckWaitAlarm.start(0); + } + /* Store what we hope is still the corresponding metadata. */ + call Rf1aPhysicalMetadata.store(call Rf1aPacket.metadata(tx_message)); + } + } + } + return msg; + } + + event void AckSend.sendDone (message_t* msg, error_t error) { + atomic { + /* Completed sending the acknowledgment; reset the state. Note + * that it doesn't matter whether the send was successful, at + * least as far as state management goes. + */ + if (RX_S_transmitting == rx_state) { + rx_state = RX_S_idle; + } + } + } + + async command error_t PacketAcknowledgements.requestAck( message_t* msg ) { + ieee154_fcf_t* fcfp = fcf(msg); + + /* IEEE 802.15.4-2006 section 7.5.6.4: this should be rejected for + * broadcast messages, but TinyOS interfaces probably haven't set + * the destination address yet, so we can't check that. + */ + fcfp->ack_request = 1; + return SUCCESS; + } + + async command error_t PacketAcknowledgements.noAck( message_t* msg ) { + ieee154_fcf_t* fcfp = fcf(msg); + fcfp->ack_request = 0; + return SUCCESS; + } + + async command bool PacketAcknowledgements.wasAcked(message_t* msg) { + atomic return !!tx_acked; + } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/layers/StubLowPowerListeningC.nc b/tos/chips/msp430/rf1a/layers/StubLowPowerListeningC.nc new file mode 100644 index 0000000000..13abf58111 --- /dev/null +++ b/tos/chips/msp430/rf1a/layers/StubLowPowerListeningC.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +module StubLowPowerListeningC { + provides { + interface LowPowerListening; + } +} implementation { + uint16_t local_wakeup_interval_ms; + uint16_t remote_wakeup_interval_ms; + + command void LowPowerListening.setLocalWakeupInterval(uint16_t intervalMs) { local_wakeup_interval_ms = intervalMs; } + + command uint16_t LowPowerListening.getLocalWakeupInterval() { return local_wakeup_interval_ms; } + + command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs) { remote_wakeup_interval_ms = intervalMs; } + + command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { return remote_wakeup_interval_ms; } +} diff --git a/tos/chips/msp430/rf1a/layers/StubPacketAcknowledgementsC.nc b/tos/chips/msp430/rf1a/layers/StubPacketAcknowledgementsC.nc new file mode 100644 index 0000000000..45d0c20c73 --- /dev/null +++ b/tos/chips/msp430/rf1a/layers/StubPacketAcknowledgementsC.nc @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +module StubPacketAcknowledgementsC { + provides { + interface PacketAcknowledgements; + } +} implementation { + + async command error_t PacketAcknowledgements.requestAck (message_t* msg) { return FAIL; } + + async command error_t PacketAcknowledgements.noAck (message_t* msg) { return FAIL; } + + async command bool PacketAcknowledgements.wasAcked (message_t* msg) { return FALSE; } +} diff --git a/tos/chips/msp430/rf1a/layers/UniqueReceiveC.nc b/tos/chips/msp430/rf1a/layers/UniqueReceiveC.nc new file mode 100644 index 0000000000..ffdef5a778 --- /dev/null +++ b/tos/chips/msp430/rf1a/layers/UniqueReceiveC.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * If the source address and dsn number of a newly received message matches + * our recent history, we drop the message because we've already seen it. + * This should sit near the bottom of the stack, after packets have been + * filtered for this node. + * + * @author David Moss + */ + +generic configuration UniqueReceiveC() { + provides { + interface Receive; + interface Receive as DuplicateReceive; + } + uses { + interface Receive as SubReceive; + } +} + +implementation { + + components UniqueReceiveP; + + Receive = UniqueReceiveP.Receive; + DuplicateReceive = UniqueReceiveP.DuplicateReceive; + SubReceive = UniqueReceiveP.SubReceive; + + components new KeyValueRecordC(); + UniqueReceiveP.KeyValueRecord -> KeyValueRecordC; +} diff --git a/tos/chips/msp430/rf1a/layers/UniqueReceiveP.nc b/tos/chips/msp430/rf1a/layers/UniqueReceiveP.nc new file mode 100644 index 0000000000..077e6905cd --- /dev/null +++ b/tos/chips/msp430/rf1a/layers/UniqueReceiveP.nc @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This layer keeps a history of the past RECEIVE_HISTORY_SIZE received messages + * If the source address and dsn number of a newly received message matches + * our recent history, we drop the message because we've already seen it. + * + * @author David Moss + */ + +module UniqueReceiveP { + provides { + interface Receive; + interface Receive as DuplicateReceive; + } + uses { + interface Receive as SubReceive; + interface KeyValueRecord; + } +} + +implementation { + + /** Convenience typedef denoting the structure used as a physical + * layer header. */ + typedef rf1a_ieee154_t header_t; + + /** Get a cast pointer to the physical layer header */ + header_t* header (message_t* msg) { return -1 + (header_t*)msg->data; } + + /***************** SubReceive Events *****************/ + event message_t *SubReceive.receive(message_t* msg, void* payload, + uint8_t len) { + header_t* hp = header(msg); + uint16_t msgSource = hp->src; + uint8_t msgDsn = hp->dsn; + + if(call KeyValueRecord.hasSeen(msgSource, msgDsn)) { + return signal DuplicateReceive.receive(msg, payload, len); + } + call KeyValueRecord.insert(msgSource, msgDsn); + return signal Receive.receive(msg, payload, len); + } + + /***************** Defaults ****************/ + default event message_t *DuplicateReceive.receive(message_t *msg, void *payload, uint8_t len) { + return msg; + } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aC.nc b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aC.nc new file mode 100644 index 0000000000..fe5737a325 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aC.nc @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Hardware presentation for an entire RF1A radio module. + * + * This configuration integrates low-level hardware interactions with + * TEP108-style resource management, permitting the radio to be shared + * among components that use distinct radio configurations. + * + * @author Peter A. Bigot + */ + +generic configuration HplMsp430Rf1aC ( + /** Offset of RF1AxIFCTL0_ register for x=module_instance */ + unsigned int RF1AxIFCTL0_, + /** Name of resource used to arbitrate modes of this USCI instance */ + char CLIENT_RESOURCE[] +) @safe() { + provides { + interface HplMsp430Rf1aIf; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ArbiterInfo; + interface Rf1aPhysical[uint8_t client]; + interface Rf1aPhysicalMetadata; + interface Rf1aStatus; + } + uses { + interface Rf1aConfigure[uint8_t client]; + interface Rf1aTransmitFragment[uint8_t client]; + } +} implementation { + enum { + /** Identifier for this RF1A module, unique across chip */ + RF1A_ID = unique(UQ_MSP430_RF1A) + }; + + components new HplMsp430Rf1aIfP(RF1A_ID, RF1AxIFCTL0_) as HplRf1aIfP; + HplMsp430Rf1aIf = HplRf1aIfP; + + components new SimpleFcfsArbiterC(CLIENT_RESOURCE) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ArbiterInfo = ArbiterC; + + components new HplMsp430Rf1aP() as HplRf1aP; + HplRf1aP.Rf1aIf -> HplRf1aIfP; + ArbiterC.ResourceConfigure -> HplRf1aP; + HplRf1aP.ArbiterInfo -> ArbiterC; + Rf1aConfigure = HplRf1aP; + Rf1aPhysical = HplRf1aP; + Rf1aPhysicalMetadata = HplRf1aP; + Rf1aTransmitFragment = HplRf1aP; + Rf1aStatus = HplRf1aP; + + components HplMsp430Rf1aInterruptP; + HplRf1aP.Rf1aInterrupts -> HplMsp430Rf1aInterruptP; + HplMsp430Rf1aInterruptP.ArbiterInfo -> ArbiterC; + + components LedsC; + HplRf1aP.Leds -> LedsC; + HplMsp430Rf1aInterruptP.Leds -> LedsC; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIf.nc b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIf.nc new file mode 100644 index 0000000000..904733b8bd --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIf.nc @@ -0,0 +1,452 @@ +/** + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Control of an MSP430 RF1A radio module. + * + * A module implementing this interface provides read and write access + * to all RF1A interface registers, as well as specific higher-level + * commands such as the ability to read and write RF1A core registers + * and strobe commands. + * + * @author Peter A. Bigot + */ + +interface HplMsp430Rf1aIf { + + /* ---------------------------------------- + * Introspection to identify a module when given a reference to its + * component + */ + + /** + * Return a unique identifier for this module among all RF1A modules on the chip. + */ + async command uint8_t getModuleIdentifier (); + + /* ---------------------------------------- + * Read and write the module registers. + */ + + /** + * Reads the RF1AxIFCTL0 interface control register 0. + */ + async command uint16_t getIfctl0 (); + + /** + * Writes the RF1AxIFCTL0 interface control register 0. + */ + async command void setIfctl0 (uint16_t v); + + /** + * Reads the RF1AxIFCTL1 interface control register 1. + */ + async command uint16_t getIfctl1 (); + + /** + * Writes the RF1AxIFCTL1 interface control register 1. + */ + async command void setIfctl1 (uint16_t v); + + /** + * Reads the RF1AxIFIFG interface interrupt flag register. + */ + async command uint8_t getIfifg (); + + /** + * Writes the RF1AxIFIFG interface interrupt flag register. + */ + async command void setIfifg (uint8_t v); + + /** + * Reads the RF1AxIFIE interface interrupt enable register. + */ + async command uint8_t getIfie (); + + /** + * Writes the RF1AxIFIE interface interrupt enable register. + */ + async command void setIfie (uint8_t v); + + /** + * Reads the RF1AxIFERR interface error flag register. + */ + async command uint16_t getIferr (); + + /** + * Writes the RF1AxIFERR interface error flag register. + */ + async command void setIferr (uint16_t v); + + /** + * Reads the RF1AxIFERRV interface error vector word register. + */ + async command uint16_t getIferrv (); + + /** + * Writes the RF1AxIFERRV interface error vector word register. + */ + async command void setIferrv (uint16_t v); + + /** + * Reads the RF1AxIFIV interface interrupt vector word register. + */ + async command uint16_t getIfiv (); + + /** + * Writes the RF1AxIFIV interface interrupt vector word register. + */ + async command void setIfiv (uint16_t v); + + /** + * Reads the RF1AxINSTRW instruction word register. + */ + async command uint16_t getInstrw (); + + /** + * Writes the RF1AxINSTRW instruction word register. + */ + async command void setInstrw (uint16_t v); + + /** + * Reads the RF1AxDINB byte data in register. + */ + async command uint8_t getDinb (); + + /** + * Writes the RF1AxDINB byte data in register. + */ + async command void setDinb (uint8_t v); + + /** + * Reads the RF1AxINSTRB instruction byte register. + */ + async command uint8_t getInstrb (); + + /** + * Writes the RF1AxINSTRB instructino byte register. + */ + async command void setInstrb (uint8_t v); + + /** + * Reads the RF1AxINSTR1B instruction byte register with 1-byte auto-read. + */ + async command uint8_t getInstr1b (); + + /** + * Writes the RF1AxINSTR1B instruction byte register with 1-byte auto-read. + */ + async command void setInstr1b (uint8_t v); + + /** + * Reads the RF1AxINSTR2B instruction byte register with 2-byte auto-read. + */ + async command uint8_t getInstr2b (); + + /** + * Writes the RF1AxINSTR2B instruction byte register with 2-byte auto-read. + */ + async command void setInstr2b (uint8_t v); + + /** + * Reads the RF1AxADINW word data in register. + */ + async command uint16_t getAdinw (); + + /** + * Writes the RF1AxADINW word data in register. + */ + async command void setAdinw (uint16_t v); + + /** + * Reads the RF1AxSTATW status word register without auto-read. + */ + async command uint16_t getStatw (); + + /** + * Writes the RF1AxSTATW status word register without auto-read. + */ + async command void setStatw (uint16_t v); + + /** + * Reads the RF1AxDOUTB byte data out register without auto-read. + */ + async command uint8_t getDoutb (); + + /** + * Writes the RF1AxDOUTB byte data out register without auto-read. + */ + async command void setDoutb (uint8_t v); + + /** + * Reads the RF1AxSTATB status byte register without auto-read. + */ + async command uint8_t getStatb (); + + /** + * Writes the RF1AxSTATB status byte register without auto-read. + */ + async command void setStatb (uint8_t v); + + /** + * Reads the RF1AxSTAT1W status word register with 1-byte auto-read. + */ + async command uint16_t getStat1w (); + + /** + * Writes the RF1AxSTAT1W status word register with 1-byte auto-read. + */ + async command void setStat1w (uint16_t v); + + /** + * Reads the RF1AxDOUT1B byte data out register with 1-byte auto-read. + */ + async command uint8_t getDout1b (); + + /** + * Writes the RF1AxDOUT1B byte data out register with 1-byte auto-read. + */ + async command void setDout1b (uint8_t v); + + /** + * Reads the RF1AxSTAT1B status byte register with 1-byte auto-read. + */ + async command uint8_t getStat1b (); + + /** + * Writes the RF1AxSTAT1B status byte register with 1-byte auto-read. + */ + async command void setStat1b (uint8_t v); + + /** + * Reads the RF1AxSTAT2W status word register with 2-byte auto-read. + */ + async command uint16_t getStat2w (); + + /** + * Writes the RF1AxSTAT2W status word register with 2-byte auto-read. + */ + async command void setStat2w (uint16_t v); + + /** + * Reads the RF1AxDOUT2B byte data out register with 2-byte auto-read. + */ + async command uint8_t getDout2b (); + + /** + * Writes the RF1AxDOUT2B byte data out register with 2-byte auto-read. + */ + async command void setDout2b (uint8_t v); + + /** + * Reads the RF1AxSTAT2B status byte register with 2-byte auto-read. + */ + async command uint8_t getStat2b (); + + /** + * Writes the RF1AxSTAT2B status byte register with 2-byte auto-read. + */ + async command void setStat2b (uint8_t v); + + /** + * Reads the RF1AxDOUTW data out register without auto-read + */ + async command uint16_t getDoutw (); + + /** + * Writes the RF1AxDOUTW data out register without auto-read + */ + async command void setDoutw (uint16_t v); + + /** + * Reads the RF1AxDOUT1W data out register with 1-byte auto-read + */ + async command uint16_t getDout1w (); + + /** + * Writes the RF1AxDOUT1W data out register with 1-byte auto-read + */ + async command void setDout1w (uint16_t v); + + /** + * Reads the RF1AxDOUT2W data out register with 2-byte auto-read + */ + async command uint16_t getDout2w (); + + /** + * Writes the RF1AxDOUT2W data out register with 2-byte auto-read + */ + async command void setDout2w (uint16_t v); + + /** + * Reads the RF1AxIN core signal input register. + */ + async command uint16_t getIn (); + + /** + * Writes the RF1AxIN core signal input register. + */ + async command void setIn (uint16_t v); + + /** + * Reads the RF1AxIFG core interrupt flag register. + */ + async command uint16_t getIfg (); + + /** + * Writes the RF1AxIFG core interrupt register. + */ + async command void setIfg (uint16_t v); + + /** + * Reads the RF1AxIES core interrupt edge select register. + */ + async command uint16_t getIes (); + + /** + * Writes the RF1AxIES core interrupt edge select register. + */ + async command void setIes (uint16_t v); + + /** + * Reads the RF1AxIE core interrupt enable register. + */ + async command uint16_t getIe (); + + /** + * Writes the RF1AxIE core interrupt enable register. + */ + async command void setIe (uint16_t v); + + /** + * Reads the RF1AxIV core interrupt vector word register. + */ + async command uint16_t getIv (); + + /** + * Writes the RF1AxIV core interrupt vector word register. + */ + async command void setIv (uint16_t v); + + /** + * Reads the RF1AxRXFIFO direct receive FIFO access register. + */ + async command uint8_t getRxfifo (); + + /** + * Writes the RF1AxRXFIFO direct receive FIFO access register. + */ + async command void setRxfifo (uint8_t v); + + /** + * Reads the RF1AxTXFIFO direct transmit FIFO access register. + */ + async command uint8_t getTxfifo (); + + /** + * Writes the RF1AxTXFIFO direct transmit FIFO access register. + */ + async command void setTxfifo (uint8_t v); + + /* ---------------------------------------- + * Higher-level operations. + */ + + /** + * Send a command strobe. + * + * @param instr The instruction value: a valid RF1A command strobe + * between SRES and SNOP. The high bit may be set to indicate the + * source for the returned status. + * + * @return If the instruction is invalid, returns 0xFF. If the + * instruction is SRES, returns 0. For all other valid + * instructions, returns the number of bytes available in the TX + * (RX) FIFO if the high bit was zero (one). + */ + async command uint8_t strobe (uint8_t instr); + + /** Read the value from a given register. + * + * @param addr A valid RF1A register address + * + * @return The contents of the register + */ + async command uint8_t readRegister (uint8_t addr); + + /** Write a value into a given register. + * + * @param addr A valid RF1A configuration register address + * @param val The value to be written + */ + async command void writeRegister (uint8_t addr, uint8_t val); + + /** Read multiple values from a register. + * @param addr A valid RF1A register address + * @param buf Destination for the data to be read + * @param len The number of octets to be read + */ + async command void readBurstRegister (uint8_t addr, + uint8_t* buf, + uint8_t len); + + /** Write multiple values to a register. + * @param addr A valid RF1A register address + * @param buf Source for the data to be written + * @param len The number of octets to be written + */ + async command void writeBurstRegister (uint8_t addr, + const uint8_t* buf, + uint8_t len); + + /** Reset the radio core. + * + * After executing this, all registers will be at their power-up + * defaults, and the radio will be in sleep mode (NB: this is a + * difference from the CC1101, which would have put the radio in + * idle mode). + * + * @return The status byte following the reset. Expected value is + * 0x8f. + */ + async command uint8_t resetRadioCore (); +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIfP.nc b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIfP.nc new file mode 100644 index 0000000000..811f01d971 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIfP.nc @@ -0,0 +1,323 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Radio interface implementation for any RF1A module present. + * + * This module makes available the module-specific interface registers and + * implements the interface to the module core registers. + * + * @author Peter A. Bigot + */ + +generic module HplMsp430Rf1aIfP ( + /** Identifier for this RF1A module, unique across chip */ + uint8_t RF1A_ID, + /** Offset of RF1AxIFCTL0_ register for x=module_instance */ + unsigned int RF1AxIFCTL0_ +) @safe() { + provides { + interface HplMsp430Rf1aIf; + } +} implementation { + +#define RF1AxIFCTL0 (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x00)) +#define RF1AxIFCTL1 (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x02)) +#define RF1AxIFIFG (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x02)) +#define RF1AxIFIE (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x03)) +#define RF1AxIFERR (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x06)) +#define RF1AxIFERRV (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x0C)) +#define RF1AxIFIV (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x0E)) +#define RF1AxINSTRW (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x10)) +#define RF1AxDINB (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x10)) +#define RF1AxINSTRB (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x11)) +#define RF1AxINSTR1W (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x12)) +#define RF1AxINSTR1B (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x13)) +#define RF1AxINSTR2W (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x14)) +#define RF1AxINSTR2B (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x15)) +#define RF1AxADINW (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x16)) +#define RF1AxSTATW (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x20)) +#define RF1AxDOUTB (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x20)) +#define RF1AxSTATB (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x21)) +#define RF1AxSTAT1W (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x22)) +#define RF1AxDOUT1B (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x22)) +#define RF1AxSTAT1B (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x23)) +#define RF1AxSTAT2W (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x24)) +#define RF1AxDOUT2B (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x24)) +#define RF1AxSTAT2B (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x25)) +#define RF1AxDOUTW (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x28)) +#define RF1AxDOUT1W (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x2a)) +#define RF1AxDOUT2W (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x2c)) +#define RF1AxIN (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x30)) +#define RF1AxIFG (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x32)) +#define RF1AxIES (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x34)) +#define RF1AxIE (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x36)) +#define RF1AxIV (*TCAST(volatile uint16_t* ONE, RF1AxIFCTL0_ + 0x38)) +#define RF1AxRXFIFO (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x3c)) +#define RF1AxTXFIFO (*TCAST(volatile uint8_t* ONE, RF1AxIFCTL0_ + 0x3e)) + + async command uint8_t HplMsp430Rf1aIf.getModuleIdentifier () { atomic return RF1A_ID; } + async command uint16_t HplMsp430Rf1aIf.getIfctl0 () { atomic return RF1AxIFCTL0; } + async command void HplMsp430Rf1aIf.setIfctl0 (uint16_t v) { atomic RF1AxIFCTL0 = v; } + async command uint16_t HplMsp430Rf1aIf.getIfctl1 () { atomic return RF1AxIFCTL1; } + async command void HplMsp430Rf1aIf.setIfctl1 (uint16_t v) { atomic RF1AxIFCTL1 = v; } + async command uint8_t HplMsp430Rf1aIf.getIfifg () { atomic return RF1AxIFIFG; } + async command void HplMsp430Rf1aIf.setIfifg (uint8_t v) { atomic RF1AxIFIFG = v; } + async command uint8_t HplMsp430Rf1aIf.getIfie () { atomic return RF1AxIFIE; } + async command void HplMsp430Rf1aIf.setIfie (uint8_t v) { atomic RF1AxIFIE = v; } + async command uint16_t HplMsp430Rf1aIf.getIferr () { atomic return RF1AxIFERR; } + async command void HplMsp430Rf1aIf.setIferr (uint16_t v) { atomic RF1AxIFERR = v; } + async command uint16_t HplMsp430Rf1aIf.getIferrv () { atomic return RF1AxIFERRV; } + async command void HplMsp430Rf1aIf.setIferrv (uint16_t v) { atomic RF1AxIFERRV = v; } + async command uint16_t HplMsp430Rf1aIf.getIfiv () { atomic return RF1AxIFIV; } + async command void HplMsp430Rf1aIf.setIfiv (uint16_t v) { atomic RF1AxIFIV = v; } + async command uint16_t HplMsp430Rf1aIf.getInstrw () { atomic return RF1AxINSTRW; } + async command void HplMsp430Rf1aIf.setInstrw (uint16_t v) { atomic RF1AxINSTRW = v; } + async command uint8_t HplMsp430Rf1aIf.getDinb () { atomic return RF1AxDINB; } + async command void HplMsp430Rf1aIf.setDinb (uint8_t v) { atomic RF1AxDINB = v; } + async command uint8_t HplMsp430Rf1aIf.getInstrb () { atomic return RF1AxINSTRB; } + async command void HplMsp430Rf1aIf.setInstrb (uint8_t v) { atomic RF1AxINSTRB = v; } + async command uint8_t HplMsp430Rf1aIf.getInstr1b () { atomic return RF1AxINSTR1B; } + async command void HplMsp430Rf1aIf.setInstr1b (uint8_t v) { atomic RF1AxINSTR1B = v; } + async command uint8_t HplMsp430Rf1aIf.getInstr2b () { atomic return RF1AxINSTR2B; } + async command void HplMsp430Rf1aIf.setInstr2b (uint8_t v) { atomic RF1AxINSTR2B = v; } + async command uint16_t HplMsp430Rf1aIf.getAdinw () { atomic return RF1AxADINW; } + async command void HplMsp430Rf1aIf.setAdinw (uint16_t v) { atomic RF1AxADINW = v; } + async command uint16_t HplMsp430Rf1aIf.getStatw () { atomic return RF1AxSTATW; } + async command void HplMsp430Rf1aIf.setStatw (uint16_t v) { atomic RF1AxSTATW = v; } + async command uint8_t HplMsp430Rf1aIf.getDoutb () { atomic return RF1AxDOUTB; } + async command void HplMsp430Rf1aIf.setDoutb (uint8_t v) { atomic RF1AxDOUTB = v; } + async command uint8_t HplMsp430Rf1aIf.getStatb () { atomic return RF1AxSTATB; } + async command void HplMsp430Rf1aIf.setStatb (uint8_t v) { atomic RF1AxSTATB = v; } + async command uint16_t HplMsp430Rf1aIf.getStat1w () { atomic return RF1AxSTAT1W; } + async command void HplMsp430Rf1aIf.setStat1w (uint16_t v) { atomic RF1AxSTAT1W = v; } + async command uint8_t HplMsp430Rf1aIf.getDout1b () { atomic return RF1AxDOUT1B; } + async command void HplMsp430Rf1aIf.setDout1b (uint8_t v) { atomic RF1AxDOUT1B = v; } + async command uint8_t HplMsp430Rf1aIf.getStat1b () { atomic return RF1AxSTAT1B; } + async command void HplMsp430Rf1aIf.setStat1b (uint8_t v) { atomic RF1AxSTAT1B = v; } + async command uint16_t HplMsp430Rf1aIf.getStat2w () { atomic return RF1AxSTAT2W; } + async command void HplMsp430Rf1aIf.setStat2w (uint16_t v) { atomic RF1AxSTAT2W = v; } + async command uint8_t HplMsp430Rf1aIf.getDout2b () { atomic return RF1AxDOUT2B; } + async command void HplMsp430Rf1aIf.setDout2b (uint8_t v) { atomic RF1AxDOUT2B = v; } + async command uint8_t HplMsp430Rf1aIf.getStat2b () { atomic return RF1AxSTAT2B; } + async command void HplMsp430Rf1aIf.setStat2b (uint8_t v) { atomic RF1AxSTAT2B = v; } + async command uint16_t HplMsp430Rf1aIf.getDoutw () { atomic return RF1AxDOUTW; } + async command void HplMsp430Rf1aIf.setDoutw (uint16_t v) { atomic RF1AxDOUTW = v; } + async command uint16_t HplMsp430Rf1aIf.getDout1w () { atomic return RF1AxDOUT1W; } + async command void HplMsp430Rf1aIf.setDout1w (uint16_t v) { atomic RF1AxDOUT1W = v; } + async command uint16_t HplMsp430Rf1aIf.getDout2w () { atomic return RF1AxDOUT2W; } + async command void HplMsp430Rf1aIf.setDout2w (uint16_t v) { atomic RF1AxDOUT2W = v; } + async command uint16_t HplMsp430Rf1aIf.getIn () { atomic return RF1AxIN; } + async command void HplMsp430Rf1aIf.setIn (uint16_t v) { atomic RF1AxIN = v; } + async command uint16_t HplMsp430Rf1aIf.getIfg () { atomic return RF1AxIFG; } + async command void HplMsp430Rf1aIf.setIfg (uint16_t v) { atomic RF1AxIFG = v; } + async command uint16_t HplMsp430Rf1aIf.getIes () { atomic return RF1AxIES; } + async command void HplMsp430Rf1aIf.setIes (uint16_t v) { atomic RF1AxIES = v; } + async command uint16_t HplMsp430Rf1aIf.getIe () { atomic return RF1AxIE; } + async command void HplMsp430Rf1aIf.setIe (uint16_t v) { atomic RF1AxIE = v; } + async command uint16_t HplMsp430Rf1aIf.getIv () { atomic return RF1AxIV; } + async command void HplMsp430Rf1aIf.setIv (uint16_t v) { atomic RF1AxIV = v; } + async command uint8_t HplMsp430Rf1aIf.getRxfifo () { atomic return RF1AxRXFIFO; } + async command void HplMsp430Rf1aIf.setRxfifo (uint8_t v) { atomic RF1AxRXFIFO = v; } + async command uint8_t HplMsp430Rf1aIf.getTxfifo () { atomic return RF1AxTXFIFO; } + async command void HplMsp430Rf1aIf.setTxfifo (uint8_t v) { atomic RF1AxTXFIFO = v; } + + async command uint8_t HplMsp430Rf1aIf.strobe (uint8_t instr) { + unsigned char rv = 0xFF; + atomic { + uint8_t base_instr = instr & ~RF_RXSTAT; + if ((RF_SRES <= base_instr) && (base_instr <= RF_SNOP)) { + rv = 0; + RF1AIFCTL1 &= ~(RFSTATIFG); // Clear the status read flag + + while (! (RF1AIFCTL1 & RFINSTRIFG)) { + ; // Wait for INSTRIFG + } + RF1AINSTRB = instr; // Write the strobe command + + // Everything but SRES returns a status byte + if (RF_SRES != base_instr) { + while (! (RF1AIFCTL1 & RFSTATIFG)) { + if (RF1AIFCTL1 & RFERRIFG) { + (void)RF1AIFERRV; + rv = 0xff; + break; + } + ; // Wait for the status to be valid + } + if (RF1AIFCTL1 & RFSTATIFG) { + rv = RF1ASTATB; + } + } + } + } + return rv; + } + + async command uint8_t HplMsp430Rf1aIf.readRegister (uint8_t addr) { + atomic { + while (! (RF1AIFCTL1 & RFINSTRIFG)) { + ; // Wait for INSTRIFG + } + if ((TEST0 >= addr) || (PATABLE == addr)) { + RF1AINSTR1B = (RF_SNGLREGRD | addr); + } else { + RF1AINSTR1B = (RF_STATREGRD | addr); + } + while (! (RF1AIFCTL1 & RFDOUTIFG)) { + ; // Wait for the data to be valid + } + return RF1ADOUTB; + } + } + + async command void HplMsp430Rf1aIf.writeRegister (uint8_t addr, + uint8_t val) { + atomic { + while (! (RF1AIFCTL1 & RFINSTRIFG)) { + ; // Wait for INSTRIFG + } + if (TEST0 >= addr) { + RF1AINSTRB = (RF_REGWR | addr); + } else { + RF1AINSTRB = (RF_SNGLREGWR | addr); + } + RF1ADINB = val; + __no_operation(); + } + } + + async command void HplMsp430Rf1aIf.readBurstRegister (uint8_t addr, + uint8_t* buf, + uint8_t len) { + uint8_t* b1e = buf + len - 1; + + if (0 == len) { + return; + } + atomic { + while (! (RF1AIFCTL1 & RFINSTRIFG)) { + ; // Wait for INSTRIFG + } + + RF1AINSTR1B = (addr | RF_REGRD); + while (buf < b1e) { + while (! (RF1AIFCTL1 & RFDOUTIFG)) { + ; // Wait for the Radio Core to update the RF1ADOUTB reg + } + *buf++ = RF1ADOUT1B; + } + *buf++ = RF1ADOUT0B; + } + } + + async command void HplMsp430Rf1aIf.writeBurstRegister (uint8_t addr, + const uint8_t* buf, + uint8_t len) { + const uint8_t* be = buf + len; + + if (0 == len) { + return; + } + atomic { + while (! (RF1AIFCTL1 & RFINSTRIFG)) { + ; // Wait for INSTRIFG + } + + // Send address, instruction, and first data byte + RF1AINSTRW = ((addr | RF_REGWR) << 8) + *buf++; + + while (buf < be) { + RF1ADINB = *buf++; + while (! (RF1AIFCTL1 & RFDINIFG)) { + ; // Wait for write to complete + } + } + (void) RF1ADOUTB; + } + } + + async command uint8_t HplMsp430Rf1aIf.resetRadioCore () { + uint8_t rv; + atomic { + call HplMsp430Rf1aIf.strobe(RF_SRES); + rv = call HplMsp430Rf1aIf.strobe(RF_SNOP); + } + return rv; + } + + +#undef RF1AxTXFIFO +#undef RF1AxRXFIFO +#undef RF1AxIV +#undef RF1AxIE +#undef RF1AxIES +#undef RF1AxIFG +#undef RF1AxIN +#undef RF1AxDOUT2W +#undef RF1AxDOUT1W +#undef RF1AxDOUTW +#undef RF1AxSTAT2B +#undef RF1AxDOUT2B +#undef RF1AxSTAT2W +#undef RF1AxSTAT1B +#undef RF1AxDOUT1B +#undef RF1AxSTAT1W +#undef RF1AxSTATB +#undef RF1AxDOUTB +#undef RF1AxSTATW +#undef RF1AxADINW +#undef RF1AxINSTR2B +#undef RF1AxINSTR2W +#undef RF1AxINSTR1B +#undef RF1AxINSTR1W +#undef RF1AxINSTRB +#undef RF1AxDINB +#undef RF1AxINSTRW +#undef RF1AxIFIV +#undef RF1AxIFERRV +#undef RF1AxIFERR +#undef RF1AxIFIE +#undef RF1AxIFIFG +#undef RF1AxIFCTL1 +#undef RF1AxIFCTL0 +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aInterruptP.nc b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aInterruptP.nc new file mode 100644 index 0000000000..96c69eaa24 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aInterruptP.nc @@ -0,0 +1,147 @@ +/** + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Interface to the interrupts of a single RF1A module. Really + * belongs in HplMsp430Rf1aIfP, but must define a C-linkage function + * which is not possible in a generic module. + * + * This converts hardware interrupts into client-specific signals of + * interface-specific events. + * + * @author Peter A. Bigot + */ + +module HplMsp430Rf1aInterruptP { + provides { + interface Rf1aInterrupts[uint8_t client]; + } + uses { + interface ArbiterInfo; + interface Leds; + } +} implementation { + + /** Convert the value read from the interrupt vector register into + * the corresponding bit position in the interrupt words. + */ + uint8_t ivToBit (uint8_t iv) { + return (iv >> 1) - 1; + } + + TOSH_SIGNAL(CC1101_VECTOR) { + uint16_t coreInterrupt = RF1AIV; + uint8_t client = call ArbiterInfo.userId(); + + /* If the module isn't in use, there's nobody to signal. */ + if (! call ArbiterInfo.inUse()) { + return; + } + + /* Full wake-up on return. + * @todo Really only certain situations require a wakeup. Provide a + * mechanism to nodify this level of those situations. + */ + __bic_SR_register_on_exit(LPM4_bits); + + /* A value of 0 indicates an interface interrupt, which is currently + * not made available + */ + if (coreInterrupt) { + +#if 0 + /* @TODO@ I have observed a case where IFG5 negative edge correctly + * received an interrupt, but the state was not reflected in + * RF1AIN. Ignoring the interrupt resulted in lost data. The + * errata may be erroneous. + */ + + /* ERRATA RF1A5: Interrupt may be generated even though FIFO + * condition does not hold. Must validate against RF1AIN. + */ + uint16_t ifg_bit = 1 << ((coreInterrupt >> 1) - 1); +// RF1AIFG &= ~ ifg_bit; + if ((RF1AIV_RFIFG3 <= coreInterrupt) + && (coreInterrupt <= RF1AIV_RFIFG10) + && (! (ifg_bit & RF1AIN))) { + return; + } +#endif + + switch (coreInterrupt) { + default: + signal Rf1aInterrupts.coreInterrupt[client](coreInterrupt); + break; + case RF1AIV_RFIFG4: + signal Rf1aInterrupts.rxFifoAvailable[client](); + break; + case RF1AIV_RFIFG5: + signal Rf1aInterrupts.txFifoAvailable[client](); + break; + case RF1AIV_RFIFG7: + signal Rf1aInterrupts.rxOverflow[client](); + break; + case RF1AIV_RFIFG8: + signal Rf1aInterrupts.txUnderflow[client](); + break; + case RF1AIV_RFIFG9: + signal Rf1aInterrupts.syncWordEvent[client](); + break; + case RF1AIV_RFIFG12: + signal Rf1aInterrupts.clearChannel[client](); + break; + case RF1AIV_RFIFG13: + signal Rf1aInterrupts.carrierSense[client](); + break; + } + } + } + + default async event void Rf1aInterrupts.rxFifoAvailable[uint8_t client] () { } + default async event void Rf1aInterrupts.txFifoAvailable[uint8_t client] () { } + default async event void Rf1aInterrupts.rxOverflow[uint8_t client] () { } + default async event void Rf1aInterrupts.txUnderflow[uint8_t client] () { } + default async event void Rf1aInterrupts.syncWordEvent[uint8_t client] () { } + default async event void Rf1aInterrupts.clearChannel[uint8_t client] () { } + default async event void Rf1aInterrupts.carrierSense[uint8_t client] () { } + default async event void Rf1aInterrupts.coreInterrupt[uint8_t client] (uint16_t iv) { } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aP.nc b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aP.nc new file mode 100644 index 0000000000..6f7f649312 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aP.nc @@ -0,0 +1,1552 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1aPacket.h" + +/** Implement the physical layer of the radio stack. + * + * This module follows TEP108-style resource management. Each client + * of the radio is entitled to use a different configuration + * (including frequencies and data rates), and to manage the + * higher-level packet content. Hooks are added so that message + * payload can be dynamically created on transmission, and stored in + * arbitrary locations on reception. There is no interface limit on + * the physical message size, though the current implementation + * supports only packets no more than 255 octets. + * + * Several assumptions are made about the radio configuration. + * Signals are configured for specific FIFO status, + * transmission/reception events, and signal state. Radio state + * transition is fixed: if no client is active, the radio is reset + * (SLEEP); if a client is active but has no receive buffer prepared + * it is IDLE; if a receive buffer is available it is RX. The + * CCA_MODE and TX-if-CCA features are enabled, but can be bypassed if + * necessary through judicious use of the Rf1aPhysical methods. + */ + +generic module HplMsp430Rf1aP () @safe() { + provides { + interface ResourceConfigure[uint8_t client]; + interface Rf1aPhysical[uint8_t client]; + interface Rf1aStatus; + interface Rf1aPhysicalMetadata; + } + uses { + interface ArbiterInfo; + interface HplMsp430Rf1aIf as Rf1aIf; + interface Rf1aConfigure[uint8_t client]; + interface Rf1aTransmitFragment[uint8_t client]; + interface Rf1aInterrupts[uint8_t client]; + interface Leds; + } +} implementation { + + /* See configure_ for details. on how these signals are used. */ + enum { + // IFG4 positive to detect RX data available + IFG_rxFifoAboveThreshold = (1 << 4), + // IFG5 negative to detect RX data available + IFG_txFifoAboveThreshold = (1 << 5), + // IFG7 positive to detect RX FIFO overflow + IFG_rxOverflow = (1 << 7), // positive + // IFG8 positive to detect TX FIFO underflow + IFG_txUnderflow = (1 << 8), + // IFG9 positive to detect sync word + IFG_syncWordEvent = (1 << 9), + // IFG12 positive to perform clear channel assessment + IFG_clearChannel = (1 << 12), + // IFG13 positive to detect signal presence + IFG_carrierSense = (1 << 13), + IFG_INTERRUPT = IFG_rxFifoAboveThreshold | IFG_txFifoAboveThreshold + | IFG_rxOverflow | IFG_txUnderflow + | IFG_syncWordEvent + | IFG_clearChannel | IFG_carrierSense, + IFG_EDGE_Negative = IFG_txFifoAboveThreshold, + IFG_EDGE_Positive = IFG_rxFifoAboveThreshold + | IFG_rxOverflow | IFG_txUnderflow + | IFG_syncWordEvent + | IFG_clearChannel | IFG_carrierSense, + }; + + enum { + /** Limit on iterations for loops awaiting a particular radio + * state. This is used to avoid an unbreakable loop when the + * radio spontaneously enters IDLE mode, or fails to complete a + * requested transition in an unanticipated way. The number is + * rather arbitrary, and is based on experience showing a maximum + * of perhaps 1200 iterations before success in the normal + * situation for at least one such loop. It should not be too + * large, to prevent long hangs. It's somewhat safe to make it + * "too small", since it should be used in situations where the + * failure is propagated to allow the upper layers to retry the + * operation. */ + RADIO_LOOP_LIMIT = 2000, + }; + + /** Constants defining the main radio control state machine state. + * This is a high-resolution insight into what's going on, provided + * by the MARCSTATE register. It must be consulted sometimes to + * work around radio bugs. + */ + enum { + MRCSM_SLEEP = 0, // SLEEP substate of SLEEP + MRCSM_IDLE = 1, // IDLE substate of IDLE + MRCSM_XOFF = 2, // XOFF substate of XOFF + MRCSM_VCOON_MC = 3, // VCOON_MC substate of MANCAL, + MRCSM_REGON_MC = 4, // REGON_MC substate of MANCAL + MRCSM_MANCAL = 5, // MANCAL substate of MANCAL + MRCSM_VCOON = 6, // VCOON substate of FS_WAKEUP + MRCSM_REGON = 7, // REGON substate of FS_WAKEUP, + MRCSM_STARTCAL = 8, // STARTCAL substate of CALIBRATE + MRCSM_BWBOOST = 9, // BWBOOST substate of SETTLING + MRCSM_FS_LOCK = 10, // FS_LOCK substate of SETTLING + MRCSM_IFADCON = 11, // IFADCON substate of SETTLING, + MRCSM_ENDCAL = 12, // ENDCAL substate of CALIBRATE + MRCSM_RX = 13, // RX substate of RX + MRCSM_RX_END = 14, // RX_END substate of RX + MRCSM_RX_RST = 15, // RX_RST substate of RX, + MRCSM_TXRX_SWITCH = 16, // TXRX_SWITCH substate of TXRX_SETTLING + MRCSM_RXFIFO_OVERFLOW = 17, // RXFIFO_OVERFLOW substate of RXFIFO_OVERFLOW + MRCSM_FSTXON = 18, // FSTXON substate of FSTXON + MRCSM_TX = 19, // TX substate of TX, + MRCSM_TX_END = 20, // TX_END substate of TX + MRCSM_RXTX_SWITCH = 21, // RXTX_SWITCH substate of RXTX_SETTLING + MRCSM_TXFIFO_UNDERFLOW = 22, // TXFIFO_UNDERFLOW substate of TXFIFO_UNDERFLOW + }; + + /* Reception state transitions. The state is inactive when there is + * no receive buffer and the API has not been used to force entry to + * reception mode anyway: when the state is inactive, the radio will + * not be in receive mode. When the radio is in receive mode and is + * not transmitting, it is in listening mode. Upon receipt of data + * beginning a message, it transitions to active, where it remains + * until cancelled or the complete message has been received, at + * which point it returns to inactive of listening depending on + * availability of receive buffer space. + */ + enum { + /** Disabled when there is no receive buffer and no message + * actively being received. */ + RX_S_inactive, + /** Waiting for start of a new message. This is not an active + * state, as there is no commitment to do anything yet. */ + RX_S_listening, + /** The first data associated with an incoming message has been + * received. At this point we assume there is an active + * reception. However, the task that manages the reception has + * not yet been queued. */ + RX_S_synchronized, + /** Actively receiving a message. */ + RX_S_active, + }; + + /** Current state of the reception automaton. */ + uint8_t rx_state; + + /** Where the next data should be written. Null if there is no + * available reception buffer. Set to null in receiveData_ when + * last byte filled; set to non-null in setReceiveBuffer(). + */ + uint8_t* rx_pos; + + /** End of the available receive buffer. */ + uint8_t* rx_pos_end; + + /** Where in the current receive buffer data from the currently + * received message begins. Null when buffer has been filled. + */ + uint8_t* rx_start; + + /** TRUE iff only a single message should be stored in the given buffer. */ + bool rx_single_use; + + /** Number of bytes expected for the current message. Valid only + * when actively receiving a message. */ + unsigned int rx_expected; + + /** Number of bytes received so far in the current message. Valid + * only when actively receiving a message. */ + unsigned int rx_received; + + /** The success/failure result of the current reception. Will be + * SUCCESS unless something bad happens (reception cancelled or RX + * overflow) + */ + int rx_result; + + /** The RSSI provided via APPEND_STATUS at the last successful + * receive. This is the raw value provided by APPEND_STATUS, not + * the dBm one. */ + uint8_t rx_rssi_raw; + + /** The LQI+CRC provided via APPEND_STATUS at the last successful + * receive */ + uint8_t rx_lqi_raw; + + /* Transmission state transitions. When no send is in progress, the + * state is inactive. Upon validation of a send request, the state + * moves to preparing, and the sendFragment_() code is queued to + * run. Within sendFragment_(), as soon as message data has become + * available, as much available data as fits is placed into the + * transmit fifo, the STX strobe is executed, and the state + * transitions to active. As soon as the last octet of the message + * has been queued, the state transitions to flushing, and the + * FIFOTHR is reprogrammed to detect when the queue empties. Once + * the last byte has been transmitted, the state returns to inactive + * and the sendDone event is signaled. + * + * Be aware that the radio will spontaneously transition out of + * FSTXON if TX-if-CCA is enabled. There is evidence as well that + * this can also happen after a successful transition to TX. Code + * processing transmissions must be prepared to find itself with a + * radio that is no longer in transmit mode, and to cancel the + * transmission accordingly. + * + * Also note: Explicit invocations of startTransmission, e.g. for + * preamble signalling or jamming, are not reflected in tx_state. + */ + enum { + /** No transmission active */ + TX_S_inactive, + /** A transmission has been queued, but data has not yet been + * supplied and the radio is still in FSTXON. This is an active + * state. */ + TX_S_preparing, + /** A transmission is active. This is an active state. */ + TX_S_active, + /** All data has been queued for transmission, but has not yet + * left the TXFIFO. This is an active state. */ + TX_S_flushing, + }; + + /** Current state of the transmission automaton */ + uint8_t tx_state; + + /** The success or failure value for the current transmission */ + int tx_result; + + /** Pointer to the current position within a send()-provided + * outgoing message. Null if no active transmission or the sender + * did not provide a buffer (is doing gather transmission). Used by + * the default TransmitFragment implementation. + */ + uint8_t* tx_pos; + + /** The end of the send()-provided outgoing message. Used by the + * default TransmitFragment implementation. */ + uint8_t* tx_end; + + /** The number of octets remaining to be transmitted. This is the + * value provided through the send() method, and does not include + * octets introduced at this layer such as the length when using + * variable packet length. */ + unsigned int tx_remain; + + enum { + /** Maximum number of bytes we can put in the TX FIFO */ + FIFO_FILL_LIMIT = 63, + }; + + /** Cached value of FIFOTHR, overwritten during TX_S_flushing to + * detect completion of transmission. Only valid during + * TX_S_flushing; must be rewritten to FIFOTHR if that state is + * left. + */ + uint8_t tx_cached_fifothr; + + /** Place the radio back into whatever state it belongs in when not + * actively transmitting or receiving. This is either RX or IDLE. + * This method is capable of rousing the radio from sleep mode, as + * well as simply returning it from some other active mode. It is + * not responsible for dealing with errors like RX or TX FIFO + * over/underflows. + * + * @param rx_if_enabled If TRUE, will transition to RX if + * appropriate. If FALSE, will only transition to IDLE. + */ + + void resumeIdleMode_ (bool rx_if_enabled) { + atomic { + uint8_t strobe = RF_SIDLE; + uint8_t state = RF1A_S_IDLE; + uint8_t rc; + + /* Maybe wake radio from deep sleep */ + rc = call Rf1aIf.strobe(RF_SNOP); + if (0x80 & rc) { + while (0x80 & rc) { + atomic rc = call Rf1aIf.strobe(RF_SIDLE); + } + while (RF1A_S_IDLE != (RF1A_S_MASK & rc)) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + } + if (rx_if_enabled && (!! rx_pos)) { + strobe = RF_SRX; + state = RF1A_S_RX; + } + (void)call Rf1aIf.strobe(strobe); + do { + rc = call Rf1aIf.strobe(RF_SNOP); + } while (state != (RF1A_S_MASK & rc)); + } + } + + /** Return TRUE iff transitioning the radio to a new state will not + * corrupt an in-progress transmission. + */ + bool transmitIsInactive_atomic_ () { + return (TX_S_inactive == tx_state) && (0 == call Rf1aIf.readRegister(TXBYTES)); + } + + /** Configure the radio for a specific client. This includes + * client-specific registers and the overrides necessary to ensure + * the physical-layer assumptions are maintained. + */ + void configure_ (const rf1a_config_t* config) { + atomic { + const uint8_t* cp = (const uint8_t*)config; + + /* Reset the core. Should be unnecessary, but a BOR might leave + * the radio with garbage in its TXFIFO, which won't get cleared + * with a standard wake. */ + call Rf1aIf.resetRadioCore(); + + /* Wake the radio into idle mode */ + resumeIdleMode_(FALSE); + + /* Write the basic configuration registers. PATABLE first, so + * that the subsequent non-PATABLE instruction resets the table + * index. + */ + call Rf1aIf.writeBurstRegister(PATABLE, config->patable, sizeof(config->patable)); + call Rf1aIf.writeBurstRegister(0, cp, RF1A_CONFIG_BURST_WRITE_LENGTH); + + /* Regardless of the configuration, the core functionality here + * requires that the interrupts be configured a certain way. + * IFG signals 4, 5, 7, 8, 9, and 12 are all used. All but 5 + * are positive edge. All but 12 are interrupt enabled. Clear + * the interrupt vector then configure these interrupts. + */ + call Rf1aIf.setIfg(0); + call Rf1aIf.setIes(IFG_EDGE_Negative | ((~ IFG_EDGE_Positive) & call Rf1aIf.getIes())); + call Rf1aIf.setIe(IFG_INTERRUPT | call Rf1aIf.getIe()); + + /* Again regardless of configuration, the control flow in this + * module assumes that the radio returns to IDLE mode after + * receiving a packet, and IDLE mode after transmitting a + * packet. The presence of a receive buffer, and whether that + * buffer is marked for single-use, affects subsequent + * configuration of this register. + */ + call Rf1aIf.writeRegister(MCSM1, (0xf0 & call Rf1aIf.readRegister(MCSM1))); + + /* Reset all the packet the packet-related pointers and counters */ + rx_state = RX_S_inactive; + rx_pos = rx_pos_end = rx_start = 0; + rx_expected = rx_received = 0; + tx_state = TX_S_inactive; + tx_pos = tx_end = 0; + tx_remain = 0; + rx_result = tx_result = SUCCESS; + } + } + + async command void Rf1aPhysical.readConfiguration[uint8_t client] (rf1a_config_t* config) { + /* NB: We intentionally ignore the client here. */ + memset(config, 0, sizeof(config)); + atomic { + call Rf1aIf.readBurstRegister(PATABLE, config->patable, sizeof(config->patable)); + call Rf1aIf.readBurstRegister(0, (uint8_t*)config, RF1A_CONFIG_BURST_READ_LENGTH); + config->partnum = call Rf1aIf.readRegister(PARTNUM); + config->version = call Rf1aIf.readRegister(VERSION); + } + } + + /** Unconfigure. Disable all interrupts and reset the radio core. */ + void unconfigure_ () { + atomic { + call Rf1aIf.setIe((~ IFG_INTERRUPT) & call Rf1aIf.getIe()); + call Rf1aIf.resetRadioCore(); + } + } + + default async command const rf1a_config_t* + Rf1aConfigure.getConfiguration[uint8_t client] () { + return &rf1a_default_config; + } + + default async command void Rf1aConfigure.preConfigure[ uint8_t client ] () { } + default async command void Rf1aConfigure.postConfigure[ uint8_t client ] () { } + default async command void Rf1aConfigure.preUnconfigure[ uint8_t client ] () { } + default async command void Rf1aConfigure.postUnconfigure[ uint8_t client ] () { } + + async command void ResourceConfigure.configure[uint8_t client] () { + const rf1a_config_t* cp = call Rf1aConfigure.getConfiguration[client](); + if (0 == cp) { + cp = &rf1a_default_config; + } + call Rf1aConfigure.preConfigure[client](); + configure_(cp); + call Rf1aConfigure.postConfigure[client](); + } + + async command void ResourceConfigure.unconfigure[uint8_t client] () { + call Rf1aConfigure.preUnconfigure[client](); + unconfigure_(); + call Rf1aConfigure.postUnconfigure[client](); + signal Rf1aPhysical.released[client](); + } + + /* @TODO@ Prevent release of resource when transmission in progress */ + + /** Default implementation of transmitReadyCount_ just returns a + * value based on the number of bytes left in the buffer provided + * through send. + */ + unsigned int transmitReadyCount_ (uint8_t client, + unsigned int count) { + unsigned int rv = count; + atomic { + if (tx_pos) { + unsigned int remaining = (tx_end - tx_pos); + if (remaining < rv) { + rv = remaining; + } + } else { + rv = 0; + } + } + return rv; + } + + /** Default implementation of transmitData_ just returns a pointer + * to a region of the buffer provided through send. + */ + uint8_t* transmitData_ (uint8_t client, + unsigned int count) { + uint8_t* rp; + + atomic { + rp = tx_pos; + if (rp) { + unsigned int remaining = (tx_end - tx_pos); + if (remaining >= count) { + /* Have enough to handle the request. Increment the position for + * a following transfer; if this will be the last transfer, mark + * it complete by zeroing the position pointer. */ + tx_pos += count; + if (tx_pos == tx_end) { + tx_pos = 0; + } + } else { + /* Being asked for more than is available, which is an interface + * violation, which aborts the transfer. */ + rp = tx_pos = 0; + } + } + } + return rp; + } + + // Forward declaration + void sendFragment_ (); + + // Forward declaration + void receiveData_ (); + + /** Task used to do the work of transmitting a fragment of a message. */ + task void sendFragment_task () { sendFragment_(); } + + /** Task used to do the work of consuming a fragment of a message. */ + task void receiveData_task () { receiveData_(); } + + /** Clear the transmission fifo. The radio is left in idle mode. */ + void resetAndFlushTxFifo_ () { + uint8_t rc; + + /* Reset the radio: return to IDLE mode, then flush the TX buffer. + * Radio should end in IDLE mode. */ + rc = call Rf1aIf.strobe(RF_SIDLE); + while (RF1A_S_IDLE != (RF1A_S_MASK & rc)) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + rc = call Rf1aIf.strobe(RF_SFTX); + while (RF1A_S_IDLE != (RF1A_S_MASK & rc)) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + resumeIdleMode_(TRUE); + } + + /** + * Reset the radio and update state so the inner code of + * sendFragment_ will abort the transmission. This method should + * only be called from within sendFragment_. + */ + void cancelTransmit_ () { + /* Clearing the remainder count and updating the state to "active" + * will cause the epilog of the sendFragment_ code to clean up the + * transmission. */ + tx_remain = 0; + tx_state = TX_S_active; + + resetAndFlushTxFifo_(); + } + + /** + * Invoke this to ensure the radio has been in RX mode long enough + * to generate a valid RSSI measurement. + * + * The return value allows the caller to determine whether the radio + * is still in RX mode; if not, RSSI/CCA/CarrierSense are not + * guaranteed to be accurate. + * + * @return the latest radio status byte. + */ + uint8_t spinForValidRssi__ () { + uint8_t rc; + uint8_t mcsm1 = call Rf1aIf.readRegister(MCSM1); + + /* Delay until we're sure the RSSI measurement is valid. + * + * Trick: The clearChannel signal says RSSI is below threshold; + * when CCA_MODE is set to generate a valid CCA the carrierSense + * signal says that it's above threshold. When one of those + * signals is asserted, RSSI is valid. Note that we do not touch + * MCSM1.RX_OFF, lest doing so cause the RF1A state to stay in RX + * after a reception when it should instead have gone to IDLE. + * + * If MCSM1.RX_OFF is 0 (e.g., single-use buffers) and the + * radio is actively receiving a packet, we might end up in + * IDLE mode before the RSSI check passes. In that case, or + * if anything else kicks us out of RX, break out and let + * the state machine recover normally. + */ + call Rf1aIf.writeRegister(MCSM1, 0x10 | (0x0f & mcsm1)); + do { + rc = call Rf1aIf.strobe(RF_SNOP); + } while ((RF1A_S_RX == (RF1A_S_MASK & rc)) + && (! ((IFG_clearChannel | IFG_carrierSense) & call Rf1aIf.getIn()))); + + // Restore standard CCA configuration + call Rf1aIf.writeRegister(MCSM1, mcsm1); + return rc; + } + + /** Activity invoked to request data from the client and stuff it + * into the transmission fifo. + */ + void sendFragment_ () { + uint8_t client = call ArbiterInfo.userId(); + int result = SUCCESS; + bool need_to_write_length = FALSE; + bool wrote_data = FALSE; + bool send_done = FALSE; + bool need_repost = FALSE; + uint8_t rc; + + atomic { + do { + const uint8_t* data; + unsigned int count; + unsigned int inuse; + + /* Did somebody cancel the transmit? */ + if (SUCCESS != tx_result) { + cancelTransmit_(); + break; + } + + /* If nothing left to do, exit */ + if (0 >= tx_remain) { + break; + } + + /* How much room do we have available? If none, give up for + * now. + */ + inuse = 0x7f & call Rf1aIf.readRegister(TXBYTES); + if (inuse >= FIFO_FILL_LIMIT) { + break; + } + + /* If we're using variable packet lengths, and we haven't + * written anything yet, we've got to reserve room for (and + * send) the length byte. + */ + need_to_write_length = (TX_S_preparing == tx_state) && (0x01 == (0x03 & call Rf1aIf.readRegister(PKTCTRL0))); + + /* Calculate the headroom, adjust for the length byte if we + * need to write it, and adjust down to no more than we + * need + */ + count = FIFO_FILL_LIMIT - inuse; + if (need_to_write_length) { + count -= 1; + } + if (count > tx_remain) { + count = tx_remain; + } + + /* Is there any data ready? If not, try again later. */ + count = call Rf1aTransmitFragment.transmitReadyCount[client](count); + if (0 == count) { + break; + } + + /* Get the data to be written. If the callee returns a null + * pointer, the transmission is canceled; otherwise, stuff it + * into the transmit buffer. + */ + data = call Rf1aTransmitFragment.transmitData[client](count); + if (0 == data) { + cancelTransmit_(); + break; + } + + /* We're committed to the write: tell the radio how long the + * packet is, if we haven't already. + */ + if (need_to_write_length) { + uint8_t len8 = tx_remain; + call Rf1aIf.writeBurstRegister(RF_TXFIFOWR, &len8, sizeof(len8)); + } + call Rf1aIf.writeBurstRegister (RF_TXFIFOWR, data, count); + tx_state = TX_S_active; + wrote_data = TRUE; + + /* Account for what we just queued. */ + tx_remain -= count; + } while (0); + + /* Request task repost if we have more data and the fifo is not + * already above the threshold at which we'll be re-posted. + */ + need_repost = (0 < tx_remain) && ! (IFG_txFifoAboveThreshold & call Rf1aIf.getIn()); + + /* If we've queued data but haven't already started the + * transmission, do so now. + */ + if (wrote_data && (RF1A_S_TX != (RF1A_S_MASK & call Rf1aIf.strobe(RF_SNOP)))) { + register int loop_limit = RADIO_LOOP_LIMIT; + /* We're *supposed* to be in FSTXON here, so this strobe can't + * be rejected. In fact, it appears that if we're in FSTXON + * and CCA fails, the radio transitions to RX mode. In other + * cases, it somehow ends up in IDLE. Try anyway, and if it + * doesn't work, fail the transmission. */ + rc = call Rf1aIf.strobe(RF_STX); + while ((RF1A_S_TX != (RF1A_S_MASK & rc)) + && (RF1A_S_RX != (RF1A_S_MASK & rc)) + && (RF1A_S_IDLE != (RF1A_S_MASK & rc)) + && (0 <= --loop_limit)) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + if (RF1A_S_TX != (RF1A_S_MASK & rc)) { + tx_result = ERETRY; + cancelTransmit_(); + } + } + + /* If we've started transmitting, see if we're done yet. */ + if (TX_S_active <= tx_state) { + /* If there's no more data to be transmitted, the task is + * done. However, there's an end-game: we don't really want + * to signal sendDone until it's actually in the air. + */ + if (0 == tx_remain) { + if (TX_S_active == tx_state) { + tx_state = TX_S_flushing; + tx_cached_fifothr = call Rf1aIf.readRegister(FIFOTHR); + call Rf1aIf.writeRegister(FIFOTHR, (0x0F | tx_cached_fifothr)); + } + if (0 == call Rf1aIf.readRegister(TXBYTES)) { + result = tx_result; + call Rf1aIf.writeRegister(FIFOTHR, tx_cached_fifothr); + + /* This might be an erratum, but I think it's really that + * the fact the TXFIFO has flushed still doesn't mean the + * transmission is done: that last character still needs + * to be spat out the antenna. Unfortunately, I don't + * know of another way to detect that the transmission has + * really-and-fortrue completed. + * + * Without this check, we can return to main program + * control and proceed to initiate a second send before + * the MRCSM finishes cleaning up from the previous + * transmit. When this happens, the radio appears to + * accept the subsequent command but never actually + * transmits it. + * + * What this does is busy-wait until MARCSTATE gets out of + * TX; this appears to be sufficient (in the test + * configuration, it reaches TX_END). Instrumentation + * indicates this loop runs about 350 times before MRCSM + * transitions out of TX. I'm not going to put a limit on + * it, because if this ever stops working I want it to + * hang here, where inspection via the debugger will find + * it and the poor maintainer will at least have this + * comment to provide a clue as to what might be going on. + * + * When that happens, consider checking whether TX_OFF is + * set to "stay in TX", since in that case I don't know + * MRCSM ever transitions to TX_END. I would expect it + * does, but then I'd expect the radio to work better than + * it does.... + */ + { + uint8_t ms; + do { + ms = call Rf1aIf.readRegister(MARCSTATE); + } while (MRCSM_TX == ms); + } + + tx_state = TX_S_inactive; + send_done = TRUE; + } + } + } + } // atomic + + if (need_repost) { + post sendFragment_task(); + } + if (send_done) { + signal Rf1aPhysical.sendDone[client](result); + } + } + + /** Place the radio into FSTXON or TX, with or without a + * clear-channel-assessment gate check. + * + * @param with_cca If TRUE, radio should check for a clear channel + * before proceeding with the transition. If false, use only the + * normal radio CCA actions like TX-if-CCA. + * + * @param target_fstxon If TRUE, transition to FSTXON; if FALSE, + * transition to TX. + */ + int startTransmission_ (bool with_cca, + bool target_fstxon) { + int rv = SUCCESS; + atomic { + uint8_t strobe = RF_STX; + uint8_t state = RF1A_S_TX; + uint8_t rc; + bool entered_rx = FALSE; + register int16_t loop_limit = RADIO_LOOP_LIMIT; + + if (target_fstxon) { + strobe = RF_SFSTXON; + state = RF1A_S_FSTXON; + } + + rc = call Rf1aIf.strobe(RF_SNOP); + if (with_cca) { + /* CCA test is valid only if in RX mode. If necessary, enter it. */ + if (RF1A_S_RX != (RF1A_S_MASK & rc)) { + entered_rx = TRUE; + rc = call Rf1aIf.strobe(RF_SRX); + // Wait until in RX mode, or failed to enter RX + while ((RF1A_S_RX != (RF1A_S_MASK & rc)) + && (0 <= --loop_limit)) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + } + + if (RF1A_S_RX == (RF1A_S_MASK & rc)) { + rc = spinForValidRssi__(); + } + + /* If we didn't successfully stay in RX mode through all that, + * something went wrong. */ + if (RF1A_S_RX != (RF1A_S_MASK & rc)) { + rv = ERETRY; + } + } + + if (SUCCESS == rv) { + /* Enter the appropriate TX mode. When things settle, the + * state should be RX or IDLE (CCA check failed, or + * in-progress RX completed) or the target state (good to + * transmit). May be in CALIBRATE and SETTLING in between, so + * loop. */ + (void)call Rf1aIf.strobe(strobe); + do { + rc = call Rf1aIf.strobe(RF_SNOP); + if (with_cca + && (RF1A_S_RX == (RF1A_S_MASK & rc)) + && (! (IFG_clearChannel & call Rf1aIf.getIn()))) { + if (entered_rx) { + resumeIdleMode_(TRUE); + } + break; + } + } while ((RF1A_S_RX != (RF1A_S_MASK & rc)) + && (RF1A_S_IDLE != (RF1A_S_MASK & rc)) + && (state != (RF1A_S_MASK & rc)) + && (0 <= --loop_limit)); + if (state != (RF1A_S_MASK & rc)) { + rv = ERETRY; + } + } + } + return rv; + } + + /** Place the radio into RX mode and set the RX state to be prepared + * for a new message. + */ + void startReception_ () { + uint8_t rc; + + atomic { + rx_state = RX_S_listening; + // Go to receive mode now, unless in an active transmit mode + if (transmitIsInactive_atomic_()) { + rc = call Rf1aIf.strobe(RF_SRX); + while ((RF1A_S_RX != (RF1A_S_MASK & rc))) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + } + } + } + + command error_t Rf1aPhysical.send[uint8_t client] (uint8_t* buffer, + unsigned int length) { + uint8_t rc; + + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return EBUSY; + } + /* And the length has to be positive */ + if (0 == length) { + return EINVAL; + } + atomic { + bool variable_packet_length_mode; + + /* And we can't be actively receiving anything */ + if (RX_S_listening < rx_state) { + rc = call Rf1aIf.strobe(RF_RXSTAT | RF_SNOP); + + /* Another special case. If noise on the channel causes a + * packet reception to begin, but doesn't last long enough for + * the interpreted packet length to be received, the radio + * will return to idle mode. Detect that we're in idle mode + * with data required but not available and abort the + * receive. + */ + if ((RF1A_S_IDLE == (RF1A_S_MASK & rc)) + && (rx_received < rx_expected) + && (0 == (rc & RF1A_S_FIFOMASK))) { + rx_result = FAIL; + post receiveData_task(); + } + return EBUSY; + } + + /* And we can't already be transmitting something. */ + if (0 < tx_remain) { + return EBUSY; + } + + /* More weirdness: seems that, even with all we've tried, it's + * possible to end up in receive mode with pending data in the + * transmission buffer. If that happens, just throw it away. + * + * @TODO@ This is either a serious radio bug, or an error in the + * logic of this module. It appears to occur when sendFragment_ + * has placed the complete message into the TXFIFO and + * successfully transferred to TX mode. Since resetting the + * radio here is successful and operation continues, it appears + * that in this situation the upper level has been notified that + * the send completed, and it is only the radio that has failed + * to do its job. It seems likely that this module still has a + * situation where it improperly transitions the state to RX + * even though the transmission has not completed. + * Experimentation indicates this is independent of CCA_MODE, is + * observed only when another radio is active, and that this + * module is not strobing to another state between the + * successful STX and this point. + */ + if ((RF1A_S_RX == (RF1A_S_MASK & call Rf1aIf.strobe(RF_SNOP))) + && (TX_S_inactive == tx_state) // safety check: do not trash active transmissions + && (0 < call Rf1aIf.readRegister(TXBYTES))) { + // printf("ERROR: RX mode but %d TXBYTES queued, tx state %d\r\n", call Rf1aIf.readRegister(TXBYTES), tx_state); + resetAndFlushTxFifo_(); + } + + /* Even if it's being transmitted from the radio, wait until + * it's gone. + */ + if (! transmitIsInactive_atomic_()) { + return ERETRY; + } + + /* Do we need to tell the radio how long the packet is? If so, + * there's a limit on the packet length. + */ + variable_packet_length_mode = (0x01 == (0x03 & call Rf1aIf.readRegister(PKTCTRL0))); + if (variable_packet_length_mode) { + /* Maximum length for VPL is 255 */ + if (255 < length) { + return EINVAL; + } + } + + /* If we aren't in a transmit mode already, go to FSTXON, doing + * the necessary CCA. Beware: even if this succeeds, if we land + * in FSTXON the radio will transition back to RX mode if it CCA + * fails before we go to STX. That's handled in + * sendFragment_task. + */ + rc = call Rf1aIf.strobe(RF_SNOP); + if ((RF1A_S_FSTXON != (rc & RF1A_S_MASK)) && (RF1A_S_TX != (rc & RF1A_S_MASK))) { + int rv = startTransmission_(TRUE, TRUE); + if (SUCCESS != rv) { + return rv; + } + rc = RF1A_S_MASK & call Rf1aIf.strobe(RF_SNOP); + } + + tx_remain = length; + tx_result = SUCCESS; + tx_state = TX_S_preparing; + if (buffer) { + tx_pos = buffer; + tx_end = buffer + length; + } else { + tx_pos = tx_end = 0; + } + } + post sendFragment_task(); + return SUCCESS; + } + + default async event void Rf1aPhysical.sendDone[uint8_t client] (int result) { } + + async command error_t Rf1aPhysical.startTransmission[uint8_t client] (bool with_cca) { + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return EBUSY; + } + return startTransmission_(with_cca, FALSE); + } + + async command error_t Rf1aPhysical.resumeIdleMode[uint8_t client] () { + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return EBUSY; + } + atomic { + if (TX_S_inactive != tx_state) { // NB: Not transmitIsInactive + tx_result = ECANCEL; + post sendFragment_task(); + } else if (RX_S_listening < rx_state) { + rx_result = ECANCEL; + post receiveData_task(); + } else { + resumeIdleMode_(TRUE); + } + } + return SUCCESS; + } + + async command error_t Rf1aPhysical.startReception[uint8_t client] () { + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return EBUSY; + } + atomic { + if (0 != rx_pos) { + return EALREADY; + } + startReception_(); + } + return SUCCESS; + } + + async command error_t Rf1aPhysical.sleep[uint8_t client] () { + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return EBUSY; + } + atomic { + uint8_t rc; + + /* Reject sleep if actively receiving or have a transmission + * queued or going out */ + if ((RX_S_listening < rx_state) + || (! transmitIsInactive_atomic_())) { + return ERETRY; + } + + /* Have to go to idle first */ + resumeIdleMode_(FALSE); + + /* Now go to sleep */ + rc = call Rf1aIf.strobe(RF_SXOFF); + while (! (0x80 & rc)) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + } + return SUCCESS; + } + + /** Determine the number of bytes available in the RX FIFO following + * the algorithm in 19.3.10. + */ + unsigned int receiveCountAvailable_ () { + unsigned int avail; + unsigned int avail2; + + avail2 = 0x7f & call Rf1aIf.readRegister(RXBYTES); + avail = ~avail2; + while (avail != avail2) { + avail = avail2; + avail2 = 0x7f & call Rf1aIf.readRegister(RXBYTES); + } + return avail; + } + + /** Reset the radio and update state so the inner code of + * receiveData_ will abort the reception. This method should + * only be called from within receiveData_. + */ + void cancelReceive_ () { + uint8_t rc; + + /* Reset the radio */ + rc = call Rf1aIf.strobe(RF_SIDLE); + while (RF1A_S_IDLE != (RF1A_S_MASK & rc)) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + rc = call Rf1aIf.strobe(RF_SFRX); + while (RF1A_S_IDLE != (RF1A_S_MASK & rc)) { + rc = call Rf1aIf.strobe(RF_SNOP); + } + resumeIdleMode_(TRUE); + } + + /** Do the actual work of consuming data from the RX FIFO and + * storing it in the appropriate location. + */ + void receiveData_ () { + unsigned int avail; + uint8_t client = call ArbiterInfo.userId(); + bool need_post = TRUE; + bool signal_start = FALSE; + bool signal_filled = FALSE; + bool signal_complete = FALSE; + uint8_t* start; + unsigned int expected; + unsigned int received; + int result; + + atomic { + do { + unsigned int need; + unsigned int consume; + + /* Did somebody cancel the receive? This would also happen on + * an RX overrun. */ + if (SUCCESS != rx_result) { + signal_complete = TRUE; + cancelReceive_(); + break; + } + + /* Is there data available? How much? If none, stop now. */ + avail = receiveCountAvailable_(); + if (0 == avail) { + break; + } + + /* OK, there's data; do we know how much to read? */ + if (RX_S_active > rx_state) { + bool variable_packet_length_mode = (0x01 == (0x03 & call Rf1aIf.readRegister(PKTCTRL0))); + + if (variable_packet_length_mode) { + uint8_t len8; + call Rf1aIf.readBurstRegister(RF_RXFIFORD, &len8, sizeof(len8)); + avail -= 1; + rx_expected = len8; + } + + /* @TODO@ set rx_expected when not using variable packet length mode */ + + /* Update the state */ + rx_state = RX_S_active; + + /* Discard any previous message start and length */ + rx_start = 0; + rx_received = 0; + + /* Notify anybody listening that there's a message coming in */ + signal_start = TRUE; + expected = rx_expected; + } + need = rx_expected - rx_received; + + /* Data and we know how much: is there any place to put it? */ + if (0 == rx_pos) { + signal_filled = TRUE; + rx_start = 0; + received = 0; + break; + } + + /* If first data into this buffer, record message start (do + * NOT merge with above clear of rx_start: message may require + * multiple buffers and we need rx_start to always be within + * the current one) */ + if (0 == rx_start) { + rx_start = rx_pos; + } + + /* Per 19.3.10, don't consume the last byte available unless + * it's the last byte in the packet. + */ + if (avail < need) { + --avail; + } + + /* Figure out how much we can and need to consume, then read it. */ + consume = rx_pos_end - rx_pos; + if (consume > need) { + consume = need; + } + if (consume > avail) { + consume = avail; + } + call Rf1aIf.readBurstRegister(RF_RXFIFORD, rx_pos, consume); + rx_pos += consume; + rx_received += consume; + avail -= consume; + + /* Have we reached the end of the message? */ + if (rx_received == rx_expected) { + /* If APPEND_STATUS is set, gotta clear out that data. */ + if (0x04 & call Rf1aIf.readRegister(PKTCTRL1)) { + /* Better be two more octets. Busy-wait until they show + * up. */ + while (2 > avail) { + avail = 0x7f & call Rf1aIf.readRegister(RXBYTES); + } + call Rf1aIf.readBurstRegister(RF_RXFIFORD, &rx_rssi_raw, sizeof(rx_rssi_raw)); + call Rf1aIf.readBurstRegister(RF_RXFIFORD, &rx_lqi_raw, sizeof(rx_lqi_raw)); + avail -= 2; + } + + signal_complete = TRUE; + + /* Note: received is the number of bytes in this packet, not in + * the total message. Sorry. + */ + received = rx_pos - rx_start; + + /* If in one-shot mode, shift the buffer end down so we signal filled. */ + if (rx_single_use) { + rx_pos_end = rx_pos; + } + } + + /* Have we used up the receive buffer? */ + if (rx_pos_end == rx_pos) { + signal_filled = TRUE; + received = rx_pos - rx_start; + rx_pos = 0; + /* In one-shot mode, if we didn't get the whole message, + * mark it failed. */ + if (rx_single_use && (! signal_complete)) { + rx_result = ENOMEM; + } + } + } while (0); + + /* If there's still data available, we'll have to come back, + * even if we've finished this message. + */ + need_post = (0 < receiveCountAvailable_()); + + /* Extract the start of any filled buffer (length was set above) */ + if (signal_filled) { + start = rx_start; + } + + if (signal_complete) { + result = rx_result; + if (SUCCESS == result) { + start = rx_start; + } else { + start = 0; + received = 0; + } + // received must have been set earlier before state was updated + + /* Reset for next message */ + rx_result = SUCCESS; + if (rx_single_use) { + rx_pos = 0; + } + if (rx_pos) { + rx_state = RX_S_listening; + } else { + rx_state = RX_S_inactive; + } + } + } // atomic + + /* Repost the receive task if there's more work to be done. */ + if (need_post) { + post receiveData_task(); + } + + /* Announce the start of a message first, then completion of the + * message, and finally that we need another receive buffer (if + * any of these events happen to occur at the same time). + */ + if (signal_start) { + signal Rf1aPhysical.receiveStarted[client](expected); + } + if (signal_complete) { + signal Rf1aPhysical.receiveDone[client](start, received, result); + } + if (signal_filled) { + signal Rf1aPhysical.receiveBufferFilled[client](start, received); + } + } + + async command error_t Rf1aPhysical.setReceiveBuffer[uint8_t client] (uint8_t* buffer, + unsigned int length, + bool single_use) { + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return EBUSY; + } + /* Buffer and length must be realistic; if either bogus, clear them both + * and disable reception. */ + if ((! buffer) || (0 == length)) { + buffer = 0; + length = 0; + } + atomic { + /* If there's a buffer in play and we're actively receiving into + * it, reject the attempt. */ + if (rx_pos && (RX_S_listening < rx_state)) { + return EBUSY; + } + + rx_pos = buffer; + rx_pos_end = buffer + length; + rx_start = 0; + rx_single_use = single_use; + + if (0 == rx_pos) { + // Return to IDLE after RX and TX. + call Rf1aIf.writeRegister(MCSM1, 0xf0 & call Rf1aIf.readRegister(MCSM1)); + + /* Setting a null buffer acts to cancel any in-progress + * reception. */ + if (RX_S_listening < rx_state) { + rx_result = ECANCEL; + post receiveData_task(); + } else { + rx_state = RX_S_inactive; + /* Return to IDLE now, if not transmitting */ + if (transmitIsInactive_atomic_()) { + resumeIdleMode_(TRUE); + } + } + } else if (RX_S_inactive == rx_state) { + uint8_t off_mode; + + if (rx_single_use) { + // Return to IDLE after RX, RX after TX + off_mode = 0x03; + } else { + // Return to RX after RX or TX + off_mode = 0x0F; + } + call Rf1aIf.writeRegister(MCSM1, off_mode | (0xf0 & call Rf1aIf.readRegister(MCSM1))); + startReception_(); + } + } + return SUCCESS; + } + + default async command unsigned int Rf1aTransmitFragment.transmitReadyCount[uint8_t client] (unsigned int count) { + return call Rf1aPhysical.defaultTransmitReadyCount[client](count); + } + + async command unsigned int Rf1aPhysical.defaultTransmitReadyCount[uint8_t client] (unsigned int count) { + atomic { + return transmitReadyCount_(client, count); + } + } + + default async command const uint8_t* Rf1aTransmitFragment.transmitData[uint8_t client] (unsigned int count) { + return call Rf1aPhysical.defaultTransmitData[client](count); + } + + async command const uint8_t* Rf1aPhysical.defaultTransmitData[uint8_t client] (unsigned int count) { + atomic { + return transmitData_(client, count); + } + } + + async event void Rf1aInterrupts.rxFifoAvailable[uint8_t client] () { + if (RX_S_inactive < rx_state) { + /* If we have data, and the state doesn't reflect that we're + * receiving, bump the state so we know to fast-exit out of + * transmit to allow receiveData_task to run. */ + if ((RX_S_listening == rx_state) + && (0 < receiveCountAvailable_())) { + rx_state = RX_S_synchronized; + } + post receiveData_task(); + } + } + + async event void Rf1aInterrupts.txFifoAvailable[uint8_t client] () { + if (TX_S_inactive != tx_state) { + uint8_t txbytes = call Rf1aIf.readRegister(TXBYTES); + + /* Remember those other comments warning of an odd behavior + * where we can pass CCA, put the radio into TX, load up the + * TXFIFO, then find ourselves in RX with a new tattoo, no + * memory of the night before, and a full TXFIFO? This check + * catches one situation where that happens. Clearly if the + * radio's saying there's room, and there isn't, something's + * wrong. No idea why we get this interrupt in that case, but + * we're grateful nonetheless. + */ + if (0x3F <= (0x7F & txbytes)) { + tx_result = ECANCEL; + } + post sendFragment_task(); + } + } + + async event void Rf1aInterrupts.rxOverflow[uint8_t client] () { + atomic { + rx_result = ECANCEL; + post receiveData_task(); + } + } + + async event void Rf1aInterrupts.txUnderflow[uint8_t client] () { + atomic { + tx_result = FAIL; + post sendFragment_task(); + } + } + + async event void Rf1aInterrupts.syncWordEvent[uint8_t client] () { + signal Rf1aPhysical.frameStarted[call ArbiterInfo.userId()](); + } + + async event void Rf1aInterrupts.clearChannel[uint8_t client] () { + signal Rf1aPhysical.clearChannel[call ArbiterInfo.userId()](); + } + + async event void Rf1aInterrupts.carrierSense[uint8_t client] () { + signal Rf1aPhysical.carrierSense[call ArbiterInfo.userId()](); + } + + async event void Rf1aInterrupts.coreInterrupt[uint8_t client] (uint16_t iv) { } + + default async event void Rf1aPhysical.receiveStarted[uint8_t client] (unsigned int length) { } + + default async event void Rf1aPhysical.receiveDone[uint8_t client] (uint8_t* buffer, + unsigned int count, + int result) { } + + default async event void Rf1aPhysical.receiveBufferFilled[uint8_t client] (uint8_t* buffer, + unsigned int count) { } + + default async event void Rf1aPhysical.frameStarted[uint8_t client] () { } + default async event void Rf1aPhysical.clearChannel[uint8_t client] () { } + default async event void Rf1aPhysical.carrierSense[uint8_t client] () { } + default async event void Rf1aPhysical.released[uint8_t client] () { } + + async command rf1a_status_e Rf1aStatus.get () { + uint8_t rc = call Rf1aIf.strobe(RF_SNOP); + if (rc & 0x80) { + return RF1A_S_OFFLINE; + } + return (rf1a_status_e)(RF1A_S_MASK & rc); + } + + async command int Rf1aPhysical.getChannel[uint8_t client] () { + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return -EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return -EBUSY; + } + return call Rf1aIf.readRegister(CHANNR); + } + + async command int Rf1aPhysical.setChannel[uint8_t client] (uint8_t channel) { + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return -EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return -EBUSY; + } + atomic { + bool radio_online; + uint8_t rc = call Rf1aIf.strobe(RF_SNOP); + + /* The radio must not be actively receiving or transmitting. */ + if ((TX_S_inactive != tx_state) + || (RX_S_listening < rx_state) + || (RF1A_S_FSTXON == (rc & RF1A_S_MASK)) + || (RF1A_S_TX == (rc & RF1A_S_MASK))) { + return -ERETRY; + } + + /* If radio is not asleep, make sure it transitions to IDLE then + * back to its normal mode. With MCSM0.FS_AUTOCOL set to 1 + * (normal with our configurations) this ensures recalibration + * to the new frequency. + */ + radio_online = (RF1A_S_OFFLINE != call Rf1aStatus.get()); + if (radio_online) { + resumeIdleMode_(FALSE); + } + call Rf1aIf.writeRegister(CHANNR, channel); + if (radio_online) { + resumeIdleMode_(TRUE); + } + } + return SUCCESS; + } + + enum { + /** SLAU259 table 19-15 provides the RSSI_offset value. */ + RSSI_offset = 74, + }; + + /** Algorithm described in 19.3.8 to convert RSSI from register + * value to absolute power level. + */ + int rssiConvert_dBm (uint8_t rssi_dec_) { + int rssi_dec = rssi_dec_; + if (rssi_dec >= 128) { + return ((rssi_dec - 256) / 2) - RSSI_offset; + } + return (rssi_dec / 2) - RSSI_offset; + } + + async command int Rf1aPhysical.rssi_dBm[uint8_t client] () { + int rv; + + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return EBUSY; + } + atomic { + uint8_t rc = call Rf1aIf.strobe(RF_SNOP); + if (RF1A_S_RX == (RF1A_S_MASK & rc)) { + (void)spinForValidRssi__(); + } + rv = rssiConvert_dBm(call Rf1aIf.readRegister(RSSI)); + } + return rv; + } + + async command void Rf1aPhysicalMetadata.store (rf1a_metadata_t* metadatap) { + atomic { + metadatap->rssi = rx_rssi_raw; + metadatap->lqi = rx_lqi_raw; + } + } + + async command int Rf1aPhysicalMetadata.rssi (const rf1a_metadata_t* metadatap) { + return rssiConvert_dBm(metadatap->rssi); + } + + async command int Rf1aPhysicalMetadata.lqi (const rf1a_metadata_t* metadatap) { + /* Mask off the CRC check bit */ + return metadatap->lqi & 0x7F; + } + + async command bool Rf1aPhysicalMetadata.crcPassed (const rf1a_metadata_t* metadatap) { + /* Return only the CRC check bit */ + return metadatap->lqi & 0x80; + } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/Rf1aConfigure.h b/tos/chips/msp430/rf1a/physical/Rf1aConfigure.h new file mode 100644 index 0000000000..6abee449d3 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aConfigure.h @@ -0,0 +1,281 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Structures and definitions relevant to configuring an RF1A radio + * for specific encoding, frequency, etc. + * + * @author Peter A. Bigot + */ + +#ifndef _Rf1aConfigure_h_ +#define _Rf1aConfigure_h_ + +/** Configuration for an RF1A radio. There must be a one-to-one + * correspondence between the offsets of the tags in this structure + * and the address of the corresponding register, since configuration + * involves walking this structure and storing fields. Certain tags + * (those marked as RESERVED or NOWRITE) are skipped during the write + * process). + */ + +typedef struct rf1a_config_t { + uint8_t iocfg2; /* 0x00 IOCFG2 - GDO2 output pin configuration */ + uint8_t iocfg1; /* 0x01 IOCFG1 - GDO1 output pin configuration */ + uint8_t iocfg0; /* 0x02 IOCFG0 - GDO0 output pin configuration */ + uint8_t fifothr; /* 0x03 FIFOTHR - RX FIFO and TX FIFO thresholds */ + uint8_t sync1; /* 0x04 SYNC1 - Sync word, high byte */ + uint8_t sync0; /* 0x05 SYNC0 - Sync word, low byte */ + uint8_t pktlen; /* 0x06 PKTLEN - Packet length */ + uint8_t pktctrl1; /* 0x07 PKTCTRL1 - Packet automation control */ + uint8_t pktctrl0; /* 0x08 PKTCTRL0 - Packet automation control */ + uint8_t addr; /* 0x09 ADDR - Device address */ + uint8_t channr; /* 0x0A CHANNR - Channel number */ + uint8_t fsctrl1; /* 0x0B FSCTRL1 - Frequency synthesizer control */ + uint8_t fsctrl0; /* 0x0C FSCTRL0 - Frequency synthesizer control */ + uint8_t freq2; /* 0x0D FREQ2 - Frequency control word, high byte */ + uint8_t freq1; /* 0x0E FREQ1 - Frequency control word, middle byte */ + uint8_t freq0; /* 0x0F FREQ0 - Frequency control word, low byte */ + uint8_t mdmcfg4; /* 0x10 MDMCFG4 - Modem configuration */ + uint8_t mdmcfg3; /* 0x11 MDMCFG3 - Modem configuration */ + uint8_t mdmcfg2; /* 0x12 MDMCFG2 - Modem configuration */ + uint8_t mdmcfg1; /* 0x13 MDMCFG1 - Modem configuration */ + uint8_t mdmcfg0; /* 0x14 MDMCFG0 - Modem configuration */ + uint8_t deviatn; /* 0x15 DEVIATN - Modem deviation setting */ + uint8_t mcsm2; /* 0x16 MCSM2 - Main Radio Control State Machine configuration */ + uint8_t mcsm1; /* 0x17 MCSM1 - Main Radio Control State Machine configuration */ + uint8_t mcsm0; /* 0x18 MCSM0 - Main Radio Control State Machine configuration */ + uint8_t foccfg; /* 0x19 FOCCFG - Frequency Offset Compensation configuration */ + uint8_t bscfg; /* 0x1A BSCFG - Bit Synchronization configuration */ + uint8_t agcctrl2; /* 0x1B AGCCTRL2 - AGC control */ + uint8_t agcctrl1; /* 0x1C AGCCTRL1 - AGC control */ + uint8_t agcctrl0; /* 0x1D AGCCTRL0 - AGC control */ + uint8_t worevt1; /* 0x1E WOREVT1 - High byte Event0 timeout */ + uint8_t worevt0; /* 0x1F WOREVT0 - Low byte Event0 timeout */ + uint8_t worctrl; /* 0x20 WORCTRL - Wake On Radio control */ + uint8_t frend1; /* 0x21 FREND1 - Front end RX configuration */ + uint8_t frend0; /* 0x22 FREND0 - Front end TX configuration */ + uint8_t fscal3; /* 0x23 FSCAL3 - Frequency synthesizer calibration */ + uint8_t fscal2; /* 0x24 FSCAL2 - Frequency synthesizer calibration */ + uint8_t fscal1; /* 0x25 FSCAL1 - Frequency synthesizer calibration */ + uint8_t fscal0; /* 0x26 FSCAL0 - Frequency synthesizer calibration */ + uint8_t _rcctrl1; /* RESERVED 0x27 RCCTRL1 - RC oscillator configuration */ + uint8_t _rcctrl0; /* RESERVED 0x28 RCCTRL0 - RC oscillator configuration */ + uint8_t fstest; /* NOWRITE 0x29 FSTEST - Frequency synthesizer calibration control */ + uint8_t ptest; /* NOWRITE 0x2A PTEST - Production test */ + uint8_t agctest; /* NOWRITE 0x2B AGCTEST - AGC test */ + uint8_t test2; /* 0x2C TEST2 - Various test settings */ + uint8_t test1; /* 0x2D TEST1 - Various test settings */ + uint8_t test0; /* 0x2E TEST0 - Various test settings */ + + /* PATABLE is written separately */ + uint8_t patable[8]; /* 0x3E PATABLE - Output power level (first entry only) */ + /* Status values provided only by Rf1aPhysical.readConfiguration, + * never written. It's not clear which of these are useful; the + * ones I currently think aren't work the ROM are left disabled for + * now. */ + uint8_t partnum; /* 0x30 PARTNUM - Part number */ + uint8_t version; /* 0x31 VERSION - Current version number */ + +#if 0 + uint8_t freqest; /* 0x32 FREQEST - Frequency offset estimate */ + uint8_t lqi; /* 0x33 LQI - Demodulator eestimate for link quality */ + uint8_t rssi; /* 0x34 RSSI - Received signal strength indication */ + uint8_t marcstate; /* 0x35 MARCSTATE - Control state machine state */ + uint8_t wortime1; /* 0x36 WORTIME1 - High byte of WOR timer */ + uint8_t wortime0; /* 0x37 WORTIME0 - Low byte of WOR timer */ + uint8_t pktstatus; /* 0x38 PKTSTATUS - Current GDOx status and packet status */ + uint8_t vco_vc_dac; /* 0x39 VCO_VC_DAC - Current setting from PLL calibration module */ +#endif + +} rf1a_config_t; + +/** Most of the rf1a_config_t structure can be accessed via a burst + * register access starting at address zero. A burst write should + * consist of this many bytes. The subsequent fields of the structure + * should either be ignored (as they are for testing) or written + * stored piece-wise (e.g., patable0). + * + * @note It is recommended that PATABLE0 be written first, so the + * subsequent write instruction resets the internal table index + * register. + */ +#define RF1A_CONFIG_BURST_WRITE_LENGTH (1+FSCAL0) + +/** Most of the rf1a_config_t structure can be accessed via a burst + * register access starting at address zero. A burst read should + * consist of this many bytes. The subsequent fields of the structure + * must be read piece-wise (e.g., patable). + * + * @note It is recommended that PATABLE0 be written first, so the + * subsequent write instruction resets the internal table index + * register. + */ +#define RF1A_CONFIG_BURST_READ_LENGTH (1+TEST0) + +/** The default values are read from a file named smartrf_RF1A.h, + * which should contain register settings as exported from SmartRF + * Studio using the SimplicitTI settings template. + */ +#if TINYOS_SMARTRF_USE_CUSTOM +#warning RF1A Custom (remember to define RF1A_CHANNEL_{MIN,MAX}) +#include +#elif TINYOS_SMARTRF_USE_LEGACY +/* Legacy configuration */ +#warning RF1A using legacy configuration +#include "smartrf_RF1A.h" +#elif TINYOS_SMARTRF_802_15_4C +#warning RF1A using 779-787 MHz-based 250kbps MSK PHY +#include +#else +#warning RF1A using 902.2 MHz-based 50Kbps 135kHz BW 802.15.4g PHY +#include +#endif + +#ifndef RF1A_CHANNEL_MIN +/** The minimum legal value to use when assigning a channel. Best + * practice is that channel zero has a base (not center) frequency at + * the lower bound of your region's ISM band (902MHz in the US). + */ +#define RF1A_CHANNEL_MIN 0 +#endif /* RF1A_CHANNEL_MIN */ + +#ifndef RF1A_CHANNEL_MAX +/** The maximum legal value to use when assigning a channel. Best + * practice is that this channel spans up to but not beyond the upper + * bound of your region's ISM band (928MHz in the US). + */ +#define RF1A_CHANNEL_MAX 128 +#endif /* RF1A_CHANNEL_MIN */ + +#ifndef SMARTRF_SETTING_IOCFG0 +/* Work around bogus register name emitted in early versions of + * SmartRF Studio */ +#define SMARTRF_SETTING_IOCFG0 SMARTRF_SETTING_IOCFG0D +#endif /* SMARTRF_SETTING_IOCFG0 */ + +/* @TODO@ move this out of the header so it can be more easily overridden */ + +rf1a_config_t rf1a_default_config = { + iocfg2: SMARTRF_SETTING_IOCFG2, +#if defined(SMARTRF_SETTING_IOCFG1) + iocfg1: SMARTRF_SETTING_IOCFG1, +#else // IOCFG1 + iocfg1: 0x2e, // tristate +#endif // IOCFG1 + iocfg0: SMARTRF_SETTING_IOCFG0, + fifothr: SMARTRF_SETTING_FIFOTHR, +#if defined(SMARTRF_SETTING_SYNC1) + sync1: SMARTRF_SETTING_SYNC1, + sync0: SMARTRF_SETTING_SYNC0, +#else + sync1: 0xd3, + sync0: 0x91, +#endif + pktlen: SMARTRF_SETTING_PKTLEN, + pktctrl1: SMARTRF_SETTING_PKTCTRL1, + pktctrl0: SMARTRF_SETTING_PKTCTRL0, + addr: SMARTRF_SETTING_ADDR, +#ifdef USER_SETTING_CHANNR + channr: USER_SETTING_CHANNR, +#else + channr: SMARTRF_SETTING_CHANNR, +#endif + fsctrl1: SMARTRF_SETTING_FSCTRL1, + fsctrl0: SMARTRF_SETTING_FSCTRL0, + freq2: SMARTRF_SETTING_FREQ2, + freq1: SMARTRF_SETTING_FREQ1, + freq0: SMARTRF_SETTING_FREQ0, + mdmcfg4: SMARTRF_SETTING_MDMCFG4, + mdmcfg3: SMARTRF_SETTING_MDMCFG3, + mdmcfg2: SMARTRF_SETTING_MDMCFG2, + mdmcfg1: SMARTRF_SETTING_MDMCFG1, + mdmcfg0: SMARTRF_SETTING_MDMCFG0, + deviatn: SMARTRF_SETTING_DEVIATN, +#if defined(SMARTRF_SETTING_MCSM2) + mcsm2: SMARTRF_SETTING_MCSM2, +#else // MCSM2 + mcsm2: 0x07, +#endif // MCSM2 +#if defined(SMARTRF_SETTING_MCSM1) + mcsm1: SMARTRF_SETTING_MCSM1, +#else // MCSM1 + mcsm1: 0x30, +#endif // MCSM1 + mcsm0: SMARTRF_SETTING_MCSM0, + foccfg: SMARTRF_SETTING_FOCCFG, + bscfg: SMARTRF_SETTING_BSCFG, + agcctrl2: SMARTRF_SETTING_AGCCTRL2, + agcctrl1: SMARTRF_SETTING_AGCCTRL1, + agcctrl0: SMARTRF_SETTING_AGCCTRL0, +#if defined(SMARTRF_SETTING_WOREVT1) + worevt1: SMARTRF_SETTING_WOREVT1, +#else // WOREVT1 + worevt1: 0x80, +#endif // WOREVT1 +#if defined(SMARTRF_SETTING_WOREVT0) + worevt0: SMARTRF_SETTING_WOREVT0, +#else // WOREVT0 + worevt0: 0x00, +#endif // WOREVT0 +#if defined(SMARTRF_SETTING_WORCTL) + worctl: SMARTRF_SETTING_WORCTL, +#else // WORCTL + worctrl: 0xf0, +#endif // WORCTL + frend1: SMARTRF_SETTING_FREND1, + frend0: SMARTRF_SETTING_FREND0, + fscal3: SMARTRF_SETTING_FSCAL3, + fscal2: SMARTRF_SETTING_FSCAL2, + fscal1: SMARTRF_SETTING_FSCAL1, + fscal0: SMARTRF_SETTING_FSCAL0, + // _rcctrl1 reserved + // _rcctrl0 reserved + fstest: SMARTRF_SETTING_FSTEST, + // ptest do not write + // agctest do not write + test2: SMARTRF_SETTING_TEST2, + test1: SMARTRF_SETTING_TEST1, + test0: SMARTRF_SETTING_TEST0, + /* NB: This declaration only specifies the first power level. You + * want to use ASK, you write your own. */ +#if defined(SMARTRF_SETTING_PATABLE0) + patable: { SMARTRF_SETTING_PATABLE0 }, +#else + patable: { 0xc6 } +#endif +}; + +#endif // _Rf1aConfigure_h_ diff --git a/tos/chips/msp430/rf1a/physical/Rf1aConfigure.nc b/tos/chips/msp430/rf1a/physical/Rf1aConfigure.nc new file mode 100644 index 0000000000..7511f03c42 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aConfigure.nc @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1aConfigure.h" + +/** Enable an RF1A client to control its radio configuration. + * + * You can either completely replace a radio configuration structure, + * by implementing the getConfiguration() method, or you can use + * higher-level operations to inspect or mutate the configuration + * immediately before and after it's changed by the infrastructure. + * + * @author Peter A. Bigot + */ + +interface Rf1aConfigure { + /** Return a pointer to the configuration that should be used for a + * particular RF1A client. + * + * @note Only the patable0 register and the part of the + * rf1a_config_t structure covered by RF1A_CONFIG_BURST_WRITE_LENGTH + * are written. The remaining registers, including some test + * registers, are ignored during configuration. + * + * If the implementation returns a null pointer, the compiled-in + * default configuration shall be used. + */ + async command const rf1a_config_t* getConfiguration (); + + /** Invoked just prior to radio configuration. + * + * Not sure what you'd use this for, but it's here if you need + * it. + */ + async command void preConfigure (); + + /** Invoked immediately following radio configuration. + * + * This would be an appropriate place to do things like set the + * channel and control other parameters that are accessible through + * the Rf1aPhysical interface, before the radio has a change to + * start receiving packets or otherwise make itself difficult to + * change. + */ + async command void postConfigure (); + + /** Invoked immediately prior to unconfiguring the radio. + * + * Might want to use this to cache values read from Rf1aPhysical, + * e.g. to restore a locally modified radio configuration that can + * subsequently be provided through getConfiguration(). + */ + async command void preUnconfigure (); + + /** Invoked immediately following unconfiguring the radio. + * + * Here if you need it; ignore it if you don't. + */ + async command void postUnconfigure (); +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/Rf1aDumpConfig.nc b/tos/chips/msp430/rf1a/physical/Rf1aDumpConfig.nc new file mode 100644 index 0000000000..31f676cf08 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aDumpConfig.nc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1aConfigure.h" + +/** Dump internal radio configuration information to the console for + * debugging purposes. + * + * @author Peter A. Bigot + */ + +interface Rf1aDumpConfig { + /** Display a (somewhat) human-readable dump of the RF1A + * configuration to wherever printf goes. + * + * @param config The configuration for which content should be + * displayed. If null, the default configuration is used. @note + * The running configuration is not used. + */ + command void display (const rf1a_config_t* config); + + /** Convert a MARCSTATE value to a string. */ + command const char* marcstate (uint8_t value); +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aDumpConfigC.nc b/tos/chips/msp430/rf1a/physical/Rf1aDumpConfigC.nc new file mode 100644 index 0000000000..c5b0b48efb --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aDumpConfigC.nc @@ -0,0 +1,365 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Dump internal radio configuration information to the console for + * debugging purposes. + * + * @author Peter A. Bigot + */ + +module Rf1aDumpConfigC { + provides { + interface Rf1aDumpConfig; + } +} implementation { + + const char* const gdo_signal[] = { + "RXFIFO>THR", /* 0 */ + "RXFIFO>THR or EOP", + "TXFIFO>THR", + "TXFIFO FULL", + "RXFIFO OFL", + "TXFIFO UFL", /* 5 */ + "SYNC RX/TX", + "RX CRC OK", + "PQI>THR", + "CCA (RSSIpartnum, cp->version); + r8 = cp->iocfg0; + printf("GDO0: %u, %s # %s\r\n", r8 & 0x3F, active_mode[!!(r8 & 0x40)], gdo_signal[r8 & 0x3F]); + r8 = cp->iocfg1; + printf("GDO1: %u, %s # %s\r\n", r8 & 0x3F, active_mode[!!(r8 & 0x40)], gdo_signal[r8 & 0x3F]); + r8 = cp->iocfg2; + printf("GDO2: %u, %s # %s\r\n", r8 & 0x3F, active_mode[!!(r8 & 0x40)], gdo_signal[r8 & 0x3F]); + r8 = cp->fifothr; + printf("FIFOTHR: RX Attenuation: %u dB; TX_THR: %u ; RX_THR: %u\r\n", + close_in_rx[3 & (r8 >> 4)], fifo_thr_tx[r8 & 0x0F], fifo_thr_rx[r8 & 0x0F]); + printf("SYNC: 0x%04x ; PKTLEN: %u\r\n", (cp->sync1 << 8) | cp->sync0, cp->pktlen); + r8 = cp->pktctrl1; + printf("PQT: %u ; CRC_AUTOFLUSH: %u ; APPEND_STATUS: %u ; ADDR_CHK: %u (%s)\r\n", + r8 >> 6, !!(r8 & 0x08), + !!(r8 & 0x04), r8 & 0x03, adr_chk[r8 & 0x03]); + r8 = cp->pktctrl0; + i = (r8 >> 4) & 0x03; + printf("WHITE_DATA: %u, PKT_FORMAT: %u (%s) ; CRC_EN: %u\r\nLENGTH_CONFIG: %u (%s) ; ", + !!(r8 & 0x40), i, pkt_format[i], + !!(r8 & 0x04), i, length_config[i]); + r8 = cp->mdmcfg1; + i = 0x07 & (r8 >> 4); + printf("NUM_PREAMBLE: 0x%x (%d bytes)\r\n", i, num_preamble[i]); + printf("ADDR: 0x%02x ; CHANNR: %u\r\n", cp->addr, cp->channr); + { + uint8_t freq_if = 0x0F & cp->fsctrl1; + uint8_t freqoff = cp->fsctrl0; + uint32_t freq = ((((uint32_t)cp->freq2)) << 16 + | (((uint32_t)cp->freq1)) << 8 + | (cp->freq0)); + + printf("FREQ_IF: %u ; FREQOFF: %u ; FREQ: 0x%lx (%lu)\r\n", + freq_if, freqoff, freq, freq); + printf("f_XOSC: %lu Hz ; f_IF: %lu Hz ; f_carrier: %lu Hz\r\n", + f_xosc, + (f_xosc * freq_if) >> 10, + (uint32_t)((f_xosc_ull * freq) >> 16)); + } + { + uint8_t chanbw_e; + uint8_t chanbw_m; + uint8_t drate_e; + uint8_t drate_m; + uint8_t chanspc_e; + uint8_t chanspc_m; + uint64_t t_ull; + uint32_t bw_carrier; + uint32_t r_data_baud; + uint32_t r_data_Bps; + uint32_t df_channel; + + r8 = cp->mdmcfg4; + chanbw_e = (r8 >> 6); + t_ull = 1 << chanbw_e; + chanbw_m = (r8 >> 4) & 0x03; + bw_carrier = (uint32_t) (f_xosc_ull / (8 * (4 + chanbw_m) * t_ull)); + drate_e = r8 & 0x0F; + drate_m = cp->mdmcfg3; + t_ull = 1; + t_ull <<= drate_e; + t_ull *= (256 + drate_m) * f_xosc_ull; + r_data_baud = (uint32_t)(t_ull >> 28); + r_data_Bps = r_data_baud / 8; + r8 = cp->mdmcfg2; + if (0x08 & r8) { + r_data_Bps /= 2; + } + + chanspc_e = 0x03 & cp->mdmcfg1; + chanspc_m = cp->mdmcfg0; + df_channel = (uint32_t)((f_xosc_ull * (256UL + chanspc_m) * (1UL << chanspc_e)) >> 18); + r8 = cp->deviatn; + printf("M, E: CHANBW: %u , %u ; DRATE: %u , %u ; CHANSPC: %u , %u ; DEVIATN: %u , %u\r\n", + chanbw_m, chanbw_e, drate_m, drate_e, chanspc_m, chanspc_e, r8 & 0x07, 0x07 & (r8 >> 4)); + printf("BW_carrier: %lu Hz ; R_DATA: %lu Baud (%lu Bps); df_channel: %lu Hz\r\n", + bw_carrier, r_data_baud, r_data_Bps, df_channel); + } + + r8 = cp->mdmcfg2; + i = 0x03 & (r8 >> 4); + printf("DEM_DCFILT_OFF: %u ; MOD_FORMAT: %u (%s)\r\n", + !!(r8 & 0x80), i, mod_format[i]); + i = r8 & 0x07; + printf("MANCHESTER_EN %u ; SYNC_MODE %u (%s)\r\n", + !!(r8 & 0x08), i, sync_mode[i]); + + r8 = cp->mcsm2; + printf("RX_TIME_RSSI: %u ; RX_TIME_QUAL: %u ; RX_TIME: %u\r\n", + !!(r8 & 0x10), !!(r8 & 0x08), 0x07 & r8); + + r8 = cp->mcsm1; + i = 0x03 & (r8 >> 4); + printf("CCA_MODE: %u (%s) ; ", i, cca_mode[i]); + i = 0x03 & (r8 >> 2); + printf("RXOFF_MODE: %u (%s) ; ", i, rxtxoff_mode[i]); + i = 0x03 & r8; + printf("TXOFF_MODE: %u (%s)\r\n", i, rxtxoff_mode[i]); + + r8 = cp->mcsm0; + i = 0x03 & (r8 >> 4); + printf("FS_AUTOCAL: %u (%s) ; PIN_CTRL_EN: %u ; XOSC_FORCE_ON: %u\r\n", + i, fs_autocal[i], !!(r8 & 0x02), !!(r8 & 0x01)); + + r8 = cp->foccfg; + printf("FOC_BS_CS_GATE: %u ; FOC_PRE_K: %u ; FOC_POST_K: %u ; FOC_LIMIT: %u\r\n", + !!(r8 & 0x20), (0x03 & (r8 >> 4)), !!(r8 & 0x04), 0x03 & r8); + + r8 = cp->bscfg; + printf("BS_PRE_K: %u ; BS_PRE_KP: %u ; BS_POST_K: %u ; BS_POST_KP: %u; BS_LIMIT: %u\r\n", + 0x03 & (r8 >> 6), 0x03 & (r8 >> 4), !!(r8 & 0x08), !!(r8 & 0x04), 0x03 & r8); + + r8 = cp->agcctrl2; + i = 0x07 & (r8 >> 3); + printf("MAX_DVGA_GAIN: %u ; MAX_LNA_GAIN: %u (%s) ; MAGN_TARGET: %u (%u dB)\r\n", + 0x03 & (r8 >> 6), i, max_lna_gain[i], r8 & 0x07, magn_target[r8 & 0x07]); + + r8 = cp->agcctrl1; + i = 0x03 & (r8 >> 4); + printf("AGC_LNA_PRIORITY: %u ; CARRIER_SENSE_REL_THR: %u (%s)\r\n", + !!(r8 & 0x04), i, carrier_sense_rel_thr[i]); + printf("CARRIER_SENSE_ABS_THR: "); + if (0x08 & r8) { + if (0 == (0x07 & r8)) { + printf("disabled"); + } else { + printf("%u dB below MAGN_TARGET", 8 - (0x07 & r8)); + } + } else { + if (0 == (0x07 & r8)) { + printf("at MAGN_TARGET"); + } else { + printf("%u dB above MAGN_TARGET", (0x07 & r8)); + } + } + printf("\r\n"); + + r8 = cp->agcctrl0; + printf("HYST_LEVEL: %u ; WAIT_TIME: %u ; AGC_FREEZE: %u ; FILTER_LENGTH: %u\r\n", + 0x03 & (r8 >> 6), 0x03 & (r8 >> 4), 0x03 & (r8 >> 2), 0x03 & r8); + + { + uint16_t event0 = (cp->worevt1 << 8) + cp->worevt0; + uint8_t wor_res; +#if 0 + uint16_t wor_time = (cp->wortime1 << 8) + cp->wortime0; +#endif + uint32_t t_event0; + + r8 = cp->worctrl; + i = 0x07 & (r8 >> 4); + wor_res = 0x03 & r8; + printf("ACLK_PD: %u ; EVENT0: %u ACLK; EVENT1: %u (%u ACLK) ; WOR_RES: %u (%u periods)\r\n", + !!(0x80 & r8), event0, i, t_event1[i], wor_res, 1U << (5 * wor_res)); + t_event0 = event0; + t_event0 <<= (5 * wor_res); + printf("f_ACLK: %lu Hz; t_event0: ", f_aclk); + if (t_event0 > (128 * f_aclk)) { + printf("%lu sec", (t_event0 / f_aclk)); + } else if (t_event0 >= f_aclk) { + printf("%lu ms", (t_event0 * 1000U / f_aclk)); + } else { + printf("%lu us", (uint32_t)(1000000UL * (uint64_t)t_event0 / f_aclk)); + } +#if 0 + printf(" ; WOR Time: %u", wor_time); +#endif + printf("\r\n"); + } + + r8 = cp->frend1; + printf("LNA_CURRENT: %u ; LNA2MIX_CURRENT: %u ; LODIF_BUF_CURRENT_RX: %u\r\nMIX_CURRENT: %u ; ", + 0x03 & (r8 >> 6), 0x03 & (r8 >> 4), 0x03 & (r8 >> 2), 0x03 & r8); + r8 = cp->frend0; + printf("LODIV_BUF_CURRENT_TX: %u ; PA_POWER: %u\r\n", + 0x03 & (r8 >> 4), 0x07 & r8); + printf("PATABLE:"); + for (i = 0; i < sizeof(cp->patable) / sizeof(*cp->patable); ++i) { + printf(" 0x%02x", cp->patable[i]); + } + printf("\r\n"); + + printf("FSCAL0: 0x%02x ; FSCAL1: 0x%02x ; FSCAL2: 0x%02x ; FSCAL3: 0x%02x\r\n", + cp->fscal0, cp->fscal1, cp->fscal2, cp->fscal3); + + printf("FSTEST: 0x%02x ; PTEST: 0x%02x ; AGCTEST: 0x%02x\r\n", + cp->fstest, cp->ptest, cp->agctest); + + printf("TEST0: 0x%02x ; TEST1: 0x%02x ; TEST2: 0x%02x\r\n", + cp->test0, cp->test1, cp->test2); + +#if 0 + r8 = cp->lqi; + printf("FREQEST: %d ; CRC_OK: %u ; LQI: %d ; RSSI: %d\r\n", + (int8_t)cp->freqest, + !!(r8 & 0x80), 0x7F & r8, + cp->rssi); +#endif + + return; + } +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aInterrupts.nc b/tos/chips/msp430/rf1a/physical/Rf1aInterrupts.nc new file mode 100644 index 0000000000..67d2a2f0cb --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aInterrupts.nc @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Interface for the standard interrupts available for a + * physical-layer client of the radio. + */ +interface Rf1aInterrupts { + + /** RX FIFO filled or above the RX FIFO threshold or end of packet + * reached (RFIFG4 positive edge). + * + * This is a signal that there is message data available. + */ + async event void rxFifoAvailable (); + + /** TX FIFO below TX FIFO threshold (RFIFG5 negative edge). + * + * This is a signal that the transmitter is going to need more data + * soon. + */ + async event void txFifoAvailable (); + + /** RX FIFO overflowed (RFIFG7 positive edge). + * + * This is a signal that the receive buffer overflowed, and data + * loss has occurred. The radio client should take steps to abort + * reception and reset the radio to its normal idle state. + */ + async event void rxOverflow (); + + /** TX FIFO underflowed (RFIFG8 positive edge). + * + * This is a signal that data was not supplied for an outgoing + * transmission, and the receiver will have to drop the packet. + */ + async event void txUnderflow (); + + /** Sync word sent or received (RFIFG9 positive edge). + * + * This is a signal that a fixed location in the message was + * transmitted or received. It can be used for synchronizing the + * transmitter and receiver. + */ + async event void syncWordEvent (); + + /** Clear channel assessment when RSSI is below threshold (dependent + * on current CCA_MODE setting) (RFIFG12 positive edge). + * + * This is a signal that no transmissions are active on the channel. + * It can be used to determine that it is safe to begin + * transmitting. + */ + async event void clearChannel (); + + /** Carrier sense: RSSI is above threshold (RFIFG13 positive edge). + * + * This is a signal that transmissions are active on the channel. + * It can be used to determine that the radio should prepare to + * receive a message. + */ + async event void carrierSense (); + + /** Any other core interrupt that wasn't recognized */ + async event void coreInterrupt (uint16_t iv); +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc b/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc new file mode 100644 index 0000000000..e7b83bbb6b --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc @@ -0,0 +1,398 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1aConfigure.h" + +/** The physical-layer interface for the RF1A radio. + * + * This interface abstracts from the RF1A hardware implementation + * while retaining features that are supported by that radio. It + * should be possible to implement on other radios, with varying + * degrees of effort. + * + * Message transmission is initiated by providing a message length. + * The data for the message can be supplied at the start, or on demand + * during transmission, depending on user need. Transmission is + * interrupt-driven, and additional data will be requested as needed + * using events. + * + * Message reception is normally initiated by providing a target + * buffer, though for special cases it can be initiated without such a + * buffer. Additional buffer space is requested automatically as more + * data is aggregated. + * + * The following code can be used to stub the events that this interface + * provides, when most of them are unneeded: + + async event void Rf1aPhysical.sendDone (int result) { } + async event void Rf1aPhysical.receiveStarted (unsigned int length) { } + async event void Rf1aPhysical.receiveDone (uint8_t* buffer, + unsigned int count, + int result) { } + async event void Rf1aPhysical.receiveBufferFilled (uint8_t* buffer, + unsigned int count) { } + async event void Rf1aPhysical.frameStarted () { } + async event void Rf1aPhysical.clearChannel () { } + async event void Rf1aPhysical.carrierSense () { } + async event void Rf1aPhysical.released () { } + + * + * @author Peter A. Bigot + */ + +interface Rf1aPhysical { + /** Initiate transmission of a message. + * + * This places the radio into transmit mode. The + * Rf1aTransmitFragment interface is used by the radio to collect + * the data for transmission. Upon failure or successful completion + * of the transmission, the sendDone() event will be signalled. At + * that point, the radio returns to its default mode. + * + * @note Normally the radio performs clear-channel assessment prior + * to sending data. However, if reception is disabled (because no + * receive buffer has been registered and no startReception() has + * been invoked), the radio is not in RX mode. CCA requires the + * radio be put into RX mode, but the CCA results will not be + * immediately available. Consequently, CCA is bypassed in this + * situation, and TX will occur without regard for other channel + * traffic. + * + * @param buffer The address of the data to be written. May be 0 if + * a non-default Rf1aTransmitFragment implementation is used. + * + * @param length The total number of octets in the message. Note + * that this does not include the encoding of the length. Must be a + * positive integer. + * + * @return SUCCESS if the transmission will begin. EOFF if the + * radio is turned off. EBUSY if another client owns the radio, or + * if this client is already sending a packet. ERETRY if the radio + * is still transmitting the remainder of a previous packet or if + * clear-channel assessment fails. EINVAL if the length is not + * valid. + */ + command error_t send (uint8_t* buffer, unsigned int length); + + /* @TODO@ provide a mechanism to delay transition to STX until a + * specific number of bytes are available in the FIFO */ + + /** Indicate completion of a send() operation. + * + * @note That the send operation completed does not mean that the + * transmission has completed. It only means that the physical + * layer has either encountered an error or has successfully handed + * off the complete message to the radio. Transmission may still be + * in progress. Subsequent send() invocations may fail with ERETRY + * until the previous transmission completes. + * + * @param result An indication of the success or failure of the send. + */ + async event void sendDone (int result); + + /** Place the radio into transmit mode. + * + * This method is used for low-power-lossy configurations where a + * long preamble is required to ensure the recipient is ready to + * receive the message. It can also be used to create a radio + * jammer for testing purposes. For other situations, this method + * can be ignored, since the radio will be placed into transmit mode + * when data is ready to be sent. + * + * Note that if this invocation is followed by a send() operation, + * as would be common for LPL protocols, the radio will return to + * its normal idle mode after the transmission. This method can be + * re-invoked in sendDone() if channel-hogging is desired. The + * effect of invoking this can be canceled without a send() by using + * the resumeIdleMode() method. + * + * @param check_cca If TRUE, radio will only enter transmit mode if + * clear-channel assessment passes. If FALSE, the check is + * bypassed. + * + * @return SUCCESS if transition to TX succeeded. EOFF if radio is + * unassigned; EBUSY if owned by another client; ERETRY if CCA was + * performed and failed. + */ + async command error_t startTransmission (bool check_cca); + + /** Place the radio in receive mode even if no receive buffer has + * been provided. + * + * This can be used in a rare case where reception is desired and + * the protocol cannot provide a default initial buffer. The + * standard receiveBufferFilled() and receiveStarted() events allow + * the caller to provide a receive buffer in time to avoid data + * loss. Upon completion of the reception, the radio returns to its + * idle mode. This method can be invoked in receiveDone() to + * allow continued reception in this mode. + * + * @return SUCCESS if transition to RX succeeded. EOFF if radio is + * unassigned; EBUSY if owned by another client; EALREADY if a + * receive buffer is present (so the radio is already in receive + * mode). + */ + async command error_t startReception (); + + /** Return the radio to its standard idle mode. + * + * This is used to counteract the effects of startTransmission() or + * startReception() in a situation where no subsequent send() or + * receive occurs, and to wake the radio up after telling it to + * sleep(). Invoking this will cancel any in-progress receive or + * transmission. + * + * @return SUCCESS if transition to RX or IDLE succeeded. EOFF if + * radio is unassigned; EBUSY if owned by another client. + */ + async command error_t resumeIdleMode (); + + /** Put the radio to sleep. + * + * This turns off the radio and releases its oscillator. Bring it + * back online with the resumeIdleMode() method. + * + * @return SUCCESS if radio left in sleep mode. EOFF if unassigned, + * EBUSY if owned by another. ERETRY if radio is actively receiving + * or transmitting. + */ + async command error_t sleep (); + + /** Indicate that a new message of the given length is being received. + * + * It is guaranteed that this event will eventually be followed by a + * receiveDone() event which provides the disposition of the + * message. + * + * @param length The number of octets expected to be in the message. + */ + async event void receiveStarted (unsigned int length); + + /** Indicate that message reception has completed. + * + * @note If the receive buffer provided at the start of reception + * was inadequate to hold the complete message, the buffer and count + * supplied in this call will reflect only that portion of the + * message held in the current receive buffer. Earlier portions + * were provided through the receiveBufferFilled() event, and you + * should have captured them then. + * + * @param buffer A pointer to the last block of data received as part of the message. + * + * @param count The number of valid octets starting at the buffer location. + * + * @param result An indication of whether the reception was successful or failed. + */ + async event void receiveDone (uint8_t* buffer, + unsigned int count, + int result); + + /** Provide the radio with a location to store incoming data. + * + * Several use patterns are supported. The first provides the radio + * with a large buffer into which messages are incrementally + * received, each one starting at the end of the first. Upon + * completion of a message, or reaching the end of the pre-allocated + * space, signals are raised so the caller can extract the data + * and/or provide a new storage location. + * + * The second pattern enables scatter receives, by enabling radio + * reception without a buffer pre-allocated. Upon receipt of data, + * the receiveBufferFilled() event will be raised indicating that + * there is no data; the client must then invoke this to tell the + * radio where to store the incoming data. + * + * The third ("single-use") provides a single buffer ahead of time + * for the next incoming message, but will only place a single + * complete message in that buffer. If a messages exceeds the + * buffer length, the received prefix is signaled but the receive + * operation fails. Upon completion (successful or failed) of the + * message, the buffer is discarded within the radio, but the radio + * will remain in receive mode and subsequent packet reception will + * signal to request a new buffer. + * + * Best practice in the normal situation is to re-invoke this method + * within the receiveDone() event, so that each message can begin at + * the start of a buffer that is big enough to hold the entire + * message. + * + * @param buffer Where the data should be stored. If passed a null + * pointer, any in-progress receive is canceled and the radio will + * revert to idle mode. + * + * @param length The number of octets available for radio message + * storage. If zero, this is treated as if a null buffer were + * passed. + * + * @param single_use If TRUE, then the buffer will only be used for + * one message. If the incoming message is too large for the + * buffer, it is dropped with an error. + * + * @return SUCCESS if the buffer was installed. EOFF if the radio + * is off. EBUSY if the radio belongs to another client or there is + * a message currently being received into an existing buffer. + */ + async command error_t setReceiveBuffer (uint8_t* buffer, + unsigned int length, + bool single_use); + + /** Indication that the current receive buffer has been filled. + * + * This event is signalled at most once for every setReceiveBuffer() + * invocation, at the point where the buffer is completely full. + * Normally, during the event processing, setReceiveBuffer() is + * invoked to provide additional storage. Failure to do so may + * result in loss of incoming data if no other buffer is provided by + * the time the radio's internal receive buffer overflows. The + * radio may periodically re-issue this event in an attempt to + * solicit a buffer; it will do so passing a null buffer value to + * indicate there is no unreceived data available for consumption. + * + * @param buffer A pointer to the most recently filled buffer. Will + * be null if there is no currently configured receive buffer. + * + * @param count The number of octets of data in the buffer, or 0 if + * there is no receive buffer. + */ + async event void receiveBufferFilled (uint8_t* buffer, + unsigned int count); + + /** Signal the start of message transmission or reception. + * + * This signal can be used to determine the exact point at which the + * message was transmitted or received, which is useful when + * propagating times between unsynchronized devices. + */ + async event void frameStarted (); + + /** Signal that the radio frequency is open for transmission. + * + * This signal can be used by devices to detect that an active + * transmitter has shut down, allowing a new transmission to + * begin. + */ + async event void clearChannel (); + + /** Signal that a carrier is detected on the channel. + * + * This signal can be used by devices for low-power listening, where + * transmitters use a long preamble to give receivers an opportunity + * to detect the message and be prepared for it. Applications would + * place the radio in receive mode, then return to sleep if no + * carrier is detected for some interval. + */ + async event void carrierSense (); + + /** A base implementation of Rf1aTransmitFragment.transmitReadyCount. + * + * The expectation is that this implementation will handle the + * buffers provided through the send() interface, while additional + * link- and physical-layer data can be prepended or appended by a + * Rf1aTransmitFragment implementation that uses this. + */ + async command unsigned int defaultTransmitReadyCount (unsigned int count); + + /** A base implementation of Rf1aTransmitFragment.transmitData. + * + * The expectation is that this implementation will handle the + * buffers provided through the send() interface, while additional + * link- and physical-layer data can be prepended or appended by a + * Rf1aTransmitFragment implementation that uses this. + */ + async command const uint8_t* defaultTransmitData (unsigned int count); + + /** Notification that the radio has been unconfigured. A feature + * missing from TEP108 but that enables the SplitControl.stopDone() + * signal to be called at the appropriate time. Maybe. + */ + async event void released (); + + /** Get the current radio channel. + * + * @return A non-negative value represents a valid RF1A channel from + * 0 through 255. -EOFF indicates that the radio is not on; -EBUSY + * indicates that another client owns the radio. + */ + async command int getChannel (); + + /** Set the radio channel. + * + * @return SUCCESS if the channel was set; -EOFF if the radio is not + * on; -EBUSY if another client owns the radio; -ERETRY if the radio + * is actively transmitting or receiving a packet. + * + * @note This does not return an error_t, values are in sync with + * getChannel. + */ + async command int setChannel (uint8_t channel); + + /** Read the RSSI value. + * + * Returns the RSSI value from the RSSI status register as an + * absolute power level. For the RF1A module, valid values are + * between -11 and -138. Non-negative values indicate TinyOS + * errors. + * + * @note Limited effort is made to validate the RSSI register + * contents. If the radio is not in RX mode, the setting may be out + * of date. If the radio is in RX mode, the call will busy-wait + * until the RSSI signal is valid; however, there is insufficient + * context to determine whether the register contains a live sample + * or the value latched at the start of the most recent receive + * action. + * + * @return EOFF if radio is off; EBUSY if assigned to another + * client. A negative value indicates a valid RSSI measurement. + * @note This is not an error_t. + */ + async command int rssi_dBm (); + + /** Read the current radio configuration. + * + * @note This command always succeeds and returns the current + * physical radio configuration, even if the interface that is + * invoked is from a client that does not have control of the radio. + * + * @param config where the configuration should be stored. + */ + async command void readConfiguration (rf1a_config_t* config); +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/Rf1aPhysicalC.nc b/tos/chips/msp430/rf1a/physical/Rf1aPhysicalC.nc new file mode 100644 index 0000000000..afb2952118 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aPhysicalC.nc @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1a.h" + +/** Provide a unique client of a specific RF1A module. + * + * @note This module currently assumes there is but one RF1A module + * available. + * + * @author Peter A. Bigot + */ + +generic configuration Rf1aPhysicalC () { + provides { + interface HplMsp430Rf1aIf; + interface Resource; + interface Rf1aPhysical; + interface Rf1aPhysicalMetadata; + interface Rf1aStatus; + } + uses { + interface Rf1aTransmitFragment; + interface Rf1aConfigure; + } +} implementation { + enum { + /** Unique parameter used for this client */ + CLIENT = unique(UQ_RF1A_CLIENT), + }; + + components Rf1aC; + HplMsp430Rf1aIf = Rf1aC; + Resource = Rf1aC.Resource[CLIENT]; + Rf1aPhysical = Rf1aC.Rf1aPhysical[CLIENT]; + Rf1aTransmitFragment = Rf1aC.Rf1aTransmitFragment[CLIENT]; + Rf1aConfigure = Rf1aC.Rf1aConfigure[CLIENT]; + Rf1aPhysicalMetadata = Rf1aC; + Rf1aStatus = Rf1aC; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/Rf1aPhysicalIntrospect.nc b/tos/chips/msp430/rf1a/physical/Rf1aPhysicalIntrospect.nc new file mode 100644 index 0000000000..8b84127a9d --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aPhysicalIntrospect.nc @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Facilities to query the internal configuration of the radio and + * extract relevant information converted to units that are meaningful + * to (certain) humans. Mainly used by normal applications to confirm + * that the underlying physical configuration of the radio is what + * they intended to use. + * + * @author Peter A. Bigot + */ + +interface Rf1aPhysicalIntrospect { + /** Inspect the configured frequency of the radio XOSC clock. + * + * f_XOSC is used to calculate the frequencies of various radio + * characteristics. The default value for this is 26*10^6 Hz, + * and it's unlikely to be something else. + */ + command uint32_t getFrequencyXOSC_Hz (); + + /** Set the configured frequency of the radio XOSC clock. + * + * You only need to use this if you have a board with XOSC that is + * not 26MHz. + */ + command void setFrequencyXOSC_Hz (uint32_t f_xosc_Hz); + + /** Calculate the carrier frequency, in Hz. + * + * This is the base frequency of the radio. It is not what the + * radio transmits/receives at. For that you want the channel + * frequency. + */ + command uint32_t frequencyCarrier_Hz (); + + /** Calculate the delta frequency between channels, in Hz. */ + command uint32_t channelDeltaFrequency_Hz (); + + /** Calculate the channel frequency, in Hz. + * + * This is the carrier frequency plus the channel number times the + * channel delta frequency. It's the value you need if you want to + * know what frequency the radio receives/transmits. + */ + command uint32_t frequencyChannel_Hz (); + + /** Calculate the intermediate frequency, in Hz */ + command uint32_t frequencyIf_Hz (); + + /** Calculate the channel bandwidth, in Hz. */ + command uint32_t bandwidthChannel_Hz (); + + /** Calculate the transmission data rate, in bytes per second. + * + * This derives from the baud rate, assuming eight bits per byte and + * adjusted for Manchester encoding if that is enabled. + */ + command uint32_t dataRate_Bps (); +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aPhysicalIntrospectC.nc b/tos/chips/msp430/rf1a/physical/Rf1aPhysicalIntrospectC.nc new file mode 100644 index 0000000000..be13886c1f --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aPhysicalIntrospectC.nc @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Implement the physical introspection interface for a given physical radio. + * + * All calculations in this module are straight out of the peripheral + * register definitions in the SLAU259 document. + */ + +generic module Rf1aPhysicalIntrospectC () { + uses { + interface HplMsp430Rf1aIf as Rf1aIf; + } + provides { + interface Rf1aPhysicalIntrospect; + } +} implementation { + +#ifndef REPLICATE_BUG + /* 20100830 GCC optimizer bug with this code. If the frequency is + * calculated by shifting its individual components, the resulting + * 64-bit integer is not correctly shifted back. Where + * FREQ=0x22b13b, the carrier frequency retains the 0xb13b bits in + * the upper half of the 32-bit result, as well as in the lower + * half. + */ +#define REPLICATE_BUG 0 +#endif + + uint32_t _f_xosc_Hz = +#if REPLICATE_BUG +#define BASE 1 + 1UL << BASE +#else +#define BASE 16 + 26000000UL +#endif + ; + + command uint32_t Rf1aPhysicalIntrospect.getFrequencyXOSC_Hz () { return _f_xosc_Hz; } + command void Rf1aPhysicalIntrospect.setFrequencyXOSC_Hz (uint32_t f_xosc_Hz) { _f_xosc_Hz = f_xosc_Hz; } + + command uint32_t Rf1aPhysicalIntrospect.frequencyCarrier_Hz () { + uint64_t f_xosc_ull = _f_xosc_Hz; +#if ! REPLICATE_BUG + volatile +#endif + uint32_t freq = ((((uint32_t)call Rf1aIf.readRegister(FREQ2)) << 16) + | (((uint32_t)call Rf1aIf.readRegister(FREQ1)) << 8) + | ((uint32_t)call Rf1aIf.readRegister(FREQ0))); + return (uint32_t)((f_xosc_ull * freq) >> BASE); + } + + command uint32_t Rf1aPhysicalIntrospect.channelDeltaFrequency_Hz () { + uint64_t f_xosc_ull = _f_xosc_Hz; + uint16_t chanspc_e = 0x03 & call Rf1aIf.readRegister(MDMCFG1); + uint16_t chanspc_m = call Rf1aIf.readRegister(MDMCFG0); + + return (uint32_t)((f_xosc_ull * (256UL + chanspc_m) * (1UL << chanspc_e)) >> (2 + BASE)); + } + + command uint32_t Rf1aPhysicalIntrospect.frequencyChannel_Hz () { + uint32_t f_hz = call Rf1aPhysicalIntrospect.frequencyCarrier_Hz(); + uint32_t df_hz = call Rf1aPhysicalIntrospect.channelDeltaFrequency_Hz(); + uint16_t channr = call Rf1aIf.readRegister( +#if REPLICATE_BUG + /* For bug replication, use a register that returns zero, thus + * discarding the channel delta frequency component. + */ + PARTNUM +#else + CHANNR +#endif +); + + return f_hz + channr * df_hz; + } + + command uint32_t Rf1aPhysicalIntrospect.frequencyIf_Hz () { + uint8_t freq_if = 0x0F & call Rf1aIf.readRegister(FSCTRL1); + return (_f_xosc_Hz * freq_if) >> 10; + } + + command uint32_t Rf1aPhysicalIntrospect.bandwidthChannel_Hz () { + uint8_t mdmcfg4 = call Rf1aIf.readRegister(MDMCFG4); + uint8_t chanbw_e = 0x03 & (mdmcfg4 >> 6); + uint8_t chanbw_m = 0x03 & (mdmcfg4 >> 4); + return _f_xosc_Hz / (8 * (4 + chanbw_m) * (1UL << chanbw_e)); + } + + command uint32_t Rf1aPhysicalIntrospect.dataRate_Bps () { + uint8_t drate_e = 0x0F & call Rf1aIf.readRegister(MDMCFG4); + uint8_t drate_m = call Rf1aIf.readRegister(MDMCFG3); + uint32_t r_data_baud; + uint32_t r_data_Bps; + uint64_t t_ull = _f_xosc_Hz; + + t_ull <<= drate_e; + t_ull *= (256 + drate_m); + r_data_baud = (uint32_t)(t_ull >> 28); + r_data_Bps = r_data_baud / 8; + if (0x08 & call Rf1aIf.readRegister(MDMCFG2)) { + r_data_Bps /= 2; + } + return r_data_Bps; + } +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aPhysicalMetadata.nc b/tos/chips/msp430/rf1a/physical/Rf1aPhysicalMetadata.nc new file mode 100644 index 0000000000..b958020f4b --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aPhysicalMetadata.nc @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Operations relevant to metadata on an RF1A physical interface. + * + * This interface is coupled with Rf1aPhysical, in that it is the + * module that implements Rf1aPhysical that provides the metadata that + * is stored through this interface. It is provided separately + * because access to the metadata is required at levels of the stack + * (such as acknowledgement processing) than have no need for full + * Rf1aPhysical capabilities. + * + * @author Peter A. Bigot + */ + +#include "Rf1aPacket.h" + +interface Rf1aPhysicalMetadata { + + /** Store current metadata. + * + * This updates those metadata fields specific to the physical + * layer, such as rssi and lqi, to the values associated with the + * most recently received packet. Fields unrelated to the physical + * layer, such as the reconstructed packet length, are left + * untouched. + * + * To ensure the captured metadata is relevant, this function should + * be invoked ASAP after the packet reception is completed by the + * radio, e.g. during the receiveDone event. + * + * Note that the values stored are in raw radio format. Other + * methods in the Rf1aPhysicalMetadata interface should be used to + * extract relevant information. + * + * @param metadatap Pointer to the metadata packet into which the + * relevant information should be stored + */ + async command void store (rf1a_metadata_t* metadatap); + + /** Get the received signal strength indicator for a given packet. + * + * This is the RSSI provided by the radio as locked at the point the + * sync word was demodulated for the received packet. The value is + * in dBm. + */ + async command int rssi (const rf1a_metadata_t* metadatap); + + /** Get link quality indicator for a given packet. + * + * This is the radio measure of distance between ideal and received + * signal over the 64 symbols following the sync word of the + * received packet. + */ + async command int lqi (const rf1a_metadata_t* metadatap); + + /** Indicate whether the hardware CRC passed for the received packet. */ + async command bool crcPassed (const rf1a_metadata_t* metadatap); +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aRadioPower.h b/tos/chips/msp430/rf1a/physical/Rf1aRadioPower.h new file mode 100644 index 0000000000..a945614e76 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aRadioPower.h @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _Rf1aRadioPower_h_ +#define _Rf1aRadioPower_h_ + +/** Infrastructure to support selecting PATABLE register values based + * on carrier frequency and desired output power level in dBm. + * + * Note: That there are eight power levels in the default table is an + * artifact of the facts that the RF1A PATABLE has eight entries and + * the suggested values in the data sheet correspond to eight entries + * at specified levels. The number of entries in the tables used by + * Rf1aRadioPowerC to map between dBm and power register values is + * independent of this. Feel free to redefine the + * RF1A_MIN_TX_POWER_INDEX and RF1A_MAX_TX_POWER_INDEX extrema to + * allow more or fewer entries in each table. Make sure you also + * redefine RF1A_TX_PATABLE_SETTINGS_INIT and + * RF1A_TX_PATABLE_LEVELS_INIT. + * + * SmartRF Studio may suggest other PATABLE values. + */ + +#ifndef RF1A_MIN_TX_POWER_INDEX +#define RF1A_MIN_TX_POWER_INDEX 0 +#endif /* RF1A_MIN_TX_POWER_INDEX */ + +#ifndef RF1A_MAX_TX_POWER_INDEX +#define RF1A_MAX_TX_POWER_INDEX 7 +#endif /* RF1A_MAX_TX_POWER_INDEX */ + +/** Structure used to hold PATABLE configuration data. */ +typedef struct rf1a_patable_t { + /** A frequency at which the given patable settings apply */ + int freq_MHz; + /** A table of power settings mapping register values to to the + * RF1A_TX_PATABLE_POWER dBm values at the specified frequency */ + uint8_t patable[RF1A_MAX_TX_POWER_INDEX + 1 - RF1A_MIN_TX_POWER_INDEX]; +} rf1a_patable_t; + +#ifndef RF1A_TX_PATABLE_SETTINGS_INIT + +/** Sequence of rf1a_patable_t entries used in Rf1aRadioPowerC to find + * the best PATABLE settings for a given carrier frequency, and the + * best power register value for a given power level in dBm. */ +#define RF1A_TX_PATABLE_SETTINGS_INIT \ + { 315, { 0x12, 0x0d, 0x1c, 0x34, 0x51, 0x85, 0xcb, 0xc2 } }, \ + { 433, { 0x12, 0x0e, 0x1d, 0x34, 0x60, 0x84, 0xc8, 0xc0 } }, \ + { 868, { 0x03, 0x0f, 0x1e, 0x27, 0x60, 0x81, 0xcb, 0xc2 } }, \ + { 915, { 0x03, 0x0e, 0x1e, 0x27, 0x8e, 0xcd, 0xc7, 0xc0 } } + +#endif /* RF1A_TX_PATABLE_SETTINGS_INIT */ + +#ifndef RF1A_TX_PATABLE_LEVELS_INIT +#define RF1A_TX_PATABLE_LEVELS_INIT { -30, -20, -15, -10, 0, 5, 7, 10 } +#endif /* RF1A_TX_PATABLE_LEVELS_INIT */ + +#endif /* _Rf1aRadioPower_h_ */ diff --git a/tos/chips/msp430/rf1a/physical/Rf1aRadioPower.nc b/tos/chips/msp430/rf1a/physical/Rf1aRadioPower.nc new file mode 100644 index 0000000000..2acb25f293 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aRadioPower.nc @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Control the transmission power and receiver attenuation of an RF1A + * radio module. + * + * @author Peter A. Bigot + */ + +interface Rf1aRadioPower { + + /** Set the transmit power register. + * + * This function assumes that a valid value is obtained from + * somewhere. It is not possible to determine the corresponding + * dBm. It further assumes that the radio is configured with + * FREND0.PO_POWER set to zero, indicating a constant power used + * throughout transmission. + * + * @note Power register values from 0x61 through 0x6F are not + * allowed on the CC430/RF1A. + */ + command void setTxPower_reg (uint8_t reg); + + /** Retrieve the value of the transport power register. */ + command uint8_t getTxPower_reg (); + + /** Set the transmit power to the specified level. + * + * @param idx a value between RF1A_MIN_TX_POWER_INDEX and + * RF1A_MAX_TX_POWER_INDEX + * + * @return the corresponding power level, in dBm, or MAXINT if idx + * is not a valid value. + */ + command int setTxPower_idx (uint8_t idx); + + /** Set the transmit power to the closest table value for the given dbm. + * + * This function uses the carrier frequency to select from a + * chip-specific set of PATABLE settings, then programs the radio to + * use the corresponding setting. + * + * @return the selected transmission power, in dBm + * + * @note The vendor-provided tables for the CC430 cover transmission + * power levels of -30, -20, -15, -10, 0, 5, 7, and 10 dBm. No + * interpolation is done between vendor-provided points in the + * table. + */ + command int setTxPower_dBm (int dbm); + + /** Set the receive attenuation in dBm to the closest supported value. + * + * See also SWRA147, "Close-in Reception with CC1101". + * + * @return The resulting rx attenuation level. + * + * @note The CC430 supports receive attenuation levels of 0, 6, 12, + * and 18 dB. + */ + command int setRxAttenuation_dBm (int dbm); + + /** Retrieve the current receiver attenuation. + * + * @return RX attenuation in dBm. + */ + command int getRxAttenuation_dBm (); +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aRadioPowerC.nc b/tos/chips/msp430/rf1a/physical/Rf1aRadioPowerC.nc new file mode 100644 index 0000000000..b9ffb9b69b --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aRadioPowerC.nc @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "Rf1aRadioPower.h" + +/** Implement PATABLE and RX attenuation configuration. + * + * @note The PATABLE register on the RF1A is an eight-byte vector + * accessed through a single address. There is an internal index + * counter that updates on each access. Accessing a non-PATABLE + * register after each PATABLE operation resets this index. If you + * choose to access the PATABLE register yourself elsewhere and do not + * follow this practice, this module may not operate correctly. + * + * @author Peter A. Bigot + */ + +generic module Rf1aRadioPowerC () { + uses { + interface HplMsp430Rf1aIf as Rf1aIf; + interface Rf1aPhysicalIntrospect; + } + provides { + interface Rf1aRadioPower; + } +} implementation { + + const rf1a_patable_t _patables[] = { + RF1A_TX_PATABLE_SETTINGS_INIT + }; + const int8_t _pa_levels[] = RF1A_TX_PATABLE_LEVELS_INIT; + enum { + PATABLE_LEN = 8, + HzPerMHz = 1000000UL, + PATABLE_COUNT = sizeof(_patables) / sizeof(*_patables), + NUM_RF1A_TX_POWER = (RF1A_MAX_TX_POWER_INDEX - RF1A_MIN_TX_POWER_INDEX + 1), + }; + + const rf1a_patable_t* _findBestSettingsTable () { + int freq_MHz = (call Rf1aPhysicalIntrospect.frequencyChannel_Hz()) / HzPerMHz; + const rf1a_patable_t* best = _patables; + int pi = 0; + while (++pi < PATABLE_COUNT) { + const rf1a_patable_t* pp = _patables + pi; + if (abs(freq_MHz - pp->freq_MHz) < abs(freq_MHz - best->freq_MHz)) { + best = pp; + } + } + return best; + } + + command void Rf1aRadioPower.setTxPower_reg (uint8_t reg) { + call Rf1aIf.writeRegister(PATABLE, reg); + /* Reset internal PATABLE idx by issuing non-PATABLE + * instruction */ + (void)call Rf1aIf.readRegister(PARTNUM); + } + + int _setTxPower_idx (const rf1a_patable_t* pp, + uint8_t idx) { + call Rf1aRadioPower.setTxPower_reg(pp->patable[idx]); + return _pa_levels[idx]; + } + + command int Rf1aRadioPower.setTxPower_idx (uint8_t idx) { + if ((RF1A_MIN_TX_POWER_INDEX > idx) || (RF1A_MAX_TX_POWER_INDEX < idx)) { + return INT_MAX; + } + return _setTxPower_idx(_findBestSettingsTable(), idx); + } + + command int Rf1aRadioPower.setTxPower_dBm (int dbm) { + const rf1a_patable_t* pp = _findBestSettingsTable(); + int best = 0; + int i; + + for (i = 1; i < NUM_RF1A_TX_POWER; ++i) { + if (abs(_pa_levels[i] - dbm) < abs(_pa_levels[best] - dbm)) { + best = i; + } + } + return _setTxPower_idx(pp, best); + } + + command uint8_t Rf1aRadioPower.getTxPower_reg () { + uint8_t rv; + + rv = call Rf1aIf.readRegister(PATABLE); + /* Reset internal PATABLE idx by issuing non-PATABLE + * instruction */ + (void)call Rf1aIf.readRegister(PARTNUM); + return rv; + } + + enum { + /** Scale multiplier for CLOSE_IN_RX */ + RxAttenPerUnit_dBm = 6, + /** Maximum value of CLOSE_IN_RX */ + RxAttenMax_reg = 3, + /** Mask off all of FIFOTHR except bits 5:4 which hold CLOSE_IN_RX */ + RxAttenRegMask = 0xCF, + /** Shift to place CLOSE_IN_RX in correct position */ + RxAttenRegShift = 4, + }; + + command int Rf1aRadioPower.setRxAttenuation_dBm (int dbm) { + uint8_t atten_reg = 0; + if (0 < dbm) { + /* Round to nearest multiple of RxAttenPerUnit_dBm */ + atten_reg = (dbm + (RxAttenPerUnit_dBm / 2)) / RxAttenPerUnit_dBm; + if (RxAttenMax_reg < atten_reg) { + atten_reg = RxAttenMax_reg; + } + } + (void)call Rf1aIf.writeRegister(FIFOTHR, (atten_reg << RxAttenRegShift) | (RxAttenRegMask & call Rf1aIf.readRegister(FIFOTHR))); + return atten_reg * RxAttenPerUnit_dBm; + } + + command int Rf1aRadioPower.getRxAttenuation_dBm () { + return RxAttenPerUnit_dBm * (((~ RxAttenRegMask) & (call Rf1aIf.readRegister(FIFOTHR))) >> RxAttenRegShift); + } +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aStatus.nc b/tos/chips/msp430/rf1a/physical/Rf1aStatus.nc new file mode 100644 index 0000000000..bd51eb633a --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aStatus.nc @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1a.h" + +interface Rf1aStatus { + /** + * Return a value indicating the status of the radio. The value is + * one of the enumeration values of rf1a_status_e (excepting RF1A_S_MASK) + */ + async command rf1a_status_e get (); +} diff --git a/tos/chips/msp430/rf1a/physical/Rf1aTinyOsPhysicalC.nc b/tos/chips/msp430/rf1a/physical/Rf1aTinyOsPhysicalC.nc new file mode 100644 index 0000000000..07c63f60ea --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aTinyOsPhysicalC.nc @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Bridge an Rf1aPhysical implementation and a network stack that uses + * standard TinyOS low-level Send and Receive interfaces. + * + * This leverages the assumption that the underlying physical radio + * uses an 802.15.4 stack, and provides interfaces that are + * parameterized on the frame type. By doing this we can assume that + * the parameters involving IEEE154_TYPE_DATA are full message_t + * structures including the metadata section at a fixed position into + * the buffer, while those for other frame types may be just large + * enough to hold the over-the-air payload. + * + * @author Peter A. Bigot + */ + +generic configuration Rf1aTinyOsPhysicalC() { + provides { + interface SplitControl; + interface Send[uint8_t frame_type]; + interface Receive[uint8_t frame_type]; + } + uses { + interface Resource; + interface Rf1aPhysical; + interface Rf1aPhysicalMetadata; + interface Packet; + interface Rf1aPacket; + } +} implementation { + + components new Rf1aTinyOsPhysicalP(); + SplitControl = Rf1aTinyOsPhysicalP; + Send = Rf1aTinyOsPhysicalP.Send; + Receive = Rf1aTinyOsPhysicalP; + Resource = Rf1aTinyOsPhysicalP; + Rf1aPhysical = Rf1aTinyOsPhysicalP; + Rf1aPhysicalMetadata = Rf1aTinyOsPhysicalP; + Packet = Rf1aTinyOsPhysicalP; + Rf1aPacket = Rf1aTinyOsPhysicalP; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/Rf1aTinyOsPhysicalP.nc b/tos/chips/msp430/rf1a/physical/Rf1aTinyOsPhysicalP.nc new file mode 100644 index 0000000000..455756b945 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aTinyOsPhysicalP.nc @@ -0,0 +1,404 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Rf1aPacket.h" + +/** This module bridges the Rf1aPhysical realm with the lowest-level + * TinyOS message_t-based Send and Receive operations, and provides + * SplitControl support. + * @author Peter A. Bigot + */ + +generic module Rf1aTinyOsPhysicalP() { + provides { + interface SplitControl; + interface Send[uint8_t frame_type]; + interface Receive[uint8_t frame_type]; + } + uses { + interface Resource; + interface Rf1aPhysical; + interface Rf1aPhysicalMetadata; + interface Packet; + interface Rf1aPacket; + } +} implementation { + + /** Bare physical header structure */ + typedef rf1a_ieee154_t phy_header_t; + + /** Get a cast pointer to the physical layer header */ + phy_header_t* header (message_t* msg) { return (phy_header_t*)(msg->data - sizeof(phy_header_t)); } + + /** Get a cast pointer to the frame control field union */ + ieee154_fcf_t* fcf (message_t* msg) { return (ieee154_fcf_t*)(& header(msg)->fcf); } + + /** Packet metadata structure */ + typedef rf1a_metadata_t metadata_t; + + /** Get a cast pointer to the metadata structure */ + metadata_t* metadata (message_t* msg) { return call Rf1aPacket.metadata(msg); } + + // Forward declaration + void setReceiveBuffer (message_t* mp); + + /** States for managing the TEP115-imposed SplitControl interface. + * + * The SplitControl interface links with the Resource interface, and + * becomes the primary mechanism for turning the support for the + * network stack of this protocol on and off. A start involves + * requesting the radio resource, and is complete when that request + * is granted. A stop releases the resource, turning off the + * radio. + */ + enum { + /** State prior to invocation of SplitControl.start() or after + * signalling of SplitControl.stopDone(). */ + SCS_off, + /** State between invocation of SplitControl.start() and + * signalling of SplitControl.startDone(). We are waiting for the + * radio resource to be granted. */ + SCS_starting, + /** Radio is on. */ + SCS_on, + /** State between invocation of SplitControl.stop(0 and signalling + * of SplitControl.stopDone(). We are waiting for radio + * transmissions to cease and the radio resource to be + * released. */ + SCS_stopping, + }; + + /** The current state of the bridge as far as SplitControl is concerned. */ + uint8_t split_control_state; + + /** States of the transmit subsystem. */ + enum { + /** No transmission is in effect */ + TXS_idle, + /** System is transmitting a message through the Send interface */ + TXS_active, + }; + + /** Current status of the transmit subsystem */ + uint8_t tx_state; + + /** The result code from the physical layer send. */ + int tx_result; + + /** The pointer to the message currently being sent. Valid only + * when tx_state is not TXS_idle. */ + message_t* tx_message; + + /** An owned buffer that is used for receiving messages during times + * when there is no other message buffer available: specifically, + * upon initial start of the radio. */ + message_t rx_buffer; + + /** A pointer to the message structure currently pinned for use in + * physical receive operations. This may or may not be + * rx_buffer. */ + message_t* rx_message; + + /** The number of octets in the received message. Only valid for + * the duration between the async Rf1aPhysical.receiveDone event and + * the execution of the receiveDone_task. + */ + unsigned int rx_count; + + command error_t SplitControl.start() { + atomic { + /* Conform to TEP108's strict definition for this function. */ + switch (split_control_state) { + case SCS_on: + return EALREADY; + break; + case SCS_starting: + return SUCCESS; + break; + case SCS_stopping: + return EBUSY; + break; + case SCS_off: + if (SUCCESS == call Resource.request()) { + split_control_state = SCS_starting; + return SUCCESS; + } + //FALLTHRU + default: + return FAIL; + } + } + } + + command error_t SplitControl.stop () { + atomic { + /* Conform to TEP108's strict definition for this function. */ + switch (split_control_state) { + case SCS_off: + return EALREADY; + break; + case SCS_stopping: + return SUCCESS; + break; + case SCS_starting: + return EBUSY; + break; + case SCS_on: + if (SUCCESS == call Resource.release()) { + split_control_state = SCS_stopping; + return SUCCESS; + } + //FALLTHRU + default: + return FAIL; + } + } + } + + event void Resource.granted () { + /* Upon granting the resource, the radio configuration has been + * reset, and there are no buffers provided for receives. + * Configure a default buffer. + */ + call Packet.clear(&rx_buffer); + setReceiveBuffer(&rx_buffer); + atomic { + split_control_state = SCS_on; + tx_state = TXS_idle; + } + signal SplitControl.startDone(SUCCESS); + } + + task void stopDone_task () { + atomic split_control_state = SCS_off; + signal SplitControl.stopDone(SUCCESS); + } + + async event void Rf1aPhysical.released () { + post stopDone_task(); + } + + default event void SplitControl.startDone (error_t error) { } + default event void SplitControl.stopDone (error_t error) { } + + /** Feed the underlying radio a new buffer into which messages + * should be received. + * + * To simplify the control logic, we use single-use message buffers. + * + * @param mp The buffer to be used for the next message. If null, + * the existing buffer is re-used. + */ + void setReceiveBuffer (message_t* mp) { + atomic { + int rv; + uint8_t* hp; + + if (mp) { + rx_message = mp; + } + + /* Figure out where the message starts. */ + hp = (uint8_t*)header(rx_message); + + /* Tricksy: limit the received length so it stops at the end of + * the message_t structure. */ + rv = call Rf1aPhysical.setReceiveBuffer(hp, ((uint8_t*)(rx_message + 1)) - hp, TRUE); + + /* What do we do if this fails? Really, it shouldn't: the only + * way it would is if the radio was actively receiving into an + * already assigned buffer, and since we're (supposedly) the + * only place where receive buffers are provided, and we provide + * them as single-use, this "can't happen". */ + } + } + + /** Task to eliminate warning about invoking Send.sendDone from + * async Rf1aPhysical.sendDone. + */ + task void sendDone_task () { + message_t* msg; + int result; + + atomic { + result = tx_result; + msg = tx_message; + tx_message = 0; + tx_state = TXS_idle; + } + signal Send.sendDone[fcf(msg)->frame_type](msg, result); + } + + async event void Rf1aPhysical.sendDone (int result) { + atomic { + tx_result = result; + } + post sendDone_task(); + } + + command error_t Send.send[uint8_t frame_type] (message_t* msg, uint8_t len) { + int rv = SUCCESS; + uint8_t* packet_start = (uint8_t*)header(msg); + unsigned int packet_length = sizeof(phy_header_t) + len; + ieee154_fcf_t* fcfp = fcf(msg); + + atomic { + if (SCS_on != split_control_state) { + rv = EOFF; + } else if (TXS_idle != tx_state) { + rv = EBUSY; + } else { + fcfp->frame_type = frame_type; + rv = call Rf1aPhysical.send(packet_start, packet_length); + if (SUCCESS == rv) { + tx_message = msg; + tx_state = TXS_active; + tx_result = SUCCESS; + } +#if 0 + { + uint8_t* bp = packet_start; + unsigned int bc = packet_length; + printf("Sending %u at %p got %d: \r\n", bc, bp, rv); + while (0 < bc--) { + printf(" %02x", *bp++); + } + printf("\r\n"); + } +#endif + } + } + return rv; + } + + command error_t Send.cancel[uint8_t frame_type] (message_t* msg) { + /* In fact, we could cancel a send, though it might get ugly on + * the other end. For now, we don't. */ + return FAIL; + } + + default event void Send.sendDone[uint8_t frame_type] (message_t* msg, error_t error) { } + + command uint8_t Send.maxPayloadLength[uint8_t frame_type] () { + if (IEEE154_TYPE_DATA == frame_type) { + return TOSH_DATA_LENGTH; + } + // For non-DATA frames, length is unknown + return 0; + } + + command void* Send.getPayload[uint8_t frame_type] (message_t* msg, uint8_t len) { + return ((len+sizeof(phy_header_t)) <= TOSH_DATA_LENGTH) ? (void*)msg->data : 0; + } + + default event message_t* Receive.receive[uint8_t frame_type] (message_t* msg, void* payload, uint8_t len) { return msg; } + + async event void Rf1aPhysical.receiveStarted (unsigned int length) { } + + task void receiveDone_task () { + unsigned int count; + unsigned int payload_length; + message_t* mp; + uint8_t frame_type; + + atomic { + mp = rx_message; + rx_message = 0; + count = rx_count; + } + frame_type = fcf(mp)->frame_type; + /* Propagate the successful receive up the stack, installing the returned + * message buffer for use in the next reception. */ + payload_length = count - sizeof(phy_header_t); + if (IEEE154_TYPE_DATA == frame_type) { + metadata_t* mdp = metadata(mp); + call Rf1aPhysicalMetadata.store(mdp); + mdp->payload_length = count; + } +#if 0 + { + uint8_t* bp = (uint8_t*)header(mp); + unsigned int bc = count; + + printf("Receive %u at %p in %p, loc %p:\r\n", count, bp, mp, mp->data); + while (0 < bc--) { + printf(" %02x", *bp++); + } + printf("\r\n"); + } +#endif + setReceiveBuffer(signal Receive.receive[frame_type](mp, mp->data, payload_length)); + } + + async event void Rf1aPhysical.receiveDone (uint8_t* buffer, + unsigned int count, + int result) { + if (SUCCESS == result) { + /* Store the message size and result. We can ignore the buffer, + * since we know it went into the current rx_message */ + atomic { + rx_count = count; + post receiveDone_task(); + } + } else { + /* TinyOS's receive notification does not provide a way to + * indicate a failure, so we drop those at the physical layer. + * If you care, monitor this event. We'll just re-use the + * current buffer for the next message. */ + setReceiveBuffer(0); + } + } + + async event void Rf1aPhysical.receiveBufferFilled (uint8_t* buffer, + unsigned int count) { + /* We can ignore these, because we're doing single-use message + * buffers, so we get the notification in receiveDone. It may be + * that, in a fast system, this event gets invoked by the physical + * layer to ask for a new buffer to store stuff into, but until + * the receiveDone_task finishes interacting with the upper layers + * we don't have a buffer to provide. */ + } + + async event void Rf1aPhysical.frameStarted () { } + async event void Rf1aPhysical.clearChannel () { } + async event void Rf1aPhysical.carrierSense () { } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/Rf1aTransmitFragment.nc b/tos/chips/msp430/rf1a/physical/Rf1aTransmitFragment.nc new file mode 100644 index 0000000000..902c292a4e --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/Rf1aTransmitFragment.nc @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** A utility interface that allows protocols to intercept and modify + * data just prior to transmission. + * + * @author Peter A. Bigot + */ + +interface Rf1aTransmitFragment { + /** Validate the requested length of data ready to be transmitted. + * + * This command is invoked by a physical-layer radio when it needs + * to place data in the radio's transmit buffer. + * + * In most situations, a reasonable decision is to just return + * count. + * + * @param count The maximum number of octets the radio is prepared + * to be told to transmit in the next block. Will be positive. + * + * @return The number of octets the radio should transmit in the + * next block. A value of zero indicates that no data is + * immediately available, and the radio should request again later. + * The returned value must not exceed the provided count. + */ + async command unsigned int transmitReadyCount (unsigned int count); + + /** Provide the data to be transmitted. + * + * This is invoked to locate the data that is to be transmitted in + * the next block. It allows gather-style message transmission. + * The incoming count will be positive, and no greater than the + * value of the transmitReadyCount returned prior to invoking this. + * The invocation must either return a pointer to a block of at + * least count octets, or 0 to indicate that the transmission should + * be aborted. + * + * @param count The number of octets that must be made available + * for transmission. + * + * @return A pointer to a sequence of octets of length count, or + * null to abort the transmission. + */ + async command const uint8_t* transmitData (unsigned int count); +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/physical/smartrf_RF1A.h b/tos/chips/msp430/rf1a/physical/smartrf_RF1A.h new file mode 100755 index 0000000000..958292dc40 --- /dev/null +++ b/tos/chips/msp430/rf1a/physical/smartrf_RF1A.h @@ -0,0 +1,73 @@ +/*************************************************************** + * SmartRF Studio(tm) Export + * + * Radio register settings specifed with C-code + * compatible #define statements. + * + ***************************************************************/ + +#ifndef SMARTRF_CC430_H +#define SMARTRF_CC430_H + +#define SMARTRF_RADIO_CC430 + +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x22 +#define SMARTRF_SETTING_FREQ1 0xB1 +#define SMARTRF_SETTING_FREQ0 0x3B +#define SMARTRF_SETTING_MDMCFG4 0xC8 +#define SMARTRF_SETTING_MDMCFG3 0x93 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x0a +#define SMARTRF_SETTING_DEVIATN 0x34 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#if 0 +/* Settings emitted by SmartRF Studio */ +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#else +/* Settings observed in real world */ +#define SMARTRF_SETTING_FSCAL3 0xEF +#define SMARTRF_SETTING_FSCAL2 0x2D +#define SMARTRF_SETTING_FSCAL1 0x25 +#define SMARTRF_SETTING_FSCAL0 0x1F +#endif +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x2E +#define SMARTRF_SETTING_IOCFG0D 0x29 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x45 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + +/* TinyOS Custom Settings */ + +// CCA if RSSI < thr unless rx; RX stay in RX ; TX go to RX +#define SMARTRF_SETTING_MCSM1 0x3F + +// Default power configuration +#define SMARTRF_SETTING_PATABLE0 0xC0 + +/** Minimum legal channel number */ +#define RF1A_CHANNEL_MIN (10) +/** Maximum legal channel number */ +#define RF1A_CHANNEL_MAX (19) + +#endif + diff --git a/tos/chips/msp430/rf1a/smartrf/CC430_50kbps_135kHzBw.h b/tos/chips/msp430/rf1a/smartrf/CC430_50kbps_135kHzBw.h new file mode 100755 index 0000000000..f712cd2e03 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/CC430_50kbps_135kHzBw.h @@ -0,0 +1,64 @@ +/* Deviation = 25.390625 */ +/* Base frequency = 914.999969 */ +/* Carrier frequency = 914.999969 */ +/* Channel number = 0 */ +/* Carrier frequency = 914.999969 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 914.999969 */ +/* Data rate = 49.9878 */ +/* RX filter BW = 135.416667 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x23 +#define SMARTRF_SETTING_FREQ1 0x31 +#define SMARTRF_SETTING_FREQ0 0x3B +#define SMARTRF_SETTING_MDMCFG4 0xAA +#define SMARTRF_SETTING_MDMCFG3 0xF8 +#define SMARTRF_SETTING_MDMCFG2 0x10 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x40 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/CC430_50kbps_162kHzBw.h b/tos/chips/msp430/rf1a/smartrf/CC430_50kbps_162kHzBw.h new file mode 100755 index 0000000000..695535690a --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/CC430_50kbps_162kHzBw.h @@ -0,0 +1,64 @@ +/* Deviation = 25.390625 */ +/* Base frequency = 914.999969 */ +/* Carrier frequency = 914.999969 */ +/* Channel number = 0 */ +/* Carrier frequency = 914.999969 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 914.999969 */ +/* Data rate = 49.9878 */ +/* RX filter BW = 162.500000 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x23 +#define SMARTRF_SETTING_FREQ1 0x31 +#define SMARTRF_SETTING_FREQ0 0x3B +#define SMARTRF_SETTING_MDMCFG4 0x9A +#define SMARTRF_SETTING_MDMCFG3 0xF8 +#define SMARTRF_SETTING_MDMCFG2 0x10 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x40 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/README.txt b/tos/chips/msp430/rf1a/smartrf/README.txt new file mode 100644 index 0000000000..541a65e2fd --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/README.txt @@ -0,0 +1,447 @@ +Overview +******** + +This documents tools and processes used to obtain register configuration +sets for the RF1A module in the CC430 SOC. + +Presence of a configuration in this directory should not be taken as +evidence that the configuration is suitable for use in any system. Some +exist simply to analyze the behavior of the supporting tools. Understand +the provenance of and differences between configurations, and evaluate them +in actual use, prior to selecting one for an application. + +If you're going to ignore that sage advice, though, prefer the +configurations beginning with SRFS_. + +Radio Configurations +==================== + +Radio configurations are best generated using TI's SmartRF Studio tool. The +data sheet for the RF1A module frequently suggests that preferred settings +for specific registers are the ones suggested by SmartRF Studio. + +The tool provides initial configurations for different data rates and +frequencies. Many of the register settings in these configurations are +unjustified by the chip documentation; e.g. why the ADC_RETENTION bit should +be set for 1.2 kbaud but not 250 kbaud in 902MHz modes. + +The SmartRF Studio tool is designed for use with directly-connected +experimenter boards. Other register settings are relevant only to use in +that form: for example, whether CRC is enabled, packet length, sync word +qualifiers, etc. + +Exporting Registers +------------------- + +SRFS provides the ability to export register configurations in a variety of +formats. All versions of SRFS come with a format to export for SimpliciTI. +While the TinyOS source code is prepared to read configurations from these +files, the files do not include PATABLE and other useful information such as +the actual description of the configuration in comments as generated by +@PARAM@. + +Copy the configs/rf1a_regs.sfrsexpCC430 file to the config/codexport +subdirectory of your SmartRF Studio 7 installation and use that to export +something more useful. This format has been used to export all header files +provided in this directory, from configurations stored int he configs +subdirectory. + +Vendor-Provided Configurations +------------------------------ + +SmartRF Studio 6 +^^^^^^^^^^^^^^^^ + +The following configurations have been generated from SmartRF Studio 6, +version 6.13.1 (Rev. S), released 28 January 2010, using the CC430 device +control panel. + +SRFS6_RESET -- What you get with "Reset Configuration" from the File menu. + +SRFS6_868_GFSK_1p2K_SENS -- 1.2 kBaud, 5.2 kHz deviation, GFSK modulation, +58 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_1p2K_CUR -- 1.2 kBaud, 5.2 kHz deviation, GFSK modulation, 58 +kHz RX BW, optimized for current. + +SRFS6_868_2FSK_1p2K_SENS -- 1.2 kBaud, 5.2 kHz deviation, 2-FSK modulation, +58 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_2p4K_SENS -- 2.4 kBaud, 5.2 kHz deviation, GFSK modulation, +58 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_2p4K_CUR -- 2.4 kBaud, 5.2 kHz deviation, GFSK modulation, +58 kHz RX BW, optimized for current. + +SRFS6_868_GFSK_4p8K_SENS -- 4.8 kBaud, 25.4 kHz deviation, GFSK modulation, +100 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_4p8K_CUR -- 4.8 kBaud, 25.4 kHz deviation, GFSK modulation, +100 kHz RX BW, optimized for current. + +SRFS6_868_GFSK_10K_SENS -- 10 kBaud, 19 kHz deviation, GFSK modulation, 100 +kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_10K_CUR -- 10 kBaud, 19 kHz deviation, GFSK modulation, 100 +kHz RX BW, optimized for current. + +SRFS6_868_GFSK_38p4K_SENS -- 38.4 kBaud, 20 kHz deviation, GFSK modulation, +100 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_38p4K_CUR -- 38.4 kBaud, 20 kHz deviation, GFSK modulation, +100 kHz RX BW, optimized for current. + +SRFS6_868_GFSK_76p8K_SENS -- 76.8 kBaud, 32 kHz deviation, GFSK modulation, +232 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_76p8K_CUR -- 76.8 kBaud, 32 kHz deviation, GFSK modulation, +232 kHz RX BW, optimized for current. + +SRFS6_868_GFSK_100K_SENS -- 100 kBaud, 47 kHz deviation, GFSK modulation, +325 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_100K_CUR -- 100 kBaud, 47 kHz deviation, GFSK modulation, +325 kHz RX BW, optimized for current. + +SRFS6_868_GFSK_175K_SENS -- 175 kBaud, 95 kHz deviation, GFSK modulation, +464 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_175K_CUR -- 175 kBaud, 95 kHz deviation, GFSK modulation, +464 kHz RX BW, optimized for current. + +SRFS6_868_GFSK_250K_SENS -- 250 kBaud, 127 kHz deviation, GFSK modulation, +540 kHz RX BW, optimized for sensitivity. + +SRFS6_868_GFSK_250K_CUR -- 250 kBaud, 127 kHz deviation, GFSK modulation, +540 kHz RX BW, optimized for current. + +SRFS6_868_MSK_500K -- 500 kBaud, 0 devation, MSK modulation, 812 kHz RX BW. + +SmartRF Studio 7 +^^^^^^^^^^^^^^^^ + +The following configurations have been generated from SmartRF Studio 7, +version 1.2.3 (Rev. E), released 17 August 2010, using the CC430 device control +panel. Note that "Easy Mode" and "Expert Mode" have completely independent +configurations. + +**WARNING** SRFS7 changes register configurations when you move between + Continuous TX and Packet RX windows in Expert mode. You want to be in + Packet RX. + +RESET -- The power-on reset values of the RF1A module in the CC430. Obtain +these by opening the Register View, then clicking "Register Reset" multiple +times until all register names are in non-bold black font. (My experience +with SRFS leaves me concerned that loading a configuration file does not +always reset all the register settings. The recorded values for the +subsequent configurations were obtained after first resetting all registers +to their power-on values in this manner.) + +SRFS7_RESET -- What you get with "Reset Configuration" from Smart RF Studio 7 +with the CC430 device panel. + +SRFS7_STI_902_GFSK_250K -- The "Easy Mode" SimpliciTI Ping packet, High data +rate (250 kbaud), Base frequency 902 MHz configuration. + +SRFS7_STI_902_GFSK_1p2K -- The "Easy Mode" SimpliciTI Ping packet, Low data +rate (1.2 kbaud), Base frequency 902 MHz configuration. + +SRFS7_868_GFSK_1p2K_SENS -- The "Expert Mode" Data rate: 1.2 kBaud, Dev.: +5.2 kHz, Mod.: GFSK, RX BW: 58 kHz, Optimized for Sensitivity configuration. + +SRFS7_868_GFSK_1p2K_CUR -- The "Expert Mode" Data rate: 1.2 kBaud, Dev.: 5.2 +kHz, Mod.: GFSK, RX BW: 58 kHz, Optimized for current consumption +configuration. (NOTE: In fact, this has a 2-FSK rather than 2-GFSK +modulation.) + +SRFS7_868_2FSK_1p2K_SENS -- The "Expert Mode" Data rate: 1.2 kBaud, Dev.: +5.2 kHz, Mod.: 2-FSK, RX BW: 58 kHz, Optimized for Sensitivity +configuration. + +SRFS7_868_GFSK_38p4K_SENS -- The "Expert Mode" Data rate: 38.4 kBaud, Dev.: +20 kHz, Mod.: GFSK, RX BW: 100 kHz, Optimized for Sensitivity configuration. + +SRFS7_868_GFSK_38p4K_CUR -- The "Expert Mode" Data rate: 38.4 kBaud, Dev.: +20 kHz, Mod.: GFSK, RX BW: 100 kHz, Optimized for current consumption +configuration. (NOTE: In fact, this has a 2-FSK rather than 2-GFSK +modulation.) + +SRFS7_868_GFSK_175K_SENS -- The "Expert Mode" Data rate: 175 kBaud, Dev.: 95 +kHz, Mod.: GFSK, RX BW: 464 kHz, Optimized for Sensitivity configuration. + +SRFS7_868_GFSK_175K_CUR -- The "Expert Mode" Data rate: 175 kBaud, Dev.: 95 +kHz, Mod.: GFSK, RX BW: 464 kHz, Optimized for current consumption +configuration. + +SRFS7_868_GFSK_250K_SENS -- The "Expert Mode" Data rate: 250 kBaud, Dev.: 95 +kHz, Mod.: GFSK, RX BW: 464 kHz, Optimized for Sensitivity configuration. + +SRFS7_868_GFSK_250K_CUR -- The "Expert Mode" Data rate: 250 kBaud, Dev.: 95 +kHz, Mod.: GFSK, RX BW: 464 kHz, Optimized for current consumption +configuration. + +TINYOSRF1A -- RESET + the register settings in the original +physical/smartrf_RF1A.h file. Effectively, what's been used as long as the +RF1A module has been around. *NOTE* The FSCAL* values from +physical/smartrf_RF1A.h are rejected by SRFS; any attempt to set them to the +legacy values is ignored. However, once the resulting configuration is +programmed, the values read back from those registers have changed and match +the ones recorded in physical/smartrf_RF1A.h So don't worry about it. + +CC430_50kbps_135kHzBW -- SRFS7 config only. Provided by TI as one +approach for 802.15.4G radio configuration. Note that this has a base +frequency of 915MHz at channel 0, so is not suitable as-is. + +SRFS7_902p2_GFSK_50K_135B -- Same as CC430_50kbps_135kHzBW, but with base +frequency set to 902.2 MHz per 802.15.4G specification. + +CC430_50kbps_162kHzBW -- SRFS7 config only. Provided by TI as one +approach for 802.15.4G radio configuration. Note that this has a base +frequency of 915MHz at channel 0, so is not suitable as-is. + +SRFS7_902p2_GFSK_50K_163B -- Same as CC430_50kbps_162kHzBW, but with base +frequency set to 902.2 MHz per 802.15.4G specification. + +SRFS7_779_MSK_250K -- China's ISM band is 779-787 MHz. The current version of +SmartRF Studio 7 does not actually go below 800 MHz, but the CC430 does +support it and those frequency registers can be manually calculated, as was +done for the SRFS7_770_MSK_250K.h file. China's 802.15.4c defines 250kbps +O-QPSK modulation, which is very similar to MSK with the exception that MSK uses +half-sinusoids instead of O-QPSK's square waves. What is not implemented from +the 802.15.4c PHY is the channel bandwidth and any phase transition time +differences between the standard MSK implementation and the 802.15.4c's O-QPSK +definition. Channel 0 in the SRFS7_770_MSK_250K.h is at 779.0 MHz, with +200 kHz channel bandwidth which was only selected because it is the +default given in SmartRF studio. + + +Review of Vendor-Provided Configurations +---------------------------------------- + +Consistent differences between SRFS6 and SRFS7: + + SRFS6 SRFS7 +IOCFG2 29 0b +IOCFG0 06 2d +PKTCTRL0.PKT_FORMAT 0 1 +PKTCTRL0.CRC_EN 1 0 +PKTCTRL0.LENGTH_CONFIG 1 2 +FREQ1 65 62 +FREQ0 6a 76 +MDMCFG2.SYNC_MODE 3 0 +MCSM0.Reserved[3:2] 2 0 + +SmartRF Studio 6 +^^^^^^^^^^^^^^^^ + +In SRFS6, the configurations for 4.8, 10, 38.4, 76.8, and 100 kBaud all +change FSCTRL1.FREQ_IF when MDMCFG2.DEM_DCFILT_OFF changes; the 1.2, 2.4, +175, and 250 kBaud configurations do not. + +SmartRF Studio 7 +^^^^^^^^^^^^^^^^ + +In the Expert Mode configurations, the second configuration, 1.2kBaud 5.2kHz +optimized for current consumption, is mis-labeled as being a GFSK +modulation. The settings have it as a 2-FSK modulation: both +MDMCFG2.DEM_DCFILT_OFF and MDMCFG2.MOD_FORMAT are changed. + +The same mis-labelling holds with the 38.4kB configuration. + +The 175 and 250 kBaud configurations are correctly labelled, but unlike the +38.4kB one do not change FSCTRL1.FREQ_IF when MDMCFG2.DEM_DCFILT_OFF +changes. The documentation implies that SmartRF Studio should be +calculating a different FREQ_IF in this situation, but it doesn't seem to do +so. + +Custom 802.15.4G Configurations +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The two provided configurations differ only in the RX filter bandwidth. The +AGCCTRL and FREND1 register settings match the SRFS6 38p4K configuration, +while the FOCCFG and BSCFG settings match the 76p8K configuration. The new +configuration disables ADC_RETENTION, with both the 38p4 and 76p8 +configurations had enabled. + +General Conclusions +^^^^^^^^^^^^^^^^^^^ + +The SimpliciTI configurations, which nominally differ only in data rate, +also have many significant changes in registers that affect frequency +synthesis, frequency offset compensation, bit synchronization, automated +gain control, and the front-end configuration. The analysis of derived +configurations described below shows that these differences were not +automatically provided by SRFS when the data rate was changed. A reasonable +assumption is that the tuning was performed by an RF specialized at TI who +knows the internals of the RF1A module and tuned it using SRFS with +experimental boards. The STI_902 configuration is consistent with the 868 +configuration for the same data rate. + +TI's RF support team has stated that users wishing to change radio +parameters should select the closes example configuration, and modify only +those parameters that must be changed. It was suggested that "closest" +should be based on the RX filter bandwidth configuration, selecting an +example with a higher rather than lower bandwidth if an exact match cannot +be found. + +All in all, the user who simply wishes to derive a new configuration with a +different data rate is left with little choice but to hire a highly-paid +RF engineer as a consultant. + +Amateur Theory +^^^^^^^^^^^^^^ + +"RX filter BW" in SRFS is CHANNBW in the RF1A registers, and "channel filter +bandwidth" in section 19.3.4 of the data sheet. The data sheet specifies +that the signal bandwidth should occupy at most 80% of this width. + +Carson's Rule specifies that the bandwidth required is 2(dF+f_m) where dF is +the peak frequency deviation and f_m is the highest frequency of the +modulating signal (apparently, the data rate). + +Assume f_XOSC is 26*10^6, the suggested default. Section 19.3.4 suggests +frequency uncertainty of +/- 20ppm for sender and receiver. Total frequency +uncertainty is then +/- 40ppm of f_carrier. Assuming f_carrier is 915 MHz, +the center of the ITU region 2 ISM band, the frequncy uncertainty is 37kHz. + +I have no idea how deviation is determined. Below are the representable +deviation values: + +Representable DEVIATN values (kHz): +DV_E DV_M=0 DV_M=1 DV_M=2 DV_M=3 DV_M=4 DV_M=5 DV_M=6 DV_M=7 +00: 1.59 1.79 1.98 2.18 2.38 2.58 2.78 2.98 +01: 3.17 3.57 3.97 4.36 4.76 5.16 5.55 5.95 +02: 6.35 7.14 7.93 8.73 9.52 10.31 11.11 11.90 +03: 12.70 14.28 15.87 17.46 19.04 20.63 22.22 23.80 +04: 25.39 28.56 31.74 34.91 38.09 41.26 44.43 47.61 +05: 50.78 57.13 63.48 69.82 76.17 82.52 88.87 95.21 +06: 101.56 114.26 126.95 139.65 152.34 165.04 177.73 190.43 +07: 203.12 228.52 253.91 279.30 304.69 330.08 355.47 380.86 + +Representable RX Filter BW values (kHz): +BW_E BW_M=0 BW_M=1 BW_M=2 BW_M=3 +00: 812.50 650.00 541.67 464.29 +01: 406.25 325.00 270.83 232.14 +02: 203.12 162.50 135.42 116.07 +03: 101.56 81.25 67.71 58.04 + +Note that the available filter bandwidth must be selected from these sixteen +supported values. SRFS selects the smallest value at least as large as the +entered one; e.g. if you enter 542 you'll get 650 instead of 541.67. + +Amateur calculation says that, given a data rate f_m, a deviation dF, and a +frequency uncertainty of f_unc (~ 37 kHz) the suggested channel bandwidth +should be: + + BW = 2(f_m + dF + f_unc) / 0.8 + +As noted in +http://e2e.ti.com/support/low_power_rf/f/155/p/15810/60855.aspx#60855, the +actual settings in the provided TI example files have very little in common +with what this calculation suggests. Hence my distrust of both these +configurations and anything that is not based on actual experimentation with +actual radios with their real antennas. + +Derived Configurations +---------------------- + +General Principles +^^^^^^^^^^^^^^^^^^ + +FM-band (generally 87.5MHz to 108MHz) channel spacing is 200KHz, which is +presumably why it is used in all Smart RF Studio example configurations. Be +aware that this is a poor choice in many cases, since the deviation and RX +filter bandwidths for higher data rates cause the signal to overlay multiple +200KHz channels. The standard for frequency deviation with this spacing is +75kHz. + +ISM band in region 2 is 902-928MHz. To avoid bleeding outside that band, it +might seem to make sense to set the base frequency to: + + f_base = 902MHz + max(df_channel / 2, deviatn) + +TI's example files instead just leave f_base at 902MHz. They then set +channr to 20, to ensure that RF legality is retained. + +802.15.4G Desired Characteristics +--------------------------------- + +Values from P802.15.4g/d1, March 2010. Selected base configuration is the +915 MHz PHY, frequencies ranging from 902 to 928 MHz, FSK/GFSK modulation +and the mandatory 50 kBaud data rate. + +Data Rate: 50 kBaud. (Mandatory mode for MR-FSK PHY.) + +Deviation: 25 kHz. (Derived from data rate per 6.12a.1 and modulation index +1 specified for this mode in table 1a.) + +Channel Width: 200 kHz. (Defined by table 1a for this mode.) + +RF Frequency: 902.2 MHz. (Derived from 6.1.2.5a.3 which specifies center +frequency for channel zero.) + +RF Filter Bandwidth: No clear direction. Per TI support, select example +configuration closest to but above desired data rate. This would be the +76.8 kBaud one. + +Channel Number: 0 (default, not relevant) + +It is unclear whether FSK and GFSK are actually equally valid. Table 1a has +a footnote implying they are; figure 22d suggests the selection depends on +the data rate. + +6.12a.2 Data Whitening: optional, unclear whether RF1A follows rules. + +SRFS6_PRE802154G comprises SRFS6_868_GFSK_76p8K_SENS with these changes: +base frequency 902.2, data rate 50 kBaud, deviation 25 kHz. + +*NOTE*: Vendor configurations SRFS7_902p2_GFSK_50K_135B and +SRFS7_902p2_GFSK_50K_163B should be used in preference to the derived +SRFS6_PRE802154G. The former have front-end and AGC settings that should +provide better reception performance. + +Configurations +^^^^^^^^^^^^^^ +BASE -- RESET + base frequency 902, channel 20, channel spacing 200 kHz, +modulation 2-GFSK + +902_2GFSK_250K -- BASE + data rate 250, RX filter BW 540, deviation 125 + +902_2GFSK_1p2K -- BASE + data rate 1.2, RX filter BW 50, deviation 5.25 + +PRE802154G -- BASE + base frequency 902.2, channel 0, data rate 50 kbaud, RX +filter bandwidth 150 kHz, deviation 25 kHz + +SRFSBASE -- SRFSRESET; MDMCFG2.SYNC_MODE to 30/32+carrier_sense +(MDMCFG2=0x17); PKTCTRL0.WHITE_DATA to on, PKTCTRL0.PKT_FORMAT to normal +(PKTCTRL0=0x45). + +SRFS_902_2GFSK_250K -- SRFSBASE + data rate 250, RX filter BW 540, deviation +125 + +SRFS_902_2GFSK_1p2K -- SRFSBASE + data rate 1.2, RX filter BW 50, deviation +5.25 + +SRFS_TINYOSRF1A -- SRFSBASE + channel 10, data rate 10, RX filter BW 100, +deviation 20. The resulting differences from TINYOSRF1A are: +FIFOTHR.ADC_RETENTION is set, FSCTRL1.FREQ_IF changes to 304.7 kHz (from +152.3 kHz); MDMCFG2.SYNC_MODE changes to 30/32+carrier (from 30/32); FOCCFG, +BSCFG, AGCCTL* all change; FREND1.LNA_CURRENT and FREND1.LNA2MIX_CURRENT +change. + +SRFS_PRE802154G -- SRFSBASE + base frequency 902.2, channel 0, data rate 50 +kbaud, RX filter bandwidth 150 kHz, deviation 25 kHz + +Review of Derived Configurations +-------------------------------- + +Comparing 902_2GFSK_1p2K with 902_2GFSK_250K shows that SRFS does not +automatically provide the FOCFG, BSCFG, AGCCTL*, and other changes that are +present in the SimpliciTI recommended configurations. + +The further you get from SRFS_902_2GFSK_250K, the less likely it is that you +have a configuration that is optimal. + +However, the SRFS_TINYOSRF1A configuration does provide a detectable +improvement in RSSI in at least some cases. + diff --git a/tos/chips/msp430/rf1a/smartrf/RESET.h b/tos/chips/msp430/rf1a/smartrf/RESET.h new file mode 100755 index 0000000000..011a5fa4e8 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/RESET.h @@ -0,0 +1,74 @@ +/* Deviation = 47.607422 */ +/* Base frequency = 799.999878 */ +/* Carrier frequency = 799.999878 */ +/* Channel number = 0 */ +/* Carrier frequency = 799.999878 */ +/* Modulated = true */ +/* Modulation format = 2-FSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 16/16 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 799.999878 */ +/* Data rate = 115.051 */ +/* RX filter BW = 203.125000 */ +/* Data format = Normal mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = unknown */ + +/* PA table */ +#define PA_TABLE {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG1 0x2E +#define SMARTRF_SETTING_IOCFG0 0x2E +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_SYNC1 0xD3 +#define SMARTRF_SETTING_SYNC0 0x91 +#define SMARTRF_SETTING_PKTLEN 0xFF +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x45 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_FSCTRL1 0x0F +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x1E +#define SMARTRF_SETTING_FREQ1 0xC4 +#define SMARTRF_SETTING_FREQ0 0xEC +#define SMARTRF_SETTING_MDMCFG4 0x8C +#define SMARTRF_SETTING_MDMCFG3 0x22 +#define SMARTRF_SETTING_MDMCFG2 0x02 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_DEVIATN 0x47 +#define SMARTRF_SETTING_MCSM2 0x07 +#define SMARTRF_SETTING_MCSM1 0x30 +#define SMARTRF_SETTING_MCSM0 0x00 +#define SMARTRF_SETTING_FOCCFG 0x36 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_WOREVT1 0x80 +#define SMARTRF_SETTING_WOREVT0 0x00 +#define SMARTRF_SETTING_WORCTRL 0xF0 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_PTEST 0x7F +#define SMARTRF_SETTING_AGCTEST 0x3F +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x0B + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_2FSK_1p2K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_2FSK_1p2K_SENS.h new file mode 100755 index 0000000000..11ba754701 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_2FSK_1p2K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 58.035714 kHz */ +/* Deviation = 5 kHz */ +/* Datarate = 1.199484 kBaud */ +/* Modulation = (0) 2-FSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xF5 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x03 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_100K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_100K_CUR.h new file mode 100755 index 0000000000..2f7f168c4f --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_100K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 325.000000 kHz */ +/* Deviation = 48 kHz */ +/* Datarate = 99.975586 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x5B +#define SMARTRF_SETTING_MDMCFG3 0xF8 +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x47 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB2 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_100K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_100K_SENS.h new file mode 100755 index 0000000000..e9ee5556e2 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_100K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 325.000000 kHz */ +/* Deviation = 48 kHz */ +/* Datarate = 99.975586 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x5B +#define SMARTRF_SETTING_MDMCFG3 0xF8 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x47 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB2 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_10K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_10K_CUR.h new file mode 100755 index 0000000000..d3bc2b1027 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_10K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 101.562500 kHz */ +/* Deviation = 19 kHz */ +/* Datarate = 9.992599 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xC8 +#define SMARTRF_SETTING_MDMCFG3 0x93 +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x34 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_10K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_10K_SENS.h new file mode 100755 index 0000000000..28a6c25a84 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_10K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 101.562500 kHz */ +/* Deviation = 19 kHz */ +/* Datarate = 9.992599 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xC8 +#define SMARTRF_SETTING_MDMCFG3 0x93 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x34 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_175K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_175K_CUR.h new file mode 100755 index 0000000000..db60ace477 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_175K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 464.285714 kHz */ +/* Deviation = 95 kHz */ +/* Datarate = 174.957275 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x3C +#define SMARTRF_SETTING_MDMCFG3 0xB9 +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x57 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_175K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_175K_SENS.h new file mode 100755 index 0000000000..21f6aee72d --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_175K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 464.285714 kHz */ +/* Deviation = 95 kHz */ +/* Datarate = 174.957275 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x3C +#define SMARTRF_SETTING_MDMCFG3 0xB9 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x57 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_1p2K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_1p2K_CUR.h new file mode 100755 index 0000000000..3e310c4095 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_1p2K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 58.035714 kHz */ +/* Deviation = 5 kHz */ +/* Datarate = 1.199484 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xF5 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_1p2K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_1p2K_SENS.h new file mode 100755 index 0000000000..db1e5ce1d9 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_1p2K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 58.035714 kHz */ +/* Deviation = 5 kHz */ +/* Datarate = 1.199484 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xF5 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_250K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_250K_CUR.h new file mode 100755 index 0000000000..070b10357b --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_250K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 541.666667 kHz */ +/* Deviation = 127 kHz */ +/* Datarate = 249.938965 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = Current */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x2D +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x62 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_250K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_250K_SENS.h new file mode 100755 index 0000000000..34e42d4693 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_250K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 541.666667 kHz */ +/* Deviation = 127 kHz */ +/* Datarate = 249.938965 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = Sensitivity */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x2D +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x62 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_2p4K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_2p4K_CUR.h new file mode 100755 index 0000000000..8a72ba9f42 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_2p4K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 58.035714 kHz */ +/* Deviation = 5 kHz */ +/* Datarate = 2.398968 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xF6 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_2p4K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_2p4K_SENS.h new file mode 100755 index 0000000000..b35ee3045a --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_2p4K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 58.035714 kHz */ +/* Deviation = 5 kHz */ +/* Datarate = 2.398968 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xF6 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_38p4K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_38p4K_CUR.h new file mode 100755 index 0000000000..16aa3310eb --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_38p4K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 101.562500 kHz */ +/* Deviation = 19 kHz */ +/* Datarate = 38.383484 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xCA +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x34 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_38p4K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_38p4K_SENS.h new file mode 100755 index 0000000000..ba65b421c3 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_38p4K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 101.562500 kHz */ +/* Deviation = 19 kHz */ +/* Datarate = 38.383484 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xCA +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x34 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_4p8K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_4p8K_CUR.h new file mode 100755 index 0000000000..66c4891327 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_4p8K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 101.562500 kHz */ +/* Deviation = 25 kHz */ +/* Datarate = 4.797935 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xC7 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x40 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_4p8K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_4p8K_SENS.h new file mode 100755 index 0000000000..4c5d5afcdf --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_4p8K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 101.562500 kHz */ +/* Deviation = 25 kHz */ +/* Datarate = 4.797935 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xC7 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x40 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_76p8K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_76p8K_CUR.h new file mode 100755 index 0000000000..10cb6e8466 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_76p8K_CUR.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 232.142857 kHz */ +/* Deviation = 32 kHz */ +/* Datarate = 76.766968 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x0B +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x7B +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x42 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB2 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_76p8K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_76p8K_SENS.h new file mode 100755 index 0000000000..db64980937 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_GFSK_76p8K_SENS.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 232.142857 kHz */ +/* Deviation = 32 kHz */ +/* Datarate = 76.766968 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x7B +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x42 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB2 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_868_MSK_500K.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_MSK_500K.h new file mode 100755 index 0000000000..568c3e380e --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_868_MSK_500K.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 812.500000 kHz */ +/* Phase = 0 */ +/* Datarate = 499.877930 kBaud */ +/* Modulation = (7) MSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (4) 8 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x0E +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0x0E +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x73 +#define SMARTRF_SETTING_MDMCFG1 0x42 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x00 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_PRE802154G.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_PRE802154G.h new file mode 100755 index 0000000000..da93c5be16 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_PRE802154G.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 232.142857 kHz */ +/* Deviation = 25 kHz */ +/* Datarate = 49.987793 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 902.199921 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x22 +#define SMARTRF_SETTING_FREQ1 0xB3 +#define SMARTRF_SETTING_FREQ0 0x33 +#define SMARTRF_SETTING_MDMCFG4 0x7A +#define SMARTRF_SETTING_MDMCFG3 0xF8 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x40 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB2 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS6_RESET.h b/tos/chips/msp430/rf1a/smartrf/SRFS6_RESET.h new file mode 100755 index 0000000000..db1e5ce1d9 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS6_RESET.h @@ -0,0 +1,63 @@ +/* Chipcon */ +/* Product = CC430Fx13x */ +/* Chip version = A (HW Rev. 0x10) */ +/* Crystal accuracy = 10 ppm */ +/* X-tal frequency = 26 MHz */ +/* RF output power = 0 dBm */ +/* RX filterbandwidth = 58.035714 kHz */ +/* Deviation = 5 kHz */ +/* Datarate = 1.199484 kBaud */ +/* Modulation = (1) GFSK */ +/* Manchester enable = (0) Manchester disabled */ +/* RF Frequency = 868.299866 MHz */ +/* Channel spacing = 199.951172 kHz */ +/* Channel number = 0 */ +/* Optimization = - */ +/* Sync mode = (3) 30/32 sync word bits detected */ +/* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */ +/* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */ +/* Forward Error Correction = (0) FEC disabled */ +/* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */ +/* Packetlength = 255 */ +/* Preamble count = (2) 4 bytes */ +/* Append status = 1 */ +/* Address check = (0) No address check */ +/* FIFO autoflush = 0 */ +/* Device address = 0 */ +/* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */ +/* GDO2 signal selection = (41) CHIP_RDY */ +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x65 +#define SMARTRF_SETTING_FREQ0 0x6A +#define SMARTRF_SETTING_MDMCFG4 0xF5 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x18 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_IOCFG0D 0x06 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_779_MSK_250K.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_779_MSK_250K.h new file mode 100644 index 0000000000..86d7bd0e93 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_779_MSK_250K.h @@ -0,0 +1,64 @@ +/* Phase transition time = 98 */ +/* Base frequency = 779 */ +/* Carrier frequency = 779 */ +/* Channel number = 0 */ +/* Carrier frequency = 779 */ +/* Modulated = true */ +/* Modulation format = MSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 30/32 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 779 */ +/* Data rate = 249.939 */ +/* RX filter BW = 541.666667 */ +/* Data format = Normal mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 10 */ + +/* PA table */ +#define PA_TABLE {0xc3,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_IOCFG0 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x1D +#define SMARTRF_SETTING_FREQ1 0xF6 +#define SMARTRF_SETTING_FREQ0 0x27 +#define SMARTRF_SETTING_MDMCFG4 0x2D +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x73 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x62 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x0B +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_2FSK_1p2K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_2FSK_1p2K_SENS.h new file mode 100755 index 0000000000..3782965892 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_2FSK_1p2K_SENS.h @@ -0,0 +1,64 @@ +/* Deviation = 5.157471 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-FSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 1.19948 */ +/* RX filter BW = 58.035714 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0xF5 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x00 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_175K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_175K_CUR.h new file mode 100755 index 0000000000..19fa4616b8 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_175K_CUR.h @@ -0,0 +1,64 @@ +/* Deviation = 95.214844 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 174.957 */ +/* RX filter BW = 464.285714 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0x3C +#define SMARTRF_SETTING_MDMCFG3 0xB9 +#define SMARTRF_SETTING_MDMCFG2 0x90 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x57 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_175K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_175K_SENS.h new file mode 100755 index 0000000000..e1933814b7 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_175K_SENS.h @@ -0,0 +1,64 @@ +/* Deviation = 95.214844 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 174.957 */ +/* RX filter BW = 464.285714 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0x3C +#define SMARTRF_SETTING_MDMCFG3 0xB9 +#define SMARTRF_SETTING_MDMCFG2 0x10 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x57 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_1p2K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_1p2K_CUR.h new file mode 100755 index 0000000000..bf362dce91 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_1p2K_CUR.h @@ -0,0 +1,64 @@ +/* Deviation = 5.157471 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-FSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 1.19948 */ +/* RX filter BW = 58.035714 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0xF5 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x80 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_1p2K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_1p2K_SENS.h new file mode 100755 index 0000000000..9dc7054304 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_1p2K_SENS.h @@ -0,0 +1,64 @@ +/* Deviation = 5.157471 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 1.19948 */ +/* RX filter BW = 58.035714 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0xF5 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x10 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_250K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_250K_CUR.h new file mode 100755 index 0000000000..8ae9c1aed9 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_250K_CUR.h @@ -0,0 +1,64 @@ +/* Deviation = 126.953125 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 249.939 */ +/* RX filter BW = 541.666667 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0x2D +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x90 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x62 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_250K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_250K_SENS.h new file mode 100755 index 0000000000..468e5fa011 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_250K_SENS.h @@ -0,0 +1,64 @@ +/* Deviation = 126.953125 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 249.939 */ +/* RX filter BW = 541.666667 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0x2D +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x10 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x62 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_38p4K_CUR.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_38p4K_CUR.h new file mode 100755 index 0000000000..d690f07129 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_38p4K_CUR.h @@ -0,0 +1,64 @@ +/* Deviation = 20.629883 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-FSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 38.3835 */ +/* RX filter BW = 101.562500 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0xCA +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x80 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x35 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_38p4K_SENS.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_38p4K_SENS.h new file mode 100755 index 0000000000..8542a5eb20 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_868_GFSK_38p4K_SENS.h @@ -0,0 +1,64 @@ +/* Deviation = 20.629883 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = No preamble/sync */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 38.3835 */ +/* RX filter BW = 101.562500 */ +/* Data format = Synchronous serial mode */ +/* Length config = Infinite packet length mode */ +/* CRC enable = false */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_IOCFG0 0x2D +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0xCA +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x10 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x35 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x0B +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x12 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_902p2_GFSK_50K_135B.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_902p2_GFSK_50K_135B.h new file mode 100755 index 0000000000..3bb2c1a1d2 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_902p2_GFSK_50K_135B.h @@ -0,0 +1,64 @@ +/* Deviation = 25.390625 */ +/* Base frequency = 902.199921 */ +/* Carrier frequency = 902.199921 */ +/* Channel number = 0 */ +/* Carrier frequency = 902.199921 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 30/32 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 902.199921 */ +/* Data rate = 49.9878 */ +/* RX filter BW = 135.416667 */ +/* Data format = Normal mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_IOCFG0 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x22 +#define SMARTRF_SETTING_FREQ1 0xB3 +#define SMARTRF_SETTING_FREQ0 0x33 +#define SMARTRF_SETTING_MDMCFG4 0xAA +#define SMARTRF_SETTING_MDMCFG3 0xF8 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x40 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_902p2_GFSK_50K_163B.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_902p2_GFSK_50K_163B.h new file mode 100755 index 0000000000..a5a8e62c83 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_902p2_GFSK_50K_163B.h @@ -0,0 +1,64 @@ +/* Deviation = 25.390625 */ +/* Base frequency = 902.199921 */ +/* Carrier frequency = 902.199921 */ +/* Channel number = 0 */ +/* Carrier frequency = 902.199921 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 30/32 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 902.199921 */ +/* Data rate = 49.9878 */ +/* RX filter BW = 162.500000 */ +/* Data format = Normal mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x08 +#define SMARTRF_SETTING_IOCFG0 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x22 +#define SMARTRF_SETTING_FREQ1 0xB3 +#define SMARTRF_SETTING_FREQ0 0x33 +#define SMARTRF_SETTING_MDMCFG4 0x9A +#define SMARTRF_SETTING_MDMCFG3 0xF8 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x40 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0x43 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_RESET.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_RESET.h new file mode 100755 index 0000000000..f77d671b07 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_RESET.h @@ -0,0 +1,64 @@ +/* Deviation = 126.953125 */ +/* Base frequency = 901.999969 */ +/* Carrier frequency = 905.998993 */ +/* Channel number = 20 */ +/* Carrier frequency = 905.998993 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 16/16 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 905.998993 */ +/* Data rate = 249.939 */ +/* RX filter BW = 541.666667 */ +/* Data format = Synchronous serial mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_IOCFG0 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x22 +#define SMARTRF_SETTING_FREQ1 0xB1 +#define SMARTRF_SETTING_FREQ0 0x3B +#define SMARTRF_SETTING_MDMCFG4 0x2D +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x12 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x14 +#define SMARTRF_SETTING_DEVIATN 0x62 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x15 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_STI_902_GFSK_1p2K.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_STI_902_GFSK_1p2K.h new file mode 100755 index 0000000000..09f788c979 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_STI_902_GFSK_1p2K.h @@ -0,0 +1,64 @@ +/* Deviation = 5.157471 */ +/* Base frequency = 901.999969 */ +/* Carrier frequency = 905.998993 */ +/* Channel number = 20 */ +/* Carrier frequency = 905.998993 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 30/32 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 905.998993 */ +/* Data rate = 1.19948 */ +/* RX filter BW = 58.035714 */ +/* Data format = Normal mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_IOCFG0 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x22 +#define SMARTRF_SETTING_FREQ1 0xB1 +#define SMARTRF_SETTING_FREQ0 0x3B +#define SMARTRF_SETTING_MDMCFG4 0xF5 +#define SMARTRF_SETTING_MDMCFG3 0x83 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x14 +#define SMARTRF_SETTING_DEVIATN 0x15 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/SRFS7_STI_902_GFSK_250K.h b/tos/chips/msp430/rf1a/smartrf/SRFS7_STI_902_GFSK_250K.h new file mode 100755 index 0000000000..6d92698a99 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/SRFS7_STI_902_GFSK_250K.h @@ -0,0 +1,64 @@ +/* Deviation = 126.953125 */ +/* Base frequency = 901.999969 */ +/* Carrier frequency = 905.998993 */ +/* Channel number = 20 */ +/* Carrier frequency = 905.998993 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 30/32 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 905.998993 */ +/* Data rate = 249.939 */ +/* RX filter BW = 541.666667 */ +/* Data format = Normal mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_IOCFG0 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x22 +#define SMARTRF_SETTING_FREQ1 0xB1 +#define SMARTRF_SETTING_FREQ0 0x3B +#define SMARTRF_SETTING_MDMCFG4 0x2D +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x14 +#define SMARTRF_SETTING_DEVIATN 0x62 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF + diff --git a/tos/chips/msp430/rf1a/smartrf/TINYOSRF1A.h b/tos/chips/msp430/rf1a/smartrf/TINYOSRF1A.h new file mode 100755 index 0000000000..4ac4e446c6 --- /dev/null +++ b/tos/chips/msp430/rf1a/smartrf/TINYOSRF1A.h @@ -0,0 +1,74 @@ +/* Deviation = 19.042969 */ +/* Base frequency = 901.999969 */ +/* Carrier frequency = 903.999481 */ +/* Channel number = 10 */ +/* Carrier frequency = 903.999481 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 30/32 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 903.999481 */ +/* Data rate = 9.9926 */ +/* RX filter BW = 101.562500 */ +/* Data format = Normal mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = unknown */ + +/* PA table */ +#define PA_TABLE {0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_IOCFG2 0x2E +#define SMARTRF_SETTING_IOCFG1 0x2E +#define SMARTRF_SETTING_IOCFG0 0x29 +#define SMARTRF_SETTING_FIFOTHR 0x47 +#define SMARTRF_SETTING_SYNC1 0xD3 +#define SMARTRF_SETTING_SYNC0 0x91 +#define SMARTRF_SETTING_PKTLEN 0xFF +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x45 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_CHANNR 0x0A +#define SMARTRF_SETTING_FSCTRL1 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x22 +#define SMARTRF_SETTING_FREQ1 0xB1 +#define SMARTRF_SETTING_FREQ0 0x3B +#define SMARTRF_SETTING_MDMCFG4 0xC8 +#define SMARTRF_SETTING_MDMCFG3 0x93 +#define SMARTRF_SETTING_MDMCFG2 0x13 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_DEVIATN 0x34 +#define SMARTRF_SETTING_MCSM2 0x07 +#define SMARTRF_SETTING_MCSM1 0x3F +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x16 +#define SMARTRF_SETTING_BSCFG 0x6C +#define SMARTRF_SETTING_AGCCTRL2 0x03 +#define SMARTRF_SETTING_AGCCTRL1 0x40 +#define SMARTRF_SETTING_AGCCTRL0 0x91 +#define SMARTRF_SETTING_WOREVT1 0x80 +#define SMARTRF_SETTING_WOREVT0 0x00 +#define SMARTRF_SETTING_WORCTRL 0xF0 +#define SMARTRF_SETTING_FREND1 0x56 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_FSCAL3 0xE9 +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_PTEST 0x7F +#define SMARTRF_SETTING_AGCTEST 0x3F +#define SMARTRF_SETTING_TEST2 0x81 +#define SMARTRF_SETTING_TEST1 0x35 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Rf1aConfig.FromSmartRFStudio_h(sys.argv[2]) + +print 'Field: %s %s' % (dfn1, dfn2) +for fn in Rf1aConfig._Fields: + v1 = cfg1._getField(fn) + v2 = cfg2._getField(fn) + if v1 != v2: + print '%-15s: %02x %02x' % (fn.upper(), v1, v2) + diff --git a/tos/chips/msp430/rf1a/smartrf/srfs6-cfg/SRFS6_PRE802154G.srfsCC430Fx13x b/tos/chips/msp430/rf1a/smartrf/srfs6-cfg/SRFS6_PRE802154G.srfsCC430Fx13x new file mode 100755 index 0000000000000000000000000000000000000000..160de50cbf741a28b83a8c93642ac06cfb44ecc3 GIT binary patch literal 34732 zcmeI54}8~Ez5mbmyMY5iCk&Z3V93&ys3T|2Ae(|QYv~Bk2}_q!k`YpT_uW#|KIgp8IiJsGU*;HN<_HE0a`tw%DpUGM@ptZ3ny{qUR?T_EpC`RNH>f+T zF&7s{RouR|F6J;_DvtQ3a9;TZOXpF?ssP=ghaP~vH-&lAgbmjr`lz5Sg!k4L+Mr?TVHPes$-l_ydA$(_#C(EiGb-M>m-~5qUo77YGgoX{_ksD;B?}A>a4@ zuIQNWj*71oe$4IT;)OrTUH`Utke?+ya_B2M7E@9Bnb~bJmPRA+9h42j0)g1DBEKtY z_HL>M6_dimWOuX!YYClGhAs8gU*U%3U3>6$FI9`w`I6?3M!I=X1rV6$T zmJ1l$bin|DPsk*V6?{%`o!~~nzX*m4P7xdsTqwYX0s;LWCCCx{T0r`-;10nT1<*e( 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+ * End: + */ diff --git a/tos/chips/msp430/rf1a/system/Ieee154AMAddressP.nc b/tos/chips/msp430/rf1a/system/Ieee154AMAddressP.nc new file mode 100644 index 0000000000..8cf32007a3 --- /dev/null +++ b/tos/chips/msp430/rf1a/system/Ieee154AMAddressP.nc @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Implement the ActiveMessageAddress interface on top of an IEEE + * 802.15.4 address configuration. + * + * @author Peter A. Bigot + */ + +module Ieee154AMAddressP { + provides { + interface ActiveMessageAddress; + } + uses { + interface Ieee154Address; + } +} implementation { + +#include "AM.h" + + async command void ActiveMessageAddress.setAddress (am_group_t group, am_addr_t addr) { + call Ieee154Address.setAddress((ieee154_panid_t)group, + (ieee154_saddr_t) addr); + } + + async command am_addr_t ActiveMessageAddress.amAddress () { + return (am_addr_t) call Ieee154Address.shortAddress(); + } + + async command am_group_t ActiveMessageAddress.amGroup () { + return (am_group_t) call Ieee154Address.panId(); + } + + async event void Ieee154Address.changed () { signal ActiveMessageAddress.changed(); } + + default async event void ActiveMessageAddress.changed () { } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/system/Ieee154AddressC.nc b/tos/chips/msp430/rf1a/system/Ieee154AddressC.nc new file mode 100644 index 0000000000..18f443314f --- /dev/null +++ b/tos/chips/msp430/rf1a/system/Ieee154AddressC.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Like ActiveMessageAddressC, but for 802.15.4-based stacks. + * + * @author Peter A. Bigot + */ + +configuration Ieee154AddressC { + provides interface Ieee154Address; +} implementation { + components Ieee154AddressP; + Ieee154Address = Ieee154AddressP; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/chips/msp430/rf1a/system/Ieee154AddressP.nc b/tos/chips/msp430/rf1a/system/Ieee154AddressP.nc new file mode 100644 index 0000000000..0d4ad13f8c --- /dev/null +++ b/tos/chips/msp430/rf1a/system/Ieee154AddressP.nc @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Like ActiveMessageAddressP, but for 802.15.4-based stacks. + * + * @author Peter A. Bigot + */ + +module Ieee154AddressP { + provides interface Ieee154Address; +} implementation { + + /** IEEE 802.15.4 2-octet short address for this node */ + ieee154_saddr_t short_address = TOS_IEEE154_SHORT_ADDRESS; + + /** IEEE 802.15.4 2-octet PAN ID for this node */ + ieee154_panid_t pan_id = TOS_IEEE154_PAN_ID; + + async command void Ieee154Address.setAddress (ieee154_panid_t panid, ieee154_saddr_t addr) { + atomic { + pan_id = panid; + short_address = addr; + } + signal Ieee154Address.changed(); + } + + async command ieee154_saddr_t Ieee154Address.shortAddress () { atomic return short_address; } + + async command ieee154_panid_t Ieee154Address.panId () { atomic return pan_id; } + + default async event void Ieee154Address.changed () { } +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/lib/net/blip/platform/Rf1aReadLqiC.nc b/tos/lib/net/blip/platform/Rf1aReadLqiC.nc new file mode 100644 index 0000000000..814e2b5db7 --- /dev/null +++ b/tos/lib/net/blip/platform/Rf1aReadLqiC.nc @@ -0,0 +1,15 @@ +/* What the hell is this supposed to do? */ +uint16_t adjustLQI(uint8_t val) { + uint16_t result = (80 - (val - 50)); + result = (((result * result) >> 3) * result) >> 3; // result = (result ^ 3) / 64 + return result; +} + +module Rf1aReadLqiC { + provides interface ReadLqi; + uses interface Rf1aPacket; +} implementation { + command uint8_t ReadLqi.read(message_t *msg) { + return call Rf1aPacket.getLqi(msg); + } +} From ad36c36580bfad0d1366ab5300ae1259567f9b80 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 13 Jun 2011 17:36:11 -0700 Subject: [PATCH 097/411] minor clean up, tos/chips/memory. no code changes. --- tos/chips/memory/Memory.nc | 14 ++++++-------- tos/chips/memory/norflash/ExternalMemoryC.nc | 2 -- tos/chips/memory/norflash/MemoryImplementationC.nc | 2 -- tos/chips/memory/norflash/NorFlashMasterP.nc | 8 ++++---- .../memory/norflash/m25p10/memoryproperties.h | 1 + .../memory/norflash/m25p80/memoryproperties.h | 1 + 6 files changed, 12 insertions(+), 16 deletions(-) diff --git a/tos/chips/memory/Memory.nc b/tos/chips/memory/Memory.nc index 37cfa51fac..aec74006be 100644 --- a/tos/chips/memory/Memory.nc +++ b/tos/chips/memory/Memory.nc @@ -72,7 +72,7 @@ */ interface Memory { - + /** * Read bytes from memory * @param addr - the address to read from @@ -80,7 +80,7 @@ interface Memory { * @param len - the amount to read */ command void read(uint32_t addr, void *buf, uint32_t len); - + /** * Write bytes to memory * @param addr - the address to write to @@ -88,25 +88,25 @@ interface Memory { * @param len - the amount to write */ command void write(uint32_t addr, void *buf, uint32_t len); - + /** * Erase a single erase unit * The first block index is 0, the second is 1, etc. * @param eraseUnitIndex the erase unit to erase, 0-indexed */ command void eraseBlock(uint16_t eraseUnitIndex); - + /** * Erase the entire flash. Whether the chip was erased or not depends on if * there were any protected blocks or sectors. */ command void eraseChip(); - + /** * Flush written data to memory. This only applies to some memory chips. */ command void flush(); - + /** * Obtain the CRC of some data sitting in memory * @param addr - the address to start the CRC computation @@ -115,6 +115,4 @@ interface Memory { * @return the computed CRC-16 */ command uint16_t crc(uint32_t addr, uint32_t len, uint16_t baseCrc); - } - diff --git a/tos/chips/memory/norflash/ExternalMemoryC.nc b/tos/chips/memory/norflash/ExternalMemoryC.nc index edb5a42b38..abc5249d7b 100644 --- a/tos/chips/memory/norflash/ExternalMemoryC.nc +++ b/tos/chips/memory/norflash/ExternalMemoryC.nc @@ -67,9 +67,7 @@ configuration ExternalMemoryC { interface Memory; } } - implementation { - components MemoryImplementationC; Resource = MemoryImplementationC; Memory = MemoryImplementationC; diff --git a/tos/chips/memory/norflash/MemoryImplementationC.nc b/tos/chips/memory/norflash/MemoryImplementationC.nc index e2f50c2fb1..55957756da 100644 --- a/tos/chips/memory/norflash/MemoryImplementationC.nc +++ b/tos/chips/memory/norflash/MemoryImplementationC.nc @@ -49,9 +49,7 @@ configuration MemoryImplementationC { interface Memory; } } - implementation { - components NorFlashMasterC; Resource = NorFlashMasterC; Memory = NorFlashMasterC; diff --git a/tos/chips/memory/norflash/NorFlashMasterP.nc b/tos/chips/memory/norflash/NorFlashMasterP.nc index 43150958c0..c2c513a80e 100644 --- a/tos/chips/memory/norflash/NorFlashMasterP.nc +++ b/tos/chips/memory/norflash/NorFlashMasterP.nc @@ -32,14 +32,14 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * @author David Moss */ #include "flashcommands.h" #include "platformflash.h" -/** - * @author David Moss - */ module NorFlashMasterP { provides { interface Memory; @@ -140,7 +140,7 @@ implementation { call NorFlashCommands.sleep(); return baseCrc; } - + /***************** NorFlashCommands ****************/ /** * Start a new command to the flash chip. Pay close attention to the diff --git a/tos/chips/memory/norflash/m25p10/memoryproperties.h b/tos/chips/memory/norflash/m25p10/memoryproperties.h index dffaf6ba9c..e2c7dec765 100644 --- a/tos/chips/memory/norflash/m25p10/memoryproperties.h +++ b/tos/chips/memory/norflash/m25p10/memoryproperties.h @@ -61,6 +61,7 @@ /** * Memory properties */ + enum { MEMORY_NUM_ERASEUNITS = 4, MEMORY_ERASEUNIT_SIZE_LOG2 = 15, // In other words, 1000000000000000'b = 0x8000 = 32kB diff --git a/tos/chips/memory/norflash/m25p80/memoryproperties.h b/tos/chips/memory/norflash/m25p80/memoryproperties.h index 131be3d661..0b0126c5ac 100644 --- a/tos/chips/memory/norflash/m25p80/memoryproperties.h +++ b/tos/chips/memory/norflash/m25p80/memoryproperties.h @@ -60,6 +60,7 @@ /** * Memory properties */ + enum { MEMORY_NUM_ERASEUNITS = 16, MEMORY_ERASEUNIT_SIZE_LOG2 = 16, // In other words, 10000000000000000'b = 0x10000 = 64kB From c571a3ac6d49c918af8bb7a6b9a51db79edebb0b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 13 Jun 2011 20:48:03 -0700 Subject: [PATCH 098/411] bring in from OSIAN (with clean up) crc16, flash, onewire, pmm, rtc, and wdt --- tos/chips/msp430/crc16/Crc16C.nc | 50 +++++ tos/chips/msp430/crc16/CrcX.nc | 4 + tos/chips/msp430/crc16/Msp430Crc16C.nc | 47 ++++ tos/chips/msp430/crc16/Msp430Crc16P.nc | 63 ++++++ tos/chips/msp430/flash/constants/Constants.h | 47 ++++ tos/chips/msp430/flash/constants/Constants.nc | 58 +++++ .../msp430/flash/constants/ConstantsC.nc | 57 +++++ .../msp430/flash/constants/ConstantsP.nc | 59 +++++ tos/chips/msp430/flash/driver/Msp430Flash.h | 63 ++++++ tos/chips/msp430/flash/driver/Msp430Flash.nc | 52 +++++ tos/chips/msp430/flash/driver/Msp430FlashC.nc | 60 +++++ .../msp430/flash/driver/Msp430FlashModify.nc | 42 ++++ .../msp430/flash/driver/Msp430FlashModifyC.nc | 52 +++++ .../msp430/flash/driver/Msp430FlashModifyP.nc | 110 +++++++++ tos/chips/msp430/flash/driver/Msp430FlashP.nc | 126 +++++++++++ tos/chips/msp430/flash/settings/README.txt | 20 ++ tos/chips/msp430/flash/settings/Settings.h | 53 +++++ tos/chips/msp430/flash/settings/Settings.nc | 130 +++++++++++ tos/chips/msp430/flash/settings/SettingsC.nc | 80 +++++++ .../msp430/flash/settings/SettingsImplC.nc | 64 ++++++ tos/chips/msp430/flash/settings/SettingsP.nc | 208 ++++++++++++++++++ .../msp430/flash/settings/SystemSettingsC.nc | 54 +++++ tos/chips/msp430/onewire/OneWire.h | 57 +++++ tos/chips/msp430/onewire/OneWire.nc | 51 +++++ tos/chips/msp430/onewire/OneWireC.nc | 57 +++++ tos/chips/msp430/onewire/OneWireCrc.nc | 46 ++++ tos/chips/msp430/onewire/OneWireCrcC.nc | 44 ++++ tos/chips/msp430/onewire/OneWireCrcP.nc | 80 +++++++ tos/chips/msp430/onewire/OneWireMaster.nc | 82 +++++++ tos/chips/msp430/onewire/OneWireMasterC.nc | 57 +++++ tos/chips/msp430/onewire/OneWireMasterP.nc | 168 ++++++++++++++ .../ds1825/Ds1825OneWireImplementationC.nc | 69 ++++++ .../ds1825/Ds1825OneWireImplementationP.nc | 177 +++++++++++++++ tos/chips/msp430/pmm/Msp430Pmm.h | 33 +++ tos/chips/msp430/pmm/Msp430PmmC.nc | 40 +++- tos/chips/msp430/pmm/Msp430PmmP.nc | 53 ++++- tos/chips/msp430/pmm/Pmm.nc | 34 ++- tos/chips/msp430/rtc/Rtc.h | 36 ++- tos/chips/msp430/rtc/RtcAlarm.nc | 1 + tos/chips/msp430/rtc/RtcP.nc | 1 + tos/chips/msp430/wdt/Wdt.nc | 39 ++++ tos/chips/msp430/wdt/WdtC.nc | 48 ++++ tos/chips/msp430/wdt/WdtP.nc | 84 +++++++ 43 files changed, 2745 insertions(+), 11 deletions(-) create mode 100644 tos/chips/msp430/crc16/Crc16C.nc create mode 100644 tos/chips/msp430/crc16/CrcX.nc create mode 100644 tos/chips/msp430/crc16/Msp430Crc16C.nc create mode 100644 tos/chips/msp430/crc16/Msp430Crc16P.nc create mode 100644 tos/chips/msp430/flash/constants/Constants.h create mode 100644 tos/chips/msp430/flash/constants/Constants.nc create mode 100644 tos/chips/msp430/flash/constants/ConstantsC.nc create mode 100644 tos/chips/msp430/flash/constants/ConstantsP.nc create mode 100644 tos/chips/msp430/flash/driver/Msp430Flash.h create mode 100644 tos/chips/msp430/flash/driver/Msp430Flash.nc create mode 100644 tos/chips/msp430/flash/driver/Msp430FlashC.nc create mode 100644 tos/chips/msp430/flash/driver/Msp430FlashModify.nc create mode 100644 tos/chips/msp430/flash/driver/Msp430FlashModifyC.nc create mode 100644 tos/chips/msp430/flash/driver/Msp430FlashModifyP.nc create mode 100644 tos/chips/msp430/flash/driver/Msp430FlashP.nc create mode 100644 tos/chips/msp430/flash/settings/README.txt create mode 100644 tos/chips/msp430/flash/settings/Settings.h create mode 100644 tos/chips/msp430/flash/settings/Settings.nc create mode 100644 tos/chips/msp430/flash/settings/SettingsC.nc create mode 100644 tos/chips/msp430/flash/settings/SettingsImplC.nc create mode 100644 tos/chips/msp430/flash/settings/SettingsP.nc create mode 100644 tos/chips/msp430/flash/settings/SystemSettingsC.nc create mode 100644 tos/chips/msp430/onewire/OneWire.h create mode 100644 tos/chips/msp430/onewire/OneWire.nc create mode 100644 tos/chips/msp430/onewire/OneWireC.nc create mode 100644 tos/chips/msp430/onewire/OneWireCrc.nc create mode 100644 tos/chips/msp430/onewire/OneWireCrcC.nc create mode 100644 tos/chips/msp430/onewire/OneWireCrcP.nc create mode 100644 tos/chips/msp430/onewire/OneWireMaster.nc create mode 100644 tos/chips/msp430/onewire/OneWireMasterC.nc create mode 100644 tos/chips/msp430/onewire/OneWireMasterP.nc create mode 100644 tos/chips/msp430/onewire/ds1825/Ds1825OneWireImplementationC.nc create mode 100644 tos/chips/msp430/onewire/ds1825/Ds1825OneWireImplementationP.nc create mode 100644 tos/chips/msp430/wdt/Wdt.nc create mode 100644 tos/chips/msp430/wdt/WdtC.nc create mode 100644 tos/chips/msp430/wdt/WdtP.nc diff --git a/tos/chips/msp430/crc16/Crc16C.nc b/tos/chips/msp430/crc16/Crc16C.nc new file mode 100644 index 0000000000..027f5f13b3 --- /dev/null +++ b/tos/chips/msp430/crc16/Crc16C.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Configuration to override the default software Crc16C software implementation + * and use the microcontroller's built in CRC engine. + * + * @author David Moss + */ + +configuration Crc16C { + provides interface CrcX; +} +implementation { + components Msp430Crc16C; + CrcX = Msp430Crc16C; +} diff --git a/tos/chips/msp430/crc16/CrcX.nc b/tos/chips/msp430/crc16/CrcX.nc new file mode 100644 index 0000000000..9f188b7dbc --- /dev/null +++ b/tos/chips/msp430/crc16/CrcX.nc @@ -0,0 +1,4 @@ +interface CrcX { + async command t crc(void* buf, uint8_t len); + async command t seededCrc(t startCrc, void *buf, uint8_t len); +} diff --git a/tos/chips/msp430/crc16/Msp430Crc16C.nc b/tos/chips/msp430/crc16/Msp430Crc16C.nc new file mode 100644 index 0000000000..e9643a0707 --- /dev/null +++ b/tos/chips/msp430/crc16/Msp430Crc16C.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +configuration Msp430Crc16C { + provides interface CrcX; +} +implementation { + components Msp430Crc16P; + CrcX = Msp430Crc16P; +} diff --git a/tos/chips/msp430/crc16/Msp430Crc16P.nc b/tos/chips/msp430/crc16/Msp430Crc16P.nc new file mode 100644 index 0000000000..3f85a08f49 --- /dev/null +++ b/tos/chips/msp430/crc16/Msp430Crc16P.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +module Msp430Crc16P { + provides interface CrcX; +} +implementation { + + /***************** CrcX Commands ****************/ + async command uint16_t CrcX.crc(void* buf, uint8_t len) { + return call CrcX.seededCrc(0, buf, len); + } + + async command uint16_t CrcX.seededCrc(uint16_t startCrc, void *buf, uint8_t len) { + uint8_t *data = (uint8_t *) buf; + + atomic { + CRCINIRES = startCrc; + while(data < (((uint8_t *) buf) + len)) { + CRCDI = *data; + data++; + } + return CRCINIRES; + } + } +} diff --git a/tos/chips/msp430/flash/constants/Constants.h b/tos/chips/msp430/flash/constants/Constants.h new file mode 100644 index 0000000000..d1fb566da0 --- /dev/null +++ b/tos/chips/msp430/flash/constants/Constants.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef CONSTANTS_H +#define CONSTANTS_H + +#include "Msp430Flash.h" + +enum { + /** Lowest address of the INFO A memory */ + INFOA_OFFSET = (FLASH_SEGMENT_SIZE * 3), +}; + +#endif diff --git a/tos/chips/msp430/flash/constants/Constants.nc b/tos/chips/msp430/flash/constants/Constants.nc new file mode 100644 index 0000000000..50d7a7617a --- /dev/null +++ b/tos/chips/msp430/flash/constants/Constants.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +interface Constants { + + /** + * Set the constants in flash. If multiple constants need to be stored, + * you must place them in a structure and pass the address and length of that + * structure. + * @param values The values to store in non-volatile memory + * @param length The length of the values + */ + command error_t set(const void *values, uint8_t length); + + /** + * @return a pointer to the beginning of the non-volatile memory, which + * must be interpreted as the same type of variable or structure that + * was originally stored with the set(..) command + */ + command void *get(); +} diff --git a/tos/chips/msp430/flash/constants/ConstantsC.nc b/tos/chips/msp430/flash/constants/ConstantsC.nc new file mode 100644 index 0000000000..f13f181c05 --- /dev/null +++ b/tos/chips/msp430/flash/constants/ConstantsC.nc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Constants are stored in Segment A of the user memory, which can persist + * across reprograms if the boot strap loader is configured to + * avoid erasing the entire user memory. + * + * Constants must be written and interpreted as one structure, possibly + * containing multiple values. + * + * @author David Moss + */ + +configuration ConstantsC { + provides interface Constants; +} +implementation { + components ConstantsP; + Constants = ConstantsP; + + components Msp430FlashC; + ConstantsP.Msp430Flash -> Msp430FlashC; +} diff --git a/tos/chips/msp430/flash/constants/ConstantsP.nc b/tos/chips/msp430/flash/constants/ConstantsP.nc new file mode 100644 index 0000000000..1ea4818053 --- /dev/null +++ b/tos/chips/msp430/flash/constants/ConstantsP.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +#include "Constants.h" +#include "Msp430Flash.h" + +module ConstantsP { + provides interface Constants; + uses interface Msp430Flash; +} +implementation { + + /***************** Constants Commands ****************/ + command error_t Constants.set(const void *values, uint8_t length) { + call Msp430Flash.erase(INFOA_OFFSET); + return call Msp430Flash.write(INFOA_OFFSET, values, length); + } + + command void *Constants.get() { + return (void *) (FLASH_OFFSET + INFOA_OFFSET); + } +} diff --git a/tos/chips/msp430/flash/driver/Msp430Flash.h b/tos/chips/msp430/flash/driver/Msp430Flash.h new file mode 100644 index 0000000000..0e9f9493f2 --- /dev/null +++ b/tos/chips/msp430/flash/driver/Msp430Flash.h @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef MSP430FLASH_H +#define MSP430FLASH_H + +enum { + /** Highest offset of the writable half of information memory, minus 1 for version */ + FLASH_BOUND_HIGH = 0x7F, + + /** Lowest address of the information memory */ + FLASH_OFFSET = 0x1800, + + /** Size of an individual flash segment */ + FLASH_SEGMENT_SIZE = 128, + + /** Total size of the INFO flash */ + FLASH_TOTAL_SIZE = 512, + + /** Invalid version number */ + FLASH_FILL_BYTE = 0xFF, + + /** Exact address of the version number for the first segment/block */ + FLASH_VNUM_ADDR_0 = 0x187F, + + /** Exact address of the versoin number for the second segment/block */ + FLASH_VNUM_ADDR_1 = FLASH_VNUM_ADDR_0 + FLASH_SEGMENT_SIZE, +}; + +#endif diff --git a/tos/chips/msp430/flash/driver/Msp430Flash.nc b/tos/chips/msp430/flash/driver/Msp430Flash.nc new file mode 100644 index 0000000000..8d08737e81 --- /dev/null +++ b/tos/chips/msp430/flash/driver/Msp430Flash.nc @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +interface Msp430Flash { + command error_t read(uint16_t addr, void *buf, uint8_t len); + command error_t write(uint16_t addr, const void *buf, uint8_t len); + command error_t erase(uint16_t addr); + + /** + * @return TRUE if this is the first boot up of this device without + * having any modification performed to the user flash via + * Msp430FlashModify / Settings interfaces. + */ + command bool isFirstBoot(); +} diff --git a/tos/chips/msp430/flash/driver/Msp430FlashC.nc b/tos/chips/msp430/flash/driver/Msp430FlashC.nc new file mode 100644 index 0000000000..88fe5eaef5 --- /dev/null +++ b/tos/chips/msp430/flash/driver/Msp430FlashC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Modify bytes on flash with the ability to cleanly overwrite + * bytes that have already been written + * + * Users should use the StorageBridge to know when the flash is + * ready to be written. + * + * Connect your app to the parameterized interface using unique("StorageModify") + * + * @author David Moss + */ + +configuration Msp430FlashC { + provides interface Msp430Flash; +} +implementation { + + components Msp430FlashP; + Msp430Flash = Msp430FlashP; + + components WdtC; + Msp430FlashP.Wdt -> WdtC; + + components PlatformC; + PlatformC.PeripheralInit -> Msp430FlashP; +} diff --git a/tos/chips/msp430/flash/driver/Msp430FlashModify.nc b/tos/chips/msp430/flash/driver/Msp430FlashModify.nc new file mode 100644 index 0000000000..9799b1c29a --- /dev/null +++ b/tos/chips/msp430/flash/driver/Msp430FlashModify.nc @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +interface Msp430FlashModify { + command error_t modify(uint16_t addr, const void *buf, uint8_t len); + command error_t read(uint16_t addr, void *buf, uint8_t len); +} diff --git a/tos/chips/msp430/flash/driver/Msp430FlashModifyC.nc b/tos/chips/msp430/flash/driver/Msp430FlashModifyC.nc new file mode 100644 index 0000000000..d0b67ca443 --- /dev/null +++ b/tos/chips/msp430/flash/driver/Msp430FlashModifyC.nc @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Make NOR-flash appear modifiable like EEPROM by swapping two segments. + * This uses INFOD and INFOC segments. + * + * @author David Moss + */ + +configuration Msp430FlashModifyC { + provides interface Msp430FlashModify; +} +implementation { + + components Msp430FlashModifyP; + Msp430FlashModify = Msp430FlashModifyP; + + components Msp430FlashC; + Msp430FlashModifyP.Msp430Flash -> Msp430FlashC; +} diff --git a/tos/chips/msp430/flash/driver/Msp430FlashModifyP.nc b/tos/chips/msp430/flash/driver/Msp430FlashModifyP.nc new file mode 100644 index 0000000000..8f0ac34add --- /dev/null +++ b/tos/chips/msp430/flash/driver/Msp430FlashModifyP.nc @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Msp430Flash.h" + +/** + * @author David Moss + * @author Jonathan Hui + */ + +module Msp430FlashModifyP { + provides interface Msp430FlashModify; + uses interface Msp430Flash; +} +implementation { + + /***************** Prototypes ****************/ + uint8_t chooseSegment(); + + /***************** Msp430FlashModify Commands ****************/ + command error_t Msp430FlashModify.read(uint16_t addr, void *buf, uint8_t len) { + if (chooseSegment()) { + addr += FLASH_SEGMENT_SIZE; + } + return call Msp430Flash.read(addr, buf, len); + } + + command error_t Msp430FlashModify.modify(uint16_t addr, const void *buf, uint8_t len) { + uint16_t newWriteAddr = 0x0; + uint16_t offset = 0x0; + uint8_t *oldBuffer_ptr = (uint8_t *) FLASH_OFFSET; + uint8_t version; + + if (addr + len > FLASH_BOUND_HIGH) { + return FAIL; + } + + if (chooseSegment()) { + oldBuffer_ptr += FLASH_SEGMENT_SIZE; + version = *(uint8_t *) FLASH_VNUM_ADDR_1; + } else { + newWriteAddr += FLASH_SEGMENT_SIZE; + version = *(uint8_t *) FLASH_VNUM_ADDR_0; + } + + atomic { + call Msp430Flash.erase(newWriteAddr); + + call Msp430Flash.write(newWriteAddr, oldBuffer_ptr, addr); + offset += addr; + call Msp430Flash.write(newWriteAddr + offset, buf, len); + offset += len; + // Subtract 1 at the end to leave room for the version byte + call Msp430Flash.write(newWriteAddr + offset, oldBuffer_ptr + offset, FLASH_SEGMENT_SIZE - offset - 1); + + version++; + if (version == FLASH_FILL_BYTE) { + version = 0; + } + + call Msp430Flash.write(newWriteAddr + FLASH_SEGMENT_SIZE - 1, &version, 1); + } + return SUCCESS; + } + + /***************** Functions ****************/ + uint8_t chooseSegment() { + uint8_t vnum0 = *(uint8_t *) FLASH_VNUM_ADDR_0; + uint8_t vnum1 = *(uint8_t *) FLASH_VNUM_ADDR_1; + + if ((vnum0 == FLASH_FILL_BYTE) || (vnum1 == 0 && vnum0 == 0xFE)) { + return 1; + } else if ((vnum1 == FLASH_FILL_BYTE) || (vnum0 == 0 && vnum1 == 0xFE)) { + return 0; + } else { + return (vnum0 < vnum1); + } + } +} diff --git a/tos/chips/msp430/flash/driver/Msp430FlashP.nc b/tos/chips/msp430/flash/driver/Msp430FlashP.nc new file mode 100644 index 0000000000..6ca17c0a44 --- /dev/null +++ b/tos/chips/msp430/flash/driver/Msp430FlashP.nc @@ -0,0 +1,126 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Msp430 User Flash + * @author Jonathan Hui + * @author David Moss + */ + +#include "Msp430Flash.h" + +module Msp430FlashP { + provides { + interface Msp430Flash; + interface Init; + } + uses interface Wdt; +} +implementation { + + /** TRUE if the device booted without previous modifications to user flash */ + bool notFirstBoot; + + /***************** Init Commands ****************/ + command error_t Init.init() { + // Establish the notFirstBoot variable + call Msp430Flash.isFirstBoot(); + return SUCCESS; + } + + /***************** Msp430Flash Commands ****************/ + command error_t Msp430Flash.erase(uint16_t addr) { + uint8_t *eraseAddr; + + if (addr > FLASH_TOTAL_SIZE) { + return FAIL; + } + + eraseAddr = (uint8_t *) (addr + FLASH_OFFSET); + + call Wdt.pause(); + FCTL3 = FWKEY + LOCKA; // Clear LOCK and LOCKA + FCTL1 = FWKEY + ERASE; // Enable segment erase + *eraseAddr = 0; // Dummy write, erase the selected segment + while(FCTL3 & BUSY); // Wait for erase to finish + FCTL1 = FWKEY; // Disable writes / erases + FCTL3 = FWKEY + LOCK + LOCKA; // Set LOCK and LOCKA + call Wdt.resume(); + return SUCCESS; + } + + command error_t Msp430Flash.write(uint16_t addr, const void *buf, uint8_t len) { + uint8_t *writeAddr; + + if (addr + len > FLASH_TOTAL_SIZE) { + return FAIL; + } + + writeAddr = (uint8_t *) (addr + FLASH_OFFSET); + + call Wdt.pause(); + FCTL3 = FWKEY + LOCKA; // Clear LOCK and LOCKA + FCTL1 = FWKEY + WRT; // Enable write + memcpy(writeAddr, buf, len); // Write + while(FCTL3 & BUSY); // Wait for write to finish + FCTL1 = FWKEY; // Disable writes / erases + FCTL3 = FWKEY + LOCK + LOCKA; // Set LOCK and LOCKA + call Wdt.resume(); + return SUCCESS; + } + + command error_t Msp430Flash.read(uint16_t addr, void *buf, uint8_t len) { + uint16_t *address; + + if (addr + len > FLASH_TOTAL_SIZE) { + return FAIL; + } + + address = (uint16_t *) (addr + FLASH_OFFSET); + memcpy(buf, address, len); + return SUCCESS; + } + + command bool Msp430Flash.isFirstBoot() { + uint8_t *i; + + // Check segments b, c, d for written bytes + for(i = (uint8_t *) FLASH_OFFSET; i < (uint8_t *) (FLASH_OFFSET + (FLASH_SEGMENT_SIZE * 3)); i++) { + notFirstBoot |= (*i != FLASH_FILL_BYTE); + } + return !notFirstBoot; + } +} diff --git a/tos/chips/msp430/flash/settings/README.txt b/tos/chips/msp430/flash/settings/README.txt new file mode 100644 index 0000000000..5f2809b3c8 --- /dev/null +++ b/tos/chips/msp430/flash/settings/README.txt @@ -0,0 +1,20 @@ +This library uses the flash driver on the MSP430 to store +configuration data. Essentially, it lets you take your variables +scattered throughout your program that are normally kept in RAM, +and make them non-volatile. + +On Init, it will send out a request to all users to log in. +At that time, the user SHOULD call back with a login command, +passing in the address of the data in RAM you want to keep mirrored +on non-volatile memory, and the size of that data in RAM. It can +be something as small as a byte, or as big as a struct. + +Each component can store its variables with the store() command, +or load the variables with the load() command. After login on boot, +each component's RAM is automatically refreshed with the last stored() +values before the reboot occurred. + +load() will return SUCCESS if the data loaded and its CRC was good and +your variable in RAM will be automatically updated with the value +from non-volatile memory. + diff --git a/tos/chips/msp430/flash/settings/Settings.h b/tos/chips/msp430/flash/settings/Settings.h new file mode 100644 index 0000000000..fc49554061 --- /dev/null +++ b/tos/chips/msp430/flash/settings/Settings.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +#ifndef SETTINGS_H +#define SETTINGS_H + +#define UQ_MSP430_SETTINGS "Msp430.Settings" + +enum { + /** Settings client reserved for system */ + SETTINGS_CLIENT_SystemSettings = 0, + /** Offset added to client-specific unique value to get client identifier */ + SETTINGS_CLIENT_BASE +}; + +#endif diff --git a/tos/chips/msp430/flash/settings/Settings.nc b/tos/chips/msp430/flash/settings/Settings.nc new file mode 100644 index 0000000000..dfcce20a65 --- /dev/null +++ b/tos/chips/msp430/flash/settings/Settings.nc @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Manage storing and retrieving configuration settings + * for various components, mainly to non-volatile internal microcontroller + * memory. + * + * On install, the internal flash should be erased automatically on + * both the avr and msp430 platforms, so you shouldn't have to worry + * about loading incorrect config data left over from a different + * version of the application. + * + * On boot, each unique parameterized Settings interface will + * be called with an event to requestLogin(). The component + * using the Settings interface must call the command login(..) + * at that point to register its global buffers that store configuration data. + * After all components have logged in, the loaded() event will be automatically + * signaled for each client, with their loaded data. + * + * Each request will be queued up and handled, so several components can call + * store() and load() simultaneously. The only rule is that the a single + * component cannot store() and load() at the same time. + * + * + * Storing data will first calcute and store the CRC of the data to flash, + * then store the actual data to flash. Each client will take up the + * size they register with plus 2 bytes extra for the CRC. + * + * Loading data will first load the CRC from flash, then load the + * data from flash into the registered client's pointer. If + * the CRC's don't match, then the loaded() event will signal with + * valid == FALSE and error == SUCCESS. You can then fill + * in the registered buffer with default data and call store(). + * + * @author David Moss + */ + +interface Settings { + + /** + * This command must be called during the requestLogin() + * event. + * + * If registering this client causes the amount of config data to exceed + * the size of the flash, this command will return ESIZE and + * the client will not be allowed to use the Settings storage. + * + * Once the client logs in successfully, data is automatically + * loaded from non-volatile memory into RAM. If the CRC is good, + * this login() command returns SUCCESS. If the CRC is bad, + * it returns EINVAL. + * + * @param data Pointer to the buffer that contains the local + * component's configuration data in global memory. + * @param size Size of the buffer that contains local config data. + * @return + * SUCCESS if the client got registered and the data loaded with CRC OK + * EINVAL if the client got registered and the data didn't load (i.e. + * the very first time you power up the device perhaps). + * ESIZE if there is not enough memory + * FAIL if the client cannot login at this time because you + * weren't paying attention to the instructions. :) + */ + command error_t login(void *data, uint8_t size); + + /** + * Store the registered configuration data + * into non-volatile memory. This assumes that the pointer + * to the global data has not changed. + * @return + * SUCCESS if the configuration data will be stored + * FAIL if it will not be stored because you didn't log in + */ + command error_t store(); + + /** + * Load the registered configuration data + * from non-volatile memory into the registered buffer location. + * @return + * SUCCESS if the data loaded with CRC OK + * FAIL if you didn't previously log in when requested + * EINVAL if the data didn't load because CRC wasn't OK + */ + command error_t load(); + + /** + * The configuration manager requests registration information. + * + * The command register(..) must be called within the event + * for each component that uses the Configuration interface. + * If register() is not called from within this event, then + * that parameterized interface will not be allowed to store + * or retrieve its configuration data on non-volatile memory. + */ + event void requestLogin(); +} diff --git a/tos/chips/msp430/flash/settings/SettingsC.nc b/tos/chips/msp430/flash/settings/SettingsC.nc new file mode 100644 index 0000000000..0b1016105d --- /dev/null +++ b/tos/chips/msp430/flash/settings/SettingsC.nc @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Manage storing and retrieving configuration settings + * for various components, mainly to non-volatile internal microcontroller + * memory. + * + * On install, the internal flash should be erased automatically on + * both the avr and msp430 platforms, so you shouldn't have to worry + * about loading incorrect config data left over from a different + * version of the application. + * + * During software initialization, each unique parameterized Settings + * interface will be called with an event to requestLogin(). The + * component using the Settings interface must call command + * Settings.login() at that point to register the address and size of + * the structure that holds its configuration data. After all + * components have logged in, the Settings.loaded() event will be + * automatically signaled for each client, with their loaded data. + * + * Each request will be queued up and handled, so several components can call + * store() and load() simultaneously. The only rule is that the a single + * component cannot store() and load() at the same time. + * + * Storing data will first calcute and store the CRC of the data to + * flash, then store the actual data to flash. Each client will take + * up the size they register with plus the size of the CRC. + * + * Loading data will first load the CRC from flash, then load the + * data from flash into the registered client's pointer. If + * the CRC's don't match, then the loaded() event will signal with + * valid == FALSE and error == SUCCESS. You can then fill + * in the registered buffer with default data and call store(). + * + * @author David Moss + */ + +#include "Settings.h" + +generic configuration SettingsC() { + provides interface Settings; +} +implementation { + components SettingsImplC; + Settings = SettingsImplC.Settings[unique(UQ_MSP430_SETTINGS) + SETTINGS_CLIENT_BASE]; +} diff --git a/tos/chips/msp430/flash/settings/SettingsImplC.nc b/tos/chips/msp430/flash/settings/SettingsImplC.nc new file mode 100644 index 0000000000..cb7a00addb --- /dev/null +++ b/tos/chips/msp430/flash/settings/SettingsImplC.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Settings.h" + +configuration SettingsImplC { + provides { + /** A distinguished, always-present Settings interface that is the + * first one loaded. + */ + interface Settings as SystemSettings; + + /** Client-specific settings, starting with client + * SETTINGS_CLIENT_BASE. + */ + interface Settings[uint8_t id]; + } +} +implementation { + components SettingsP, + MainC; + + Settings = SettingsP; + SystemSettings = SettingsP.Settings[SETTINGS_CLIENT_SystemSettings]; + + MainC.SoftwareInit -> SettingsP; + + components Msp430FlashModifyC; + SettingsP.Msp430FlashModify -> Msp430FlashModifyC; + + components Msp430Crc16C; + SettingsP.CrcX -> Msp430Crc16C; +} diff --git a/tos/chips/msp430/flash/settings/SettingsP.nc b/tos/chips/msp430/flash/settings/SettingsP.nc new file mode 100644 index 0000000000..06d094fffc --- /dev/null +++ b/tos/chips/msp430/flash/settings/SettingsP.nc @@ -0,0 +1,208 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Msp430Flash.h" + +module SettingsP { + provides { + interface Init; + interface Settings[uint8_t id]; + } + uses { + interface Msp430FlashModify; + interface CrcX; + } +} + +implementation { + + enum { + NUM_CLIENTS = uniqueCount(UQ_MSP430_SETTINGS) + SETTINGS_CLIENT_BASE + }; + + typedef uint8_t settings_crc_t; + + /** + * Information about all the parameterized clients + * using the Settings interface + */ + struct clients { + /** Pointer to the client's configuration buffer */ + void *buffer; + + /** Size of the client's configuration buffer */ + uint8_t size; + + } clients[NUM_CLIENTS]; + + + /***************** Prototypes ****************/ + uint16_t getFlashAddress(uint8_t clientId); + + /***************** Init Commands ****************/ + command error_t Init.init() { + int i; + + memset(&clients, 0x0, sizeof(clients)); + + for(i = 0; i < NUM_CLIENTS; i++) { + signal Settings.requestLogin[i](); + } + return SUCCESS; + } + + /***************** Settings Commands ****************/ + /** + * This command must be called during the requestLogin() + * event. + * + * If registering this client causes the amount of config data to exceed + * the size of the flash, this command will return ESIZE and + * the client will not be allowed to use the Settings storage. + * + * Once the client logs in successfully, data is automatically + * loaded from non-volatile memory into RAM. If the CRC is good, + * this login() command returns SUCCESS. If the CRC is bad, + * it returns EINVAL. + * + * @param data Pointer to the buffer that contains the local + * component's configuration data in global memory. + * @param size Size of the buffer that contains local config data. + * @return + * SUCCESS if the client got registered and the data loaded with CRC OK + * EINVAL if the client got registered and the data didn't load (i.e. + * the very first time you power up the device perhaps). + * ESIZE if there is not enough memory + * FAIL if the client cannot login at this time because you + * weren't paying attention to the instructions. :) + */ + command error_t Settings.login[uint8_t id](void *data, uint8_t size) { + if(clients[id].size == 0) { + + clients[id].buffer = data; + clients[id].size = size; + + if(getFlashAddress(id) + size > FLASH_SEGMENT_SIZE) { + clients[id].size = 0; + return ESIZE; + } else { + // Immediately request to load data from flash + return call Settings.load[id](); + } + } + return FAIL; + } + + /** + * Store the registered configuration data + * into non-volatile memory. This assumes that the pointer + * to the global data has not changed. + * @return + * SUCCESS if the configuration data will be stored + * FAIL if it will not be stored because you didn't log in + */ + command error_t Settings.store[uint8_t id]() { + uint16_t address; + settings_crc_t crc; + + if(!(clients[id].size)) { + return FAIL; + } + + address = getFlashAddress(id); + crc = (settings_crc_t) call CrcX.crc(clients[id].buffer, clients[id].size); + + call Msp430FlashModify.modify(address, &crc, sizeof(crc)); + call Msp430FlashModify.modify(address + sizeof(crc), + clients[id].buffer, + clients[id].size); + return SUCCESS; + } + + /** + * Load the registered configuration data + * from non-volatile memory into the registered buffer location. + * @return + * SUCCESS if the data loaded with CRC OK + * FAIL if you didn't previously log in when requested + * EINVAL if the data didn't load because CRC wasn't OK + */ + command error_t Settings.load[uint8_t id]() { + uint16_t address; + settings_crc_t crc; + + if(!(clients[id].size)) { + return FAIL; + } + + address = getFlashAddress(id); + + call Msp430FlashModify.read(address, &crc, sizeof(crc)); + call Msp430FlashModify.read(address + sizeof(crc), clients[id].buffer, clients[id].size); + + if(crc == (settings_crc_t) call CrcX.crc(clients[id].buffer, clients[id].size)) { + // Good read + return SUCCESS; + } else { + // Corruption + return EINVAL; + } + } + + /***************** Functions ****************/ + /** + * @return the address on flash for a particular client's data + */ + uint16_t getFlashAddress(uint8_t clientId) { + uint16_t addr = 0; + int i; + + for(i = 0; i < NUM_CLIENTS; i++) { + if(i == clientId) { + break; + } + + if(clients[i].size > 0) { + // Add 1 because of the 8-bit crc length + addr += clients[i].size + sizeof(settings_crc_t); + } + } + return addr; + } + + /***************** Defaults ****************/ + default event void Settings.requestLogin[uint8_t id]() { } +} diff --git a/tos/chips/msp430/flash/settings/SystemSettingsC.nc b/tos/chips/msp430/flash/settings/SystemSettingsC.nc new file mode 100644 index 0000000000..0f5a54d9c5 --- /dev/null +++ b/tos/chips/msp430/flash/settings/SystemSettingsC.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "Settings.h" + +/** + * Always allow system settings to connect to client 0 and be written to the + * flash first. + * + * @author David Moss + */ + +configuration SystemSettingsC { + provides interface Settings; +} + +implementation { + + components SettingsImplC; + Settings = SettingsImplC.SystemSettings; +} diff --git a/tos/chips/msp430/onewire/OneWire.h b/tos/chips/msp430/onewire/OneWire.h new file mode 100644 index 0000000000..e7cb144f45 --- /dev/null +++ b/tos/chips/msp430/onewire/OneWire.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Janos Sallai + * @author David Moss + */ + +#ifndef ONEWIRE_H +#define ONEWIRE_H + +enum { + ONEWIRE_SERIAL_LENGTH = 6, + ONEWIRE_DATA_LENGTH = 8 +}; + +typedef union onewire_t { + uint8_t data[ONEWIRE_DATA_LENGTH]; + struct { + uint8_t familyCode; + uint8_t serial[ONEWIRE_SERIAL_LENGTH]; + uint8_t crc; + }; +} onewire_t; + +#endif // ONEWIRE_H diff --git a/tos/chips/msp430/onewire/OneWire.nc b/tos/chips/msp430/onewire/OneWire.nc new file mode 100644 index 0000000000..c3d18f5108 --- /dev/null +++ b/tos/chips/msp430/onewire/OneWire.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Janos Sallai + * @author David Moss + */ + +#include "OneWire.h" + +interface OneWire { + /** + * Read the 64-bit hardware ID (family id, serial, crc) from the DS2401 chip. + * @param rom Pointer to a ds2401_serial_t struct, defined in ds2401.h. + * @returns SUCCESS on success, an error code otherwise. + */ + async command error_t getId(onewire_t *rom); +} diff --git a/tos/chips/msp430/onewire/OneWireC.nc b/tos/chips/msp430/onewire/OneWireC.nc new file mode 100644 index 0000000000..03e7743e8d --- /dev/null +++ b/tos/chips/msp430/onewire/OneWireC.nc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This is a fa�ade for the actual 1-wire implementation. + * All 1-wire devices provide an ID that can generate + * the EUI-64 of a device. This configuration's signature + * remains static so this ID can be extracted from any + * 1-wire chip. + * + * To use a particular 1-wire chip, wire directly to its + * implementation, which will provide chip-specific interfaces. + * + * @author David Moss + */ + +configuration OneWireC { + provides interface OneWire; +} +implementation { + + components PlatformOneWireC; + OneWire = PlatformOneWireC.PrimaryOneWire; +} diff --git a/tos/chips/msp430/onewire/OneWireCrc.nc b/tos/chips/msp430/onewire/OneWireCrc.nc new file mode 100644 index 0000000000..01278aa198 --- /dev/null +++ b/tos/chips/msp430/onewire/OneWireCrc.nc @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +#include "OneWire.h" + +interface OneWireCrc { + async command uint8_t crc(onewire_t *rom); + async command bool isValid(onewire_t *rom); +} diff --git a/tos/chips/msp430/onewire/OneWireCrcC.nc b/tos/chips/msp430/onewire/OneWireCrcC.nc new file mode 100644 index 0000000000..6530d6c394 --- /dev/null +++ b/tos/chips/msp430/onewire/OneWireCrcC.nc @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +configuration OneWireCrcC { + provides interface OneWireCrc; +} +implementation { + + components OneWireCrcP; + OneWireCrc = OneWireCrcP; +} diff --git a/tos/chips/msp430/onewire/OneWireCrcP.nc b/tos/chips/msp430/onewire/OneWireCrcP.nc new file mode 100644 index 0000000000..84df67dfdc --- /dev/null +++ b/tos/chips/msp430/onewire/OneWireCrcP.nc @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * POLYNOMIAL = x^8 + x^5 + x^4 + 1 + * @author Cory Sharp + * @author David Moss + */ + +#include "OneWire.h" + +module OneWireCrcP { + provides interface OneWireCrc; +} + +implementation { + + /***************** Functions ****************/ + uint8_t crc8( uint8_t crc, uint8_t newByte ) { + int i; + crc ^= newByte; + + for(i = 0; i < 8; i++) { + if( crc & 1 ) { + crc = (crc >> 1) ^ 0x8c; + } else { + crc >>= 1; + } + } + return crc; + } + + /***************** OneWireCrc Commands ****************/ + async command uint8_t OneWireCrc.crc(onewire_t *rom) { + int i; + uint8_t crc = 0; + + for(i = 0; i < 7; i++) { + crc = crc8(crc, rom->data[i]); + } + return crc; + } + + async command bool OneWireCrc.isValid(onewire_t *rom) { + return (rom->crc == call OneWireCrc.crc(rom)) && (rom->crc != 0); + } +} diff --git a/tos/chips/msp430/onewire/OneWireMaster.nc b/tos/chips/msp430/onewire/OneWireMaster.nc new file mode 100644 index 0000000000..671e4d8e7c --- /dev/null +++ b/tos/chips/msp430/onewire/OneWireMaster.nc @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Janos Sallai + */ + +/** + * Interface to interact with 1-wire bus devices, as a master on the 1-wire + * bus. + */ + +interface OneWireMaster { + /** + * Initialize bus (pin is input with pullup). + */ + async command void idle(); + /** + * Initialize bus, start sourcing current (pin is input with pullup). + */ + async command void init(); + /** + * Release bus, stop sourcing current (pin is three-stated input). + */ + async command void release(); + /** + * Generate reset signal. + * @returns SUCCESS if a client is present, an error_t error value otherwise. + */ + async command error_t reset(); + /** + * Write bit 1 to the bus. + */ + async command void writeOne(); + /** + * Write bit 0 to the bus. + */ + async command void writeZero(); + /** + * Write 8 bits to the bus, LSB first. + * @param b the byte to write. + */ + async command void writeByte(uint8_t b); + /** + * Read a bit from the bus. + */ + async command bool readBit(); + /** + * Read 8 bits from the bus, LSB first. + * @returns the byte read. + */ + async command uint8_t readByte(); +} diff --git a/tos/chips/msp430/onewire/OneWireMasterC.nc b/tos/chips/msp430/onewire/OneWireMasterC.nc new file mode 100644 index 0000000000..e8be09c163 --- /dev/null +++ b/tos/chips/msp430/onewire/OneWireMasterC.nc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +generic configuration OneWireMasterC () { + provides interface OneWireMaster; + uses interface GeneralIO as Pin; +} + +implementation { + components new OneWireMasterP(); + OneWireMaster = OneWireMasterP; + Pin = OneWireMasterP; + + components BusyWaitMicroC; + OneWireMasterP.BusyWait -> BusyWaitMicroC; + + components LedC; + OneWireMasterP.MultiLed -> LedC; +} diff --git a/tos/chips/msp430/onewire/OneWireMasterP.nc b/tos/chips/msp430/onewire/OneWireMasterP.nc new file mode 100644 index 0000000000..0dcbb1e122 --- /dev/null +++ b/tos/chips/msp430/onewire/OneWireMasterP.nc @@ -0,0 +1,168 @@ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This module is the implementation of an 1-wire bus master. + * + * @author Janos Sallai + * @author David Moss + */ + +generic module OneWireMasterP () { + provides interface OneWireMaster; + uses { + interface GeneralIO as Pin; + interface BusyWait; + interface MultiLed; + } +} +implementation { + + /** Timing values, in binary microseconds, required for the protocol + * to work. Note that time ranges in comments are decimal + * microseconds, which are rougly 5% longer. */ + enum { + /** Time to wait after resetting device */ + t_RSTL = 504, // 480 <= t_RSTL + /** Maximum time following reset before device generates valid + * presence signal */ + t_PDHIGH = 63, // 15 <= t_PDHIGH <= 60 + /** Maximum time that presence pulse is valid */ + t_PDLOW = 252, // 60 <= t_PDLOW <= 240 + /** Duration to hold bus low when writing a zero */ + t_LOW0 = 63, // 60 <= t_LOW0 <= 120 + /** Duration to hold bus low when writing a one */ + t_LOW1 = 1, // 1 <= t_LOW1 <= 15 + /** Duration to hold bus low prior to reading a bit */ + t_RDV = 1, // t_RDV <= 15 + /** Recovery time between slots */ + t_REC = 1, // 1 <= t_REC + /** Duration of a read or write slot */ + t_SLOT = 63, // 60 <= t_SLOT <= 120 + }; + + async command void OneWireMaster.idle() { + call Pin.makeInput(); + } + + async command void OneWireMaster.init() { + call Pin.makeInput(); + } + + async command void OneWireMaster.release() { + call Pin.makeInput(); + } + + async command error_t OneWireMaster.reset() { + bool present; + + atomic { + // it is assumed that the bus is in idle state here + + // transmit reset pulse + call Pin.clr(); + call Pin.makeOutput(); // output low + call BusyWait.wait(t_RSTL); // must be at least 480us + call Pin.makeInput(); // input with pullup set + + /* Wait for device to generate valid presence signal; sample it; + * then wait for it to clear before moving on. There is a + * device present if the signal is low. */ + call BusyWait.wait(t_PDHIGH); + present = (0 == call Pin.get()); + call BusyWait.wait(t_PDLOW); + } + return present ? SUCCESS : FAIL; + } + + async command void OneWireMaster.writeOne() { + atomic { + call Pin.makeOutput(); // output low + call Pin.clr(); + call BusyWait.wait(t_LOW1); + call Pin.makeInput(); // input with pullup set + call BusyWait.wait(t_REC + t_SLOT - t_LOW1); + } + } + + async command void OneWireMaster.writeZero() { + atomic { + call Pin.makeOutput(); // output low + call Pin.clr(); + call BusyWait.wait(t_LOW0); + call Pin.makeInput(); // input with pullup set + call BusyWait.wait(t_REC + t_SLOT - t_LOW0); + } + } + + async command void OneWireMaster.writeByte(uint8_t b) { + uint8_t i; + + // send out bits, LSB first + for(i = 0; i < 8; i++) { + if(b & 0x01) { + call OneWireMaster.writeOne(); + } else { + call OneWireMaster.writeZero(); + } + b >>= 1; + } + } + + async command bool OneWireMaster.readBit() { + bool b; + + atomic { + call Pin.makeOutput(); // output low + call Pin.clr(); + call BusyWait.wait(t_RDV); + call Pin.makeInput(); // input with pullup set + b = !! call Pin.get(); // read pin + call BusyWait.wait(t_REC + t_SLOT - t_RDV); + } + return b; + } + + async command uint8_t OneWireMaster.readByte() { + uint8_t i = 0; + uint8_t b = 0; + + // read bits, LSB first + for(i = 0; i < 8; i++) { + b >>= 1; + b |= call OneWireMaster.readBit() << 7; + } + return b; + } +} diff --git a/tos/chips/msp430/onewire/ds1825/Ds1825OneWireImplementationC.nc b/tos/chips/msp430/onewire/ds1825/Ds1825OneWireImplementationC.nc new file mode 100644 index 0000000000..49b919bbe3 --- /dev/null +++ b/tos/chips/msp430/onewire/ds1825/Ds1825OneWireImplementationC.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** DS1825 one-wire digital thermometer. + * + * In addition to basic one-wire information, this provides the + * ambient temperature in hundredths (C) degrees centigrade (C). + * + * @author David Moss + */ + +generic configuration Ds1825OneWireImplementationC () { + provides { + interface OneWire; + // Centigrade temperature in hundredths of a degree + interface Read as TemperatureCC; + } + uses interface OneWireMaster; +} + +implementation { + + components new Ds1825OneWireImplementationP(); + OneWire = Ds1825OneWireImplementationP; + TemperatureCC = Ds1825OneWireImplementationP; + OneWireMaster = Ds1825OneWireImplementationP; + + components OneWireCrcC; + Ds1825OneWireImplementationP.OneWireCrc -> OneWireCrcC; + + components LedC; + Ds1825OneWireImplementationP.MultiLed -> LedC; + + components new TimerMilliC(); + Ds1825OneWireImplementationP.Timer -> TimerMilliC; +} diff --git a/tos/chips/msp430/onewire/ds1825/Ds1825OneWireImplementationP.nc b/tos/chips/msp430/onewire/ds1825/Ds1825OneWireImplementationP.nc new file mode 100644 index 0000000000..bfa8b7e023 --- /dev/null +++ b/tos/chips/msp430/onewire/ds1825/Ds1825OneWireImplementationP.nc @@ -0,0 +1,177 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "OneWire.h" + +/** + * 1-wire temperature sensor + * @author David Moss + */ + +generic module Ds1825OneWireImplementationP () { + provides { + interface OneWire; + interface Read as TemperatureCC; + } + uses { + interface OneWireMaster; + interface OneWireCrc; + interface Timer; + interface MultiLed; + } +} + +implementation { + + enum { + CMD_GET_ID = 0x33, + CMD_CONVERT_TEMPERATURE = 0x44, + CMD_READ_SCRATCHPAD = 0xBE, + CMD_WRITE_SCRATCHPAD = 0x4E, + }; + + /***************** Functions ****************/ + + /***************** OneWire Commands ****************/ + /** + * Obtain the 1-wire 64-bit ID from the chip + * @return SUCCESS upon verifying the 1-wire ID stored in the buffer passes + * the 8-bit CRC check. + */ + async command error_t OneWire.getId(onewire_t *rom) { + int max_checks = 10; + bool valid_rom = FALSE; + + while ((0 < max_checks--) && (! valid_rom)) { + uint8_t i; + call OneWireMaster.init(); + + if(call OneWireMaster.reset() != SUCCESS) { + call OneWireMaster.release(); + return EOFF; + } + + call OneWireMaster.writeByte(CMD_GET_ID); + + for(i = 0; i < ONEWIRE_DATA_LENGTH; i++) { + rom->data[i] = call OneWireMaster.readByte(); + } + + call OneWireMaster.release(); + valid_rom = call OneWireCrc.isValid(rom); + } + return (valid_rom) ? SUCCESS : FAIL; + } + + /***************** OneWireTemperature Commands ****************/ + command error_t TemperatureCC.read() { + onewire_t rom; + + /* + * Step 1. + * Configure the ADC for a 10-bit conversion by setting the config byte + * to a 0x20. + */ + call OneWire.getId(&rom); + + call OneWireMaster.writeByte(CMD_WRITE_SCRATCHPAD); + + call OneWireMaster.writeByte(0x0); // User byte 1 + call OneWireMaster.writeByte(0x0); // User byte 2 + call OneWireMaster.writeByte(0x20); // Configuration Register (0x20 = 10bit) + + /* + * Step 2. + * Begin the temperature conversion process. Note from the datasheet + * a 10-bit ADC takes a maximum of 187.5 ms. We'll just do something + * else during that time, maybe go to sleep, instead of constantly polling + * the 1-wire device. + */ + call OneWire.getId(&rom); + + // 5. Send command to read the scratch pad + call OneWireMaster.writeByte(CMD_CONVERT_TEMPERATURE); + + /* + * Step 3. + * Wait for the conversion to complete without polling. + * 188 ms / 1000 (ms per second) = X (bms) / 1024 (bms per second) + * => X = 193 + */ + call Timer.startOneShot(193); + return SUCCESS; + } + + /***************** Timer Events ****************/ + /** + * Step 4. + * The timer is firing because the temperature conversion is now complete. + * Read the scratchpad to find out what the temperature is, and signal + * readDone(..); + */ + event void Timer.fired() { + int16_t rawValue = 0; + int32_t temperature; + onewire_t rom; + + call OneWire.getId(&rom); + + // 5. Send command to read the scratch pad + call OneWireMaster.writeByte(CMD_READ_SCRATCHPAD); + + rawValue = call OneWireMaster.readByte(); + rawValue |= call OneWireMaster.readByte() << 8; + + temperature = (int32_t) rawValue; + + /* + * Example (using page 5 of the datasheet) + * 0x191 should equal +25.0625 degrees C + * + * 0x191 * 625 => 401 * 625 => 250625 + * 250625 / 100 => [2506] (25.06 C) + */ + temperature *= 625; + temperature /= 100; + + signal TemperatureCC.readDone(SUCCESS, (int16_t) temperature); + } + + /***************** Functions ****************/ + + /***************** Defaults ******************/ + default event void TemperatureCC.readDone(error_t result, int16_t value) { } +} diff --git a/tos/chips/msp430/pmm/Msp430Pmm.h b/tos/chips/msp430/pmm/Msp430Pmm.h index 760821902f..40b769d902 100644 --- a/tos/chips/msp430/pmm/Msp430Pmm.h +++ b/tos/chips/msp430/pmm/Msp430Pmm.h @@ -1,3 +1,36 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ #ifndef MSP430PMM_H #define MSP430PMM_H diff --git a/tos/chips/msp430/pmm/Msp430PmmC.nc b/tos/chips/msp430/pmm/Msp430PmmC.nc index e2dae67581..42b476ec70 100644 --- a/tos/chips/msp430/pmm/Msp430PmmC.nc +++ b/tos/chips/msp430/pmm/Msp430PmmC.nc @@ -1,11 +1,45 @@ - -#include "Msp430Pmm.h" +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ /** * Power Management Module + * * @author David Moss */ +#include "Msp430Pmm.h" + configuration Msp430PmmC { provides { interface Init; @@ -14,9 +48,7 @@ configuration Msp430PmmC { } implementation { - components Msp430PmmP; Init = Msp430PmmP; Pmm = Msp430PmmP; - } diff --git a/tos/chips/msp430/pmm/Msp430PmmP.nc b/tos/chips/msp430/pmm/Msp430PmmP.nc index acec1445cc..d0fda3cbff 100644 --- a/tos/chips/msp430/pmm/Msp430PmmP.nc +++ b/tos/chips/msp430/pmm/Msp430PmmP.nc @@ -1,17 +1,49 @@ - -#include "Msp430Pmm.h" +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ /** * @author David Moss */ +#include "Msp430Pmm.h" + module Msp430PmmP { provides { interface Init; interface Pmm; } } - implementation { command error_t Init.init() { @@ -31,23 +63,34 @@ implementation { */ command void Pmm.setVoltage(uint8_t level) { + // Open PMM registers for write access PMMCTL0_H = 0xA5; + // Set SVS/SVM high side new level SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level; + // Set SVM low side to new level SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level; + // Wait till SVM is settled - while ((PMMIFG & SVSMLDLYIFG) == 0); + while ((PMMIFG & SVSMLDLYIFG) == 0) { + } + // Clear already set flags PMMIFG &= ~(SVMLVLRIFG + SVMLIFG); + // Set VCore to new level PMMCTL0_L = PMMCOREV0 * level; + // Wait till new level reached if ((PMMIFG & SVMLIFG)) - while ((PMMIFG & SVMLVLRIFG) == 0); + while ((PMMIFG & SVMLVLRIFG) == 0) { + } + // Set SVS/SVM low side to new level SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level; + // Lock PMM registers for write access PMMCTL0_H = 0x00; } diff --git a/tos/chips/msp430/pmm/Pmm.nc b/tos/chips/msp430/pmm/Pmm.nc index 4e69f13279..85148c67f8 100644 --- a/tos/chips/msp430/pmm/Pmm.nc +++ b/tos/chips/msp430/pmm/Pmm.nc @@ -1,4 +1,36 @@ - +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ /** * Power Management Interface diff --git a/tos/chips/msp430/rtc/Rtc.h b/tos/chips/msp430/rtc/Rtc.h index e9c15db4f3..83cc454b8c 100644 --- a/tos/chips/msp430/rtc/Rtc.h +++ b/tos/chips/msp430/rtc/Rtc.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + /** * @author David Moss */ @@ -34,4 +68,4 @@ enum rtc_alarm_e { RTC_ENABLE_ALARM = 0x80, }; -#endif +#endif /* RTC_H */ diff --git a/tos/chips/msp430/rtc/RtcAlarm.nc b/tos/chips/msp430/rtc/RtcAlarm.nc index 0bea4f32ba..ee9582ec13 100644 --- a/tos/chips/msp430/rtc/RtcAlarm.nc +++ b/tos/chips/msp430/rtc/RtcAlarm.nc @@ -37,6 +37,7 @@ /** * @author David Moss */ + interface RtcAlarm { /** diff --git a/tos/chips/msp430/rtc/RtcP.nc b/tos/chips/msp430/rtc/RtcP.nc index 917ca0779e..843125f73c 100644 --- a/tos/chips/msp430/rtc/RtcP.nc +++ b/tos/chips/msp430/rtc/RtcP.nc @@ -38,6 +38,7 @@ /** * TODO Year should be a single 16-bit number + * * @author David Moss * @author Peter Bigot */ diff --git a/tos/chips/msp430/wdt/Wdt.nc b/tos/chips/msp430/wdt/Wdt.nc new file mode 100644 index 0000000000..8cc06d98d0 --- /dev/null +++ b/tos/chips/msp430/wdt/Wdt.nc @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +interface Wdt { + command void pause(); + command void resume(); + command void kick(); +} diff --git a/tos/chips/msp430/wdt/WdtC.nc b/tos/chips/msp430/wdt/WdtC.nc new file mode 100644 index 0000000000..d1af8f1752 --- /dev/null +++ b/tos/chips/msp430/wdt/WdtC.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +configuration WdtC { + provides { + interface StdControl; + interface Wdt; + } +} +implementation { + components WdtP; + StdControl = WdtP.StdControl; + Wdt = WdtP; + + components new TimerMilliC(); + WdtP.Timer -> TimerMilliC; +} diff --git a/tos/chips/msp430/wdt/WdtP.nc b/tos/chips/msp430/wdt/WdtP.nc new file mode 100644 index 0000000000..c7eb2e7274 --- /dev/null +++ b/tos/chips/msp430/wdt/WdtP.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +module WdtP { + provides { + interface StdControl; + interface Wdt; + } + uses interface Timer; +} +implementation { + + bool on; + + /***************** StdControl Commands ****************/ + command error_t StdControl.start() { + on = TRUE; + call Wdt.resume(); + return SUCCESS; + } + + command error_t StdControl.stop() { + on = FALSE; + call Wdt.pause(); + return SUCCESS; + } + + /***************** Wdt Commands ****************/ + command void Wdt.pause() { + call Timer.stop(); + WDTCTL = WDTPW | WDTHOLD; + } + + command void Wdt.resume() { + if(on) { + call Timer.startPeriodic(512); + + // Watchdog mode clocked from ACLK, 1000 ms reset + WDTCTL = WDT_ARST_1000; + } + } + + command void Wdt.kick() { + if(on) { + WDTCTL = WDTPW | ((WDTCTL & 0xFF) | WDTCNTCL); + } + } + + /***************** Timer Events ****************/ + event void Timer.fired() { + call Wdt.kick(); + } +} From fcd4679329ff3f8d1e5cfb742023f56305c10ed8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 13 Jun 2011 21:22:13 -0700 Subject: [PATCH 099/411] Add protection #ifs using TI HAS_, crc, flash, pmm, rf1a, rtc, wdt, x5/usci --- tos/chips/msp430/crc16/Msp430Crc16P.nc | 4 ++++ tos/chips/msp430/flash/driver/Msp430FlashP.nc | 8 ++++++++ tos/chips/msp430/pmm/Msp430PmmP.nc | 4 ++++ tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIfP.nc | 9 +++++++++ tos/chips/msp430/rtc/RtcP.nc | 5 +++++ tos/chips/msp430/wdt/WdtP.nc | 4 ++++ tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc | 8 +++++--- 7 files changed, 39 insertions(+), 3 deletions(-) diff --git a/tos/chips/msp430/crc16/Msp430Crc16P.nc b/tos/chips/msp430/crc16/Msp430Crc16P.nc index 3f85a08f49..fd021d3408 100644 --- a/tos/chips/msp430/crc16/Msp430Crc16P.nc +++ b/tos/chips/msp430/crc16/Msp430Crc16P.nc @@ -38,6 +38,10 @@ * @author David Moss */ +#if !defined(__MSP430_HAS_CRC__) +#error "Msp430Crc16P: processor not supported, need CRC" +#endif + module Msp430Crc16P { provides interface CrcX; } diff --git a/tos/chips/msp430/flash/driver/Msp430FlashP.nc b/tos/chips/msp430/flash/driver/Msp430FlashP.nc index 6ca17c0a44..d9c03d559f 100644 --- a/tos/chips/msp430/flash/driver/Msp430FlashP.nc +++ b/tos/chips/msp430/flash/driver/Msp430FlashP.nc @@ -40,6 +40,14 @@ * @author David Moss */ +#if !defined(__MSP430_HAS_FLASH__) || !defined(__MSP430_HAS_FLASH2__) +#error "Msp430FlashP: processor not supported, need FLASH or FLASH2" +#endif + +#if defined(__MSP430_HAS_FLASH2__) +#warn "Msp430FlashP: FLASH2 may not function correctly" +#endif + #include "Msp430Flash.h" module Msp430FlashP { diff --git a/tos/chips/msp430/pmm/Msp430PmmP.nc b/tos/chips/msp430/pmm/Msp430PmmP.nc index d0fda3cbff..fe916154ab 100644 --- a/tos/chips/msp430/pmm/Msp430PmmP.nc +++ b/tos/chips/msp430/pmm/Msp430PmmP.nc @@ -38,6 +38,10 @@ #include "Msp430Pmm.h" +#if !defined(__MSP430_HAS_PMM__) +#error "Msp430PmmP: processor not supported, need PMM" +#endif + module Msp430PmmP { provides { interface Init; diff --git a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIfP.nc b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIfP.nc index 811f01d971..b36152b4ad 100644 --- a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIfP.nc +++ b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aIfP.nc @@ -43,6 +43,15 @@ * @author Peter A. Bigot */ +/* + * TI really has an arm where a leg is needed! The implementation of + * an on chip CC1101 core is called the RF1A but for some stupid reason + * they call the define HAS_CC1101. Sigh. + */ +#if !defined(__MSP430_HAS_CC1101__) +#error "HplMsp430Rf1aIfP: processor not supported, need CC1101 (RF1A)" +#endif + generic module HplMsp430Rf1aIfP ( /** Identifier for this RF1A module, unique across chip */ uint8_t RF1A_ID, diff --git a/tos/chips/msp430/rtc/RtcP.nc b/tos/chips/msp430/rtc/RtcP.nc index 843125f73c..44d652fb5a 100644 --- a/tos/chips/msp430/rtc/RtcP.nc +++ b/tos/chips/msp430/rtc/RtcP.nc @@ -34,6 +34,11 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ + +#if !defined(__MSP430_HAS_RTC__) +#error "Msp430RtcP: processor not supported, need RTC" +#endif + #include "Rtc.h" /** diff --git a/tos/chips/msp430/wdt/WdtP.nc b/tos/chips/msp430/wdt/WdtP.nc index c7eb2e7274..ebcfd118c4 100644 --- a/tos/chips/msp430/wdt/WdtP.nc +++ b/tos/chips/msp430/wdt/WdtP.nc @@ -32,6 +32,10 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ +#if !defined(__MSP430_HAS_WDT__) || !defined(__MSP430_HAS_WDT_A__) +#error "Msp430WdtP: processor not supported, need WDT or WDT_A" +#endif + module WdtP { provides { interface StdControl; diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc index a0d057801c..154154b38b 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc @@ -45,10 +45,12 @@ #include "hardware.h" #include "Msp430XV2Dco.h" +#if !defined(__MSP430_HAS_UCS__) && !defined(__MSP430_HAS_UCS_RF__) +#error "Msp430XV2ClockControlP: requires Unified Clock System" +#endif + module Msp430XV2ClockControlP @safe() { - uses { - interface McuSleepEvents; - } + uses interface McuSleepEvents; provides { interface Msp430XV2ClockControl; interface McuPowerOverride; From 46e31cde4402f5a6c4d77f75a57f388c388efd88 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 13 Jun 2011 21:29:30 -0700 Subject: [PATCH 100/411] surf: remove WITH_OSIAN conditional from platform Button and RTC --- tos/platforms/surf/hardware/buttons/ButtonP.nc | 6 ------ .../surf/hardware/buttons/PlatformButtonsC.nc | 11 ----------- .../surf/hardware/rtc/PlatformRealTimeClockP.nc | 9 --------- 3 files changed, 26 deletions(-) diff --git a/tos/platforms/surf/hardware/buttons/ButtonP.nc b/tos/platforms/surf/hardware/buttons/ButtonP.nc index b6b259bcc1..5f84d4da19 100644 --- a/tos/platforms/surf/hardware/buttons/ButtonP.nc +++ b/tos/platforms/surf/hardware/buttons/ButtonP.nc @@ -40,11 +40,9 @@ generic module ButtonP (bool active_high, uint8_t button_id) { -#if WITH_OSIAN provides { interface Button; } -#endif // WITH_OSIAN uses { interface HplMsp430GeneralIO as ButtonPin; interface GpioInterrupt as ButtonInterrupt; @@ -109,14 +107,12 @@ generic module ButtonP (bool active_high, is_pressed = checkAndConfigure_atomic(TRUE); call ButtonBridge.stateChange(is_pressed); } -#if WITH_OSIAN /* Signal the appropriate event */ if (is_pressed) { signal Button.pressed(); } else { signal Button.released(); } -#endif } async event void ButtonBridge.setEnabled (bool enablep) @@ -128,14 +124,12 @@ generic module ButtonP (bool active_high, } } -#if WITH_OSIAN async command bool Button.isPressed () { return isPressed_(); } async command bool Button.isEnabled () { return isEnabled_(); } async command bool Button.enable () { return enable_(); } async command void Button.disable () { return disable_(); } default async event void Button.pressed () { } default async event void Button.released () { } -#endif // WITH_OSIAN } /* diff --git a/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc b/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc index 18ba664483..f467aaec89 100644 --- a/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc +++ b/tos/platforms/surf/hardware/buttons/PlatformButtonsC.nc @@ -45,7 +45,6 @@ configuration PlatformButtonsC { provides { interface Get[uint8_t button_id]; interface Notify[uint8_t button_id]; -#if WITH_OSIAN interface Button as Button0; interface Button as Button1; #if 2 < PLATFORM_BUTTON_COUNT @@ -54,7 +53,6 @@ configuration PlatformButtonsC { interface Button as Button3; #endif // 3 < PLATFORM_BUTTON_COUNT #endif // 2 < PLATFORM_BUTTON_COUNT -#endif // WITH_OSIAN } } implementation { @@ -84,36 +82,27 @@ configuration PlatformButtonsC { components new Msp430InterruptC() as Button0InterruptC; Button0C.ButtonInterrupt -> Button0InterruptC; ButtonBridgeP.ButtonBridge[0] <- Button0C; -#if WITH_OSIAN Button0 = Button0C; -#endif // WITH_OSIAN components new ButtonP(FALSE, 1) as Button1C; components new Msp430InterruptC() as Button1InterruptC; Button1C.ButtonInterrupt -> Button1InterruptC; ButtonBridgeP.ButtonBridge[1] <- Button1C; -#if WITH_OSIAN Button1 = Button1C; -#endif // WITH_OSIAN #if 2 < PLATFORM_BUTTON_COUNT components new ButtonP(FALSE, 2) as Button2C; components new Msp430InterruptC() as Button2InterruptC; Button2C.ButtonInterrupt -> Button2InterruptC; ButtonBridgeP.ButtonBridge[2] <- Button2C; -#if WITH_OSIAN Button2 = Button2C; -#endif // WITH_OSIAN #if 3 < PLATFORM_BUTTON_COUNT components new ButtonP(FALSE, 3) as Button3C; components new Msp430InterruptC() as Button3InterruptC; Button3C.ButtonInterrupt -> Button3InterruptC; ButtonBridgeP.ButtonBridge[3] <- Button3C; - -#if WITH_OSIAN Button3 = Button3C; -#endif // WITH_OSIAN #endif // 3 < PLATFORM_BUTTON_COUNT #endif // 2 < PLATFORM_BUTTON_COUNT diff --git a/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc index 8ee188d088..b91542274e 100644 --- a/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc +++ b/tos/platforms/surf/hardware/rtc/PlatformRealTimeClockP.nc @@ -38,14 +38,10 @@ module PlatformRealTimeClockP { provides { interface StdControl; -#if WITH_OSIAN interface RealTimeClock; -#endif /* WITH_OSIAN */ } } implementation { -#if WITH_OSIAN - /* TI renamed RTC_A_VECTOR to RTC_VECTOR in more recent header * releases. Use the former if we don't have the latter. */ @@ -271,9 +267,4 @@ module PlatformRealTimeClockP { signal RealTimeClock.currentTime(&now, event_set); } } - -#else /* WITH_OSIAN */ - command error_t start () { return FAIL; } - command error_t stop () { return EOFF; } -#endif /* WITH_OSIAN */ } From 0ff971d344242c7a9abc3fd2e76af2e058ba544c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 14 Jun 2011 21:13:00 -0700 Subject: [PATCH 101/411] msp430/02_Serial: document about differences between x2/x5 usci --- tos/chips/msp430/02_Serial | 81 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 tos/chips/msp430/02_Serial diff --git a/tos/chips/msp430/02_Serial b/tos/chips/msp430/02_Serial new file mode 100644 index 0000000000..730e3d0604 --- /dev/null +++ b/tos/chips/msp430/02_Serial @@ -0,0 +1,81 @@ + +The MSP430 family of processors can provide one of three flavors of serial +interfaces, USART (Universal Synchronous Asynchonous Receiver Transmitter), +USCI (Universal Synchronous Communications Interface), and USI (Universal +Serial Interface) modules. + +USART modules are implemented on the 1st generation x1 family processors (ie. +msp430f1611). USART0 can support UART, SPI, or I2C while USART1 does only +UART or SPI. A given module can only be in one mode at any given time so +if different behaviours are needed the module must be arbitrated. + +USI (SPI and I2C) modules are used on smaller processors and aren't currently +supported by TinyOS. + +Starting with the x2 family (and continuing with the x5 family), TI introduced +USCI modules. A USCI module is an improved more capable USART. It is +different so it has its own driver. + +USCI can operate in different modes: UART, SPI, I2C, IRDA. USCIs are +implemented in pairs, A and B modules. An A module supports UART, SPI, and +IrDA while B's only support SPI and I2C. Further there are significant +differences between the x2/x5 family USCI/cpu interfaces. These differences +are principly what is discussed here. + +There are three major differences between the x2 and x5 USCI implementations. +All of these differences show up in the inteface between the USCI modules and +the CPU. These are: + +o Regularity of the register map: + x2 USCI registers spread out. A0/B0 IE/IFG in SFRs, A1/B1 IE/IFG in + dedicated register. A0/B0 IE is in one register, A0/B0 IFG in a different + register. + + x5 registers regular. Same map used for all USCI modules. IE/IFG flags + are in dedicated registers per port. + + +o byte vs. word addressing + x2 registers are in the byte I/O range. + x5 registers can be accessed using either byte or word accesses + + original x5 driver used a word based configuration structure. x2 used + byte based configuration structure. + + X2 control bytes: CTL0 low byte, CTL1 upper byte. + X5 control byte address flipped. CTL1 low order, CTL0 high order. + +o interrupt structure + x2 does not have IV register. (interrupt vector). + + x2 has combined interrupt vectors. A0/B0 rx is on one vector, A0/B0 + tx is on another vector. Etc. I2C vectors are split across multiple + vectors and the vector changes behaviour when I2C is enabled. + + x5 has dedicated vectors per port and an IV register for dispatch. + + +x2 addresses below are absolute, x5 addresses are offsets from the listed + base register + + A0 B0 A1 B1 + x2 x5 05c0, 05e0 0600 0620 + A0 B0 A1 B1 0640, 0660 0680 06a0 + +abctl 5d cd 10 +irtctl, irrctl 5e,5f ce,cf 12,13 +ctl0, ctl1 60,61 68,69 d0,d1 d8,d9 01,00 01,00 +br0, br1 62,63 6a,6b d2,d3 da,db 06,07 06,07 +mctl 64 d4 08 +i2cie 6c dc +stat 65 6d d5 dd 0a 0a +rxbuf,txbuf 66,67 6e,6f d6,d7 de,df 0c,0e 0c,0e +i2coa 0118 17c 10 +i2csa 011a 17e 12 +ie 1c 1c +ifg 1d 1d +iv 1e 1e +A0/B0 IE 0001 +A0/B0 IFG 0003 +A1/B1 IE 0006 +A1/B1 IFG 0007 From 43df8dc44d71a55b477254465330b84a43cd70f4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 16 Jun 2011 02:36:25 -0700 Subject: [PATCH 102/411] rework usage of PMM to better support different Vcore Levels on different processors. --- tos/chips/msp430/pmm/Msp430Pmm.h | 50 ------------------------------ tos/chips/msp430/pmm/Msp430PmmC.nc | 10 ++---- tos/chips/msp430/pmm/Msp430PmmP.nc | 27 ++++++++-------- tos/platforms/surf/PlatformC.nc | 21 +++++-------- tos/platforms/surf/PlatformP.nc | 13 +++++--- tos/platforms/surf/hardware.h | 9 ++++++ 6 files changed, 41 insertions(+), 89 deletions(-) delete mode 100644 tos/chips/msp430/pmm/Msp430Pmm.h diff --git a/tos/chips/msp430/pmm/Msp430Pmm.h b/tos/chips/msp430/pmm/Msp430Pmm.h deleted file mode 100644 index 40b769d902..0000000000 --- a/tos/chips/msp430/pmm/Msp430Pmm.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2010 People Power Co. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef MSP430PMM_H -#define MSP430PMM_H - -/** - * A minimum level of 2 is needed for CC1101 radio operation - * This CC1101 references the integrated CC1101 (RF1A) on - * the cc430f5137 chip used by the surf board. - * - * Other chips have the PMM module so this needs to move at some point. - */ - -#ifndef DEFAULT_VCORE_LEVEL -#define DEFAULT_VCORE_LEVEL 0x2 -#endif - -#endif diff --git a/tos/chips/msp430/pmm/Msp430PmmC.nc b/tos/chips/msp430/pmm/Msp430PmmC.nc index 42b476ec70..8c6d6e91a4 100644 --- a/tos/chips/msp430/pmm/Msp430PmmC.nc +++ b/tos/chips/msp430/pmm/Msp430PmmC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2010 People Power Co. * All rights reserved. * @@ -36,19 +37,14 @@ * Power Management Module * * @author David Moss + * @author Eric B. Decker */ -#include "Msp430Pmm.h" - configuration Msp430PmmC { - provides { - interface Init; - interface Pmm; - } + provides interface Pmm; } implementation { components Msp430PmmP; - Init = Msp430PmmP; Pmm = Msp430PmmP; } diff --git a/tos/chips/msp430/pmm/Msp430PmmP.nc b/tos/chips/msp430/pmm/Msp430PmmP.nc index fe916154ab..43bfc41d36 100644 --- a/tos/chips/msp430/pmm/Msp430PmmP.nc +++ b/tos/chips/msp430/pmm/Msp430PmmP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2010 People Power Co. * All rights reserved. * @@ -34,36 +35,34 @@ /** * @author David Moss + * @author Eric B. Decker + * + * This provides a driver for communicating with the Power Management + * Module provided on X5 family processors. + * + * This module should be called from processor initilization to change + * the VCORE level. It can also be called at other times if a change + * to VCORE is needed (like if we need to run at a faster frequency). + * + * On x5 processors examined, VCORE_LEVEL in the PMM is initilized to 0. + * But this should be checked with the processor data sheet. */ -#include "Msp430Pmm.h" - #if !defined(__MSP430_HAS_PMM__) #error "Msp430PmmP: processor not supported, need PMM" #endif module Msp430PmmP { - provides { - interface Init; - interface Pmm; - } + provides interface Pmm; } implementation { - command error_t Init.init() { - call Pmm.setVoltage(DEFAULT_VCORE_LEVEL); - return SUCCESS; - } - /** * Set the voltage level of the MSP430x core * 0x0 => DVcc > 1.8V * 0x1 => DVcc > 2.0V * 0x2 => DVcc > 2.2V * 0x3 => DVcc > 2.4V - * - * The CC1101 radio core requires 0x2. - * @param level The voltage level between 0-3 */ command void Pmm.setVoltage(uint8_t level) { diff --git a/tos/platforms/surf/PlatformC.nc b/tos/platforms/surf/PlatformC.nc index 703891d443..57f918d06c 100644 --- a/tos/platforms/surf/PlatformC.nc +++ b/tos/platforms/surf/PlatformC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009-2010 People Power Co. * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. @@ -37,17 +38,14 @@ * @author Joe Polastre * @author Cory Sharp * @author David Moss + * @author Eric B. Decker */ #include "hardware.h" configuration PlatformC { - provides { - interface Init as PlatformInit; - } - uses { - interface Init as PeripheralInit; - } + provides interface Init as PlatformInit; + uses interface Init as PeripheralInit; } implementation { @@ -57,13 +55,10 @@ implementation { PeripheralInit = PlatformP.PeripheralInit; /* The following components require no initialization: - * Button - * Rf1a - * RealTimeClock + * Button, Rf1a, RealTimeClock * - * The following components require wiring initialization, but no - * code initialization: - * Usci + * The following components require wiring initialization, but no code initialization: + * Usci */ components PlatformPinsC; @@ -76,7 +71,7 @@ implementation { // No code initialization required; just connect the pins components Msp430PmmC; - PlatformP.Msp430Pmm -> Msp430PmmC; + PlatformP.Pmm -> Msp430PmmC; components PlatformClockC; PlatformP.PlatformClock -> PlatformClockC; diff --git a/tos/platforms/surf/PlatformP.nc b/tos/platforms/surf/PlatformP.nc index 5ad3580fc9..f5fce634be 100644 --- a/tos/platforms/surf/PlatformP.nc +++ b/tos/platforms/surf/PlatformP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -30,16 +31,17 @@ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Eric B. Decker */ +#include "hardware.h" + module PlatformP { - provides { - interface Init; - } + provides interface Init; uses { interface Init as PlatformPins; interface Init as PlatformLed; - interface Init as Msp430Pmm; interface Init as PlatformClock; interface Init as OneWire; @@ -48,6 +50,7 @@ module PlatformP { #endif // PLATFORM_HAS_FLASH interface Init as PeripheralInit; + interface Pmm; } } implementation { @@ -61,8 +64,8 @@ implementation { WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer call PlatformPins.init(); + call Pmm.setVoltage(RADIO_VCORE_LEVEL); call PlatformLed.init(); - call Msp430Pmm.init(); call PlatformClock.init(); call OneWire.init(); diff --git a/tos/platforms/surf/hardware.h b/tos/platforms/surf/hardware.h index 1e24aec4dd..c25c45ef13 100644 --- a/tos/platforms/surf/hardware.h +++ b/tos/platforms/surf/hardware.h @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -32,6 +33,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Peter Bigot + * @author Eric B. Decker */ #ifndef _H_hardware_h @@ -79,4 +81,11 @@ enum { #define ADC12_PIN_AUTO_CONFIGURE 1 #define ADC12_PINS_AVAILABLE 6 +/* + * The cc430f5137 includes the RF1A. When the radio is being used + * the PMM VCORE setting must be at or abore 2. + */ + +#define RADIO_VCORE_LEVEL 2 + #endif // _H_hardware_h From f6fcf22a15b64818bf3cb6f98433e7a30fa7d42f Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 16 Jun 2011 11:29:42 -0700 Subject: [PATCH 103/411] bring in x5xxx/usci tests --- .../msp430/x5xxx/usci/ByteReceive/Makefile | 4 + .../msp430/x5xxx/usci/ByteReceive/TestAppC.nc | 16 +++ .../msp430/x5xxx/usci/ByteReceive/TestP.nc | 63 ++++++++++ .../x5xxx/usci/MultiClientByte/Makefile | 3 + .../x5xxx/usci/MultiClientByte/TestAppC.nc | 20 +++ .../x5xxx/usci/MultiClientByte/TestP.nc | 117 ++++++++++++++++++ .../x5xxx/usci/SplitPhaseMultiClient/Makefile | 3 + .../usci/SplitPhaseMultiClient/TestAppC.nc | 20 +++ .../x5xxx/usci/SplitPhaseMultiClient/TestP.nc | 116 +++++++++++++++++ .../msp430/x5xxx/usci/StreamReceive/Makefile | 4 + .../x5xxx/usci/StreamReceive/TestAppC.nc | 21 ++++ .../msp430/x5xxx/usci/StreamReceive/TestP.nc | 99 +++++++++++++++ .../msp430/x5xxx/usci/StreamSend/Makefile | 4 + .../msp430/x5xxx/usci/StreamSend/TestAppC.nc | 18 +++ .../msp430/x5xxx/usci/StreamSend/TestP.nc | 49 ++++++++ 15 files changed, 557 insertions(+) create mode 100644 apps/tests/msp430/x5xxx/usci/ByteReceive/Makefile create mode 100644 apps/tests/msp430/x5xxx/usci/ByteReceive/TestAppC.nc create mode 100644 apps/tests/msp430/x5xxx/usci/ByteReceive/TestP.nc create mode 100644 apps/tests/msp430/x5xxx/usci/MultiClientByte/Makefile create mode 100644 apps/tests/msp430/x5xxx/usci/MultiClientByte/TestAppC.nc create mode 100644 apps/tests/msp430/x5xxx/usci/MultiClientByte/TestP.nc create mode 100644 apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/Makefile create mode 100644 apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/TestAppC.nc create mode 100644 apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/TestP.nc create mode 100644 apps/tests/msp430/x5xxx/usci/StreamReceive/Makefile create mode 100644 apps/tests/msp430/x5xxx/usci/StreamReceive/TestAppC.nc create mode 100644 apps/tests/msp430/x5xxx/usci/StreamReceive/TestP.nc create mode 100644 apps/tests/msp430/x5xxx/usci/StreamSend/Makefile create mode 100644 apps/tests/msp430/x5xxx/usci/StreamSend/TestAppC.nc create mode 100644 apps/tests/msp430/x5xxx/usci/StreamSend/TestP.nc diff --git a/apps/tests/msp430/x5xxx/usci/ByteReceive/Makefile b/apps/tests/msp430/x5xxx/usci/ByteReceive/Makefile new file mode 100644 index 0000000000..e0afc2dcb7 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/ByteReceive/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestAppC +PFLAGS += -I$(TOSDIR)/lib/serialprintf +include $(MAKERULES) + diff --git a/apps/tests/msp430/x5xxx/usci/ByteReceive/TestAppC.nc b/apps/tests/msp430/x5xxx/usci/ByteReceive/TestAppC.nc new file mode 100644 index 0000000000..57d847915b --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/ByteReceive/TestAppC.nc @@ -0,0 +1,16 @@ +configuration TestAppC { +} implementation { + components TestP; + + components MainC; + TestP.Boot -> MainC; + + components LocalTimeMilliC; + TestP.LocalTime_bms -> LocalTimeMilliC; + + components PlatformSerialC; + TestP.UartByte -> PlatformSerialC; + + components SerialPrintfC; +} + diff --git a/apps/tests/msp430/x5xxx/usci/ByteReceive/TestP.nc b/apps/tests/msp430/x5xxx/usci/ByteReceive/TestP.nc new file mode 100644 index 0000000000..262c4c79fa --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/ByteReceive/TestP.nc @@ -0,0 +1,63 @@ +#include + +/** + * Manual test for UartByte receive functions. + * + * Install to a device and configure the serial port. Cat the serial + * port in one window, and in the other send it data: + * % cat /dev/ttyUSB2 + * % echo 0123456789abcdefghijklmnopqrstuvwxyz > /dev/ttyUSB2 + * + * NOTE: To make this work with human reaction times, the USCI + * implementation allows you to set the ByteTimeScaleFactor to 1000 in + * the implementation source. Don't forget to put it back to 1 after + * testing. + * + * NOTE: Experimentally, this is an unreliable test. Even when the + * UART is waiting, many of the transmitted characters are lost; the + * first one returned might be 'b' or even 'q'. This behavior is + * present with the tmote implementation as well. + */ +module TestP @safe() +{ + uses { + interface Boot; + interface LocalTime as LocalTime_bms; + interface UartByte; + } +} +implementation +{ + + const uint8_t verbose = 0; + const uint8_t wait_times_bt[] = { 0, 32, 128, 255 }; + const uint8_t num_wait_times_bt = sizeof(wait_times_bt) / sizeof(*wait_times_bt); + + event void Boot.booted() { + uint8_t wti = 0; + + printf("# Starting UartByte receive test.\r\n"); + while (1) { + uint8_t wait_bt = wait_times_bt[wti]; + uint32_t start_bms; + uint32_t end_bms; + uint8_t byte = '@'; + error_t rc; + + if (verbose) { + printf("Waiting %d byte times for input\r\n", wait_bt); + } + start_bms = call LocalTime_bms.get(); + rc = call UartByte.receive(&byte, wait_bt); + end_bms = call LocalTime_bms.get(); + if (verbose || (SUCCESS == rc)) { + printf("After %lu bms, result %d, byte value %d ('%c')\r\n", (end_bms - start_bms), rc, byte, byte); + } + if (++wti >= num_wait_times_bt) { + wti = 0; + } + } + } + +} + diff --git a/apps/tests/msp430/x5xxx/usci/MultiClientByte/Makefile b/apps/tests/msp430/x5xxx/usci/MultiClientByte/Makefile new file mode 100644 index 0000000000..6cb240a2d6 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/MultiClientByte/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TestAppC +include $(MAKERULES) + diff --git a/apps/tests/msp430/x5xxx/usci/MultiClientByte/TestAppC.nc b/apps/tests/msp430/x5xxx/usci/MultiClientByte/TestAppC.nc new file mode 100644 index 0000000000..dd0cbed6e6 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/MultiClientByte/TestAppC.nc @@ -0,0 +1,20 @@ +configuration TestAppC { +} implementation { + components TestP; + + components MainC; + TestP.Boot -> MainC; + + components LedsC; + TestP.Leds -> LedsC; + + components new Msp430UsciUartA0C() as Uart1C; + TestP.Resource1 -> Uart1C; + TestP.UartByte1 -> Uart1C; + + components new Msp430UsciUartA0C() as Uart2C; + TestP.Resource2 -> Uart2C; + TestP.UartByte2 -> Uart2C; + +} + diff --git a/apps/tests/msp430/x5xxx/usci/MultiClientByte/TestP.nc b/apps/tests/msp430/x5xxx/usci/MultiClientByte/TestP.nc new file mode 100644 index 0000000000..4b2a03fd9d --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/MultiClientByte/TestP.nc @@ -0,0 +1,117 @@ +#include + +module TestP @safe() +{ + uses { + interface Boot; + interface Leds; + interface Resource as Resource1; + interface UartByte as UartByte1; + interface Resource as Resource2; + interface UartByte as UartByte2; + } + +} +implementation +{ + + void fail () { + call Leds.led1On(); + while (1); + } + +#define ASSERT(_expr) if (! (_expr)) { fail(); } +#define ASSERT_EQUAL(_expr, _value) if ((_value) != (_expr)) { fail(); } + + void dumpHex (unsigned int v) { + int i; + for (i = 12; 0 <= i; i -= 4) { + uint8_t n = (v >> i) & 0x0f; + while (! (UCTXIFG & UCA0IFG)); + UCA0TXBUF = (0x0a <= n) ? ('a' + n - 10) : '0' + n; + } + while (! (UCTXIFG & UCA0IFG)); + } + + + void dumpText (const char* p) { + while (*p) { + call Leds.led1On(); + while (! (UCTXIFG & UCA0IFG)) { + } + call Leds.led1Off(); + UCA0TXBUF = *p++; + } + while (! (UCTXIFG & UCA0IFG)) { + } + } + + void dumpTextUart1 (const char* cp) { + while (*cp) { + ASSERT_EQUAL(SUCCESS, call UartByte1.send(*cp++)); + } + } + + void dumpTextUart2 (const char* cp) { + while (*cp) { + ASSERT_EQUAL(SUCCESS, call UartByte2.send(*cp++)); + } + } + + event void Boot.booted() { +#if 1 + + ASSERT_EQUAL(EOFF, call UartByte1.send('1')); + ASSERT_EQUAL(SUCCESS, call Resource1.immediateRequest()); + ASSERT_EQUAL(SUCCESS, call UartByte1.send('1')); // 1 + dumpTextUart1("\r\nPast first test\r\n"); + ASSERT_EQUAL(EBUSY, call UartByte2.send('2')); +#if ! defined(MSP430XV2_USCI_UART_IDLE_RELEASE_FEATURE) + /* Following only succeeds if idle resource is not released on request */ + ASSERT_EQUAL(FAIL, call Resource2.immediateRequest()); + ASSERT_EQUAL(SUCCESS, call Resource1.release()); + ASSERT_EQUAL(EOFF, call UartByte1.send('1')); +#endif + ASSERT_EQUAL(SUCCESS, call Resource2.immediateRequest()); + ASSERT_EQUAL(SUCCESS, call UartByte2.send('2')); // 2 + /* The following message may be garbled if the receiver has lost sync */ + dumpTextUart2("\r\nSwitched to second client\r\n"); +#else + uint8_t stat; + volatile uint16_t ctr = 0; + + ASSERT_EQUAL(EOFF, call UartByte1.send('1')); + ASSERT_EQUAL(SUCCESS, call Resource1.immediateRequest()); + dumpText("\r\nStarting\r\n"); + dumpHex(UCA0STAT); + dumpText("Line2\r\n"); + dumpText("Line3\r\n"); + ASSERT_EQUAL(SUCCESS, call UartByte1.send('1')); + ASSERT_EQUAL(FAIL, call Resource1.immediateRequest()); + ASSERT_EQUAL(EBUSY, call UartByte2.send('2')); + ASSERT_EQUAL(FAIL, call Resource2.immediateRequest()); + dumpText("Releasing\r\n"); + ASSERT_EQUAL(SUCCESS, call Resource1.release()); + stat = UCA0STAT; + ASSERT_EQUAL(EOFF, call UartByte1.send('1')); + ASSERT_EQUAL(SUCCESS, call Resource1.immediateRequest()); + ctr = 0; + while (++ctr); + dumpText("Reclaimed; releasing again\r\n"); + ASSERT_EQUAL(SUCCESS, call Resource1.release()); + + ASSERT_EQUAL(SUCCESS, call Resource2.immediateRequest()); + dumpText("\r\nClient 2 started\r\n"); + ctr = 0; + while (++ctr); + ASSERT_EQUAL(SUCCESS, call UartByte2.send('2')); + dumpText("Reached end\r\n"); + dumpHex(stat); + dumpText(" was stat\r\n"); +#endif + call Leds.led0On(); + } + + event void Resource1.granted () { } + event void Resource2.granted () { } +} diff --git a/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/Makefile b/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/Makefile new file mode 100644 index 0000000000..6cb240a2d6 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TestAppC +include $(MAKERULES) + diff --git a/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/TestAppC.nc b/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/TestAppC.nc new file mode 100644 index 0000000000..dd0cbed6e6 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/TestAppC.nc @@ -0,0 +1,20 @@ +configuration TestAppC { +} implementation { + components TestP; + + components MainC; + TestP.Boot -> MainC; + + components LedsC; + TestP.Leds -> LedsC; + + components new Msp430UsciUartA0C() as Uart1C; + TestP.Resource1 -> Uart1C; + TestP.UartByte1 -> Uart1C; + + components new Msp430UsciUartA0C() as Uart2C; + TestP.Resource2 -> Uart2C; + TestP.UartByte2 -> Uart2C; + +} + diff --git a/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/TestP.nc b/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/TestP.nc new file mode 100644 index 0000000000..dbbfbf92a0 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/SplitPhaseMultiClient/TestP.nc @@ -0,0 +1,116 @@ +#include + +module TestP @safe() +{ + uses { + interface Boot; + interface Leds; + interface Resource as Resource1; + interface UartByte as UartByte1; + interface Resource as Resource2; + interface UartByte as UartByte2; + } + +} +implementation +{ + + void fail () { + call Leds.led1On(); + while (1); + } + +#define ASSERT(_expr) if (! (_expr)) { fail(); } +#define ASSERT_EQUAL(_expr, _value) if ((_value) != (_expr)) { fail(); } + + void dumpHex (unsigned int v) { + int i; + for (i = 12; 0 <= i; i -= 4) { + uint8_t n = (v >> i) & 0x0f; + while (! (UCTXIFG & UCA0IFG)); + UCA0TXBUF = (0x0a <= n) ? ('a' + n - 10) : '0' + n; + } + while (! (UCTXIFG & UCA0IFG)); + } + + + void dumpText (const char* p) { + while (*p) { + call Leds.led1On(); + while (! (UCTXIFG & UCA0IFG)) { + } + call Leds.led1Off(); + UCA0TXBUF = *p++; + } + while (! (UCTXIFG & UCA0IFG)) { + } + } + + void dumpTextUart1 (const char* cp) { + while (*cp) { + ASSERT_EQUAL(SUCCESS, call UartByte1.send(*cp++)); + } + } + + void dumpTextUart2 (const char* cp) { + while (*cp) { + ASSERT_EQUAL(SUCCESS, call UartByte2.send(*cp++)); + } + } + + uint8_t iteration_limit = 5; + + task void requestClient1 () + { + ASSERT(! call Resource1.isOwner()); + ASSERT_EQUAL(SUCCESS, call Resource1.request()); + } + + task void requestClient2 () + { + ASSERT(! call Resource2.isOwner()); + ASSERT_EQUAL(SUCCESS, call Resource2.request()); + } + + task void acceptClient1 () + { + ASSERT(call Resource1.isOwner()); + dumpTextUart1("\r\nC1" /* "Received control in client 1\r\n" */ ); + ASSERT(! call Resource2.isOwner()); +#if ! defined(MSP430XV2_USCI_UART_IDLE_RELEASE_FEATURE) + dumpTextUart1("\r\nR1r2" /* "Releasing client 1 before requesting client 2\r\n" */); + call Resource1.release(); +#else + dumpTextUart1("\r\nR2"); +#endif /* MSP430XV2_USCI_UART_IDLE_RELEASE_FEATURE */ + post requestClient2(); + } + + task void acceptClient2 () + { + ASSERT(call Resource2.isOwner()); + dumpTextUart2("\r\nC2 "); + ASSERT(! call Resource1.isOwner()); +#if ! defined(MSP430XV2_USCI_UART_IDLE_RELEASE_FEATURE) + dumpTextUart2("\r\nR2r1"); + call Resource2.release(); +#else + dumpTextUart2("\r\nR1"); +#endif /* MSP430XV2_USCI_UART_IDLE_RELEASE_FEATURE */ + if (0 < --iteration_limit) { + post requestClient1(); + } else { + dumpText("\r\nCompleted all iterations\r\n"); + call Leds.led0On(); + } + } + + event void Boot.booted() { + ASSERT(! call Resource1.isOwner()); + ASSERT(! call Resource2.isOwner()); + post requestClient1(); + } + + event void Resource1.granted () { post acceptClient1(); } + event void Resource2.granted () { post acceptClient2(); } +} diff --git a/apps/tests/msp430/x5xxx/usci/StreamReceive/Makefile b/apps/tests/msp430/x5xxx/usci/StreamReceive/Makefile new file mode 100644 index 0000000000..e0afc2dcb7 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/StreamReceive/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestAppC +PFLAGS += -I$(TOSDIR)/lib/serialprintf +include $(MAKERULES) + diff --git a/apps/tests/msp430/x5xxx/usci/StreamReceive/TestAppC.nc b/apps/tests/msp430/x5xxx/usci/StreamReceive/TestAppC.nc new file mode 100644 index 0000000000..81612e7055 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/StreamReceive/TestAppC.nc @@ -0,0 +1,21 @@ +configuration TestAppC { +} implementation { + components TestP; + + components new TimerMilliC() as Periodic; + TestP.Periodic -> Periodic; + + components MainC; + TestP.Boot -> MainC; + + components LedsC; + TestP.Leds -> LedsC; + + components SerialPrintfC; + + components PlatformSerialC; + TestP.UartStream -> PlatformSerialC; + TestP.UartByte -> PlatformSerialC; + +} + diff --git a/apps/tests/msp430/x5xxx/usci/StreamReceive/TestP.nc b/apps/tests/msp430/x5xxx/usci/StreamReceive/TestP.nc new file mode 100644 index 0000000000..74d72f076a --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/StreamReceive/TestP.nc @@ -0,0 +1,99 @@ +#include + +/** + * Manual test for UartStream receive functions. + * + * Use a terminal emulator program connected to the serial port. + * Enter single characters, followed by a block of characters, + * followed by more single characters, per the instructions printed to + * the serial port. */ +module TestP @safe() +{ + uses { + interface Timer as Periodic; + interface Boot; + interface Leds; + interface UartStream; + interface UartByte; + } +} +implementation +{ + enum { RX_SINGLE_NEED = 5 }; + + norace int8_t rx_single_need; + norace int8_t rx_multi_need; + uint8_t rx_buffer[5]; + + norace volatile bool busy; + + task void printStatus () + { + } + + event void Periodic.fired () + { + /* Yes, I know this isn't atomic. Close enough for a test. */ + while (busy) { + ; + } + busy = TRUE; + printf("Awaiting %d block chars and %d single chars\r\n", rx_multi_need, rx_single_need); + busy = FALSE; + } + + event void Boot.booted() { + error_t rv; + + rv = call UartStream.enableReceiveInterrupt(); + printf("# RX enable got %d\r\n", rv); + if (SUCCESS == rv) { + rx_multi_need = sizeof(rx_buffer)-1; + rx_single_need = RX_SINGLE_NEED; + printf("# RX expect %d single, %d block, %d single before disable\r\n", rx_single_need, rx_multi_need, rx_single_need); + printf("# LED2 should toggle for single character receptions\r\n"); + } + call Periodic.startPeriodic(10000); + } + + async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t err) { } + + async event void UartStream.receivedByte (uint8_t byte) + { + while (busy) { + ; + } + busy = TRUE; + printf("Received single char 0x%02x\r\n", byte); + call Leds.led2Toggle(); + if (0 == --rx_single_need) { + error_t rv; + if (0 < rx_multi_need) { + rv = call UartStream.receive(rx_buffer, rx_multi_need); + printf("Completed first single set; block receive request returned %d\r\n", rv); + printf("(LED2 should not toggle during block receive)\r\n"); + } else { + rv = call UartStream.disableReceiveInterrupt(); + printf("Completed second single set; block disable interrupt returned %d\r\n", rv); + printf("(LED2 should stop toggling)\r\n"); + } + } + busy = FALSE; + } + + async event void UartStream.receiveDone (uint8_t* buf, uint16_t len, error_t err) + { + while (busy) { + ; + } + busy = TRUE; + rx_multi_need = 0; + rx_single_need = RX_SINGLE_NEED; + rx_buffer[sizeof(rx_buffer)-1] = 0; + printf("Stream read completed: '%s'\r\n", rx_buffer); + printf("Continuing with %d single chars\r\n", rx_single_need); + printf("(LED2 should toggle for each single character)\r\n"); + busy = FALSE; + } +} + diff --git a/apps/tests/msp430/x5xxx/usci/StreamSend/Makefile b/apps/tests/msp430/x5xxx/usci/StreamSend/Makefile new file mode 100644 index 0000000000..e0afc2dcb7 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/StreamSend/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestAppC +PFLAGS += -I$(TOSDIR)/lib/serialprintf +include $(MAKERULES) + diff --git a/apps/tests/msp430/x5xxx/usci/StreamSend/TestAppC.nc b/apps/tests/msp430/x5xxx/usci/StreamSend/TestAppC.nc new file mode 100644 index 0000000000..9afc55401e --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/StreamSend/TestAppC.nc @@ -0,0 +1,18 @@ +configuration TestAppC { +} implementation { + components TestP; + + components MainC; + TestP.Boot -> MainC; + + components LedsC; + TestP.Leds -> LedsC; + + components SerialPrintfC; + + components PlatformSerialC; + TestP.UartStream -> PlatformSerialC; + + +} + diff --git a/apps/tests/msp430/x5xxx/usci/StreamSend/TestP.nc b/apps/tests/msp430/x5xxx/usci/StreamSend/TestP.nc new file mode 100644 index 0000000000..cc46d16702 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/StreamSend/TestP.nc @@ -0,0 +1,49 @@ +#include + +module TestP @safe() +{ + uses { + interface Boot; + interface Leds; + interface UartStream; + } +} +implementation +{ + void fail () { + call Leds.led1On(); + while (1); + } + +#define ASSERT(_expr) if (! (_expr)) { fail(); } +#define ASSERT_EQUAL(_expr, _value) if ((_value) != (_expr)) { fail(); } + + uint8_t message[] = "This is my long message\r\n"; + uint16_t message_len = sizeof(message) - 1; // Subtract EOS + + int iterations = 1000; + + task void transmitMessage () + { + ASSERT_EQUAL(SUCCESS, call UartStream.send(message, message_len)) + } + + event void Boot.booted() { + printf("Preparing to send message of %d bytes\r\n", message_len); + post transmitMessage(); + } + + async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t err) + { + if (0 < --iterations) { + post transmitMessage(); + } else { + printf("Sent %d chars from %p completed with %d\r\n", len, buf, err); + call Leds.led0On(); + } + } + + async event void UartStream.receivedByte (uint8_t byte) { } + async event void UartStream.receiveDone (uint8_t* buf, uint16_t len, error_t err) { } +} + From c6ca59e7f6cf8933610387afb26217ef727bf463 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 17 Jun 2011 02:47:38 -0700 Subject: [PATCH 104/411] tinynode: remove -mstrict-align. not needed, breaks newer toolchains. removed per Pierre.Castella@tinynode.com. not needed. --- support/make/tinynode.target | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/support/make/tinynode.target b/support/make/tinynode.target index 42c8ddb4f2..0787419397 100644 --- a/support/make/tinynode.target +++ b/support/make/tinynode.target @@ -18,7 +18,10 @@ OPTFLAGS += -Os # Disable MSP430 hardware multiply because it makes MSPGCC die PFLAGS += -mdisable-hwmul -PFLAGS += -mstrict-align + +# removed per Pierre.Castella@tinynode.com, not needed. +# causes problems with newer toolchains that don't support -mstrict-align +# PFLAGS += -mstrict-align $(call TOSMake_include_platform,tinynode) $(call TOSMake_include_platform,msp) From ab47823bc9b9f0f5e1c58d0e1f79a78824930bf4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 18 Jun 2011 04:47:27 -0700 Subject: [PATCH 105/411] deprecate Ieee154PacketLayer.h subsummed by tos/types/Ieee154.h move 802.15.4 header information into tos/types/Ieee154.h --- tos/lib/rfxlink/layers/Ieee154PacketLayer.h | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/tos/lib/rfxlink/layers/Ieee154PacketLayer.h b/tos/lib/rfxlink/layers/Ieee154PacketLayer.h index 2dc29b6cc7..13e0ffb46b 100644 --- a/tos/lib/rfxlink/layers/Ieee154PacketLayer.h +++ b/tos/lib/rfxlink/layers/Ieee154PacketLayer.h @@ -35,8 +35,15 @@ #ifndef __IEEE154PACKETLAYER_H__ #define __IEEE154PACKETLAYER_H__ -typedef nx_struct ieee154_header_t -{ +#warn "Ieee154PacketLayer.h is deprecated. Replaced by Ieee154.h" + +#include + +#ifdef notdef + +// Contents moved to tos/types/Ieee154.h + +typedef nx_struct ieee154_header_t { nxle_uint16_t fcf; nxle_uint8_t dsn; nxle_uint16_t destpan; @@ -44,8 +51,6 @@ typedef nx_struct ieee154_header_t nxle_uint16_t src; } ieee154_header_t; -// These ENUMS were moved to tos/types/Ieee154.h -/* enum ieee154_fcf_enums { IEEE154_FCF_FRAME_TYPE = 0, IEEE154_FCF_SECURITY_ENABLED = 3, @@ -70,11 +75,12 @@ enum iee154_fcf_addr_mode_enums { IEEE154_ADDR_EXT = 3, IEEE154_ADDR_MASK = 3, }; -*/ enum ieee154_fcf_mask_enums { IEEE154_TYPE_MASK = 7, IEEE154_ADDR_MASK = 3, }; +#endif // notdef + #endif//__IEEE154PACKETLAYER_H__ From c77d788af627419b08782707fdc24ca81401004d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 18 Jun 2011 04:49:52 -0700 Subject: [PATCH 106/411] bring in more 802.15.4 header structs from OSIAN --- tos/types/Ieee154.h | 134 +++++++++++++++++++++++++++++++------------- 1 file changed, 94 insertions(+), 40 deletions(-) diff --git a/tos/types/Ieee154.h b/tos/types/Ieee154.h index bc5fde817f..504e057399 100644 --- a/tos/types/Ieee154.h +++ b/tos/types/Ieee154.h @@ -1,28 +1,40 @@ /* - * "Copyright (c) 2008, 2009 The Regents of the University of California. - * All rights reserved." + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2008-2010 The Regents of the University of California. + * All rights reserved. * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. * - */ - /* + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Stephen Dawson-Haggerty - * @version $Revision: 1.1 $ $Date: 2009/08/19 17:54:35 $ + * @author Peter A. Bigot + * @author Eric B. Decker */ #ifndef __IEEE154_H__ @@ -43,17 +55,39 @@ typedef struct { ieee154_laddr_t laddr; } ieee_addr; } ieee154_addr_t; + #define i_saddr ieee_addr.saddr #define i_laddr ieee_addr.laddr +typedef nx_struct ieee154_header_t { + nxle_uint16_t fcf; + nxle_uint8_t dsn; + nxle_uint16_t destpan; + nxle_uint16_t dest; + nxle_uint16_t src; +} ieee154_header_t; + +typedef nx_struct ieee154_fcf_t { + nxle_uint16_t frame_type: 3; + nxle_uint16_t security_enabled: 1; + nxle_uint16_t frame_pending: 1; + nxle_uint16_t ack_request: 1; + nxle_uint16_t pan_id_compression: 1; + nxle_uint16_t _reserved: 3; + nxle_uint16_t dest_addr_mode: 2; + nxle_uint16_t frame_version: 2; + nxle_uint16_t src_addr_mode: 2; +} ieee154_fcf_t; + enum { IEEE154_BROADCAST_ADDR = 0xffff, - IEEE154_LINK_MTU = 127, + IEEE154_BROADCAST_PAN = 0xffff, + IEEE154_LINK_MTU = 127, }; struct ieee154_frame_addr { - ieee154_addr_t ieee_src; - ieee154_addr_t ieee_dst; + ieee154_addr_t ieee_src; + ieee154_addr_t ieee_dst; ieee154_panid_t ieee_dstpan; }; @@ -61,37 +95,57 @@ enum { IEEE154_MIN_HDR_SZ = 6, }; -#if 0 +#ifdef notdef + +// deprecated (does anyone use these?) + struct ieee154_header_base { uint8_t length; uint16_t fcf; uint8_t dsn; uint16_t destpan; } __attribute__((packed)); -#else -#endif +#endif /* notdef */ enum ieee154_fcf_enums { - IEEE154_FCF_FRAME_TYPE = 0, - IEEE154_FCF_SECURITY_ENABLED = 3, - IEEE154_FCF_FRAME_PENDING = 4, - IEEE154_FCF_ACK_REQ = 5, - IEEE154_FCF_INTRAPAN = 6, - IEEE154_FCF_DEST_ADDR_MODE = 10, - IEEE154_FCF_SRC_ADDR_MODE = 14, + IEEE154_FCF_FRAME_TYPE = 0, + IEEE154_FCF_SECURITY_ENABLED = 3, + IEEE154_FCF_FRAME_PENDING = 4, + IEEE154_FCF_ACK_REQ = 5, + IEEE154_FCF_INTRAPAN = 6, + IEEE154_FCF_DEST_ADDR_MODE = 10, + IEEE154_FCF_SRC_ADDR_MODE = 14, }; enum ieee154_fcf_type_enums { - IEEE154_TYPE_BEACON = 0, - IEEE154_TYPE_DATA = 1, - IEEE154_TYPE_ACK = 2, - IEEE154_TYPE_MAC_CMD = 3, + IEEE154_TYPE_BEACON = 0, + IEEE154_TYPE_DATA = 1, + IEEE154_TYPE_ACK = 2, + IEEE154_TYPE_MAC_CMD = 3, + IEEE154_TYPE_MASK = 7, }; -enum iee154_fcf_addr_mode_enums { - IEEE154_ADDR_NONE = 0, - IEEE154_ADDR_SHORT = 2, - IEEE154_ADDR_EXT = 3, +enum ieee154_fcf_addr_mode_enums { + IEEE154_ADDR_NONE = 0, + IEEE154_ADDR_SHORT = 2, + IEEE154_ADDR_EXT = 3, + IEEE154_ADDR_MASK = 3, +}; + + +#ifndef DEFINED_TOS_IEEE154_PAN_ID +// NB: Matches default ActiveMessage group +#define DEFINED_TOS_IEEE154_PAN_ID 22 +#endif // DEFINED_TOS_IEEE154_PAN_ID + +#ifndef DEFINED_TOS_IEEE154_SHORT_ADDRESS +// NB: Matches default ActiveMessage address +#define DEFINED_TOS_IEEE154_SHORT_ADDRESS 1 +#endif // DEFINED_TOS_IEEE154_SHORT_ADDRESS + +enum { + TOS_IEEE154_SHORT_ADDRESS = DEFINED_TOS_IEEE154_SHORT_ADDRESS, + TOS_IEEE154_PAN_ID = DEFINED_TOS_IEEE154_PAN_ID, }; -#endif +#endif /* __IEEE154_H__ */ From 9f453c911ebf18fee403e1d874a45aa2373f2912 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 18 Jun 2011 04:55:24 -0700 Subject: [PATCH 107/411] finish tweaking tos/platforms/surf/.platform --- tos/platforms/surf/.platform | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/tos/platforms/surf/.platform b/tos/platforms/surf/.platform index 9eb470f286..78ddb58cb0 100644 --- a/tos/platforms/surf/.platform +++ b/tos/platforms/surf/.platform @@ -23,11 +23,6 @@ for (split(/\n/, <<'EOText' %T/chips/msp430/x5xxx/timer %T/chips/msp430/x5xxx/usci -# %T/chips/msp430/msp430xv2 -# %T/chips/msp430/msp430xv2/lpm -# %T/chips/msp430/msp430xv2/timer -# %T/chips/msp430/usci - %T/chips/msp430 %T/chips/msp430/pins %T/chips/msp430/timer @@ -35,20 +30,20 @@ for (split(/\n/, <<'EOText' %T/chips/msp430/adc12 %T/chips/msp430/sensors -# %T/chips/memory -# %T/chips/memory/norflash + %T/chips/memory + %T/chips/memory/norflash -# %T/chips/msp430/rf1a -# %T/chips/msp430/rf1a/interfaces -# %T/chips/msp430/rf1a/system -# %T/chips/msp430/rf1a/physical -# %T/chips/msp430/rf1a/am -# %T/chips/msp430/rf1a/ieee154 -# %T/chips/msp430/rf1a/layers + %T/chips/msp430/rf1a + %T/chips/msp430/rf1a/interfaces + %T/chips/msp430/rf1a/system + %T/chips/msp430/rf1a/physical + %T/chips/msp430/rf1a/am + %T/chips/msp430/rf1a/ieee154 + %T/chips/msp430/rf1a/layers %T/lib/timer -# %T/lib/util/keyvaluerecord + %T/lib/util/keyvaluerecord %T/lib/serial %T/lib/serialprintf From ad116aaf16b118d6b6d0b84fc398f28469b4cf8a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 18 Jun 2011 04:56:08 -0700 Subject: [PATCH 108/411] bring in keyvaluerecord from OSIAN --- tos/lib/util/keyvaluerecord/KeyValueRecord.h | 43 ++++++ tos/lib/util/keyvaluerecord/KeyValueRecord.nc | 72 +++++++++ .../util/keyvaluerecord/KeyValueRecordC.nc | 36 +++++ tos/lib/util/keyvaluerecord/KeyValueRecordP.h | 66 ++++++++ .../util/keyvaluerecord/KeyValueRecordP.nc | 141 ++++++++++++++++++ .../util/keyvaluerecord/tests/Test1/Makefile | 4 + .../keyvaluerecord/tests/Test1/TestAppC.nc | 17 +++ .../util/keyvaluerecord/tests/Test1/TestP.nc | 47 ++++++ .../util/keyvaluerecord/tests/Test2/Makefile | 4 + .../keyvaluerecord/tests/Test2/TestAppC.nc | 21 +++ .../util/keyvaluerecord/tests/Test2/TestP.nc | 65 ++++++++ .../util/keyvaluerecord/tests/fake_tunit.h | 25 ++++ 12 files changed, 541 insertions(+) create mode 100644 tos/lib/util/keyvaluerecord/KeyValueRecord.h create mode 100644 tos/lib/util/keyvaluerecord/KeyValueRecord.nc create mode 100644 tos/lib/util/keyvaluerecord/KeyValueRecordC.nc create mode 100644 tos/lib/util/keyvaluerecord/KeyValueRecordP.h create mode 100644 tos/lib/util/keyvaluerecord/KeyValueRecordP.nc create mode 100644 tos/lib/util/keyvaluerecord/tests/Test1/Makefile create mode 100644 tos/lib/util/keyvaluerecord/tests/Test1/TestAppC.nc create mode 100644 tos/lib/util/keyvaluerecord/tests/Test1/TestP.nc create mode 100644 tos/lib/util/keyvaluerecord/tests/Test2/Makefile create mode 100644 tos/lib/util/keyvaluerecord/tests/Test2/TestAppC.nc create mode 100644 tos/lib/util/keyvaluerecord/tests/Test2/TestP.nc create mode 100644 tos/lib/util/keyvaluerecord/tests/fake_tunit.h diff --git a/tos/lib/util/keyvaluerecord/KeyValueRecord.h b/tos/lib/util/keyvaluerecord/KeyValueRecord.h new file mode 100644 index 0000000000..6cf6a7ab32 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/KeyValueRecord.h @@ -0,0 +1,43 @@ +/** + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + * @author David Moss + */ + +#ifndef KEYVALUERECORD_H +#define KEYVALUERECORD_H + +#ifndef KEYVALUERECORD_HISTORY_SIZE +#define KEYVALUERECORD_HISTORY_SIZE 5 +#endif + +#define UQ_KEYVALUERECORD "Unique.KeyValueRecord" + +#endif diff --git a/tos/lib/util/keyvaluerecord/KeyValueRecord.nc b/tos/lib/util/keyvaluerecord/KeyValueRecord.nc new file mode 100644 index 0000000000..ec29761133 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/KeyValueRecord.nc @@ -0,0 +1,72 @@ +/* Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Maintain a fixed-size FIFO history of key/value pairs on a per-client basis. + * + * @author David Moss + * @author Peter A. Bigot + */ +interface KeyValueRecord { + + /** + * Find out if we've seen this key / value combo got inserted recently + * + * @param key + * @param value + * @return TRUE if this key value pair was inserted in the log recently + */ + command bool hasSeen(uint16_t key, uint16_t value); + + + /** + * Insert a key / value pair into the log + * @param key + * @param value + */ + command void insert(uint16_t key, uint16_t value); + +#if WITH_UNIT_TESTS + /** Make the number of configured clients visible to unit testing. */ + command int numClients_ (); + + /** Make the current size of a specific client's history visible to + * unit testing. */ + command int historySize_ (); + + /** Make the contents of a specific client's history visible to unit + * testing. */ + command void* history_ (); + +#endif /* WITH_UNIT_TESTS */ + +} diff --git a/tos/lib/util/keyvaluerecord/KeyValueRecordC.nc b/tos/lib/util/keyvaluerecord/KeyValueRecordC.nc new file mode 100644 index 0000000000..b3d8d29d3d --- /dev/null +++ b/tos/lib/util/keyvaluerecord/KeyValueRecordC.nc @@ -0,0 +1,36 @@ + + +/** + * This component will temporarily log key/value pairs. You can insert + * a key/value pair, and then check back later to see if you recently + * inserted some pair. As more key/value pairs are added, the oldest ones + * fall off. + * + * The real purpose is to do duplicate packet filtering, where a node with some + * address (the key) will some some data sequence number (the value). + * For every packet received, we log the address and DSN. If we receive another + * packet, we can check back in our log to see if the packet is a duplicate. + * + * This the value doesn't have to be a data sequence number. For duplicate + * payload filtering, the value can be a CRC of the received data. Keep in + * mind that if this is used in two separate areas of an application, there + * could occasionally be conflicts where key/value pairs from one context + * might be the same as key/value pairs inserted from a different context. + * + * @author David Moss + */ + +#include "KeyValueRecord.h" + +generic configuration KeyValueRecordC() { + provides { + interface KeyValueRecord; + } +} + +implementation { + + components KeyValueRecordP; + KeyValueRecord = KeyValueRecordP.KeyValueRecord[unique(UQ_KEYVALUERECORD)]; + +} diff --git a/tos/lib/util/keyvaluerecord/KeyValueRecordP.h b/tos/lib/util/keyvaluerecord/KeyValueRecordP.h new file mode 100644 index 0000000000..8b29bea7f4 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/KeyValueRecordP.h @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +/** + * Private implementation header for KeyValueRecord. + * + * Include this only in the implementation section of + * KeyValueRecordP.nc and any unit tests that need access to this + * information. + * + * @author Peter A. Bigot */ + +#ifndef KeyValueRecordP_h_ +#define KeyValueRecordP_h_ + +#include "KeyValueRecord.h" + +/** Structure holding a single key/value pair */ +typedef struct key_value_record_t { + /** The key */ + uint16_t key; + + /** The value */ + uint16_t value; +} key_value_record_t; + +/** Structure holding the history for a single client */ +typedef struct client_record_t { + /** The number of valid entries in the table */ + uint8_t size; + /** The index of the next table entry to write */ + uint8_t write_index; + /** The history of records from this client */ + key_value_record_t history[KEYVALUERECORD_HISTORY_SIZE]; +} client_record_t; + +#endif // KeyValueRecordP_h_ diff --git a/tos/lib/util/keyvaluerecord/KeyValueRecordP.nc b/tos/lib/util/keyvaluerecord/KeyValueRecordP.nc new file mode 100644 index 0000000000..615d515b22 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/KeyValueRecordP.nc @@ -0,0 +1,141 @@ +/* Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the People Power Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + + +#include "KeyValueRecord.h" + +/** + * @author David Moss + * @author Peter A. Bigot + */ +module KeyValueRecordP { + provides { + interface KeyValueRecord[uint8_t client]; + } +} + +implementation { + +#include "KeyValueRecordP.h" + + enum { + NUM_CLIENTS = uniqueCount(UQ_KEYVALUERECORD), + }; + + /** History for all clients. + * @note we rely on zero-initialization of this structure by the + * comiler or loader. */ + client_record_t client_data[NUM_CLIENTS]; + + /***************** KeyValueRecord Commands ****************/ + /** + * Find out if we've seen this key / value combo got inserted recently + * + * @param key + * @param value + * @return TRUE if this key value pair was inserted in the log recently + */ + command bool KeyValueRecord.hasSeen[uint8_t client](uint16_t key, uint16_t value) { + int i; + client_record_t* crp = client_data + client; + + // No history for invalid clients + if (client >= NUM_CLIENTS) { + return FALSE; + } + for(i = 0; i < crp->size; ++i) { + key_value_record_t* rp = crp->history + i; + if ((rp->key == key) && (rp->value == value)) { + // Match found + return TRUE; + } + } + // No match in history + return FALSE; + } + + /** + * Insert a key / value pair into the log + * @param key + * @param value + */ + command void KeyValueRecord.insert[uint8_t client](uint16_t key, uint16_t value) { + client_record_t* crp = client_data + client; + + // No history for invalid clients + if (client >= NUM_CLIENTS) { + return; + } + atomic { + key_value_record_t* rp = crp->history + crp->write_index; + rp->key = key; + rp->value = value; + // Determine next location to store + if (crp->size < (sizeof(crp->history) / sizeof(*crp->history))) { + crp->size += 1; + if (crp->size < (sizeof(crp->history) / sizeof(*crp->history))) { + crp->write_index += 1; + } else { + crp->write_index = 0; + } + } else { + crp->write_index = (crp->write_index + 1) % crp->size; + } + } + } + +#if WITH_UNIT_TESTS + command int KeyValueRecord.numClients_[uint8_t client]() + { + return NUM_CLIENTS; + } + + command int KeyValueRecord.historySize_[uint8_t client]() + { + if (client >= NUM_CLIENTS) { + return -1; + } + return client_data[client].size; + } + + command void* KeyValueRecord.history_[uint8_t client]() + { + if (client >= NUM_CLIENTS) { + return 0; + } + return client_data[client].history; + } + +#endif // WITH_UNIT_TESTS + +} diff --git a/tos/lib/util/keyvaluerecord/tests/Test1/Makefile b/tos/lib/util/keyvaluerecord/tests/Test1/Makefile new file mode 100644 index 0000000000..a86906e2a3 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/tests/Test1/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestAppC +PFLAGS += -I../.. -I.. -DWITH_UNIT_TESTS -I$(TOSDIR)/lib/serialprintf $(XCFLAGS) +include $(MAKERULES) + diff --git a/tos/lib/util/keyvaluerecord/tests/Test1/TestAppC.nc b/tos/lib/util/keyvaluerecord/tests/Test1/TestAppC.nc new file mode 100644 index 0000000000..4b4b501150 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/tests/Test1/TestAppC.nc @@ -0,0 +1,17 @@ +#include "stdio.h" + +configuration TestAppC { +} + +implementation { + + components TestP; + + components new KeyValueRecordC() as KVR1C; + TestP.KVR1 -> KVR1C; + + components MainC; + TestP.Boot -> MainC; + + components SerialPrintfC; +} diff --git a/tos/lib/util/keyvaluerecord/tests/Test1/TestP.nc b/tos/lib/util/keyvaluerecord/tests/Test1/TestP.nc new file mode 100644 index 0000000000..7948ad565f --- /dev/null +++ b/tos/lib/util/keyvaluerecord/tests/Test1/TestP.nc @@ -0,0 +1,47 @@ +#include "fake_tunit.h" + +module TestP { + uses { + interface Boot; + interface KeyValueRecord as KVR1; + } +} + +implementation { + +#include "KeyValueRecordP.h" + + event void Boot.booted() { + int i = 0; + + printf("KeyValueRecord test 1\n"); + assertEqual(call KVR1.numClients_(), 1); + assertEqual(call KVR1.historySize_(), 0); + + // Have not seen zero/zero, even at startup + assertTrue(! call KVR1.hasSeen(0, 0)); + + // Base test + assertTrue(! call KVR1.hasSeen(1, 0)); + + // Fill history + while (i < KEYVALUERECORD_HISTORY_SIZE) { + call KVR1.insert(1, i); + assertEqual(call KVR1.historySize_(), i+1); + assertTrue(! call KVR1.hasSeen(0, 0)); + assertTrue(call KVR1.hasSeen(1, 0)); + assertTrue(call KVR1.hasSeen(1, i)); + ++i; + } + + // Test FIFO ejection + assertEqual(call KVR1.historySize_(), KEYVALUERECORD_HISTORY_SIZE); + assertTrue(call KVR1.hasSeen(1, 0)); + assertTrue(! call KVR1.hasSeen(1, i)); + call KVR1.insert(1, i); + assertEqual(call KVR1.historySize_(), KEYVALUERECORD_HISTORY_SIZE); + assertTrue(! call KVR1.hasSeen(1, 0)); + assertTrue(call KVR1.hasSeen(1, i)); + } + +} diff --git a/tos/lib/util/keyvaluerecord/tests/Test2/Makefile b/tos/lib/util/keyvaluerecord/tests/Test2/Makefile new file mode 100644 index 0000000000..a86906e2a3 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/tests/Test2/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestAppC +PFLAGS += -I../.. -I.. -DWITH_UNIT_TESTS -I$(TOSDIR)/lib/serialprintf $(XCFLAGS) +include $(MAKERULES) + diff --git a/tos/lib/util/keyvaluerecord/tests/Test2/TestAppC.nc b/tos/lib/util/keyvaluerecord/tests/Test2/TestAppC.nc new file mode 100644 index 0000000000..0263ea3d14 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/tests/Test2/TestAppC.nc @@ -0,0 +1,21 @@ +#include "stdio.h" + +configuration TestAppC { +} + +implementation { + + components TestP; + + components new KeyValueRecordC() as KVR1C; + TestP.KVR1 -> KVR1C; + components new KeyValueRecordC() as KVR2C; + TestP.KVR2 -> KVR2C; + components new KeyValueRecordC() as KVR3C; + TestP.KVR3 -> KVR3C; + + components MainC; + TestP.Boot -> MainC; + + components SerialPrintfC; +} diff --git a/tos/lib/util/keyvaluerecord/tests/Test2/TestP.nc b/tos/lib/util/keyvaluerecord/tests/Test2/TestP.nc new file mode 100644 index 0000000000..bf9418eb26 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/tests/Test2/TestP.nc @@ -0,0 +1,65 @@ +#include "fake_tunit.h" + +module TestP { + uses { + interface Boot; + interface Leds; + interface KeyValueRecord as KVR1; + interface KeyValueRecord as KVR2; + interface KeyValueRecord as KVR3; + } +} + +implementation { + +#include "KeyValueRecordP.h" + + event void Boot.booted() { + int i = 0; + + printf("KeyValueRecord test 2\n"); + assertEqual(call KVR1.numClients_(), 3); + assertEqual(call KVR2.numClients_(), 3); + assertEqual(call KVR3.numClients_(), 3); + + assertEqual(call KVR1.historySize_(), 0); + assertEqual(call KVR2.historySize_(), 0); + assertEqual(call KVR3.historySize_(), 0); + + call KVR1.insert(1, 0); + assertEqual(call KVR1.historySize_(), 1); + assertEqual(call KVR2.historySize_(), 0); + assertEqual(call KVR3.historySize_(), 0); + + assertTrue(call KVR1.hasSeen(1, 0)); + assertTrue(! call KVR2.hasSeen(1, 0)); + assertTrue(! call KVR3.hasSeen(1, 0)); + + i = 0; + while (i < KEYVALUERECORD_HISTORY_SIZE) { + call KVR2.insert(1, i); + ++i; + assertEqual(call KVR2.historySize_(), i); + } + assertEqual(call KVR1.historySize_(), 1); + assertEqual(call KVR2.historySize_(), KEYVALUERECORD_HISTORY_SIZE); + assertEqual(call KVR3.historySize_(), 0); + assertTrue(call KVR1.hasSeen(1, 0)); + assertTrue(call KVR2.hasSeen(1, 0)); + assertTrue(! call KVR3.hasSeen(1, 0)); + + while (i < 2*KEYVALUERECORD_HISTORY_SIZE) { + call KVR2.insert(1, i); + ++i; + assertEqual(call KVR2.historySize_(), KEYVALUERECORD_HISTORY_SIZE); + } + assertEqual(call KVR1.historySize_(), 1); + assertEqual(call KVR2.historySize_(), KEYVALUERECORD_HISTORY_SIZE); + assertEqual(call KVR3.historySize_(), 0); + assertTrue(call KVR1.hasSeen(1, 0)); + assertTrue(! call KVR2.hasSeen(1, 0)); + assertTrue(! call KVR3.hasSeen(1, 0)); + + } + +} diff --git a/tos/lib/util/keyvaluerecord/tests/fake_tunit.h b/tos/lib/util/keyvaluerecord/tests/fake_tunit.h new file mode 100644 index 0000000000..4a711647d2 --- /dev/null +++ b/tos/lib/util/keyvaluerecord/tests/fake_tunit.h @@ -0,0 +1,25 @@ +#ifndef _fake_tunit_h +#define _fake_tunit_h + +#define assertEqual_int(_v1,_v2) { \ + int v1 = _v1; \ + int v2 = _v2; \ + if (v1 == v2) { \ + printf("pass: " #_v1 " == " #_v2 " [%d]\n", v1); \ + } else { \ + printf("FAIL: " #_v1 " [%d] != " #_v2 " [%d]\n", v1, v2); \ + } \ +} + +#define assertTrue(_v) { \ + bool v = _v; \ + if (v) { \ + printf("pass: " #_v "\n"); \ + } else { \ + printf("FAIL: " #_v "\n"); \ + } \ +} + +#define assertEqual(_v1, _v2) assertEqual_int(_v1, _v2) + +#endif /* fake_tunit_h */ From b5835a7156b03ce01d504ac50701e81d09ccda46 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 19 Jun 2011 14:09:56 -0700 Subject: [PATCH 109/411] update release notes --- 11_Release_Notes | 35 ++++++++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 9 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index afc26cdf4b..c0b4a10be2 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -1,15 +1,15 @@ Major Changes to the msp430 core software: -Welcome to a major rework of the core msp430 files. Originally, msp430 support -was for the first generation msp430 cpus. Later the MSP430X and MSP430XV2 -processor chips were released by TI. As newer cpu chips have been ported to -TinyOS the architecture of the core msp430 s/w has needed changes. +Welcome to a major rework of the core msp430 files. Originally, tinyos msp430 +support was for the first generation msp430 cpus. Later the MSP430X and +MSP430XV2 processor chips were released by TI. As newer cpu chips have been +ported to TinyOS the architecture of the core msp430 s/w has needed changes. Major areas of impact include: peripheral register access, clock modules, dma support, usart vs. usci support, and interrupt architecture. In addition the s/w has been reorganized to support major differences between the cpus by -grouping support into families. +grouping support into families (see below for what this means). This release has also had initial testing done on newer toolchains. The msp430 core has been modified to support toolchains listed below. Test builds have been @@ -20,11 +20,11 @@ done using the following: changes, 26xx processors. Does not properly support x5 chips. mspgcc4.4.5(20110312) Initial mspgcc4 supports x5 chips. experimental. - mspgcc4.5.2 (uniarch) Uniarch varient supports all chips. experimental. - slated to become new main toolchain. + mspgcc4.5.2 (mspgcc) Uniarch varient supports all chips. experimental. + (20110612) slated to become new main toolchain. -It is recommended that all verification work be done using the uniarch toolchain. +It is recommended that all verification work be done using the 20110612 toolchain. The sooner we get that toolchain squared away the better. @@ -106,11 +106,28 @@ Other notable changes: - X5 (T0A, T1A) Msp430Timers. T0A 32KiHz, T1A 1MiHz timebase. - X5 UCS clock driver. tos/chips/x5xxx/timer/Msp430XV2Clock*. + - X5 add support for cc430f5137 and PeoplePower Co. Surf board. + - X5 pmm, rtc, crc16, flash, onewire, rf1a, wdt support + + +* Other Additions + + - KeyValueRecord code. Used by Surf radio code. + + - Better documentation on differences between x2 USCI and x5 USCI + tos/chips/msp430/02_Serial. + + - Better documentation about what chips are supported. 00_Chip_Notes and 01_Dependencies. + + - Using TI functional presence indicators (__MSP430_HAS_) protect + modules from being included if the cpu being used doesn't have them. This + makes figuring out what is happening much easier when adding new processors. WARNING: tosthreads hasn't been modified for the new core msp430 structure. TosThreads duplicated files rather than modified in place. This creates -a lot more work and is not recommended. +a lot more work and is not recommended. Cloning for tosthreads creates a +maintanence headache. TosThreads should be modified to place any necessary hooks into the actual device drivers themselves rather than duplicating the files and then shadowing. From 7c5d494d695ec5660781e8f9261216f6488ddaca Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 19 Jun 2011 15:36:24 -0700 Subject: [PATCH 110/411] update repo notes --- 00_Repo_Notes | 39 +++++++++------------------------------ 1 file changed, 9 insertions(+), 30 deletions(-) diff --git a/00_Repo_Notes b/00_Repo_Notes index bd6e4ae03b..819722a150 100644 --- a/00_Repo_Notes +++ b/00_Repo_Notes @@ -15,9 +15,6 @@ The msp430.git repo is located at: git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git (r/w) git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git (read-only) -The msp430.git repo on hinrg belongs to group cire-git. Users needing -repo write access need to belong to the cire-git group. - The msp430.git repo tracks the hinrg t2 git repo which in turn imports from the main svn T2 trunk. @@ -35,14 +32,9 @@ svn t2 mainline ---| - master_vhsb ----------------------- | | | | | | - ------ mm-z1 ------------------------------------ - | | | | | - | | | | | - --- z1-pu --- | --- x5-pu --- - | | - | | - --- mm-pu ------ - + --------------------------msp430-int ---------------- + | + ----- z1-pu ---- * Branches: @@ -55,18 +47,15 @@ master-vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main mm_core. This collapsage forms the majority of the work of merging the trees and there isn't much sense in reinventing the wheel. -mm-z1: main consolidation branch for the mm-z1 integration. It represents the - current released version of the branch. Later will be renamed to mm-z1. +msp430-int: main consolidation branch for the msp430 core. It represents the + current released version of the branch. + + includes all three major families (x1, x2, and x5). Major cpu dependancies + held in tos/chips/msp430/{x1xxx,x2xxx,x5xxx} z1-pu: working directory for Zolertia modifications. From verification of mm-z1 combined tree. -mm-pu: mammark (mm4) proposed updates. Updated from the mm_core tree that should - be integrated into the msp430 integration branch. - -x5-pu: integrate x5xxx family into result of mm-z1. Built on mm-z1 so will include - all three major families (x1, x2, and x5). Major cpu dependancies held in - tos/chips/msp430/{x1xxx,x2xxx,x5xxx} To pull a working branch do the following: @@ -76,15 +65,5 @@ To pull a working branch do the following: cd msp430 git config --add push.default matching # make sure only existing branches get pushed. # only effects rw repos - git checkout -t origin/z1-pu # tracking branch, will be on z1-pu when done + git checkout -t origin/msp430-int # tracking branch, will be on msp430-int when done git checkout -b work # local working branch - - -To start with a read-write copy of the repo replace the clone with: - - git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git # grab from ro place - -You need to have a login on hinrg and belong to group cire-git. - -The other way to get your changes into the repo is to send a pointer to your git repo to -me (cire831@gmail.com) and I'll pull the changes and then push them up to hinrg. From c687d074e9116959ec4bd4e2f0abf23f01c452da Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 20 Jun 2011 01:59:17 -0700 Subject: [PATCH 111/411] improve gdb support docs --- tos/chips/msp430/99_gdb/00_README | 62 +++++++++++++++++++++++++++++++ tos/chips/msp430/99_gdb/gdbinit | 28 -------------- 2 files changed, 62 insertions(+), 28 deletions(-) create mode 100644 tos/chips/msp430/99_gdb/00_README diff --git a/tos/chips/msp430/99_gdb/00_README b/tos/chips/msp430/99_gdb/00_README new file mode 100644 index 0000000000..4c172325f4 --- /dev/null +++ b/tos/chips/msp430/99_gdb/00_README @@ -0,0 +1,62 @@ +This directory has files that makes using gdb easier with the msp430. + +So one is debugging the application located in apps/. + +For the purpose of this tutorial, let's build for the z1 platform. The +z1 uses a msp430f2617 processor which belongs to the x2 family. This will +be needed when deciding which cpu specific gdb support file to use. + +First one must build the application with debugging information. This can +be done using either "make debug z1" or "make debugopt z1". The later is +preferred because it optimizes as well as including debugging information. + +Debugging is done via a jtag port connected to a gdb server that implements +the remote gdb protocol. Older toolchains supplied msp430-jtag for +manipulating the jtag port and msp430-gdbproxy for the gdb server. The +problem with these older tools is they only handle early TI processors +and are not open source so can not be easily extended for the newer +processors. These two tools have been replaced by mspdebug which is +open source. Mspdebug works well for the x5 processors but is somewhat +flakey for the x2. + +GDB can execute gdb run commands from the execution directory and your home +directory. These files are named .gdbinit. The init file in the build +directory is build/z1/.gdbinit. But keep in mind that if one does a "make +clean" it wipes out build and everything below it. So the thing to do is +place the .gdbinit file and friends in the apps/ directory and link +from build/z1. See below. + +CPU dependent gdb command files are also available for the various flavors +of msp430 cpus. Sourcing one of these files will make available various +commands for looking at different parts of the processor. They need to be +in apps/ for the same reason as gdbinit. + +To set up the application directory, apps/ do the following: + (assuming in the top level of the tinyos root) + + cd apps/ + cp ../../tos/chips/msp430/99_gdb/gdbinit ./.gdbinit + cp ../../tos/chips/msp430/99_gdb/gdb_x2 ./.gdb_x2 + make debugopt z1 && mspdebug uif -qjd /dev/ttyUSB0 --force-reset \ + \"prog build/z1/main.exe\" + +The --force-reset make mspdebug behave better with x2 processors. Your +mileage may vary. + +now that the build directory exists, we can finish preping the gdb files. + + cd build/z1 + ln -s ../../gdbinit + +Fire up the gdb server. Probably from another terminal window. + + mspdebug uif -qjd /dev/ttyUSB0 "opt gdb_loop true" gdb + +And connect to the beasty using gdb. From the apps/ directory: + + msp430-gdb build/z1/main.exe + +Emacs also has a nice interface to all of this including a source level +debugging mechanism. From within emacs use M-x gdb and then + + Run gdb (like this): msp430-gdb --annotate=3 build/z1/main.exe diff --git a/tos/chips/msp430/99_gdb/gdbinit b/tos/chips/msp430/99_gdb/gdbinit index 3b614f5102..18eb559ac3 100644 --- a/tos/chips/msp430/99_gdb/gdbinit +++ b/tos/chips/msp430/99_gdb/gdbinit @@ -1,32 +1,4 @@ -# one is in the apps/ directory when building the application. -# "make z1" in this directory will create the resultant files in the -# build/z1 directory. The z1 is based on a msp430f2617. -# -# One can then run gdb from the apps/ directory via -# "gdb build/z1/main.exe", or from within emacs via M-x gdb and then -# Run gdb (like this): gdb --annotate=3 build/z1/main.exe -# -# Note you have to replace the "gdb" with the appropriate gdb for your -# processor. For example, when using the telosb then msp430-gdb is the -# gdb you want to use. -# -# GDB can execute gdb run commands from the execution directory and your -# home directory. These files are named .gdbinit. The init file in the -# build directory is build/telosb/.gdbinit. But keep in mind that if -# one does a "make clean" it wipes out build and everything below it. So -# the thing to do is place the .gdbinit file and friends in the apps/ -# directory and link from build/z1. ie. "cd build/z1; ln -s ../../.gdbinit; -# cd ../.." -# -# CPU dependent gdb command files are also available for the various flavors -# of msp430 cpus. Sourcing one of these files will make available various -# commands for looking a different parts of the processor. -# -# GDB for the msp430 communicates with the cpu under test via JTAG h/w and -# a proxy using a remote protocol. -# - #source ../../.gdb_x1 source ../../.gdb_x2 #source ../../.gdb_x5 From d9b32f9ff75f6d2fb1534307a2f06d56873de84d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 21 Jun 2011 01:15:53 -0700 Subject: [PATCH 112/411] clean up various /** comments for nesdoc --- tos/chips/msp430/adc12/HplAdc12P.nc | 4 +++- tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc | 2 -- tos/chips/msp430/dma/HplMsp430DmaChannel.nc | 4 ++-- tos/chips/msp430/dma/HplMsp430DmaChannelP.nc | 2 +- tos/chips/msp430/dma/HplMsp430DmaControl.nc | 4 ++-- tos/chips/msp430/rf1a/layers/UniqueReceiveC.nc | 2 ++ tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc | 2 +- .../msp430/x5xxx/timer/Msp430XV2ClockControl.nc | 12 ++++++------ .../msp430/x5xxx/timer/Msp430XV2ClockControlP.nc | 2 +- tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc | 2 +- tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h | 2 +- 11 files changed, 20 insertions(+), 18 deletions(-) diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc index e2f672faed..86ff2e8f8c 100644 --- a/tos/chips/msp430/adc12/HplAdc12P.nc +++ b/tos/chips/msp430/adc12/HplAdc12P.nc @@ -36,7 +36,9 @@ * @author Eric B. Decker * @see Please refer to TEP 101 for more information about this component and its * intended use. - * + */ + +/** * The HplAdc12 interface exports low-level access to the ADC12 registers * of the MSP430 MCU. * diff --git a/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc b/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc index 752825f13f..e6bbdb96db 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc @@ -34,7 +34,6 @@ */ /** - * * This interface provides access to the ADC12 on the level of HAL. It can be * used to sample a single adc channel once or repeatedly (one event is * signalled per conversion result) or perform multiple conversions for a @@ -138,7 +137,6 @@ interface Msp430Adc12SingleChannel async command error_t configureMultiple( const msp430adc12_channel_config_t *ONE config, uint16_t *COUNT(numSamples) buffer, uint16_t numSamples, uint16_t jiffies); /** - * * Configures the ADC for sampling a channel multiple times repeatedly. Any * previous configuration will be overwritten. In contrast to the * configureSingleRepeat() command this configuration means that diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc index 4fb7caea69..ef4784dec7 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc @@ -42,7 +42,7 @@ interface HplMsp430DmaChannel { - /* + /** * Set/Get the DMA Channel Control word. * * Use cpu defines to control a dma channel. ie. @@ -85,7 +85,7 @@ interface HplMsp430DmaChannel { async command void setSize(uint16_t sz); async command uint16_t getSize(); - /* + /** * Channel Reset * * Turn a dma channel off. Force reset. diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc index cb0a87fd39..a212bb1327 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc @@ -43,7 +43,7 @@ #error "HplMsp430DmaChannelP: processor not supported, need DMA_3 or DMAX_3" #endif -/* +/** * Define a DMA channel. * * DMAxCTL: Channel control word. ie. DMA0CTL (control word for diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc index 53a573e342..a5a82c59e9 100644 --- a/tos/chips/msp430/dma/HplMsp430DmaControl.nc +++ b/tos/chips/msp430/dma/HplMsp430DmaControl.nc @@ -39,7 +39,7 @@ #include "Msp430Dma.h" interface HplMsp430DmaControl { - /* + /** * setOpControl * getOpControl * @@ -50,7 +50,7 @@ interface HplMsp430DmaControl { async command void setOpControl(uint16_t op); async command uint16_t getOpControl(); - /* + /** * reset * * Fully reset the dma engines. Clears out any operational Control diff --git a/tos/chips/msp430/rf1a/layers/UniqueReceiveC.nc b/tos/chips/msp430/rf1a/layers/UniqueReceiveC.nc index ffdef5a778..c74e81465c 100644 --- a/tos/chips/msp430/rf1a/layers/UniqueReceiveC.nc +++ b/tos/chips/msp430/rf1a/layers/UniqueReceiveC.nc @@ -33,6 +33,8 @@ */ /** + * UniqueReceive: check a dsn/source against recent history + * * If the source address and dsn number of a newly received message matches * our recent history, we drop the message because we've already seen it. * This should sit near the bottom of the stack, after packets have been diff --git a/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc index 93eee6b123..5a36612c6a 100644 --- a/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc +++ b/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc @@ -42,7 +42,7 @@ * @author Eric B. Decker */ -/* +/** * Currently only support TB3 and TB7 modules */ #if !defined(__MSP430_HAS_TB3__) && !defined(__MSP430_HAS_TB7__) diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc index a950b4fdba..48bac2661b 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControl.nc @@ -46,7 +46,7 @@ */ interface Msp430XV2ClockControl { - /* + /** * Configure the unified clock system for a specified DCO (MCLK) * rate. Generally, the parameter is a value from the * Msp430XV2DcoConfig_e enumeration, but non-default implementations @@ -59,7 +59,7 @@ interface Msp430XV2ClockControl { */ async command void configureUnifiedClockSystem (int dco_config); - /* + /** * Configure the 32KHz (T32Khz) and 1MHz (TMicro) timers * * Upon completion, the timers are configured but off. Invoking @@ -67,7 +67,7 @@ interface Msp430XV2ClockControl { */ command void configureTimers (); - /* + /** * Start the 32KHz timer. * * Upon completion of this command, the timer is running in @@ -78,7 +78,7 @@ interface Msp430XV2ClockControl { */ async command void start32khzTimer (); - /* + /** * Stop the 32KHz timer. * * Upon completion of this command, the timer is stopped and @@ -92,7 +92,7 @@ interface Msp430XV2ClockControl { /** Return TRUE iff T32khz is running. */ async command bool is32khzTimerRunning (); - /* + /** * Start the 1MHz timer. * * Upon completion of this command, the timer is running in @@ -107,7 +107,7 @@ interface Msp430XV2ClockControl { */ async command void startMicroTimer (); - /* + /** * Stop the 1MHz timer. * * Upon completion of this command, the timer is stopped. diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc index 154154b38b..7ee7f82ff1 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc @@ -32,7 +32,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* +/** * Configuration for MSP430 Unified Clock System and Timer A modules. * * X5 (cc430f5137, msp430f5438, MSP430XV2 and friends). Assumed that diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc index 747d367061..2808e40460 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc @@ -33,7 +33,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* +/** * Clock configuration for an MSP430XV2 board. * * @note If changing the rate for SMCLK, also update the UART configuration in diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h b/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h index f6beba339e..34c8c09e05 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h @@ -37,7 +37,7 @@ #ifndef _MSP430XV2DCO_H #define _MSP430XV2DCO_H -/* +/** * Define material relevant to configuring the DCO on an MSP430 * Unified Clock System module. * From be4c7e3323861df0a592ec18a66ecce52e11a3b2 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 21 Jun 2011 23:39:08 -0700 Subject: [PATCH 113/411] move to github (tp-freeforall). update repo map --- 00_Repo_Notes | 33 ++++++++++++++++++--------------- 01_Merge_Notes | 4 +++- 02_To_Do | 2 ++ 3 files changed, 23 insertions(+), 16 deletions(-) diff --git a/00_Repo_Notes b/00_Repo_Notes index 819722a150..b4981e0aca 100644 --- a/00_Repo_Notes +++ b/00_Repo_Notes @@ -2,7 +2,7 @@ * Toolchain: The focus is on getting the new toolchain verified. As such this repo is -intended to be tested using new toolchain (mspgcc 4.4.5, uniarch, ti headers). +intended to be tested using the new toolchain (mspgcc 4.5, uniarch, ti headers). Some testing with the old 3.2.3 toolchain (original tinyos and z1 varient) has also been done for simple function (ie. does it compile). @@ -10,13 +10,14 @@ also been done for simple function (ie. does it compile). * Repo Structure -The msp430.git repo is located at: +The msp430 integration tree is part of the tinyprod:freeforall repo (branch +msp430-int). -git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git (r/w) -git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git (read-only) +This repo is located at git@github:tp-freeforall/prod.git -The msp430.git repo tracks the hinrg t2 git repo which in turn imports from the -main svn T2 trunk. +git clone git://git@github:tp-freeforall/prod.git + +The prod.git repo tracks the tinyos svn trunk via the hinrg git repo. svn t2 mainline ---| @@ -26,10 +27,10 @@ svn t2 mainline ---| ------------------ hinrg t2 ----------------------- | | | | | | - master --------------------------------- + prod svn/upstream --------------------------------- | | | | | | - - master_vhsb ----------------------- + - svn-vhsb ----------------------- | | | | | | --------------------------msp430-int ---------------- @@ -39,9 +40,9 @@ svn t2 mainline ---| * Branches: -master: is the main branch coming from the svn t2 mainline. Updated manually. +svn-upstream: is the main branch coming from the svn t2 mainline. Updated manually. -master-vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main +svn-vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main trunk. This branch tracks master but has the superfluous Z1 commit removed as it conflicts with the collapsed msp430 x2xxx work done in mm_core. This collapsage forms the majority of the work of merging @@ -53,17 +54,19 @@ msp430-int: main consolidation branch for the msp430 core. It represents the includes all three major families (x1, x2, and x5). Major cpu dependancies held in tos/chips/msp430/{x1xxx,x2xxx,x5xxx} -z1-pu: working directory for Zolertia modifications. From verification of mm-z1 - combined tree. - +z1-pu: working directory for Zolertia modifications. To pull a working branch do the following: - cd ~/mm # make sure at top level, we call it mm - git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git # grab from ro place + cd ~/working # make sure at top level + git clone git://github.com/tp-freeforall/prod.git msp430 # grab from ro place cd msp430 git config --add push.default matching # make sure only existing branches get pushed. # only effects rw repos + +check to see if you are on the msp430-int branch (it maybe the default). If not checkout +the msp430-int branch using the following commands. + git checkout -t origin/msp430-int # tracking branch, will be on msp430-int when done git checkout -b work # local working branch diff --git a/01_Merge_Notes b/01_Merge_Notes index d6594e5d13..6a8f92bcf5 100644 --- a/01_Merge_Notes +++ b/01_Merge_Notes @@ -8,7 +8,7 @@ but the msp430 branch brought those things back in. See the following commit f 270f0cc Z1 changes outside main z1 modifications (outside tos/{chips,platforms} -1) created the branch master-vhsb (master with vogon hyper spatial bypass). The hyper-spatial bypass +1) created the branch svn-vhsb (svn with vogon hyper spatial bypass). The hyper-spatial bypass jumps over the trunk-Z1 code (deletes it). 2) removed trunk-Z1 commit. Gets in the way of the collapse work already done. See the following: @@ -35,6 +35,8 @@ but the msp430 branch brought those things back in. See the following commit f * In apps/IPBaseStation/BaseStationP.nc, Z1 brought in #include CC2420.h that is inside an #ifndef SIM. Why the ifndef? + Not an issue. apps/IPBaseStation went bye bye. + * want to check tos/platforms/z1/ for duplicates vs. tos/chips/msp430 when done integrating and collapsing. diff --git a/02_To_Do b/02_To_Do index 6ab1d4c6a0..6a1522e8bd 100644 --- a/02_To_Do +++ b/02_To_Do @@ -5,6 +5,8 @@ * apps/IPBaseStation: defines a reset in a particularily ugly way. Needs to be fixed and made part of the platform/cpu definition. + apps/IPBaseStation deleted. + -- What is the purpose of msp430regtypes.h? Is there a easier way to deal with this? No. This is how it is done. Provides the linkage to msp430hardware.h and various defines that are there, ie. MSP430_NORACE(xxxxx). etc. From 513c35063bf05088c15b97d45c012c3bb594b74d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 27 Jun 2011 01:56:15 -0700 Subject: [PATCH 114/411] create tp-freeforall/prod (msp430-int) README to identify the main branch Move aside the tinyos README which is hiddeously out of date. Create simple README that describes where we are repo wise. --- README | 64 +++------------------------------------------------ README.tinyos | 63 ++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+), 61 deletions(-) create mode 100644 README.tinyos diff --git a/README b/README index 3016cceae7..fe70133eb5 100644 --- a/README +++ b/README @@ -1,63 +1,5 @@ -This contains the TinyOS 2.0 source code as of -$Date: 2007-07-30 07:18:52 $ - -This tree includes the TinyOS 2.0 documentation in tinyos-2.x/doc; -you can also find the documentation online at: -http://www.tinyos.net/tinyos-2.x/doc/ - -Please note that RPM releases do not include the doc/ or tools/ -directories. They do not include the former because of the above URL, -where corrections can be applied quickly. They do not include the -latter because that compiled versions of its code are installed in -the tinyos-tools RPM. - -The basic directory structure is as follows: - -apps: Sample TinyOS applications. - tests: Sample TinyOS applications which test a part of the system. - -doc: Documentation - index.html: Index file to all documentation - txt: Text files (TEPs) - html: HTML files (TEPs, installation) - tutorial: Tutorials - pdf: PDFs of larger documents, such as the TinyOS Programming Manual - -support: Non-nesC code for using TinyOS nodes - make: TinyOS make system - sdk: Standard developers kit: serial communication, etc. - c: C SDK (fully supported, but not exhaustively tested yet) - java: Java SDK (fully supported, heavily tested and used) - python: Python SDK (limited, not fully supported) - -tools: TinyOS-specific tools and scripts - platforms: Platform-specific tools - release: Scripts and configurations for packaging release RPMs - tinyos: TinyOS scripts - java: Native support for TinyOS JNI libraries (serial and env) - misc: Assorted utility scripts, begininning with tos- - ncc: The scripts that invoke the nesC compiler: ncc, mig, ncg - -tos: TinyOS source code (nesC, C) - chips: Chip-specific code - interfaces: Core system interfaces - lib: Extensions and larger common subsystems - byte_radio: General radio stack for byte-level radios - net: Network (multihop protocols) - ctp: Collection tree protocol - le: Link estimator - lqi: LQI-based collection for CC2420 platforms - power: Power management component library - printf: Printing small text messages to serial port - serial: Serial communication - timer: Timer component library - tossim: TOSSIM simulator - platforms: Platform-specific code - sensorboards: Sensorboard drivers - system: Core system components - types: Core system data types (header files) - -You can find documentation for the 2.0.1 release online at: -http://www.tinyos.net/tinyos-2.x/doc/ +TinyProd + tp-freeforall/prod +msp430-int: msp430 integration diff --git a/README.tinyos b/README.tinyos new file mode 100644 index 0000000000..3016cceae7 --- /dev/null +++ b/README.tinyos @@ -0,0 +1,63 @@ +This contains the TinyOS 2.0 source code as of + +$Date: 2007-07-30 07:18:52 $ + +This tree includes the TinyOS 2.0 documentation in tinyos-2.x/doc; +you can also find the documentation online at: +http://www.tinyos.net/tinyos-2.x/doc/ + +Please note that RPM releases do not include the doc/ or tools/ +directories. They do not include the former because of the above URL, +where corrections can be applied quickly. They do not include the +latter because that compiled versions of its code are installed in +the tinyos-tools RPM. + +The basic directory structure is as follows: + +apps: Sample TinyOS applications. + tests: Sample TinyOS applications which test a part of the system. + +doc: Documentation + index.html: Index file to all documentation + txt: Text files (TEPs) + html: HTML files (TEPs, installation) + tutorial: Tutorials + pdf: PDFs of larger documents, such as the TinyOS Programming Manual + +support: Non-nesC code for using TinyOS nodes + make: TinyOS make system + sdk: Standard developers kit: serial communication, etc. + c: C SDK (fully supported, but not exhaustively tested yet) + java: Java SDK (fully supported, heavily tested and used) + python: Python SDK (limited, not fully supported) + +tools: TinyOS-specific tools and scripts + platforms: Platform-specific tools + release: Scripts and configurations for packaging release RPMs + tinyos: TinyOS scripts + java: Native support for TinyOS JNI libraries (serial and env) + misc: Assorted utility scripts, begininning with tos- + ncc: The scripts that invoke the nesC compiler: ncc, mig, ncg + +tos: TinyOS source code (nesC, C) + chips: Chip-specific code + interfaces: Core system interfaces + lib: Extensions and larger common subsystems + byte_radio: General radio stack for byte-level radios + net: Network (multihop protocols) + ctp: Collection tree protocol + le: Link estimator + lqi: LQI-based collection for CC2420 platforms + power: Power management component library + printf: Printing small text messages to serial port + serial: Serial communication + timer: Timer component library + tossim: TOSSIM simulator + platforms: Platform-specific code + sensorboards: Sensorboard drivers + system: Core system components + types: Core system data types (header files) + +You can find documentation for the 2.0.1 release online at: +http://www.tinyos.net/tinyos-2.x/doc/ + From 25bab5ddb7edfb37219145097b828ee48644137b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 27 Jun 2011 02:26:56 -0700 Subject: [PATCH 115/411] change repo notes to reflect github, tinyprod, and tp-freeforall --- 00_Repo_Notes | 141 ++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 120 insertions(+), 21 deletions(-) diff --git a/00_Repo_Notes b/00_Repo_Notes index b4981e0aca..b74ed03060 100644 --- a/00_Repo_Notes +++ b/00_Repo_Notes @@ -10,14 +10,57 @@ also been done for simple function (ie. does it compile). * Repo Structure -The msp430 integration tree is part of the tinyprod:freeforall repo (branch -msp430-int). +github.com/tinyprod/prod: main TinyProd repo. + The VeryBless repo. Hold the stable mainline (master) -This repo is located at git@github:tp-freeforall/prod.git +github.com/tp-freeforall/prod: working fork. + Blessed repo. Holds consolidated integration branches and + proposed updates. -git clone git://git@github:tp-freeforall/prod.git +github.com//prod: user's tinyprod working fork. + branched off tp-freeforall/prod. working branches + should be branched off the tp-freeforall/prod(branch) + that the user is working on. + + + +main persistent branches: + +svn/upstream: svn tinyos tracking branch. + +master: the main tinyprod release line. + +next: integration branch for next release on master. + +pu: integration branch for proposed updates. + +-int: integration branch for feature +-int-pu: proposed update. +-int-next: accepted updates. + +(some of these branches may be skipped depending on need). + + + +Other current branches: + +msp430-int: msp430 integration (msp430 core, x1, x2, x5) feature branch + +msp430-int-pu: proposed updates to msp430-int (no msp430-int-next). + +swreset: potential msp430 swreset implementation. + +motenet-rel: replacement for the serialforwarder. + +svn-vhsb: remove bad z1 commit from svn trunk + +(note: tinyprod's master branch will eventually consist of a merge between +msp430-int, svn-vhsb, swreset, and motenet-rel). + + + +user branches are working branches in user working forks. -The prod.git repo tracks the tinyos svn trunk via the hinrg git repo. svn t2 mainline ---| @@ -28,14 +71,21 @@ svn t2 mainline ---| | | | | | | prod svn/upstream --------------------------------- - | | | - | | | - - svn-vhsb ----------------------- - | | | + | | + | | + - svn-vhsb ------------\ + \ + swreset ------------------ master + / + motenet-rel ---------/ + + + + svn-vhsb --------------------- | | | --------------------------msp430-int ---------------- - | - ----- z1-pu ---- + | + ----- z1-pu ---- * Branches: @@ -57,16 +107,65 @@ msp430-int: main consolidation branch for the msp430 core. It represents the z1-pu: working directory for Zolertia modifications. -To pull a working branch do the following: - cd ~/working # make sure at top level - git clone git://github.com/tp-freeforall/prod.git msp430 # grab from ro place - cd msp430 - git config --add push.default matching # make sure only existing branches get pushed. - # only effects rw repos +Workflow: (github user: Robert Hunter) + + on github, fork github.com/tp-freeforall/prod (as Robert Hunter) + (this creates the github repo, github.com/roberthunter/prod) + + mkdir -p ~/working/msp430 + cd ~/working/msp430 + git clone git@github.com:roberthunter/prod.git tinyos-2.x + cd tinyos-2.x + git remote add up git://github.com/tp-freeforall/prod.git + git fetch up + git checkout msp430-int # make sure on the msp430-int branch + git checkout -b rh # create the rh branch off msp430-int + + + +tinyprod/prod + + fork -> tp-freeforall/prod.git + msp430-int branch + + roberthunter/prod.git + msp430-int branch + rh branch + ...... rh changes --- + | + | + tp-freeforall/prod.git | + msp430-int-pu ------------- + | + | + msp430-int ------------- + + +Robert Hunter makes changes and commits his working branch (rh) on his local +repo (local). This gets pushed to github/roberthunter/prod.git and lives as +the rh branch in that repo. + +The integrator pulls these changes after review into the +tp-freeforall/prod(msp430-int-pu) branch. After other changes from other +developers comes in and msp430-int-pu has sufficiently matured, msp430-int-pu +is merged into tp-freeforall/prod(msp430-int). + +When all integration branches have matured sufficiently, they are merged +together, tested, and becomes tinyprod/prod(master). + + +While various integration work is being done, working branches should be +refreshed with more current content from the integration repositories. + +For example, Robert wants to make sure that his changes are consistent with +what is happening on the tp-freeforall/prod(msp430-int-pu) branch. He +accomplishes this by the following commands: -check to see if you are on the msp430-int branch (it maybe the default). If not checkout -the msp430-int branch using the following commands. + cd ~/working/msp430/tinyos-2.x + git fetch up # get current information from + # tp-freeforall - git checkout -t origin/msp430-int # tracking branch, will be on msp430-int when done - git checkout -b work # local working branch + git checkout rh # make sure on rh branch + git merge up/msp430-int-pu # merge in the current + # proposed integration branch From a584f8d8edb7cf6213805bda6ae060ba5ff0bc47 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 27 Jun 2011 02:46:13 -0700 Subject: [PATCH 116/411] bring in Getting_Started, reorganize Repo_Notes and Merge_Notes --- 00_Getting_Started | 337 +++++++++++++++++++++++++++++++ 00_Repo_Notes => 01_Repo_Notes | 0 01_Merge_Notes => 12_Merge_Notes | 0 3 files changed, 337 insertions(+) create mode 100644 00_Getting_Started rename 00_Repo_Notes => 01_Repo_Notes (100%) rename 01_Merge_Notes => 12_Merge_Notes (100%) diff --git a/00_Getting_Started b/00_Getting_Started new file mode 100644 index 0000000000..d57adab1e7 --- /dev/null +++ b/00_Getting_Started @@ -0,0 +1,337 @@ + +Git is great. Git is good. Git is powerful. + +Alas, that makes it a little daunting getting started. This document should +help make it a little less painful. Git is powerful and hopefully you will +find it is worth the effort. + +This document is written assuming that you will be using github to contribute +to the TinyProd TinyOS repository structure. + + +Contents: + +- About TinyProd +- GitHub +- Set up Git +- Set up your working repository +- Further Reading +- Guidelines + + +* About TinyProd: + +TinyProd is a GIT based TinyOS repository that is immediately downstream from +the main SVN based TinyOS repository that is maintained by the academic TinyOS +community. + +TinyProd is intended to be a more vibrant, developer/production orientated +repository. Some of the features include: + + o organize git based TinyOS development. + o More vibrant, higher rate of change for the community. + o Encourage collaboration + o Optimize developer resources. (Streamline the development process). + Developer centric rather than academic centric. + o Peer driven code review, norm rather than the exception. + o real issue and bug tracking + o tracking changes to TinyProd managed pieces of the source tree + and linking to appropriate tracking documents. + o stable mainline. + o Continuous release cycle. + + +* GitHub + +* We use github to host the repository. And they have very good help files + that will assist you in getting set up. + +* Go to github.com and get yourself a logon. Choose your login name + carefully. You can rename it once (but only once). + + Once you are logged in, You'll be presented a page start up page which + includes things like "Set Up Git", "Create a Repository", "Fork a + Repository", etc. We will be using existing repositories. + + +* Set Up Git. + + o set up SSH keys. If you have an existing SSH key you can use it. + Existing keys can typically be found in ~/.ssh. The instructions have + you backup and remove and then regenerating a new ssh key. You don't + need to do that but can use your existing key if you wish. For + example: you could use ~/.ssh/id_rsa.pub as your key. + + o Set your username and email + + $ git config --global user.name "Firsname Lastname" + $ git config --global user.email "your_email@youremail.com" + + o Set your GitHub token. + + Follow the instructions on the github help page (Set Up Git). + + +* Other things to put into your git config. (global for the user, + which lives at ~/.gitconfig) + + o To avoid problems with DOS EOL sequences, we always store in the + repository using UNIX EOL sequences. Turn on autocrlf to avoid problems. + + $ git config --global core.autocrlf true + + o It is handy to set up local copies of remote branches automatically. + + $ git config --global branch.autosetupmerge true + + o And when pushing handy to push only the current branch (the most common + activity). + + $ git config --global push.default current + + o It is really handy to define various aliases for common commands. + + $ git config --global alias.b branch + $ git config --global alias.ci commit + + will define two aliases, b for branch and ci for commit. You can do + things like: + + $ git b # display current branch + $ git ci # same as git commit + + +An example ~/.gitconfig looks like: (Its mine with the github token +redacted)... + +[user] + name = Eric B. Decker + email = cire831@gmail.com +[core] + editor = emacsclient + autocrlf = input +[alias] + b = branch + br = branch + c = config + ci = commit + co = checkout + cp = cherry-pick + d = diff + lp = log -p + r = remote + rem= remote + st = status + s = status + wc = whatchanged +[branch] + autosetupmerge = true +[pack] + threads = 0 +[push] + default = current +[github] + user = cire831 + token = xxxxxxxxxx + + +* Set up your working repository + + See 00_Repo_Notes for the structure of the repositories and their + relationships. + + The main repo is https://github.com/tinyprod/prod with an integration repo + at https://github.com/tp-freeforall/prod. (The later is a fork off + tinyprod/prod). + + Contributors work in a local repo linked to a working github repo that is + forked from tp-freeforall/prod. This keeps a fair amount of independence + between different developers. + + Contributors work initially on a contributor branch in their local + repository. After these changes have been vetted they will be brought over + to an integration branch in tp-freeforall/prod. After integration, these + changes will be pulled into the mainline (master) in tinyprod/prod where + they will be part of the next release. + + + o Log in to your github account + + o Create a working fork. Working repos are forked off the main working + repository located at: + + https://github.com/tp-freeforall/prod + + This will bring up the main page for the tp-freeforall/prod repo. + + To create a working repo, click on the fork button. This will create a + fork of tp-freeforall/prod in your local context (your login context). + + This will create the repository github.com//prod + which is forked off github.com/tp-freeforall/prod. All working repos are + forked off the tp-freeforall/prod repo. This is to keep the amount of + extra data in the main repository down to a minimum. + + o Create your local repo. + + mkdir -p w/prod # create working directory + cd w/prod + git clone git@github.com:/prod.git tinyos-2.x + cd tinyos-2.x + + # you will now have w/prod/tinyos-2.x populated with the default branch + # of the fork. Your fork will inherit the default branch from + # tp-freeforall/prod repo. + # + # this will create the remote origin linked to your working fork on github + + # you will also want to track changes coming into tp-freeforall, so + # create a remote that will be used for tracking. And pull in information + # from the repository. + + git remote add up git://github.com/tp-freeforall/prod.git + git fetch up + + o Create your working branch. + + git branch # make sure on the appropriate branch + # should show msp430-int-pu which is the + # current default branch. + git checkout -b gu # create the working branch + # gu are your initials or another + # meaningful name. gu is used here + # as an example, it stands for + # github_user but should + + + git add -u # add changed files that are tracked. + git commit # commit. editor will get invoked + # for the commit message. + # + # please see Guidelines for a guide + # on how to write good commit messages + + # when you are ready to publish your changes, push the changes back to + # your working fork on github. + + git push + + + +* Further Reading + + o GitHub Help + (http://help.github.com) + + GitHub has lots of help. The TinyProd structure is a bit more + complicated than what is presented in the help files. So keep + that in mind when working through the examples. + + o Main Git Site, Documentation + (http://git-scm.com/documentation) + + o Git Reference + (http://gitref.org) + + o Git from the bottom up. + (http://ftp.newartisans.com/pub/git.from.bottom.up.pdf) + + Is an easy to understand description of how git works from the bottom up. + + o Pro Git is a book about git that is very good. + (http://progit.org) + + o Distributed Git + (http://progit.org/book/ch5-0.html) + + This chapter talks about using Git as part of a distributed workflow. It + gives a good foundation about how we are managing the TinyProd repository. + + In particular, please read Integration-Manger Workflow (its what we are + using). And we have added one more repository to the left of the + Blessed Repository which is VeryBlessed. :-) + + Also please read, Contributing to a Project. Some of what is written there + is also summarized in the Guidelines section below. + + +* Guidelines + +* Commit guidelines. + + o First and foremost make commits logical units. + + Logically seperate changesets. Don't code for weeks and then bring the + whole piece in as one commit. + + Make a commit something that can be looked at and digested reasonably. + Solves one problem. + + Keep the history clean and understandable. + + o Use meaningful commit messages. + + the first line (50 chars or less) is used as the short message. This + message is displayed in one line logs and other places. Make it + meaningful. + + The rest of the commit message should provide more detailed information + about what the commit does. The GIT project itself requires motivation + as well as contrasting the new behaviour to old behaviour. Why was this + change necessary. Its not a bad habit to get into when it makes sense + to do so. + + o Use the imperative present tense when writing commit messages. Use commands. + + o Always include a blank line after the short message (the first line). + + o Always run git diff --check to make sure you aren't introducing trailing + whitespace. Some tools bitch about this and it is really annoying. + + +* coding style. These are suggestions. There isn't a style nazi. + + TinyProd is directly downstream from the academic TinyOS SVN trunk. As such + most of the coding style is adapted to be consistent with that repository. + Some changes have been made to keep the code as compact as possible. + + o Indent:2 + + if ( a == b) { + c = d; + } + + o Braces: same line (see above), closing brace by itself. + + o single provides/uses: same line, multiple blocked. + + module xyz { + provides interface NameInterface as NI; + uses interface AnotherInterface as AI; + } + + module abc { + provides { + interface NameInterface as NI; + interface AnotherInterface as AI; + } + uses { + interface Inter1; + interface Inter2; + } + implementation { + ... + } + + o if then else + + if ( a == b) + + else + + + if ( a == b) { + block statements + } else { + block statements + } diff --git a/00_Repo_Notes b/01_Repo_Notes similarity index 100% rename from 00_Repo_Notes rename to 01_Repo_Notes diff --git a/01_Merge_Notes b/12_Merge_Notes similarity index 100% rename from 01_Merge_Notes rename to 12_Merge_Notes From 9f6e0e1b4e97e401fa0f367994d0530ae8df9602 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 08:37:29 -0700 Subject: [PATCH 117/411] add copyright section to Guidelines, 00_Getting_Started --- 00_Getting_Started | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/00_Getting_Started b/00_Getting_Started index d57adab1e7..8782bb5374 100644 --- a/00_Getting_Started +++ b/00_Getting_Started @@ -269,6 +269,7 @@ redacted)... Keep the history clean and understandable. + o Use meaningful commit messages. the first line (50 chars or less) is used as the short message. This @@ -281,7 +282,7 @@ redacted)... change necessary. Its not a bad habit to get into when it makes sense to do so. - o Use the imperative present tense when writing commit messages. Use commands. + o Use the imperative present tense when writing commit messages. o Always include a blank line after the short message (the first line). @@ -289,6 +290,21 @@ redacted)... whitespace. Some tools bitch about this and it is really annoying. +* Copyright. + + The main TinyOS code is copyrighted by individual authors using the 3 clause + Modified BSD license. The simplest thing to do is either use no copyright + or use the BSD license. + + We are trying to get any new code to use the same boilerplate license. The + intent is to minimize any extraneous noise when generating diffs. The + boilerplate is written so the only part that needs to be modified as new + authors are added is the actually Copyright (c) clause at + the front. + + A template for this copyright can be found in $(TOSROOT)/licenses/bsd.txt. + + * coding style. These are suggestions. There isn't a style nazi. TinyProd is directly downstream from the academic TinyOS SVN trunk. As such From df4f40e6f7f58dbaf06fefa7d7c9f78748a218d9 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 09:22:39 -0700 Subject: [PATCH 118/411] msp430: add pin definitions for Port 7, 8, 9, 10, and 11 Digital I/O from Joao Goncalves. --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 407 ++++++++++++++++++- 1 file changed, 399 insertions(+), 8 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index b0eb07768f..6194bd7dbc 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -33,17 +33,21 @@ */ /** - * HPL for the TI MSP430 family of microprocessors. This provides an - * abstraction for general-purpose I/O. + * Digital pin i/o abstraction, TI MSP430 processors. * * @author Joe Polastre * @author Xavier Orduna * @author Peter A. Bigot * @author Eric B. Decker + * @author João Gonçalves + * + * - Mapped Pins for msp430x543x, msp430x541x. + * The duplicate functionality on different pins is not implemented + * because of the duplicate names. + * - Added ports 7,8,9,10,11 */ -configuration HplMsp430GeneralIOC -{ +configuration HplMsp430GeneralIOC { // provides all the ports as raw ports #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) provides interface HplMsp430GeneralIO as Port10; @@ -111,6 +115,60 @@ configuration HplMsp430GeneralIOC provides interface HplMsp430GeneralIO as Port67; #endif +#if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) + provides interface HplMsp430GeneralIO as Port70; + provides interface HplMsp430GeneralIO as Port71; + provides interface HplMsp430GeneralIO as Port72; + provides interface HplMsp430GeneralIO as Port73; + provides interface HplMsp430GeneralIO as Port74; + provides interface HplMsp430GeneralIO as Port75; + provides interface HplMsp430GeneralIO as Port76; + provides interface HplMsp430GeneralIO as Port77; +#endif + +#if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) + provides interface HplMsp430GeneralIO as Port80; + provides interface HplMsp430GeneralIO as Port81; + provides interface HplMsp430GeneralIO as Port82; + provides interface HplMsp430GeneralIO as Port83; + provides interface HplMsp430GeneralIO as Port84; + provides interface HplMsp430GeneralIO as Port85; + provides interface HplMsp430GeneralIO as Port86; + provides interface HplMsp430GeneralIO as Port87; +#endif + +#if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) + provides interface HplMsp430GeneralIO as Port90; + provides interface HplMsp430GeneralIO as Port91; + provides interface HplMsp430GeneralIO as Port92; + provides interface HplMsp430GeneralIO as Port93; + provides interface HplMsp430GeneralIO as Port94; + provides interface HplMsp430GeneralIO as Port95; + provides interface HplMsp430GeneralIO as Port96; + provides interface HplMsp430GeneralIO as Port97; +#endif + +#if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) + provides interface HplMsp430GeneralIO as Port100; + provides interface HplMsp430GeneralIO as Port101; + provides interface HplMsp430GeneralIO as Port102; + provides interface HplMsp430GeneralIO as Port103; + provides interface HplMsp430GeneralIO as Port104; + provides interface HplMsp430GeneralIO as Port105; + provides interface HplMsp430GeneralIO as Port106; + provides interface HplMsp430GeneralIO as Port107; +#endif +#if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) + provides interface HplMsp430GeneralIO as Port110; + provides interface HplMsp430GeneralIO as Port111; + provides interface HplMsp430GeneralIO as Port112; + provides interface HplMsp430GeneralIO as Port113; + provides interface HplMsp430GeneralIO as Port114; + provides interface HplMsp430GeneralIO as Port115; + provides interface HplMsp430GeneralIO as Port116; + provides interface HplMsp430GeneralIO as Port117; +#endif + // provides special ports explicitly // this section of HplMsp430GeneralIOC supports the F14x series // x1 family: msp430f149 @@ -198,7 +256,6 @@ configuration HplMsp430GeneralIOC provides interface HplMsp430GeneralIO as UCB0SDA; provides interface HplMsp430GeneralIO as UCB0SCL; - provides interface HplMsp430GeneralIO as UCA1CLK; provides interface HplMsp430GeneralIO as UCA1STE; provides interface HplMsp430GeneralIO as UCA1TXD; @@ -229,7 +286,90 @@ configuration HplMsp430GeneralIOC provides interface HplMsp430GeneralIO as SVSOUT; #endif - // x5 family: cc430f5137, msp430f5438{,a} + // x5 family: cc430f5137, msp430x541x, msp430f5438{,a} + +#if defined(__msp430x543x) || defined(__msp430x541x) + +//duplicate ouputs on different pins from the ones mapped are not defined yet + + provides interface HplMsp430GeneralIO as TA0CCR0; + provides interface HplMsp430GeneralIO as TA0CCR1; + provides interface HplMsp430GeneralIO as TA0CCR2; + provides interface HplMsp430GeneralIO as TA0CCR3; + provides interface HplMsp430GeneralIO as TA0CCR4; + provides interface HplMsp430GeneralIO as TA0CLK; + + provides interface HplMsp430GeneralIO as TA1CCR0; + provides interface HplMsp430GeneralIO as TA1CCR1; + provides interface HplMsp430GeneralIO as TA1CCR2; + provides interface HplMsp430GeneralIO as TA1CLK; + + provides interface HplMsp430GeneralIO as TB0CCR0; + provides interface HplMsp430GeneralIO as TB0CCR1; + provides interface HplMsp430GeneralIO as TB0CCR2; + provides interface HplMsp430GeneralIO as TB0CCR3; + provides interface HplMsp430GeneralIO as TB0CCR4; + provides interface HplMsp430GeneralIO as TB0CCR5; + provides interface HplMsp430GeneralIO as TB0CCR6; + provides interface HplMsp430GeneralIO as TB0CLK; + + provides interface HplMsp430GeneralIO as RTCCLK; + provides interface HplMsp430GeneralIO as MCLK; + provides interface HplMsp430GeneralIO as SMCLK; + provides interface HplMsp430GeneralIO as ACLK; + provides interface HplMsp430GeneralIO as ADC12CLK; + provides interface HplMsp430GeneralIO as DMAE0; + + provides interface HplMsp430GeneralIO as UCA0RXD; + provides interface HplMsp430GeneralIO as UCA0SOMI; + provides interface HplMsp430GeneralIO as UCA0TXD; + provides interface HplMsp430GeneralIO as UCA0SIMO; + provides interface HplMsp430GeneralIO as UCA0CLK; + provides interface HplMsp430GeneralIO as UCA0STE; + + provides interface HplMsp430GeneralIO as UCB0STE; + provides interface HplMsp430GeneralIO as UCB0SOMI; + provides interface HplMsp430GeneralIO as UCB0SCL; + provides interface HplMsp430GeneralIO as UCB0SIMO; + provides interface HplMsp430GeneralIO as UCB0SDA; + provides interface HplMsp430GeneralIO as UCB0CLK; + + provides interface HplMsp430GeneralIO as UCA1CLK; + provides interface HplMsp430GeneralIO as UCA1STE; + provides interface HplMsp430GeneralIO as UCA1TXD; + provides interface HplMsp430GeneralIO as UCA1RXD; + provides interface HplMsp430GeneralIO as UCA1SIMO; + provides interface HplMsp430GeneralIO as UCA1SOMI; + + provides interface HplMsp430GeneralIO as UCB1CLK; + provides interface HplMsp430GeneralIO as UCB1STE; + provides interface HplMsp430GeneralIO as UCB1SIMO; + provides interface HplMsp430GeneralIO as UCB1SOMI; + provides interface HplMsp430GeneralIO as UCB1SDA; + provides interface HplMsp430GeneralIO as UCB1SCL; + +// Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 + + provides interface HplMsp430GeneralIO as ADC0; + provides interface HplMsp430GeneralIO as ADC1; + provides interface HplMsp430GeneralIO as ADC2; + provides interface HplMsp430GeneralIO as ADC3; + provides interface HplMsp430GeneralIO as ADC4; + provides interface HplMsp430GeneralIO as ADC5; + provides interface HplMsp430GeneralIO as ADC6; + provides interface HplMsp430GeneralIO as ADC7; + provides interface HplMsp430GeneralIO as ADC8; + provides interface HplMsp430GeneralIO as ADC9; + +// there are no ADC's 10 and 11 according to datasheet + + provides interface HplMsp430GeneralIO as ADC12; + provides interface HplMsp430GeneralIO as ADC13; + provides interface HplMsp430GeneralIO as ADC14; + provides interface HplMsp430GeneralIO as ADC15; + +#endif + #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) provides interface HplMsp430GeneralIO as CBOUT0; provides interface HplMsp430GeneralIO as TA0CLK; @@ -280,8 +420,7 @@ configuration HplMsp430GeneralIOC #endif /* cc430x513x || cc430x612x || cc430x613x */ } -implementation -{ +implementation { components #if defined(__MSP430_HAS_PORT1_R__) new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 0) as P10, @@ -403,6 +542,106 @@ implementation new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 7) as P67, #endif +#if defined(__MSP430_HAS_PORT7_R__) + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 0) as P70, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 1) as P71, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 2) as P72, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 3) as P73, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 4) as P74, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 5) as P75, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 6) as P76, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 7) as P77, +#elif defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 0) as P70, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 1) as P71, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 2) as P72, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 3) as P73, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 4) as P74, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 5) as P75, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 6) as P76, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 7) as P77, +#endif + +#if defined(__MSP430_HAS_PORT8_R__) + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 0) as P80, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 1) as P81, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 2) as P82, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 3) as P83, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 4) as P84, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 5) as P85, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 6) as P86, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 7) as P87, +#elif defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 0) as P80, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 1) as P81, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 2) as P82, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 3) as P83, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 4) as P84, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 5) as P85, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 6) as P86, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 7) as P87, +#endif + +#if defined(__MSP430_HAS_PORT9_R__) + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 0) as P90, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 1) as P91, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 2) as P92, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 3) as P93, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 4) as P94, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 5) as P95, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 6) as P96, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 7) as P97, +#elif defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 0) as P90, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 1) as P91, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 2) as P92, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 3) as P93, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 4) as P94, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 5) as P95, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 6) as P96, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 7) as P97, +#endif + +#if defined(__MSP430_HAS_PORT10_R__) + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 0) as P100, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 1) as P101, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 2) as P102, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 3) as P103, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 4) as P104, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 5) as P105, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 6) as P106, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 7) as P107, +#elif defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 0) as P100, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 1) as P101, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 2) as P102, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 3) as P103, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 4) as P104, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 5) as P105, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 6) as P106, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 7) as P107, +#endif + +#if defined(__MSP430_HAS_PORT11_R__) + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 0) as P110, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 1) as P111, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 2) as P112, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 3) as P113, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 4) as P114, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 5) as P115, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 6) as P116, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 7) as P117, +#elif defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 0) as P110, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 1) as P111, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 2) as P112, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 3) as P113, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 4) as P114, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 5) as P115, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 6) as P116, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 7) as P117, +#endif + PlatformC; // dummy to end unknown sequence #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) @@ -471,6 +710,61 @@ implementation Port67 = P67; #endif +#if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) + Port70 = P70; + Port71 = P71; + Port72 = P72; + Port73 = P73; + Port74 = P74; + Port75 = P75; + Port76 = P76; + Port77 = P77; +#endif + +#if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) + Port80 = P80; + Port81 = P81; + Port82 = P82; + Port83 = P83; + Port84 = P84; + Port85 = P85; + Port86 = P86; + Port87 = P87; +#endif + +#if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) + Port90 = P90; + Port91 = P91; + Port92 = P92; + Port93 = P93; + Port94 = P94; + Port95 = P95; + Port96 = P96; + Port97 = P97; +#endif + +#if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) + Port100 = P100; + Port101 = P101; + Port102 = P102; + Port103 = P103; + Port104 = P104; + Port105 = P105; + Port106 = P106; + Port107 = P107; +#endif + +#if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) + Port110 = P110; + Port111 = P111; + Port112 = P112; + Port113 = P113; + Port114 = P114; + Port115 = P115; + Port116 = P116; + Port117 = P117; +#endif + #ifdef __msp430x14x STE0 = P30; SIMO0 = P31; @@ -574,6 +868,103 @@ implementation SVSOUT = P57; #endif + +#if defined(__msp430x543x) || defined(__msp430x541x) + + TA0CCR0 = P11; + TA0CCR1 = P12; + TA0CCR2 = P13; + TA0CCR3 = P14; + TA0CCR4 = P15; + TA0CLK = P10; + + TA1CCR0 = P21; + TA1CCR1 = P22; + TA1CCR2 = P23; + TA1CLK = P20; + + TB0CCR0 = P40; + TB0CCR1 = P41; + TB0CCR2 = P42; + TB0CCR3 = P43; + TB0CCR4 = P44; + TB0CCR5 = P45; + TB0CCR6 = P46; + TB0CLK = P47; + + RTCCLK = P24; + MCLK = P20; + SMCLK = P16; + ACLK = P10; + ADC12CLK = P27; + DMAE0 = P27; + + UCA0TXD = P34; + UCA0RXD = P35; + UCA0SIMO = P34; + UCA0SOMI = P35; + UCA0CLK = P30; + UCA0STE = P33; + + UCB0STE = P30; + UCB0SIMO = P31; + UCB0SOMI = P32; + UCB0SDA = P31; + UCB0SCL = P32; + UCB0CLK = P33; + + UCA1TXD = P56; + UCA1RXD = P57; + UCA1SIMO = P56; + UCA1SOMI = P57; + UCA1CLK = P36; + UCA1STE = P55; + + UCB1STE = P36; + UCB1SIMO = P37; + UCB1SOMI = P54; + UCB1SDA = P37; + UCB1SCL = P54; + UCB1CLK = P55; + + // Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 + + ADC0 = P60; + ADC1 = P61; + ADC2 = P62; + ADC3 = P63; + ADC4 = P64; + ADC5 = P65; + ADC6 = P66; + ADC7 = P67; + ADC8 = P50; + ADC9 = P51; +// there are no ADC's 10 and 11 according to datasheet + ADC12 = P74; + ADC13 = P75; + ADC14 = P76; + ADC15 = P77; + +//Same outputs but on different pins, need to change the names if to be used +// Not complete yet +/* + SMCLK = P47; + ACLK = P110; + MCLK = P111; + SMCLK = P112; + + TA0CCR0 = P80; + TA0CCR1 = P81; + TA0CCR2 = P82; + TA0CCR3 = P83; + TA0CCR4 = P84; + + TA1CCR0 = P85; + TA1CCR1 = P86; + TA1CCR2 = P73; */ + +#endif + #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) /* Terminal functions mapped to port mapping mnemonics, per data * sheet table 3 */ From 363d8ce593bdc8ea91a1a8e4c7f9718649ef4d49 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 13:32:17 -0700 Subject: [PATCH 119/411] msp430(x5xxx/timer): fix interrupt vectors for x5 T0B7 and T2A3 timers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit brought over from João Gonçalves --- tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc index b3126db44b..e1a4b911ab 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc @@ -29,8 +29,8 @@ implementation { #endif /* __MSP430_HAS_T0A3__ || __MSP430_HAS_T0A5__ */ #if defined(__MSP430_HAS_T0B7__) - TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer0_B0.fired(); } - TOSH_SIGNAL(TIMER1_A1_VECTOR) { signal VectorTimer0_B1.fired(); } + TOSH_SIGNAL(TIMER0_B0_VECTOR) { signal VectorTimer0_B0.fired(); } + TOSH_SIGNAL(TIMER0_B1_VECTOR) { signal VectorTimer0_B1.fired(); } #endif /* __MSP430_HAS_T0B7__ */ #if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) @@ -39,7 +39,7 @@ implementation { #endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ #if defined(__MSP430_HAS_T2A3__) - TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer2_A0.fired(); } - TOSH_SIGNAL(TIMER1_A1_VECTOR) { signal VectorTimer2_A1.fired(); } + TOSH_SIGNAL(TIMER2_A0_VECTOR) { signal VectorTimer2_A0.fired(); } + TOSH_SIGNAL(TIMER2_A1_VECTOR) { signal VectorTimer2_A1.fired(); } #endif /* __MSP430_HAS_T2A3__ */ } From a12d515cdf9b1a75b2f8cb1d224d73cf3308d466 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 13:35:58 -0700 Subject: [PATCH 120/411] fix copyright for Joao --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 1 + 1 file changed, 1 insertion(+) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 6194bd7dbc..5baf4917db 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2000-2003 The Regents of the University of California. From fe69543888458cb1d6c86b069abee8ab8d58a389 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 17:03:49 -0700 Subject: [PATCH 121/411] msp430(x5/spi): add SpiPacket.send from Joao Goncalves --- .../msp430/x5xxx/usci/Msp430UsciSpiB0C.nc | 11 +++++++++ tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc | 23 +++++++++++++++++-- 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc index 9560ea0200..345883ebc9 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -38,8 +39,12 @@ /** * Generic configuration for a client that shares USCI_B0 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ + generic configuration Msp430UsciSpiB0C() { provides { interface Resource; @@ -62,4 +67,10 @@ generic configuration Msp430UsciSpiB0C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCB0SIMO; + SpiC.SOMI -> GIO.UCB0SOMI; + SpiC.CLK -> GIO.UCB0CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc index 3adac1a662..8d4fc8ac55 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -39,6 +40,7 @@ * instance. * * @author Peter A. Bigot + * @author João Gonçalves */ generic module Msp430UsciSpiP () @safe() { @@ -163,8 +165,25 @@ generic module Msp430UsciSpiP () @safe() { } async command error_t SpiPacket.send[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { - /* Not supported yet */ - return FAIL; + + uint16_t bytesLeft = len; + + while (bytesLeft) { + while (! (UCTXIFG & call Usci.getIfg())) { + ; /* busywait */ + } + call Usci.setTxbuf(txBuf[len-bytesLeft]); + + while (! (UCRXIFG & call Usci.getIfg())) { + ; /* busywait */ + } + + rxBuf[len-bytesLeft] = call Usci.getRxbuf(); + bytesLeft=bytesLeft-1; + } + + signal SpiPacket.sendDone[client](txBuf, rxBuf, len, SUCCESS); + return SUCCESS; } default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error ) { } From ea6324a9d53ca49a90de6528eb9b65851ccd0577 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 20:13:03 -0700 Subject: [PATCH 122/411] state default branch is msp430-int-pu --- README | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/README b/README index fe70133eb5..2cd941ab8b 100644 --- a/README +++ b/README @@ -2,4 +2,7 @@ TinyProd tp-freeforall/prod -msp430-int: msp430 integration +msp430-int: msp430 integration +msp430-int-pu: msp430 integration (proposed updates) + +If in doubt, branch off from msp430-int-pu. From bf144b4dd0e8ff593a31995f7d9283f9045deb9d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Mon, 27 Jun 2011 14:23:22 +0100 Subject: [PATCH 123/411] msp430: platform files for MoteISTx5 Note many files had to get fixed for CRLF nonsense. --- support/make/MoteISTx5.target | 9 ++ tos/platforms/MoteISTx5/.platform | 92 +++++++++++ tos/platforms/MoteISTx5/ActiveMessageC.nc | 67 ++++++++ tos/platforms/MoteISTx5/Ieee154MessageC.nc | 70 +++++++++ tos/platforms/MoteISTx5/LocalIeeeEui64C.nc | 63 ++++++++ tos/platforms/MoteISTx5/PlatformC.nc | 63 ++++++++ tos/platforms/MoteISTx5/PlatformP.nc | 73 +++++++++ .../MoteISTx5/chips/cc2420/HplCC2420AlarmC.nc | 53 +++++++ .../chips/cc2420/HplCC2420InterruptsC.nc | 77 +++++++++ .../MoteISTx5/chips/cc2420/HplCC2420PinsC.nc | 111 +++++++++++++ .../MoteISTx5/chips/cc2420/HplCC2420SpiC.nc | 57 +++++++ tos/platforms/MoteISTx5/hardware.h | 84 ++++++++++ .../MoteISTx5/hardware/adc/DemoSensorC.nc | 56 +++++++ .../MoteISTx5/hardware/adc/DemoSensorNowC.nc | 60 +++++++ .../hardware/adc/DemoSensorStreamC.nc | 56 +++++++ .../MoteISTx5/hardware/adc/PlatformAdcC.nc | 75 +++++++++ .../MoteISTx5/hardware/adc/VoltageC.nc | 55 +++++++ .../hardware/buttons/HplUserButtonC.nc | 55 +++++++ .../hardware/buttons/SwitchToggleC.nc | 94 +++++++++++ .../MoteISTx5/hardware/buttons/UserButton.h | 46 ++++++ .../MoteISTx5/hardware/buttons/UserButtonC.nc | 65 ++++++++ .../MoteISTx5/hardware/buttons/UserButtonP.nc | 78 +++++++++ .../hardware/clock/PlatformClockC.nc | 51 ++++++ .../hardware/clock/PlatformClockP.nc | 147 +++++++++++++++++ .../MoteISTx5/hardware/leds/LedsC.nc | 47 ++++++ .../MoteISTx5/hardware/leds/LedsP.nc | 51 ++++++ .../MoteISTx5/hardware/leds/PlatformLedsC.nc | 66 ++++++++ .../MoteISTx5/hardware/leds/PlatformLedsP.nc | 148 ++++++++++++++++++ .../MoteISTx5/hardware/pins/PlatformPinsC.nc | 49 ++++++ .../MoteISTx5/hardware/pins/PlatformPinsP.nc | 123 +++++++++++++++ .../hardware/usci/PlatformSerialC.nc | 74 +++++++++ .../hardware/usci/PlatformSerialP.nc | 58 +++++++ .../MoteISTx5/hardware/usci/PlatformSpiC.nc | 30 ++++ .../MoteISTx5/hardware/usci/PlatformSpiP.nc | 17 ++ .../hardware/usci/PlatformUsciInitC.nc | 55 +++++++ tos/platforms/MoteISTx5/platform.h | 0 tos/platforms/MoteISTx5/platform_message.h | 62 ++++++++ 37 files changed, 2437 insertions(+) create mode 100755 support/make/MoteISTx5.target create mode 100755 tos/platforms/MoteISTx5/.platform create mode 100755 tos/platforms/MoteISTx5/ActiveMessageC.nc create mode 100755 tos/platforms/MoteISTx5/Ieee154MessageC.nc create mode 100644 tos/platforms/MoteISTx5/LocalIeeeEui64C.nc create mode 100755 tos/platforms/MoteISTx5/PlatformC.nc create mode 100755 tos/platforms/MoteISTx5/PlatformP.nc create mode 100755 tos/platforms/MoteISTx5/chips/cc2420/HplCC2420AlarmC.nc create mode 100755 tos/platforms/MoteISTx5/chips/cc2420/HplCC2420InterruptsC.nc create mode 100755 tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc create mode 100755 tos/platforms/MoteISTx5/chips/cc2420/HplCC2420SpiC.nc create mode 100755 tos/platforms/MoteISTx5/hardware.h create mode 100755 tos/platforms/MoteISTx5/hardware/adc/DemoSensorC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/adc/DemoSensorNowC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/adc/DemoSensorStreamC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/adc/PlatformAdcC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/adc/VoltageC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/buttons/HplUserButtonC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/buttons/SwitchToggleC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/buttons/UserButton.h create mode 100755 tos/platforms/MoteISTx5/hardware/buttons/UserButtonC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/buttons/UserButtonP.nc create mode 100755 tos/platforms/MoteISTx5/hardware/clock/PlatformClockC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc create mode 100755 tos/platforms/MoteISTx5/hardware/leds/LedsC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/leds/LedsP.nc create mode 100755 tos/platforms/MoteISTx5/hardware/leds/PlatformLedsC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/leds/PlatformLedsP.nc create mode 100755 tos/platforms/MoteISTx5/hardware/pins/PlatformPinsC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc create mode 100755 tos/platforms/MoteISTx5/hardware/usci/PlatformSerialC.nc create mode 100755 tos/platforms/MoteISTx5/hardware/usci/PlatformSerialP.nc create mode 100644 tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc create mode 100644 tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc create mode 100755 tos/platforms/MoteISTx5/hardware/usci/PlatformUsciInitC.nc create mode 100755 tos/platforms/MoteISTx5/platform.h create mode 100755 tos/platforms/MoteISTx5/platform_message.h diff --git a/support/make/MoteISTx5.target b/support/make/MoteISTx5.target new file mode 100755 index 0000000000..45ccecf386 --- /dev/null +++ b/support/make/MoteISTx5.target @@ -0,0 +1,9 @@ +#-*-Makefile-*- vim:syntax=make + +PLATFORM = MoteISTx5 +MSP_MCU = msp430x5438 + +$(call TOSMake_include_platform,msp) + +MoteISTx5: $(BUILD_DEPS) + @: diff --git a/tos/platforms/MoteISTx5/.platform b/tos/platforms/MoteISTx5/.platform new file mode 100755 index 0000000000..14bdf3c1a5 --- /dev/null +++ b/tos/platforms/MoteISTx5/.platform @@ -0,0 +1,92 @@ +# Includes that should take precedence come first. Platforms come before +# chips because they may override files. These must be specified as +# @includes instead of -I's to @opts, otherwise the %T won't be processed +# by ncc. + +for (split(/\n/, <<'EOText' + + %P/hardware/pins + %P/hardware/buttons + %P/hardware/leds + %P/hardware/usci + %P/hardware/adc + %P/hardware/clock + + %T/chips/msp430/x5xxx + %T/chips/msp430/x5xxx/lpm + %T/chips/msp430/x5xxx/timer + %T/chips/msp430/x5xxx/usci + %T/chips/msp430 + %T/chips/msp430/pins + %T/chips/msp430/timer + + %T/chips/msp430/pmm + %T/chips/msp430/adc12 + + %T/platforms/MoteISTx5/chips/cc2420 + %T/chips/cc2420 + %T/chips/cc2420/alarm + %T/chips/cc2420/control + %T/chips/cc2420/csma + %T/chips/cc2420/interfaces + %T/chips/cc2420/link + %T/chips/cc2420/lowpan + %T/chips/cc2420/lpl + %T/chips/cc2420/packet + %T/chips/cc2420/receive + %T/chips/cc2420/spi + %T/chips/cc2420/transmit + %T/chips/cc2420/unique + + %T/lib/timer + %T/lib/serial + %T/lib/power + + %T/lib/util/keyvaluerecord + %T/lib/serialprintf + +EOText +)) { + s/\#.*$//; + s/^\s*//g; + s/\s*$//g; + push(@includes, $_) if $_; +} + +@opts = qw( + -gcc=msp430-gcc + -mmcu=msp430x5438 + -fnesc-target=msp430 + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask +); + + + +#push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; +#push @opts, "-mingw-gcc" if $cygwin; + +$ENV{'CIL_MACHINE'} = + "version_major=3 " . + "version_minor=2 " . + "version=msp430-3.2.3 " . + "short=2,2 " . + "int=2,2 " . + "long=4,2 " . + "long_long=8,2 " . + "pointer=2,2 " . + "enum=2,2 " . + "float=4,2 " . + "double=4,2 " . + "long_double=4,2 " . + "void=1,1 " . + "fun=1,2 " . + "wchar_size_size=2,2 " . + "alignof_string=1 " . + "max_alignment=1 " . + "char_wchar_signed=true,true " . + "const_string_literals=true " . + "big_endian=false " . + "underscore_name=false " . + "__builtin_va_list=true " . + "__thread_is_keyword=true"; + diff --git a/tos/platforms/MoteISTx5/ActiveMessageC.nc b/tos/platforms/MoteISTx5/ActiveMessageC.nc new file mode 100755 index 0000000000..4fdf7afb38 --- /dev/null +++ b/tos/platforms/MoteISTx5/ActiveMessageC.nc @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2004-2005 The Regents of the University of California. + * Copyright (c) 2004-2005 Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * The Active Message layer on the Telos platform. This is a naming wrapper + * around the CC2420 Active Message layer. + * + * @author Philip Levis + */ + +configuration ActiveMessageC { + provides { + interface SplitControl; + + interface AMSend[uint8_t id]; + interface Receive[uint8_t id]; + interface Receive as Snoop[uint8_t id]; + + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; + } +} +implementation { + components CC2420ActiveMessageC as AM; + + SplitControl = AM; + + AMSend = AM; + Receive = AM.Receive; + Snoop = AM.Snoop; + Packet = AM; + AMPacket = AM; + PacketAcknowledgements = AM; +} diff --git a/tos/platforms/MoteISTx5/Ieee154MessageC.nc b/tos/platforms/MoteISTx5/Ieee154MessageC.nc new file mode 100755 index 0000000000..724fd7fc6f --- /dev/null +++ b/tos/platforms/MoteISTx5/Ieee154MessageC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2008 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Stephen Dawson-Haggerty + */ + +configuration Ieee154MessageC { + provides { + interface SplitControl; + + interface Resource as SendResource[uint8_t clientId]; + interface Ieee154Send; + interface Receive as Ieee154Receive; + + interface Ieee154Packet; + interface Packet; + + interface PacketAcknowledgements; + interface LinkPacketMetadata; + interface LowPowerListening; + interface PacketLink; + } + +} implementation { + components CC2420Ieee154MessageC as Msg; + + SplitControl = Msg; + SendResource = Msg; + Ieee154Send = Msg; + Ieee154Receive = Msg; + Ieee154Packet = Msg; + Packet = Msg; + + PacketAcknowledgements = Msg; + LinkPacketMetadata = Msg; + LowPowerListening = Msg; + PacketLink = Msg; +} diff --git a/tos/platforms/MoteISTx5/LocalIeeeEui64C.nc b/tos/platforms/MoteISTx5/LocalIeeeEui64C.nc new file mode 100644 index 0000000000..20e7d020d3 --- /dev/null +++ b/tos/platforms/MoteISTx5/LocalIeeeEui64C.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE.* All rights reserved. + */ + + /** + * Stephen Dawson-Haggerty + * Dummy Extended Address + */ + +#include "IeeeEui64.h" + +module LocalIeeeEui64C { + provides interface LocalIeeeEui64; +} implementation { + command ieee_eui64_t LocalIeeeEui64.getId() { + ieee_eui64_t id; + /* this is UCB's OUI */ + id.data[0] = 0x00; + id.data[1] = 0x12; + id.data[2] = 0x6d; + + /* UCB will let anyone use this OUI so long as these two octets + are 'LO' -- "local". All other octets are reserved. */ + /* SDH -- 9/10/2010 */ + id.data[3] = 'L'; + id.data[4] = 'O'; + + id.data[5] = 0; + id.data[6] = TOS_NODE_ID >> 8; + id.data[7] = TOS_NODE_ID & 0xff; + return id; + } +} diff --git a/tos/platforms/MoteISTx5/PlatformC.nc b/tos/platforms/MoteISTx5/PlatformC.nc new file mode 100755 index 0000000000..5775392ab0 --- /dev/null +++ b/tos/platforms/MoteISTx5/PlatformC.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Joe Polastre + * @author Cory Sharp + * @author David Moss + */ + +#include "hardware.h" + +configuration PlatformC { + provides interface Init as PlatformInit; + uses interface Init as PeripheralInit; +} + +implementation { + + components PlatformP; + PlatformInit = PlatformP; + PeripheralInit = PlatformP.PeripheralInit; + + components PlatformPinsC; + PlatformP.PlatformPins -> PlatformPinsC; + + components PlatformLedsC; + PlatformP.PlatformLeds -> PlatformLedsC; + + components PlatformClockC; + PlatformP.PlatformClock -> PlatformClockC; +} diff --git a/tos/platforms/MoteISTx5/PlatformP.nc b/tos/platforms/MoteISTx5/PlatformP.nc new file mode 100755 index 0000000000..05a068454b --- /dev/null +++ b/tos/platforms/MoteISTx5/PlatformP.nc @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +module PlatformP { + provides interface Init; + uses { + interface Init as PlatformPins; + interface Init as PlatformLeds; + interface Init as Msp430Pmm; + interface Init as PlatformClock; + interface Init as MoteInit; + interface Init as PeripheralInit; + } +} + +implementation { + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + command error_t Init.init() { + WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer + + call PlatformPins.init(); // Initializes the GIO pins + call PlatformLeds.init(); // Initializes the Leds + call PlatformClock.init(); // Initializes UCS + call PeripheralInit.init(); + + // Wait an arbitrary 10 milliseconds for the FLL to calibrate the DCO + // before letting the system continue on into a low power mode. + uwait(1024*10); + + return SUCCESS; + } + + /***************** Defaults ***************/ + default command error_t PeripheralInit.init() { + return SUCCESS; + } +} diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420AlarmC.nc new file mode 100755 index 0000000000..f1afbf51f6 --- /dev/null +++ b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420AlarmC.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * HPL implementation of 32khz alarms for the ChipCon CC2420 radio + * connected to a TI MSP430 processor. + * + * @author Jonathan Hui + */ + +generic configuration HplCC2420AlarmC() { + provides interface Init; + provides interface Alarm as Alarm32khz32; +} + +implementation { + + components new Alarm32khz32C(); + + Init = Alarm32khz32C; + Alarm32khz32 = Alarm32khz32C; +} diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420InterruptsC.nc new file mode 100755 index 0000000000..77a00eb5f1 --- /dev/null +++ b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420InterruptsC.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * HPL implementation of interrupts and captures for the ChipCon + * CC2420 radio connected to a TI MSP430 processor. + * + * @author Jonathan Hui + */ + +/** + * Adapted for MSP430f5438 TestBoard - Moteist++s5 prototype + * + * @author João Gonçalves + * + * Thesis: PowerEmb; http://gems.leme.org.pt/PmWiki/index.php/Projects/PowerEmb + * www.ist.utl.pt + * $Date: 2011/05/26 17:10:00 $ + */ + +configuration HplCC2420InterruptsC { + provides interface GpioCapture as CaptureSFD; + provides interface GpioInterrupt as InterruptCCA; + provides interface GpioInterrupt as InterruptFIFOP; +} + +implementation { + + components HplMsp430GeneralIOC as GeneralIOC; + components Msp430TimerC; + components new GpioCaptureC() as CaptureSFDC; + CaptureSFDC.Msp430TimerControl -> Msp430TimerC.Control1_A0; + CaptureSFDC.Msp430Capture -> Msp430TimerC.Capture1_A0; + CaptureSFDC.GeneralIO -> GeneralIOC.Port21; + + components HplMsp430InterruptC; + components new Msp430InterruptC() as InterruptCCAC; + components new Msp430InterruptC() as InterruptFIFOPC; + InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port24; + InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port23; + + CaptureSFD = CaptureSFDC.Capture; + InterruptCCA = InterruptCCAC.Interrupt; + InterruptFIFOP = InterruptFIFOPC.Interrupt; +} diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc new file mode 100755 index 0000000000..410e60133c --- /dev/null +++ b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc @@ -0,0 +1,111 @@ +/* + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * HPL implementation of general-purpose I/O for the ChipCon CC2420 + * radio connected to a TI MSP430 processor. + * + * @author Jonathan Hui + */ + +/** + * Adapted for MSP430f5438 TestBoard - Moteist++s5 prototype + * + * @author João Gonçalves + * Thesis: PowerEmb; http://gems.leme.org.pt/PmWiki/index.php/Projects/PowerEmb + * www.ist.utl.pt + * $Date: 2011/05/26 17:15:00 $ +*/ + +configuration HplCC2420PinsC { + provides { + interface GeneralIO as CCA; + interface GeneralIO as CSN; + interface GeneralIO as FIFO; + interface GeneralIO as FIFOP; + interface GeneralIO as RSTN; + interface GeneralIO as SFD; + interface GeneralIO as VREN; + } + +implementation { + components HplMsp430GeneralIOC as GeneralIOC; + components new Msp430GpioC() as CCAM; + components new Msp430GpioC() as CSNM; + components new Msp430GpioC() as FIFOM; + components new Msp430GpioC() as FIFOPM; + components new Msp430GpioC() as RSTNM; + components new Msp430GpioC() as SFDM; + components new Msp430GpioC() as VRENM; + +#ifdef notdef +// Zoul + CCAM -> GeneralIOC.Port14; + CSNM -> GeneralIOC.Port42; + FIFOM -> GeneralIOC.Port13; + FIFOPM -> GeneralIOC.Port10; + RSTNM -> GeneralIOC.Port46; + SFDM -> GeneralIOC.Port41; + VRENM -> GeneralIOC.Port45; +#endif + +#ifdef notdef +// moteist++s2 + CCAM -> GeneralIOC.Port85; + CSNM -> GeneralIOC.Port30; + FIFOM -> GeneralIOC.Port34; + FIFOPM -> GeneralIOC.Port35; + RSTNM -> GeneralIOC.Port83; + SFDM -> GeneralIOC.Port84; + VRENM -> GeneralIOC.Port82; +#endif + +//moteist++s5 testboard + SFDM -> GeneralIOC.Port21; + FIFOM -> GeneralIOC.Port22; + FIFOPM -> GeneralIOC.Port23; + CCAM -> GeneralIOC.Port24; + RSTNM -> GeneralIOC.Port25; + VRENM -> GeneralIOC.Port26; + CSNM -> GeneralIOC.Port30; + + CCA = CCAM; + CSN = CSNM; + FIFO = FIFOM; + FIFOP = FIFOPM; + RSTN = RSTNM; + SFD = SFDM; + VREN = VRENM; +} diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420SpiC.nc new file mode 100755 index 0000000000..0a5efa7917 --- /dev/null +++ b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420SpiC.nc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * HPL implementation of the SPI bus for the ChipCon CC2420 radio + * connected to a TI MSP430 processor. + * + * @author Jonathan Hui + */ + +generic configuration HplCC2420SpiC() { + provides interface Resource; + provides interface SpiByte; + provides interface SpiPacket; +} + +implementation { + + //components PlatformSpiC as SpiC; + components new Msp430UsciSpiB0C() as SpiC; + // components new Msp430Spi0C() as SpiC; + + Resource = SpiC; + SpiByte = SpiC; + SpiPacket = SpiC; +} diff --git a/tos/platforms/MoteISTx5/hardware.h b/tos/platforms/MoteISTx5/hardware.h new file mode 100755 index 0000000000..05ab8c36c5 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware.h @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter Bigot + */ + +#ifndef _H_hardware_h +#define _H_hardware_h + +#include "msp430hardware.h" + +// enum so components can override power saving, +// as per TEP 112. +enum { + TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, +}; + +#define __msp430x543x +//Unlock for Special funcionality of PINS such as SPI + +/* Use the PlatformAdcC component, and enable 8 pins */ +//#define ADC12_USE_PLATFORM_ADC 1 +//#define ADC12_PIN_AUTO_CONFIGURE 1 +//#define ADC12_PINS_AVAILABLE 8 + +/* @TODO@ Disable probe for XT1 support until the anomaly observed in + * apps/bootstrap/LocalTime is resolved. */ +#ifndef PLATFORM_MSP430_HAS_XT1 +#define PLATFORM_MSP430_HAS_XT1 1 +#endif /* PLATFORM_MSP430_HAS_XT1 */ + +// LEDs +TOSH_ASSIGN_PIN(RED_LED, 4, 7); +TOSH_ASSIGN_PIN(GREEN_LED, 4, 5); +TOSH_ASSIGN_PIN(YELLOW_LED, 4, 6); + +// CC2420 RADIO #defines +TOSH_ASSIGN_PIN(RADIO_CSN, 3, 0); +TOSH_ASSIGN_PIN(RADIO_VREF, 2, 6); +TOSH_ASSIGN_PIN(RADIO_RESET, 2, 5); +TOSH_ASSIGN_PIN(RADIO_FIFOP, 2, 3); +TOSH_ASSIGN_PIN(RADIO_SFD, 2, 1); +TOSH_ASSIGN_PIN(RADIO_GIO0, 5, 0); +TOSH_ASSIGN_PIN(RADIO_FIFO, 2, 2); +TOSH_ASSIGN_PIN(RADIO_GIO1, 5, 1); +TOSH_ASSIGN_PIN(RADIO_CCA, 2, 4); + +TOSH_ASSIGN_PIN(CC_FIFOP, 2, 3); +TOSH_ASSIGN_PIN(CC_FIFO, 2, 2); +TOSH_ASSIGN_PIN(CC_SFD, 2, 1); +TOSH_ASSIGN_PIN(CC_VREN, 2, 6); +TOSH_ASSIGN_PIN(CC_RSTN, 2, 5); + +#endif // _H_hardware_h diff --git a/tos/platforms/MoteISTx5/hardware/adc/DemoSensorC.nc b/tos/platforms/MoteISTx5/hardware/adc/DemoSensorC.nc new file mode 100755 index 0000000000..31dfb7dab7 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/adc/DemoSensorC.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular DemoSensorC on the telosb platform provides a + * voltage reading, using VoltageC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorC() { + provides interface Read; +} +implementation { + components new VoltageC() as DemoSensor; + Read = DemoSensor; +} diff --git a/tos/platforms/MoteISTx5/hardware/adc/DemoSensorNowC.nc b/tos/platforms/MoteISTx5/hardware/adc/DemoSensorNowC.nc new file mode 100755 index 0000000000..7f3b5d16a1 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/adc/DemoSensorNowC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE.x + */ + +/** + * DemoSensorNowC is a generic sensor device that provides a 16-bit + * value that can be read from async context. The platform author + * chooses which sensor actually sits behind DemoSensorNowC, and + * though it's probably Voltage, Light, or Temperature, there are no + * guarantees. + * + * This particular DemoSensorNowC on the telosb platform provides a + * voltage reading, using VoltageC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorNowC() { + provides interface Resource; + provides interface ReadNow; +} +implementation { + components new Msp430InternalVoltageC() as DemoSensorNow; + + Resource = DemoSensorNow; + ReadNow = DemoSensorNow; +} diff --git a/tos/platforms/MoteISTx5/hardware/adc/DemoSensorStreamC.nc b/tos/platforms/MoteISTx5/hardware/adc/DemoSensorStreamC.nc new file mode 100755 index 0000000000..4f476b2412 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/adc/DemoSensorStreamC.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorStreamC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorStreamC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular DemoSensorStreamC on the telosb platform provides a + * voltage reading, using VoltageStreamC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorStreamC() { + provides interface ReadStream; +} +implementation { + components new VoltageC() as DemoSensor; + ReadStream = DemoSensor; +} diff --git a/tos/platforms/MoteISTx5/hardware/adc/PlatformAdcC.nc b/tos/platforms/MoteISTx5/hardware/adc/PlatformAdcC.nc new file mode 100755 index 0000000000..e5ea8d4e38 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/adc/PlatformAdcC.nc @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +configuration PlatformAdcC { + provides { + interface HplMsp430GeneralIO as A0; + interface HplMsp430GeneralIO as A1; + interface HplMsp430GeneralIO as A2; + interface HplMsp430GeneralIO as A3; + interface HplMsp430GeneralIO as A4; + interface HplMsp430GeneralIO as A5; + interface HplMsp430GeneralIO as A6; + interface HplMsp430GeneralIO as A7; + + interface Msp430Timer as TimerA; + interface Msp430TimerControl as ControlA0; + interface Msp430TimerControl as ControlA1; + interface Msp430Compare as CompareA0; + interface Msp430Compare as CompareA1; + } +} + +implementation { + + components HplMsp430GeneralIOC; + A0 = HplMsp430GeneralIOC.Port20; + A1 = HplMsp430GeneralIOC.Port21; + A2 = HplMsp430GeneralIOC.Port22; + A3 = HplMsp430GeneralIOC.Port23; + A4 = HplMsp430GeneralIOC.Port24; + A5 = HplMsp430GeneralIOC.Port25; + A6 = HplMsp430GeneralIOC.Port26; + A7 = HplMsp430GeneralIOC.Port27; + + components Msp430TimerC; + TimerA = Msp430TimerC.Timer0_A; + ControlA0 = Msp430TimerC.Control0_A0; + ControlA1 = Msp430TimerC.Control0_A1; + CompareA0 = Msp430TimerC.Compare0_A0; + CompareA1 = Msp430TimerC.Compare0_A1; + +} diff --git a/tos/platforms/MoteISTx5/hardware/adc/VoltageC.nc b/tos/platforms/MoteISTx5/hardware/adc/VoltageC.nc new file mode 100755 index 0000000000..e9086fa754 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/adc/VoltageC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * VoltageC is a common name for the Msp430InternalVoltageC voltage + * sensor available on the telosb platform. + * + * To convert from ADC counts to actual voltage, divide by 4096 and + * multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration VoltageC() { + provides { + interface Read; + interface ReadStream; + } +} +implementation { + components new Msp430InternalVoltageC(); + Read = Msp430InternalVoltageC.Read; + ReadStream = Msp430InternalVoltageC.ReadStream; +} diff --git a/tos/platforms/MoteISTx5/hardware/buttons/HplUserButtonC.nc b/tos/platforms/MoteISTx5/hardware/buttons/HplUserButtonC.nc new file mode 100755 index 0000000000..a9cce13afb --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/buttons/HplUserButtonC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the em430 platform + * + * @author Gilman Tolle + * @author Peter A. Bigot + */ + +configuration HplUserButtonC { + provides interface HplMsp430GeneralIO; + provides interface GpioInterrupt; +} +implementation { + components HplMsp430GeneralIOC as GeneralIOC; + components HplMsp430InterruptC as InterruptC; + + HplMsp430GeneralIO = GeneralIOC.Port17; + + components new Msp430InterruptC() as InterruptUserButtonC; + InterruptUserButtonC.HplInterrupt -> InterruptC.Port17; + GpioInterrupt = InterruptUserButtonC.Interrupt; +} diff --git a/tos/platforms/MoteISTx5/hardware/buttons/SwitchToggleC.nc b/tos/platforms/MoteISTx5/hardware/buttons/SwitchToggleC.nc new file mode 100755 index 0000000000..b7dfa1bce4 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/buttons/SwitchToggleC.nc @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Not quite generic layer to translate a GIO into a toggle switch + * (Newer MSP430 chips require configuring pull-up resistor) + * + * @author Gilman Tolle + * @author Peter A. Bigot + */ + +#include + +generic module SwitchToggleC() { + provides interface Get; + provides interface Notify; + + uses interface HplMsp430GeneralIO; + uses interface GpioInterrupt; +} +implementation { + norace bool m_pinHigh; + + task void sendEvent(); + + command bool Get.get() { return call HplMsp430GeneralIO.get(); } + + command error_t Notify.enable() { + error_t rv; + + call HplMsp430GeneralIO.makeInput(); + call HplMsp430GeneralIO.setResistor(MSP430_PORT_RESISTOR_PULLUP); + if ( call HplMsp430GeneralIO.get() ) { + m_pinHigh = TRUE; + return call GpioInterrupt.enableFallingEdge(); + } else { + m_pinHigh = FALSE; + return call GpioInterrupt.enableRisingEdge(); + } + } + + command error_t Notify.disable() { + return call GpioInterrupt.disable(); + } + + async event void GpioInterrupt.fired() { + call GpioInterrupt.disable(); + + m_pinHigh = !m_pinHigh; + + post sendEvent(); + } + + task void sendEvent() { + bool pinHigh; + pinHigh = m_pinHigh; + signal Notify.notify( pinHigh ); + if ( pinHigh ) + call GpioInterrupt.enableFallingEdge(); + else + call GpioInterrupt.enableRisingEdge(); + } +} diff --git a/tos/platforms/MoteISTx5/hardware/buttons/UserButton.h b/tos/platforms/MoteISTx5/hardware/buttons/UserButton.h new file mode 100755 index 0000000000..bb0065fbdb --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/buttons/UserButton.h @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + */ + +#ifndef USERBUTTON_H +#define USERBUTTON_H + +typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t; + +#endif diff --git a/tos/platforms/MoteISTx5/hardware/buttons/UserButtonC.nc b/tos/platforms/MoteISTx5/hardware/buttons/UserButtonC.nc new file mode 100755 index 0000000000..f208b8638f --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/buttons/UserButtonC.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform. Get + * returns the current state of the button by reading the pin, + * regardless of whether enable() or disable() has been called on the + * Interface. Notify.enable() and Notify.disable() modify the + * underlying interrupt state of the pin, and have the effect of + * enabling or disabling notifications that the button has changed + * state. + * + * @author Gilman Tolle + */ + +#include + +configuration UserButtonC { + provides interface Get; + provides interface Notify; +} +implementation { + components HplUserButtonC; + components new SwitchToggleC(); + SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt; + SwitchToggleC.HplMsp430GeneralIO -> HplUserButtonC.HplMsp430GeneralIO; + + components UserButtonP; + Get = UserButtonP; + Notify = UserButtonP; + + UserButtonP.GetLower -> SwitchToggleC.Get; + UserButtonP.NotifyLower -> SwitchToggleC.Notify; +} diff --git a/tos/platforms/MoteISTx5/hardware/buttons/UserButtonP.nc b/tos/platforms/MoteISTx5/hardware/buttons/UserButtonP.nc new file mode 100755 index 0000000000..a25838de6f --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/buttons/UserButtonP.nc @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + */ + +#include + +module UserButtonP { + provides interface Get; + provides interface Notify; + + uses interface Get as GetLower; + uses interface Notify as NotifyLower; +} +implementation { + + command button_state_t Get.get() { + if ( call GetLower.get() ) { + return BUTTON_PRESSED; + } else { + return BUTTON_RELEASED; + } + } + + command error_t Notify.enable() { + return call NotifyLower.enable(); + } + + command error_t Notify.disable() { + return call NotifyLower.disable(); + } + + event void NotifyLower.notify( bool val ) { + // telosb user button pin is high when released - invert state + if ( val ) { + signal Notify.notify( BUTTON_RELEASED ); + } else { + signal Notify.notify( BUTTON_PRESSED ); + } + } + + default event void Notify.notify( button_state_t val ) { } +} diff --git a/tos/platforms/MoteISTx5/hardware/clock/PlatformClockC.nc b/tos/platforms/MoteISTx5/hardware/clock/PlatformClockC.nc new file mode 100755 index 0000000000..d5b03b68d3 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/clock/PlatformClockC.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Top-level initialization of anything to do with the clock + * subsystem. + * + * @author Peter A. Bigot + */ + +configuration PlatformClockC { + provides interface Init; +} implementation { + components Msp430XV2ClockC; + components PlatformClockP; + PlatformClockP.SubInit -> Msp430XV2ClockC; + Init = PlatformClockP; +} diff --git a/tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc b/tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc new file mode 100755 index 0000000000..cf3b9554e8 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Top-level initialization of anything to do with the clock + * subsystem. + * + * We mostly use the standard initialization in + * Msp430XV2ClockControlP, except that we may or may not have an + * external 32kHz crystal populated. + * + * If the PLATFORM_MSP430_HAS_XT1 preprocessor symbol is undefined, or is defined + * to a non-zero value, the XIN and XOUT pins are configured to their + * XT1 function. The code loops up to 625ms waiting for XT1 + * stability. If stability is not achieved, the XT1 functionality is + * disabled. Stabilization appears to take roughly 150ms, for the one + * sample point I have available. + * + * If the PLATFORM_MSP430_HAS_XT1 preprocessor symbol is defined to zero, the XT1 + * functionality is left disabled per power-up, and no start-up delay + * is incurred. + * + * @author Peter A. Bigot + */ + +module PlatformClockP { + provides interface Init; + uses interface Init as SubInit; +} implementation { + default command error_t SubInit.init () { } + command error_t Init.init () + { +#if defined(PLATFORM_MSP430_HAS_XT1) && (0 == PLATFORM_MSP430_HAS_XT1) + /* Specifically told that there is no crystal. Do nothing. */ +#else /* PLATFORM_MSP430_HAS_XT1 */ + /* Either we don't know whether there's a crystal, or we've been + * told to expect one. Configure it and see whether a stable XT1 + * can be identified. If so, run with it; if not, restore the + * default configuration. + * + * If we were told there should be a crystal present, but it + * doesn't stabilize, this is probably an error, but can't do + * anything about it here. */ + + /* Enable XT1, permanently, with no additional capacitance. + * + * @note Both 5.0 and 5.1 must be cleared in P5DIR. + * + * @note If the default capacitance of XCAP_3 is retained, SMCLK + * measures 4 per-mil faster than it should. On the SuRF + * hardware, setting XCAP to zero appears to work. Other values + * may be necessary on other hardware. */ + + // Dir = X (dont care) when P7SEL in crystal mode + // P7DIR &= ~(BIT0 | BIT1); + + //set P7SEL.0 and P7SEL.1 to cristal mode (XIN and XOUT bits = 1) + P7SEL |= (BIT0 | BIT1); + // XT1 on, sourced internally + UCSCTL6 &= ~(XT1BYPASS | XT1OFF | XCAP_3); + + /* Spin waiting for a stable signal. This loop runs somewhere + * between 10K and 20K times; if it gets to 65536 without success, + * assume the crystal's absent or broken. At the power-up DCO + * rate of 2MHz and no crystal, the loop takes 625ms to + * complete. + * + * @note The UCS module will fall back to REFOCLK if configured + * for LF-mode XT1 and XT1 is not stable. It does not, however, + * revert to XT1 upon stabilization: the UCS module documentation + * implies that OFIFG must be cleared for this to occur. + * Consequently, we have to wait for stabilization even if we + * "know" a crystal is present. */ + + { + //From TI example code msp430x54x_UCS_2.c + do { + // Clear XT2,XT1,DCO fault flags + UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while (SFRIFG1&OFIFG); // Test oscillator fault flag + } + + //previous from cc430 port +#ifdef notdef + uint16_t ctr = 0; + do { + UCSCTL7 &= ~(XT1LFOFFG + DCOFFG); + SFRIFG1 &= ~OFIFG; + }while (++ctr && (SFRIFG1 & OFIFG)); + } +#endif + + /* If the XT1 signal is still not valid, disable it; otherwise, + * lower the power it uses. (XT1DRIVE setting suggested by TI + * example code.) + */ + if (UCSCTL7 & XT1LFOFFG) { + //P7DIR |= (BIT0 | BIT1); + P7SEL &= ~(BIT0| BIT1); + UCSCTL6 |= XT1OFF; + } else { + /* TI example code suggests clearing XT1DRIVE to reduce power. + * Current measurement does not indicate any value in doing so, + * at least not in LPM4, but it doesn't seem to hurt either. + */ + UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive + } + +#endif /* PLATFORM_MSP430_HAS_XT1 */ + + return call SubInit.init(); + } +} diff --git a/tos/platforms/MoteISTx5/hardware/leds/LedsC.nc b/tos/platforms/MoteISTx5/hardware/leds/LedsC.nc new file mode 100755 index 0000000000..8f5da66904 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/leds/LedsC.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * EM430 has only two LEDs. + * @author Peter A. Bigot + */ + +configuration LedsC { + provides interface Leds; +} +implementation { + components PlatformLedsC; + + Leds = PlatformLedsC; +} diff --git a/tos/platforms/MoteISTx5/hardware/leds/LedsP.nc b/tos/platforms/MoteISTx5/hardware/leds/LedsP.nc new file mode 100755 index 0000000000..f595c8e8c0 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/leds/LedsP.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** +* 3 LED implementation + * + * @author Peter A. Bigot + * @author João Gonçalves + */ + +module LedsP @safe() { + provides interface Leds; + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} +implementation { +} diff --git a/tos/platforms/MoteISTx5/hardware/leds/PlatformLedsC.nc b/tos/platforms/MoteISTx5/hardware/leds/PlatformLedsC.nc new file mode 100755 index 0000000000..b3de410427 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/leds/PlatformLedsC.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter A. Bigot + */ + +#include "hardware.h" + +configuration PlatformLedsC { + provides { + interface Init; + interface Leds; + } +} +implementation { + components PlatformLedsP; + Leds = PlatformLedsP; + Init = PlatformLedsP; + + components HplMsp430GeneralIOC as GeneralIOC; + + /* RED LED (D1) at P4.7 */ + components new Msp430GpioC() as Led0Impl; + Led0Impl -> GeneralIOC.Port47; + PlatformLedsP.Led0 -> Led0Impl; + + /* Yellow LED (D2) at P4.6 */ + components new Msp430GpioC() as Led1Impl; + Led1Impl -> GeneralIOC.Port46; + PlatformLedsP.Led1 -> Led1Impl; + + /* Green LED (D1) at P4.5 */ + components new Msp430GpioC() as Led2Impl; + Led2Impl -> GeneralIOC.Port45; + PlatformLedsP.Led2 -> Led2Impl; +} diff --git a/tos/platforms/MoteISTx5/hardware/leds/PlatformLedsP.nc b/tos/platforms/MoteISTx5/hardware/leds/PlatformLedsP.nc new file mode 100755 index 0000000000..40cc5bc966 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/leds/PlatformLedsP.nc @@ -0,0 +1,148 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This module provides the general Led interface. + * + * The advantage to doing it this way is we can now create a platforms + * that provide more or less than 3 LED's, and the LED's can be pull-up or + * pull-down enabled. + * + * @author David Moss + */ + +module PlatformLedsP { + provides { + interface Init; + interface Leds; + } + + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} + +implementation { + + /***************** Init Commands ****************/ + command error_t Init.init() { + atomic { + call Led0.makeOutput(); + call Led1.makeOutput(); + call Led2.makeOutput(); + call Led0.clr(); + call Led1.clr(); + call Led2.clr(); + } + return SUCCESS; + } + + /***************** Leds Commands ****************/ + async command void Leds.led0On() { + call Led0.clr(); + } + + async command void Leds.led0Off() { + call Led0.set(); + } + + async command void Leds.led0Toggle() { + call Led0.toggle(); + } + + async command void Leds.led1On() { + call Led1.clr(); + } + + async command void Leds.led1Off() { + call Led1.set(); + } + + async command void Leds.led1Toggle() { + call Led1.toggle(); + } + + async command void Leds.led2On() { + call Led2.clr(); + } + + async command void Leds.led2Off() { + call Led2.set(); + } + + async command void Leds.led2Toggle() { + call Led2.toggle(); + } + + async command uint8_t Leds.get() { + uint8_t rval; + atomic { + rval = 0; + if (!call Led0.get()) { + rval |= LEDS_LED0; + } + if (!call Led1.get()) { + rval |= LEDS_LED1; + } + if (!call Led2.get()) { + rval |= LEDS_LED2; + } + } + return rval; + } + + async command void Leds.set(uint8_t val) { + atomic { + if (val & LEDS_LED0) { + call Leds.led0On(); + } else { + call Leds.led0Off(); + } + if (val & LEDS_LED1) { + call Leds.led1On(); + } else { + call Leds.led1Off(); + } +#ifdef notdef + if (val & LEDS_LED2) { + call Leds.led2On(); + } else { + call Leds.led2Off(); + } +#endif + } + } +} diff --git a/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsC.nc b/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsC.nc new file mode 100755 index 0000000000..5a77232299 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author David Moss + * @author Peter A. Bigot + */ + +configuration PlatformPinsC { + provides { + interface Init; + } +} + +implementation { + components PlatformPinsP; + Init = PlatformPinsP; +} diff --git a/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc b/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc new file mode 100755 index 0000000000..4a685a7711 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformPinsP { + provides interface Init; +} + +implementation { + int i; + + command error_t Init.init() { + atomic { + +#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) + P1DIR = 0xFF; + P1OUT = 0xFF; +#endif + +#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) + P2DIR = 0xFF; + P2OUT = 0xFF; +#endif + +#if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) + P3DIR = 0xFF; + P3OUT = 0xFF; +#endif + +#if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__) + P4DIR = 0xFF; + P4OUT = 0x7F; + +#endif + +#if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) + P5DIR = 0xFF; + P5OUT = 0xFF; +#endif + +#if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__) + P6DIR = 0xFF; + P6OUT = 0xFF; +#endif + +#if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) + P7DIR = 0xFF; + P7OUT = 0xFF; +#endif + +#if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) + P8DIR = 0xFF; + P8OUT = 0xFF; +#endif + +#if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) + P9DIR = 0xFF; + P9OUT = 0xFF; +#endif + +#if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) + P10DIR = 0xFF; + P10OUT = 0xFF; +#endif + +#if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) + P11DIR = 0xFF; + P11OUT = 0xFF; +#endif + +#if defined(__msp430_have_portJ) || defined(__MSP430_HAS_PORTJ__) || defined(__MSP430_HAS_PORTJ_R__) + PJDIR = 0xFF; + PJOUT = 0xFF; +#endif + +#if 0 /* Disabled: these specific setting sare defaults, but others might not be */ + PMAPPWD = PMAPPW; // Get write-access to port mapping regs + P1MAP5 = PM_UCA0RXD; // Map UCA0RXD output to P1.5 + P1MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6 + PMAPPWD = 0; // Lock port mapping registers +#endif // + + } + return SUCCESS; + } +} diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSerialC.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformSerialC.nc new file mode 100755 index 0000000000..9c471defbd --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformSerialC.nc @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/** + * De-facto standard component for platform independent access to a serial port. + * + * This implementation supports the TI EM430 and other MSP430XV2-based boards. + * + * Note that, since the standard practice is to use StdControl to + * start and stop this module (which requests and releases the + * corresponding USCI UART module), inclusion of this into an + * application is incompatible with sharing the UART among multiple + * clients in the TEP108 sense of resource sharing. + * + * @author David Moss + * @author Peter A. Bigot + */ + +configuration PlatformSerialC { + provides { + interface StdControl; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSerialP; + StdControl = PlatformSerialP; + + components new Msp430UsciUartA0C() as UartC; + + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + PlatformSerialP.Resource -> UartC.Resource; + +} diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSerialP.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformSerialP.nc new file mode 100755 index 0000000000..50fcd72fe4 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformSerialP.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformSerialP { + provides interface StdControl; + uses interface Resource; +} + +implementation { + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop(){ + return call Resource.release(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc new file mode 100644 index 0000000000..6e24437008 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc @@ -0,0 +1,30 @@ + +configuration PlatformSpiC { + provides { + interface SpiByte; + interface Resource; + interface SpiPacket; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSpiP; + + //components MainC; + // MainC.SoftwareInit -> PlatformSpiP; + + components new Msp430UsciSpiB0C() as SpiC; + + SpiByte = SpiC; + Resource = SpiC; + SpiPacket = SpiC; + + Msp430UsciError = SpiC; + PlatformSpiP.Resource -> SpiC.Resource; + + components PlatformLedsC; + PlatformSpiP.Leds -> PlatformLedsC; + +} diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc new file mode 100644 index 0000000000..852e3aa4a0 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc @@ -0,0 +1,17 @@ + +module PlatformSpiP { + provides interface Init; + uses { + interface Resource; + interface Leds; + } +} + +implementation { + + command error_t Init.init() { + return call Resource.immediateRequest(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciInitC.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciInitC.nc new file mode 100755 index 0000000000..73dc0de4fc --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciInitC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Connect the appropriate pins for USCI support on a CC430. + * + * @author Peter A. Bigot + */ + +configuration PlatformUsciInitC { +} implementation { + components HplMsp430GeneralIOC as GIO; + + // components Msp430UsciUartA0P as UartA0C; +// UartA0C.URXD -> GIO.UCA0RXD; +// UartA0C.UTXD -> GIO.UCA0TXD; + + components Msp430UsciSpiB0P as SpiB0C; + SpiB0C.SIMO -> GIO.UCB0SIMO; + SpiB0C.SOMI -> GIO.UCB0SOMI; + SpiB0C.CLK -> GIO.UCB0CLK; +} diff --git a/tos/platforms/MoteISTx5/platform.h b/tos/platforms/MoteISTx5/platform.h new file mode 100755 index 0000000000..e69de29bb2 diff --git a/tos/platforms/MoteISTx5/platform_message.h b/tos/platforms/MoteISTx5/platform_message.h new file mode 100755 index 0000000000..d33207424b --- /dev/null +++ b/tos/platforms/MoteISTx5/platform_message.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005 The Regents of the University of California. + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Defining the platform-independently named packet structures to be the + * chip-specific CC1000 packet structures. + * + * @author Philip Levis + */ + +#ifndef PLATFORM_MESSAGE_H +#define PLATFORM_MESSAGE_H + +#include +#include + +typedef union message_header { + cc2420_header_t cc2420; + serial_header_t serial; +} message_header_t; + +typedef union TOSRadioFooter { + cc2420_footer_t cc2420; +} message_footer_t; + +typedef union TOSRadioMetadata { + cc2420_metadata_t cc2420; +} message_metadata_t; + +#endif From a49fbb12f347c1397f98752a3a4b9c525ce6c920 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 29 Jun 2011 00:15:40 -0700 Subject: [PATCH 124/411] update telosa/PlatformHdlcUart to use new dma driver --- tos/platforms/telosa/PlatformHdlcUartC.nc | 2 +- tos/platforms/telosa/PlatformHdlcUartP.nc | 33 +++++++++++++++++++---- 2 files changed, 29 insertions(+), 6 deletions(-) diff --git a/tos/platforms/telosa/PlatformHdlcUartC.nc b/tos/platforms/telosa/PlatformHdlcUartC.nc index 8f3f8159ab..2d4d75fa74 100644 --- a/tos/platforms/telosa/PlatformHdlcUartC.nc +++ b/tos/platforms/telosa/PlatformHdlcUartC.nc @@ -37,7 +37,6 @@ configuration PlatformHdlcUartC { interface HdlcUart; } } implementation { -#warning Enabling DMA on UART1RX components NoLedsC as Leds; components PlatformHdlcUartP as HdlcUartC; @@ -54,6 +53,7 @@ configuration PlatformHdlcUartC { HdlcUartC.Msp430UartConfigure -> TelosSerialP; +#warning Enabling DMA on UART1RX (Channel 2) components Msp430DmaC as DmaC; HdlcUartC.DmaChannel -> DmaC.Channel2; diff --git a/tos/platforms/telosa/PlatformHdlcUartP.nc b/tos/platforms/telosa/PlatformHdlcUartP.nc index 8652bb7758..08bb1f265d 100644 --- a/tos/platforms/telosa/PlatformHdlcUartP.nc +++ b/tos/platforms/telosa/PlatformHdlcUartP.nc @@ -28,6 +28,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE * */ + /* * Improved DMA UART implementation for MSP-base platforms to fix some * of the timing issues. Based on my earlier implementation, but @@ -105,7 +106,7 @@ module PlatformHdlcUartP { } async command void ResourceConfigure.configure() { - msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig(); + const msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig(); call Leds.led0On(); m_byte_time = (config->uartConfig.ubr / 4); // SDH : assume 4MHZ... call Usart.setModeUart(config); @@ -114,7 +115,7 @@ module PlatformHdlcUartP { async command void ResourceConfigure.unconfigure() { call RxAbort.stop(); - call DmaChannel.stopTransfer(); + call DmaChannel.stopDma(); call Usart.resetUsart(TRUE); call Usart.disableIntr(); @@ -149,9 +150,12 @@ module PlatformHdlcUartP { m_rx_buf = __rx_buf; /* SDH : important : the dma transfer won't occur if the - interrupt is enabled */ - call Usart.clrRxIntr(); + * interrupt is enabled + */ call Usart.disableRxIntr(); + call Usart.clrRxIntr(); +#ifdef notdef + /* old dma driver */ call DmaChannel.setupTransfer(DMA_REPEATED_SINGLE_TRANSFER, DMA_TRIGGER_URXIFG1, DMA_EDGE_SENSITIVE, @@ -163,6 +167,25 @@ module PlatformHdlcUartP { DMA_ADDRESS_UNCHANGED, DMA_ADDRESS_INCREMENTED); call DmaChannel.startTransfer(); + /* + * old driver's startTransfer left DMA_EN, and startTransfer turns on DMA_EN but + * doesn't actually start the transfer. First edge of U1RXBUF does that + */ +#endif + /* new dma driver */ + call DmaChannel.setupTransfer( + DMA_DT_RPT | DMA_DT_SINGLE | // interleaved, repeated single, edge + DMA_SB_DB | // SRC byte, DST byte + DMA_SRC_NO_CHNG | // SRC address, no change + DMA_DST_INC | // DST address, increment + DMAIE, + DMA_TRIGGER_URXIFG1, + (uint16_t) U1RXBUF_, + (uint16_t) m_rx_buf, + sizeof(__rx_buf)); + /* new driver's setupTransfer sets DMA_EN, transfer actually starts on the + * rising edge of U1RXBUF + */ /* start the timeout */ /* this will be fired when the buffer is about a third full so we @@ -191,7 +214,7 @@ module PlatformHdlcUartP { m_byte_time * BUFFER_TIMEOUT_BYTES); } - async event void DmaChannel.transferDone(error_t success) { } + async event void DmaChannel.transferDone() { } /* * Send side. no dma here, just send it out. From a80c4b8a9bb15d918e402b4ace262f9afab7ac18 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 29 Jun 2011 00:17:01 -0700 Subject: [PATCH 125/411] temp workaround for errors on ieee154_simple_header and fcf structs --- tos/types/Ieee154.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tos/types/Ieee154.h b/tos/types/Ieee154.h index 8b0e28db93..38a4cf8841 100644 --- a/tos/types/Ieee154.h +++ b/tos/types/Ieee154.h @@ -59,6 +59,7 @@ typedef struct { #define i_saddr ieee_addr.saddr #define i_laddr ieee_addr.laddr +#ifdef notdef typedef nx_struct ieee154_simple_header_t { nxle_uint16_t fcf; nxle_uint8_t dsn; @@ -78,6 +79,7 @@ typedef nx_struct ieee154_fcf_t { nxle_uint16_t frame_version: 2; nxle_uint16_t src_addr_mode: 2; } ieee154_fcf_t; +#endif enum { IEEE154_BROADCAST_ADDR = 0xffff, From 375b732e1b6b25b0e965502ca9e2894b03d45444 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 29 Jun 2011 21:33:17 -0700 Subject: [PATCH 126/411] msp430: telos platforms were overriding optimization, use default. According to rumor there was a bug in the 3.2.3 or some other toolchain in use at the time that required -O after the -Os to override it. However, some applications (say PppRouter) need space optimization inorder to fit, so specifing -Os -O is wrong. This fix deletes the override and just uses the default of -Os. --- support/make/msp/debug.extra | 9 ++++++++- support/make/null/debug.extra | 9 ++++++++- support/make/telosa.target | 5 ++++- support/make/telosb.target | 5 ++++- 4 files changed, 24 insertions(+), 4 deletions(-) diff --git a/support/make/msp/debug.extra b/support/make/msp/debug.extra index 360ba0dc12..4c9598ec3d 100644 --- a/support/make/msp/debug.extra +++ b/support/make/msp/debug.extra @@ -1,4 +1,11 @@ #-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ -OPTFLAGS = -O1 -g -fnesc-no-inline +# Modern GDB debuggers can handle optimized code pretty well so +# we no longer specify -O1 to turn optimization off to simplify +# debugging. Rather use the default optimization level which is -Os +# for size. +# +# OPTFLAGS = -O1 -g -fnesc-no-inline + +OPTFLAGS += -g -fnesc-no-inline diff --git a/support/make/null/debug.extra b/support/make/null/debug.extra index 38c21268f1..92a784d674 100644 --- a/support/make/null/debug.extra +++ b/support/make/null/debug.extra @@ -1,4 +1,11 @@ #-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ -OPTFLAGS += -O1 -g -fnesc-no-inline +# Modern GDB debuggers can handle optimized code pretty well so +# we no longer specify -O1 to turn optimization off to simplify +# debugging. Rather use the default optimization level which is -Os +# for size. +# +# OPTFLAGS += -O1 -g -fnesc-no-inline + +OPTFLAGS += -g -fnesc-no-inline diff --git a/support/make/telosa.target b/support/make/telosa.target index eac0e51528..2ef9dd2240 100644 --- a/support/make/telosa.target +++ b/support/make/telosa.target @@ -7,7 +7,10 @@ MSP_MCU = msp430x149 # Disable MSP430 hardware multiply because it makes MSPGCC die PFLAGS += -mdisable-hwmul -OPTFLAGS += -O + +# The default msp OPTFLAGS should be -Os, that's what we want +# if -O is added here it will override the -Os, we really want -Os +# OPTFLAGS += -O MSP_BSL ?= tos-bsl diff --git a/support/make/telosb.target b/support/make/telosb.target index a4c6d0568c..d26d84bef7 100644 --- a/support/make/telosb.target +++ b/support/make/telosb.target @@ -7,7 +7,10 @@ PLATFORM ?= telosb # Disable MSP430 hardware multiply because it makes MSPGCC die PFLAGS += -mdisable-hwmul -OPTFLAGS += -O + +# The default msp OPTFLAGS should be -Os, that's what we want +# if -O is added here it will override the -Os, we really want -Os +# OPTFLAGS += -O MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --telosb From 33d087476492e7d7f162c6741a5817d46ed2ba45 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 29 Jun 2011 23:01:08 -0700 Subject: [PATCH 127/411] set gitconfig core.autocrlf to input rather than true when core.autocrlf is true it trys to preserve the original EOL setting while making the file outside conform to UNIX EOL. We want to force all EOL to UNIX EOL. autocrlf input will do that. Note setting to true would also be reasonable. --- 00_Getting_Started | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/00_Getting_Started b/00_Getting_Started index 8782bb5374..db172a73a2 100644 --- a/00_Getting_Started +++ b/00_Getting_Started @@ -76,9 +76,10 @@ repository. Some of the features include: which lives at ~/.gitconfig) o To avoid problems with DOS EOL sequences, we always store in the - repository using UNIX EOL sequences. Turn on autocrlf to avoid problems. + repository using UNIX EOL sequences. Set autocrlf to input to + avoid these problems. - $ git config --global core.autocrlf true + $ git config --global core.autocrlf input o It is handy to set up local copies of remote branches automatically. From ab25ced6c893c69e87b18c1e4f721209f9124c1c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 09:22:39 -0700 Subject: [PATCH 128/411] msp430: add pin definitions for Port 7, 8, 9, 10, and 11 Digital I/O from Joao Goncalves. --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 407 ++++++++++++++++++- 1 file changed, 399 insertions(+), 8 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index b0eb07768f..6194bd7dbc 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -33,17 +33,21 @@ */ /** - * HPL for the TI MSP430 family of microprocessors. This provides an - * abstraction for general-purpose I/O. + * Digital pin i/o abstraction, TI MSP430 processors. * * @author Joe Polastre * @author Xavier Orduna * @author Peter A. Bigot * @author Eric B. Decker + * @author João Gonçalves + * + * - Mapped Pins for msp430x543x, msp430x541x. + * The duplicate functionality on different pins is not implemented + * because of the duplicate names. + * - Added ports 7,8,9,10,11 */ -configuration HplMsp430GeneralIOC -{ +configuration HplMsp430GeneralIOC { // provides all the ports as raw ports #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) provides interface HplMsp430GeneralIO as Port10; @@ -111,6 +115,60 @@ configuration HplMsp430GeneralIOC provides interface HplMsp430GeneralIO as Port67; #endif +#if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) + provides interface HplMsp430GeneralIO as Port70; + provides interface HplMsp430GeneralIO as Port71; + provides interface HplMsp430GeneralIO as Port72; + provides interface HplMsp430GeneralIO as Port73; + provides interface HplMsp430GeneralIO as Port74; + provides interface HplMsp430GeneralIO as Port75; + provides interface HplMsp430GeneralIO as Port76; + provides interface HplMsp430GeneralIO as Port77; +#endif + +#if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) + provides interface HplMsp430GeneralIO as Port80; + provides interface HplMsp430GeneralIO as Port81; + provides interface HplMsp430GeneralIO as Port82; + provides interface HplMsp430GeneralIO as Port83; + provides interface HplMsp430GeneralIO as Port84; + provides interface HplMsp430GeneralIO as Port85; + provides interface HplMsp430GeneralIO as Port86; + provides interface HplMsp430GeneralIO as Port87; +#endif + +#if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) + provides interface HplMsp430GeneralIO as Port90; + provides interface HplMsp430GeneralIO as Port91; + provides interface HplMsp430GeneralIO as Port92; + provides interface HplMsp430GeneralIO as Port93; + provides interface HplMsp430GeneralIO as Port94; + provides interface HplMsp430GeneralIO as Port95; + provides interface HplMsp430GeneralIO as Port96; + provides interface HplMsp430GeneralIO as Port97; +#endif + +#if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) + provides interface HplMsp430GeneralIO as Port100; + provides interface HplMsp430GeneralIO as Port101; + provides interface HplMsp430GeneralIO as Port102; + provides interface HplMsp430GeneralIO as Port103; + provides interface HplMsp430GeneralIO as Port104; + provides interface HplMsp430GeneralIO as Port105; + provides interface HplMsp430GeneralIO as Port106; + provides interface HplMsp430GeneralIO as Port107; +#endif +#if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) + provides interface HplMsp430GeneralIO as Port110; + provides interface HplMsp430GeneralIO as Port111; + provides interface HplMsp430GeneralIO as Port112; + provides interface HplMsp430GeneralIO as Port113; + provides interface HplMsp430GeneralIO as Port114; + provides interface HplMsp430GeneralIO as Port115; + provides interface HplMsp430GeneralIO as Port116; + provides interface HplMsp430GeneralIO as Port117; +#endif + // provides special ports explicitly // this section of HplMsp430GeneralIOC supports the F14x series // x1 family: msp430f149 @@ -198,7 +256,6 @@ configuration HplMsp430GeneralIOC provides interface HplMsp430GeneralIO as UCB0SDA; provides interface HplMsp430GeneralIO as UCB0SCL; - provides interface HplMsp430GeneralIO as UCA1CLK; provides interface HplMsp430GeneralIO as UCA1STE; provides interface HplMsp430GeneralIO as UCA1TXD; @@ -229,7 +286,90 @@ configuration HplMsp430GeneralIOC provides interface HplMsp430GeneralIO as SVSOUT; #endif - // x5 family: cc430f5137, msp430f5438{,a} + // x5 family: cc430f5137, msp430x541x, msp430f5438{,a} + +#if defined(__msp430x543x) || defined(__msp430x541x) + +//duplicate ouputs on different pins from the ones mapped are not defined yet + + provides interface HplMsp430GeneralIO as TA0CCR0; + provides interface HplMsp430GeneralIO as TA0CCR1; + provides interface HplMsp430GeneralIO as TA0CCR2; + provides interface HplMsp430GeneralIO as TA0CCR3; + provides interface HplMsp430GeneralIO as TA0CCR4; + provides interface HplMsp430GeneralIO as TA0CLK; + + provides interface HplMsp430GeneralIO as TA1CCR0; + provides interface HplMsp430GeneralIO as TA1CCR1; + provides interface HplMsp430GeneralIO as TA1CCR2; + provides interface HplMsp430GeneralIO as TA1CLK; + + provides interface HplMsp430GeneralIO as TB0CCR0; + provides interface HplMsp430GeneralIO as TB0CCR1; + provides interface HplMsp430GeneralIO as TB0CCR2; + provides interface HplMsp430GeneralIO as TB0CCR3; + provides interface HplMsp430GeneralIO as TB0CCR4; + provides interface HplMsp430GeneralIO as TB0CCR5; + provides interface HplMsp430GeneralIO as TB0CCR6; + provides interface HplMsp430GeneralIO as TB0CLK; + + provides interface HplMsp430GeneralIO as RTCCLK; + provides interface HplMsp430GeneralIO as MCLK; + provides interface HplMsp430GeneralIO as SMCLK; + provides interface HplMsp430GeneralIO as ACLK; + provides interface HplMsp430GeneralIO as ADC12CLK; + provides interface HplMsp430GeneralIO as DMAE0; + + provides interface HplMsp430GeneralIO as UCA0RXD; + provides interface HplMsp430GeneralIO as UCA0SOMI; + provides interface HplMsp430GeneralIO as UCA0TXD; + provides interface HplMsp430GeneralIO as UCA0SIMO; + provides interface HplMsp430GeneralIO as UCA0CLK; + provides interface HplMsp430GeneralIO as UCA0STE; + + provides interface HplMsp430GeneralIO as UCB0STE; + provides interface HplMsp430GeneralIO as UCB0SOMI; + provides interface HplMsp430GeneralIO as UCB0SCL; + provides interface HplMsp430GeneralIO as UCB0SIMO; + provides interface HplMsp430GeneralIO as UCB0SDA; + provides interface HplMsp430GeneralIO as UCB0CLK; + + provides interface HplMsp430GeneralIO as UCA1CLK; + provides interface HplMsp430GeneralIO as UCA1STE; + provides interface HplMsp430GeneralIO as UCA1TXD; + provides interface HplMsp430GeneralIO as UCA1RXD; + provides interface HplMsp430GeneralIO as UCA1SIMO; + provides interface HplMsp430GeneralIO as UCA1SOMI; + + provides interface HplMsp430GeneralIO as UCB1CLK; + provides interface HplMsp430GeneralIO as UCB1STE; + provides interface HplMsp430GeneralIO as UCB1SIMO; + provides interface HplMsp430GeneralIO as UCB1SOMI; + provides interface HplMsp430GeneralIO as UCB1SDA; + provides interface HplMsp430GeneralIO as UCB1SCL; + +// Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 + + provides interface HplMsp430GeneralIO as ADC0; + provides interface HplMsp430GeneralIO as ADC1; + provides interface HplMsp430GeneralIO as ADC2; + provides interface HplMsp430GeneralIO as ADC3; + provides interface HplMsp430GeneralIO as ADC4; + provides interface HplMsp430GeneralIO as ADC5; + provides interface HplMsp430GeneralIO as ADC6; + provides interface HplMsp430GeneralIO as ADC7; + provides interface HplMsp430GeneralIO as ADC8; + provides interface HplMsp430GeneralIO as ADC9; + +// there are no ADC's 10 and 11 according to datasheet + + provides interface HplMsp430GeneralIO as ADC12; + provides interface HplMsp430GeneralIO as ADC13; + provides interface HplMsp430GeneralIO as ADC14; + provides interface HplMsp430GeneralIO as ADC15; + +#endif + #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) provides interface HplMsp430GeneralIO as CBOUT0; provides interface HplMsp430GeneralIO as TA0CLK; @@ -280,8 +420,7 @@ configuration HplMsp430GeneralIOC #endif /* cc430x513x || cc430x612x || cc430x613x */ } -implementation -{ +implementation { components #if defined(__MSP430_HAS_PORT1_R__) new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 0) as P10, @@ -403,6 +542,106 @@ implementation new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 7) as P67, #endif +#if defined(__MSP430_HAS_PORT7_R__) + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 0) as P70, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 1) as P71, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 2) as P72, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 3) as P73, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 4) as P74, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 5) as P75, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 6) as P76, + new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 7) as P77, +#elif defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 0) as P70, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 1) as P71, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 2) as P72, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 3) as P73, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 4) as P74, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 5) as P75, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 6) as P76, + new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 7) as P77, +#endif + +#if defined(__MSP430_HAS_PORT8_R__) + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 0) as P80, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 1) as P81, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 2) as P82, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 3) as P83, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 4) as P84, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 5) as P85, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 6) as P86, + new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 7) as P87, +#elif defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 0) as P80, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 1) as P81, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 2) as P82, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 3) as P83, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 4) as P84, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 5) as P85, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 6) as P86, + new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 7) as P87, +#endif + +#if defined(__MSP430_HAS_PORT9_R__) + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 0) as P90, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 1) as P91, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 2) as P92, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 3) as P93, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 4) as P94, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 5) as P95, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 6) as P96, + new HplMsp430GeneralIORenP(P9IN_, P9OUT_, P9DIR_, P9SEL_, P9REN_, 7) as P97, +#elif defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 0) as P90, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 1) as P91, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 2) as P92, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 3) as P93, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 4) as P94, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 5) as P95, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 6) as P96, + new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 7) as P97, +#endif + +#if defined(__MSP430_HAS_PORT10_R__) + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 0) as P100, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 1) as P101, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 2) as P102, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 3) as P103, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 4) as P104, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 5) as P105, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 6) as P106, + new HplMsp430GeneralIORenP(P10IN_, P10OUT_, P10DIR_, P10SEL_, P10REN_, 7) as P107, +#elif defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 0) as P100, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 1) as P101, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 2) as P102, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 3) as P103, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 4) as P104, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 5) as P105, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 6) as P106, + new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 7) as P107, +#endif + +#if defined(__MSP430_HAS_PORT11_R__) + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 0) as P110, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 1) as P111, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 2) as P112, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 3) as P113, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 4) as P114, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 5) as P115, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 6) as P116, + new HplMsp430GeneralIORenP(P11IN_, P11OUT_, P11DIR_, P11SEL_, P11REN_, 7) as P117, +#elif defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 0) as P110, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 1) as P111, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 2) as P112, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 3) as P113, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 4) as P114, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 5) as P115, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 6) as P116, + new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 7) as P117, +#endif + PlatformC; // dummy to end unknown sequence #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) @@ -471,6 +710,61 @@ implementation Port67 = P67; #endif +#if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) + Port70 = P70; + Port71 = P71; + Port72 = P72; + Port73 = P73; + Port74 = P74; + Port75 = P75; + Port76 = P76; + Port77 = P77; +#endif + +#if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) + Port80 = P80; + Port81 = P81; + Port82 = P82; + Port83 = P83; + Port84 = P84; + Port85 = P85; + Port86 = P86; + Port87 = P87; +#endif + +#if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) + Port90 = P90; + Port91 = P91; + Port92 = P92; + Port93 = P93; + Port94 = P94; + Port95 = P95; + Port96 = P96; + Port97 = P97; +#endif + +#if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) + Port100 = P100; + Port101 = P101; + Port102 = P102; + Port103 = P103; + Port104 = P104; + Port105 = P105; + Port106 = P106; + Port107 = P107; +#endif + +#if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) + Port110 = P110; + Port111 = P111; + Port112 = P112; + Port113 = P113; + Port114 = P114; + Port115 = P115; + Port116 = P116; + Port117 = P117; +#endif + #ifdef __msp430x14x STE0 = P30; SIMO0 = P31; @@ -574,6 +868,103 @@ implementation SVSOUT = P57; #endif + +#if defined(__msp430x543x) || defined(__msp430x541x) + + TA0CCR0 = P11; + TA0CCR1 = P12; + TA0CCR2 = P13; + TA0CCR3 = P14; + TA0CCR4 = P15; + TA0CLK = P10; + + TA1CCR0 = P21; + TA1CCR1 = P22; + TA1CCR2 = P23; + TA1CLK = P20; + + TB0CCR0 = P40; + TB0CCR1 = P41; + TB0CCR2 = P42; + TB0CCR3 = P43; + TB0CCR4 = P44; + TB0CCR5 = P45; + TB0CCR6 = P46; + TB0CLK = P47; + + RTCCLK = P24; + MCLK = P20; + SMCLK = P16; + ACLK = P10; + ADC12CLK = P27; + DMAE0 = P27; + + UCA0TXD = P34; + UCA0RXD = P35; + UCA0SIMO = P34; + UCA0SOMI = P35; + UCA0CLK = P30; + UCA0STE = P33; + + UCB0STE = P30; + UCB0SIMO = P31; + UCB0SOMI = P32; + UCB0SDA = P31; + UCB0SCL = P32; + UCB0CLK = P33; + + UCA1TXD = P56; + UCA1RXD = P57; + UCA1SIMO = P56; + UCA1SOMI = P57; + UCA1CLK = P36; + UCA1STE = P55; + + UCB1STE = P36; + UCB1SIMO = P37; + UCB1SOMI = P54; + UCB1SDA = P37; + UCB1SCL = P54; + UCB1CLK = P55; + + // Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 + + ADC0 = P60; + ADC1 = P61; + ADC2 = P62; + ADC3 = P63; + ADC4 = P64; + ADC5 = P65; + ADC6 = P66; + ADC7 = P67; + ADC8 = P50; + ADC9 = P51; +// there are no ADC's 10 and 11 according to datasheet + ADC12 = P74; + ADC13 = P75; + ADC14 = P76; + ADC15 = P77; + +//Same outputs but on different pins, need to change the names if to be used +// Not complete yet +/* + SMCLK = P47; + ACLK = P110; + MCLK = P111; + SMCLK = P112; + + TA0CCR0 = P80; + TA0CCR1 = P81; + TA0CCR2 = P82; + TA0CCR3 = P83; + TA0CCR4 = P84; + + TA1CCR0 = P85; + TA1CCR1 = P86; + TA1CCR2 = P73; */ + +#endif + #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) /* Terminal functions mapped to port mapping mnemonics, per data * sheet table 3 */ From 1e18e31d68602eb70d5103f67041b8c79f1ae3e6 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 13:32:17 -0700 Subject: [PATCH 129/411] msp430(x5xxx/timer): fix interrupt vectors for x5 T0B7 and T2A3 timers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit brought over from João Gonçalves --- tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc index b3126db44b..e1a4b911ab 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerCommonP.nc @@ -29,8 +29,8 @@ implementation { #endif /* __MSP430_HAS_T0A3__ || __MSP430_HAS_T0A5__ */ #if defined(__MSP430_HAS_T0B7__) - TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer0_B0.fired(); } - TOSH_SIGNAL(TIMER1_A1_VECTOR) { signal VectorTimer0_B1.fired(); } + TOSH_SIGNAL(TIMER0_B0_VECTOR) { signal VectorTimer0_B0.fired(); } + TOSH_SIGNAL(TIMER0_B1_VECTOR) { signal VectorTimer0_B1.fired(); } #endif /* __MSP430_HAS_T0B7__ */ #if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) @@ -39,7 +39,7 @@ implementation { #endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ #if defined(__MSP430_HAS_T2A3__) - TOSH_SIGNAL(TIMER1_A0_VECTOR) { signal VectorTimer2_A0.fired(); } - TOSH_SIGNAL(TIMER1_A1_VECTOR) { signal VectorTimer2_A1.fired(); } + TOSH_SIGNAL(TIMER2_A0_VECTOR) { signal VectorTimer2_A0.fired(); } + TOSH_SIGNAL(TIMER2_A1_VECTOR) { signal VectorTimer2_A1.fired(); } #endif /* __MSP430_HAS_T2A3__ */ } From 9d34ae26994dfb4417fcb8be97f39bfd9bdb8266 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 13:35:58 -0700 Subject: [PATCH 130/411] fix copyright for Joao --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 1 + 1 file changed, 1 insertion(+) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 6194bd7dbc..5baf4917db 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2000-2003 The Regents of the University of California. From 26206271ef2a443ad07852f5304617cdbde04a57 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 28 Jun 2011 17:03:49 -0700 Subject: [PATCH 131/411] msp430(x5/spi): add SpiPacket.send from Joao Goncalves --- .../msp430/x5xxx/usci/Msp430UsciSpiB0C.nc | 11 +++++++ tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc | 29 +++++++++++++++++-- 2 files changed, 38 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc index 9560ea0200..345883ebc9 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -38,8 +39,12 @@ /** * Generic configuration for a client that shares USCI_B0 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ + generic configuration Msp430UsciSpiB0C() { provides { interface Resource; @@ -62,4 +67,10 @@ generic configuration Msp430UsciSpiB0C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCB0SIMO; + SpiC.SOMI -> GIO.UCB0SOMI; + SpiC.CLK -> GIO.UCB0CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc index 3adac1a662..8402d42bda 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -39,6 +40,7 @@ * instance. * * @author Peter A. Bigot + * @author João Gonçalves */ generic module Msp430UsciSpiP () @safe() { @@ -163,8 +165,31 @@ generic module Msp430UsciSpiP () @safe() { } async command error_t SpiPacket.send[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { - /* Not supported yet */ - return FAIL; + + uint16_t bytesLeft = len; + + while (bytesLeft) { + while (! (UCTXIFG & call Usci.getIfg())) { + ; /* busywait */ + } + call Usci.setTxbuf(txBuf[len-bytesLeft]); + + while (! (UCRXIFG & call Usci.getIfg())) { + ; /* busywait */ + } + + rxBuf[len-bytesLeft] = call Usci.getRxbuf(); + bytesLeft=bytesLeft-1; + } + + /* + * WARNING: interrupts are disabled for this signal handler (event). This + * in general is a bad idea. We are doing it here because this is wired + * into the CC2420 stack which yields lots of non-atomic accesses. A redesign + * of some flavor would be needed to fix this unless we put an atomic here. + */ + atomic signal SpiPacket.sendDone[client](txBuf, rxBuf, len, SUCCESS); + return SUCCESS; } default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error ) { } From 0c907d4002e3bc6c3782f2c2660720a423a26201 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 29 Jun 2011 00:15:40 -0700 Subject: [PATCH 132/411] update telosa/PlatformHdlcUart to use new dma driver --- tos/platforms/telosa/PlatformHdlcUartC.nc | 2 +- tos/platforms/telosa/PlatformHdlcUartP.nc | 33 +++++++++++++++++++---- 2 files changed, 29 insertions(+), 6 deletions(-) diff --git a/tos/platforms/telosa/PlatformHdlcUartC.nc b/tos/platforms/telosa/PlatformHdlcUartC.nc index 8f3f8159ab..2d4d75fa74 100644 --- a/tos/platforms/telosa/PlatformHdlcUartC.nc +++ b/tos/platforms/telosa/PlatformHdlcUartC.nc @@ -37,7 +37,6 @@ configuration PlatformHdlcUartC { interface HdlcUart; } } implementation { -#warning Enabling DMA on UART1RX components NoLedsC as Leds; components PlatformHdlcUartP as HdlcUartC; @@ -54,6 +53,7 @@ configuration PlatformHdlcUartC { HdlcUartC.Msp430UartConfigure -> TelosSerialP; +#warning Enabling DMA on UART1RX (Channel 2) components Msp430DmaC as DmaC; HdlcUartC.DmaChannel -> DmaC.Channel2; diff --git a/tos/platforms/telosa/PlatformHdlcUartP.nc b/tos/platforms/telosa/PlatformHdlcUartP.nc index 8652bb7758..08bb1f265d 100644 --- a/tos/platforms/telosa/PlatformHdlcUartP.nc +++ b/tos/platforms/telosa/PlatformHdlcUartP.nc @@ -28,6 +28,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE * */ + /* * Improved DMA UART implementation for MSP-base platforms to fix some * of the timing issues. Based on my earlier implementation, but @@ -105,7 +106,7 @@ module PlatformHdlcUartP { } async command void ResourceConfigure.configure() { - msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig(); + const msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig(); call Leds.led0On(); m_byte_time = (config->uartConfig.ubr / 4); // SDH : assume 4MHZ... call Usart.setModeUart(config); @@ -114,7 +115,7 @@ module PlatformHdlcUartP { async command void ResourceConfigure.unconfigure() { call RxAbort.stop(); - call DmaChannel.stopTransfer(); + call DmaChannel.stopDma(); call Usart.resetUsart(TRUE); call Usart.disableIntr(); @@ -149,9 +150,12 @@ module PlatformHdlcUartP { m_rx_buf = __rx_buf; /* SDH : important : the dma transfer won't occur if the - interrupt is enabled */ - call Usart.clrRxIntr(); + * interrupt is enabled + */ call Usart.disableRxIntr(); + call Usart.clrRxIntr(); +#ifdef notdef + /* old dma driver */ call DmaChannel.setupTransfer(DMA_REPEATED_SINGLE_TRANSFER, DMA_TRIGGER_URXIFG1, DMA_EDGE_SENSITIVE, @@ -163,6 +167,25 @@ module PlatformHdlcUartP { DMA_ADDRESS_UNCHANGED, DMA_ADDRESS_INCREMENTED); call DmaChannel.startTransfer(); + /* + * old driver's startTransfer left DMA_EN, and startTransfer turns on DMA_EN but + * doesn't actually start the transfer. First edge of U1RXBUF does that + */ +#endif + /* new dma driver */ + call DmaChannel.setupTransfer( + DMA_DT_RPT | DMA_DT_SINGLE | // interleaved, repeated single, edge + DMA_SB_DB | // SRC byte, DST byte + DMA_SRC_NO_CHNG | // SRC address, no change + DMA_DST_INC | // DST address, increment + DMAIE, + DMA_TRIGGER_URXIFG1, + (uint16_t) U1RXBUF_, + (uint16_t) m_rx_buf, + sizeof(__rx_buf)); + /* new driver's setupTransfer sets DMA_EN, transfer actually starts on the + * rising edge of U1RXBUF + */ /* start the timeout */ /* this will be fired when the buffer is about a third full so we @@ -191,7 +214,7 @@ module PlatformHdlcUartP { m_byte_time * BUFFER_TIMEOUT_BYTES); } - async event void DmaChannel.transferDone(error_t success) { } + async event void DmaChannel.transferDone() { } /* * Send side. no dma here, just send it out. From 2250fbfaa2df3e313e16513b1874aa2171eed888 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 29 Jun 2011 00:17:01 -0700 Subject: [PATCH 133/411] temp workaround for errors on ieee154_simple_header and fcf structs When compiling blip the nx_struct ieee154_simple_header_t blows up. Comment on the bail and revert to the old code. Nice try. --- tos/types/Ieee154.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/tos/types/Ieee154.h b/tos/types/Ieee154.h index 8b0e28db93..fa1e518a70 100644 --- a/tos/types/Ieee154.h +++ b/tos/types/Ieee154.h @@ -59,6 +59,21 @@ typedef struct { #define i_saddr ieee_addr.saddr #define i_laddr ieee_addr.laddr +#ifdef notdef +/* + * The intent was to consolidate all ieee154 packet definitions + * in this file. However a couple of things got in the way. + * + * 1) when compiling with blip, for some reason the compile blows + * up on the nx_struct ieee154_simple_header_t definition below. + * Did look at the resultant C code generated and wasn't able to + * figure it out. + * + * 2) Miklos is starting a new addressing mechanism for both 16 and + * 64 bit ieee154 addresses using accessors and packer routines. + * That renders this whole thing moot so why bother changing code + * to consolidate. + */ typedef nx_struct ieee154_simple_header_t { nxle_uint16_t fcf; nxle_uint8_t dsn; @@ -78,6 +93,7 @@ typedef nx_struct ieee154_fcf_t { nxle_uint16_t frame_version: 2; nxle_uint16_t src_addr_mode: 2; } ieee154_fcf_t; +#endif enum { IEEE154_BROADCAST_ADDR = 0xffff, From a525db0d79f9acaa065629d571e90b7a2b383865 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 29 Jun 2011 21:33:17 -0700 Subject: [PATCH 134/411] msp430: telos platforms were overriding optimization, use default. According to rumor there was a bug in the 3.2.3 or some other toolchain in use at the time that required -O after the -Os to override it. However, some applications (say PppRouter) need space optimization inorder to fit, so specifing -Os -O is wrong. This fix deletes the override and just uses the default of -Os. --- support/make/msp/debug.extra | 9 ++++++++- support/make/null/debug.extra | 9 ++++++++- support/make/telosa.target | 5 ++++- support/make/telosb.target | 5 ++++- 4 files changed, 24 insertions(+), 4 deletions(-) diff --git a/support/make/msp/debug.extra b/support/make/msp/debug.extra index 360ba0dc12..4c9598ec3d 100644 --- a/support/make/msp/debug.extra +++ b/support/make/msp/debug.extra @@ -1,4 +1,11 @@ #-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ -OPTFLAGS = -O1 -g -fnesc-no-inline +# Modern GDB debuggers can handle optimized code pretty well so +# we no longer specify -O1 to turn optimization off to simplify +# debugging. Rather use the default optimization level which is -Os +# for size. +# +# OPTFLAGS = -O1 -g -fnesc-no-inline + +OPTFLAGS += -g -fnesc-no-inline diff --git a/support/make/null/debug.extra b/support/make/null/debug.extra index 38c21268f1..92a784d674 100644 --- a/support/make/null/debug.extra +++ b/support/make/null/debug.extra @@ -1,4 +1,11 @@ #-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ -OPTFLAGS += -O1 -g -fnesc-no-inline +# Modern GDB debuggers can handle optimized code pretty well so +# we no longer specify -O1 to turn optimization off to simplify +# debugging. Rather use the default optimization level which is -Os +# for size. +# +# OPTFLAGS += -O1 -g -fnesc-no-inline + +OPTFLAGS += -g -fnesc-no-inline diff --git a/support/make/telosa.target b/support/make/telosa.target index eac0e51528..2ef9dd2240 100644 --- a/support/make/telosa.target +++ b/support/make/telosa.target @@ -7,7 +7,10 @@ MSP_MCU = msp430x149 # Disable MSP430 hardware multiply because it makes MSPGCC die PFLAGS += -mdisable-hwmul -OPTFLAGS += -O + +# The default msp OPTFLAGS should be -Os, that's what we want +# if -O is added here it will override the -Os, we really want -Os +# OPTFLAGS += -O MSP_BSL ?= tos-bsl diff --git a/support/make/telosb.target b/support/make/telosb.target index a4c6d0568c..d26d84bef7 100644 --- a/support/make/telosb.target +++ b/support/make/telosb.target @@ -7,7 +7,10 @@ PLATFORM ?= telosb # Disable MSP430 hardware multiply because it makes MSPGCC die PFLAGS += -mdisable-hwmul -OPTFLAGS += -O + +# The default msp OPTFLAGS should be -Os, that's what we want +# if -O is added here it will override the -Os, we really want -Os +# OPTFLAGS += -O MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --telosb From ff88524134b0058243cf7073bfb25a6bac3a26c4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 30 Jun 2011 22:07:06 -0700 Subject: [PATCH 135/411] clean up of ieee154_header_t caused more problems then it was worth. Revert. An attempt was made to pull all the salient bits of the ieee 802.15.4 packet headers into tos/types/Ieee154.h but it failed. The bigest problem was a strange compiler problem that caused typedef nx_struct ieee154_simple_header_t to barf. Unclear why. Also Miklos is doing a major piece of work to allow support for 16 and 64 bit address via accessors and packers. This will change all of this anyway so it isn't worth sorting out. --- tos/chips/msp430/rf1a/Rf1aPacket.h | 1 + .../msp430/rf1a/ieee154/Ieee154PacketLayer.h | 54 +++++++++++++++++++ tos/lib/rfxlink/layers/Ieee154PacketLayer.h | 10 +--- 3 files changed, 56 insertions(+), 9 deletions(-) create mode 100644 tos/chips/msp430/rf1a/ieee154/Ieee154PacketLayer.h diff --git a/tos/chips/msp430/rf1a/Rf1aPacket.h b/tos/chips/msp430/rf1a/Rf1aPacket.h index 13b62af8b6..7d16768203 100644 --- a/tos/chips/msp430/rf1a/Rf1aPacket.h +++ b/tos/chips/msp430/rf1a/Rf1aPacket.h @@ -54,6 +54,7 @@ #define _Rf1aPacket_H_ #include "Ieee154.h" +#include "Ieee154PacketLayer.h" enum { /** NALP code for ActiveMessage type field */ diff --git a/tos/chips/msp430/rf1a/ieee154/Ieee154PacketLayer.h b/tos/chips/msp430/rf1a/ieee154/Ieee154PacketLayer.h new file mode 100644 index 0000000000..86ce7fd07d --- /dev/null +++ b/tos/chips/msp430/rf1a/ieee154/Ieee154PacketLayer.h @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Miklos Maroti + */ + +#ifndef __IEEE154PACKETLAYER_H__ +#define __IEEE154PACKETLAYER_H__ + +#include + +/* + * 154 packet format structs should all move to Ieee154.h + */ + +typedef nx_struct ieee154_header_t +{ + nxle_uint16_t fcf; + nxle_uint8_t dsn; + nxle_uint16_t destpan; + nxle_uint16_t dest; + nxle_uint16_t src; +} ieee154_simple_header_t; + +typedef nx_struct ieee154_fcf_t { + nxle_uint16_t frame_type: 3; + nxle_uint16_t security_enabled: 1; + nxle_uint16_t frame_pending: 1; + nxle_uint16_t ack_request: 1; + nxle_uint16_t pan_id_compression: 1; + nxle_uint16_t _reserved: 3; + nxle_uint16_t dest_addr_mode: 2; + nxle_uint16_t frame_version: 2; + nxle_uint16_t src_addr_mode: 2; +} ieee154_fcf_t; + +#endif//__IEEE154PACKETLAYER_H__ diff --git a/tos/lib/rfxlink/layers/Ieee154PacketLayer.h b/tos/lib/rfxlink/layers/Ieee154PacketLayer.h index df011e1dfd..21d1ac54f9 100644 --- a/tos/lib/rfxlink/layers/Ieee154PacketLayer.h +++ b/tos/lib/rfxlink/layers/Ieee154PacketLayer.h @@ -35,13 +35,7 @@ #ifndef __IEEE154PACKETLAYER_H__ #define __IEEE154PACKETLAYER_H__ -#warn "Ieee154PacketLayer.h is deprecated. Replaced by Ieee154.h" - -#include - -#ifdef notdef - -// Contents moved to tos/types/Ieee154.h +#include "Ieee154.h" typedef nx_struct ieee154_simple_header_t { @@ -52,6 +46,4 @@ typedef nx_struct ieee154_simple_header_t nxle_uint16_t src; } ieee154_simple_header_t; -#endif // notdef - #endif//__IEEE154PACKETLAYER_H__ From 84a0bb20284fad8faa84824d4b5826309eee3598 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Mon, 4 Jul 2011 13:13:22 -0700 Subject: [PATCH 136/411] Bring in x5 I2C implementation, USCI --- .../msp430/x5xxx/usci/I2CMaster/I2CAppC.nc | 54 +++ .../tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc | 143 +++++++ .../msp430/x5xxx/usci/I2CMaster/Makefile | 2 + apps/tests/msp430/x5xxx/usci/I2CMaster/README | 15 + tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc | 29 ++ tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc | 28 ++ .../msp430/x5xxx/usci/Msp430UsciI2CB0C.nc | 66 ++++ .../msp430/x5xxx/usci/Msp430UsciI2CB0P.nc | 69 ++++ tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc | 357 ++++++++++++++++++ tos/chips/msp430/x5xxx/usci/README.txt | 19 +- tos/chips/msp430/x5xxx/usci/msp430usci.h | 11 + 11 files changed, 790 insertions(+), 3 deletions(-) create mode 100644 apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc create mode 100644 apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc create mode 100644 apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile create mode 100644 apps/tests/msp430/x5xxx/usci/I2CMaster/README create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc b/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc new file mode 100644 index 0000000000..41dad5e139 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +configuration I2CAppC { +} +implementation { + components MainC; + components I2CP; + + I2CP.Boot -> MainC; + + components PlatformSerialC; + components PlatformI2CC; + + I2CP.I2CPacket -> PlatformI2CC; + I2CP.UartStream -> PlatformSerialC; + I2CP.StdControl -> PlatformI2CC; + I2CP.StdControl -> PlatformSerialC; + + components SerialPrintfC; +} diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc b/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc new file mode 100644 index 0000000000..ab0435fa86 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc @@ -0,0 +1,143 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +#include +#include + +module I2CP { + uses { + interface Boot; + interface UartStream; + interface StdControl; + interface I2CPacket; + } +} +implementation { + uint8_t EE_senddata[15], EE_recdata[15]; + char CmdBuffer[50]; + int Ptr=0; + int HaveCmd=0; + + event void Boot.booted () { + int Cmd=0; + + call StdControl.start(); + + EE_senddata[0]=0x00; //high byte address + EE_senddata[1]=0x40; //low byte address + EE_senddata[2]=0x41; //A + EE_senddata[3]=0x42; //B + EE_senddata[4]=0x43; //C + EE_senddata[5]=0x44; //D + EE_senddata[6]=0x45; //E + EE_senddata[7]=0x46; //F + EE_senddata[8]=0x47; //G + + + while (1) { + atomic Cmd = HaveCmd; + if (Cmd == 1) { + if (strcmp(CmdBuffer,"hi") == 0) + call UartStream.send((uint8_t *)"\n\rhello back\n\r>",15); //CLI Test + if(strcmp(CmdBuffer,"testsend") == 0) + call I2CPacket.write(I2C_START | I2C_STOP, 0x0050, 9, EE_senddata); //Write ABCDEFG to eeprom addr 0x0050 + if(strcmp(CmdBuffer,"testset") == 0) + call I2CPacket.write(I2C_START | I2C_STOP, 0x0050, 2, EE_senddata); //set the eeprom internal addr to 0x0050 + if(strcmp(CmdBuffer,"testrec") == 0) { + call I2CPacket.write(I2C_START, 0x0050, 2, EE_senddata); //set the eeprom internal addr to 0x0050 + call I2CPacket.read(I2C_START | I2C_STOP, 0x0050,7, EE_recdata); //read 7 bytes from current eeprom addr + } + atomic { + HaveCmd=0; + Ptr=0; + } + } + } + } + + async event void UartStream.receiveDone (uint8_t* buf, uint16_t len, error_t error) { } + async event void UartStream.sendDone (uint8_t* buf, uint16_t len, error_t error) { } + + async event void UartStream.receivedByte (uint8_t byte) { + switch (byte) { + case 8: /*do we have a backspace*/ + case 127: /*do we have a delete*/ + if(Ptr != 0) { /*if its not the first char*/ + Ptr--; /*move the command pointer back one*/ + call UartStream.send((uint8_t *)"\b \b",3); /*Erase the char*/ + } + break; + case 10: /*do we have a cr*/ + case 13: /*do we have a lf*/ + if(Ptr == 0) + call UartStream.send((uint8_t *)"\n\r>",3); + else { + CmdBuffer[Ptr++] = '\0'; /*command entered so terminate the command string*/ + HaveCmd=1; /*Let the main loop know we have a command to process*/ + } + break; + default: /*everything else*/ + if(Ptr == 49) { /*is our command string getting to big for buffer 49?*/ + call UartStream.send((uint8_t*)7,1); /*yes send a bell*/ + Ptr--; /*move the command pointer back one*/ + call UartStream.send((uint8_t*)"\b \b",3); /*Erase the char*/ + } else { + CmdBuffer[Ptr++] = byte; /*add the char to the command buffer and add one to the command pointer*/ + call UartStream.send(&byte,1); /*echo it back*/ + } + } + } + + async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data) { + if(error == FAIL) + call UartStream.send((uint8_t *)"\n\rFAILED ",9); + if(error == SUCCESS) + call UartStream.send((uint8_t *)"\n\rSUCCESS ",10); + call UartStream.send((uint8_t *)"Write I2C\n\r>",13); + } + + async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data) { + if(error == FAIL) + call UartStream.send((uint8_t *)"\n\rFAILED ",9); + if(error == SUCCESS) { + call UartStream.send((uint8_t *)"\n\rSUCCESS ",10); + if (addr == 0x0050) /*Data from EEProm*/ + call UartStream.send(data, 7); + call UartStream.send((uint8_t*)"\n\r>",3); + } + call UartStream.send((uint8_t *)"Read I2C\n\r>",12); + } +} diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile b/apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile new file mode 100644 index 0000000000..6b5bea270c --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile @@ -0,0 +1,2 @@ +COMPONENT=I2CAppC +include $(MAKERULES) diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/README b/apps/tests/msp430/x5xxx/usci/I2CMaster/README new file mode 100644 index 0000000000..afbf9fa694 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/I2CMaster/README @@ -0,0 +1,15 @@ +Derek Baker (derek@red-slate.co.uk) + +I2C test app for use with cc430f5137, this app give a very simple CLI on the serial port and allows you to test the I2C bus, +The test circuit includes a microchip 24lv1025 I2C eeprom, pull up resistors are 4.7k on both SCL & SDA. +The 24lc1025 has pins 1&2 held low and pin 3 high. + +serial setup is default , 115K 8,n,1 +I2C is 7 bit master running at ~100khz + +from the command line commands are + +1. 'hi' the CLI simply returns the text 'hello back' +2. 'testsend' writes 'ABCDEFG' to the eeprom at address 0x0050 +3. 'testset' set the eeprom address to 0x0050 +4. 'testrec' read 7 bytes 'ABCDEFG' from the current address (if you comment out the line in testrec the address is set before read) diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc index c6e3fa4f1e..c9050302ac 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc @@ -1,4 +1,5 @@ /** + * Copyright (c) 2011 Redslate Ltd. * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -51,6 +52,8 @@ * set without simultaneously setting the other. * * @author Peter A. Bigot + * @author Derek Baker + * I2C support */ #include "msp430usci.h" @@ -261,6 +264,32 @@ interface HplMsp430Usci { */ async command uint8_t getIv(); + + async command uint8_t getCtl1(); + async command void setCtl1(uint8_t v); + + /* set direction of the i2c bus */ + async command void setTransmitMode(); + async command void setReceiveMode(); + + /* get stop bit in i2c mode */ + async command bool getStopBit(); + async command bool getStartBit(); + async command bool getNackBit(); + async command bool getTransmitReceiveMode(); + + /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ + async command void setTXNACK(); + async command void setTXStop(); + async command void setTXStart(); + + async command bool isTxIntrPending(); + async command bool isRxIntrPending(); + async command bool isNackIntrPending(); + async command void clrTxIntr(); + async command void clrRxIntr(); + async command void clrNackIntr(); + /* ---------------------------------------- * Higher-level operations consistent across all modes. */ diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc index 00ba4ed8e9..495a730d43 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Redslate Ltd. * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -45,6 +46,8 @@ * module. * * @author Peter A. Bigot + * @author Derek Baker + * I2C support */ generic module HplMsp430UsciP( @@ -89,6 +92,8 @@ implementation { async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } async command void Usci.setCtlw0(uint16_t v) { UCmxCTLW0 = v; } + async command uint8_t Usci.getCtl1() { return UCmxCTL1; } + async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } async command uint16_t Usci.getBrw() { return UCmxBRW; } async command void Usci.setBrw(uint16_t v) { UCmxBRW = v; } async command uint8_t Usci.getMctl() { return UCmxMCTL; } @@ -161,6 +166,29 @@ implementation { } } + /* set direction of the bus */ + async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } + async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } + + /* get stop bit in i2c mode */ + async command bool Usci.getStopBit() { return (UCmxCTL1 & UCTXSTP); } + async command bool Usci.getStartBit() { return (UCmxCTL1 & UCTXSTT); } + async command bool Usci.getNackBit() { return (UCmxCTL1 & UCTXNACK); } + async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } + + /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ + async command void Usci.setTXNACK() { UCmxCTL1 |= UCTXNACK; } + async command void Usci.setTXStop() { UCmxCTL1 |= UCTXSTP; } + async command void Usci.setTXStart() { UCmxCTL1 |= UCTXSTT; } + + async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } + async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } + async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } + + async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } + async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } + async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } + /* * Upon receipt of an interrupt, if the USCI is active then demux * the interrupt to the handler for the appropriate USCI mode. diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc new file mode 100644 index 0000000000..c0a5bb00e4 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc @@ -0,0 +1,66 @@ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B0 in I2C mode. + * + * @author Derek Baker (derek@red-slate.com) + * copied from SPI, tweaked for I2C. + */ + +generic configuration Msp430UsciI2CB0C() { + provides { + interface Resource; + interface I2CPacket; + interface Msp430UsciError; + } +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), + }; + + components Msp430UsciB0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciI2CB0P as I2CC; + I2CPacket = I2CC.I2CPacket[CLIENT_ID]; + Msp430UsciError = I2CC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc new file mode 100644 index 0000000000..9bb2412e8e --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc @@ -0,0 +1,69 @@ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Derek Baker + * tweak SPI into I2C. + */ + +configuration Msp430UsciI2CB0P { + provides { + interface I2CPacket[ uint8_t client ]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + } +} implementation { + + components Msp430UsciB0P as UsciC; + + components new Msp430UsciI2CP() as I2CC; + I2CC.Usci -> UsciC; + I2CC.Interrupts -> UsciC.Interrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC; + Msp430UsciError = I2CC; + SDA = I2CC.SDA; + SCL = I2CC.SCL; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc new file mode 100644 index 0000000000..6dae4fbf53 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc @@ -0,0 +1,357 @@ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" +#include + +/** + * Implement the I2C-related interfaces for a MSP430 USCI module + * instance. + * + * @author Peter A. Bigot + * @author Derek Baker + * I2C support. + */ + +generic module Msp430UsciI2CP () @safe() { + provides { + interface I2CPacket[uint8_t client]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + + interface Msp430UsciConfigure[ uint8_t client ]; + + interface ArbiterInfo; + interface Leds; + } +} +implementation { + + enum { + TIMEOUT = 1000, + }; + + /** + * The I2C is busy if it's actively transmitting/receiving, or if + * there is an active buffered I/O operation. + */ + bool isBusy () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + return 0; + } + + /** + * The given client is the owner if the USCI is in I2C mode and + * the client is the user stored in the I2C arbiter. + */ + error_t checkIsOwner (uint8_t client) { + /* Ensure the USCI is in I2C mode and we're the owning client */ + if (! (call ArbiterInfo.inUse())) { + return EOFF; + } + if ((call ArbiterInfo.userId() != client)) { + return EBUSY; + } + return SUCCESS; + } + + /** + * Take the USCI out of I2C mode. + * + * Assumes the USCI is currently in I2C mode. This will busy-wait + * until any characters being actively transmitted or received are + * out of their shift register. It disables the interrupts, puts + * the USCI into software resent, and returns the I2C-related pins + * to their IO rather than module role. + * + * The USCI is left in software reset mode to avoid power drain per + * CC430 errata UCS6. + */ + void unconfigure_ () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + + call Usci.setIe(call Usci.getIe() & ~ (UCNACKIE | UCALIE | UCSTPIE | UCSTTIE | UCTXIE | UCRXIE)); + call Usci.enterResetMode_(); + call SDA.makeOutput(); + call SDA.selectIOFunc(); + call SCL.makeOutput(); + call SCL.selectIOFunc(); + } + + /** + * Configure the USCI for I2C mode. + * + * Invoke the USCI configuration to set up the serial speed, but + * leaves USCI in reset mode on completion. This function then + * follows up by setting the I2C-related pins to their module role + * prior to taking the USCI out of reset mode. All interrupts are + * left off. + */ + error_t configure_ (const msp430_usci_config_t* config) { + if ( !config ) { + return FAIL; + } + + /* Do basic configuration, leaving USCI in reset mode. Configure + * the I2C pins, enable the USCI, and turn off the interrupts. + */ + call Usci.configure(config, TRUE); + call SDA.selectModuleFunc(); + call SCL.selectModuleFunc(); + + call Usci.leaveResetMode_(); + call Usci.setIe(call Usci.getIe() & ~ (UCNACKIE | UCALIE | UCSTPIE | UCSTTIE | UCTXIE | UCRXIE)); + return SUCCESS; + } + + /** + * Perform an I2C read operation + * + * @param flags Flags that may be logical ORed and defined by: + * I2C_START - The START condition is transmitted at the beginning + * of the packet if set. + * I2C_STOP - The STOP condition is transmitted at the end of the + * packet if set. + * I2C_ACK_END - ACK the last byte if set. Otherwise NACK last byte. This + * flag cannot be used with the I2C_STOP flag. + * @param addr The slave device address. Only used if I2C_START is set. + * @param length Length, in bytes, to be read + * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read into + * + * @return SUCCESS if bus available and request accepted. + */ + async command error_t I2CPacket.read[uint8_t client] (i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { + uint16_t i = 0; + uint8_t m_rx_len = length; + uint8_t * m_rx_buf = data; + uint16_t m_rx_addr = addr; + + if((flags & I2C_STOP) && (flags & I2C_ACK_END)) { /*can only set one or the other*/ + m_rx_len = 0; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + + if(flags & I2C_START) { + call Usci.setReceiveMode(); /*put the uart into receive mode*/ + call Usci.setI2csa(addr); /*Set the Slave Address*/ + i=0; + while (call Usci.getStopBit()) { + if (i >= TIMEOUT) { + m_rx_len = 0; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + i++; + } + call Usci.setTXStart(); /*Set the uart to generate a repeat/start condition in receive mode*/ + i=0; + while (call Usci.getStartBit()) { /*we must test for the start bit, if we issue a stop before this we get an error*/ + if (i >= TIMEOUT) { + m_rx_len = 0; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + i++; + } + } else + call Usci.setReceiveMode(); /*make sure the uart is in receive mode*/ + + while (length > 0) { + if((flags & I2C_STOP) && length == 1) { /*if we are receiving last byte and we want to end send NACK->STOP*/ + call Usci.setTXStop(); /*Set the uart to generate a NACK->STOP*/ + i=0; + while (call Usci.getStopBit()) { + if (i >= TIMEOUT) { + m_rx_len -= length; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + i++; + } + } + i=0; + while (call Usci.isRxIntrPending()==0) { /*wait for RX of byte*/ + if (i >= TIMEOUT) { + m_rx_len -= length; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + i++; + } + *data++= call Usci.getRxbuf(); /*store in buffer*/ + length--; + } + + if(flags & I2C_ACK_END) { /*dont end the receive, we want to receive more*/ + m_rx_len -= length; + signal I2CPacket.readDone[client](SUCCESS,m_rx_addr,m_rx_len,m_rx_buf); + return SUCCESS; + } + + m_rx_len -= length; + signal I2CPacket.readDone[client](SUCCESS,m_rx_addr,m_rx_len,m_rx_buf); + return SUCCESS; /*if I2C_STOP or I2C_ACK_END not set assume more to receive*/ + } + + /** + * Perform an I2C write operation + * + * @param flags Flags that may be logical ORed and defined by: + * I2C_START - The START condition is transmitted at the beginning + * of the packet if set. + * I2C_STOP - The STOP condition is transmitted at the end of the + * packet if set. + * @param addr The slave device address. Only used if I2C_START is set. + * @param length Length, in bytes, to be read + * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read from + * + * @return SUCCESS if bus available and request accepted. + */ + async command error_t I2CPacket.write[uint8_t client] (i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { + uint16_t i = 0; + uint8_t m_tx_len = length; + uint8_t * m_tx_buf = data; + uint16_t m_tx_addr = addr; + + while ((call Usci.getStat() & UCBBUSY)) { + if (i >= TIMEOUT) { + m_tx_len = 0; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + + if(flags & I2C_START) { + call Usci.setTransmitMode(); /*set transmit mode on i2c*/ + call Usci.setI2csa(addr); /*Set the Slave Address*/ + i=0; + while (call Usci.getStopBit()) { + if (i >= TIMEOUT) { + m_tx_len = 0; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + i=0; + while((call Usci.getStat() & UCBBUSY)) { + if (i >= TIMEOUT) { + m_tx_len = 0; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + call Usci.setTXStart(); /*Set the uart to generate a repeat/start condition in transmit mode*/ + } else + call Usci.setTransmitMode(); /*Make sure the uart is in transmit mode*/ + + while (length > 0) { + call Usci.setTxbuf(*data++); /*load byte to send*/ + i=0; + while (call Usci.isTxIntrPending()==0) { /*wait for the Byte to be transmitted*/ + if (i >= TIMEOUT) { + m_tx_len -= length; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + if ((call Usci.getStat()) == (UCBBUSY | UCNACKIFG | UCSCLLOW)) { + m_tx_len -= length; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + length--; + } + + if(flags & I2C_STOP) { + call Usci.setTXStop(); /*Set the uart to generate a STOP*/ + i=0; + while (call Usci.getStopBit()) { + if(i >= TIMEOUT) { + m_tx_len -= length; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + } + + m_tx_len -= length; + signal I2CPacket.writeDone[client](SUCCESS,m_tx_addr,m_tx_len,m_tx_buf); + return SUCCESS; + } + + default async event void I2CPacket.readDone[uint8_t client] (error_t error, uint16_t addr, uint8_t length, uint8_t* data) { } + + default async event void I2CPacket.writeDone[uint8_t client] (error_t error, uint16_t addr, uint8_t length, uint8_t* data) { } + + async event void Interrupts.interrupted (uint8_t iv) { + if ( !call ArbiterInfo.inUse()) { + return; + } + return; + } + + default async command const msp430_usci_config_t* + Msp430UsciConfigure.getConfiguration[uint8_t client]() { + return &msp430_usci_i2c_default_config; + } + + async command void ResourceConfigure.configure[uint8_t client]() { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[uint8_t client]() { + unconfigure_(); + } + + default async event void Msp430UsciError.condition(unsigned int errors) { } +} diff --git a/tos/chips/msp430/x5xxx/usci/README.txt b/tos/chips/msp430/x5xxx/usci/README.txt index 0daa9caecc..d954cc530e 100644 --- a/tos/chips/msp430/x5xxx/usci/README.txt +++ b/tos/chips/msp430/x5xxx/usci/README.txt @@ -113,7 +113,20 @@ configurations should wire the appropriate chip pins to Msp430UsciSpiB0P. I2C Mode Support ---------------- -Due to lack of I2C support on a platform based on an MSP430XV2 chip, I2C -support has not yet been implemented. Adding support for this should be a -straightforward extension from that for the other USCI modes. +I2C support added by Derek Baker (derek@red-slate.com) +Added support for I2C master 7 bit addressing ~100khz/~400khz NONE interrupt driven, +tested on cc430F5137 with microchip 24lc1025 and Melexis MLX90614 thermometer. +I2CPacket.read, I2CPacket.write, I2CPacketreadDone, I2CPacketwriteDone +Bits taken from both PeoplePower and Z1 authors with thanks also to Eric Decker. + +Note / Gotcha + +When setting the address of the slave device remember you only need the 7 bits, most +devices datasheets show the address in a 8bit format, e.g 24lc1025 address is 0xA0, +this turns into 0x50, the 7 msb's right shifted one, the read/right bit is added by +the UART when you select the read/write function of the UART in I2C mode. + +When writing to a device multiple time, check the data sheet for write times, you +need to give the device time to commit before you write again else the I2CPacket.write +will FAIL. diff --git a/tos/chips/msp430/x5xxx/usci/msp430usci.h b/tos/chips/msp430/x5xxx/usci/msp430usci.h index bac2ee5f03..709bd29662 100644 --- a/tos/chips/msp430/x5xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci/msp430usci.h @@ -91,4 +91,15 @@ enum { MSP430_USCI_ERR_UCxySTAT = MSP430_USCI_ERR_Framing | MSP430_USCI_ERR_Overrun | MSP430_USCI_ERR_Parity, }; +/* + * I2C default config, added by Derek Baker (derek@red-slate.com) + */ + +msp430_usci_config_t msp430_usci_i2c_default_config = { + /* 7 bit addressing single I2C master driven by SMCLK */ + ctlw0 : ((UCMST + UCMODE_3 + UCSYNC) << 8) | UCSSEL__SMCLK, + brw : 10, /* gives us 103680 hz, slow speed but will work with all devices.*/ + mctl : 0 /* Not used in I2C mode*/ +}; + #endif // _H_Msp430Usci_h From 35ee1fdbf59ef5b894bd5c91c8e8d06d3b2d8c1d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 4 Jul 2011 23:10:09 -0700 Subject: [PATCH 137/411] msp430/x5/usci: add gen'd I2C, rework Usci interface (add optimized) clean up add generated versions of I2C files add {set,get}Ctl{0,1} rearrange (group together) i2c routines rename {get,set}I2c... to {get,set}I2C... add optimized tx/rx interrupt/flag access routines. --- tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc | 123 ++++++++++++++---- tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc | 12 +- .../x5xxx/usci/HplMsp430UsciInterruptsA0P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsA1P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsA2P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsA3P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsB0P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsB1P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsB2P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsB3P.nc | 7 +- tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc | 107 ++++++++------- tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc | 8 +- .../msp430/x5xxx/usci/Msp430UsciI2CB0C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciI2CB0P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciI2CB1C.nc | 69 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB1P.nc | 72 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB2C.nc | 69 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB2P.nc | 72 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB3C.nc | 69 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB3P.nc | 72 ++++++++++ tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc | 23 ++-- .../msp430/x5xxx/usci/Msp430UsciSpiA0C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiA0P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiA1C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiA1P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiA2C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiA2P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiA3C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiA3P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiB0C.nc | 13 +- .../msp430/x5xxx/usci/Msp430UsciSpiB0P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiB1C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiB1P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiB2C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiB2P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiB3C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiB3P.nc | 3 +- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartA0C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciUartA0P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartA1C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciUartA1P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartA2C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciUartA2P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartA3C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciUartA3P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartP.nc | 4 +- tos/chips/msp430/x5xxx/usci/README.txt | 4 + tos/chips/msp430/x5xxx/usci/generate.sh | 17 ++- tos/chips/msp430/x5xxx/usci/generated.lst | 6 + 57 files changed, 807 insertions(+), 205 deletions(-) create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1C.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2C.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3C.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3P.nc diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc index c9050302ac..a6ae8d22c6 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc @@ -1,4 +1,5 @@ /** + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 Redslate Ltd. * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -54,6 +55,7 @@ * @author Peter A. Bigot * @author Derek Baker * I2C support + * @author Eric B. Decker */ #include "msp430usci.h" @@ -62,7 +64,8 @@ interface HplMsp430Usci { /* ---------------------------------------- * Introspection to identify a module when given a reference to its - * component */ + * component + */ /** * Return a unique identifier for this module among all USCI modules on the chip. @@ -80,14 +83,29 @@ interface HplMsp430Usci { /** * Reads the UCmxCTLW0 Control register. * This register is present on all USCI modules, and is used in all modes. + * + * CTLW0 is the 16 bit concatenation of CTL0 and CTL1. Note on the x5 + * CTL1 is at offset 0 (x5 is base register based) and CTL0 is the msb. + * + * This is swapped with respect to where CTL0 and CTL1 live on the x2 processors, + * CTL0 is at 0 and CTL1 is at 1 (not base register but relative to where the + * registers are defined). This makes config block platform/cpu dependent (which + * they are anyway because of clocking issues). + * + * {get,set}Ctlw0: gets or sets the 16 bit version of the control register. + * {get,set}Ctl{0,1}: gets or sets the 8 bit version of the 0 or 1 register. */ async command uint16_t getCtlw0(); + async command uint8_t getCtl0(); + async command uint8_t getCtl1(); /** * Writes the UCmxCTLW0 Control register. * This register is present on all USCI modules. */ async command void setCtlw0(uint16_t v); + async command void setCtl0(uint8_t v); + async command void setCtl1(uint8_t v); /** * Reads the UCmxBRW Baud Rate Control registers. @@ -161,18 +179,6 @@ interface HplMsp430Usci { */ async command void setAbctl(uint8_t v); - /** - * Read the UCmxI2COA I2C Own Address register. - * This register is present only on USCI_B modules in I2C mode. - */ - async command uint16_t getI2coa(); - - /** - * Write the UCmxI2COA I2C Own Address register. - * This register is present only on USCI_B modules in I2C mode. - */ - async command void setI2coa(uint16_t v); - /** * Read the UCmxIRCTL IrDA Control register. * This register is present only on USCI_A modules in UART mode. @@ -209,17 +215,29 @@ interface HplMsp430Usci { */ async command void setIrrctl(uint8_t v); + /** + * Read the UCmxI2COA I2C Own Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command uint16_t getI2Coa(); + + /** + * Write the UCmxI2COA I2C Own Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command void setI2Coa(uint16_t v); + /** * Read the UCmxI2CSA I2C Slave Address register. * This register is present only on USCI_B modules in I2C mode. */ - async command uint16_t getI2csa(); + async command uint16_t getI2Csa(); /** * Write the UCmxI2CSA I2C Slave Address register. * This register is present only on USCI_B modules in I2C mode. */ - async command void setI2csa(uint16_t v); + async command void setI2Csa(uint16_t v); /** * Reads the UCmxICTL Interrupt Control register. @@ -230,6 +248,9 @@ interface HplMsp430Usci { /** * Writes the UCmxICTL Interrupt Control register. * This register is present on all USCI modules. + * + * ICTL is the 16 bit concatenation of IE (interrupt enable) and IFG + * (interrupt flag). */ async command uint16_t setIctl(uint16_t v); @@ -257,6 +278,61 @@ interface HplMsp430Usci { */ async command void setIfg(uint8_t v); + /* + * using setIfg and setIe to control interrupt state requires something like + * + * setIe(getIe() & ~UCTXIE) // turn of TX ie. + * + * The following provide a more optimized interface that directly references + * the bit in question. Generates better code. Also some drivers have been + * written using these interface specs while others with the direct register + * access specs. + */ + + async command bool isRxIntrPending(); + async command void clrRxIntr(); + async command void disableRxIntr(); + async command void enableRxIntr(); + + async command bool isTxIntrPending(); + async command void clrTxIntr(); + async command void disableTxIntr(); + async command void enableTxIntr(); + + /* + * The following are being deprecated. They existed in the x1 USART + * definitions and also the original x2 definitions. They are broken + * because the semantic is unclear. + * + * async command void disableIntr(); + * async command void enableIntr(); + * async command void clrIntr(); + * + * As the USCI modules became more sophisticated what interrupt is being + * enabled or disabled. This then warped into being simply a set/get + * on the appropriate register. So why have the sugar? + */ + + + /* + * TI h/w provides a busy bit. return tx or rx is doing something + * + * This isn't really that useful. This used to be called txEmpty on the x1 + * USART (where it really did represent that the tx path was empty) but that + * isn't true on USCI modules. Rather it indicates that tx, rx, or both are + * active. These paths are double buffered. + * + * For TX state machines (packet based etc), we want to know that all the bytes + * went out, typically when switching resources. For RX, we will have received + * all the bytes we are interested in, so don't really care that the RX buffers in + * the h/w are empty. + * + * In other words TI exchanged the txEmpty which worked for the isBusy which + * doesn't really work. Thanks, but no thanks, TI! + */ + async command bool isBusy(); + + /** * Reads the UCmxIV Interrupt Vector register. * This register is present on all USCI modules, and is used in all modes. @@ -264,30 +340,25 @@ interface HplMsp430Usci { */ async command uint8_t getIv(); - - async command uint8_t getCtl1(); - async command void setCtl1(uint8_t v); - - /* set direction of the i2c bus */ + /* I2C bits + * + * set direction of the bus + */ async command void setTransmitMode(); async command void setReceiveMode(); - /* get stop bit in i2c mode */ + /* Various I2C bits */ async command bool getStopBit(); async command bool getStartBit(); async command bool getNackBit(); async command bool getTransmitReceiveMode(); - /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ + /* transmit NACK, Stop, or Start condition, automatically cleared */ async command void setTXNACK(); async command void setTXStop(); async command void setTXStart(); - async command bool isTxIntrPending(); - async command bool isRxIntrPending(); async command bool isNackIntrPending(); - async command void clrTxIntr(); - async command void clrRxIntr(); async command void clrNackIntr(); /* ---------------------------------------- diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc index cf8c595ecb..76fa9d6167 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc @@ -49,10 +49,17 @@ */ generic configuration HplMsp430UsciC( - /** Offset of UCmxCTLW0_ register for m=module_type and x=module_instance */ + + /** + * Offset of UCmxCTLW0_ register for m=module_type and x=module_instance + * + * UCmxCTLW0 is the base address for the module. + */ unsigned int UCmxCTLW0_, + /** Name of resource used to arbitrate modes of this USCI instance */ char RESOURCE_NAME[] + ) @safe() { provides { interface HplMsp430Usci as Usci; @@ -66,7 +73,8 @@ generic configuration HplMsp430UsciC( interface HplMsp430UsciInterrupts as RawInterrupts; interface ResourceConfigure[uint8_t client]; } -} implementation { +} +implementation { enum { USCI_ID = unique(MSP430_USCI_RESOURCE), diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc index c3616d1900..0237bfa061 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc @@ -5,14 +5,13 @@ */ module HplMsp430UsciInterruptsA0P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_A0_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc index a88ef4e0ff..b3d8d1f260 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsA1P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_A1_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc index a5fdf43007..3886d50c1a 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsA2P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_A2_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc index f11c704a21..5805845422 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsA3P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_A3_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc index 408d6bcdb1..1533944079 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsB0P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_B0_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc index bc3e3644df..cd20aa06d3 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsB1P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_B1_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc index 2534aa706d..8b993a119f 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsB2P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_B2_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc index 79f16d3e9b..290dd909e4 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsB3P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_B3_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc index 495a730d43..03027d45d5 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc @@ -66,7 +66,6 @@ generic module HplMsp430UsciP( interface Leds; } } - implementation { #define UCmxCTLW0 (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_)) @@ -90,10 +89,14 @@ implementation { async command uint8_t Usci.getModuleIdentifier() { return USCI_ID; } - async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } - async command void Usci.setCtlw0(uint16_t v) { UCmxCTLW0 = v; } - async command uint8_t Usci.getCtl1() { return UCmxCTL1; } - async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } + async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } + async command uint8_t Usci.getCtl0() { return UCmxCTL0; } + async command uint8_t Usci.getCtl1() { return UCmxCTL1; } + + async command void Usci.setCtlw0(uint16_t v) { UCmxCTLW0 = v; } + async command void Usci.setCtl0(uint8_t v) { UCmxCTL0 = v; } + async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } + async command uint16_t Usci.getBrw() { return UCmxBRW; } async command void Usci.setBrw(uint16_t v) { UCmxBRW = v; } async command uint8_t Usci.getMctl() { return UCmxMCTL; } @@ -106,24 +109,75 @@ implementation { async command void Usci.setTxbuf(uint8_t v) { UCmxTXBUF = v; } async command uint8_t Usci.getAbctl() { return UCmxABCTL; } async command void Usci.setAbctl(uint8_t v) { UCmxABCTL = v; } - async command uint16_t Usci.getI2coa() { return UCmxI2COA; } - async command void Usci.setI2coa(uint16_t v) { UCmxI2COA = v; } async command uint16_t Usci.getIrctl() { return UCmxIRCTL; } async command void Usci.setIrctl(uint16_t v) { UCmxIRCTL = v; } async command uint8_t Usci.getIrtctl() { return UCmxIRTCTL; } async command void Usci.setIrtctl(uint8_t v) { UCmxIRTCTL = v; } async command uint8_t Usci.getIrrctl() { return UCmxIRRCTL; } async command void Usci.setIrrctl(uint8_t v) { UCmxIRRCTL = v; } - async command uint16_t Usci.getI2csa() { return UCmxI2CSA; } - async command void Usci.setI2csa(uint16_t v) { UCmxI2CSA = v; } + + async command uint16_t Usci.getI2Coa() { return UCmxI2COA; } + async command void Usci.setI2Coa(uint16_t v) { UCmxI2COA = v; } + + async command uint16_t Usci.getI2Csa() { return UCmxI2CSA; } + async command void Usci.setI2Csa(uint16_t v) { UCmxI2CSA = v; } + async command uint16_t Usci.getIctl() { return UCmxICTL; } async command uint16_t Usci.setIctl(uint16_t v) { UCmxICTL = v; } async command uint8_t Usci.getIe() { return UCmxIE; } async command void Usci.setIe(uint8_t v) { UCmxIE = v; } async command uint8_t Usci.getIfg() { return UCmxIFG; } async command void Usci.setIfg(uint8_t v) { UCmxIFG = v; } + + async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } + async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } + async command void Usci.disableRxIntr() { UCmxIE &= ~UCRXIE; } + async command void Usci.enableRxIntr() { UCmxIE |= UCRXIE; } + + async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } + async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } + async command void Usci.disableTxIntr() { UCmxIE &= ~UCTXIE; } + async command void Usci.enableTxIntr() { UCmxIE |= UCTXIE; } + + async command bool Usci.isBusy() { return (UCmxSTAT & UCBUSY); } + async command uint8_t Usci.getIv() { return UCmxIV; } + /* I2C bits + * + * set direction of the bus + */ + async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } + async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } + + /* Various i2c bits */ + async command bool Usci.getStopBit() { return (UCmxCTL1 & UCTXSTP); } + async command bool Usci.getStartBit() { return (UCmxCTL1 & UCTXSTT); } + async command bool Usci.getNackBit() { return (UCmxCTL1 & UCTXNACK); } + async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } + + /* set NACK, Stop condition, or Start condition, automatically cleared */ + async command void Usci.setTXNACK() { UCmxCTL1 |= UCTXNACK; } + async command void Usci.setTXStop() { UCmxCTL1 |= UCTXSTP; } + async command void Usci.setTXStart() { UCmxCTL1 |= UCTXSTT; } + + async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } + async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } + + async command void Usci.configure (const msp430_usci_config_t* config, + bool leave_in_reset) { + if (! config) { + return; + } + call Usci.enterResetMode_(); + UCmxCTLW0 = config->ctlw0 + UCSWRST; + UCmxBRW = config->brw; + UCmxMCTL = config->mctl; + if (! leave_in_reset) { + call Usci.leaveResetMode_(); + } + } + async command void Usci.enterResetMode_ () { #if defined(WITH_IAR) UCmxCTL1 |= UCSWRST; @@ -140,19 +194,6 @@ implementation { #endif } - async command void Usci.configure (const msp430_usci_config_t* config, - bool leave_in_reset) { - if (! config) { - return; - } - call Usci.enterResetMode_(); - UCmxCTLW0 = config->ctlw0 + UCSWRST; - UCmxBRW = config->brw; - UCmxMCTL = config->mctl; - if (! leave_in_reset) { - call Usci.leaveResetMode_(); - } - } async command uint8_t Usci.currentMode () { atomic { @@ -166,28 +207,6 @@ implementation { } } - /* set direction of the bus */ - async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } - async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } - - /* get stop bit in i2c mode */ - async command bool Usci.getStopBit() { return (UCmxCTL1 & UCTXSTP); } - async command bool Usci.getStartBit() { return (UCmxCTL1 & UCTXSTT); } - async command bool Usci.getNackBit() { return (UCmxCTL1 & UCTXNACK); } - async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } - - /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ - async command void Usci.setTXNACK() { UCmxCTL1 |= UCTXNACK; } - async command void Usci.setTXStop() { UCmxCTL1 |= UCTXSTP; } - async command void Usci.setTXStart() { UCmxCTL1 |= UCTXSTT; } - - async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } - async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } - async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } - - async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } - async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } - async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } /* * Upon receipt of an interrupt, if the USCI is active then demux diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc index ee4d39a26b..e418cbb2a6 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc @@ -8,11 +8,9 @@ configuration Msp430UsciA0P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCA0CTLW0_, MSP430_USCI_A0_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc index 6175af0017..13f42c8d52 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciA1P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCA1CTLW0_, MSP430_USCI_A1_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc index 3db1621309..da0beb2e5e 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciA2P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCA2CTLW0_, MSP430_USCI_A2_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc index aa8f8bcbcb..5e04f1bf19 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciA3P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCA3CTLW0_, MSP430_USCI_A3_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc index 39192141d3..e69dbd8ac2 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciB0P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCB0CTLW0_, MSP430_USCI_B0_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc index 2b6e686ff5..ca55336468 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciB1P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCB1CTLW0_, MSP430_USCI_B1_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc index 54e781bf8a..8339572132 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciB2P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCB2CTLW0_, MSP430_USCI_B2_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc index 658926d281..4c6b77dac7 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciB3P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCB3CTLW0_, MSP430_USCI_B3_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc index c0a5bb00e4..c3d62cbe16 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc @@ -50,7 +50,8 @@ generic configuration Msp430UsciI2CB0C() { interface I2CPacket; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc index 9bb2412e8e..5dc5b33e67 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc @@ -51,7 +51,8 @@ configuration Msp430UsciI2CB0P { interface HplMsp430GeneralIO as SDA; interface HplMsp430GeneralIO as SCL; } -} implementation { +} +implementation { components Msp430UsciB0P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1C.nc new file mode 100644 index 0000000000..b27251a246 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1C.nc @@ -0,0 +1,69 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B1 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B1 in I2C mode. + * + * @author Derek Baker (derek@red-slate.com) + * copied from SPI, tweaked for I2C. + */ + +generic configuration Msp430UsciI2CB1C() { + provides { + interface Resource; + interface I2CPacket; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B1_RESOURCE), + }; + + components Msp430UsciB1P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciI2CB1P as I2CC; + I2CPacket = I2CC.I2CPacket[CLIENT_ID]; + Msp430UsciError = I2CC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1P.nc new file mode 100644 index 0000000000..288cd37a54 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1P.nc @@ -0,0 +1,72 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B1 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Derek Baker + * tweak SPI into I2C. + */ + +configuration Msp430UsciI2CB1P { + provides { + interface I2CPacket[ uint8_t client ]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + } +} +implementation { + + components Msp430UsciB1P as UsciC; + + components new Msp430UsciI2CP() as I2CC; + I2CC.Usci -> UsciC; + I2CC.Interrupts -> UsciC.Interrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC; + Msp430UsciError = I2CC; + SDA = I2CC.SDA; + SCL = I2CC.SCL; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2C.nc new file mode 100644 index 0000000000..5cdc2cdf0a --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2C.nc @@ -0,0 +1,69 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B2 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B2 in I2C mode. + * + * @author Derek Baker (derek@red-slate.com) + * copied from SPI, tweaked for I2C. + */ + +generic configuration Msp430UsciI2CB2C() { + provides { + interface Resource; + interface I2CPacket; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B2_RESOURCE), + }; + + components Msp430UsciB2P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciI2CB2P as I2CC; + I2CPacket = I2CC.I2CPacket[CLIENT_ID]; + Msp430UsciError = I2CC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2P.nc new file mode 100644 index 0000000000..930213714c --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2P.nc @@ -0,0 +1,72 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B2 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Derek Baker + * tweak SPI into I2C. + */ + +configuration Msp430UsciI2CB2P { + provides { + interface I2CPacket[ uint8_t client ]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + } +} +implementation { + + components Msp430UsciB2P as UsciC; + + components new Msp430UsciI2CP() as I2CC; + I2CC.Usci -> UsciC; + I2CC.Interrupts -> UsciC.Interrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC; + Msp430UsciError = I2CC; + SDA = I2CC.SDA; + SCL = I2CC.SCL; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3C.nc new file mode 100644 index 0000000000..6c28802e77 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3C.nc @@ -0,0 +1,69 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B3 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B3 in I2C mode. + * + * @author Derek Baker (derek@red-slate.com) + * copied from SPI, tweaked for I2C. + */ + +generic configuration Msp430UsciI2CB3C() { + provides { + interface Resource; + interface I2CPacket; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B3_RESOURCE), + }; + + components Msp430UsciB3P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciI2CB3P as I2CC; + I2CPacket = I2CC.I2CPacket[CLIENT_ID]; + Msp430UsciError = I2CC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3P.nc new file mode 100644 index 0000000000..6be7b8fc82 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3P.nc @@ -0,0 +1,72 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B3 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Derek Baker + * tweak SPI into I2C. + */ + +configuration Msp430UsciI2CB3P { + provides { + interface I2CPacket[ uint8_t client ]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + } +} +implementation { + + components Msp430UsciB3P as UsciC; + + components new Msp430UsciI2CP() as I2CC; + I2CC.Usci -> UsciC; + I2CC.Interrupts -> UsciC.Interrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC; + Msp430UsciError = I2CC; + SDA = I2CC.SDA; + SCL = I2CC.SCL; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc index 6dae4fbf53..1a8bc8f5fa 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc @@ -132,9 +132,8 @@ implementation { * left off. */ error_t configure_ (const msp430_usci_config_t* config) { - if ( !config ) { + if ( !config ) return FAIL; - } /* Do basic configuration, leaving USCI in reset mode. Configure * the I2C pins, enable the USCI, and turn off the interrupts. @@ -170,15 +169,15 @@ implementation { uint8_t * m_rx_buf = data; uint16_t m_rx_addr = addr; - if((flags & I2C_STOP) && (flags & I2C_ACK_END)) { /*can only set one or the other*/ + if ((flags & I2C_STOP) && (flags & I2C_ACK_END)) { /*can only set one or the other*/ m_rx_len = 0; signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); return FAIL; } - if(flags & I2C_START) { + if (flags & I2C_START) { call Usci.setReceiveMode(); /*put the uart into receive mode*/ - call Usci.setI2csa(addr); /*Set the Slave Address*/ + call Usci.setI2Csa(addr); /*Set the Slave Address*/ i=0; while (call Usci.getStopBit()) { if (i >= TIMEOUT) { @@ -227,7 +226,7 @@ implementation { length--; } - if(flags & I2C_ACK_END) { /*dont end the receive, we want to receive more*/ + if (flags & I2C_ACK_END) { /*dont end the receive, we want to receive more*/ m_rx_len -= length; signal I2CPacket.readDone[client](SUCCESS,m_rx_addr,m_rx_len,m_rx_buf); return SUCCESS; @@ -269,7 +268,7 @@ implementation { if(flags & I2C_START) { call Usci.setTransmitMode(); /*set transmit mode on i2c*/ - call Usci.setI2csa(addr); /*Set the Slave Address*/ + call Usci.setI2Csa(addr); /*Set the Slave Address*/ i=0; while (call Usci.getStopBit()) { if (i >= TIMEOUT) { @@ -280,7 +279,7 @@ implementation { i++; } i=0; - while((call Usci.getStat() & UCBBUSY)) { + while ((call Usci.getStat() & UCBBUSY)) { if (i >= TIMEOUT) { m_tx_len = 0; signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); @@ -311,7 +310,7 @@ implementation { length--; } - if(flags & I2C_STOP) { + if (flags & I2C_STOP) { call Usci.setTXStop(); /*Set the uart to generate a STOP*/ i=0; while (call Usci.getStopBit()) { @@ -333,10 +332,12 @@ implementation { default async event void I2CPacket.writeDone[uint8_t client] (error_t error, uint16_t addr, uint8_t length, uint8_t* data) { } + /* + * Interrupts currently not implemented. + */ async event void Interrupts.interrupted (uint8_t iv) { - if ( !call ArbiterInfo.inUse()) { + if ( !call ArbiterInfo.inUse()) return; - } return; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc index 70b70d9208..2038466302 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A0 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_A0 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiA0C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiA0C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiA0C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCA0SIMO; + SpiC.SOMI -> GIO.UCA0SOMI; + SpiC.CLK -> GIO.UCA0CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc index a7185af139..cacab860db 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiA0P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciA0P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc index 17dae4c9ce..f5ecb1efcb 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A1 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_A1 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiA1C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiA1C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A1_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiA1C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCA1SIMO; + SpiC.SOMI -> GIO.UCA1SOMI; + SpiC.CLK -> GIO.UCA1CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc index 04cb9e3fe8..db2169a5eb 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiA1P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciA1P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc index 15c06eb424..8952f60479 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A2 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_A2 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiA2C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiA2C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A2_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiA2C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCA2SIMO; + SpiC.SOMI -> GIO.UCA2SOMI; + SpiC.CLK -> GIO.UCA2CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc index d44539fa14..e8cb90e0b3 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiA2P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciA2P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc index 63b900592f..9c8a90c9ae 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A3 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_A3 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiA3C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiA3C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A3_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiA3C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCA3SIMO; + SpiC.SOMI -> GIO.UCA3SOMI; + SpiC.CLK -> GIO.UCA3CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc index 49c00329b1..81ccfb32c1 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiA3P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciA3P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc index 345883ebc9..3bf7318009 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc @@ -44,7 +44,6 @@ * @author João Gonçalves */ - generic configuration Msp430UsciSpiB0C() { provides { interface Resource; @@ -52,8 +51,8 @@ generic configuration Msp430UsciSpiB0C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), }; @@ -68,9 +67,9 @@ generic configuration Msp430UsciSpiB0C() { UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - components HplMsp430GeneralIOC as GIO; + components HplMsp430GeneralIOC as GIO; - SpiC.SIMO -> GIO.UCB0SIMO; - SpiC.SOMI -> GIO.UCB0SOMI; - SpiC.CLK -> GIO.UCB0CLK; + SpiC.SIMO -> GIO.UCB0SIMO; + SpiC.SOMI -> GIO.UCB0SOMI; + SpiC.CLK -> GIO.UCB0CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc index 7255083b66..c9415c1515 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc @@ -11,7 +11,8 @@ configuration Msp430UsciSpiB0P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciB0P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc index bc06df1bcf..1cb2d91f76 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B1 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_B1 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiB1C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiB1C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B1_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiB1C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCB1SIMO; + SpiC.SOMI -> GIO.UCB1SOMI; + SpiC.CLK -> GIO.UCB1CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc index 4290252095..f7ad12aa3b 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiB1P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciB1P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc index 43dc524734..14088f6f2a 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B2 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_B2 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiB2C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiB2C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B2_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiB2C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCB2SIMO; + SpiC.SOMI -> GIO.UCB2SOMI; + SpiC.CLK -> GIO.UCB2CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc index f8262db2eb..055eca4f7f 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiB2P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciB2P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc index d03d080acf..639b5604a1 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B3 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_B3 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiB3C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiB3C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B3_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiB3C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCB3SIMO; + SpiC.SOMI -> GIO.UCB3SOMI; + SpiC.CLK -> GIO.UCB3CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc index 6ec0401514..c14647f046 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiB3P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciB3P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc index 8402d42bda..7aaa13bdf8 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc @@ -50,7 +50,6 @@ generic module Msp430UsciSpiP () @safe() { interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; } - uses { interface HplMsp430Usci as Usci; interface HplMsp430UsciInterrupts as Interrupts; @@ -62,7 +61,8 @@ generic module Msp430UsciSpiP () @safe() { interface ArbiterInfo; interface Leds; } -} implementation { +} +implementation { /** The SPI is busy if it's actively transmitting/receiving, or if * there is an active buffered I/O operation. diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc index 6a77c6d21d..1fed90eaa6 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc @@ -46,7 +46,8 @@ generic configuration Msp430UsciUartA0C() { interface UartByte; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc index c5e3b75083..67351a479e 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc @@ -10,10 +10,10 @@ configuration Msp430UsciUartA0P { interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; } -} implementation { +} +implementation { components Msp430UsciA0P as UsciC; - components new Msp430UsciUartP() as UartC; UartC.Usci -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc index abf9d7073c..b28d5aef09 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc @@ -48,7 +48,8 @@ generic configuration Msp430UsciUartA1C() { interface UartByte; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A1_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc index a8225f1713..881aed4b50 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc @@ -12,10 +12,10 @@ configuration Msp430UsciUartA1P { interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; } -} implementation { +} +implementation { components Msp430UsciA1P as UsciC; - components new Msp430UsciUartP() as UartC; UartC.Usci -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc index 9d2e55cd03..8b42664b74 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc @@ -48,7 +48,8 @@ generic configuration Msp430UsciUartA2C() { interface UartByte; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A2_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc index 31487ab407..5291687075 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc @@ -12,10 +12,10 @@ configuration Msp430UsciUartA2P { interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; } -} implementation { +} +implementation { components Msp430UsciA2P as UsciC; - components new Msp430UsciUartP() as UartC; UartC.Usci -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc index d780212dd7..f20d33fbe7 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc @@ -48,7 +48,8 @@ generic configuration Msp430UsciUartA3C() { interface UartByte; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A3_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc index a52b692d11..be1a26fd60 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc @@ -12,10 +12,10 @@ configuration Msp430UsciUartA3P { interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; } -} implementation { +} +implementation { components Msp430UsciA3P as UsciC; - components new Msp430UsciUartP() as UartC; UartC.Usci -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc index 3c3158f906..609e991e2c 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc @@ -81,7 +81,6 @@ generic module Msp430UsciUartP () @safe() { interface ResourceConfigure[ uint8_t client ]; interface Msp430UsciError[ uint8_t client ]; } - uses { interface HplMsp430Usci as Usci; interface HplMsp430UsciInterrupts as Interrupts; @@ -92,7 +91,8 @@ generic module Msp430UsciUartP () @safe() { interface ArbiterInfo; interface LocalTime as LocalTime_bms; } -} implementation { +} +implementation { norace uint16_t m_tx_len, m_rx_len; norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; diff --git a/tos/chips/msp430/x5xxx/usci/README.txt b/tos/chips/msp430/x5xxx/usci/README.txt index d954cc530e..db6a345fab 100644 --- a/tos/chips/msp430/x5xxx/usci/README.txt +++ b/tos/chips/msp430/x5xxx/usci/README.txt @@ -19,6 +19,10 @@ Code Composer Studio distribution: msp430x47x3 msp430x47x4 msp430x241x msp430x24x msp430x24x1 msp430x26x msp430x471x6 msp430x471x7 msp430x47x3 msp430x47x4 + The interrupt structure on these chips is significantly more complicated + than on the x5 chips. The various vectors are shared and don't really + make a whole lot of sense. The x5 is significantly cleaner. + __MSP430_HAS_USCI_A0__, __MSP430_HAS_USCI_B0__ -- third generation USCI implementation on chips: cc430x513x cc430x612x cc430x613x msp430x54x msp430x54xA msp430x551x diff --git a/tos/chips/msp430/x5xxx/usci/generate.sh b/tos/chips/msp430/x5xxx/usci/generate.sh index 447d314bda..bfd4377b30 100755 --- a/tos/chips/msp430/x5xxx/usci/generate.sh +++ b/tos/chips/msp430/x5xxx/usci/generate.sh @@ -10,16 +10,27 @@ # that template. # # @author Peter A. Bigot +# @author Eric B. Decker +# +# UART is implemented in USCI_A modules +# I2C is implemented in USCI_B modules +# SPI is implemented in USCI_A and USCI_B modules + +# List of tags for USCI_Ax modules. A0 is the master for A +# modules and Uart. -# List of tags for USCI_Ax modules. The first is the template. A_MODULES='A0 A1 A2 A3' -# List of tags for USCI_Bx modules. The first is the template. + +# List of tags for USCI_Ax modules. B0 is the master for B +# modules and Spi (B and A) and I2C modules. + B_MODULES='B0 B1 B2 B3' # Initialize a file that will contain a list of all generated files, # so we can remove them during basic maintenance. Their presence # clutters the directory and makes it difficult to see what's really # important. + rm -f generated.lst clone_module () { @@ -62,4 +73,4 @@ clone_mode_modules () { # Clone the mode-specific configurations clone_mode_modules Uart ${A_MODULES} clone_mode_modules Spi ${B_MODULES} ${A_MODULES} -# clone_mode_modules I2c ${B_MODULES} +clone_mode_modules I2C ${B_MODULES} diff --git a/tos/chips/msp430/x5xxx/usci/generated.lst b/tos/chips/msp430/x5xxx/usci/generated.lst index d4d33bc51f..0ac13716b1 100644 --- a/tos/chips/msp430/x5xxx/usci/generated.lst +++ b/tos/chips/msp430/x5xxx/usci/generated.lst @@ -32,3 +32,9 @@ Msp430UsciSpiA0P.nc Msp430UsciSpiA1P.nc Msp430UsciSpiA2P.nc Msp430UsciSpiA3P.nc +Msp430UsciI2CB1C.nc +Msp430UsciI2CB2C.nc +Msp430UsciI2CB3C.nc +Msp430UsciI2CB1P.nc +Msp430UsciI2CB2P.nc +Msp430UsciI2CB3P.nc From bcc6e594b2efc92883dda3273c939b55573beab5 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 5 Jul 2011 22:47:25 -0700 Subject: [PATCH 138/411] bring in red platform files --- support/make/red.target | 12 ++ tos/platforms/red/.platform | 86 ++++++++ tos/platforms/red/ActiveMessageC.nc | 75 +++++++ tos/platforms/red/Ieee154MessageC.nc | 82 ++++++++ tos/platforms/red/PlatformC.nc | 70 +++++++ tos/platforms/red/PlatformP.nc | 76 +++++++ .../red/compatibility/system/LedsC.nc | 53 +++++ tos/platforms/red/hardware.h | 20 ++ .../hardware/IPV6/Identity/DeviceIdentity.nc | 93 +++++++++ .../hardware/IPV6/Identity/DeviceIdentityC.nc | 55 +++++ .../hardware/IPV6/Identity/DeviceIdentityP.nc | 131 ++++++++++++ .../IPV6/Identity/Ieee154OdiAddressC.nc | 68 +++++++ .../IPV6/Identity/Ieee154OdiAddressP.nc | 77 +++++++ .../red/hardware/IPV6/Identity/odi.h | 100 +++++++++ .../red/hardware/IPV6/Identity/odi_types.h | 74 +++++++ .../red/hardware/clock/PlatformClockC.nc | 50 +++++ .../red/hardware/clock/PlatformClockP.nc | 144 +++++++++++++ tos/platforms/red/hardware/leds/PlatformLed.h | 10 + .../red/hardware/leds/PlatformLedC.nc | 62 ++++++ .../red/hardware/leds/PlatformLedP.nc | 190 ++++++++++++++++++ .../red/hardware/pins/PlatformPinsC.nc | 51 +++++ .../red/hardware/pins/PlatformPinsP.nc | 123 ++++++++++++ .../red/hardware/radio/RadioChannelC.nc | 54 +++++ .../red/hardware/radio/RadioChannelP.nc | 84 ++++++++ .../red/hardware/radio/RadioRssiC.nc | 62 ++++++ .../red/hardware/radio/RadioRssiP.nc | 61 ++++++ tos/platforms/red/hardware/radio/rfa1-red.h | 63 ++++++ .../red/hardware/usci/PlatformI2CC.nc | 17 ++ .../red/hardware/usci/PlatformI2CP.nc | 16 ++ .../red/hardware/usci/PlatformSerialC.nc | 19 ++ .../red/hardware/usci/PlatformSerialP.nc | 15 ++ .../red/hardware/usci/PlatformUsciInitC.nc | 62 ++++++ tos/platforms/red/platform.h | 0 tos/platforms/red/platform_message.h | 24 +++ 34 files changed, 2179 insertions(+) create mode 100644 support/make/red.target create mode 100644 tos/platforms/red/.platform create mode 100644 tos/platforms/red/ActiveMessageC.nc create mode 100644 tos/platforms/red/Ieee154MessageC.nc create mode 100644 tos/platforms/red/PlatformC.nc create mode 100644 tos/platforms/red/PlatformP.nc create mode 100644 tos/platforms/red/compatibility/system/LedsC.nc create mode 100644 tos/platforms/red/hardware.h create mode 100644 tos/platforms/red/hardware/IPV6/Identity/DeviceIdentity.nc create mode 100644 tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityC.nc create mode 100644 tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityP.nc create mode 100644 tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressC.nc create mode 100644 tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressP.nc create mode 100644 tos/platforms/red/hardware/IPV6/Identity/odi.h create mode 100644 tos/platforms/red/hardware/IPV6/Identity/odi_types.h create mode 100644 tos/platforms/red/hardware/clock/PlatformClockC.nc create mode 100644 tos/platforms/red/hardware/clock/PlatformClockP.nc create mode 100644 tos/platforms/red/hardware/leds/PlatformLed.h create mode 100644 tos/platforms/red/hardware/leds/PlatformLedC.nc create mode 100644 tos/platforms/red/hardware/leds/PlatformLedP.nc create mode 100644 tos/platforms/red/hardware/pins/PlatformPinsC.nc create mode 100644 tos/platforms/red/hardware/pins/PlatformPinsP.nc create mode 100644 tos/platforms/red/hardware/radio/RadioChannelC.nc create mode 100644 tos/platforms/red/hardware/radio/RadioChannelP.nc create mode 100644 tos/platforms/red/hardware/radio/RadioRssiC.nc create mode 100644 tos/platforms/red/hardware/radio/RadioRssiP.nc create mode 100644 tos/platforms/red/hardware/radio/rfa1-red.h create mode 100644 tos/platforms/red/hardware/usci/PlatformI2CC.nc create mode 100644 tos/platforms/red/hardware/usci/PlatformI2CP.nc create mode 100644 tos/platforms/red/hardware/usci/PlatformSerialC.nc create mode 100644 tos/platforms/red/hardware/usci/PlatformSerialP.nc create mode 100644 tos/platforms/red/hardware/usci/PlatformUsciInitC.nc create mode 100644 tos/platforms/red/platform.h create mode 100644 tos/platforms/red/platform_message.h diff --git a/support/make/red.target b/support/make/red.target new file mode 100644 index 0000000000..cf174a0394 --- /dev/null +++ b/support/make/red.target @@ -0,0 +1,12 @@ +#-*-Makefile-*- vim:syntax=make +#$Id$ + +PLATFORM ?= red +MSP_MCU = cc430x5137 +IAR_MCU_GROUP = cc430x513x +IAR_LINKER_XCL = lnkcc430F5137.xcl + +$(call TOSMake_include_platform,msp) + +red: $(BUILD_DEPS) + @: diff --git a/tos/platforms/red/.platform b/tos/platforms/red/.platform new file mode 100644 index 0000000000..817f01102f --- /dev/null +++ b/tos/platforms/red/.platform @@ -0,0 +1,86 @@ +# Includes that should take precedence come first. Platforms come before +# chips because they may override files. These must be specified as +# @includes instead of -I's to @opts, otherwise the %T won't be processed +# by ncc. + +for (split(/\n/, <<'EOText' + + %P/hardware/pins + %P/hardware/leds + %P/hardware/usci + %P/hardware/radio + %P/hardware/clock + %P/hardware/IPV6/Identity + %P/compatibility/system + + %T/chips/msp430/x5xxx + %T/chips/msp430/x5xxx/lpm + %T/chips/msp430/x5xxx/timer + %T/chips/msp430/x5xxx/usci + + %T/chips/msp430 + %T/chips/msp430/pins + %T/chips/msp430/timer + %T/chips/msp430/pmm + %T/chips/msp430/adc12 + %T/chips/msp430/sensors + + %T/chips/msp430/rf1a + %T/chips/msp430/rf1a/interfaces + %T/chips/msp430/rf1a/system + %T/chips/msp430/rf1a/physical + %T/chips/msp430/rf1a/am + %T/chips/msp430/rf1a/ieee154 + %T/chips/msp430/rf1a/layers + + %T/lib/timer + + %T/lib/util/keyvaluerecord + + %T/lib/serial + %T/lib/printf + +EOText +)) { + s/\#.*$//; + s/^\s*//g; + s/\s*$//g; + push(@includes, $_) if $_; +} + +@opts = qw( + -gcc=msp430-gcc + -mmcu=cc430x5137 + -fnesc-target=msp430 + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask +); + + + +#push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; +#push @opts, "-mingw-gcc" if $cygwin; + +$ENV{'CIL_MACHINE'} = + "version_major=3 " . + "version_minor=2 " . + "version=msp430-3.2.3 " . + "short=2,2 " . + "int=2,2 " . + "long=4,2 " . + "long_long=8,2 " . + "pointer=2,2 " . + "enum=2,2 " . + "float=4,2 " . + "double=4,2 " . + "long_double=4,2 " . + "void=1,1 " . + "fun=1,2 " . + "wchar_size_size=2,2 " . + "alignof_string=1 " . + "max_alignment=1 " . + "char_wchar_signed=true,true " . + "const_string_literals=true " . + "big_endian=false " . + "underscore_name=false " . + "__builtin_va_list=true " . + "__thread_is_keyword=true"; diff --git a/tos/platforms/red/ActiveMessageC.nc b/tos/platforms/red/ActiveMessageC.nc new file mode 100644 index 0000000000..a43af5ae45 --- /dev/null +++ b/tos/platforms/red/ActiveMessageC.nc @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2004-2005 The Regents of the University of California. + * Copyright (c) 2004-2005 Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * + * The Active Message layer for the SURF platform. This is a naming wrapper + * around the RF1A Active Message layer. + */ + +configuration ActiveMessageC { + provides { + interface SplitControl; + + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; +// interface PacketTimeStamp as PacketTimeStamp32khz; +// interface PacketTimeStamp as PacketTimeStampMilli; +// interface LowPowerListening; + } +} + +implementation { + components Rf1aActiveMessageC as AM; + + SplitControl = AM; + + AMSend = AM; + Receive = AM.Receive; + Snoop = AM.Snoop; + Packet = AM; + AMPacket = AM; + PacketAcknowledgements = AM; +// LowPowerListening = AM; + +// components Rf1aPacketC; +// PacketTimeStamp32khz = CC2420PacketC; +// PacketTimeStampMilli = CC2420PacketC; +} diff --git a/tos/platforms/red/Ieee154MessageC.nc b/tos/platforms/red/Ieee154MessageC.nc new file mode 100644 index 0000000000..5102f3d42a --- /dev/null +++ b/tos/platforms/red/Ieee154MessageC.nc @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Generic network stack interface for Ieee154-based applications. + * + * @author Peter A. Bigot + */ + +configuration Ieee154MessageC { + provides { + interface SplitControl; + + interface Ieee154Send; + interface Receive as Ieee154Receive; + + interface Packet; + interface Ieee154Packet; + + interface MessageLqi; + interface MessageRssi; + + interface PacketAcknowledgements; /* @TODO@ implement */ + interface LowPowerListening; + interface Resource; + } +} implementation { + components Rf1aIeee154MessageC as MsgC; + SplitControl = MsgC; + Ieee154Send = MsgC; + Ieee154Receive = MsgC; + Packet = MsgC; + Ieee154Packet = MsgC; + PacketAcknowledgements = MsgC; + LowPowerListening = MsgC; + Resource = MsgC; + + MessageLqi = MsgC; + MessageRssi = MsgC; + + components RadioRssiC; + RadioRssiC.Rf1aPhysical -> MsgC; +} + +/* + * Local Variables: + * mode: c + * End: + */ diff --git a/tos/platforms/red/PlatformC.nc b/tos/platforms/red/PlatformC.nc new file mode 100644 index 0000000000..c2e2a518de --- /dev/null +++ b/tos/platforms/red/PlatformC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Joe Polastre + * @author Cory Sharp + * @author David Moss + * @author Derek Baker + */ + +#include "hardware.h" + +configuration PlatformC { + provides interface Init as PlatformInit; + uses interface Init as PeripheralInit; +} +implementation { + + components PlatformP; + PlatformInit = PlatformP; + PeripheralInit = PlatformP.PeripheralInit; + + components PlatformPinsC; + PlatformP.PlatformPins -> PlatformPinsC; + + components PlatformLedC; //Surf Led System + PlatformP.PlatformLed -> PlatformLedC; + + components PlatformUsciInitC; + // No code initialization required; just connect the pins + + components Msp430PmmC; + PlatformP.Pmm -> Msp430PmmC; + + components PlatformClockC; + PlatformP.PlatformClock -> PlatformClockC; +} diff --git a/tos/platforms/red/PlatformP.nc b/tos/platforms/red/PlatformP.nc new file mode 100644 index 0000000000..a0167b0a95 --- /dev/null +++ b/tos/platforms/red/PlatformP.nc @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +#include "hardware.h" + +module PlatformP { + provides interface Init; + uses { + interface Init as PlatformPins; + interface Init as PlatformLed; //Surf Led System + interface Init as PlatformClock; + interface Init as PeripheralInit; + interface Pmm; + } +} +implementation { + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + command error_t Init.init() { + WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer + + call PlatformPins.init(); + call Pmm.setVoltage(RADIO_VCORE_LEVEL); + call PlatformLed.init(); // Surf Led System + call PlatformClock.init(); + call PeripheralInit.init(); + + // Wait an arbitrary 10 milliseconds for the FLL to calibrate the DCO + // before letting the system continue on into a low power mode. + uwait(1024*10); + return SUCCESS; + } + + /***************** Defaults ***************/ + default command error_t PeripheralInit.init() { + return SUCCESS; + } +} diff --git a/tos/platforms/red/compatibility/system/LedsC.nc b/tos/platforms/red/compatibility/system/LedsC.nc new file mode 100644 index 0000000000..d55ad3948a --- /dev/null +++ b/tos/platforms/red/compatibility/system/LedsC.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2010 People Power Co. + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * + * The basic TinyOS LEDs abstraction. + * OSIAN compatibility layer: Remove init (handled elsewhere); use active-high. + * + * @author Phil Buonadonna + * @author David Gay + * @author Philip Levis + * @author Joe Polastre + * @author Peter A. Bigot + */ + +configuration LedsC { + provides interface Leds; +} implementation { + components PlatformLedC; + Leds = PlatformLedC; +} diff --git a/tos/platforms/red/hardware.h b/tos/platforms/red/hardware.h new file mode 100644 index 0000000000..e629f23c47 --- /dev/null +++ b/tos/platforms/red/hardware.h @@ -0,0 +1,20 @@ +#ifndef _H_hardware_h +#define _H_hardware_h + +#include "msp430hardware.h" + +// enum so components can override power saving, +// as per TEP 112. +enum { + TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, +}; + +/* + * The cc430f5137 includes the RF1A. When the radio is being used + * the PMM VCORE setting must be at or abore 2. + */ + +#define RADIO_VCORE_LEVEL 2 + + +#endif // _H_hardware_h diff --git a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentity.nc b/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentity.nc new file mode 100644 index 0000000000..4e0745b482 --- /dev/null +++ b/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentity.nc @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "IeeeEui64.h" +#include "odi.h" + +/** + * Access the board OSIAN Device Identifier. + * + * The ODI is a tuple of values encoded in a sixty-four bit unsigned + * integer structurally consistent with IEEE EUI64 values. + * + * A key feature of the ODI is that it is immutable. In the standard + * implementation DeviceIdentityC, the constant metadata fields like + * device class and type can be defined at compile time through the + * use of the ODI_DEFAULT_field preprocessor symbols (which can be + * conveniently set using the odi_field make extras). Alternative + * implementations that obtain ODI data from the environment are + * possible. + * + * Regardless of implementation, once an ODI value is returned, the + * implementation must guarantee that the same value will be returned + * on all subsequent calls. + * + * @author Peter Bigot + * @author David Moss + */ + +interface DeviceIdentity { + + /** + * Get a pointer to the ODI structure. + * + * This function should not be invoked prior to MainC.Boot.booted(), + * and must not be invoked from any function in the + * DeviceIdentityConfiguration interface. + * + * Implementations must guarantee that multiple invocations of this + * function always return a pointer to the same value. + */ + command const odi_t * get (); + + /** + * Get a pointer to the ODI value, cast as an IEEE EUI64 value. + * + * This function is expected to invoke get(). + */ + command const ieee_eui64_t * getEui64 (); + + /** + * Get an optional human-readable description of the device. + * + * Unlike the ODI value itself, the description field may change + * from an undefined value (a null pointer) to a defined value. For + * example, it may be provided by an external service that uses the + * device ODI as a key. It is, however, immutable after being + * set. + */ + command const char * getDescription (); +} diff --git a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityC.nc b/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityC.nc new file mode 100644 index 0000000000..f2e42501e6 --- /dev/null +++ b/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/** + * @author David Moss + */ +configuration DeviceIdentityC { + provides interface DeviceIdentity; +} +implementation { + + components PlatformI2CC; + DeviceIdentityP.I2CPacket -> PlatformI2CC; + DeviceIdentityP.StdControl -> PlatformI2CC; + + components DeviceIdentityP; + DeviceIdentity = DeviceIdentityP; + + components MainC; + MainC.SoftwareInit -> DeviceIdentityP; +} diff --git a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityP.nc b/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityP.nc new file mode 100644 index 0000000000..a580758c1e --- /dev/null +++ b/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityP.nc @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "odi.h" + +/** + * @author David Moss + * @author Peter Bigot + */ + +module DeviceIdentityP { + provides { + interface Init; + interface DeviceIdentity; + } + uses { + interface I2CPacket; + interface StdControl; + } +} implementation { + +/* Set default metadata values */ +#ifndef OSIAN_DEVICE_OUI +#define OSIAN_DEVICE_OUI 0xB0C8AD +#endif /* OSIAN_DEVICE_OUI */ +#ifndef OSIAN_DEVICE_SENSOR +#define OSIAN_DEVICE_SENSOR 0 +#endif /* OSIAN_DEVICE_SENSOR */ +#ifndef OSIAN_DEVICE_ACTUATOR +#define OSIAN_DEVICE_ACTUATOR 0 +#endif /* OSIAN_DEVICE_ACTUATOR */ +#ifndef OSIAN_DEVICE_CLASS +#define OSIAN_DEVICE_CLASS ODI_CLS_Unregistered +#endif /* OSIAN_DEVICE_CLASS */ +#ifndef OSIAN_DEVICE_TYPE +#define OSIAN_DEVICE_TYPE 1 +#endif /* OSIAN_DEVICE_TYPE */ + + /** + * OSIAN Device Identifier, basically an EUI-64 with extra info. + * + * @note Don't bother trying to initialize this at compile-time. + * nx_structs with bit fields don't translate into something that + * can be statically initialized. + */ + odi_t odi; + + command error_t Init.init () { + static bool done; + error_t rc = SUCCESS; + + if (done) + return SUCCESS; + done = TRUE; + odi.oui = OSIAN_DEVICE_OUI; + odi.reserved = 0; + odi.sensor = OSIAN_DEVICE_SENSOR; + odi.actuator = OSIAN_DEVICE_ACTUATOR; + odi.deviceClass = OSIAN_DEVICE_CLASS; + odi.deviceType = OSIAN_DEVICE_TYPE; + { + uint32_t id = 0; + uint8_t EE_senddata[5],EE_recdata[5]; + + call StdControl.start(); + + EE_senddata[0]=0x00; //high byte address + EE_senddata[1]=0x40; //low byte address + + rc = call I2CPacket.write(I2C_START, 0x0050, 2, EE_senddata); //set the eeprom internal addr to 0x0050 + rc = call I2CPacket.read(I2C_START | I2C_STOP, 0x0050,3, EE_recdata); //read 7 bytes from current eeprom addr + + if (SUCCESS == rc) { + id = (id << 8) | EE_recdata[0]; + id = (id << 8) | EE_recdata[1]; + id = (id << 8) | EE_recdata[2]; + } + odi.id = id; + } + return rc; + } + + command const odi_t* DeviceIdentity.get () { + call Init.init(); + return &odi; + } + + command const ieee_eui64_t* DeviceIdentity.getEui64 () { + return (const ieee_eui64_t*)call DeviceIdentity.get(); + } + + command const char * DeviceIdentity.getDescription () { return 0; } + + async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data) { } + + async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data) { } + +} diff --git a/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressC.nc b/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressC.nc new file mode 100644 index 0000000000..479ec6b8b2 --- /dev/null +++ b/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressC.nc @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Component to automatically assign the IEEE 802.15.4 link-layer address + * based on a PAN id and the device's unique identifier. + * + * Instantiate this component in your configuration. Connect + * something (probably in MainC) to either Boot or Init. If you use + * Boot, your application may start running before the address is + * configured. If you use Init, your application may receive + * Ieee154Address.changed() events before the boot sequence is + * complete. Pick your poison. + * + * @param PAN_ID The Personal Area Network ID to be assigned to the + * radio interface. + * + * @author Peter A. Bigot + */ + +generic configuration Ieee154OdiAddressC (uint16_t PAN_ID) { + provides interface Init; + uses interface Boot; +} +implementation { + components new Ieee154OdiAddressP(PAN_ID); + Boot = Ieee154OdiAddressP; + Init = Ieee154OdiAddressP; + + components Ieee154AddressC; + Ieee154OdiAddressP.Ieee154Address -> Ieee154AddressC; + + components DeviceIdentityC; + Ieee154OdiAddressP.DeviceIdentity -> DeviceIdentityC; +} diff --git a/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressP.nc b/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressP.nc new file mode 100644 index 0000000000..50ae18abd9 --- /dev/null +++ b/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressP.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Assign an 802.15.4 address based on a device identity. + * + * @param PAN_ID The Personal Area Network ID to be assigned to the + * radio interface. + * + * @author Peter A. Bigot + */ + +generic module Ieee154OdiAddressP (uint16_t PAN_ID) { + uses { + interface Boot; + interface Ieee154Address; + interface DeviceIdentity; + } + provides interface Init; +} +implementation { + + async event void Ieee154Address.changed () { } + + command error_t Init.init () { + const ieee_eui64_t* euip = call DeviceIdentity.getEui64(); + uint8_t iid[IEEE_EUI64_LENGTH]; + ieee154_saddr_t saddr; + + /* Create modified EUI64 for IID */ + memcpy(iid, euip->data, sizeof(iid)); + iid[0] |= 0x02; + + /* Low two octets read, converted to host byte order, form short address */ + saddr = ntohs(*(uint16_t*)(iid + 6)); + + call Ieee154Address.setAddress(PAN_ID, saddr); + return SUCCESS; + } + + event void Boot.booted () { + call Init.init(); + } +} diff --git a/tos/platforms/red/hardware/IPV6/Identity/odi.h b/tos/platforms/red/hardware/IPV6/Identity/odi.h new file mode 100644 index 0000000000..bdbcbac52c --- /dev/null +++ b/tos/platforms/red/hardware/IPV6/Identity/odi.h @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * OSIAN Device Identifier + * @author David Moss + * @author Peter Bigot + */ + +#ifndef OSIAN_odi_h +#define OSIAN_odi_h + +/* Constant class tag values */ +typedef enum ODI_Class_e { + ODI_CLS_Unregistered = 0, + ODI_CLS_Communications = 1, + ODI_CLS_Energy = 2, + // Class 3 is reserved + ODI_CLS_HealthAndSafety = 4, + // Class 5 is reserved + ODI_CLS_Environment = 6, + // Class 7 is reserved +} ODI_Class_e; + +#ifdef NESC +#define NX_(_t) nx_##_t +#else /* NESC */ +#define NX_(_t) _t +#endif /* NESC */ + +/** An ODI is the equivalent of an EUI-64, with extra information to + * help identify the functionality on the device. Note that, to be + * layout-compatible with the EUI-64, this must be a network-endian + * structure. */ +typedef NX_(struct) odi_t { + /** Organizationally unique identifier obtained from IANA */ + NX_(uint64_t) oui : 24; + + /** 1 bit reserved */ + NX_(uint64_t) reserved : 1; + + /** 1 if this device can sense something */ + NX_(uint64_t) sensor : 1; + + /** 1 if this device can control something */ + NX_(uint64_t) actuator : 1; + + /** The device class, one of ODI_Class_e */ + NX_(uint64_t) deviceClass : 3; + + /** The device type, defined in odi_types.h */ + NX_(uint64_t) deviceType : 10; + + /** The unique ID of this device instance */ + NX_(uint64_t) id : 24; + +} odi_t; + +typedef NX_(union) odi_u { + odi_t odi; + NX_(uint64_t) value; +} odi_u; + +/* Include the current set of defined devices */ +#include "odi_types.h" + +#endif /* OSIAN_odi_h */ diff --git a/tos/platforms/red/hardware/IPV6/Identity/odi_types.h b/tos/platforms/red/hardware/IPV6/Identity/odi_types.h new file mode 100644 index 0000000000..3721ad0824 --- /dev/null +++ b/tos/platforms/red/hardware/IPV6/Identity/odi_types.h @@ -0,0 +1,74 @@ +#ifndef OSIAN_odi_types_h +#define OSIAN_odi_types_h + +/* DO NOT EDIT: THIS FILE AUTOMATICALLY GENERATED BY genodi.py */ + +enum ODI_Environment_types_e { + /** This value must not be used by any hardware instance. It can be used + * as a wildcard to specify a device for which the identifier is + * temporarily unavailable. */ + ODI_ENV_Unknown = 0, + /** A value that can be used during development, prior to obtaining an + * assigned device type from OCG. */ + ODI_ENV_UnregisteredA = 1, + /** A value that can be used during development, prior to obtaining an + * assigned device type from OCG. In combination with UnregisteredA, this + * allows two in-development devices in the same category to be + * distinguished. */ + ODI_ENV_UnregisteredB = 2, + /** Unannounced People Power Company device */ + ODI_ENV_PPCEv3 = 3, +}; +enum ODI_Communications_types_e { + /** This value must not be used by any hardware instance. It can be used + * as a wildcard to specify a device for which the identifier is + * temporarily unavailable. */ + ODI_COMM_Unknown = 0, + /** A value that can be used during development, prior to obtaining an + * assigned device type from OCG. */ + ODI_COMM_UnregisteredA = 1, + /** A value that can be used during development, prior to obtaining an + * assigned device type from OCG. In combination with UnregisteredA, this + * allows two in-development devices in the same category to be + * distinguished. */ + ODI_COMM_UnregisteredB = 2, + /** A People Power Company SuRF (Sensor ultra Radio Frequency) developer + * board. */ + ODI_COMM_SuRF = 3, + /** Unannounced People Power Company device */ + ODI_COMM_PPCC4 = 4, +}; +enum ODI_Energy_types_e { + /** This value must not be used by any hardware instance. It can be used + * as a wildcard to specify a device for which the identifier is + * temporarily unavailable. */ + ODI_ENRG_Unknown = 0, + /** A value that can be used during development, prior to obtaining an + * assigned device type from OCG. */ + ODI_ENRG_UnregisteredA = 1, + /** A value that can be used during development, prior to obtaining an + * assigned device type from OCG. In combination with UnregisteredA, this + * allows two in-development devices in the same category to be + * distinguished. */ + ODI_ENRG_UnregisteredB = 2, + /** Unannounced People Power Company device */ + ODI_ENRG_PPCE3 = 3, + /** Unannounced People Power Company device */ + ODI_ENRG_PPCE4 = 4, +}; +enum ODI_HealthAndSafety_types_e { + /** This value must not be used by any hardware instance. It can be used + * as a wildcard to specify a device for which the identifier is + * temporarily unavailable. */ + ODI_HnS_Unknown = 0, + /** A value that can be used during development, prior to obtaining an + * assigned device type from OCG. */ + ODI_HnS_UnregisteredA = 1, + /** A value that can be used during development, prior to obtaining an + * assigned device type from OCG. In combination with UnregisteredA, this + * allows two in-development devices in the same category to be + * distinguished. */ + ODI_HnS_UnregisteredB = 2, +}; + +#endif /* OSIAN_odi_types_h */ diff --git a/tos/platforms/red/hardware/clock/PlatformClockC.nc b/tos/platforms/red/hardware/clock/PlatformClockC.nc new file mode 100644 index 0000000000..ad3798eaa4 --- /dev/null +++ b/tos/platforms/red/hardware/clock/PlatformClockC.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Top-level initialization of anything to do with the clock + * subsystem. + * + * @author Peter A. Bigot + */ + +configuration PlatformClockC { + provides interface Init; +} implementation { + components Msp430XV2ClockC; + components PlatformClockP; + PlatformClockP.SubInit -> Msp430XV2ClockC; + Init = PlatformClockP; +} diff --git a/tos/platforms/red/hardware/clock/PlatformClockP.nc b/tos/platforms/red/hardware/clock/PlatformClockP.nc new file mode 100644 index 0000000000..14f9f2f7b4 --- /dev/null +++ b/tos/platforms/red/hardware/clock/PlatformClockP.nc @@ -0,0 +1,144 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Top-level initialization of anything to do with the clock + * subsystem. + * + * We mostly use the standard initialization in Msp430XV2ClockControlP, + * except that we may or may not have an external 32kHz crystal populated. + * + * If the PLATFORM_MSP430_HAS_XT1 preprocessor symbol is undefined, or is defined + * to a non-zero value, the XIN and XOUT pins are configured to their + * XT1 function. The code loops up to 625ms waiting for XT1 + * stability. If stability is not achieved, the XT1 functionality is + * disabled. Stabilization appears to take roughly 150ms, for the one + * sample point I have available. + * + * If the PLATFORM_MSP430_HAS_XT1 preprocessor symbol is defined to zero, the XT1 + * functionality is left disabled per power-up, and no start-up delay + * is incurred. + * + * @author Peter A. Bigot + */ + +module PlatformClockP { + provides interface Init; + uses interface Init as SubInit; +} implementation { + + default command error_t SubInit.init () { } + + command error_t Init.init () { + +#if defined(PLATFORM_MSP430_HAS_XT1) && (0 == PLATFORM_MSP430_HAS_XT1) + /* Specifically told that there is no crystal. Do nothing. */ + +#else /* PLATFORM_MSP430_HAS_XT1 */ + + /* + * Either we don't know whether there's a crystal, or we've been + * told to expect one. Configure it and see whether a stable XT1 + * can be identified. If so, run with it; if not, restore the + * default configuration. + * + * If we were told there should be a crystal present, but it + * doesn't stabilize, this is probably an error, but can't do + * anything about it here. + */ + + /* + * Enable XT1, permanently, with no additional capacitance. + * + * @note Both 5.0 and 5.1 must be cleared in P5DIR. + * + * @note If the default capacitance of XCAP_3 is retained, SMCLK + * measures 4 per-mil faster than it should. On the SuRF + * hardware, setting XCAP to zero appears to work. Other values + * may be necessary on other hardware. + */ + + P5DIR &= ~(BIT0 | BIT1); + P5SEL |= (BIT0 | BIT1); + UCSCTL6 &= ~(XT1OFF | XCAP_3); + + /* + * Spin waiting for a stable signal. This loop runs somewhere + * between 10K and 20K times; if it gets to 65536 without success, + * assume the crystal's absent or broken. At the power-up DCO + * rate of 2MHz and no crystal, the loop takes 625ms to + * complete. + * + * @note The UCS module will fall back to REFOCLK if configured + * for LF-mode XT1 and XT1 is not stable. It does not, however, + * revert to XT1 upon stabilization: the UCS module documentation + * implies that OFIFG must be cleared for this to occur. + * Consequently, we have to wait for stabilization even if we + * "know" a crystal is present. + */ + + { + uint16_t ctr = 0; + do { + UCSCTL7 &= ~(XT1LFOFFG + DCOFFG); + SFRIFG1 &= ~OFIFG; + } while (++ctr && (SFRIFG1 & OFIFG)); + } + + /* + * If the XT1 signal is still not valid, disable it; otherwise, + * lower the power it uses. (XT1DRIVE setting suggested by TI + * example code.) + */ + + if (UCSCTL7 & XT1LFOFFG) { + P5DIR |= (BIT0 | BIT1); + P5SEL &= ~(BIT0| BIT1); + UCSCTL6 |= XT1OFF; + } else { + /* + * TI example code suggests clearing XT1DRIVE to reduce power. + * Current measurement does not indicate any value in doing so, + * at least not in LPM4, but it doesn't seem to hurt either. + */ + UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive + } + +#endif /* PLATFORM_MSP430_HAS_XT1 */ + + return call SubInit.init(); + } +} diff --git a/tos/platforms/red/hardware/leds/PlatformLed.h b/tos/platforms/red/hardware/leds/PlatformLed.h new file mode 100644 index 0000000000..7c823aabba --- /dev/null +++ b/tos/platforms/red/hardware/leds/PlatformLed.h @@ -0,0 +1,10 @@ +#ifndef _PLATFORM_RED_LED_H_ +#define _PLATFORM_RED_LED_H_ + +#define PLATFORM_LED_COUNT 3 + +#define PLATFORM_LED_RED 0 +#define PLATFORM_LED_GREEN 1 +#define PLATFORM_LED_BLUE 2 + +#endif // _PLATFORM_RED_LED_H_ diff --git a/tos/platforms/red/hardware/leds/PlatformLedC.nc b/tos/platforms/red/hardware/leds/PlatformLedC.nc new file mode 100644 index 0000000000..d3ab1e0f91 --- /dev/null +++ b/tos/platforms/red/hardware/leds/PlatformLedC.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * SuRF LED configuration. + * + * @note Traditionally, the PlatformLedsC component has exported named + * GeneralIO interfaces. We don't do that anymore; see PlatformLedsP + * for the rationale. + * + * @author Peter A. Bigot + */ + +configuration PlatformLedC { + provides { + interface Init; + interface Leds; + interface MultiLed; + interface Led[uint8_t led_id]; + } +} + +implementation { + components PlatformLedP; + Init = PlatformLedP.Init; + Leds = PlatformLedP; + Led = PlatformLedP; + MultiLed = PlatformLedP; +} diff --git a/tos/platforms/red/hardware/leds/PlatformLedP.nc b/tos/platforms/red/hardware/leds/PlatformLedP.nc new file mode 100644 index 0000000000..65aaab7896 --- /dev/null +++ b/tos/platforms/red/hardware/leds/PlatformLedP.nc @@ -0,0 +1,190 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implement the LED-relevant interfaces for the SuRF platform. + * + * Traditionally, the PlatformLedsC component has exported named + * GeneralIO interfaces, which are subsequently used in a LedsP + * implementation to support the Leds interface. Whether an LED is + * active-high or active-low is platform specific, and therefore + * should not be delegated to a supposedly platform-dependent + * component. + * + * We need to implement the LED functionality here. But we're in the + * platform-specific file, so we know we're using an MSP430. There's + * no point in trying to use generic GeneralIO interfaces to interact + * with the registers. Eliminating them, while using a table to + * identify LED positions, drops the code size by about 64 bytes and + * makes the interface cleaner. + * + * @author Peter A. Bigot + * @author Derek Baker + */ + +module PlatformLedP { + provides { + interface Init; + interface Leds; + } + provides { + interface Led[uint8_t led_id]; + interface MultiLed; + } +} +implementation { + +#include "PlatformLed.h" + + /** + * Layout of the relevant portions of an MSP430XV2 digital IO port + * bank. + */ + typedef struct port_t { + uint16_t pxin; /* 0x00: Input */ + uint16_t pxout; /* 0x02: Output */ + uint16_t pxdir; /* 0x04: Direction */ + uint16_t pxren; /* 0x06: Resistor Enable */ + uint16_t pxds; /* 0x08: Drive Strength */ + uint16_t pxsel; /* 0x0A: Port Select */ + } port_t; + + /** Required information to specify a digital pin that controls an LED */ + typedef struct led_t { + volatile port_t* port; + uint16_t bit; + } led_t; + + /* + * @TODO@ When msp430-libc is corrected, reference PAIN and PBIN, to + * make it more clear that we're operating on the 16-bit interface + * to the ports. + */ + const static led_t leds[] = { + { (port_t*)P3IN_, 1 << 0 }, // Red + { (port_t*)P3IN_, 1 << 1 }, // Green + { (port_t*)P3IN_, 1 << 2 }, // Blue + }; + static const int nleds = sizeof(leds) / sizeof(*leds); + + command error_t Init.init() { + atomic { + int li; + + for (li = 0; li < nleds; ++li) { + const led_t* lp = leds + li; + lp->port->pxout &= ~lp->bit; + lp->port->pxdir |= lp->bit; + } + } + return SUCCESS; + } + + void _LEDon (uint8_t led_id) { + if (led_id < nleds) { + const led_t* lp = leds + led_id; + atomic lp->port->pxout |= lp->bit; + } + } + + void _LEDoff (uint8_t led_id) { + if (led_id < nleds) { + const led_t* lp = leds + led_id; + atomic lp->port->pxout &= ~lp->bit; + } + } + + void _LEDtoggle (uint8_t led_id) { + if(led_id < nleds) { + const led_t* lp = leds + led_id; + atomic lp->port->pxout ^= lp->bit; + } + } + + unsigned int _LEDread () { + unsigned int val = 0; + int li; + for (li = 0; li < nleds; ++li) { + const led_t* lp = leds + li; + val |= (!! (lp->port->pxout & lp->bit)) << li; + } + return val; + } + + void _LEDwrite (unsigned int value) { + int li; + for (li = 0; li < nleds; ++li) { + if (value & (1 << li)) { + _LEDon(li); + } else { + _LEDoff(li); + } + } + } + + /* + * I don't think we'd save much space by not implementing the legacy + * interface always, so rather than complicate compilation let's + * always support it. + */ + async command void Leds.led0Off () { _LEDoff(0); } + async command void Leds.led0On () { _LEDon(0); } + async command void Leds.led0Toggle () { _LEDtoggle(0); } + async command void Leds.led1Off () { _LEDoff(1); } + async command void Leds.led1On () { _LEDon(1); } + async command void Leds.led1Toggle () { _LEDtoggle(1); } + async command void Leds.led2Off () { _LEDoff(2); } + async command void Leds.led2On () { _LEDon(2); } + async command void Leds.led2Toggle () { _LEDtoggle(2); } + async command uint8_t Leds.get () { return _LEDread(); } + async command void Leds.set (uint8_t v) { _LEDwrite(v); } + + async command unsigned int MultiLed.get () { return _LEDread(); } + async command void MultiLed.set (unsigned int value) { _LEDwrite(value); } + async command void MultiLed.on (unsigned int led_id) { _LEDon(led_id); } + async command void MultiLed.off (unsigned int led_id) { _LEDoff(led_id); } + async command void MultiLed.setSingle (unsigned int led_id, bool on) { + if (on) { _LEDon(led_id); } + else { _LEDoff(led_id); } + } + + async command void MultiLed.toggle (unsigned int led_id) { _LEDtoggle(led_id); } + async command void Led.on[uint8_t led_id] () { call MultiLed.on(led_id); } + async command void Led.off[uint8_t led_id] () { call MultiLed.off(led_id); } + async command void Led.set[uint8_t led_id] (bool on) { call MultiLed.setSingle(led_id, on); } + async command void Led.toggle[uint8_t led_id] () { call MultiLed.toggle(led_id); } +} diff --git a/tos/platforms/red/hardware/pins/PlatformPinsC.nc b/tos/platforms/red/hardware/pins/PlatformPinsC.nc new file mode 100644 index 0000000000..4d32815649 --- /dev/null +++ b/tos/platforms/red/hardware/pins/PlatformPinsC.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +configuration PlatformPinsC { + provides { + interface Init; + } +} + +implementation { + components PlatformPinsP; + Init = PlatformPinsP; +} diff --git a/tos/platforms/red/hardware/pins/PlatformPinsP.nc b/tos/platforms/red/hardware/pins/PlatformPinsP.nc new file mode 100644 index 0000000000..f91ab73952 --- /dev/null +++ b/tos/platforms/red/hardware/pins/PlatformPinsP.nc @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformPinsP { + provides { + interface Init; + } +} + +implementation { + + command error_t Init.init() { + atomic { + +#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) + P1DIR = 0xFF; + P1OUT = 0x0; +#endif + +#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) + P2DIR = 0xFF; + P2OUT = 0x0; +#endif + +#if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) + P3DIR = 0xFF; + P3OUT = 0x0; +#endif + +#if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__) + P4DIR = 0xFF; + P4OUT = 0x0; +#endif + +#if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) + P5DIR = 0xFF; + P5OUT = 0x0; +#endif + +#if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__) + P6DIR = 0xFF; + P6OUT = 0x0; +#endif + +#if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) + P7DIR = 0xFF; + P7OUT = 0x0; +#endif + +#if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) + P8DIR = 0xFF; + P8OUT = 0x0; +#endif + +#if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) + P9DIR = 0xFF; + P9OUT = 0x0; +#endif + +#if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) + P10DIR = 0xFF; + P10OUT = 0x0; +#endif + +#if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) + P11DIR = 0xFF; + P11OUT = 0x0; +#endif + +#if defined(__msp430_have_portJ) || defined(__MSP430_HAS_PORTJ__) || defined(__MSP430_HAS_PORTJ_R__) + PJDIR = 0xFF; + PJOUT = 0x0; +#endif + +#if 0 /* Disabled: these specific setting sare defaults, but others might not be */ + PMAPPWD = PMAPPW; // Get write-access to port mapping regs + P1MAP5 = PM_UCA0RXD; // Map UCA0RXD output to P1.5 + P1MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6 + PMAPPWD = 0; // Lock port mapping registers +#endif // + + } + return SUCCESS; + } +} diff --git a/tos/platforms/red/hardware/radio/RadioChannelC.nc b/tos/platforms/red/hardware/radio/RadioChannelC.nc new file mode 100644 index 0000000000..75fb526e50 --- /dev/null +++ b/tos/platforms/red/hardware/radio/RadioChannelC.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Abstraction layer for setting and getting the radio channel + * @author David Moss + */ + +configuration RadioChannelC { + provides { + interface Channel; + } +} +implementation { + + components RadioChannelP; + Channel = RadioChannelP; + + components Rf1aIeee154MessageC as MsgC; + RadioChannelP.Rf1aPhysical -> MsgC; +} diff --git a/tos/platforms/red/hardware/radio/RadioChannelP.nc b/tos/platforms/red/hardware/radio/RadioChannelP.nc new file mode 100644 index 0000000000..c63456d937 --- /dev/null +++ b/tos/platforms/red/hardware/radio/RadioChannelP.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +module RadioChannelP { + provides { + interface Channel; + } + uses { + interface Rf1aPhysical; + } +} + +implementation { + + /***************** Channel Commands ****************/ + command uint8_t Channel.getMinimumChannel() { + return RF1A_CHANNEL_MIN; + } + + command uint8_t Channel.getMaximumChannel() { + return RF1A_CHANNEL_MAX; + } + + command uint8_t Channel.getTotalChannels() { + return RF1A_CHANNEL_MAX - RF1A_CHANNEL_MIN + 1; + } + + command void Channel.setChannel(uint8_t channel) { + call Rf1aPhysical.setChannel(channel); + } + + command uint8_t Channel.getChannel() { + return call Rf1aPhysical.getChannel(); + } + + async event void Rf1aPhysical.sendDone (int result) { } + async event void Rf1aPhysical.receiveStarted (unsigned int length) { } + async event void Rf1aPhysical.receiveDone (uint8_t* buffer, + unsigned int count, + int result) { } + async event void Rf1aPhysical.receiveBufferFilled (uint8_t* buffer, + unsigned int count) { } + async event void Rf1aPhysical.frameStarted () { } + async event void Rf1aPhysical.clearChannel () { } + async event void Rf1aPhysical.carrierSense () { } + async event void Rf1aPhysical.released () { } +} diff --git a/tos/platforms/red/hardware/radio/RadioRssiC.nc b/tos/platforms/red/hardware/radio/RadioRssiC.nc new file mode 100644 index 0000000000..85673deb86 --- /dev/null +++ b/tos/platforms/red/hardware/radio/RadioRssiC.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Abstraction layer for getting the RSSI and producing a random number + * based on the Radio's RSSI + * + * @author David Moss + */ + +configuration RadioRssiC { + provides { + interface Get; + interface Random; + } + uses { + interface Rf1aPhysical; + } +} + +implementation { + + components RadioRssiP; + Rf1aPhysical = RadioRssiP; + Get = RadioRssiP; + + components RandomC; + Random = RandomC; +} diff --git a/tos/platforms/red/hardware/radio/RadioRssiP.nc b/tos/platforms/red/hardware/radio/RadioRssiP.nc new file mode 100644 index 0000000000..0e5715b984 --- /dev/null +++ b/tos/platforms/red/hardware/radio/RadioRssiP.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +module RadioRssiP { + provides interface Get; + uses interface Rf1aPhysical; +} implementation { + + command int8_t Get.get () { + int rssi = call Rf1aPhysical.rssi_dBm(); + if (rssi < -128) { + rssi = -128; + } + return rssi; + } + + async event void Rf1aPhysical.sendDone (int result) { } + async event void Rf1aPhysical.receiveStarted (unsigned int length) { } + async event void Rf1aPhysical.receiveDone (uint8_t* buffer, + unsigned int count, + int result) { } + async event void Rf1aPhysical.receiveBufferFilled (uint8_t* buffer, + unsigned int count) { } + async event void Rf1aPhysical.frameStarted () { } + async event void Rf1aPhysical.clearChannel () { } + async event void Rf1aPhysical.carrierSense () { } + async event void Rf1aPhysical.released () { } +} diff --git a/tos/platforms/red/hardware/radio/rfa1-red.h b/tos/platforms/red/hardware/radio/rfa1-red.h new file mode 100644 index 0000000000..82bd628b44 --- /dev/null +++ b/tos/platforms/red/hardware/radio/rfa1-red.h @@ -0,0 +1,63 @@ +/* Deviation = 126.953125 */ +/* Base frequency = 867.999939 */ +/* Carrier frequency = 867.999939 */ +/* Channel number = 0 */ +/* Carrier frequency = 867.999939 */ +/* Modulated = true */ +/* Modulation format = 2-GFSK */ +/* Manchester enable = false */ +/* Sync word qualifier mode = 30/32 sync word bits detected */ +/* Preamble count = 4 */ +/* Channel spacing = 199.951172 */ +/* Carrier frequency = 867.999939 */ +/* Data rate = 249.939 */ +/* RX filter BW = 541.666667 */ +/* Data format = Normal mode */ +/* Length config = Variable packet length mode. Packet length configured by the first byte after sync word */ +/* CRC enable = true */ +/* Packet length = 255 */ +/* Device address = 0 */ +/* Address config = No address check */ +/* CRC autoflush = false */ +/* PA ramping = false */ +/* TX power = 0 */ + +/* PA table */ +#define PA_TABLE {0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + + +#define SMARTRF_SETTING_FSCTRL1 0x0C +#define SMARTRF_SETTING_IOCFG0 0x06 +#define SMARTRF_SETTING_FSCTRL0 0x00 +#define SMARTRF_SETTING_FREQ2 0x21 +#define SMARTRF_SETTING_FREQ1 0x62 +#define SMARTRF_SETTING_FREQ0 0x76 +#define SMARTRF_SETTING_MDMCFG4 0x2D +#define SMARTRF_SETTING_MDMCFG3 0x3B +#define SMARTRF_SETTING_MDMCFG2 0x93 +#define SMARTRF_SETTING_MDMCFG1 0x22 +#define SMARTRF_SETTING_MDMCFG0 0xF8 +#define SMARTRF_SETTING_CHANNR 0x00 +#define SMARTRF_SETTING_DEVIATN 0x62 +#define SMARTRF_SETTING_FREND1 0xB6 +#define SMARTRF_SETTING_FREND0 0x10 +#define SMARTRF_SETTING_MCSM0 0x10 +#define SMARTRF_SETTING_FOCCFG 0x1D +#define SMARTRF_SETTING_BSCFG 0x1C +#define SMARTRF_SETTING_AGCCTRL2 0xC7 +#define SMARTRF_SETTING_AGCCTRL1 0x00 +#define SMARTRF_SETTING_AGCCTRL0 0xB0 +#define SMARTRF_SETTING_FSCAL3 0xEA +#define SMARTRF_SETTING_FSCAL2 0x2A +#define SMARTRF_SETTING_FSCAL1 0x00 +#define SMARTRF_SETTING_FSCAL0 0x1F +#define SMARTRF_SETTING_FSTEST 0x59 +#define SMARTRF_SETTING_TEST2 0x88 +#define SMARTRF_SETTING_TEST1 0x31 +#define SMARTRF_SETTING_TEST0 0x09 +#define SMARTRF_SETTING_FIFOTHR 0x07 +#define SMARTRF_SETTING_IOCFG2 0x29 +#define SMARTRF_SETTING_PKTCTRL1 0x04 +#define SMARTRF_SETTING_PKTCTRL0 0x05 +#define SMARTRF_SETTING_ADDR 0x00 +#define SMARTRF_SETTING_PKTLEN 0xFF diff --git a/tos/platforms/red/hardware/usci/PlatformI2CC.nc b/tos/platforms/red/hardware/usci/PlatformI2CC.nc new file mode 100644 index 0000000000..707a73b6da --- /dev/null +++ b/tos/platforms/red/hardware/usci/PlatformI2CC.nc @@ -0,0 +1,17 @@ +configuration PlatformI2CC { + provides { + interface StdControl; + interface I2CPacket; + interface Msp430UsciError; + } +} +implementation { + components PlatformI2CP; + StdControl = PlatformI2CP; + + components new Msp430UsciI2CB0C() as I2CC; + + I2CPacket = I2CC; + Msp430UsciError = I2CC; + PlatformI2CP.Resource -> I2CC.Resource; +} diff --git a/tos/platforms/red/hardware/usci/PlatformI2CP.nc b/tos/platforms/red/hardware/usci/PlatformI2CP.nc new file mode 100644 index 0000000000..6ba12fcae3 --- /dev/null +++ b/tos/platforms/red/hardware/usci/PlatformI2CP.nc @@ -0,0 +1,16 @@ +module PlatformI2CP { + provides interface StdControl; + uses interface Resource; +} +implementation { + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop(){ + return call Resource.release(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/red/hardware/usci/PlatformSerialC.nc b/tos/platforms/red/hardware/usci/PlatformSerialC.nc new file mode 100644 index 0000000000..aa3027a66a --- /dev/null +++ b/tos/platforms/red/hardware/usci/PlatformSerialC.nc @@ -0,0 +1,19 @@ +configuration PlatformSerialC { + provides { + interface StdControl; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} +implementation { + components PlatformSerialP; + StdControl = PlatformSerialP; + + components new Msp430UsciUartA0C() as UartC; + + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + PlatformSerialP.Resource -> UartC.Resource; +} diff --git a/tos/platforms/red/hardware/usci/PlatformSerialP.nc b/tos/platforms/red/hardware/usci/PlatformSerialP.nc new file mode 100644 index 0000000000..066a8a42bf --- /dev/null +++ b/tos/platforms/red/hardware/usci/PlatformSerialP.nc @@ -0,0 +1,15 @@ +module PlatformSerialP { + provides interface StdControl; + uses interface Resource; +} +implementation { + command error_t StdControl.start() { + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop() { + return call Resource.release(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/red/hardware/usci/PlatformUsciInitC.nc b/tos/platforms/red/hardware/usci/PlatformUsciInitC.nc new file mode 100644 index 0000000000..e9b8b6efca --- /dev/null +++ b/tos/platforms/red/hardware/usci/PlatformUsciInitC.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Connect the appropriate pins for USCI support on a CC430. + * + * @author Peter A. Bigot + * @author Derek Baker + */ + +configuration PlatformUsciInitC { +} +implementation { + components HplMsp430GeneralIOC as GIO; + + components Msp430UsciUartA0P as UartA0C; + UartA0C.URXD -> GIO.UCA0RXD; + UartA0C.UTXD -> GIO.UCA0TXD; + +// components Msp430UsciSpiB0P as SpiB0C; +// SpiB0C.SIMO -> GIO.UCB0SIMO; +// SpiB0C.SOMI -> GIO.UCB0SOMI; +// SpiB0C.CLK -> GIO.UCB0CLK; + + components Msp430UsciI2CB0P as I2CB0C; + I2CB0C.SCL -> GIO.UCB0SCL; + I2CB0C.SDA -> GIO.UCB0SDA; +} diff --git a/tos/platforms/red/platform.h b/tos/platforms/red/platform.h new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tos/platforms/red/platform_message.h b/tos/platforms/red/platform_message.h new file mode 100644 index 0000000000..67df30cbb8 --- /dev/null +++ b/tos/platforms/red/platform_message.h @@ -0,0 +1,24 @@ + +/** + * @author Philip Levis + * @author David Moss + * @author Peter A. Bigot + */ + +#ifndef PLATFORM_MESSAGE_H +#define PLATFORM_MESSAGE_H + +#include "Rf1aPacket.h" + +typedef union message_header { + rf1a_ieee154_t rf1a_ieee154; +} message_header_t; + +typedef union TOSRadioFooter { +} message_footer_t; + +typedef union TOSRadioMetadata { + rf1a_metadata_t rf1a; +} message_metadata_t; + +#endif From ce1ec14cd48fa2b2780331b620be6dbb6e78a29b Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Wed, 6 Jul 2011 22:06:16 -0700 Subject: [PATCH 139/411] update red/.platform, onewire, wdt, crc16, etc. hardware/onewire --- tos/platforms/red/.platform | 7 ++ .../red/hardware/onewire/PlatformOneWireC.nc | 64 +++++++++++++++++++ .../hardware/onewire/PlatformOneWireInitC.nc | 60 +++++++++++++++++ .../hardware/onewire/PlatformOneWireInitP.nc | 56 ++++++++++++++++ 4 files changed, 187 insertions(+) create mode 100644 tos/platforms/red/hardware/onewire/PlatformOneWireC.nc create mode 100644 tos/platforms/red/hardware/onewire/PlatformOneWireInitC.nc create mode 100644 tos/platforms/red/hardware/onewire/PlatformOneWireInitP.nc diff --git a/tos/platforms/red/.platform b/tos/platforms/red/.platform index 817f01102f..03f50bd27e 100644 --- a/tos/platforms/red/.platform +++ b/tos/platforms/red/.platform @@ -8,6 +8,7 @@ for (split(/\n/, <<'EOText' %P/hardware/pins %P/hardware/leds %P/hardware/usci + %P/hardware/onewire %P/hardware/radio %P/hardware/clock %P/hardware/IPV6/Identity @@ -24,6 +25,12 @@ for (split(/\n/, <<'EOText' %T/chips/msp430/pmm %T/chips/msp430/adc12 %T/chips/msp430/sensors + %T/chips/msp430/wdt + %T/chips/msp430/rtc + %T/chips/msp430/flash/settings + %T/chips/msp430/flash/driver + %T/chips/msp430/flash/constants + %T/chips/msp430/crc16 %T/chips/msp430/rf1a %T/chips/msp430/rf1a/interfaces diff --git a/tos/platforms/red/hardware/onewire/PlatformOneWireC.nc b/tos/platforms/red/hardware/onewire/PlatformOneWireC.nc new file mode 100644 index 0000000000..91d58e62c8 --- /dev/null +++ b/tos/platforms/red/hardware/onewire/PlatformOneWireC.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Platform hardware presentation layer for the DS24xx one-wire chip + * @author David Moss + */ + +configuration PlatformOneWireC { + provides { + interface OneWire as PrimaryOneWire; + interface Read as TemperatureCC; + } +} + +implementation { + components PlatformOneWireInitC; + + /* SuRF boards use a DS1825 as the primary one-wire device. This + * happens to also provide the ambient temperature. */ + + components new OneWireMasterC() as Ds1825MasterC; + components new Msp430GpioC() as Ds1825PinC; + Ds1825MasterC.Pin -> Ds1825PinC; + Ds1825PinC -> PlatformOneWireInitC.Ds1825IO; + + components new Ds1825OneWireImplementationC() as Ds1825ImplC; + PrimaryOneWire = Ds1825ImplC; + TemperatureCC = Ds1825ImplC; + Ds1825ImplC.OneWireMaster -> Ds1825MasterC; +} diff --git a/tos/platforms/red/hardware/onewire/PlatformOneWireInitC.nc b/tos/platforms/red/hardware/onewire/PlatformOneWireInitC.nc new file mode 100644 index 0000000000..4974093006 --- /dev/null +++ b/tos/platforms/red/hardware/onewire/PlatformOneWireInitC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Platform hardware presentation layer for the DS1825 one-wire chip + * @author David Moss + */ + +configuration PlatformOneWireInitC { + provides { + interface Init; + interface HplMsp430GeneralIO as Ds1825IO; + } +} implementation { + + components PlatformOneWireInitP; + Init = PlatformOneWireInitP; + + components HplMsp430GeneralIOC as GeneralIOC; +#if defined(SURF_REV_A) + Ds1825IO = GeneralIOC.Port35; + PlatformOneWireInitP.Ds1825IO -> GeneralIOC.Port35; +#else + Ds1825IO = GeneralIOC.Port37; + PlatformOneWireInitP.Ds1825IO -> GeneralIOC.Port37; +#endif +} diff --git a/tos/platforms/red/hardware/onewire/PlatformOneWireInitP.nc b/tos/platforms/red/hardware/onewire/PlatformOneWireInitP.nc new file mode 100644 index 0000000000..04e4ae3fee --- /dev/null +++ b/tos/platforms/red/hardware/onewire/PlatformOneWireInitP.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + */ + +module PlatformOneWireInitP { + provides { + interface Init; + } + uses { + interface HplMsp430GeneralIO as Ds1825IO; + } +} + +implementation { + command error_t Init.init() { + call Ds1825IO.setResistor(MSP430_PORT_RESISTOR_OFF); + call Ds1825IO.makeInput(); + return SUCCESS; + } +} From 409b88517ced7033e837872b331c1782d8455b1f Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Wed, 6 Jul 2011 22:16:32 -0700 Subject: [PATCH 140/411] mv red/hardware/radio/rfa1-red.h -> smartrf/CUSTOM.h --- tos/platforms/red/hardware/radio/{rfa1-red.h => smartrf/CUSTOM.h} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename tos/platforms/red/hardware/radio/{rfa1-red.h => smartrf/CUSTOM.h} (100%) diff --git a/tos/platforms/red/hardware/radio/rfa1-red.h b/tos/platforms/red/hardware/radio/smartrf/CUSTOM.h similarity index 100% rename from tos/platforms/red/hardware/radio/rfa1-red.h rename to tos/platforms/red/hardware/radio/smartrf/CUSTOM.h From eca421e04a00a8f44d2636edd648a0645d26f8b9 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Wed, 6 Jul 2011 22:43:27 -0700 Subject: [PATCH 141/411] Move app I2CMaster to I2C --- apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/I2CAppC.nc | 0 apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/I2CP.nc | 0 apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/Makefile | 0 apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/README | 0 4 files changed, 0 insertions(+), 0 deletions(-) rename apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/I2CAppC.nc (100%) rename apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/I2CP.nc (100%) rename apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/Makefile (100%) rename apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/README (100%) diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc b/apps/tests/msp430/x5xxx/usci/I2C/I2CAppC.nc similarity index 100% rename from apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc rename to apps/tests/msp430/x5xxx/usci/I2C/I2CAppC.nc diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc b/apps/tests/msp430/x5xxx/usci/I2C/I2CP.nc similarity index 100% rename from apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc rename to apps/tests/msp430/x5xxx/usci/I2C/I2CP.nc diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile b/apps/tests/msp430/x5xxx/usci/I2C/Makefile similarity index 100% rename from apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile rename to apps/tests/msp430/x5xxx/usci/I2C/Makefile diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/README b/apps/tests/msp430/x5xxx/usci/I2C/README similarity index 100% rename from apps/tests/msp430/x5xxx/usci/I2CMaster/README rename to apps/tests/msp430/x5xxx/usci/I2C/README From c63f208df8bb383bc69c9d7f49195719af27c01f Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Thu, 7 Jul 2011 11:12:32 -0700 Subject: [PATCH 142/411] simple red.target tweaks from osian work --- support/make/red.target | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/support/make/red.target b/support/make/red.target index cf174a0394..6e3baaf517 100644 --- a/support/make/red.target +++ b/support/make/red.target @@ -1,11 +1,15 @@ #-*-Makefile-*- vim:syntax=make -#$Id$ PLATFORM ?= red + +#OPTFLAGS += -O + MSP_MCU = cc430x5137 IAR_MCU_GROUP = cc430x513x IAR_LINKER_XCL = lnkcc430F5137.xcl + +# $(call TOSMake_include_platform,red) $(call TOSMake_include_platform,msp) red: $(BUILD_DEPS) From 81632f78c6400a19622b2326641a12ff9811e3ce Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Thu, 7 Jul 2011 11:14:07 -0700 Subject: [PATCH 143/411] add osian.extra and redosian.extra --- support/make/osian.extra | 43 +++++++++++++++++++++++++++++++++++++ support/make/redosian.extra | 43 +++++++++++++++++++++++++++++++++++++ 2 files changed, 86 insertions(+) create mode 100644 support/make/osian.extra create mode 100644 support/make/redosian.extra diff --git a/support/make/osian.extra b/support/make/osian.extra new file mode 100644 index 0000000000..611cffaa78 --- /dev/null +++ b/support/make/osian.extra @@ -0,0 +1,43 @@ +# Add the paths required to build an OSIAN application +PFLAGS += -DWITH_OSIAN + +# set this option for small devices cc430f5137 has limited RAM, +# PPP_MAXIMUN_MRU defaults to 1280 +PFLAGS += -DPPP_MAXIMUM_MRU=512 + +# Non-TinyOS OSIAN material +PFLAGS += -I$(TOSROOT)/support/sdk/c/osian/include + +# OSIAN-specific interfaces - not sure if it should be is a sub directory??? +PFLAGS += -I$(TOSDIR)/interfaces/osian + +# OSIAN general components - again not sure this should be here???? +PFLAGS += -I$(TOSDIR)/system/osian + +# PPP support - use mainline ppp (came from osian) +PFLAGS += -I$(TOSDIR)/lib/ppp + +# OSIAN network support +PFLAGS += -I$(TOSDIR)/lib/net/oip +PFLAGS += -I$(TOSDIR)/lib/net/oip/net +PFLAGS += -I$(TOSDIR)/lib/net/oip/services + +# need to see what is common with msp430-int branch +# PFLAGS += -I$(TOSDIR)/lib/osian/leds doesn't exist +PFLAGS += -I$(TOSDIR)/lib/osian/utils/average +PFLAGS += -I$(TOSDIR)/lib/osian/utils/crcx +PFLAGS += -I$(TOSDIR)/lib/osian/utils/ewma +PFLAGS += -I$(TOSDIR)/lib/osian/debug +PFLAGS += -I$(TOSDIR)/lib/osian/lpm +PFLAGS += -I$(TOSDIR)/lib/osian/rtc +PFLAGS += -I$(TOSDIR)/lib/osian/timer + +PFLAGS += -I$(TOSDIR)/lib/fragpool + +# identity uses onewire to get an OID id from a eeprom, this needs to be removed. +# we dont all have eeproms connected via onewire, +# maybe a #define like the rest of the address??? + +PFLAGS += -I$(TOSDIR)/lib/osian/identity +PFLAGS += -I$(TOSDIR)/chips/msp430/onewire +PFLAGS += -I$(TOSDIR)/chips/msp430/onewire/ds1825 diff --git a/support/make/redosian.extra b/support/make/redosian.extra new file mode 100644 index 0000000000..bc9035ecd1 --- /dev/null +++ b/support/make/redosian.extra @@ -0,0 +1,43 @@ +# Add the paths required to build an OSIAN application +PFLAGS += -DWITH_OSIAN + +# set this option for small devices cc430f5137 has limited RAM, +# PPP_MAXIMUN_MRU defaults to 1280 +PFLAGS += -DPPP_MAXIMUM_MRU=512 + +# Non-TinyOS OSIAN material +PFLAGS += -I$(TOSROOT)/support/sdk/c/osian/include + +# OSIAN-specific interfaces - not sure if it should be is a sub directory??? +PFLAGS += -I$(TOSDIR)/interfaces/osian + +# OSIAN general components - again not sure this should be here???? +PFLAGS += -I$(TOSDIR)/system/osian + +# PPP support - use mainline ppp (came from osian) +PFLAGS += -I$(TOSDIR)/lib/ppp + +# OSIAN network support +PFLAGS += -I$(TOSDIR)/lib/net/oip +PFLAGS += -I$(TOSDIR)/lib/net/oip/net +PFLAGS += -I$(TOSDIR)/lib/net/oip/services + +# need to see what is common with msp430-int branch +# PFLAGS += -I$(TOSDIR)/lib/osian/leds doesn't exist +PFLAGS += -I$(TOSDIR)/lib/osian/utils/average +PFLAGS += -I$(TOSDIR)/lib/osian/utils/crcx +PFLAGS += -I$(TOSDIR)/lib/osian/utils/ewma +PFLAGS += -I$(TOSDIR)/lib/osian/debug +PFLAGS += -I$(TOSDIR)/lib/osian/lpm +PFLAGS += -I$(TOSDIR)/lib/osian/rtc +PFLAGS += -I$(TOSDIR)/lib/osian/timer + +PFLAGS += -I$(TOSDIR)/lib/fragpool + +# identity uses onewire to get an OID id from a eeprom, this needs to be removed. +# we dont all have eeproms connected via onewire, +# maybe a #define like the rest of the address??? + +# PFLAGS += -I$(TOSDIR)/lib/osian/identity +# PFLAGS += -I$(TOSDIR)/chips/msp430/onewire +# PFLAGS += -I$(TOSDIR)/chips/msp430/onewire/ds1825 From ee6e10275ae0cf7ac2ff3a056ca3b8bc62b43618 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Thu, 7 Jul 2011 11:16:28 -0700 Subject: [PATCH 144/411] switch tos/lib/serialprintf to tos/lib/printf --- tos/platforms/surf/.platform | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/platforms/surf/.platform b/tos/platforms/surf/.platform index 78ddb58cb0..504e535e7f 100644 --- a/tos/platforms/surf/.platform +++ b/tos/platforms/surf/.platform @@ -46,7 +46,7 @@ for (split(/\n/, <<'EOText' %T/lib/util/keyvaluerecord %T/lib/serial - %T/lib/serialprintf + %T/lib/printf EOText )) { From f58b3fb5c0b4837d4c8328423a0550dd245eef19 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 7 Jul 2011 11:28:53 -0700 Subject: [PATCH 145/411] better commentary about what commit messages should look like --- 00_Getting_Started | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/00_Getting_Started b/00_Getting_Started index db172a73a2..9d4ed23cd1 100644 --- a/00_Getting_Started +++ b/00_Getting_Started @@ -275,13 +275,13 @@ redacted)... the first line (50 chars or less) is used as the short message. This message is displayed in one line logs and other places. Make it - meaningful. + meaningful and concise if possible. - The rest of the commit message should provide more detailed information - about what the commit does. The GIT project itself requires motivation - as well as contrasting the new behaviour to old behaviour. Why was this - change necessary. Its not a bad habit to get into when it makes sense - to do so. + Follow the first line by a blank line then a more detailed message which + should provide more detailed information about what the commit does. The + GIT project itself requires motivation as well as contrasting the new + behaviour to old behaviour. Why was this change necessary? Its not a + bad habit to get into when it makes sense to do so. o Use the imperative present tense when writing commit messages. From 62ec66a8e3a6561e95b671069c0d39b3a6c084ee Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 7 Jul 2011 11:29:32 -0700 Subject: [PATCH 146/411] update merge status (db, jg -> msp430-int-pu), (db -> osian-int) last jg merge 4a9a429 (2011-06-27) last db merge c5cb9cb (2011-07-06) --- 12_Merge_Notes | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/12_Merge_Notes b/12_Merge_Notes index 6a8f92bcf5..22b5835dac 100644 --- a/12_Merge_Notes +++ b/12_Merge_Notes @@ -1,4 +1,83 @@ + +GitHub merging status: +(last updated: 2011-07-06) + +Incoming branches: +------------------------------------------------------- +20110703 (jg/jg) github.com/kadway/jg -> msp430-int-pu + +20110706 (db/db) github.com/derekbaker/db -> msp430-int-pu +20110706 (db/db) github.com/derekbaker/db -> osian-int + +jg/jg msp430-int-pu +-------------------------------------------------- ------------------------------------------------------ +4a9a429 Added my platform files bf144b4 msp430: platform files for MoteISTx5 + +5250be4 HplMsp430GeneralIOC.nc ports 7,8,9,10,11 df4f40e msp430: pin defs Port 7, 8, 9, 10, 11 + a12d515 + ab25ced (msp430-int-svn) + 9d34ae2 (msp430-int-svn) + +4b415bb HplMsp430GeneralI0C Msp430TimerCommonP 363d8ce fix interrupt vectors x5 T0B7 and T2A3 timers + +8e10f50 SpiPacket.send command in Msp430UsciSpiP. fe69543 msp430(x5/spi): add SpiPacket.send + 2620627 (msp430-int-svn) + + + +db/db msp430-int-pu osian-int +-------------------------------------------------- ------------------------------------------------------ +c5cb9cb Made changes to allow remote node to be accessed from a remote network via the OSIAN PppBridge + [osian-int 057d2ae] Kludge simple bridging for OSIAN + PppBridge (not linklocal/sitelocal addr) + +5925289 Merged msp430-int-pu into db, take advantage of ieee154 changes (done in previous) +ca03679 Merge branch 'msp430-int-pu' of git://github.com/tp-freeforall/prod into db (not needed) + +58eb61d Removed osian lib/serialprintf, osian now uses tested and working lib/printf + [msp430-int-pu ee6e102] switch tos/lib/serialprintf to tos/lib/printf + [osian-int 03bc3c6] switch tos/lib/serialprintf to tos/lib/printf + +f4cc5ce Removed OSIAN's own ppp demon lib/osian/ppp and lib/osian/utils/fragpool + [osian-int 325571c] Red (DB branch) Osian tweaks. + [msp430-int-pu 81632f7] add osian.extra and redosian.extra + +4fd3f82 Removed .cache directory in I2C test directory (mistake) (done in previous) +3dc75d5 Merge branch 'msp430-int-pu' of git://github.com/tp-freeforall/prod into db (not needed) + +71342dc Added a simple Test/Demo of I2C for msp430 x5xxx eca421e move from I2CMaster to I2C + +619ee42 Merge remote-tracking branch 'up/msp430-int-pu' into db (not needed) +b0125b2 A Bit of cleaning up, removed duplicated osian stuff (done in previous) + +b99d800 Remove the onewire dep [osian-int 35bb447] Add redosian (red osian) extra for make + +18fa960 msp430-int with osian, db branch (split) [osian-int 55fd4f3] Bring OSIAN OIP (IPv6) code + into osian-int branch + (osian code, some red code), osian -> osian-int, red -> msp430-int-pu + (nuke onewire, already in as msp430/onewire) + (nuke tos/lib/osian/ppp, in tos/lib/ppp) + (nuke tos/lib/osian/net/oip, replicates tos/lib/net/oip) + (nuke tos/lib/osian/utils/fragpool, replicates tos/lib/fragpool) + + [msp430-int-pu ce1ec14] + update red/.platform, onewire, wdt, crc16, etc. + + (split out tos/platforms/red/hardware/onewire -> msp430-int-pu) + (split out rename tos/platforms/red/hardware/radio/rf1a-red.h + -> smartrf/CUSTOM.h) msp430-int-pu + + [msp430-int-pu] +707d531 Red, db branch bcc6e59 bring in red platform files + (split) 84a0bb2 Bring in x5 I2C implementation, USCI + 35ee1fd add gen'd I2C, clean up + + +-------------------------------------------------------------------------------------------------------- + +Z1 merge + The phrase "trunk-Z1" refers to the Z1 commit into the main t2 svn trunk. T2 SVN trunk commits 5442-5446 (corresponding git SHAs: 95e34ad, 7c460e2, 33fcc13, 4496245, and e50ad32. From e1bd65a9fbc0509f1dba1edb2d2227e05349ad21 Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Fri, 8 Jul 2011 16:08:46 +0200 Subject: [PATCH 147/411] Fix a typo in the include guard (missing P in MSP430). --- tos/chips/msp430/x2xxx/Msp430DcoSpec.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h index 0e677af04f..0f80287ab8 100644 --- a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h @@ -49,8 +49,8 @@ * values provided by TI for msp430x2xx processors. */ -#ifndef MS430DCOSPEC_H -#define MS430DCOSPEC_H +#ifndef MSP430DCOSPEC_H +#define MSP430DCOSPEC_H /* 8 MIHZ */ #define TARGET_DCO_HZ 8388608UL From b66e69fdc53d75c6b882b6a4c4096ea39bc5a42c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 12 Jul 2011 17:00:17 -0700 Subject: [PATCH 148/411] Rework Getting_Started and Repo_Notes to better reflect what TinyProd is. Also add section about Why GIT. Move what TinyProd is to Repo_Notes. --- 00_Getting_Started | 65 +++++++++++++++------- 01_Repo_Notes | 133 ++++++++++++++++++++++++++++++++++++--------- 2 files changed, 152 insertions(+), 46 deletions(-) diff --git a/00_Getting_Started b/00_Getting_Started index 9d4ed23cd1..1aaac23923 100644 --- a/00_Getting_Started +++ b/00_Getting_Started @@ -1,4 +1,6 @@ +Getting Started. + Git is great. Git is good. Git is powerful. Alas, that makes it a little daunting getting started. This document should @@ -11,7 +13,7 @@ to the TinyProd TinyOS repository structure. Contents: -- About TinyProd +- Why Git? - GitHub - Set up Git - Set up your working repository @@ -19,26 +21,51 @@ Contents: - Guidelines -* About TinyProd: +* Why Git? + +The main reason behind the selection of GIT is it's fully distributed nature, +fast branching, and associated merge magic. The TinyOS development community +is essentially world wide and we want to make encourage the rate of development +by making the contribution process very easy as well as accessable. + + o Fully distributed. + + o Everything is local. No need of a centralized server for anything. + (note our workflow does require integration repositories but this isn't + implicit in GIT), nor does it impact the contribution process. + + o Cheap local branching. This is important. We want to foster faster + development. Try something out while still staying in touch with what + is happening in the mainline. This is much more difficult with rTinyOS's + (research TinyOS) CVS contrib and SVN based repositories. + + Note, branching in GIT is fundamentally different than pretty much any + other SCM system and is responsbile for much of the productivity of projects + using GIT. + + o GITHUB. When coupled with github, git provides very powerful visibility tools + (what is being changed and by whom). Code review becomes very easy when + using GIT and github. + + o Git is Small + + o Git is Fast + + o Support for any workflow. Although we are using the Integration Manager + Workflow. This also promotes code review. -TinyProd is a GIT based TinyOS repository that is immediately downstream from -the main SVN based TinyOS repository that is maintained by the academic TinyOS -community. + o Allows gradual reintegration of currently active contrib source bodies. + Currently the contrib source body is maintained in CVS and is rather + cumbersome to use. Bringing active contrib code into the TinyProd + github realm would provide the same mechanism for accessing and using + active contrib code as the main TinyOS body. -TinyProd is intended to be a more vibrant, developer/production orientated -repository. Some of the features include: + Using TinyProd hosted contrib code would be as simple as merging two + git branches or possibly two branches in different git repositories. - o organize git based TinyOS development. - o More vibrant, higher rate of change for the community. - o Encourage collaboration - o Optimize developer resources. (Streamline the development process). - Developer centric rather than academic centric. - o Peer driven code review, norm rather than the exception. - o real issue and bug tracking - o tracking changes to TinyProd managed pieces of the source tree - and linking to appropriate tracking documents. - o stable mainline. - o Continuous release cycle. + o Other DVCS could also have been chosen (SVN is not a DVCS), such as Hg + or Bzr but I happened to be a fan of GIT. And it seems to be working + well for what we are trying to do. * GitHub @@ -49,7 +76,7 @@ repository. Some of the features include: * Go to github.com and get yourself a logon. Choose your login name carefully. You can rename it once (but only once). - Once you are logged in, You'll be presented a page start up page which + Once you are logged in, You'll be presented a start up page which includes things like "Set Up Git", "Create a Repository", "Fork a Repository", etc. We will be using existing repositories. diff --git a/01_Repo_Notes b/01_Repo_Notes index b74ed03060..38b0319a8e 100644 --- a/01_Repo_Notes +++ b/01_Repo_Notes @@ -1,17 +1,68 @@ -* Toolchain: +Welcome to TinyProd (TinyOS Production) -The focus is on getting the new toolchain verified. As such this repo is -intended to be tested using the new toolchain (mspgcc 4.5, uniarch, ti headers). +* About TinyProd: + +TinyProd is a GIT based TinyOS repository that is immediately downstream from +the main SVN based TinyOS repository that is maintained by the academic TinyOS +community. + +TinyProd is intended to be a more vibrant, developer/production orientated +repository. Some of the features include: + + o organize git based TinyOS development. + o More vibrant, higher rate of change for the community. + o Encourage collaboration + o Optimize developer resources. (Streamline the development process). + Developer centric rather than academic centric. + o Peer driven code review, norm rather than the exception. + o real issue and bug tracking + o tracking changes to TinyProd managed pieces of the source tree + and linking to appropriate tracking documents. + o stable mainline. + o Continuous release cycle. + +The intent is to keep the structure as simple as possible while allowing +for reasonable levels of contribution. We want a forum where developers +can make their code easily accessible, mechanisms for real code review and +feedback, and a reasonable level of stability in the releases. + +The assumption is that developer resources are scarce and should be optimized +while still maintaining good development practices. + +If a developer takes the time to put a reasonable piece of code together, gets +it reviewed, then they should have a place where it can live and contribute +to the mainline. The critical resource for getting development done is the +developers time and effort. We should be making their life easier and +providing a mechanism for their code to become part of the whole. + +If you have something to contribute we will find a reasonable way to get it +published and easy to find as part of the TinyOS community. + + +* Msp430 Toolchain: + +The initial major feature of the TinyProd repository is the creation of a more +complete TI Msp430 core. This requires use of an updated TI msp430 toolchain. +The new toolchain is being worked on by Peter Bigot and is in active development +and needs to be verified. While this repository supports old TI processors (x1 +family) its primary focus is on the newer processors which requires the newer +toolchain. The intent is that all processors (original, x1 as well as the newer +x2 and x5 families) should be tested with the newer toolchain. + +An interium installation tarball can be found at +http://tinyprod.net/cire/msp430-20110612.tgz. It should be installed in root (/). +Debian packages are being built for Ubuntu Oneiric (11.10). Some testing with the old 3.2.3 toolchain (original tinyos and z1 varient) has -also been done for simple function (ie. does it compile). +also been done for basic functionality (ie. does it compile). * Repo Structure github.com/tinyprod/prod: main TinyProd repo. - The VeryBless repo. Hold the stable mainline (master) + The VeryBlessed repo. Holds the stable mainline (master). Releases + come off this repo and the master branch. github.com/tp-freeforall/prod: working fork. Blessed repo. Holds consolidated integration branches and @@ -22,6 +73,16 @@ github.com//prod: user's tinyprod working fork. should be branched off the tp-freeforall/prod(branch) that the user is working on. +The general form for a repository/branch is: /(branch) +ie. tp-freeforall/prod(msp430-int-pu) is the msp430-int-pu branch in the +tp-freeforall/prod repository. + +Local repositories are referenced using local(branch). local(remote/branch). + + +See 00_Getting_Started for more details on how to contribute to the TinyProd +repositories. + main persistent branches: @@ -29,10 +90,8 @@ main persistent branches: svn/upstream: svn tinyos tracking branch. master: the main tinyprod release line. - -next: integration branch for next release on master. - -pu: integration branch for proposed updates. +next: integration branch for next release on master. +pu: integration branch for proposed updates. -int: integration branch for feature -int-pu: proposed update. @@ -42,6 +101,7 @@ pu: integration branch for proposed updates. + Other current branches: msp430-int: msp430 integration (msp430 core, x1, x2, x5) feature branch @@ -84,8 +144,8 @@ svn t2 mainline ---| svn-vhsb --------------------- | | | --------------------------msp430-int ---------------- - | - ----- z1-pu ---- + | | | + ---- msp430-int-pu ------------------ * Branches: @@ -98,13 +158,14 @@ svn-vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main mm_core. This collapsage forms the majority of the work of merging the trees and there isn't much sense in reinventing the wheel. -msp430-int: main consolidation branch for the msp430 core. It represents the +msp430-int: main integration branch for the msp430 core. It represents the current released version of the branch. - includes all three major families (x1, x2, and x5). Major cpu dependancies - held in tos/chips/msp430/{x1xxx,x2xxx,x5xxx} + includes all three major families (x1, x2, and x5). Major cpu dependancies + held in tos/chips/msp430/{x1xxx,x2xxx,x5xxx} -z1-pu: working directory for Zolertia modifications. +msp430-int-pu: new proposed changes to msp430-int are first integrated here. + When verified these get merged into msp430-int. @@ -113,31 +174,39 @@ Workflow: (github user: Robert Hunter) on github, fork github.com/tp-freeforall/prod (as Robert Hunter) (this creates the github repo, github.com/roberthunter/prod) - mkdir -p ~/working/msp430 - cd ~/working/msp430 + Assumes that the main feature integration branch on tp-freeforall is + msp430-int and its pu branch (proposed updates) is msp430-int-pu. + + When the initial workinig repository is created the remote origin + is created. In the example below this refers to git@github.com: + roberthunter/prod.git. We also want a remote for the upstream called + "up". + + mkdir -p ~/w/rh + cd ~/w/rh git clone git@github.com:roberthunter/prod.git tinyos-2.x cd tinyos-2.x git remote add up git://github.com/tp-freeforall/prod.git git fetch up - git checkout msp430-int # make sure on the msp430-int branch - git checkout -b rh # create the rh branch off msp430-int + git checkout -t up/msp430-int-pu # create a local tracking branch + git checkout -b rh # create the rh branch off msp430-int-pu -tinyprod/prod +tp-freeforall/prod fork -> tp-freeforall/prod.git - msp430-int branch + msp430-int-pu branch roberthunter/prod.git - msp430-int branch + msp430-int-pu branch rh branch ...... rh changes --- | - | + | integration step tp-freeforall/prod.git | msp430-int-pu ------------- - | + |integration step | msp430-int ------------- @@ -151,21 +220,31 @@ tp-freeforall/prod(msp430-int-pu) branch. After other changes from other developers comes in and msp430-int-pu has sufficiently matured, msp430-int-pu is merged into tp-freeforall/prod(msp430-int). +Testing of the integration branches happens on tp-freeforall/prod(feature-int). +Groups of features are combined on tp-freeforall/prod(pu) [tp-freeforall/prod +repository on github, pu (proposed updates) branch] which migrates to the +next branch as the branch matures and the changes are accepted. + When all integration branches have matured sufficiently, they are merged -together, tested, and becomes tinyprod/prod(master). +together, tested, and becomes tinyprod/prod(master) as a new release. The +intent is to release features as they become available using a continuous +release process. While various integration work is being done, working branches should be -refreshed with more current content from the integration repositories. +refreshed with more current content from the integration repositories. This +is referred to as a backmerge. For example, Robert wants to make sure that his changes are consistent with what is happening on the tp-freeforall/prod(msp430-int-pu) branch. He accomplishes this by the following commands: - cd ~/working/msp430/tinyos-2.x + cd ~/w/rh/tinyos-2.x git fetch up # get current information from # tp-freeforall git checkout rh # make sure on rh branch git merge up/msp430-int-pu # merge in the current # proposed integration branch + # which is the feature Robert is + # working on. From a529cd0fac5ff645b1147e8263d11dc276c6fb0c Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Fri, 15 Jul 2011 02:22:57 +0100 Subject: [PATCH 149/411] Replace IPV6 ident with IEEE ident Conflicts: tos/lib/net/oip/DeviceModifiedEui64P.nc --- .../IPV6 => Ieee}/Identity/DeviceIdentity.nc | 40 +++++++--------- .../IPV6 => Ieee}/Identity/DeviceIdentityC.nc | 20 ++++---- .../IPV6 => Ieee}/Identity/DeviceIdentityP.nc | 48 +++++++++---------- .../Identity/Ieee154OdiAddressC.nc | 36 +++++++------- .../Identity/Ieee154OdiAddressP.nc | 39 ++++++++------- .../{hardware/IPV6 => Ieee}/Identity/odi.h | 31 ++++++------ .../IPV6 => Ieee}/Identity/odi_types.h | 1 + 7 files changed, 101 insertions(+), 114 deletions(-) rename tos/platforms/red/{hardware/IPV6 => Ieee}/Identity/DeviceIdentity.nc (80%) rename tos/platforms/red/{hardware/IPV6 => Ieee}/Identity/DeviceIdentityC.nc (79%) rename tos/platforms/red/{hardware/IPV6 => Ieee}/Identity/DeviceIdentityP.nc (79%) rename tos/platforms/red/{hardware/IPV6 => Ieee}/Identity/Ieee154OdiAddressC.nc (76%) rename tos/platforms/red/{hardware/IPV6 => Ieee}/Identity/Ieee154OdiAddressP.nc (77%) rename tos/platforms/red/{hardware/IPV6 => Ieee}/Identity/odi.h (87%) rename tos/platforms/red/{hardware/IPV6 => Ieee}/Identity/odi_types.h (99%) diff --git a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentity.nc b/tos/platforms/red/Ieee/Identity/DeviceIdentity.nc similarity index 80% rename from tos/platforms/red/hardware/IPV6/Identity/DeviceIdentity.nc rename to tos/platforms/red/Ieee/Identity/DeviceIdentity.nc index 4e0745b482..b103bb8b04 100644 --- a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentity.nc +++ b/tos/platforms/red/Ieee/Identity/DeviceIdentity.nc @@ -7,38 +7,35 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - * - Neither the name of the copyright holders nor the names of + * - Neither the name of the People Power Company nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. + * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "IeeeEui64.h" #include "odi.h" -/** - * Access the board OSIAN Device Identifier. + +/** Access the board OSIAN Device Identifier. * * The ODI is a tuple of values encoded in a sixty-four bit unsigned * integer structurally consistent with IEEE EUI64 values. @@ -54,40 +51,35 @@ * Regardless of implementation, once an ODI value is returned, the * implementation must guarantee that the same value will be returned * on all subsequent calls. - * + * * @author Peter Bigot * @author David Moss */ - interface DeviceIdentity { - - /** - * Get a pointer to the ODI structure. + + /** Get a pointer to the ODI structure. * * This function should not be invoked prior to MainC.Boot.booted(), * and must not be invoked from any function in the * DeviceIdentityConfiguration interface. * * Implementations must guarantee that multiple invocations of this - * function always return a pointer to the same value. - */ + * function always return a pointer to the same value. */ command const odi_t * get (); - /** - * Get a pointer to the ODI value, cast as an IEEE EUI64 value. + /** Get a pointer to the ODI value, cast as an IEEE EUI64 value. * * This function is expected to invoke get(). */ command const ieee_eui64_t * getEui64 (); - /** - * Get an optional human-readable description of the device. + /** Get an optional human-readable description of the device. * * Unlike the ODI value itself, the description field may change * from an undefined value (a null pointer) to a defined value. For * example, it may be provided by an external service that uses the * device ODI as a key. It is, however, immutable after being - * set. - */ + * set. */ command const char * getDescription (); } + diff --git a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityC.nc b/tos/platforms/red/Ieee/Identity/DeviceIdentityC.nc similarity index 79% rename from tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityC.nc rename to tos/platforms/red/Ieee/Identity/DeviceIdentityC.nc index f2e42501e6..c900df6bd9 100644 --- a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityC.nc +++ b/tos/platforms/red/Ieee/Identity/DeviceIdentityC.nc @@ -7,31 +7,28 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - * - Neither the name of the copyright holders nor the names of + * - Neither the name of the People Power Company nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. + * OF THE POSSIBILITY OF SUCH DAMAGE */ @@ -39,8 +36,11 @@ * @author David Moss */ configuration DeviceIdentityC { - provides interface DeviceIdentity; + provides { + interface DeviceIdentity; + } } + implementation { components PlatformI2CC; diff --git a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityP.nc b/tos/platforms/red/Ieee/Identity/DeviceIdentityP.nc similarity index 79% rename from tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityP.nc rename to tos/platforms/red/Ieee/Identity/DeviceIdentityP.nc index a580758c1e..29c08ce02a 100644 --- a/tos/platforms/red/hardware/IPV6/Identity/DeviceIdentityP.nc +++ b/tos/platforms/red/Ieee/Identity/DeviceIdentityP.nc @@ -7,31 +7,28 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - * - Neither the name of the copyright holders nor the names of + * - Neither the name of the People Power Company nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. + * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "odi.h" @@ -40,16 +37,13 @@ * @author David Moss * @author Peter Bigot */ - module DeviceIdentityP { provides { interface Init; interface DeviceIdentity; } - uses { - interface I2CPacket; - interface StdControl; - } + uses interface I2CPacket; + uses interface StdControl; } implementation { /* Set default metadata values */ @@ -69,21 +63,20 @@ module DeviceIdentityP { #define OSIAN_DEVICE_TYPE 1 #endif /* OSIAN_DEVICE_TYPE */ - /** - * OSIAN Device Identifier, basically an EUI-64 with extra info. + /** OSIAN Device Identifier, basically an EUI-64 with extra info. * * @note Don't bother trying to initialize this at compile-time. * nx_structs with bit fields don't translate into something that - * can be statically initialized. - */ + * can be statically initialized. */ odi_t odi; - command error_t Init.init () { + command error_t Init.init () + { static bool done; error_t rc = SUCCESS; - - if (done) + if (done) { return SUCCESS; + } done = TRUE; odi.oui = OSIAN_DEVICE_OUI; odi.reserved = 0; @@ -92,9 +85,15 @@ module DeviceIdentityP { odi.deviceClass = OSIAN_DEVICE_CLASS; odi.deviceType = OSIAN_DEVICE_TYPE; { + uint32_t id = 0; uint8_t EE_senddata[5],EE_recdata[5]; + #ifdef OSIAN_DEVICE_ID + odi.id = OSIAN_DEVICE_ID; + return rc; + #endif + call StdControl.start(); EE_senddata[0]=0x00; //high byte address @@ -113,14 +112,13 @@ module DeviceIdentityP { return rc; } - command const odi_t* DeviceIdentity.get () { + command const odi_t* DeviceIdentity.get () + { call Init.init(); return &odi; } - command const ieee_eui64_t* DeviceIdentity.getEui64 () { - return (const ieee_eui64_t*)call DeviceIdentity.get(); - } + command const ieee_eui64_t* DeviceIdentity.getEui64 () { return (const ieee_eui64_t*)call DeviceIdentity.get(); } command const char * DeviceIdentity.getDescription () { return 0; } diff --git a/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressC.nc b/tos/platforms/red/Ieee/Identity/Ieee154OdiAddressC.nc similarity index 76% rename from tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressC.nc rename to tos/platforms/red/Ieee/Identity/Ieee154OdiAddressC.nc index 479ec6b8b2..6d59f523fd 100644 --- a/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressC.nc +++ b/tos/platforms/red/Ieee/Identity/Ieee154OdiAddressC.nc @@ -1,5 +1,4 @@ -/* - * Copyright (c) 2010 People Power Co. +/* Copyright (c) 2010 People Power Co. * All rights reserved. * * This open source code was developed with funding from People Power Company @@ -7,35 +6,32 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - * - Neither the name of the copyright holders nor the names of + * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. + * OF THE POSSIBILITY OF SUCH DAMAGE + * */ -/** - * Component to automatically assign the IEEE 802.15.4 link-layer address +/** Component to automatically assign the IEEE 802.15.4 link-layer address * based on a PAN id and the device's unique identifier. * * Instantiate this component in your configuration. Connect @@ -50,18 +46,22 @@ * * @author Peter A. Bigot */ - generic configuration Ieee154OdiAddressC (uint16_t PAN_ID) { - provides interface Init; - uses interface Boot; -} -implementation { + uses { + interface Boot; + } + provides { + interface Init; + interface Ieee154Address; + } +} implementation { components new Ieee154OdiAddressP(PAN_ID); Boot = Ieee154OdiAddressP; Init = Ieee154OdiAddressP; components Ieee154AddressC; Ieee154OdiAddressP.Ieee154Address -> Ieee154AddressC; + Ieee154Address = Ieee154AddressC; components DeviceIdentityC; Ieee154OdiAddressP.DeviceIdentity -> DeviceIdentityC; diff --git a/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressP.nc b/tos/platforms/red/Ieee/Identity/Ieee154OdiAddressP.nc similarity index 77% rename from tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressP.nc rename to tos/platforms/red/Ieee/Identity/Ieee154OdiAddressP.nc index 50ae18abd9..84f1b5d23c 100644 --- a/tos/platforms/red/hardware/IPV6/Identity/Ieee154OdiAddressP.nc +++ b/tos/platforms/red/Ieee/Identity/Ieee154OdiAddressP.nc @@ -1,5 +1,4 @@ -/* - * Copyright (c) 2010 People Power Co. +/* Copyright (c) 2010 People Power Co. * All rights reserved. * * This open source code was developed with funding from People Power Company @@ -7,59 +6,57 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - * - Neither the name of the copyright holders nor the names of + * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. + * OF THE POSSIBILITY OF SUCH DAMAGE + * */ -/** - * Assign an 802.15.4 address based on a device identity. +/** Assign an 802.15.4 address based on a device identity. * * @param PAN_ID The Personal Area Network ID to be assigned to the * radio interface. * * @author Peter A. Bigot */ - generic module Ieee154OdiAddressP (uint16_t PAN_ID) { uses { interface Boot; interface Ieee154Address; interface DeviceIdentity; } - provides interface Init; -} -implementation { + provides { + interface Init; + } +} implementation { async event void Ieee154Address.changed () { } - command error_t Init.init () { + command error_t Init.init () + { const ieee_eui64_t* euip = call DeviceIdentity.getEui64(); uint8_t iid[IEEE_EUI64_LENGTH]; ieee154_saddr_t saddr; - + /* Create modified EUI64 for IID */ memcpy(iid, euip->data, sizeof(iid)); iid[0] |= 0x02; @@ -71,7 +68,9 @@ implementation { return SUCCESS; } - event void Boot.booted () { + event void Boot.booted () + { call Init.init(); } + } diff --git a/tos/platforms/red/hardware/IPV6/Identity/odi.h b/tos/platforms/red/Ieee/Identity/odi.h similarity index 87% rename from tos/platforms/red/hardware/IPV6/Identity/odi.h rename to tos/platforms/red/Ieee/Identity/odi.h index bdbcbac52c..d482d2fb8a 100644 --- a/tos/platforms/red/hardware/IPV6/Identity/odi.h +++ b/tos/platforms/red/Ieee/Identity/odi.h @@ -7,39 +7,36 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - * - Neither the name of the copyright holders nor the names of + * - Neither the name of the People Power Company nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. + * OF THE POSSIBILITY OF SUCH DAMAGE */ + /** * OSIAN Device Identifier * @author David Moss * @author Peter Bigot */ - #ifndef OSIAN_odi_h #define OSIAN_odi_h @@ -68,25 +65,25 @@ typedef enum ODI_Class_e { typedef NX_(struct) odi_t { /** Organizationally unique identifier obtained from IANA */ NX_(uint64_t) oui : 24; - + /** 1 bit reserved */ NX_(uint64_t) reserved : 1; - + /** 1 if this device can sense something */ NX_(uint64_t) sensor : 1; - + /** 1 if this device can control something */ NX_(uint64_t) actuator : 1; - + /** The device class, one of ODI_Class_e */ NX_(uint64_t) deviceClass : 3; - + /** The device type, defined in odi_types.h */ NX_(uint64_t) deviceType : 10; - + /** The unique ID of this device instance */ NX_(uint64_t) id : 24; - + } odi_t; typedef NX_(union) odi_u { diff --git a/tos/platforms/red/hardware/IPV6/Identity/odi_types.h b/tos/platforms/red/Ieee/Identity/odi_types.h similarity index 99% rename from tos/platforms/red/hardware/IPV6/Identity/odi_types.h rename to tos/platforms/red/Ieee/Identity/odi_types.h index 3721ad0824..bb44a821b2 100644 --- a/tos/platforms/red/hardware/IPV6/Identity/odi_types.h +++ b/tos/platforms/red/Ieee/Identity/odi_types.h @@ -72,3 +72,4 @@ enum ODI_HealthAndSafety_types_e { }; #endif /* OSIAN_odi_types_h */ + From 62f627a71422291d64b5e29e7b73333599cfa42a Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Fri, 15 Jul 2011 01:33:26 +0100 Subject: [PATCH 150/411] Removed red/hardware/onewire --- .../red/hardware/onewire/PlatformOneWireC.nc | 64 ------------------- .../hardware/onewire/PlatformOneWireInitC.nc | 60 ----------------- .../hardware/onewire/PlatformOneWireInitP.nc | 56 ---------------- 3 files changed, 180 deletions(-) delete mode 100644 tos/platforms/red/hardware/onewire/PlatformOneWireC.nc delete mode 100644 tos/platforms/red/hardware/onewire/PlatformOneWireInitC.nc delete mode 100644 tos/platforms/red/hardware/onewire/PlatformOneWireInitP.nc diff --git a/tos/platforms/red/hardware/onewire/PlatformOneWireC.nc b/tos/platforms/red/hardware/onewire/PlatformOneWireC.nc deleted file mode 100644 index 91d58e62c8..0000000000 --- a/tos/platforms/red/hardware/onewire/PlatformOneWireC.nc +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (c) 2009-2010 People Power Company - * All rights reserved. - * - * This open source code was developed with funding from People Power Company - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Platform hardware presentation layer for the DS24xx one-wire chip - * @author David Moss - */ - -configuration PlatformOneWireC { - provides { - interface OneWire as PrimaryOneWire; - interface Read as TemperatureCC; - } -} - -implementation { - components PlatformOneWireInitC; - - /* SuRF boards use a DS1825 as the primary one-wire device. This - * happens to also provide the ambient temperature. */ - - components new OneWireMasterC() as Ds1825MasterC; - components new Msp430GpioC() as Ds1825PinC; - Ds1825MasterC.Pin -> Ds1825PinC; - Ds1825PinC -> PlatformOneWireInitC.Ds1825IO; - - components new Ds1825OneWireImplementationC() as Ds1825ImplC; - PrimaryOneWire = Ds1825ImplC; - TemperatureCC = Ds1825ImplC; - Ds1825ImplC.OneWireMaster -> Ds1825MasterC; -} diff --git a/tos/platforms/red/hardware/onewire/PlatformOneWireInitC.nc b/tos/platforms/red/hardware/onewire/PlatformOneWireInitC.nc deleted file mode 100644 index 4974093006..0000000000 --- a/tos/platforms/red/hardware/onewire/PlatformOneWireInitC.nc +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2009-2010 People Power Company - * All rights reserved. - * - * This open source code was developed with funding from People Power Company - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Platform hardware presentation layer for the DS1825 one-wire chip - * @author David Moss - */ - -configuration PlatformOneWireInitC { - provides { - interface Init; - interface HplMsp430GeneralIO as Ds1825IO; - } -} implementation { - - components PlatformOneWireInitP; - Init = PlatformOneWireInitP; - - components HplMsp430GeneralIOC as GeneralIOC; -#if defined(SURF_REV_A) - Ds1825IO = GeneralIOC.Port35; - PlatformOneWireInitP.Ds1825IO -> GeneralIOC.Port35; -#else - Ds1825IO = GeneralIOC.Port37; - PlatformOneWireInitP.Ds1825IO -> GeneralIOC.Port37; -#endif -} diff --git a/tos/platforms/red/hardware/onewire/PlatformOneWireInitP.nc b/tos/platforms/red/hardware/onewire/PlatformOneWireInitP.nc deleted file mode 100644 index 04e4ae3fee..0000000000 --- a/tos/platforms/red/hardware/onewire/PlatformOneWireInitP.nc +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright (c) 2009-2010 People Power Company - * All rights reserved. - * - * This open source code was developed with funding from People Power Company - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author David Moss - */ - -module PlatformOneWireInitP { - provides { - interface Init; - } - uses { - interface HplMsp430GeneralIO as Ds1825IO; - } -} - -implementation { - command error_t Init.init() { - call Ds1825IO.setResistor(MSP430_PORT_RESISTOR_OFF); - call Ds1825IO.makeInput(); - return SUCCESS; - } -} From 33bd047a49cf8ab513a5cc1f26f220e7c70dd1f6 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Fri, 15 Jul 2011 01:37:51 +0100 Subject: [PATCH 151/411] Added new red/platform files (sensors,storage,rtc) --- tos/platforms/red/.platform | 6 +- .../hardware/rtc/PlatformRealTimeClockC.nc | 59 ++++ .../hardware/rtc/PlatformRealTimeClockP.nc | 270 ++++++++++++++++++ .../red/hardware/sensors/MLX90614/MLX90614.h | 78 +++++ .../red/hardware/sensors/MLX90614/MLX90614.nc | 64 +++++ .../hardware/sensors/MLX90614/MLX90614C.nc | 52 ++++ .../hardware/sensors/MLX90614/MLX90614P.nc | 210 ++++++++++++++ .../hardware/storage/MC24XX1025/MC24XX1025.h | 40 +++ .../hardware/storage/MC24XX1025/MC24XX1025.nc | 49 ++++ .../storage/MC24XX1025/MC24XX1025C.nc | 52 ++++ .../storage/MC24XX1025/MC24XX1025P.nc | 179 ++++++++++++ 11 files changed, 1057 insertions(+), 2 deletions(-) create mode 100644 tos/platforms/red/hardware/rtc/PlatformRealTimeClockC.nc create mode 100644 tos/platforms/red/hardware/rtc/PlatformRealTimeClockP.nc create mode 100644 tos/platforms/red/hardware/sensors/MLX90614/MLX90614.h create mode 100644 tos/platforms/red/hardware/sensors/MLX90614/MLX90614.nc create mode 100644 tos/platforms/red/hardware/sensors/MLX90614/MLX90614C.nc create mode 100644 tos/platforms/red/hardware/sensors/MLX90614/MLX90614P.nc create mode 100644 tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025.h create mode 100644 tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025.nc create mode 100644 tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025C.nc create mode 100644 tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025P.nc diff --git a/tos/platforms/red/.platform b/tos/platforms/red/.platform index 03f50bd27e..cf82ccae95 100644 --- a/tos/platforms/red/.platform +++ b/tos/platforms/red/.platform @@ -8,10 +8,12 @@ for (split(/\n/, <<'EOText' %P/hardware/pins %P/hardware/leds %P/hardware/usci - %P/hardware/onewire %P/hardware/radio %P/hardware/clock - %P/hardware/IPV6/Identity + %P/hardware/rtc + %P/hardware/sensors/MLX90614 + %P/hardware/storage/MC24XX1025 + %P/Ieee/Identity %P/compatibility/system %T/chips/msp430/x5xxx diff --git a/tos/platforms/red/hardware/rtc/PlatformRealTimeClockC.nc b/tos/platforms/red/hardware/rtc/PlatformRealTimeClockC.nc new file mode 100644 index 0000000000..ca29f316e6 --- /dev/null +++ b/tos/platforms/red/hardware/rtc/PlatformRealTimeClockC.nc @@ -0,0 +1,59 @@ +/* Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Provide the RealTimeClock interface, but only when building under + * OSIAN since the interface is not in TinyOS proper. Otherwise, + * provide it, but the StdControl functions always fail. + * + * Note that this component does not require boot-time initialization, + * so is not linked to PlatformC. + * + * @author Peter A. Bigot + */ + +configuration PlatformRealTimeClockC { + provides { + interface StdControl; +#if WITH_OSIAN + interface RealTimeClock; +#endif /* WITH_OSIAN */ + } +} implementation { + components PlatformRealTimeClockP; + StdControl = PlatformRealTimeClockP; +#if WITH_OSIAN + RealTimeClock = PlatformRealTimeClockP; +#endif /* WITH_OSIAN */ +} diff --git a/tos/platforms/red/hardware/rtc/PlatformRealTimeClockP.nc b/tos/platforms/red/hardware/rtc/PlatformRealTimeClockP.nc new file mode 100644 index 0000000000..b91542274e --- /dev/null +++ b/tos/platforms/red/hardware/rtc/PlatformRealTimeClockP.nc @@ -0,0 +1,270 @@ +/* Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "RealTimeClock.h" + +module PlatformRealTimeClockP { + provides { + interface StdControl; + interface RealTimeClock; + } +} implementation { + +/* TI renamed RTC_A_VECTOR to RTC_VECTOR in more recent header + * releases. Use the former if we don't have the latter. */ + +#ifndef RTC_VECTOR +#define RTC_VECTOR RTC_A_VECTOR +#endif /* RTC_VECTOR */ + +/* Alarm Enable bit for alarm registers */ +#ifndef RTC_AE +#define RTC_AE 0x80 +#endif /* RTC_AE */ + + /** User-requested event codes */ + unsigned int eventSet__; + + command error_t StdControl.start () { + atomic { + /* Remove hold, calendar mode, binary values, source ACLK */ + RTCCTL01 = RTCMODE; + /* Clear the event mask */ + eventSet__ = 0; + } + return SUCCESS; + } + + command error_t StdControl.stop () { + atomic { + RTCCTL01 |= RTCHOLD; + } + return SUCCESS; + } + + command error_t RealTimeClock.setTime (const struct tm* time) { + if (! time) { + return EINVAL; + } + atomic { + if (RTCHOLD & RTCCTL01) { + return EOFF; + } + RTCCTL01 |= RTCHOLD; + RTCSEC = time->tm_sec; + RTCMIN = time->tm_min; + RTCHOUR = time->tm_hour; + RTCDOW = time->tm_wday; + RTCDAY = time->tm_mday; + RTCMON = 1 + time->tm_mon; + RTCYEAR = 1900 + time->tm_year; + RTCCTL01 &= ~RTCHOLD; + } + return SUCCESS; + } + + command error_t RealTimeClock.requestTime (unsigned int event_set) { + atomic { + if (RTCCTL01 & RTCHOLD) { + return EOFF; + } + eventSet__ |= event_set; + RTCCTL01 |= RTCRDYIE; + return SUCCESS; + } + } + + command error_t RealTimeClock.setIntervalMode (RtcIntervalMode_e interval_mode) { + error_t rv = SUCCESS; + + atomic { + /* Start by disabling any interval-related interrupt */ + RTCCTL01 &= ~(RTCTEVIE | RTCTEVIFG); + if (RTC_INTERVAL_MODE_NONE == interval_mode) { + /* Leave everything disabled */ + ; + } else { + uint16_t rtctev = 0; + + /* Turn on the selected event, or return an error if the + * argument was bogus */ + switch (interval_mode) { + case RTC_INTERVAL_MODE_MIN: + rtctev = RTCTEV__MIN; + break; + case RTC_INTERVAL_MODE_HOUR: + rtctev = RTCTEV__HOUR; + break; + case RTC_INTERVAL_MODE_1200: + rtctev = RTCTEV__1200; + break; + case RTC_INTERVAL_MODE_0000: + rtctev = RTCTEV__0000; + break; + default: + rv = EINVAL; + break; + } + if (SUCCESS == rv) { + RTCCTL01 = (RTCCTL01 & ~(RTCTEV0 | RTCTEV1)) | RTCTEVIE | rtctev; + } + } + } + return rv; + } + + command RtcIntervalMode_e RealTimeClock.getIntervalMode () { + atomic { + if (! (RTCTEVIE & RTCCTL01)) { + return RTC_INTERVAL_MODE_NONE; + } + switch (RTCCTL01 & (RTCTEV0 | RTCTEV1)) { + case RTCTEV__MIN: + return RTC_INTERVAL_MODE_MIN; + case RTCTEV__HOUR: + return RTC_INTERVAL_MODE_HOUR; + case RTCTEV__1200: + return RTC_INTERVAL_MODE_1200; + case RTCTEV__0000: + return RTC_INTERVAL_MODE_0000; + } + } + /*NOTREACHED*/ + return RTC_INTERVAL_MODE_NONE; + } + + command error_t RealTimeClock.setAlarm (const struct tm* time, + unsigned int field_set) { + atomic { + /* Start by disabling the alarm */ + RTCCTL0 &= ~(RTCAIE | RTCAIFG); + if (time) { + RTCAMIN = time->tm_min; + RTCAHOUR = time->tm_hour; + RTCADOW = time->tm_wday; + RTCADAY = time->tm_mday; + } else { + RTCAMIN = RTCAHOUR = RTCADOW = RTCADAY = 0; + } + if (field_set & RTC_ALARM_MINUTE) { + RTCAMIN |= RTC_AE; + } + if (field_set & RTC_ALARM_HOUR) { + RTCAHOUR |= RTC_AE; + } + if (field_set & RTC_ALARM_DOW) { + RTCADOW |= RTC_AE; + } + if (field_set & RTC_ALARM_DOM) { + RTCADAY |= RTC_AE; + } + if (field_set) { + RTCCTL0 |= RTCAIE; + } + } + return SUCCESS; + } + + command unsigned int RealTimeClock.getAlarm (struct tm* time) { return 0; } + + default async event void RealTimeClock.currentTime (const struct tm* timep, + unsigned int reason_set) { } + + TOSH_SIGNAL(RTC_VECTOR) { + struct tm now; + int time_is_valid; + volatile uint16_t rtciv; + + /* The only reason we should ever get an interrupt is that + * something happened for which we want the time. In some cases, + * RTCRDY may be reset at the time the event is signalled. For + * example, this happens with RTCAIFG. Similarly, any use of a + * prescale-based interval event is not synchronized with RTC + * register updates. + * + * What we do is set RTCRDYIE, then sample RTCRDY. If it's good, + * we proceed with the read, then resample it again at the end. + * If it's still good, the time is valid, and we clear RTCRDYIE, + * do whatever else we need to do, and signal the user. + * + * If we didn't read a valid time, we just accumulate the reasons, + * and leave RTCRDYIE enabled so we get another interrupt as soon + * as the time is valid. + */ + + RTCCTL01 |= RTCRDYIE; + memset(&now, 0, sizeof(now)); + time_is_valid = RTCRDY & RTCCTL01; + if (time_is_valid) { + now.tm_sec = RTCSEC; + now.tm_min = RTCMIN; + now.tm_hour = RTCHOUR; + now.tm_wday = RTCDOW; + now.tm_mday = RTCDAY; + now.tm_mon = RTCMON - 1; + now.tm_year = RTCYEAR - 1900; + time_is_valid = RTCRDY & RTCCTL01; + } + if (time_is_valid) { + RTCCTL01 &= ~(RTCRDYIE | RTCRDYIFG); + } + + do { + rtciv = RTCIV; + switch (rtciv) { + case RTC_RTCRDYIFG: /* RTC ready: RTCRDYIFG */ + eventSet__ |= RTC_REASON_NONE; + break; + case RTC_RTCTEVIFG: /* RTC interval timer: RTCTEVIFG */ + case RTC_RT1PSIFG: /* RTC prescaler 1: RT1PSIFG */ + eventSet__ |= RTC_REASON_INTERVAL; + break; + case RTC_RTCAIFG: /* RTC user alarm: RTCAIFG */ + eventSet__ |= RTC_REASON_ALARM; + break; + default: + case RTC_NONE: /* No Interrupt pending */ + case RTC_RT0PSIFG: /* RTC prescaler 0: RT0PSIFG */ + break; + } + } while (RTC_NONE != rtciv); + + if (time_is_valid) { + unsigned int event_set = eventSet__; + eventSet__ = 0; + signal RealTimeClock.currentTime(&now, event_set); + } + } +} diff --git a/tos/platforms/red/hardware/sensors/MLX90614/MLX90614.h b/tos/platforms/red/hardware/sensors/MLX90614/MLX90614.h new file mode 100644 index 0000000000..ac4100c52e --- /dev/null +++ b/tos/platforms/red/hardware/sensors/MLX90614/MLX90614.h @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +//Melexis MLX90614ESF-BAA single zone IR thermometer, with on board ambient temperature sensor. +//This driver has been tested with the MLX90614ESF-BAA only but should work with the full range. + +#ifndef MLX90614_H +#define MLX90614_H + +//EEPROM Registers - all 16bit + +#define MLX_TOmax 0x20 //R/W - Object Temperature seen via the IR sensor Max, see datasheet +#define MLX_TOmin 0x21 //R/W - Object Temperature seen via the IR sensor Min, see datasheet +#define MLX_PWMCTRL 0x22 //R/W - Pulse width modulation control, not used here, we are I2C +#define MLX_TaRnge 0x23 //R/W - Temperature range, see datasheet +#define MLX_EMcc 0x24 //R/W - Emissivity correction coefficient, see datasheet +#define MLX_Conf1 0x25 //R/W - config register one, see datasheet +#define MLX_SMBusAddr 0x2E //R/W - SMBus address default is 0x005A +#define MLX_IDNum1 0x3C //R - Unique id number 1/4 +#define MLX_IDNum2 0x3D //R - Unique id number 2/4 +#define MLX_IDNum3 0x3E //R - Unique id number 3/4 +#define MLX_IDNum4 0x3F //R - Unique id number 4/4 + +//RAM Registers - all Read only - all 16bit + +#define MLX_RawIR1 0x04 //Raw temperature reading from object sensor one +#define MLX_RawIR2 0x05 //Raw temperature reading from object sensor two +#define MLX_Ta 0x06 //Temperature of the ambient sendor (in kelvin) +#define MLX_To1 0x07 //Temperature of the object sensor one (in kelvin) +#define MLX_To2 0x08 //Temperature of the object sensor two (in kelvin) + +//Commands +#define MLX_Status 0xF0 //Read Status register +#define MLX_Sleep 0xFF //Enter Sleep mode + +//MLX90614 Status FLAGS +enum { + MLX_EEBUSY = 7, + MLX_EE_DEAD = 5, + MLX_INIT = 4, +}; + +#define MLX_Default_Addr 0x005A + +#endif /* MLX90614_H */ diff --git a/tos/platforms/red/hardware/sensors/MLX90614/MLX90614.nc b/tos/platforms/red/hardware/sensors/MLX90614/MLX90614.nc new file mode 100644 index 0000000000..cdcd40ded1 --- /dev/null +++ b/tos/platforms/red/hardware/sensors/MLX90614/MLX90614.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +//Melexis MLX90614ESF-BAA single zone IR thermometer, with on board ambient temperature sensor. +//This driver has been tested with the MLX90614ESF-BAA only but should work with the full range. + +interface MLX90614{ + + //Read RAM/EEPROM location from MLX90614 device with address 'Address' and places in data + //Returns SUCCESS or FAIL + async command error_t read(uint8_t Address,uint8_t Reg,uint16_t *data); + + //Write to RAM/EEPROM of MLX90614 device with address 'Address' the value of data + //Returns SUCCESS or FAIL + async command error_t write(uint8_t Address,uint8_t Reg,uint16_t data); + + //Read the status FLAGS from MLX90614 device with address 'Address' and returns in Status 8bit value + //Returns in Status + //bit 7 6 5 4 3 2 1 0 + // | | | | | 0 0 0 + // | | | | Not implemented + // | | | INIT POR initialization routine is still ongoing, Active Low + // | | EE_DEAD - EEPROM double error has occurred, Active High + // | Not used + // EEBUSY - the previous write/erase EEPROM access is still in progress, Active High + //Returns SUCCESS or FAIL + async command error_t status(uint8_t Address, uint8_t *Status); + + //Put the MLX90614 into sleep mode + async command error_t sleep(uint8_t Address); +} diff --git a/tos/platforms/red/hardware/sensors/MLX90614/MLX90614C.nc b/tos/platforms/red/hardware/sensors/MLX90614/MLX90614C.nc new file mode 100644 index 0000000000..e96175a0c7 --- /dev/null +++ b/tos/platforms/red/hardware/sensors/MLX90614/MLX90614C.nc @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +//Melexis MLX90614ESF-BAA single zone IR thermometer, with on board ambient temperature sensor. +//This driver has been tested with the MLX90614ESF-BAA only but should work with the full range. + +configuration MLX90614C{ + provides interface MLX90614; + provides interface StdControl; +} +implementation{ + components MLX90614P; + components PlatformI2CC; + + MLX90614 = MLX90614P.MLX90614; + + MLX90614P -> PlatformI2CC.I2CPacket; + StdControl = PlatformI2CC.StdControl; +} diff --git a/tos/platforms/red/hardware/sensors/MLX90614/MLX90614P.nc b/tos/platforms/red/hardware/sensors/MLX90614/MLX90614P.nc new file mode 100644 index 0000000000..c77d5dc58b --- /dev/null +++ b/tos/platforms/red/hardware/sensors/MLX90614/MLX90614P.nc @@ -0,0 +1,210 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +//Melexis MLX90614ESF-BAA single zone IR thermometer, with on board ambient temperature sensor. +//This driver has been tested with the MLX90614ESF-BAA only but should work with the full range. + +#include +#include "MLX90614.h" +#include + +module MLX90614P{ + provides interface MLX90614; + + uses interface I2CPacket; +} +implementation{ + + union UReg { //Union to let us get the 16bit value from the 8bit bytes and Vicki versa + uint8_t data[3]; + uint16_t Result; + } RetVal; + + //Calculates the PEC and returns it. + //Used to validate the data both sent and received to/from the MLX90614 + //The PEC is a CRC-8 with polynomial X8+X2+X1+1 + unsigned char PEC_calculation(unsigned char pec[]) { + unsigned char crc[6]; + unsigned char BitPosition=47; + unsigned char shift; + unsigned char i; + unsigned char j; + unsigned char temp; + + do{ + crc[5]=0; /* Load CRC value 0x000000000107 */ + crc[4]=0; + crc[3]=0; + crc[2]=0; + crc[1]=0x01; + crc[0]=0x07; + BitPosition=47; /* Set maximum bit position at 47 */ + shift=0; + + //Find first 1 in the transmited message + i=5; /* Set highest index */ + j=0; + while((pec[i]&(0x80>>j))==0 && i>0){ + BitPosition--; + if(j<7){ + j++; + } + else{ + j=0x00; + i--; + } + }/*End of while */ + + shift=BitPosition-8; /*Get shift value for crc value*/ + + //Shift crc value + while(shift){ + for(i=5; i<0xFF; i--){ + if((crc[i-1]&0x80) && (i>0)){ + temp=1; + } + else{ + temp=0; + } + crc[i]<<=1; + crc[i]+=temp; + }/*End of for*/ + shift--; + }/*End of while*/ + + //Exclusive OR between pec and crc + for(i=0; i<=5; i++){ + pec[i] ^=crc[i]; + }/*End of for*/ + + }while(BitPosition>8);/*End of do-while*/ + return pec[0]; + } + + //Read RAM/EEPROM location from MLX90614 device with address 'Address' + //Returns 16bit register value + async command error_t MLX90614.read(uint8_t Address,uint8_t Reg,uint16_t* data) { + error_t error; + uint8_t PEC; //Used to store the calculated PEC value + unsigned char arr[6]; + + error = call I2CPacket.write(I2C_START, Address, 1, &Reg); + if(error==FAIL) { + printf("I2CPacket.write Failed\n\r"); + return FAIL; + } + + error = call I2CPacket.read(I2C_START | I2C_STOP, Address,3, RetVal.data); + if(error==FAIL) { + printf("I2CPacket.read Failed\n\r"); + return FAIL; + } + + arr[5]=Address; + arr[4]=Reg; + arr[3]=Address; + arr[2]=RetVal.data[0]; + arr[1]=RetVal.data[1]; + arr[0]=0; + PEC=PEC_calculation(arr); + + if((PEC=RetVal.data[2])) { + *data=RetVal.Result; + return SUCCESS; //All good return SUCCESS + } + return FAIL; //PEC check failed return error, again bad as 0xFFFF could be valid + } + + //Read RAM/EEPROM location from MLX90614 device with address 'Address' + //Returns SUCCESS or FAIL + async command error_t MLX90614.write(uint8_t Address,uint8_t Reg,uint16_t data) { + error_t error; + unsigned char arr[6]; + + RetVal.Result = data; //copy data into union + error = call I2CPacket.write(I2C_START, Address, 1, &Reg); //Select the register we want to write to + if(error==FAIL) { + return FAIL; + } + + arr[4]=Address; + arr[3]=Reg; + arr[2]=RetVal.data[0]; + arr[1]=RetVal.data[1]; + arr[0]=0; + RetVal.data[2]=PEC_calculation(arr); + + error = call I2CPacket.write(I2C_STOP, Address, 3, RetVal.data); //send the value and the PEC checksum + if(error==FAIL) { + return FAIL; + } + + return SUCCESS; + } + + //Read the status FLAGS from MLX90614 device with address 'Address' and returns 8bit value + //Returns: + //bit 7 6 5 4 3 2 1 0 + // | | | | | 0 0 0 + // | | | | Not implemented + // | | | INIT POR initialization routine is still ongoing, Active Low + // | | EE_DEAD - EEPROM double error has occurred, Active High + // | Not used + // EEBUSY - the previous write/erase EEPROM access is still in progress, Active High + async command error_t MLX90614.status(uint8_t Address,uint8_t *Status) { + uint16_t Result; + error_t error; + + error = call MLX90614.read(Address,MLX_Status,&Result); //Get the status of the MLX + if(error==FAIL) { + printf("MLX90614.read Status FAIL\n\r"); + return FAIL; + } + *Status=((uint8_t)Result & 0x00ff); //we only want the LSB 8 bits + return(SUCCESS); + } + + //Put the MLX90614 into sleep mode + async command error_t MLX90614.sleep(uint8_t Address) { + return (call I2CPacket.write(I2C_START | I2C_STOP, Address, 1, (uint8_t*)MLX_Sleep)); + } + + async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + } + + async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + } +} diff --git a/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025.h b/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025.h new file mode 100644 index 0000000000..a4fa47c92b --- /dev/null +++ b/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +#ifndef MC24_LC1025_H +#define MC24_LC1025_H + +#endif /* MC24_LC1025_H */ diff --git a/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025.nc b/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025.nc new file mode 100644 index 0000000000..5aed5d5748 --- /dev/null +++ b/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +interface MC24XX1025{ + //Reads from Address 'address' x 'len' data 'data' bytes and placing in buffer pointed to by data + //read will access automatically up to 4 24XX1025 + //No device/memory boundary checking is done, reading over devices/boundary will not work + //returns SUCCESS/FAIL + async command error_t read(uint32_t address, uint8_t *data, uint8_t len); + + //write to Address 'address' data for len bytes + //write will access automatically up to 4 24XX1025 + //No device/memory boundary checking is done, writing over devices/boundary will not work + //returns SUCCESS/FAIL + async command error_t write(uint32_t address, uint8_t *data, uint8_t len); +} diff --git a/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025C.nc b/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025C.nc new file mode 100644 index 0000000000..e211afc85b --- /dev/null +++ b/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025C.nc @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +//Microchip 24XX1025 EEPROM Driver +//This driver has been tested with the 24AA1025 + +configuration MC24XX1025C{ + provides interface MC24XX1025; + provides interface StdControl; +} +implementation{ + components MC24XX1025P; + components PlatformI2CC; + + MC24XX1025 = MC24XX1025P.MC24XX1025; + + MC24XX1025P -> PlatformI2CC.I2CPacket; + StdControl = PlatformI2CC.StdControl; +} diff --git a/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025P.nc b/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025P.nc new file mode 100644 index 0000000000..53670efbc8 --- /dev/null +++ b/tos/platforms/red/hardware/storage/MC24XX1025/MC24XX1025P.nc @@ -0,0 +1,179 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +//Microchip 24XX1025 EEPROM Driver +//This driver has been tested with the 24AA1025 + +#include +#include "MC24XX1025.h" +#include + +module MC24XX1025P{ + provides interface MC24XX1025; + + uses interface I2CPacket; +} +implementation{ + + //GetControls + //Returns all the controls needed to read/write + //Params + //address - address to start read/write operation + //len - requested number of bytes to read/write + //Returns in + //Ctl - the Control byte the EEPROM requires, this selects the correct physical device and the correct block with in the device + //blen - the number of bytes to read/write (up to boundary), max 128 + //EEAddr - two 8 bit bytes used to address the EEPROM + void GetControls(uint32_t address,uint8_t len,uint8_t* Ctl,uint8_t* blen,uint8_t* EEAddr) { + uint8_t Control=0x50; //Control code 1010 + Block + Chip ID + union { + uint32_t address; //1 x 32 bit byte + uint8_t add[4]; //4 x 8 bit bytes + } Adr; //Used to split the 32bit address + Adr.address = address; //Copy the address sent to us into the union + + if((0x0000FFFF-(address & 0x0000FFFF))+1>=128) { //set the number of bytes we can rewad/write up to boundary + *blen=len; //set blen to len, we have space for all bytes + } else { + *blen=(0x0000FFFF-(address & 0x0000FFFF))+1; //set blen to bytes available to next boundary + } + //chip zero bank 0 by default + if((address & 0x00010000) == 0x10000) Control=Control+4; //chip zero bank 1 + if((address & 0x00020000) == 0x20000) Control=Control+1; //chip one bank 0 + if((address & 0x00030000) == 0x30000) Control=Control+5; //chip one bank 1 + if((address & 0x00040000) == 0x40000) Control=Control+2; //chip two bank 0 + if((address & 0x00050000) == 0x50000) Control=Control+6; //chip two bank 1 + if((address & 0x00060000) == 0x60000) Control=Control+3; //chip three bank 0 + if((address & 0x00070000) == 0x70000) Control=Control+7; //chip three bank 1 + *Ctl=Control; //Return the control byte as we've calc'ed it + + *EEAddr++=Adr.add[1]; //The 24XX1025 expects the high byte first + *EEAddr=Adr.add[0]; //Followed by the low byte + } + + //read + //Reads from the EEPROM array len (128 bytes max) bytes and put the data into data + //Returns SUCCESS/FAIL + async command error_t MC24XX1025.read(uint32_t address, uint8_t *data, uint8_t len) { + error_t error; + uint8_t Control; + uint8_t ReadLen; + uint8_t EEAddr[2]; + + if(len>128) return FAIL; + + GetControls(address,len,&Control,&ReadLen,EEAddr); // + error = call I2CPacket.write(I2C_START, Control, 2, EEAddr); //Set the address on the correct device + if(error==FAIL) { + printf("MC24XX1025.read - I2CPacket.write(0) FAIL\n\r"); + return FAIL; + } + //printf("GetControls address = %lx,len = %d,Control = %d,ReadLen = %d\n\r",address,len,Control,ReadLen); + + error = call I2CPacket.read(I2C_START | I2C_STOP, Control, ReadLen, data);//read the data upto the boundary (phyical or block) + if(error==FAIL) { + printf("MC24XX1025.read - I2CPacket.read(1) FAIL\n\r"); + return FAIL; + } + + if((len-ReadLen)>0) { //if we have anymore data to read + address=address+ReadLen; //set the address to the address plus the bytes we have already read + data=data+ReadLen; //set the data pointer to the correct place + len=len-ReadLen; //set the len to the remaining number of bytes to write + GetControls(address,len,&Control,&ReadLen,EEAddr); // + error = call I2CPacket.write(I2C_START, Control, 2, EEAddr); //Set the address on the correct device + if(error==FAIL) { + printf("MC24XX1025.read - I2CPacket.write(2) FAIL\n\r"); + return FAIL; + } + //printf("GetControls address = %lx,len = %d,Control = %d,ReadLen = %d\n\r",address,len,Control,ReadLen); + + error = call I2CPacket.read(I2C_START | I2C_STOP, Control, ReadLen, data);//Read the remaining bytes + if(error==FAIL) { + printf("MC24XX1025.read - I2CPacket.read(3) FAIL\n\r"); + return FAIL; + } + } + return SUCCESS; + } + + //write + //Writes to the EEPROM array len (128 bytes max) bytes from data + //Returns SUCCESS/FAIL + async command error_t MC24XX1025.write(uint32_t address, uint8_t *data, uint8_t len) { + error_t error; + uint8_t Control; + uint8_t WriteLen; + uint8_t EEAddr[2]; + uint8_t Msg[131]; + + if(len>128) return FAIL; + + GetControls(address,len,&Control,&WriteLen,EEAddr); // + //printf("write GetControls address = %lx,len = %d,Control = %d,WriteLen = %d\n\r",address,len,Control,WriteLen); + + memcpy(&Msg[0],&EEAddr[0],2); + memcpy(&Msg[2],data,WriteLen); + + error = call I2CPacket.write(I2C_START | I2C_STOP, Control, WriteLen+2, Msg); //write the data upto the boundary (phyical or block) + if(error==FAIL) { + printf("MC24XX1025.write - I2CPacket.write(1) FAIL\n\r"); + return FAIL; + } + + if((len-WriteLen)>0) { //if we have anymore data + address=address+WriteLen; //set the address to the address plus the bytes we have already written + data=data+WriteLen; //set the data pointer to the correct place + len=len-WriteLen; //set the len to the remaining number of bytes to write + GetControls(address,len,&Control,&WriteLen,EEAddr); // + //printf("write GetControls address = %lx,len = %d,Control = %d,WriteLen = %d\n\r",address,len,Control,WriteLen); + + memcpy(&Msg[0],&EEAddr[0],2); + memcpy(&Msg[2],data,WriteLen); + error = call I2CPacket.write(I2C_START | I2C_STOP, Control, WriteLen+2, Msg); //write the remaining bytes + if(error==FAIL) { + printf("MX24XX1025.write - I2CPacket.write(3) FAIL\n\r"); + return FAIL; + } + } + + return SUCCESS; + } + + async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ } + + async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ } +} From ca8a1f0b59c64dc55c14f534fe5990c288802616 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Sat, 23 Jul 2011 00:28:11 -0700 Subject: [PATCH 152/411] Include definition of msp430-int-svn branch. --- README | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/README b/README index 2cd941ab8b..3f754070c6 100644 --- a/README +++ b/README @@ -1,8 +1,9 @@ - TinyProd tp-freeforall/prod msp430-int: msp430 integration msp430-int-pu: msp430 integration (proposed updates) +msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. + If in doubt, branch off from msp430-int-pu. From c8fd4ab187b7975f15c47e9f18cd3e9e37dbbbba Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 24 Jul 2011 23:09:42 -0700 Subject: [PATCH 153/411] msp430/pins: HplMsp430GeneralIOC, missed some formatting (minor edit) UCA1... pin definitions (wrong formatting) --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 30 +++++++++++--------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 5baf4917db..f026e1d525 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -335,19 +335,19 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as UCB0SDA; provides interface HplMsp430GeneralIO as UCB0CLK; - provides interface HplMsp430GeneralIO as UCA1CLK; - provides interface HplMsp430GeneralIO as UCA1STE; - provides interface HplMsp430GeneralIO as UCA1TXD; - provides interface HplMsp430GeneralIO as UCA1RXD; - provides interface HplMsp430GeneralIO as UCA1SIMO; - provides interface HplMsp430GeneralIO as UCA1SOMI; - - provides interface HplMsp430GeneralIO as UCB1CLK; - provides interface HplMsp430GeneralIO as UCB1STE; - provides interface HplMsp430GeneralIO as UCB1SIMO; - provides interface HplMsp430GeneralIO as UCB1SOMI; - provides interface HplMsp430GeneralIO as UCB1SDA; - provides interface HplMsp430GeneralIO as UCB1SCL; + provides interface HplMsp430GeneralIO as UCA1CLK; + provides interface HplMsp430GeneralIO as UCA1STE; + provides interface HplMsp430GeneralIO as UCA1TXD; + provides interface HplMsp430GeneralIO as UCA1RXD; + provides interface HplMsp430GeneralIO as UCA1SIMO; + provides interface HplMsp430GeneralIO as UCA1SOMI; + + provides interface HplMsp430GeneralIO as UCB1CLK; + provides interface HplMsp430GeneralIO as UCB1STE; + provides interface HplMsp430GeneralIO as UCB1SIMO; + provides interface HplMsp430GeneralIO as UCB1SOMI; + provides interface HplMsp430GeneralIO as UCB1SDA; + provides interface HplMsp430GeneralIO as UCB1SCL; // Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 @@ -928,7 +928,7 @@ implementation { UCB1SCL = P54; UCB1CLK = P55; - // Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 +// Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 ADC0 = P60; ADC1 = P61; @@ -940,7 +940,9 @@ implementation { ADC7 = P67; ADC8 = P50; ADC9 = P51; + // there are no ADC's 10 and 11 according to datasheet + ADC12 = P74; ADC13 = P75; ADC14 = P76; From 7bf5991f46ae175608a3ca0a4ea75e26a75619b1 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 24 Jul 2011 23:30:04 -0700 Subject: [PATCH 154/411] update 01_Repo_notes to better reflect workflow, using int-pu branch Update workflow to denote working branches feed local int-pu branch which feeds via a pull request the main int-pu branch on github. Add new sections for Further Integration and Backmerging. --- 01_Repo_Notes | 154 +++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 133 insertions(+), 21 deletions(-) diff --git a/01_Repo_Notes b/01_Repo_Notes index 38b0319a8e..fd15bfa99e 100644 --- a/01_Repo_Notes +++ b/01_Repo_Notes @@ -169,18 +169,23 @@ msp430-int-pu: new proposed changes to msp430-int are first integrated here. -Workflow: (github user: Robert Hunter) +Workflow: (simulated github user: Robert Hunter) on github, fork github.com/tp-freeforall/prod (as Robert Hunter) (this creates the github repo, github.com/roberthunter/prod) - Assumes that the main feature integration branch on tp-freeforall is - msp430-int and its pu branch (proposed updates) is msp430-int-pu. + The feature branch that Robert is working on is msp430 core integration. + The main branch is msp430-int and updates get brought in via msp430-int-pu, + (proposed updates). - When the initial workinig repository is created the remote origin - is created. In the example below this refers to git@github.com: - roberthunter/prod.git. We also want a remote for the upstream called - "up". + When the initial local repository is created (via cloning) the remote + "origin" is created. In the example below this refers to git@github.com: + roberthunter/prod.git and is read/write (assuming Robert set up his github + account properly with his SSH key). + + We also want a remote for the upstream called "up", for upstream. In this + example the upstream is always the repository Robert forked from, + github:tp-freeforall/prod. mkdir -p ~/w/rh cd ~/w/rh @@ -198,32 +203,121 @@ tp-freeforall/prod fork -> tp-freeforall/prod.git msp430-int-pu branch - roberthunter/prod.git - msp430-int-pu branch - rh branch + fork -> roberthunter/prod.git + msp430-int-pu branch + rh branch ...... rh changes --- | | integration step + | + -------------------- msp430-int-pu + ^ + | local pull tp-freeforall/prod.git | - msp430-int-pu ------------- + msp430-int-pu ------------------------ + | |integration step | - msp430-int ------------- + msp430-int ------------- Robert Hunter makes changes and commits his working branch (rh) on his local -repo (local). This gets pushed to github/roberthunter/prod.git and lives as -the rh branch in that repo. +repo (local). As needed he may keep his working branch (rh) upto date with +the current state of msp430-int-pu (from up/msp430-int-pu, which is coming +from github:tp-freeforall/prod(msp430-int-pu). + +When he is happy with the state of his development, he brings his commits +into the msp430-int-pu branch , after first freshing the local copy with +the current state from the upstream (github:tp-freeforall/prod(msp430-int-pu)). + +The new local version of the integration branch (local:(msp430-int-pu) is +modified to look like how you want it. This local copy gets published to the +github repository (github:roberthunter/prod(msp430-int-pu) and a pull request is +generated. The upstream (github:tp-freeforall/prod(msp430-int-pu)) pulls the +changes yeilding the new upstream. + +Succinctly: + + mkdir -p ~/w/rh + cd ~/w/rh/tinyos-2.x # inside existing local repo + git checkout rh # branch off msp430-int-pu + + work work work, busy little bee + keep commits small and logical + use good commit messages. + + git add -u # add to index + git commit # check the changes in, msg in editor + + git checkout msp430-int-pu # integration branch is msp430-int-pu + git fetch up # update from the upstream + git merge up/msp430-int-pu # make sure our local is up to date + + # the simplest method assumes that all of the most current changes on the + # rh branch are getting pulled over into msp430-int-pu. We first rebase + # the rh branch onto the tip of the msp430-int-pu to clean up the history + # and then simply fast forward msp430-int-pu + + git checkout rh + git rebase msp430-int-pu # move rh to tip of map430-int-pu + git checkout msp430-int-pu + git merge rh # advance msp430-int-pu to include rh + # should be a fast-forward + + # if you have published rh at github:roberthunter/prod(rh) then you will have + # to override the remote branch when you push. This is because the SHAs of + # rh change when you rebase. It is rewriting the history of the change set + # to be based off the current version of msp430-int-pu. + + git push origin +rh + + + # If the change set is complicated or if only pieces of the change set + # needs to be brought over, then cherry-pick should be used. + + git checkout msp430-int-pu + git fetch up + git merge up/msp430-int-pu + + # for each commit on rh that needs to be included in msp430-int-pu + git cherry-pick -The integrator pulls these changes after review into the -tp-freeforall/prod(msp430-int-pu) branch. After other changes from other -developers comes in and msp430-int-pu has sufficiently matured, msp430-int-pu -is merged into tp-freeforall/prod(msp430-int). + + + # To see what changes you are bringing over use the following: + git log --oneline up/msp430-int-pu..msp430-int-pu + + # to see the changes you are bringing over + git diff up/msp430-int-pu msp430-int-pu + + +When the new msp430-int-pu is ready, push it back to your published fork on +github: ie. github:roberthunter/prod(msp430-int-pu). + + git push origin msp430-int-pu + +Robert then requests a pull from his repositories main page. + + https://github.com/roberthunter/prod/pull/new/msp430-int-pu + +This requests a pull from github:roberthunter/prod(msp430-int-pu) to +github:tp-freeforall/prod(msp430-int-pu). + + +* Further Integration + +The integration master for msp430-int-pu reviews the changes and when approved +will pull the changes into github:tp-freeforall/prod(msp430-int-pu). + +After the upstream merge is complete, developers using msp430-int-pu should +refresh their local copies of the upstream branch. + +After other changes from other developers comes in and msp430-int-pu has +sufficiently matured, msp430-int-pu is merged into tp-freeforall/prod(msp430-int). Testing of the integration branches happens on tp-freeforall/prod(feature-int). -Groups of features are combined on tp-freeforall/prod(pu) [tp-freeforall/prod -repository on github, pu (proposed updates) branch] which migrates to the -next branch as the branch matures and the changes are accepted. +Groups of features are combined on github:tp-freeforall/prod(pu) [proposed updates], +which migrates to the next branch as the branch matures and the changes are accepted. When all integration branches have matured sufficiently, they are merged together, tested, and becomes tinyprod/prod(master) as a new release. The @@ -231,10 +325,28 @@ intent is to release features as they become available using a continuous release process. +* Backmerging + While various integration work is being done, working branches should be refreshed with more current content from the integration repositories. This is referred to as a backmerge. +After a proposal has been accepted and integrated into the integration branch, +it is important to update the state of the local and working repos with the +new integration branch data. This will effectively move the working branches +onto the tip of the new integration branch (msp430-int-pu). + + cd ~/w/rh/tinyos-2.x + git fetch up # get current upstream data + git checkout msp430-int-pu # update local copy + git merge up/msp430-int-pu + git checkout rh # switch to working branch + git rebase msp430-int-pu # move to tip of integration + + +Another operation routinely done is updating working branches from the +integration master (ie. msp430-int-pu). + For example, Robert wants to make sure that his changes are consistent with what is happening on the tp-freeforall/prod(msp430-int-pu) branch. He accomplishes this by the following commands: From c27b2cce7bcc65a2d5f66a4e1fcfe04173e9d143 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 25 Jul 2011 02:26:44 -0700 Subject: [PATCH 155/411] Split out workflow and process, seperate file, 00a_Contribution_Process --- 00_Getting_Started | 83 ++----- 00a_Contribution_Process | 466 +++++++++++++++++++++++++++++++++++++++ 01_Repo_Notes | 204 +---------------- 3 files changed, 492 insertions(+), 261 deletions(-) create mode 100644 00a_Contribution_Process diff --git a/00_Getting_Started b/00_Getting_Started index 1aaac23923..0f4e04d9c4 100644 --- a/00_Getting_Started +++ b/00_Getting_Started @@ -83,6 +83,10 @@ by making the contribution process very easy as well as accessable. * Set Up Git. + This section details items that only need to be when first getting started. + For more information on using git and contributing to the project please + see 00a_Contribution_Process. + o set up SSH keys. If you have an existing SSH key you can use it. Existing keys can typically be found in ~/.ssh. The instructions have you backup and remove and then regenerating a new ssh key. You don't @@ -168,6 +172,9 @@ redacted)... See 00_Repo_Notes for the structure of the repositories and their relationships. + Also see 00a_Contribution_Process for examples of how to interacte with the + various branches and repositories. + The main repo is https://github.com/tinyprod/prod with an integration repo at https://github.com/tp-freeforall/prod. (The later is a fork off tinyprod/prod). @@ -177,73 +184,14 @@ redacted)... between different developers. Contributors work initially on a contributor branch in their local - repository. After these changes have been vetted they will be brought over - to an integration branch in tp-freeforall/prod. After integration, these - changes will be pulled into the mainline (master) in tinyprod/prod where - they will be part of the next release. - - - o Log in to your github account - - o Create a working fork. Working repos are forked off the main working - repository located at: - - https://github.com/tp-freeforall/prod - - This will bring up the main page for the tp-freeforall/prod repo. - - To create a working repo, click on the fork button. This will create a - fork of tp-freeforall/prod in your local context (your login context). - - This will create the repository github.com//prod - which is forked off github.com/tp-freeforall/prod. All working repos are - forked off the tp-freeforall/prod repo. This is to keep the amount of - extra data in the main repository down to a minimum. - - o Create your local repo. - - mkdir -p w/prod # create working directory - cd w/prod - git clone git@github.com:/prod.git tinyos-2.x - cd tinyos-2.x - - # you will now have w/prod/tinyos-2.x populated with the default branch - # of the fork. Your fork will inherit the default branch from - # tp-freeforall/prod repo. - # - # this will create the remote origin linked to your working fork on github - - # you will also want to track changes coming into tp-freeforall, so - # create a remote that will be used for tracking. And pull in information - # from the repository. - - git remote add up git://github.com/tp-freeforall/prod.git - git fetch up - - o Create your working branch. - - git branch # make sure on the appropriate branch - # should show msp430-int-pu which is the - # current default branch. - git checkout -b gu # create the working branch - # gu are your initials or another - # meaningful name. gu is used here - # as an example, it stands for - # github_user but should - - - git add -u # add changed files that are tracked. - git commit # commit. editor will get invoked - # for the commit message. - # - # please see Guidelines for a guide - # on how to write good commit messages - - # when you are ready to publish your changes, push the changes back to - # your working fork on github. - - git push + repository. When a contributor is happy with the work they have done, + they will integrate their changes into a local copy of the integration + branch. This integration branch is pushed back to the contributor's + github fork and a request for a pull is made between the contributor's + branch and the main integration branch. + Please refer to 00a_Contribution_Process for details on how to set up + your working repository. * Further Reading @@ -277,7 +225,8 @@ redacted)... In particular, please read Integration-Manger Workflow (its what we are using). And we have added one more repository to the left of the - Blessed Repository which is VeryBlessed. :-) + Blessed Repository which is VeryBlessed. :-) [VeryBlessed is the + github:TinyProd/prod repository]. Also please read, Contributing to a Project. Some of what is written there is also summarized in the Guidelines section below. diff --git a/00a_Contribution_Process b/00a_Contribution_Process new file mode 100644 index 0000000000..fc486e371f --- /dev/null +++ b/00a_Contribution_Process @@ -0,0 +1,466 @@ +00a_Contribution_Process + +This document describes and give details for how to contribute to the TinyProd +repositories. + +1) Notation: + + * We reference a fictional developer throughout this document, Robert Hunter, + whose initials are rh. + + * Github has a notion of context and repositories are owned by that context. + Contexts maybe a github owner or maybe a github organization which can + associate owners and contributors and associate them to a repository. + + github:/ is used to refer to a repository hosted on + github.com. + + local: refers to your local working repository. + + * Branch names are presented in parentheses. + ie: "github:tp-freeforall/prod(msp430-int-pu)" is the msp430-int-pu branch + in the tp-freeforall/prod.git repository (on github.com). + "local(msp430-int-pu)" refers to the msp430-int-pu branch in your local + working repository. + + Note: local(msp430-int-pu) and github:tp-freeforall/prod(msp430-int-pu) + are not necessarily the same git object. If the local repository has + diverged (or conversly if tp-freeforall/prod has diverged) then these + object will most certainly not be the same. + + * Remote branch names. + + Remote branches take the form "remotes//". A local + git repository can be configured to refer to remote git repositories using + the "git remote add" command. When data is fetched from that repository + the branches references will be prepended with the "remotes/" + prefix. + + Remote branches when unique may be referenced using any of the following + forms: + + remotes// full specification. + + / + + /prod developer fork of tp-freeforall. Used to host + published developer branches. Refered to as the + developer repo. + + local local developer repository. Located on the + development system. Where the actual work + gets done. Refered to as Developer Local or + just "local". + + pushes and pulls to github:/prod + +3) Common Branch Names. + + There are several persistent branches in the tinyprod and tp-freeforall + repositories. Also persistent branches will be created for ongoing + integration efforts for various features or efforts. + +VeryBlessed (release) repository: (github:tinyprod/prod) + + master: The main release line in TinyProd. Current stable point. + master-pu: proposed updates for next release, accepted and integrated. + master-next: 1st stage updates for next release. + + svn/upstream: tracks the upstream SVN T2 trunk. This is manually updated + to schedule potential impact on downstream development. + + master-next feeds master-pu which feeds master. When the next release + is done, master-pu becomes master and new master-pu and master-next + branches are started. + + +Blessed (integration) repository: (github:tp-freeforall/prod) + + Typically branches from the TinyProd repository will be tracked in the + tp-freeforall/prod repository. In addition, feature integration and other + integration branches will exist to facilitate cooperation/convergence + between distributed developers. + + integration: If multiple features need to be merged into a single + whole this is where that happens. + + -int: main integration branch for a feature. ie. + github:tp-freeforall/prod(msp430-int) is the + integration branch for the new msp430 core + being brought into tinyos. + + -int-next: ie. github:tp-freeforall/prod(msp430-int-next) + Accepted changes updates for the feature. Will + get merged into -int. + + -int-pu: ie. github:tp-freeforall/prod(msp430-int-pu) + proposed updates for the feature. + + Note that branches are only created if the complexity of the development + structure warrants the complexity. This is left up to the discretion + of the integration manager. + + +Local repository: + + The above branches will show up in the local repository based off remotes. + + Typically there will be an origin remote ("origin") for the developers + repo from github, and an upstream remote ("up") for the source repo that + the developer forked, (github:tp-freeforall/prod). The upstream tracks + changes as they become integrated and allows the developer to track these + changes locally. + + For example, we might see the following (assuming the developer Robert + Hunter): + + bash(30): git remote -v show + origin git@github.com:roberthunter/prod.git + up git://github.com/tp-freeforall/prod.git + + remotes/up/master current branch values from the upstream + remotes/up/svn/upstream tp-freeforall/prod at the time of the last + remotes/up/msp430-int fetch. + remotes/up/msp430-int-pu + + remotes/origin/rh branch values from the developers published + remotes/origin/master repository at the time the repository was + remotes/origin/svn/upstream originally forked or if the branches are + remotes/origin/msp430-int updated by the developer. (not automatic). + remotes/origin/msp430-int-pu + + + Typically, the developer will only update origin branches for those + branches of immediate concern. Typically, the working branch (rh) and the + feature branch being integrated with. + + +4) Creating your published and working repositories and associated working branches. + + o Log in to your github account + + o Create a working fork. Working repos are forked off the integration + repository, github:tp-freeforall/prod. See the url: + + https://github.com/tp-freeforall/prod + + This will bring up the main page for the tp-freeforall/prod repo. + + To create a working repo, click on the fork button. This will create a + fork of tp-freeforall/prod in your local context (your login context). + + This will create the repository github.com//prod + which is forked off github.com/tp-freeforall/prod. All working repos are + forked off the tp-freeforall/prod repo. This is to keep the amount of + extra data in the main repository down to a minimum. + + For our virtual user this will create the repository + github:roberthunter/prod + + o Create your local repo. + + mkdir -p w/rh # create working directory + cd w/rh + git clone git@github.com:roberthunter/prod.git tinyos-2.x + cd tinyos-2.x + + # you will now have w/rh/tinyos-2.x populated with the default branch + # of the fork. Your fork will inherit the default branch from + # tp-freeforall/prod repo. Currently this is msp430-int-pu. But you + # will want to check to see where you are. + # + # this will create the remote origin linked to your working fork on github. + + # you will also want to track changes coming into tp-freeforall, so + # create a remote that will be used for tracking. And pull in information + # from the repository. + + git remote add up git://github.com/tp-freeforall/prod.git + git fetch up + + o Create your working branch. For Robert Hunter we use his initials + as the working branch name. This will be published as + github:roberthunter/prod(rh) if this branch is pushed (published) + to Robert Hunter's Developer Repository (on github). + + git branch # make sure on the appropriate branch + # should show msp430-int-pu which is the + # current default branch. + git checkout -t up/msp430-int-pu # create a tracking branch. + git checkout -b rh # create the working branch off the + # current branch (msp430-int-pu) + + + + git add -u # add changed files that are tracked. + git commit # commit. editor will get invoked + # for the commit message. + + # please see Guidelines in 00_Getting_Started for a guide on how to write + # good commit messages. It really is important to write decent commit + # messages. + + # when you are ready to publish your changes, push the changes back to + # your working fork on github. + + git push origin rh + + +5) Workflow: (simulated github user: Robert Hunter) + + on github, fork github.com/tp-freeforall/prod (as Robert Hunter) + (this creates the developer repo on github, github.com/roberthunter/prod) + + The feature branch that Robert is working on is msp430 core integration. + The main branch is msp430-int and updates get brought in via msp430-int-pu, + (proposed updates). + + Robert's working branch (rh) starts off msp430-int-pu. + + When the initial local repository is created (via cloning) the remote + "origin" is created. In the example below this refers to git@github.com: + roberthunter/prod.git and is read/write (assuming Robert set up his github + account properly with his SSH key). + + We also want a remote for the upstream called "up", for upstream. In this + example the upstream is always the repository Robert forked from, + github:tp-freeforall/prod. + + mkdir -p ~/w/rh + cd ~/w/rh + git clone git@github.com:roberthunter/prod.git tinyos-2.x + cd tinyos-2.x + git remote add up git://github.com/tp-freeforall/prod.git + git fetch up + git checkout -t up/msp430-int-pu # create a local tracking branch + git checkout -b rh # create the rh branch off msp430-int-pu + + # We are publishing the new values for the branches rh and msp430-int-pu + # in github:roberthunter/prod. The values of these branches in the local + # repository are remotes/origin/rh and remotes/origin/msp430-int-pu. Not + # to be confused with remotes/up/msp430-int-pu which is the branch state + # as currently known locally from the upstream. + + git push origin rh + git push origin msp430-int-pu + + +Robert Hunter makes changes and commits his working branch (rh) to his local +repository. + +He may also publish his working branch to his developer repository +on github (github:roberthunter/prod(rh)) to allow others to observe what +he is doing. + +He will also want to keep his working branch (rh) up to date with the +main branch he cares about, msp430-int-pu from the upstream. +(github:tp-freeforall/prod(msp430-int-pu)). + +When he is happy with the state of his development, he brings his commits +into his local copy of the msp430-int-pu branch, (he first needs to make +sure that local(msp430-int-pu) is up to date wrt the upstream, +github:tp-freeforall/prod(msp430-int-pu)). + +The new local version of the integration branch (local(msp430-int-pu)) should +be constructed to be the new upstream msp430-int-pu. This local copy gets +published to the developer's repository at github +(github:roberthunter/prod(msp430-int-pu) and a pull request is generated. +The upstream (github:tp-freeforall/prod(msp430-int-pu)) pulls the changes +yielding the new upstream. + + +Succinctly: + +* Making changes to the local working area and repository (local(rh)). + + mkdir -p ~/w/rh + cd ~/w/rh/tinyos-2.x # inside existing local repo + git checkout rh # branch off msp430-int-pu + + work work work, busy little bee + keep commits small and logical + use good commit messages. + + git add -u # add to index + git commit # check the changes in, msg in editor + + + +Another operation routinely done is updating working branches from the +integration master (ie. msp430-int-pu). + +For example, Robert wants to make sure that his changes are consistent with +what is happening on the tp-freeforall/prod(msp430-int-pu) branch. He +accomplishes this by the following commands: + + cd ~/w/rh/tinyos-2.x + git fetch up # get current information from + # tp-freeforall + + git checkout rh # make sure on rh branch + git merge up/msp430-int-pu # merge in the current + # proposed integration branch + # which is the feature Robert is + # working on. +* refreshing the local copy of msp430-int-pu + + git checkout msp430-int-pu # integration branch is msp430-int-pu + git fetch up # update from the upstream + git merge up/msp430-int-pu # make sure our local is up to date + + +* Update local branch with upstream changes. + + Integrate changes from up/msp430-int-pu into the working repository. One + mechanism assumes relatively simple changes so uses "git-rebase" to move + the working branch on to the new tip of msp430-int-pu. + + WARNING: This is only recommended here because the local(rh) branch is + intended to be private and not a published branch used by others to base + their work on. In other words, it is expressly assumed that others will + not be forking or basing their work on branch names (git objects) inherited + from a private developer repository. + + If people will be sharing state from your private developer repository don't + use rebase. Rather all of your repository branch manipulation should be + done using "git merge" rather than "git rebase". + + "git rebase" is suggested because it's result in some what cleaner and + easier to read histories. + + git checkout msp430-int-pu # refresh local copy + git fetch up + git merge up/msp430-int-pu + git checkout rh # switch back to working + git rebase msp430-int-pu + + # rh has now been rewritten to be on the new tip of msp430-int-pu as + # imported from the upstream. + + +* Move the current local(rh) branch to the tip of the updated msp430-int-pu + and publish the result. + + # the simplest method assumes that all of the most current changes on the + # rh branch are getting pulled over into msp430-int-pu. We first rebase + # the rh branch onto the tip of the msp430-int-pu to clean up the history + # and then simply fast forward msp430-int-pu + + # first make sure msp430-int-pu is current + + git checkout msp430-int-pu + git fetch up + git merge up/msp430-int-pu + + git checkout rh + git rebase msp430-int-pu # move rh to tip of map430-int-pu + git checkout msp430-int-pu + git merge rh # advance msp430-int-pu to include rh + # should be a fast-forward + + # if you have published rh at github:roberthunter/prod(rh) then you will have + # to override the remote branch when you push. This is because the SHAs of + # rh change when you rebase. It is rewriting the history of the change set + # to be based off the current version of msp430-int-pu. + # + # If you don't publish your current working branch you don't need to do this + # because the branch rh doesn't exist or isn't being moved. + + git push origin +rh # only if you publish. + git push origin msp430-int-pu # publish the new version of msp430-int-pu + + +* Complicated move of particular commits from working branch to local int-pu + + # If the change set is complicated or if only pieces of the change set + # needs to be brought over, then cherry-pick should be used. + + git checkout msp430-int-pu + git fetch up + git merge up/msp430-int-pu + + # for each commit on rh that needs to be included in msp430-int-pu + git cherry-pick + + +* Looking at differences between working branch and integration branch + + # To see what changes you are bringing over use the following: + git log --oneline up/msp430-int-pu..msp430-int-pu + + # to see the changes you are bringing over + git diff up/msp430-int-pu msp430-int-pu + + +* Publishing. + +When the new msp430-int-pu is ready, push it back to your published fork on +github: ie. github:roberthunter/prod(msp430-int-pu). + + git push origin msp430-int-pu + +Robert then requests a pull from his repositories main page. + + https://github.com/roberthunter/prod/pull/new/msp430-int-pu + +This requests a pull from github:roberthunter/prod(msp430-int-pu) to +github:tp-freeforall/prod(msp430-int-pu). + + +* Further Integration + +The integration master for msp430-int-pu reviews the changes and when approved +will pull the changes into github:tp-freeforall/prod(msp430-int-pu). + +After the upstream merge is complete, developers using msp430-int-pu should +refresh their local copies of the upstream branch. + +After other changes from other developers comes in and msp430-int-pu has +sufficiently matured, msp430-int-pu is merged into tp-freeforall/prod(msp430-int). + +Testing of the integration branches happens on tp-freeforall/prod(feature-int). +Groups of features are combined on github:tp-freeforall/prod(pu) [proposed updates], +which migrates to the next branch as the branch matures and the changes are accepted. + +When all integration branches have matured sufficiently, they are merged +together, tested, and becomes tinyprod/prod(master) as a new release. The +intent is to release features as they become available using a continuous +release process. + + +* Backmerging + +While various integration work is being done, working branches should be +refreshed with more current content from the integration repositories. This +is referred to as a backmerge. + +After a proposal has been accepted and integrated into the integration branch, +it is important to update the state of the local and working repos with the +new integration branch data. This will effectively move the working branches +onto the tip of the new integration branch (msp430-int-pu). + + cd ~/w/rh/tinyos-2.x + git fetch up # get current upstream data + git checkout msp430-int-pu # update local copy + git merge up/msp430-int-pu + git checkout rh # switch to working branch + git rebase msp430-int-pu # move to tip of integration + + or + + git merge msp430-int-pu # depending. diff --git a/01_Repo_Notes b/01_Repo_Notes index fd15bfa99e..115a9e3367 100644 --- a/01_Repo_Notes +++ b/01_Repo_Notes @@ -80,8 +80,8 @@ tp-freeforall/prod repository. Local repositories are referenced using local(branch). local(remote/branch). -See 00_Getting_Started for more details on how to contribute to the TinyProd -repositories. +Also see 00_Getting_Started and 00a_Contribution_Process for more details on +getting started and using git to contribute. @@ -119,7 +119,13 @@ msp430-int, svn-vhsb, swreset, and motenet-rel). -user branches are working branches in user working forks. +user branches are working branches in user working forks. ie. + + local(msp430-int-pu) refers to the msp430-int-pu branch in the + local working repository. + + github:roberthunter/prod(rh) refers to the branch rh (a developer branch) + in the developer repository at github. @@ -169,194 +175,4 @@ msp430-int-pu: new proposed changes to msp430-int are first integrated here. -Workflow: (simulated github user: Robert Hunter) - - on github, fork github.com/tp-freeforall/prod (as Robert Hunter) - (this creates the github repo, github.com/roberthunter/prod) - - The feature branch that Robert is working on is msp430 core integration. - The main branch is msp430-int and updates get brought in via msp430-int-pu, - (proposed updates). - - When the initial local repository is created (via cloning) the remote - "origin" is created. In the example below this refers to git@github.com: - roberthunter/prod.git and is read/write (assuming Robert set up his github - account properly with his SSH key). - - We also want a remote for the upstream called "up", for upstream. In this - example the upstream is always the repository Robert forked from, - github:tp-freeforall/prod. - - mkdir -p ~/w/rh - cd ~/w/rh - git clone git@github.com:roberthunter/prod.git tinyos-2.x - cd tinyos-2.x - git remote add up git://github.com/tp-freeforall/prod.git - git fetch up - git checkout -t up/msp430-int-pu # create a local tracking branch - git checkout -b rh # create the rh branch off msp430-int-pu - - - -tp-freeforall/prod - - fork -> tp-freeforall/prod.git - msp430-int-pu branch - - fork -> roberthunter/prod.git - msp430-int-pu branch - rh branch - ...... rh changes --- - | - | integration step - | - -------------------- msp430-int-pu - ^ - | local pull - tp-freeforall/prod.git | - msp430-int-pu ------------------------ - | - |integration step - | - msp430-int ------------- - - -Robert Hunter makes changes and commits his working branch (rh) on his local -repo (local). As needed he may keep his working branch (rh) upto date with -the current state of msp430-int-pu (from up/msp430-int-pu, which is coming -from github:tp-freeforall/prod(msp430-int-pu). - -When he is happy with the state of his development, he brings his commits -into the msp430-int-pu branch , after first freshing the local copy with -the current state from the upstream (github:tp-freeforall/prod(msp430-int-pu)). - -The new local version of the integration branch (local:(msp430-int-pu) is -modified to look like how you want it. This local copy gets published to the -github repository (github:roberthunter/prod(msp430-int-pu) and a pull request is -generated. The upstream (github:tp-freeforall/prod(msp430-int-pu)) pulls the -changes yeilding the new upstream. - -Succinctly: - - mkdir -p ~/w/rh - cd ~/w/rh/tinyos-2.x # inside existing local repo - git checkout rh # branch off msp430-int-pu - - work work work, busy little bee - keep commits small and logical - use good commit messages. - - git add -u # add to index - git commit # check the changes in, msg in editor - - git checkout msp430-int-pu # integration branch is msp430-int-pu - git fetch up # update from the upstream - git merge up/msp430-int-pu # make sure our local is up to date - - # the simplest method assumes that all of the most current changes on the - # rh branch are getting pulled over into msp430-int-pu. We first rebase - # the rh branch onto the tip of the msp430-int-pu to clean up the history - # and then simply fast forward msp430-int-pu - - git checkout rh - git rebase msp430-int-pu # move rh to tip of map430-int-pu - git checkout msp430-int-pu - git merge rh # advance msp430-int-pu to include rh - # should be a fast-forward - - # if you have published rh at github:roberthunter/prod(rh) then you will have - # to override the remote branch when you push. This is because the SHAs of - # rh change when you rebase. It is rewriting the history of the change set - # to be based off the current version of msp430-int-pu. - - git push origin +rh - - - # If the change set is complicated or if only pieces of the change set - # needs to be brought over, then cherry-pick should be used. - - git checkout msp430-int-pu - git fetch up - git merge up/msp430-int-pu - - # for each commit on rh that needs to be included in msp430-int-pu - git cherry-pick - - - - # To see what changes you are bringing over use the following: - git log --oneline up/msp430-int-pu..msp430-int-pu - - # to see the changes you are bringing over - git diff up/msp430-int-pu msp430-int-pu - - -When the new msp430-int-pu is ready, push it back to your published fork on -github: ie. github:roberthunter/prod(msp430-int-pu). - - git push origin msp430-int-pu - -Robert then requests a pull from his repositories main page. - - https://github.com/roberthunter/prod/pull/new/msp430-int-pu - -This requests a pull from github:roberthunter/prod(msp430-int-pu) to -github:tp-freeforall/prod(msp430-int-pu). - - -* Further Integration - -The integration master for msp430-int-pu reviews the changes and when approved -will pull the changes into github:tp-freeforall/prod(msp430-int-pu). - -After the upstream merge is complete, developers using msp430-int-pu should -refresh their local copies of the upstream branch. - -After other changes from other developers comes in and msp430-int-pu has -sufficiently matured, msp430-int-pu is merged into tp-freeforall/prod(msp430-int). - -Testing of the integration branches happens on tp-freeforall/prod(feature-int). -Groups of features are combined on github:tp-freeforall/prod(pu) [proposed updates], -which migrates to the next branch as the branch matures and the changes are accepted. - -When all integration branches have matured sufficiently, they are merged -together, tested, and becomes tinyprod/prod(master) as a new release. The -intent is to release features as they become available using a continuous -release process. - - -* Backmerging - -While various integration work is being done, working branches should be -refreshed with more current content from the integration repositories. This -is referred to as a backmerge. - -After a proposal has been accepted and integrated into the integration branch, -it is important to update the state of the local and working repos with the -new integration branch data. This will effectively move the working branches -onto the tip of the new integration branch (msp430-int-pu). - - cd ~/w/rh/tinyos-2.x - git fetch up # get current upstream data - git checkout msp430-int-pu # update local copy - git merge up/msp430-int-pu - git checkout rh # switch to working branch - git rebase msp430-int-pu # move to tip of integration - - -Another operation routinely done is updating working branches from the -integration master (ie. msp430-int-pu). - -For example, Robert wants to make sure that his changes are consistent with -what is happening on the tp-freeforall/prod(msp430-int-pu) branch. He -accomplishes this by the following commands: - - cd ~/w/rh/tinyos-2.x - git fetch up # get current information from - # tp-freeforall - - git checkout rh # make sure on rh branch - git merge up/msp430-int-pu # merge in the current - # proposed integration branch - # which is the feature Robert is - # working on. +Please see 00a_Contribution_Process for typical workflows. From ec812186f113ccff68898e5d6852ec1190208c85 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Mon, 4 Jul 2011 13:13:22 -0700 Subject: [PATCH 156/411] Bring in x5 I2C implementation, USCI --- .../msp430/x5xxx/usci/I2CMaster/I2CAppC.nc | 54 +++ .../tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc | 143 +++++++ .../msp430/x5xxx/usci/I2CMaster/Makefile | 2 + apps/tests/msp430/x5xxx/usci/I2CMaster/README | 15 + tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc | 29 ++ tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc | 28 ++ .../msp430/x5xxx/usci/Msp430UsciI2CB0C.nc | 66 ++++ .../msp430/x5xxx/usci/Msp430UsciI2CB0P.nc | 69 ++++ tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc | 357 ++++++++++++++++++ tos/chips/msp430/x5xxx/usci/README.txt | 19 +- tos/chips/msp430/x5xxx/usci/msp430usci.h | 11 + 11 files changed, 790 insertions(+), 3 deletions(-) create mode 100644 apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc create mode 100644 apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc create mode 100644 apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile create mode 100644 apps/tests/msp430/x5xxx/usci/I2CMaster/README create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc b/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc new file mode 100644 index 0000000000..41dad5e139 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +configuration I2CAppC { +} +implementation { + components MainC; + components I2CP; + + I2CP.Boot -> MainC; + + components PlatformSerialC; + components PlatformI2CC; + + I2CP.I2CPacket -> PlatformI2CC; + I2CP.UartStream -> PlatformSerialC; + I2CP.StdControl -> PlatformI2CC; + I2CP.StdControl -> PlatformSerialC; + + components SerialPrintfC; +} diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc b/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc new file mode 100644 index 0000000000..ab0435fa86 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc @@ -0,0 +1,143 @@ +/* + * Copyright (c) 2011 Redslate Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Derek Baker + */ + +#include +#include + +module I2CP { + uses { + interface Boot; + interface UartStream; + interface StdControl; + interface I2CPacket; + } +} +implementation { + uint8_t EE_senddata[15], EE_recdata[15]; + char CmdBuffer[50]; + int Ptr=0; + int HaveCmd=0; + + event void Boot.booted () { + int Cmd=0; + + call StdControl.start(); + + EE_senddata[0]=0x00; //high byte address + EE_senddata[1]=0x40; //low byte address + EE_senddata[2]=0x41; //A + EE_senddata[3]=0x42; //B + EE_senddata[4]=0x43; //C + EE_senddata[5]=0x44; //D + EE_senddata[6]=0x45; //E + EE_senddata[7]=0x46; //F + EE_senddata[8]=0x47; //G + + + while (1) { + atomic Cmd = HaveCmd; + if (Cmd == 1) { + if (strcmp(CmdBuffer,"hi") == 0) + call UartStream.send((uint8_t *)"\n\rhello back\n\r>",15); //CLI Test + if(strcmp(CmdBuffer,"testsend") == 0) + call I2CPacket.write(I2C_START | I2C_STOP, 0x0050, 9, EE_senddata); //Write ABCDEFG to eeprom addr 0x0050 + if(strcmp(CmdBuffer,"testset") == 0) + call I2CPacket.write(I2C_START | I2C_STOP, 0x0050, 2, EE_senddata); //set the eeprom internal addr to 0x0050 + if(strcmp(CmdBuffer,"testrec") == 0) { + call I2CPacket.write(I2C_START, 0x0050, 2, EE_senddata); //set the eeprom internal addr to 0x0050 + call I2CPacket.read(I2C_START | I2C_STOP, 0x0050,7, EE_recdata); //read 7 bytes from current eeprom addr + } + atomic { + HaveCmd=0; + Ptr=0; + } + } + } + } + + async event void UartStream.receiveDone (uint8_t* buf, uint16_t len, error_t error) { } + async event void UartStream.sendDone (uint8_t* buf, uint16_t len, error_t error) { } + + async event void UartStream.receivedByte (uint8_t byte) { + switch (byte) { + case 8: /*do we have a backspace*/ + case 127: /*do we have a delete*/ + if(Ptr != 0) { /*if its not the first char*/ + Ptr--; /*move the command pointer back one*/ + call UartStream.send((uint8_t *)"\b \b",3); /*Erase the char*/ + } + break; + case 10: /*do we have a cr*/ + case 13: /*do we have a lf*/ + if(Ptr == 0) + call UartStream.send((uint8_t *)"\n\r>",3); + else { + CmdBuffer[Ptr++] = '\0'; /*command entered so terminate the command string*/ + HaveCmd=1; /*Let the main loop know we have a command to process*/ + } + break; + default: /*everything else*/ + if(Ptr == 49) { /*is our command string getting to big for buffer 49?*/ + call UartStream.send((uint8_t*)7,1); /*yes send a bell*/ + Ptr--; /*move the command pointer back one*/ + call UartStream.send((uint8_t*)"\b \b",3); /*Erase the char*/ + } else { + CmdBuffer[Ptr++] = byte; /*add the char to the command buffer and add one to the command pointer*/ + call UartStream.send(&byte,1); /*echo it back*/ + } + } + } + + async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data) { + if(error == FAIL) + call UartStream.send((uint8_t *)"\n\rFAILED ",9); + if(error == SUCCESS) + call UartStream.send((uint8_t *)"\n\rSUCCESS ",10); + call UartStream.send((uint8_t *)"Write I2C\n\r>",13); + } + + async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data) { + if(error == FAIL) + call UartStream.send((uint8_t *)"\n\rFAILED ",9); + if(error == SUCCESS) { + call UartStream.send((uint8_t *)"\n\rSUCCESS ",10); + if (addr == 0x0050) /*Data from EEProm*/ + call UartStream.send(data, 7); + call UartStream.send((uint8_t*)"\n\r>",3); + } + call UartStream.send((uint8_t *)"Read I2C\n\r>",12); + } +} diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile b/apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile new file mode 100644 index 0000000000..6b5bea270c --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile @@ -0,0 +1,2 @@ +COMPONENT=I2CAppC +include $(MAKERULES) diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/README b/apps/tests/msp430/x5xxx/usci/I2CMaster/README new file mode 100644 index 0000000000..afbf9fa694 --- /dev/null +++ b/apps/tests/msp430/x5xxx/usci/I2CMaster/README @@ -0,0 +1,15 @@ +Derek Baker (derek@red-slate.co.uk) + +I2C test app for use with cc430f5137, this app give a very simple CLI on the serial port and allows you to test the I2C bus, +The test circuit includes a microchip 24lv1025 I2C eeprom, pull up resistors are 4.7k on both SCL & SDA. +The 24lc1025 has pins 1&2 held low and pin 3 high. + +serial setup is default , 115K 8,n,1 +I2C is 7 bit master running at ~100khz + +from the command line commands are + +1. 'hi' the CLI simply returns the text 'hello back' +2. 'testsend' writes 'ABCDEFG' to the eeprom at address 0x0050 +3. 'testset' set the eeprom address to 0x0050 +4. 'testrec' read 7 bytes 'ABCDEFG' from the current address (if you comment out the line in testrec the address is set before read) diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc index c6e3fa4f1e..c9050302ac 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc @@ -1,4 +1,5 @@ /** + * Copyright (c) 2011 Redslate Ltd. * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -51,6 +52,8 @@ * set without simultaneously setting the other. * * @author Peter A. Bigot + * @author Derek Baker + * I2C support */ #include "msp430usci.h" @@ -261,6 +264,32 @@ interface HplMsp430Usci { */ async command uint8_t getIv(); + + async command uint8_t getCtl1(); + async command void setCtl1(uint8_t v); + + /* set direction of the i2c bus */ + async command void setTransmitMode(); + async command void setReceiveMode(); + + /* get stop bit in i2c mode */ + async command bool getStopBit(); + async command bool getStartBit(); + async command bool getNackBit(); + async command bool getTransmitReceiveMode(); + + /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ + async command void setTXNACK(); + async command void setTXStop(); + async command void setTXStart(); + + async command bool isTxIntrPending(); + async command bool isRxIntrPending(); + async command bool isNackIntrPending(); + async command void clrTxIntr(); + async command void clrRxIntr(); + async command void clrNackIntr(); + /* ---------------------------------------- * Higher-level operations consistent across all modes. */ diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc index 00ba4ed8e9..495a730d43 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Redslate Ltd. * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -45,6 +46,8 @@ * module. * * @author Peter A. Bigot + * @author Derek Baker + * I2C support */ generic module HplMsp430UsciP( @@ -89,6 +92,8 @@ implementation { async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } async command void Usci.setCtlw0(uint16_t v) { UCmxCTLW0 = v; } + async command uint8_t Usci.getCtl1() { return UCmxCTL1; } + async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } async command uint16_t Usci.getBrw() { return UCmxBRW; } async command void Usci.setBrw(uint16_t v) { UCmxBRW = v; } async command uint8_t Usci.getMctl() { return UCmxMCTL; } @@ -161,6 +166,29 @@ implementation { } } + /* set direction of the bus */ + async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } + async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } + + /* get stop bit in i2c mode */ + async command bool Usci.getStopBit() { return (UCmxCTL1 & UCTXSTP); } + async command bool Usci.getStartBit() { return (UCmxCTL1 & UCTXSTT); } + async command bool Usci.getNackBit() { return (UCmxCTL1 & UCTXNACK); } + async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } + + /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ + async command void Usci.setTXNACK() { UCmxCTL1 |= UCTXNACK; } + async command void Usci.setTXStop() { UCmxCTL1 |= UCTXSTP; } + async command void Usci.setTXStart() { UCmxCTL1 |= UCTXSTT; } + + async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } + async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } + async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } + + async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } + async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } + async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } + /* * Upon receipt of an interrupt, if the USCI is active then demux * the interrupt to the handler for the appropriate USCI mode. diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc new file mode 100644 index 0000000000..c0a5bb00e4 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc @@ -0,0 +1,66 @@ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B0 in I2C mode. + * + * @author Derek Baker (derek@red-slate.com) + * copied from SPI, tweaked for I2C. + */ + +generic configuration Msp430UsciI2CB0C() { + provides { + interface Resource; + interface I2CPacket; + interface Msp430UsciError; + } +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), + }; + + components Msp430UsciB0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciI2CB0P as I2CC; + I2CPacket = I2CC.I2CPacket[CLIENT_ID]; + Msp430UsciError = I2CC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc new file mode 100644 index 0000000000..9bb2412e8e --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc @@ -0,0 +1,69 @@ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Derek Baker + * tweak SPI into I2C. + */ + +configuration Msp430UsciI2CB0P { + provides { + interface I2CPacket[ uint8_t client ]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + } +} implementation { + + components Msp430UsciB0P as UsciC; + + components new Msp430UsciI2CP() as I2CC; + I2CC.Usci -> UsciC; + I2CC.Interrupts -> UsciC.Interrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC; + Msp430UsciError = I2CC; + SDA = I2CC.SDA; + SCL = I2CC.SCL; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc new file mode 100644 index 0000000000..6dae4fbf53 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc @@ -0,0 +1,357 @@ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" +#include + +/** + * Implement the I2C-related interfaces for a MSP430 USCI module + * instance. + * + * @author Peter A. Bigot + * @author Derek Baker + * I2C support. + */ + +generic module Msp430UsciI2CP () @safe() { + provides { + interface I2CPacket[uint8_t client]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + + interface Msp430UsciConfigure[ uint8_t client ]; + + interface ArbiterInfo; + interface Leds; + } +} +implementation { + + enum { + TIMEOUT = 1000, + }; + + /** + * The I2C is busy if it's actively transmitting/receiving, or if + * there is an active buffered I/O operation. + */ + bool isBusy () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + return 0; + } + + /** + * The given client is the owner if the USCI is in I2C mode and + * the client is the user stored in the I2C arbiter. + */ + error_t checkIsOwner (uint8_t client) { + /* Ensure the USCI is in I2C mode and we're the owning client */ + if (! (call ArbiterInfo.inUse())) { + return EOFF; + } + if ((call ArbiterInfo.userId() != client)) { + return EBUSY; + } + return SUCCESS; + } + + /** + * Take the USCI out of I2C mode. + * + * Assumes the USCI is currently in I2C mode. This will busy-wait + * until any characters being actively transmitted or received are + * out of their shift register. It disables the interrupts, puts + * the USCI into software resent, and returns the I2C-related pins + * to their IO rather than module role. + * + * The USCI is left in software reset mode to avoid power drain per + * CC430 errata UCS6. + */ + void unconfigure_ () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + + call Usci.setIe(call Usci.getIe() & ~ (UCNACKIE | UCALIE | UCSTPIE | UCSTTIE | UCTXIE | UCRXIE)); + call Usci.enterResetMode_(); + call SDA.makeOutput(); + call SDA.selectIOFunc(); + call SCL.makeOutput(); + call SCL.selectIOFunc(); + } + + /** + * Configure the USCI for I2C mode. + * + * Invoke the USCI configuration to set up the serial speed, but + * leaves USCI in reset mode on completion. This function then + * follows up by setting the I2C-related pins to their module role + * prior to taking the USCI out of reset mode. All interrupts are + * left off. + */ + error_t configure_ (const msp430_usci_config_t* config) { + if ( !config ) { + return FAIL; + } + + /* Do basic configuration, leaving USCI in reset mode. Configure + * the I2C pins, enable the USCI, and turn off the interrupts. + */ + call Usci.configure(config, TRUE); + call SDA.selectModuleFunc(); + call SCL.selectModuleFunc(); + + call Usci.leaveResetMode_(); + call Usci.setIe(call Usci.getIe() & ~ (UCNACKIE | UCALIE | UCSTPIE | UCSTTIE | UCTXIE | UCRXIE)); + return SUCCESS; + } + + /** + * Perform an I2C read operation + * + * @param flags Flags that may be logical ORed and defined by: + * I2C_START - The START condition is transmitted at the beginning + * of the packet if set. + * I2C_STOP - The STOP condition is transmitted at the end of the + * packet if set. + * I2C_ACK_END - ACK the last byte if set. Otherwise NACK last byte. This + * flag cannot be used with the I2C_STOP flag. + * @param addr The slave device address. Only used if I2C_START is set. + * @param length Length, in bytes, to be read + * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read into + * + * @return SUCCESS if bus available and request accepted. + */ + async command error_t I2CPacket.read[uint8_t client] (i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { + uint16_t i = 0; + uint8_t m_rx_len = length; + uint8_t * m_rx_buf = data; + uint16_t m_rx_addr = addr; + + if((flags & I2C_STOP) && (flags & I2C_ACK_END)) { /*can only set one or the other*/ + m_rx_len = 0; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + + if(flags & I2C_START) { + call Usci.setReceiveMode(); /*put the uart into receive mode*/ + call Usci.setI2csa(addr); /*Set the Slave Address*/ + i=0; + while (call Usci.getStopBit()) { + if (i >= TIMEOUT) { + m_rx_len = 0; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + i++; + } + call Usci.setTXStart(); /*Set the uart to generate a repeat/start condition in receive mode*/ + i=0; + while (call Usci.getStartBit()) { /*we must test for the start bit, if we issue a stop before this we get an error*/ + if (i >= TIMEOUT) { + m_rx_len = 0; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + i++; + } + } else + call Usci.setReceiveMode(); /*make sure the uart is in receive mode*/ + + while (length > 0) { + if((flags & I2C_STOP) && length == 1) { /*if we are receiving last byte and we want to end send NACK->STOP*/ + call Usci.setTXStop(); /*Set the uart to generate a NACK->STOP*/ + i=0; + while (call Usci.getStopBit()) { + if (i >= TIMEOUT) { + m_rx_len -= length; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + i++; + } + } + i=0; + while (call Usci.isRxIntrPending()==0) { /*wait for RX of byte*/ + if (i >= TIMEOUT) { + m_rx_len -= length; + signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); + return FAIL; + } + i++; + } + *data++= call Usci.getRxbuf(); /*store in buffer*/ + length--; + } + + if(flags & I2C_ACK_END) { /*dont end the receive, we want to receive more*/ + m_rx_len -= length; + signal I2CPacket.readDone[client](SUCCESS,m_rx_addr,m_rx_len,m_rx_buf); + return SUCCESS; + } + + m_rx_len -= length; + signal I2CPacket.readDone[client](SUCCESS,m_rx_addr,m_rx_len,m_rx_buf); + return SUCCESS; /*if I2C_STOP or I2C_ACK_END not set assume more to receive*/ + } + + /** + * Perform an I2C write operation + * + * @param flags Flags that may be logical ORed and defined by: + * I2C_START - The START condition is transmitted at the beginning + * of the packet if set. + * I2C_STOP - The STOP condition is transmitted at the end of the + * packet if set. + * @param addr The slave device address. Only used if I2C_START is set. + * @param length Length, in bytes, to be read + * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read from + * + * @return SUCCESS if bus available and request accepted. + */ + async command error_t I2CPacket.write[uint8_t client] (i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { + uint16_t i = 0; + uint8_t m_tx_len = length; + uint8_t * m_tx_buf = data; + uint16_t m_tx_addr = addr; + + while ((call Usci.getStat() & UCBBUSY)) { + if (i >= TIMEOUT) { + m_tx_len = 0; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + + if(flags & I2C_START) { + call Usci.setTransmitMode(); /*set transmit mode on i2c*/ + call Usci.setI2csa(addr); /*Set the Slave Address*/ + i=0; + while (call Usci.getStopBit()) { + if (i >= TIMEOUT) { + m_tx_len = 0; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + i=0; + while((call Usci.getStat() & UCBBUSY)) { + if (i >= TIMEOUT) { + m_tx_len = 0; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + call Usci.setTXStart(); /*Set the uart to generate a repeat/start condition in transmit mode*/ + } else + call Usci.setTransmitMode(); /*Make sure the uart is in transmit mode*/ + + while (length > 0) { + call Usci.setTxbuf(*data++); /*load byte to send*/ + i=0; + while (call Usci.isTxIntrPending()==0) { /*wait for the Byte to be transmitted*/ + if (i >= TIMEOUT) { + m_tx_len -= length; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + if ((call Usci.getStat()) == (UCBBUSY | UCNACKIFG | UCSCLLOW)) { + m_tx_len -= length; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + length--; + } + + if(flags & I2C_STOP) { + call Usci.setTXStop(); /*Set the uart to generate a STOP*/ + i=0; + while (call Usci.getStopBit()) { + if(i >= TIMEOUT) { + m_tx_len -= length; + signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; + } + } + + m_tx_len -= length; + signal I2CPacket.writeDone[client](SUCCESS,m_tx_addr,m_tx_len,m_tx_buf); + return SUCCESS; + } + + default async event void I2CPacket.readDone[uint8_t client] (error_t error, uint16_t addr, uint8_t length, uint8_t* data) { } + + default async event void I2CPacket.writeDone[uint8_t client] (error_t error, uint16_t addr, uint8_t length, uint8_t* data) { } + + async event void Interrupts.interrupted (uint8_t iv) { + if ( !call ArbiterInfo.inUse()) { + return; + } + return; + } + + default async command const msp430_usci_config_t* + Msp430UsciConfigure.getConfiguration[uint8_t client]() { + return &msp430_usci_i2c_default_config; + } + + async command void ResourceConfigure.configure[uint8_t client]() { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[uint8_t client]() { + unconfigure_(); + } + + default async event void Msp430UsciError.condition(unsigned int errors) { } +} diff --git a/tos/chips/msp430/x5xxx/usci/README.txt b/tos/chips/msp430/x5xxx/usci/README.txt index 0daa9caecc..d954cc530e 100644 --- a/tos/chips/msp430/x5xxx/usci/README.txt +++ b/tos/chips/msp430/x5xxx/usci/README.txt @@ -113,7 +113,20 @@ configurations should wire the appropriate chip pins to Msp430UsciSpiB0P. I2C Mode Support ---------------- -Due to lack of I2C support on a platform based on an MSP430XV2 chip, I2C -support has not yet been implemented. Adding support for this should be a -straightforward extension from that for the other USCI modes. +I2C support added by Derek Baker (derek@red-slate.com) +Added support for I2C master 7 bit addressing ~100khz/~400khz NONE interrupt driven, +tested on cc430F5137 with microchip 24lc1025 and Melexis MLX90614 thermometer. +I2CPacket.read, I2CPacket.write, I2CPacketreadDone, I2CPacketwriteDone +Bits taken from both PeoplePower and Z1 authors with thanks also to Eric Decker. + +Note / Gotcha + +When setting the address of the slave device remember you only need the 7 bits, most +devices datasheets show the address in a 8bit format, e.g 24lc1025 address is 0xA0, +this turns into 0x50, the 7 msb's right shifted one, the read/right bit is added by +the UART when you select the read/write function of the UART in I2C mode. + +When writing to a device multiple time, check the data sheet for write times, you +need to give the device time to commit before you write again else the I2CPacket.write +will FAIL. diff --git a/tos/chips/msp430/x5xxx/usci/msp430usci.h b/tos/chips/msp430/x5xxx/usci/msp430usci.h index bac2ee5f03..709bd29662 100644 --- a/tos/chips/msp430/x5xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci/msp430usci.h @@ -91,4 +91,15 @@ enum { MSP430_USCI_ERR_UCxySTAT = MSP430_USCI_ERR_Framing | MSP430_USCI_ERR_Overrun | MSP430_USCI_ERR_Parity, }; +/* + * I2C default config, added by Derek Baker (derek@red-slate.com) + */ + +msp430_usci_config_t msp430_usci_i2c_default_config = { + /* 7 bit addressing single I2C master driven by SMCLK */ + ctlw0 : ((UCMST + UCMODE_3 + UCSYNC) << 8) | UCSSEL__SMCLK, + brw : 10, /* gives us 103680 hz, slow speed but will work with all devices.*/ + mctl : 0 /* Not used in I2C mode*/ +}; + #endif // _H_Msp430Usci_h From 0c17de29ae93c9e81ea4b0382323609803fb4e81 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 4 Jul 2011 23:10:09 -0700 Subject: [PATCH 157/411] msp430/x5/usci: add gen'd I2C, rework Usci interface (add optimized) clean up add generated versions of I2C files add {set,get}Ctl{0,1} rearrange (group together) i2c routines rename {get,set}I2c... to {get,set}I2C... add optimized tx/rx interrupt/flag access routines. --- tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc | 123 ++++++++++++++---- tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc | 12 +- .../x5xxx/usci/HplMsp430UsciInterruptsA0P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsA1P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsA2P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsA3P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsB0P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsB1P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsB2P.nc | 7 +- .../x5xxx/usci/HplMsp430UsciInterruptsB3P.nc | 7 +- tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc | 107 ++++++++------- tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc | 8 +- tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc | 8 +- .../msp430/x5xxx/usci/Msp430UsciI2CB0C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciI2CB0P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciI2CB1C.nc | 69 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB1P.nc | 72 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB2C.nc | 69 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB2P.nc | 72 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB3C.nc | 69 ++++++++++ .../msp430/x5xxx/usci/Msp430UsciI2CB3P.nc | 72 ++++++++++ tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc | 23 ++-- .../msp430/x5xxx/usci/Msp430UsciSpiA0C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiA0P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiA1C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiA1P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiA2C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiA2P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiA3C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiA3P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiB0C.nc | 13 +- .../msp430/x5xxx/usci/Msp430UsciSpiB0P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiB1C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiB1P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiB2C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiB2P.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciSpiB3C.nc | 14 +- .../msp430/x5xxx/usci/Msp430UsciSpiB3P.nc | 3 +- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartA0C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciUartA0P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartA1C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciUartA1P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartA2C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciUartA2P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartA3C.nc | 3 +- .../msp430/x5xxx/usci/Msp430UsciUartA3P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciUartP.nc | 4 +- tos/chips/msp430/x5xxx/usci/README.txt | 4 + tos/chips/msp430/x5xxx/usci/generate.sh | 17 ++- tos/chips/msp430/x5xxx/usci/generated.lst | 6 + 57 files changed, 807 insertions(+), 205 deletions(-) create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1C.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2C.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3C.nc create mode 100644 tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3P.nc diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc index c9050302ac..a6ae8d22c6 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc @@ -1,4 +1,5 @@ /** + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 Redslate Ltd. * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -54,6 +55,7 @@ * @author Peter A. Bigot * @author Derek Baker * I2C support + * @author Eric B. Decker */ #include "msp430usci.h" @@ -62,7 +64,8 @@ interface HplMsp430Usci { /* ---------------------------------------- * Introspection to identify a module when given a reference to its - * component */ + * component + */ /** * Return a unique identifier for this module among all USCI modules on the chip. @@ -80,14 +83,29 @@ interface HplMsp430Usci { /** * Reads the UCmxCTLW0 Control register. * This register is present on all USCI modules, and is used in all modes. + * + * CTLW0 is the 16 bit concatenation of CTL0 and CTL1. Note on the x5 + * CTL1 is at offset 0 (x5 is base register based) and CTL0 is the msb. + * + * This is swapped with respect to where CTL0 and CTL1 live on the x2 processors, + * CTL0 is at 0 and CTL1 is at 1 (not base register but relative to where the + * registers are defined). This makes config block platform/cpu dependent (which + * they are anyway because of clocking issues). + * + * {get,set}Ctlw0: gets or sets the 16 bit version of the control register. + * {get,set}Ctl{0,1}: gets or sets the 8 bit version of the 0 or 1 register. */ async command uint16_t getCtlw0(); + async command uint8_t getCtl0(); + async command uint8_t getCtl1(); /** * Writes the UCmxCTLW0 Control register. * This register is present on all USCI modules. */ async command void setCtlw0(uint16_t v); + async command void setCtl0(uint8_t v); + async command void setCtl1(uint8_t v); /** * Reads the UCmxBRW Baud Rate Control registers. @@ -161,18 +179,6 @@ interface HplMsp430Usci { */ async command void setAbctl(uint8_t v); - /** - * Read the UCmxI2COA I2C Own Address register. - * This register is present only on USCI_B modules in I2C mode. - */ - async command uint16_t getI2coa(); - - /** - * Write the UCmxI2COA I2C Own Address register. - * This register is present only on USCI_B modules in I2C mode. - */ - async command void setI2coa(uint16_t v); - /** * Read the UCmxIRCTL IrDA Control register. * This register is present only on USCI_A modules in UART mode. @@ -209,17 +215,29 @@ interface HplMsp430Usci { */ async command void setIrrctl(uint8_t v); + /** + * Read the UCmxI2COA I2C Own Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command uint16_t getI2Coa(); + + /** + * Write the UCmxI2COA I2C Own Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command void setI2Coa(uint16_t v); + /** * Read the UCmxI2CSA I2C Slave Address register. * This register is present only on USCI_B modules in I2C mode. */ - async command uint16_t getI2csa(); + async command uint16_t getI2Csa(); /** * Write the UCmxI2CSA I2C Slave Address register. * This register is present only on USCI_B modules in I2C mode. */ - async command void setI2csa(uint16_t v); + async command void setI2Csa(uint16_t v); /** * Reads the UCmxICTL Interrupt Control register. @@ -230,6 +248,9 @@ interface HplMsp430Usci { /** * Writes the UCmxICTL Interrupt Control register. * This register is present on all USCI modules. + * + * ICTL is the 16 bit concatenation of IE (interrupt enable) and IFG + * (interrupt flag). */ async command uint16_t setIctl(uint16_t v); @@ -257,6 +278,61 @@ interface HplMsp430Usci { */ async command void setIfg(uint8_t v); + /* + * using setIfg and setIe to control interrupt state requires something like + * + * setIe(getIe() & ~UCTXIE) // turn of TX ie. + * + * The following provide a more optimized interface that directly references + * the bit in question. Generates better code. Also some drivers have been + * written using these interface specs while others with the direct register + * access specs. + */ + + async command bool isRxIntrPending(); + async command void clrRxIntr(); + async command void disableRxIntr(); + async command void enableRxIntr(); + + async command bool isTxIntrPending(); + async command void clrTxIntr(); + async command void disableTxIntr(); + async command void enableTxIntr(); + + /* + * The following are being deprecated. They existed in the x1 USART + * definitions and also the original x2 definitions. They are broken + * because the semantic is unclear. + * + * async command void disableIntr(); + * async command void enableIntr(); + * async command void clrIntr(); + * + * As the USCI modules became more sophisticated what interrupt is being + * enabled or disabled. This then warped into being simply a set/get + * on the appropriate register. So why have the sugar? + */ + + + /* + * TI h/w provides a busy bit. return tx or rx is doing something + * + * This isn't really that useful. This used to be called txEmpty on the x1 + * USART (where it really did represent that the tx path was empty) but that + * isn't true on USCI modules. Rather it indicates that tx, rx, or both are + * active. These paths are double buffered. + * + * For TX state machines (packet based etc), we want to know that all the bytes + * went out, typically when switching resources. For RX, we will have received + * all the bytes we are interested in, so don't really care that the RX buffers in + * the h/w are empty. + * + * In other words TI exchanged the txEmpty which worked for the isBusy which + * doesn't really work. Thanks, but no thanks, TI! + */ + async command bool isBusy(); + + /** * Reads the UCmxIV Interrupt Vector register. * This register is present on all USCI modules, and is used in all modes. @@ -264,30 +340,25 @@ interface HplMsp430Usci { */ async command uint8_t getIv(); - - async command uint8_t getCtl1(); - async command void setCtl1(uint8_t v); - - /* set direction of the i2c bus */ + /* I2C bits + * + * set direction of the bus + */ async command void setTransmitMode(); async command void setReceiveMode(); - /* get stop bit in i2c mode */ + /* Various I2C bits */ async command bool getStopBit(); async command bool getStartBit(); async command bool getNackBit(); async command bool getTransmitReceiveMode(); - /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ + /* transmit NACK, Stop, or Start condition, automatically cleared */ async command void setTXNACK(); async command void setTXStop(); async command void setTXStart(); - async command bool isTxIntrPending(); - async command bool isRxIntrPending(); async command bool isNackIntrPending(); - async command void clrTxIntr(); - async command void clrRxIntr(); async command void clrNackIntr(); /* ---------------------------------------- diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc index cf8c595ecb..76fa9d6167 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciC.nc @@ -49,10 +49,17 @@ */ generic configuration HplMsp430UsciC( - /** Offset of UCmxCTLW0_ register for m=module_type and x=module_instance */ + + /** + * Offset of UCmxCTLW0_ register for m=module_type and x=module_instance + * + * UCmxCTLW0 is the base address for the module. + */ unsigned int UCmxCTLW0_, + /** Name of resource used to arbitrate modes of this USCI instance */ char RESOURCE_NAME[] + ) @safe() { provides { interface HplMsp430Usci as Usci; @@ -66,7 +73,8 @@ generic configuration HplMsp430UsciC( interface HplMsp430UsciInterrupts as RawInterrupts; interface ResourceConfigure[uint8_t client]; } -} implementation { +} +implementation { enum { USCI_ID = unique(MSP430_USCI_RESOURCE), diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc index c3616d1900..0237bfa061 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA0P.nc @@ -5,14 +5,13 @@ */ module HplMsp430UsciInterruptsA0P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_A0_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc index a88ef4e0ff..b3d8d1f260 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA1P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsA1P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_A1_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc index a5fdf43007..3886d50c1a 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA2P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsA2P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_A2_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc index f11c704a21..5805845422 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsA3P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsA3P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_A3_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc index 408d6bcdb1..1533944079 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB0P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsB0P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_B0_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc index bc3e3644df..cd20aa06d3 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB1P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsB1P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_B1_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc index 2534aa706d..8b993a119f 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB2P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsB2P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_B2_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc index 79f16d3e9b..290dd909e4 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciInterruptsB3P.nc @@ -7,14 +7,13 @@ */ module HplMsp430UsciInterruptsB3P { - provides { - interface HplMsp430UsciInterrupts as Interrupts; - } + provides interface HplMsp430UsciInterrupts as Interrupts; uses { interface HplMsp430Usci as Usci; interface Leds; } -} implementation { +} +implementation { TOSH_SIGNAL(USCI_B3_VECTOR) { signal Interrupts.interrupted((call Usci.getIv())); } diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc index 495a730d43..03027d45d5 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc @@ -66,7 +66,6 @@ generic module HplMsp430UsciP( interface Leds; } } - implementation { #define UCmxCTLW0 (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_)) @@ -90,10 +89,14 @@ implementation { async command uint8_t Usci.getModuleIdentifier() { return USCI_ID; } - async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } - async command void Usci.setCtlw0(uint16_t v) { UCmxCTLW0 = v; } - async command uint8_t Usci.getCtl1() { return UCmxCTL1; } - async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } + async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } + async command uint8_t Usci.getCtl0() { return UCmxCTL0; } + async command uint8_t Usci.getCtl1() { return UCmxCTL1; } + + async command void Usci.setCtlw0(uint16_t v) { UCmxCTLW0 = v; } + async command void Usci.setCtl0(uint8_t v) { UCmxCTL0 = v; } + async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } + async command uint16_t Usci.getBrw() { return UCmxBRW; } async command void Usci.setBrw(uint16_t v) { UCmxBRW = v; } async command uint8_t Usci.getMctl() { return UCmxMCTL; } @@ -106,24 +109,75 @@ implementation { async command void Usci.setTxbuf(uint8_t v) { UCmxTXBUF = v; } async command uint8_t Usci.getAbctl() { return UCmxABCTL; } async command void Usci.setAbctl(uint8_t v) { UCmxABCTL = v; } - async command uint16_t Usci.getI2coa() { return UCmxI2COA; } - async command void Usci.setI2coa(uint16_t v) { UCmxI2COA = v; } async command uint16_t Usci.getIrctl() { return UCmxIRCTL; } async command void Usci.setIrctl(uint16_t v) { UCmxIRCTL = v; } async command uint8_t Usci.getIrtctl() { return UCmxIRTCTL; } async command void Usci.setIrtctl(uint8_t v) { UCmxIRTCTL = v; } async command uint8_t Usci.getIrrctl() { return UCmxIRRCTL; } async command void Usci.setIrrctl(uint8_t v) { UCmxIRRCTL = v; } - async command uint16_t Usci.getI2csa() { return UCmxI2CSA; } - async command void Usci.setI2csa(uint16_t v) { UCmxI2CSA = v; } + + async command uint16_t Usci.getI2Coa() { return UCmxI2COA; } + async command void Usci.setI2Coa(uint16_t v) { UCmxI2COA = v; } + + async command uint16_t Usci.getI2Csa() { return UCmxI2CSA; } + async command void Usci.setI2Csa(uint16_t v) { UCmxI2CSA = v; } + async command uint16_t Usci.getIctl() { return UCmxICTL; } async command uint16_t Usci.setIctl(uint16_t v) { UCmxICTL = v; } async command uint8_t Usci.getIe() { return UCmxIE; } async command void Usci.setIe(uint8_t v) { UCmxIE = v; } async command uint8_t Usci.getIfg() { return UCmxIFG; } async command void Usci.setIfg(uint8_t v) { UCmxIFG = v; } + + async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } + async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } + async command void Usci.disableRxIntr() { UCmxIE &= ~UCRXIE; } + async command void Usci.enableRxIntr() { UCmxIE |= UCRXIE; } + + async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } + async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } + async command void Usci.disableTxIntr() { UCmxIE &= ~UCTXIE; } + async command void Usci.enableTxIntr() { UCmxIE |= UCTXIE; } + + async command bool Usci.isBusy() { return (UCmxSTAT & UCBUSY); } + async command uint8_t Usci.getIv() { return UCmxIV; } + /* I2C bits + * + * set direction of the bus + */ + async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } + async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } + + /* Various i2c bits */ + async command bool Usci.getStopBit() { return (UCmxCTL1 & UCTXSTP); } + async command bool Usci.getStartBit() { return (UCmxCTL1 & UCTXSTT); } + async command bool Usci.getNackBit() { return (UCmxCTL1 & UCTXNACK); } + async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } + + /* set NACK, Stop condition, or Start condition, automatically cleared */ + async command void Usci.setTXNACK() { UCmxCTL1 |= UCTXNACK; } + async command void Usci.setTXStop() { UCmxCTL1 |= UCTXSTP; } + async command void Usci.setTXStart() { UCmxCTL1 |= UCTXSTT; } + + async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } + async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } + + async command void Usci.configure (const msp430_usci_config_t* config, + bool leave_in_reset) { + if (! config) { + return; + } + call Usci.enterResetMode_(); + UCmxCTLW0 = config->ctlw0 + UCSWRST; + UCmxBRW = config->brw; + UCmxMCTL = config->mctl; + if (! leave_in_reset) { + call Usci.leaveResetMode_(); + } + } + async command void Usci.enterResetMode_ () { #if defined(WITH_IAR) UCmxCTL1 |= UCSWRST; @@ -140,19 +194,6 @@ implementation { #endif } - async command void Usci.configure (const msp430_usci_config_t* config, - bool leave_in_reset) { - if (! config) { - return; - } - call Usci.enterResetMode_(); - UCmxCTLW0 = config->ctlw0 + UCSWRST; - UCmxBRW = config->brw; - UCmxMCTL = config->mctl; - if (! leave_in_reset) { - call Usci.leaveResetMode_(); - } - } async command uint8_t Usci.currentMode () { atomic { @@ -166,28 +207,6 @@ implementation { } } - /* set direction of the bus */ - async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } - async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } - - /* get stop bit in i2c mode */ - async command bool Usci.getStopBit() { return (UCmxCTL1 & UCTXSTP); } - async command bool Usci.getStartBit() { return (UCmxCTL1 & UCTXSTT); } - async command bool Usci.getNackBit() { return (UCmxCTL1 & UCTXNACK); } - async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } - - /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ - async command void Usci.setTXNACK() { UCmxCTL1 |= UCTXNACK; } - async command void Usci.setTXStop() { UCmxCTL1 |= UCTXSTP; } - async command void Usci.setTXStart() { UCmxCTL1 |= UCTXSTT; } - - async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } - async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } - async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } - - async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } - async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } - async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } /* * Upon receipt of an interrupt, if the USCI is active then demux diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc index ee4d39a26b..e418cbb2a6 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA0P.nc @@ -8,11 +8,9 @@ configuration Msp430UsciA0P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCA0CTLW0_, MSP430_USCI_A0_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc index 6175af0017..13f42c8d52 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA1P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciA1P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCA1CTLW0_, MSP430_USCI_A1_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc index 3db1621309..da0beb2e5e 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA2P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciA2P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCA2CTLW0_, MSP430_USCI_A2_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc index aa8f8bcbcb..5e04f1bf19 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciA3P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciA3P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCA3CTLW0_, MSP430_USCI_A3_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc index 39192141d3..e69dbd8ac2 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB0P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciB0P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCB0CTLW0_, MSP430_USCI_B0_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc index 2b6e686ff5..ca55336468 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB1P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciB1P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCB1CTLW0_, MSP430_USCI_B1_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc index 54e781bf8a..8339572132 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB2P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciB2P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCB2CTLW0_, MSP430_USCI_B2_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc index 658926d281..4c6b77dac7 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciB3P.nc @@ -10,11 +10,9 @@ configuration Msp430UsciB3P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; } - uses { - interface ResourceConfigure[uint8_t client]; - } - -} implementation { + uses interface ResourceConfigure[uint8_t client]; +} +implementation { components new HplMsp430UsciC(UCB3CTLW0_, MSP430_USCI_B3_RESOURCE) as UsciC; USCI = UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc index c0a5bb00e4..c3d62cbe16 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0C.nc @@ -50,7 +50,8 @@ generic configuration Msp430UsciI2CB0C() { interface I2CPacket; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc index 9bb2412e8e..5dc5b33e67 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB0P.nc @@ -51,7 +51,8 @@ configuration Msp430UsciI2CB0P { interface HplMsp430GeneralIO as SDA; interface HplMsp430GeneralIO as SCL; } -} implementation { +} +implementation { components Msp430UsciB0P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1C.nc new file mode 100644 index 0000000000..b27251a246 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1C.nc @@ -0,0 +1,69 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B1 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B1 in I2C mode. + * + * @author Derek Baker (derek@red-slate.com) + * copied from SPI, tweaked for I2C. + */ + +generic configuration Msp430UsciI2CB1C() { + provides { + interface Resource; + interface I2CPacket; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B1_RESOURCE), + }; + + components Msp430UsciB1P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciI2CB1P as I2CC; + I2CPacket = I2CC.I2CPacket[CLIENT_ID]; + Msp430UsciError = I2CC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1P.nc new file mode 100644 index 0000000000..288cd37a54 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB1P.nc @@ -0,0 +1,72 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B1 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Derek Baker + * tweak SPI into I2C. + */ + +configuration Msp430UsciI2CB1P { + provides { + interface I2CPacket[ uint8_t client ]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + } +} +implementation { + + components Msp430UsciB1P as UsciC; + + components new Msp430UsciI2CP() as I2CC; + I2CC.Usci -> UsciC; + I2CC.Interrupts -> UsciC.Interrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC; + Msp430UsciError = I2CC; + SDA = I2CC.SDA; + SCL = I2CC.SCL; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2C.nc new file mode 100644 index 0000000000..5cdc2cdf0a --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2C.nc @@ -0,0 +1,69 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B2 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B2 in I2C mode. + * + * @author Derek Baker (derek@red-slate.com) + * copied from SPI, tweaked for I2C. + */ + +generic configuration Msp430UsciI2CB2C() { + provides { + interface Resource; + interface I2CPacket; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B2_RESOURCE), + }; + + components Msp430UsciB2P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciI2CB2P as I2CC; + I2CPacket = I2CC.I2CPacket[CLIENT_ID]; + Msp430UsciError = I2CC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2P.nc new file mode 100644 index 0000000000..930213714c --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB2P.nc @@ -0,0 +1,72 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B2 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Derek Baker + * tweak SPI into I2C. + */ + +configuration Msp430UsciI2CB2P { + provides { + interface I2CPacket[ uint8_t client ]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + } +} +implementation { + + components Msp430UsciB2P as UsciC; + + components new Msp430UsciI2CP() as I2CC; + I2CC.Usci -> UsciC; + I2CC.Interrupts -> UsciC.Interrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC; + Msp430UsciError = I2CC; + SDA = I2CC.SDA; + SCL = I2CC.SCL; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3C.nc new file mode 100644 index 0000000000..6c28802e77 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3C.nc @@ -0,0 +1,69 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B3 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B3 in I2C mode. + * + * @author Derek Baker (derek@red-slate.com) + * copied from SPI, tweaked for I2C. + */ + +generic configuration Msp430UsciI2CB3C() { + provides { + interface Resource; + interface I2CPacket; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B3_RESOURCE), + }; + + components Msp430UsciB3P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciI2CB3P as I2CC; + I2CPacket = I2CC.I2CPacket[CLIENT_ID]; + Msp430UsciError = I2CC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3P.nc new file mode 100644 index 0000000000..6be7b8fc82 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CB3P.nc @@ -0,0 +1,72 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B3 */ +/** + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Derek Baker + * tweak SPI into I2C. + */ + +configuration Msp430UsciI2CB3P { + provides { + interface I2CPacket[ uint8_t client ]; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + } +} +implementation { + + components Msp430UsciB3P as UsciC; + + components new Msp430UsciI2CP() as I2CC; + I2CC.Usci -> UsciC; + I2CC.Interrupts -> UsciC.Interrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC; + Msp430UsciError = I2CC; + SDA = I2CC.SDA; + SCL = I2CC.SCL; +} diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc index 6dae4fbf53..1a8bc8f5fa 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc @@ -132,9 +132,8 @@ implementation { * left off. */ error_t configure_ (const msp430_usci_config_t* config) { - if ( !config ) { + if ( !config ) return FAIL; - } /* Do basic configuration, leaving USCI in reset mode. Configure * the I2C pins, enable the USCI, and turn off the interrupts. @@ -170,15 +169,15 @@ implementation { uint8_t * m_rx_buf = data; uint16_t m_rx_addr = addr; - if((flags & I2C_STOP) && (flags & I2C_ACK_END)) { /*can only set one or the other*/ + if ((flags & I2C_STOP) && (flags & I2C_ACK_END)) { /*can only set one or the other*/ m_rx_len = 0; signal I2CPacket.readDone[client](FAIL,m_rx_addr,m_rx_len,m_rx_buf); return FAIL; } - if(flags & I2C_START) { + if (flags & I2C_START) { call Usci.setReceiveMode(); /*put the uart into receive mode*/ - call Usci.setI2csa(addr); /*Set the Slave Address*/ + call Usci.setI2Csa(addr); /*Set the Slave Address*/ i=0; while (call Usci.getStopBit()) { if (i >= TIMEOUT) { @@ -227,7 +226,7 @@ implementation { length--; } - if(flags & I2C_ACK_END) { /*dont end the receive, we want to receive more*/ + if (flags & I2C_ACK_END) { /*dont end the receive, we want to receive more*/ m_rx_len -= length; signal I2CPacket.readDone[client](SUCCESS,m_rx_addr,m_rx_len,m_rx_buf); return SUCCESS; @@ -269,7 +268,7 @@ implementation { if(flags & I2C_START) { call Usci.setTransmitMode(); /*set transmit mode on i2c*/ - call Usci.setI2csa(addr); /*Set the Slave Address*/ + call Usci.setI2Csa(addr); /*Set the Slave Address*/ i=0; while (call Usci.getStopBit()) { if (i >= TIMEOUT) { @@ -280,7 +279,7 @@ implementation { i++; } i=0; - while((call Usci.getStat() & UCBBUSY)) { + while ((call Usci.getStat() & UCBBUSY)) { if (i >= TIMEOUT) { m_tx_len = 0; signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); @@ -311,7 +310,7 @@ implementation { length--; } - if(flags & I2C_STOP) { + if (flags & I2C_STOP) { call Usci.setTXStop(); /*Set the uart to generate a STOP*/ i=0; while (call Usci.getStopBit()) { @@ -333,10 +332,12 @@ implementation { default async event void I2CPacket.writeDone[uint8_t client] (error_t error, uint16_t addr, uint8_t length, uint8_t* data) { } + /* + * Interrupts currently not implemented. + */ async event void Interrupts.interrupted (uint8_t iv) { - if ( !call ArbiterInfo.inUse()) { + if ( !call ArbiterInfo.inUse()) return; - } return; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc index 70b70d9208..2038466302 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A0 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_A0 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiA0C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiA0C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiA0C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCA0SIMO; + SpiC.SOMI -> GIO.UCA0SOMI; + SpiC.CLK -> GIO.UCA0CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc index a7185af139..cacab860db 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiA0P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciA0P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc index 17dae4c9ce..f5ecb1efcb 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A1 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_A1 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiA1C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiA1C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A1_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiA1C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCA1SIMO; + SpiC.SOMI -> GIO.UCA1SOMI; + SpiC.CLK -> GIO.UCA1CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc index 04cb9e3fe8..db2169a5eb 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiA1P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciA1P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc index 15c06eb424..8952f60479 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A2 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_A2 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiA2C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiA2C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A2_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiA2C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCA2SIMO; + SpiC.SOMI -> GIO.UCA2SOMI; + SpiC.CLK -> GIO.UCA2CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc index d44539fa14..e8cb90e0b3 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiA2P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciA2P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc index 63b900592f..9c8a90c9ae 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A3 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_A3 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiA3C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiA3C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A3_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiA3C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCA3SIMO; + SpiC.SOMI -> GIO.UCA3SOMI; + SpiC.CLK -> GIO.UCA3CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc index 49c00329b1..81ccfb32c1 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiA3P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciA3P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc index 345883ebc9..3bf7318009 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc @@ -44,7 +44,6 @@ * @author João Gonçalves */ - generic configuration Msp430UsciSpiB0C() { provides { interface Resource; @@ -52,8 +51,8 @@ generic configuration Msp430UsciSpiB0C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), }; @@ -68,9 +67,9 @@ generic configuration Msp430UsciSpiB0C() { UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - components HplMsp430GeneralIOC as GIO; + components HplMsp430GeneralIOC as GIO; - SpiC.SIMO -> GIO.UCB0SIMO; - SpiC.SOMI -> GIO.UCB0SOMI; - SpiC.CLK -> GIO.UCB0CLK; + SpiC.SIMO -> GIO.UCB0SIMO; + SpiC.SOMI -> GIO.UCB0SOMI; + SpiC.CLK -> GIO.UCB0CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc index 7255083b66..c9415c1515 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc @@ -11,7 +11,8 @@ configuration Msp430UsciSpiB0P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciB0P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc index bc06df1bcf..1cb2d91f76 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B1 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_B1 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiB1C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiB1C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B1_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiB1C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCB1SIMO; + SpiC.SOMI -> GIO.UCB1SOMI; + SpiC.CLK -> GIO.UCB1CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc index 4290252095..f7ad12aa3b 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiB1P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciB1P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc index 43dc524734..14088f6f2a 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B2 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_B2 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiB2C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiB2C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B2_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiB2C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCB2SIMO; + SpiC.SOMI -> GIO.UCB2SOMI; + SpiC.CLK -> GIO.UCB2CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc index f8262db2eb..055eca4f7f 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiB2P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciB2P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc index d03d080acf..639b5604a1 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B3 */ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -40,6 +41,9 @@ /** * Generic configuration for a client that shares USCI_B3 in SPI mode. + * + * Connected the SPI pins to HplMsp430GeneralIOC + * @author João Gonçalves */ generic configuration Msp430UsciSpiB3C() { @@ -49,8 +53,8 @@ generic configuration Msp430UsciSpiB3C() { interface SpiByte; interface Msp430UsciError; } - -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_B3_RESOURCE), }; @@ -64,4 +68,10 @@ generic configuration Msp430UsciSpiB3C() { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; + + components HplMsp430GeneralIOC as GIO; + + SpiC.SIMO -> GIO.UCB3SIMO; + SpiC.SOMI -> GIO.UCB3SOMI; + SpiC.CLK -> GIO.UCB3CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc index 6ec0401514..c14647f046 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc @@ -13,7 +13,8 @@ configuration Msp430UsciSpiB3P { interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as CLK; } -} implementation { +} +implementation { components Msp430UsciB3P as UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc index 8402d42bda..7aaa13bdf8 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc @@ -50,7 +50,6 @@ generic module Msp430UsciSpiP () @safe() { interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; } - uses { interface HplMsp430Usci as Usci; interface HplMsp430UsciInterrupts as Interrupts; @@ -62,7 +61,8 @@ generic module Msp430UsciSpiP () @safe() { interface ArbiterInfo; interface Leds; } -} implementation { +} +implementation { /** The SPI is busy if it's actively transmitting/receiving, or if * there is an active buffered I/O operation. diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc index 6a77c6d21d..1fed90eaa6 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc @@ -46,7 +46,8 @@ generic configuration Msp430UsciUartA0C() { interface UartByte; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc index c5e3b75083..67351a479e 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0P.nc @@ -10,10 +10,10 @@ configuration Msp430UsciUartA0P { interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; } -} implementation { +} +implementation { components Msp430UsciA0P as UsciC; - components new Msp430UsciUartP() as UartC; UartC.Usci -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc index abf9d7073c..b28d5aef09 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc @@ -48,7 +48,8 @@ generic configuration Msp430UsciUartA1C() { interface UartByte; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A1_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc index a8225f1713..881aed4b50 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1P.nc @@ -12,10 +12,10 @@ configuration Msp430UsciUartA1P { interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; } -} implementation { +} +implementation { components Msp430UsciA1P as UsciC; - components new Msp430UsciUartP() as UartC; UartC.Usci -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc index 9d2e55cd03..8b42664b74 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc @@ -48,7 +48,8 @@ generic configuration Msp430UsciUartA2C() { interface UartByte; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A2_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc index 31487ab407..5291687075 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2P.nc @@ -12,10 +12,10 @@ configuration Msp430UsciUartA2P { interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; } -} implementation { +} +implementation { components Msp430UsciA2P as UsciC; - components new Msp430UsciUartP() as UartC; UartC.Usci -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc index d780212dd7..f20d33fbe7 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc @@ -48,7 +48,8 @@ generic configuration Msp430UsciUartA3C() { interface UartByte; interface Msp430UsciError; } -} implementation { +} +implementation { enum { CLIENT_ID = unique(MSP430_USCI_A3_RESOURCE), }; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc index a52b692d11..be1a26fd60 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3P.nc @@ -12,10 +12,10 @@ configuration Msp430UsciUartA3P { interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; } -} implementation { +} +implementation { components Msp430UsciA3P as UsciC; - components new Msp430UsciUartP() as UartC; UartC.Usci -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc index 3c3158f906..609e991e2c 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc @@ -81,7 +81,6 @@ generic module Msp430UsciUartP () @safe() { interface ResourceConfigure[ uint8_t client ]; interface Msp430UsciError[ uint8_t client ]; } - uses { interface HplMsp430Usci as Usci; interface HplMsp430UsciInterrupts as Interrupts; @@ -92,7 +91,8 @@ generic module Msp430UsciUartP () @safe() { interface ArbiterInfo; interface LocalTime as LocalTime_bms; } -} implementation { +} +implementation { norace uint16_t m_tx_len, m_rx_len; norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; diff --git a/tos/chips/msp430/x5xxx/usci/README.txt b/tos/chips/msp430/x5xxx/usci/README.txt index d954cc530e..db6a345fab 100644 --- a/tos/chips/msp430/x5xxx/usci/README.txt +++ b/tos/chips/msp430/x5xxx/usci/README.txt @@ -19,6 +19,10 @@ Code Composer Studio distribution: msp430x47x3 msp430x47x4 msp430x241x msp430x24x msp430x24x1 msp430x26x msp430x471x6 msp430x471x7 msp430x47x3 msp430x47x4 + The interrupt structure on these chips is significantly more complicated + than on the x5 chips. The various vectors are shared and don't really + make a whole lot of sense. The x5 is significantly cleaner. + __MSP430_HAS_USCI_A0__, __MSP430_HAS_USCI_B0__ -- third generation USCI implementation on chips: cc430x513x cc430x612x cc430x613x msp430x54x msp430x54xA msp430x551x diff --git a/tos/chips/msp430/x5xxx/usci/generate.sh b/tos/chips/msp430/x5xxx/usci/generate.sh index 447d314bda..bfd4377b30 100755 --- a/tos/chips/msp430/x5xxx/usci/generate.sh +++ b/tos/chips/msp430/x5xxx/usci/generate.sh @@ -10,16 +10,27 @@ # that template. # # @author Peter A. Bigot +# @author Eric B. Decker +# +# UART is implemented in USCI_A modules +# I2C is implemented in USCI_B modules +# SPI is implemented in USCI_A and USCI_B modules + +# List of tags for USCI_Ax modules. A0 is the master for A +# modules and Uart. -# List of tags for USCI_Ax modules. The first is the template. A_MODULES='A0 A1 A2 A3' -# List of tags for USCI_Bx modules. The first is the template. + +# List of tags for USCI_Ax modules. B0 is the master for B +# modules and Spi (B and A) and I2C modules. + B_MODULES='B0 B1 B2 B3' # Initialize a file that will contain a list of all generated files, # so we can remove them during basic maintenance. Their presence # clutters the directory and makes it difficult to see what's really # important. + rm -f generated.lst clone_module () { @@ -62,4 +73,4 @@ clone_mode_modules () { # Clone the mode-specific configurations clone_mode_modules Uart ${A_MODULES} clone_mode_modules Spi ${B_MODULES} ${A_MODULES} -# clone_mode_modules I2c ${B_MODULES} +clone_mode_modules I2C ${B_MODULES} diff --git a/tos/chips/msp430/x5xxx/usci/generated.lst b/tos/chips/msp430/x5xxx/usci/generated.lst index d4d33bc51f..0ac13716b1 100644 --- a/tos/chips/msp430/x5xxx/usci/generated.lst +++ b/tos/chips/msp430/x5xxx/usci/generated.lst @@ -32,3 +32,9 @@ Msp430UsciSpiA0P.nc Msp430UsciSpiA1P.nc Msp430UsciSpiA2P.nc Msp430UsciSpiA3P.nc +Msp430UsciI2CB1C.nc +Msp430UsciI2CB2C.nc +Msp430UsciI2CB3C.nc +Msp430UsciI2CB1P.nc +Msp430UsciI2CB2P.nc +Msp430UsciI2CB3P.nc From 0a2cf03567fadc27f9ec4de272d5d0cead0ec256 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Wed, 6 Jul 2011 22:43:27 -0700 Subject: [PATCH 158/411] Move app I2CMaster to I2C --- apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/I2CAppC.nc | 0 apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/I2CP.nc | 0 apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/Makefile | 0 apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/README | 0 4 files changed, 0 insertions(+), 0 deletions(-) rename apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/I2CAppC.nc (100%) rename apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/I2CP.nc (100%) rename apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/Makefile (100%) rename apps/tests/msp430/x5xxx/usci/{I2CMaster => I2C}/README (100%) diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc b/apps/tests/msp430/x5xxx/usci/I2C/I2CAppC.nc similarity index 100% rename from apps/tests/msp430/x5xxx/usci/I2CMaster/I2CAppC.nc rename to apps/tests/msp430/x5xxx/usci/I2C/I2CAppC.nc diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc b/apps/tests/msp430/x5xxx/usci/I2C/I2CP.nc similarity index 100% rename from apps/tests/msp430/x5xxx/usci/I2CMaster/I2CP.nc rename to apps/tests/msp430/x5xxx/usci/I2C/I2CP.nc diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile b/apps/tests/msp430/x5xxx/usci/I2C/Makefile similarity index 100% rename from apps/tests/msp430/x5xxx/usci/I2CMaster/Makefile rename to apps/tests/msp430/x5xxx/usci/I2C/Makefile diff --git a/apps/tests/msp430/x5xxx/usci/I2CMaster/README b/apps/tests/msp430/x5xxx/usci/I2C/README similarity index 100% rename from apps/tests/msp430/x5xxx/usci/I2CMaster/README rename to apps/tests/msp430/x5xxx/usci/I2C/README From 6e3907f9a8458d5137a3442ca1bdb84e03b7ec95 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Thu, 7 Jul 2011 11:16:28 -0700 Subject: [PATCH 159/411] switch tos/lib/serialprintf to tos/lib/printf --- tos/platforms/surf/.platform | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/platforms/surf/.platform b/tos/platforms/surf/.platform index 78ddb58cb0..504e535e7f 100644 --- a/tos/platforms/surf/.platform +++ b/tos/platforms/surf/.platform @@ -46,7 +46,7 @@ for (split(/\n/, <<'EOText' %T/lib/util/keyvaluerecord %T/lib/serial - %T/lib/serialprintf + %T/lib/printf EOText )) { From 36f155b95f6b7d2582624271abb9d80754f37e59 Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Fri, 8 Jul 2011 16:08:46 +0200 Subject: [PATCH 160/411] Fix a typo in the include guard (missing P in MSP430). --- tos/chips/msp430/x2xxx/Msp430DcoSpec.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h index 0e677af04f..0f80287ab8 100644 --- a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h @@ -49,8 +49,8 @@ * values provided by TI for msp430x2xx processors. */ -#ifndef MS430DCOSPEC_H -#define MS430DCOSPEC_H +#ifndef MSP430DCOSPEC_H +#define MSP430DCOSPEC_H /* 8 MIHZ */ #define TARGET_DCO_HZ 8388608UL From d68e520fc9c79a6ec18fdc7bcbb78ccf67f72fae Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 24 Jul 2011 23:09:42 -0700 Subject: [PATCH 161/411] msp430/pins: HplMsp430GeneralIOC, missed some formatting (minor edit) UCA1... pin definitions (wrong formatting) --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 30 +++++++++++--------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 5baf4917db..f026e1d525 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -335,19 +335,19 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as UCB0SDA; provides interface HplMsp430GeneralIO as UCB0CLK; - provides interface HplMsp430GeneralIO as UCA1CLK; - provides interface HplMsp430GeneralIO as UCA1STE; - provides interface HplMsp430GeneralIO as UCA1TXD; - provides interface HplMsp430GeneralIO as UCA1RXD; - provides interface HplMsp430GeneralIO as UCA1SIMO; - provides interface HplMsp430GeneralIO as UCA1SOMI; - - provides interface HplMsp430GeneralIO as UCB1CLK; - provides interface HplMsp430GeneralIO as UCB1STE; - provides interface HplMsp430GeneralIO as UCB1SIMO; - provides interface HplMsp430GeneralIO as UCB1SOMI; - provides interface HplMsp430GeneralIO as UCB1SDA; - provides interface HplMsp430GeneralIO as UCB1SCL; + provides interface HplMsp430GeneralIO as UCA1CLK; + provides interface HplMsp430GeneralIO as UCA1STE; + provides interface HplMsp430GeneralIO as UCA1TXD; + provides interface HplMsp430GeneralIO as UCA1RXD; + provides interface HplMsp430GeneralIO as UCA1SIMO; + provides interface HplMsp430GeneralIO as UCA1SOMI; + + provides interface HplMsp430GeneralIO as UCB1CLK; + provides interface HplMsp430GeneralIO as UCB1STE; + provides interface HplMsp430GeneralIO as UCB1SIMO; + provides interface HplMsp430GeneralIO as UCB1SOMI; + provides interface HplMsp430GeneralIO as UCB1SDA; + provides interface HplMsp430GeneralIO as UCB1SCL; // Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 @@ -928,7 +928,7 @@ implementation { UCB1SCL = P54; UCB1CLK = P55; - // Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 +// Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 ADC0 = P60; ADC1 = P61; @@ -940,7 +940,9 @@ implementation { ADC7 = P67; ADC8 = P50; ADC9 = P51; + // there are no ADC's 10 and 11 according to datasheet + ADC12 = P74; ADC13 = P75; ADC14 = P76; From 163ef443fde8cb3a3eac48517877f520b1f74c3a Mon Sep 17 00:00:00 2001 From: Antonio Lignan Date: Wed, 27 Jul 2011 10:52:06 +0200 Subject: [PATCH 162/411] Added missing licenses, updated tests/z1 and built-in sensors --- .../TestADXL345-XYZ}/Makefile | 2 +- .../z1/Accelerometer/TestADXL345-XYZ/README | 26 + .../TestADXL345-XYZ/TestADXL345AppC.nc | 58 +++ .../TestADXL345-XYZ/TestADXL345C.nc | 100 ++++ .../z1/Accelerometer/TestADXL345/Makefile | 6 + .../tests/z1/Accelerometer/TestADXL345/README | 30 ++ .../TestADXL345/TestADXL345AppC.nc | 61 +++ .../Accelerometer/TestADXL345/TestADXL345C.nc | 119 +++++ .../z1/Accelerometer/TestIntADXL345/Makefile | 2 + .../z1/Accelerometer/TestIntADXL345/README | 22 + .../TestIntADXL345/TestIntADXLAppC.nc | 60 +++ .../TestIntADXL345/TestIntADXLC.nc | 113 +++++ apps/tests/z1/Blink/BlinkAppC.nc | 14 - apps/tests/z1/Blink/BlinkC.nc | 23 - apps/tests/z1/Blink/Makefile | 2 - apps/tests/z1/Button/ButtonAppC.nc | 15 - apps/tests/z1/Button/ButtonC.nc | 24 - apps/tests/z1/Button/Makefile | 2 - apps/tests/z1/FastADC/FastADCAppC.nc | 52 +- apps/tests/z1/FastADC/FastADCC.nc | 145 +++--- apps/tests/z1/IntAccel/IntAccelAppC.nc | 19 - apps/tests/z1/IntAccel/IntAccelC.nc | 73 --- apps/tests/z1/IntAccel/Makefile | 2 - apps/tests/z1/Print/PrintAppC.nc | 54 ++- apps/tests/z1/Print/PrintC.nc | 107 ++++- apps/tests/z1/Print/README | 23 + apps/tests/z1/Receiver/Makefile | 2 - apps/tests/z1/Receiver/ReceiverAppC.nc | 19 - apps/tests/z1/Receiver/ReceiverC.nc | 53 --- apps/tests/z1/Receiver/Wireless.h | 12 - apps/tests/z1/Sender/Makefile | 2 - apps/tests/z1/Sender/SenderAppC.nc | 24 - apps/tests/z1/Sender/SenderC.nc | 60 --- apps/tests/z1/Sender/Wireless.h | 12 - apps/tests/z1/SimpleADXL/ADXL345.h | 32 -- apps/tests/z1/SimpleADXL/ADXL345C.nc | 25 - apps/tests/z1/SimpleADXL/ADXL345Control.nc | 5 - apps/tests/z1/SimpleADXL/ADXL345P.nc | 210 -------- apps/tests/z1/SimpleADXL/Makefile | 3 - apps/tests/z1/SimpleADXL/PrintfUART.h | 70 --- apps/tests/z1/SimpleADXL/TestADXL345AppC.nc | 21 - apps/tests/z1/SimpleADXL/TestADXL345C.nc | 71 --- apps/tests/z1/Temperature/Makefile | 7 +- apps/tests/z1/Temperature/README | 24 + apps/tests/z1/Temperature/TemperatureAppC.nc | 18 - apps/tests/z1/Temperature/TemperatureC.nc | 28 -- apps/tests/z1/Temperature/TestTmp102AppC.nc | 57 +++ apps/tests/z1/Temperature/TestTmp102C.nc | 90 ++++ apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc | 17 - apps/tests/z1/TestADXL345/TestZ1DUTC.nc | 54 --- apps/tests/z1/TestEui/Makefile | 4 + apps/tests/z1/TestEui/README.txt | 24 + apps/tests/z1/TestEui/TestEuiAppC.nc | 52 ++ apps/tests/z1/TestEui/TestEuiC.nc | 73 +++ apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc | 16 - apps/tests/z1/TestTmp102/TestZ1DUTC.nc | 50 -- .../SimpleTSL2563}/Makefile | 0 apps/tests/z1/Ziglets/SimpleTSL2563/TSLC.nc | 68 +++ apps/tests/z1/Ziglets/SimpleTSL2563/TSLP.nc | 173 +++++++ .../z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc | 58 +++ .../z1/Ziglets/SimpleTSL2563/TestTSLC.nc | 80 ++++ apps/tests/z1/Ziglets/SimpleTSL2563/tsl2563.h | 63 +++ apps/tests/z1/Ziglets/TestSht11/Makefile | 7 + apps/tests/z1/Ziglets/TestSht11/README | 28 ++ .../z1/Ziglets/TestSht11/TestSht11AppC.nc | 60 +++ apps/tests/z1/Ziglets/TestSht11/TestSht11C.nc | 108 +++++ tos/chips/adxl345/ADXL345.h | 52 ++ tos/chips/adxl345/ADXL345C.nc | 48 ++ tos/chips/adxl345/ADXL345Control.nc | 44 ++ tos/chips/adxl345/ADXL345P.nc | 174 +++++-- .../msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 9 + tos/chips/tmp102/SimpleTMP102C.nc | 41 ++ tos/chips/tmp102/SimpleTMP102P.nc | 141 +++--- tos/chips/tmp102/TMP102.h | 44 +- tos/platforms/z1/DemoSensorC.nc | 49 +- tos/platforms/z1/LedsIntensity.nc | 39 ++ tos/platforms/z1/LedsIntensityC.nc | 39 ++ tos/platforms/z1/LedsIntensityP.nc | 41 +- tos/platforms/z1/PlatformC.nc | 50 +- tos/platforms/z1/PlatformLedsC.nc | 39 ++ tos/platforms/z1/PlatformP.nc | 42 ++ tos/platforms/z1/PlatformSerialC.nc | 38 ++ tos/platforms/z1/chips/adxl345/HplADXL345C.nc | 43 ++ .../z1/chips/msp430/adc12/BatteryC.nc | 39 ++ .../z1/chips/msp430/adc12/BatteryP.nc | 40 +- .../z1/chips/msp430/usci/Z1SerialP.nc | 39 ++ tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc | 39 +- .../z1/chips/sht11/HalSensirionSht11C.nc | 54 ++- .../z1/chips/sht11/HplSensirionSht11C.nc | 89 +++- .../z1/chips/sht11/HplSensirionSht11P.nc | 62 ++- .../z1/chips/sht11/SensirionSht11C.nc | 50 ++ .../z1/chips/sht11/SensirionSht11LogicP.nc | 450 ++++++++++++++++++ tos/platforms/z1/hardware.h | 39 ++ 93 files changed, 3574 insertions(+), 1194 deletions(-) rename apps/tests/z1/{TestTmp102 => Accelerometer/TestADXL345-XYZ}/Makefile (75%) create mode 100644 apps/tests/z1/Accelerometer/TestADXL345-XYZ/README create mode 100644 apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345AppC.nc create mode 100644 apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345C.nc create mode 100644 apps/tests/z1/Accelerometer/TestADXL345/Makefile create mode 100644 apps/tests/z1/Accelerometer/TestADXL345/README create mode 100644 apps/tests/z1/Accelerometer/TestADXL345/TestADXL345AppC.nc create mode 100644 apps/tests/z1/Accelerometer/TestADXL345/TestADXL345C.nc create mode 100644 apps/tests/z1/Accelerometer/TestIntADXL345/Makefile create mode 100644 apps/tests/z1/Accelerometer/TestIntADXL345/README create mode 100644 apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLAppC.nc create mode 100644 apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLC.nc delete mode 100644 apps/tests/z1/Blink/BlinkAppC.nc delete mode 100644 apps/tests/z1/Blink/BlinkC.nc delete mode 100644 apps/tests/z1/Blink/Makefile delete mode 100644 apps/tests/z1/Button/ButtonAppC.nc delete mode 100644 apps/tests/z1/Button/ButtonC.nc delete mode 100644 apps/tests/z1/Button/Makefile delete mode 100644 apps/tests/z1/IntAccel/IntAccelAppC.nc delete mode 100644 apps/tests/z1/IntAccel/IntAccelC.nc delete mode 100644 apps/tests/z1/IntAccel/Makefile create mode 100644 apps/tests/z1/Print/README delete mode 100644 apps/tests/z1/Receiver/Makefile delete mode 100644 apps/tests/z1/Receiver/ReceiverAppC.nc delete mode 100644 apps/tests/z1/Receiver/ReceiverC.nc delete mode 100644 apps/tests/z1/Receiver/Wireless.h delete mode 100644 apps/tests/z1/Sender/Makefile delete mode 100644 apps/tests/z1/Sender/SenderAppC.nc delete mode 100644 apps/tests/z1/Sender/SenderC.nc delete mode 100644 apps/tests/z1/Sender/Wireless.h delete mode 100644 apps/tests/z1/SimpleADXL/ADXL345.h delete mode 100644 apps/tests/z1/SimpleADXL/ADXL345C.nc delete mode 100644 apps/tests/z1/SimpleADXL/ADXL345Control.nc delete mode 100644 apps/tests/z1/SimpleADXL/ADXL345P.nc delete mode 100644 apps/tests/z1/SimpleADXL/Makefile delete mode 100644 apps/tests/z1/SimpleADXL/PrintfUART.h delete mode 100644 apps/tests/z1/SimpleADXL/TestADXL345AppC.nc delete mode 100644 apps/tests/z1/SimpleADXL/TestADXL345C.nc create mode 100644 apps/tests/z1/Temperature/README delete mode 100644 apps/tests/z1/Temperature/TemperatureAppC.nc delete mode 100644 apps/tests/z1/Temperature/TemperatureC.nc create mode 100644 apps/tests/z1/Temperature/TestTmp102AppC.nc create mode 100644 apps/tests/z1/Temperature/TestTmp102C.nc delete mode 100644 apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc delete mode 100644 apps/tests/z1/TestADXL345/TestZ1DUTC.nc create mode 100644 apps/tests/z1/TestEui/Makefile create mode 100644 apps/tests/z1/TestEui/README.txt create mode 100644 apps/tests/z1/TestEui/TestEuiAppC.nc create mode 100644 apps/tests/z1/TestEui/TestEuiC.nc delete mode 100644 apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc delete mode 100644 apps/tests/z1/TestTmp102/TestZ1DUTC.nc rename apps/tests/z1/{TestADXL345 => Ziglets/SimpleTSL2563}/Makefile (100%) mode change 100644 => 100755 create mode 100755 apps/tests/z1/Ziglets/SimpleTSL2563/TSLC.nc create mode 100755 apps/tests/z1/Ziglets/SimpleTSL2563/TSLP.nc create mode 100755 apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc create mode 100755 apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLC.nc create mode 100755 apps/tests/z1/Ziglets/SimpleTSL2563/tsl2563.h create mode 100644 apps/tests/z1/Ziglets/TestSht11/Makefile create mode 100644 apps/tests/z1/Ziglets/TestSht11/README create mode 100644 apps/tests/z1/Ziglets/TestSht11/TestSht11AppC.nc create mode 100644 apps/tests/z1/Ziglets/TestSht11/TestSht11C.nc mode change 100644 => 100755 tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc mode change 100644 => 100755 tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc mode change 100644 => 100755 tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc mode change 100644 => 100755 tos/platforms/z1/chips/sht11/SensirionSht11C.nc create mode 100755 tos/platforms/z1/chips/sht11/SensirionSht11LogicP.nc diff --git a/apps/tests/z1/TestTmp102/Makefile b/apps/tests/z1/Accelerometer/TestADXL345-XYZ/Makefile similarity index 75% rename from apps/tests/z1/TestTmp102/Makefile rename to apps/tests/z1/Accelerometer/TestADXL345-XYZ/Makefile index c68f589e30..cbfc77a6bc 100644 --- a/apps/tests/z1/TestTmp102/Makefile +++ b/apps/tests/z1/Accelerometer/TestADXL345-XYZ/Makefile @@ -1,4 +1,4 @@ -COMPONENT=TestZ1DUTAppC +COMPONENT=TestADXL345AppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 include $(MAKERULES) diff --git a/apps/tests/z1/Accelerometer/TestADXL345-XYZ/README b/apps/tests/z1/Accelerometer/TestADXL345-XYZ/README new file mode 100644 index 0000000000..55dcf57bd4 --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestADXL345-XYZ/README @@ -0,0 +1,26 @@ +README for ADXL35 sensor test app +Author/Contact: Antonio Linan + +Description: + +This application simple polls periodically the ADXL345 sensor for data +and toggles the red led when all axis are read + +The data is printed over the serial port, using a client like putty or +picocom you can see the readings of the sensor adjusting the serial port +to this configuration: + +bauds: 115200 +bits: 8 +parity: none + +The ADXL345 sensor is a temperature sensor and its already integrated as +part of the Zolertia Z1 mote. + +Tools: + +None + +Known bugs/limitations: + +None. diff --git a/apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345AppC.nc b/apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345AppC.nc new file mode 100644 index 0000000000..f0e3e8834f --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345AppC.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to read at the same time all axis of the + * ADXL345 sssAccelerometer built-in Zolertia Z1 motes + * + * @author: Antonio Linan + */ + +#include "PrintfUART.h" + +configuration TestADXL345AppC {} +implementation { + components MainC, TestADXL345C as App, LedsC; + App.Leds -> LedsC; + App.Boot -> MainC.Boot; + components new TimerMilliC() as TestTimer; + App.TestTimer -> TestTimer; + + components new ADXL345C(); + App.axis -> ADXL345C.XYZ; + App.AccelControl -> ADXL345C.SplitControl; + +} + + diff --git a/apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345C.nc b/apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345C.nc new file mode 100644 index 0000000000..777db03aae --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345C.nc @@ -0,0 +1,100 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to read at the same time all axis of the + * ADXL345 Accelerometer built-in Zolertia Z1 motes + * + * @author: Antonio Linan + */ + +#include "PrintfUART.h" +#include "ADXL345.h" + +module TestADXL345C { + uses { + interface Leds; + interface Boot; + interface Timer as TestTimer; + interface Read as axis; + interface HplMsp430GeneralIO as PinTest1; + interface HplMsp430GeneralIO as PinTest2; + interface SplitControl as AccelControl; + } +} +implementation { + void printTitles(){ + printfUART("\n\n"); + printfUART(" ###############################\n"); + printfUART(" # Z1 ADXL345 Test #\n"); + printfUART(" ###############################\n"); + printfUART("\n"); + } + + event void Boot.booted() { + uint8_t state = 0; + printfUART_init(); + printTitles(); + call TestTimer.startPeriodic(1024); + } + + event void TestTimer.fired(){ + call AccelControl.start(); + } + + event void AccelControl.startDone(error_t err) { + if (err == SUCCESS){ + call axis.read(); + } else { + printfUART("Bad start\n"); + } + } + + event void AccelControl.stopDone(error_t err) {} + + event void axis.readDone(error_t result, adxl345_readxyt_t data){ + if (result == SUCCESS){ + call Leds.led0Toggle(); + printfUART("X [%d] Y [%d] Z [%d]\n", data.x_axis, data.y_axis, data.z_axis); + } else { + printfUART("Error reading axis\n"); + } + } + +} + + + + + diff --git a/apps/tests/z1/Accelerometer/TestADXL345/Makefile b/apps/tests/z1/Accelerometer/TestADXL345/Makefile new file mode 100644 index 0000000000..cbfc77a6bc --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestADXL345/Makefile @@ -0,0 +1,6 @@ +COMPONENT=TestADXL345AppC +CFLAGS += -DPRINTFUART_ENABLED +CFLAGS += -DMSP430XSPEED8 +include $(MAKERULES) + + diff --git a/apps/tests/z1/Accelerometer/TestADXL345/README b/apps/tests/z1/Accelerometer/TestADXL345/README new file mode 100644 index 0000000000..10ce6132fd --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestADXL345/README @@ -0,0 +1,30 @@ +README for ADXL35 sensor test app +Author/Contact: Antonio Linan + +Description: + +This application simple polls periodically the ADXL345 sensor for data +and toggles a led when a specific axis is read: + + * X axis: red led. + * Y axis: green led. + * Z axis: blue led. + +The data is printed over the serial port, using a client like putty or +picocom you can see the readings of the sensor adjusting the serial port +to this configuration: + +bauds: 115200 +bits: 8 +parity: none + +The ADXL345 sensor is a temperature sensor and its already integrated as +part of the Zolertia Z1 mote. + +Tools: + +None + +Known bugs/limitations: + +None. diff --git a/apps/tests/z1/Accelerometer/TestADXL345/TestADXL345AppC.nc b/apps/tests/z1/Accelerometer/TestADXL345/TestADXL345AppC.nc new file mode 100644 index 0000000000..2ac5d715e7 --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestADXL345/TestADXL345AppC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to read individually the axis of the ADLX345 + * Accelerometer built-in Zolertia Z1 motes + * + * @author: Antonio Linan + */ + + +#include "PrintfUART.h" + +configuration TestADXL345AppC {} +implementation { + components MainC, TestADXL345C as App, LedsC; + App.Leds -> LedsC; + App.Boot -> MainC.Boot; + components new TimerMilliC() as TestTimer; + App.TestTimer -> TestTimer; + + components new ADXL345C(); + App.Xaxis -> ADXL345C.X; + App.Yaxis -> ADXL345C.Y; + App.Zaxis -> ADXL345C.Z; + App.AccelControl -> ADXL345C.SplitControl; + +} + + diff --git a/apps/tests/z1/Accelerometer/TestADXL345/TestADXL345C.nc b/apps/tests/z1/Accelerometer/TestADXL345/TestADXL345C.nc new file mode 100644 index 0000000000..feb4009588 --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestADXL345/TestADXL345C.nc @@ -0,0 +1,119 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to read individually the axis of the ADLX345 + * Accelerometer built-in Zolertia Z1 motes + * + * @author: Antonio Linan + */ + +#include "PrintfUART.h" + +module TestADXL345C { + uses { + interface Leds; + interface Boot; + interface Timer as TestTimer; + interface Read as Xaxis; + interface Read as Yaxis; + interface Read as Zaxis; + interface SplitControl as AccelControl; + } +} +implementation { + void printTitles(){ + printfUART("\n\n"); + printfUART(" ###############################\n"); + printfUART(" # Z1 ADXL345 Test #\n"); + printfUART(" ###############################\n"); + printfUART("\n"); + } + + event void Boot.booted() { + uint8_t state = 0; + printfUART_init(); + printTitles(); + call TestTimer.startPeriodic(1024); + } + + event void TestTimer.fired(){ + call AccelControl.start(); + } + + event void AccelControl.startDone(error_t err) { + if (err == SUCCESS){ + call Xaxis.read(); + } else { + printfUART("Bad Start\n"); + } + } + + event void AccelControl.stopDone(error_t err) {} + + event void Xaxis.readDone(error_t result, uint16_t data){ + if (result == SUCCESS){ + call Leds.led0Toggle(); + printfUART("Xaxis: %d\n", data); + call Yaxis.read(); + } else { + printfUART("Bad X\n"); + } + } + + event void Yaxis.readDone(error_t result, uint16_t data){ + if (result == SUCCESS){ + call Leds.led1Toggle(); + printfUART("Yaxis: %d\n", data); + call Zaxis.read(); + } else { + printfUART("Bad Y\n"); + } + } + + event void Zaxis.readDone(error_t result, uint16_t data){ + if (result == SUCCESS){ + call Leds.led2Toggle(); + printfUART("Zaxis: %d\n", data); + } else { + printfUART("Bad Z\n"); + } + } + +} + + + + + diff --git a/apps/tests/z1/Accelerometer/TestIntADXL345/Makefile b/apps/tests/z1/Accelerometer/TestIntADXL345/Makefile new file mode 100644 index 0000000000..7c0062e917 --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestIntADXL345/Makefile @@ -0,0 +1,2 @@ +COMPONENT=TestIntADXLAppC +include $(MAKERULES) diff --git a/apps/tests/z1/Accelerometer/TestIntADXL345/README b/apps/tests/z1/Accelerometer/TestIntADXL345/README new file mode 100644 index 0000000000..f32cb95032 --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestIntADXL345/README @@ -0,0 +1,22 @@ +README for ADXL35 interruptions test app +Author/Contact: Antonio Linan + +Description: + +This application test the Accelerometer interruptions in the following +manner: + + * Single tap: toggle led red + * Double tap: toggle green led + * Free fall: toggle blue led + +The ADXL345 sensor is a temperature sensor and its already integrated as +part of the Zolertia Z1 mote. + +Tools: + +None + +Known bugs/limitations: + +None. diff --git a/apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLAppC.nc b/apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLAppC.nc new file mode 100644 index 0000000000..25a38a10cd --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLAppC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test the interruptions (single and + * double tap, free fall) of the ADLX345 Accelerometer built-in + * Zolertia Z1 motes + * + * @author: Antonio Linan + */ + +configuration TestIntADXLAppC { } + +implementation{ + + components MainC, TestIntADXLC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new ADXL345C(); + App.IntSource -> ADXL345C.IntSource; + App.AccelControl -> ADXL345C.SplitControl; + App.IntAccel1 -> ADXL345C.Int1; + App.IntAccel2 -> ADXL345C.Int2; + App.ADXLControl -> ADXL345C.ADXL345Control; + +} diff --git a/apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLC.nc b/apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLC.nc new file mode 100644 index 0000000000..db68851b66 --- /dev/null +++ b/apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLC.nc @@ -0,0 +1,113 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test the interruptions (single and + * double tap, free fall) of the ADLX345 Accelerometer built-in + * Zolertia Z1 motes + * + * @author: Antonio Linan + */ + +#include "ADXL345.h" + +module TestIntADXLC{ + + uses interface Boot; + uses interface Leds; + uses interface Read as IntSource; + uses interface SplitControl as AccelControl; + uses interface Notify as IntAccel1; + uses interface Notify as IntAccel2; + uses interface ADXL345Control as ADXLControl; +} + +implementation{ + + bool source_int2=FALSE; + + event void Boot.booted(){ + call AccelControl.start(); + } + + event void IntAccel1.notify(adxlint_state_t val) { + source_int2=FALSE; + call Leds.led0Toggle(); + call IntSource.read(); //this will clear the interruption + } + + event void IntAccel2.notify(adxlint_state_t val) { + source_int2=TRUE; + call IntSource.read(); //this will clear the interruption; + } + + event void AccelControl.startDone(error_t err) { + call ADXLControl.setInterrups( + ADXLINT_DOUBLE_TAP | + ADXLINT_SINGLE_TAP | + ADXLINT_FREE_FALL ); + } + + event void AccelControl.stopDone(error_t err) { } + + event void IntSource.readDone(error_t result, uint8_t data){ + if(source_int2) { + if(data & ADXLINT_FREE_FALL) call Leds.led2Toggle(); + else call Leds.led1Toggle(); + } + } + + event void ADXLControl.setInterruptsDone(error_t error){ + call ADXLControl.setIntMap(ADXLINT_DOUBLE_TAP | ADXLINT_FREE_FALL); + } + + event void ADXLControl.setIntMapDone(error_t error){ + call IntAccel1.enable(); + call IntAccel2.enable(); + call IntSource.read(); //this will clear the interruption + } + + event void ADXLControl.setDurationDone(error_t error) { } //not used + + event void ADXLControl.setWindowDone(error_t error) { } //not used + + event void ADXLControl.setLatentDone(error_t error) { } //not used + + event void ADXLControl.setRegisterDone(error_t error) { } //not used + + event void ADXLControl.setRangeDone(error_t error) { } //not used + + event void ADXLControl.setReadAddressDone(error_t error) { } //not used + +} diff --git a/apps/tests/z1/Blink/BlinkAppC.nc b/apps/tests/z1/Blink/BlinkAppC.nc deleted file mode 100644 index bcd56f6231..0000000000 --- a/apps/tests/z1/Blink/BlinkAppC.nc +++ /dev/null @@ -1,14 +0,0 @@ -configuration BlinkAppC -{ -} -implementation -{ - components MainC, BlinkC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new TimerMilliC() as TimerBlink; - App.TimerBlink -> TimerBlink; -} \ No newline at end of file diff --git a/apps/tests/z1/Blink/BlinkC.nc b/apps/tests/z1/Blink/BlinkC.nc deleted file mode 100644 index 125c0b4cf8..0000000000 --- a/apps/tests/z1/Blink/BlinkC.nc +++ /dev/null @@ -1,23 +0,0 @@ -#include "Timer.h" - -module BlinkC -{ - uses interface Boot; - uses interface Leds; - uses interface Timer as TimerBlink; -} -implementation -{ - event void Boot.booted() - { - call TimerBlink.startPeriodic( 250 ); - } - - event void TimerBlink.fired() - { - call Leds.led0Toggle(); - call Leds.led1Toggle(); - call Leds.led2Toggle(); - } - -} \ No newline at end of file diff --git a/apps/tests/z1/Blink/Makefile b/apps/tests/z1/Blink/Makefile deleted file mode 100644 index 27dde2297a..0000000000 --- a/apps/tests/z1/Blink/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=BlinkAppC -include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Button/ButtonAppC.nc b/apps/tests/z1/Button/ButtonAppC.nc deleted file mode 100644 index 484e7471cc..0000000000 --- a/apps/tests/z1/Button/ButtonAppC.nc +++ /dev/null @@ -1,15 +0,0 @@ -configuration ButtonAppC -{ -} -implementation -{ - components MainC, ButtonC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components UserButtonC; - App.Button -> UserButtonC; - -} \ No newline at end of file diff --git a/apps/tests/z1/Button/ButtonC.nc b/apps/tests/z1/Button/ButtonC.nc deleted file mode 100644 index 4a5be25ee3..0000000000 --- a/apps/tests/z1/Button/ButtonC.nc +++ /dev/null @@ -1,24 +0,0 @@ -#include "UserButton.h" - -module ButtonC -{ - uses interface Leds; - uses interface Boot; - uses interface Notify as Button; -} -implementation -{ - event void Boot.booted() - { - call Button.enable(); - } - - event void Button.notify(button_state_t val) { - if(val == BUTTON_RELEASED) { - call Leds.led0Off(); - } else { - call Leds.led0On(); - } - } - -} \ No newline at end of file diff --git a/apps/tests/z1/Button/Makefile b/apps/tests/z1/Button/Makefile deleted file mode 100644 index 32350b0fc0..0000000000 --- a/apps/tests/z1/Button/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=ButtonAppC -include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/FastADC/FastADCAppC.nc b/apps/tests/z1/FastADC/FastADCAppC.nc index 95748c59b9..e498aff998 100644 --- a/apps/tests/z1/FastADC/FastADCAppC.nc +++ b/apps/tests/z1/FastADC/FastADCAppC.nc @@ -1,10 +1,50 @@ +/* + * Copyright (c) 2010-2011 DEXMA SENSORS SL + * Copyright (c) 2011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + DMA bundle + * + * @author: Xavier Orduna + * @author: Antonio Linan + */ + #include "StorageVolumes.h" -configuration FastADCAppC -{ -} -implementation -{ +configuration FastADCAppC { } + +implementation { components MainC, FastADCC as App; App -> MainC.Boot; @@ -25,4 +65,4 @@ implementation App.BlockWrite -> BlockStorageC.BlockWrite; App.BlockRead -> BlockStorageC.BlockRead; -} \ No newline at end of file +} diff --git a/apps/tests/z1/FastADC/FastADCC.nc b/apps/tests/z1/FastADC/FastADCC.nc index 46106754bb..0b9d90c6e5 100644 --- a/apps/tests/z1/FastADC/FastADCC.nc +++ b/apps/tests/z1/FastADC/FastADCC.nc @@ -1,10 +1,52 @@ +/* + * Copyright (c) 2010-2011 DEXMA SENSORS SL + * Copyright (c) 2011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + DMA bundle + * + * @author: Xavier Orduna + * @author: Antonio Linan + */ + #include "Timer.h" #include "printfZ1.h" #define FADSAMPLES 2000 #define PRINTBUF 20 -module FastADCC -{ +module FastADCC{ + uses interface Boot; uses interface Leds; uses interface Timer as TimerBlink; @@ -17,8 +59,8 @@ module FastADCC uses interface BlockWrite; uses interface BlockRead; } -implementation -{ + +implementation{ uint16_t adb[FADSAMPLES]; uint16_t pb[PRINTBUF]; @@ -40,111 +82,94 @@ implementation } void configureSingle(){ - error_t e; - printfz1("configuring single\n"); - e = call adc.configureSingle(&adcconfig); + error_t e; + printfz1("configuring single\n"); + e = call adc.configureSingle(&adcconfig); if(e != SUCCESS) - showerror(); + showerror(); printfz1("error %d\n", e); } void configureMultiple(){ - error_t e; - printfz1("configuring multiple\n"); - e = call adc.configureMultiple(&adcconfig, adb, FADSAMPLES, 3); + error_t e; + printfz1("configuring multiple\n"); + e = call adc.configureMultiple(&adcconfig, adb, FADSAMPLES, 3); if(e != SUCCESS) - showerror(); + showerror(); printfz1("error %d\n", e); - } void printadb(){ - uint16_t i; - printfz1("printing buffer\n"); - for(i = 0; i < FADSAMPLES; i++){ - printfz1("adb[%d] = %d\n", i, adb[i]); - } + uint16_t i; + printfz1("printing buffer\n"); + for(i = 0; i < FADSAMPLES; i++){ + printfz1("adb[%d] = %d\n", i, adb[i]); + } } void writeadb(){ - printfz1("writing adb\n"); - call BlockWrite.write(0, adb, FADSAMPLES); + printfz1("writing adb\n"); + call BlockWrite.write(0, adb, FADSAMPLES); } - void readadb(){ - - } + void readadb(){ } - event void Boot.booted() - { + event void Boot.booted(){ printfz1_init(); printfz1("booting\n"); - call Resource.request(); - } - event void TimerBlink.fired() - { + event void TimerBlink.fired(){ call Leds.led0Toggle(); call Leds.led1Toggle(); call Leds.led2Toggle(); } event void TimerSample.fired(){ - error_t e; - printfz1("starting conversion\n"); - e = call adc.getData(); - printfz1("error %d\n", e); + error_t e; + printfz1("starting conversion\n"); + e = call adc.getData(); + printfz1("error %d\n", e); } - async event void overflow.conversionTimeOverflow(){ - - } + async event void overflow.conversionTimeOverflow(){ } - async event void overflow.memOverflow(){ - - } + async event void overflow.memOverflow(){ } async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - printfz1("samples ready\n"); - writeadb(); - printadb(); - return buffer; + printfz1("samples ready\n"); + writeadb(); + printadb(); + return buffer; } async event error_t adc.singleDataReady(uint16_t data){ - //printfz1("sample: %d\n", data); - return SUCCESS; + //printfz1("sample: %d\n", data); + return SUCCESS; } event void Resource.granted(){ - printfz1("Resource granted\n"); + printfz1("Resource granted\n"); configureMultiple(); call TimerSample.startOneShot(1000); } - event void BlockRead.readDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { - - } + event void BlockRead.readDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { } - event void BlockWrite.eraseDone(error_t result) { - - } + event void BlockWrite.eraseDone(error_t result) { } event void BlockWrite.writeDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { - printfz1("write done -> %d\n", result); - if (result == SUCCESS){ - printfz1("syncing\n"); + printfz1("write done -> %d\n", result); + if (result == SUCCESS){ + printfz1("syncing\n"); call BlockWrite.sync(); } } event void BlockWrite.syncDone(error_t result) { - printfz1("sync done -> %d\n", result); + printfz1("sync done -> %d\n", result); } - event void BlockRead.computeCrcDone(storage_addr_t x, storage_len_t y, uint16_t z, error_t result) { - - } -} \ No newline at end of file + event void BlockRead.computeCrcDone(storage_addr_t x, storage_len_t y, uint16_t z, error_t result) { } +} diff --git a/apps/tests/z1/IntAccel/IntAccelAppC.nc b/apps/tests/z1/IntAccel/IntAccelAppC.nc deleted file mode 100644 index 8bbdd22182..0000000000 --- a/apps/tests/z1/IntAccel/IntAccelAppC.nc +++ /dev/null @@ -1,19 +0,0 @@ -configuration IntAccelAppC -{ -} -implementation -{ - components MainC, IntAccelC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new ADXL345C(); - App.IntSource -> ADXL345C.IntSource; - App.AccelControl -> ADXL345C.SplitControl; - App.IntAccel1 -> ADXL345C.Int1; - App.IntAccel2 -> ADXL345C.Int2; - App.ADXLControl -> ADXL345C.ADXL345Control; - -} \ No newline at end of file diff --git a/apps/tests/z1/IntAccel/IntAccelC.nc b/apps/tests/z1/IntAccel/IntAccelC.nc deleted file mode 100644 index 067338af46..0000000000 --- a/apps/tests/z1/IntAccel/IntAccelC.nc +++ /dev/null @@ -1,73 +0,0 @@ -#include "ADXL345.h" - -module IntAccelC -{ - uses interface Boot; - uses interface Leds; - uses interface Read as IntSource; - uses interface SplitControl as AccelControl; - uses interface Notify as IntAccel1; - uses interface Notify as IntAccel2; - uses interface ADXL345Control as ADXLControl; - -} -implementation -{ - bool source_int2=FALSE; - - event void Boot.booted() - { - call AccelControl.start(); - } - - event void IntAccel1.notify(adxlint_state_t val) { - source_int2=FALSE; - call Leds.led0Toggle(); - call IntSource.read(); //this will clear the interruption - } - - event void IntAccel2.notify(adxlint_state_t val) { - source_int2=TRUE; - call IntSource.read(); //this will clear the interruption; - } - - event void AccelControl.startDone(error_t err) { - call ADXLControl.setInterrups( - ADXLINT_DOUBLE_TAP | - ADXLINT_SINGLE_TAP | - ADXLINT_FREE_FALL ); - } - - event void AccelControl.stopDone(error_t err) { - } - - event void IntSource.readDone(error_t result, uint8_t data){ - if(source_int2) { - if(data & ADXLINT_FREE_FALL) call Leds.led2Toggle(); - else call Leds.led1Toggle(); - } - } - - event void ADXLControl.setInterruptsDone(error_t error){ - call ADXLControl.setIntMap(ADXLINT_DOUBLE_TAP | ADXLINT_FREE_FALL); - } - - event void ADXLControl.setIntMapDone(error_t error){ - call IntAccel1.enable(); - call IntAccel2.enable(); - call IntSource.read(); //this will clear the interruption - } - - event void ADXLControl.setDurationDone(error_t error) { } //not used - - event void ADXLControl.setWindowDone(error_t error) { } //not used - - event void ADXLControl.setLatentDone(error_t error) { } //not used - - event void ADXLControl.setRegisterDone(error_t error) { } //not used - - event void ADXLControl.setRangeDone(error_t error) { } //not used - - event void ADXLControl.setReadAddressDone(error_t error) { } //not used - -} \ No newline at end of file diff --git a/apps/tests/z1/IntAccel/Makefile b/apps/tests/z1/IntAccel/Makefile deleted file mode 100644 index 277d3b55e6..0000000000 --- a/apps/tests/z1/IntAccel/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=IntAccelAppC -include $(MAKERULES) diff --git a/apps/tests/z1/Print/PrintAppC.nc b/apps/tests/z1/Print/PrintAppC.nc index 70dfa32b83..3171a67f5a 100644 --- a/apps/tests/z1/Print/PrintAppC.nc +++ b/apps/tests/z1/Print/PrintAppC.nc @@ -1,8 +1,49 @@ -configuration PrintAppC -{ -} -implementation -{ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * Copyright (c) 2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test printf adaptation made for Zolertia + * Z1 motes + * + * @author: Antonio Linan + * @author Eric B. Decker + */ + +configuration PrintAppC { } + +implementation{ components MainC, PrintC as App; App -> MainC.Boot; @@ -11,5 +52,4 @@ implementation components new TimerMilliC() as TimerPrint; App.TimerPrint -> TimerPrint; - -} \ No newline at end of file +} diff --git a/apps/tests/z1/Print/PrintC.nc b/apps/tests/z1/Print/PrintC.nc index 0c8a650394..d02aee6fa6 100644 --- a/apps/tests/z1/Print/PrintC.nc +++ b/apps/tests/z1/Print/PrintC.nc @@ -1,27 +1,110 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * Copyright (c) 2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test printf adaptation made for Zolertia + * Z1 motes + * + * @author: Antonio Linan + * @author Eric B. Decker + *//* + * Copyright (c) 20011 ZOLERTIA LABS + * Copyright (c) 2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test printf adaptation made for Zolertia + * Z1 motes + * + * @author: Antonio Linan + * @author Eric B. Decker + */ + #include "printfZ1.h" -module PrintC -{ +module PrintC{ + uses interface Boot; uses interface Leds; uses interface Timer as TimerPrint; } -implementation -{ + +implementation{ + uint8_t counter; - event void Boot.booted() - { - printfz1_init(); - counter = 0; - call TimerPrint.startPeriodic( 1024 ); + event void Boot.booted(){ + printfz1_init(); + counter = 0; + call TimerPrint.startPeriodic( 1024 ); } - event void TimerPrint.fired() - { + event void TimerPrint.fired(){ call Leds.led0Toggle(); printfz1("Print num: %d\n", counter); counter++; } -} \ No newline at end of file +} diff --git a/apps/tests/z1/Print/README b/apps/tests/z1/Print/README new file mode 100644 index 0000000000..e32fa83a02 --- /dev/null +++ b/apps/tests/z1/Print/README @@ -0,0 +1,23 @@ +README for Printf Z1 app +Author/Contact: Antonio Linan + +Description: + +This application simple increments a timer and prints its value over +the serial port using a printf implementation for the Z1 mote. + +The data is printed over the serial port, using a client like putty or +picocom you can see the readings of the sensor adjusting the serial port +to this configuration: + +bauds: 115200 +bits: 8 +parity: none + +Tools: + +None + +Known bugs/limitations: + +None. diff --git a/apps/tests/z1/Receiver/Makefile b/apps/tests/z1/Receiver/Makefile deleted file mode 100644 index bb4a9d292d..0000000000 --- a/apps/tests/z1/Receiver/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=ReceiverAppC -include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Receiver/ReceiverAppC.nc b/apps/tests/z1/Receiver/ReceiverAppC.nc deleted file mode 100644 index d5e2414472..0000000000 --- a/apps/tests/z1/Receiver/ReceiverAppC.nc +++ /dev/null @@ -1,19 +0,0 @@ -#include "Wireless.h" - -configuration ReceiverAppC {} -implementation { - components ReceiverC as App; - - components MainC; - App.Boot -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new AMReceiverC(AM_WIRELESS_MSG); - App.Receive -> AMReceiverC; - - components ActiveMessageC; - App.AMControl -> ActiveMessageC; - -} \ No newline at end of file diff --git a/apps/tests/z1/Receiver/ReceiverC.nc b/apps/tests/z1/Receiver/ReceiverC.nc deleted file mode 100644 index 1762baedc5..0000000000 --- a/apps/tests/z1/Receiver/ReceiverC.nc +++ /dev/null @@ -1,53 +0,0 @@ -#include "Wireless.h" - -module ReceiverC { - uses interface Leds; - uses interface Boot; - uses interface Receive; - uses interface SplitControl as AMControl; - uses interface Packet; -} -implementation { - - message_t packet; - - bool locked; - uint16_t counter = 0; - - event void Boot.booted() { - call AMControl.start(); - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - // do nothing - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - // do nothing - } - - event message_t* Receive.receive(message_t* bufPtr, - void* payload, uint8_t len) { - if (len != sizeof(wireless_msg_t)) {return bufPtr;} - else { - wireless_msg_t* rcm = (wireless_msg_t*)payload; - - if (rcm->counter & 0x1) call Leds.led0On(); - else call Leds.led0Off(); - - if (rcm->counter & 0x2) call Leds.led1On(); - else call Leds.led1Off(); - - if (rcm->counter & 0x4) call Leds.led2On(); - else call Leds.led2Off(); - - return bufPtr; - } - } - -} \ No newline at end of file diff --git a/apps/tests/z1/Receiver/Wireless.h b/apps/tests/z1/Receiver/Wireless.h deleted file mode 100644 index 6c4e0d9fe9..0000000000 --- a/apps/tests/z1/Receiver/Wireless.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef WIRELESS_H -#define WIRELESS_H - -typedef nx_struct wireless_msg { - nx_uint16_t counter; -} wireless_msg_t; - -enum { - AM_WIRELESS_MSG = 23, -}; - -#endif \ No newline at end of file diff --git a/apps/tests/z1/Sender/Makefile b/apps/tests/z1/Sender/Makefile deleted file mode 100644 index 45c8bdd123..0000000000 --- a/apps/tests/z1/Sender/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=SenderAppC -include $(MAKERULES) \ No newline at end of file diff --git a/apps/tests/z1/Sender/SenderAppC.nc b/apps/tests/z1/Sender/SenderAppC.nc deleted file mode 100644 index 3dd3d5ebcc..0000000000 --- a/apps/tests/z1/Sender/SenderAppC.nc +++ /dev/null @@ -1,24 +0,0 @@ -#include "Wireless.h" - -configuration SenderAppC {} -implementation { - components SenderC as App; - - components MainC; - App.Boot -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - - components new AMSenderC(AM_WIRELESS_MSG); - App.AMSend -> AMSenderC; - App.Packet -> AMSenderC; - - components new TimerMilliC(); - App.TimerWireless -> TimerMilliC; - - components ActiveMessageC; - App.AMControl -> ActiveMessageC; - -} \ No newline at end of file diff --git a/apps/tests/z1/Sender/SenderC.nc b/apps/tests/z1/Sender/SenderC.nc deleted file mode 100644 index 19d5db948c..0000000000 --- a/apps/tests/z1/Sender/SenderC.nc +++ /dev/null @@ -1,60 +0,0 @@ -#include "Timer.h" -#include "Wireless.h" - -module SenderC { - uses interface Leds; - uses interface Boot; - uses interface AMSend; - uses interface Timer as TimerWireless; - uses interface SplitControl as AMControl; - uses interface Packet; -} -implementation { - - message_t packet; - - bool locked; - uint16_t counter = 0; - - event void Boot.booted() { - call AMControl.start(); - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call TimerWireless.startPeriodic(250); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - // do nothing - } - - event void TimerWireless.fired() { - counter++; - if (locked) { - return; - } - else { - wireless_msg_t* rcm = (wireless_msg_t*)call Packet.getPayload(&packet, sizeof(wireless_msg_t)); - if (rcm == NULL) { - return; - } - - rcm->counter = counter; - if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(wireless_msg_t)) == SUCCESS) { - locked = TRUE; - } - } - } - - event void AMSend.sendDone(message_t* bufPtr, error_t error) { - if (&packet == bufPtr) { - locked = FALSE; - } - } - -} \ No newline at end of file diff --git a/apps/tests/z1/Sender/Wireless.h b/apps/tests/z1/Sender/Wireless.h deleted file mode 100644 index 6c4e0d9fe9..0000000000 --- a/apps/tests/z1/Sender/Wireless.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef WIRELESS_H -#define WIRELESS_H - -typedef nx_struct wireless_msg { - nx_uint16_t counter; -} wireless_msg_t; - -enum { - AM_WIRELESS_MSG = 23, -}; - -#endif \ No newline at end of file diff --git a/apps/tests/z1/SimpleADXL/ADXL345.h b/apps/tests/z1/SimpleADXL/ADXL345.h deleted file mode 100644 index 53c779035c..0000000000 --- a/apps/tests/z1/SimpleADXL/ADXL345.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef ADXL345_H - -#define ADXL345_H - -#define ADXL345_ADDRESS 0x53 -#define ADXL345_POWER_CTL 0x2D -#define ADXL345_DATAX0 0x32 -#define ADXL345_DATAY0 0x34 -#define ADXL345_DATAZ0 0x36 -#define ADXL345_DATAFORMAT 0x31 - - -#define ADXL345_MEASURE_MODE 0x08 - -#define ADXL345_RANGE_2G 0 -#define ADXL345_RANGE_4G 1 -#define ADXL345_RANGE_8G 2 -#define ADXL345_RANGE_16G 3 - -#define ADXL345_LOWRES 0 -#define ADXL345_FULLRES 1 - -#define ADXLCMD_START 1 -#define ADXLCMD_READ_X 2 -#define ADXLCMD_READ_Y 3 -#define ADXLCMD_READ_Z 4 -#define ADXLCMD_RANGE 5 - - - - -#endif \ No newline at end of file diff --git a/apps/tests/z1/SimpleADXL/ADXL345C.nc b/apps/tests/z1/SimpleADXL/ADXL345C.nc deleted file mode 100644 index 59406068b5..0000000000 --- a/apps/tests/z1/SimpleADXL/ADXL345C.nc +++ /dev/null @@ -1,25 +0,0 @@ - -configuration ADXL345C { - provides interface SplitControl; - provides interface Read as X; - provides interface Read as Y; - provides interface Read as Z; - provides interface ADXL345Control; -} -implementation { - components ADXL345P; - X = ADXL345P.X; - Y = ADXL345P.Y; - Z = ADXL345P.Z; - SplitControl = ADXL345P; - ADXL345Control = ADXL345P; - - components LedsC; - ADXL345P.Leds -> LedsC; - - components new Msp430I2CB1C() as I2C; - ADXL345P.Resource -> I2C; - ADXL345P.ResourceRequested -> I2C; - ADXL345P.I2CBasicAddr -> I2C; - -} diff --git a/apps/tests/z1/SimpleADXL/ADXL345Control.nc b/apps/tests/z1/SimpleADXL/ADXL345Control.nc deleted file mode 100644 index 6838076168..0000000000 --- a/apps/tests/z1/SimpleADXL/ADXL345Control.nc +++ /dev/null @@ -1,5 +0,0 @@ -interface ADXL345Control -{ - command error_t setRange(uint8_t range, uint8_t resolution); - event void setRangeDone(); -} diff --git a/apps/tests/z1/SimpleADXL/ADXL345P.nc b/apps/tests/z1/SimpleADXL/ADXL345P.nc deleted file mode 100644 index 64bcccbc28..0000000000 --- a/apps/tests/z1/SimpleADXL/ADXL345P.nc +++ /dev/null @@ -1,210 +0,0 @@ -#include "ADXL345.h" - - -module ADXL345P { - provides { - interface SplitControl; - interface Read as X; - interface Read as Y; - interface Read as Z; - interface ADXL345Control; - } - uses { - interface Leds; - interface Resource; - interface ResourceRequested; - interface I2CPacket as I2CBasicAddr; - } - -} -implementation { - - norace uint8_t state; - norace uint8_t adxlcmd; - norace uint8_t databuf[10]; - norace uint8_t pointer; - norace uint16_t x_axis; - norace uint16_t y_axis; - norace uint16_t z_axis; - norace uint8_t dataformat; - - task void started(){ - signal SplitControl.startDone(SUCCESS); - } - - task void stopped(){ - - } - - task void calculateX(){ - signal X.readDone(SUCCESS, x_axis); - } - - task void calculateY(){ - signal Y.readDone(SUCCESS, y_axis); - } - - task void calculateZ(){ - signal Z.readDone(SUCCESS, z_axis); - } - - task void rangeDone(){ - signal ADXL345Control.setRangeDone(); - } - - command error_t SplitControl.start(){ - adxlcmd = ADXLCMD_START; - call Resource.request(); - return SUCCESS; - } - - command error_t SplitControl.stop(){ - return SUCCESS; - } - - command error_t ADXL345Control.setRange(uint8_t range, uint8_t resolution){ - adxlcmd = ADXLCMD_RANGE; - dataformat = resolution << 3; - dataformat = dataformat + range; - printfUART("dataformat %x\n", dataformat); - call Resource.request(); - return SUCCESS; - } - - command error_t X.read(){ - adxlcmd = ADXLCMD_READ_X; - call Resource.request(); - return SUCCESS; - } - - command error_t Y.read(){ - adxlcmd = ADXLCMD_READ_Y; - call Resource.request(); - return SUCCESS; - } - - command error_t Z.read(){ - adxlcmd = ADXLCMD_READ_Z; - call Resource.request(); - return SUCCESS; - } - - event void Resource.granted(){ - switch(adxlcmd){ - case ADXLCMD_START: - databuf[0] = ADXL345_POWER_CTL; - databuf[1] = ADXL345_MEASURE_MODE; - call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - break; - - case ADXLCMD_READ_X: - pointer = ADXL345_DATAX0; - call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - break; - - case ADXLCMD_READ_Y: - pointer = ADXL345_DATAY0; - call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - break; - - case ADXLCMD_READ_Z: - pointer = ADXL345_DATAZ0; - call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); - break; - - case ADXLCMD_RANGE: - databuf[0] = ADXL345_DATAFORMAT; - databuf[1] = dataformat; - call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - break; - } - } - - async event void ResourceRequested.requested(){ - - } - - async event void ResourceRequested.immediateRequested(){ - - } - - async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ - uint16_t tmp; - if(call Resource.isOwner()) { - switch(adxlcmd){ - case ADXLCMD_READ_X: - call Resource.release(); - //printfUART("tmpx %d - %d\n", data[1], data[0]); - tmp = data[1]; - tmp = tmp << 8; - tmp = tmp + data[0]; - x_axis = tmp; - post calculateX(); - break; - - case ADXLCMD_READ_Y: - call Resource.release(); - //printfUART("tmpy %d - %d\n", data[1], data[0]); - tmp = data[1]; - tmp = tmp << 8; - tmp = tmp + data[0]; - y_axis = tmp; - post calculateY(); - break; - - case ADXLCMD_READ_Z: - call Resource.release(); - //printfUART("tmpz %d - %d\n", data[1], data[0]); - tmp = data[1]; - tmp = tmp << 8; - tmp = tmp + data[0]; - z_axis = tmp; - post calculateZ(); - break; - } - } - } - - async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ - if(call Resource.isOwner()) { - switch(adxlcmd){ - case ADXLCMD_START: - //nothing to do - call Resource.release(); - post started(); - break; - - case ADXLCMD_READ_X: - call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - break; - - case ADXLCMD_READ_Y: - call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - break; - - case ADXLCMD_READ_Z: - call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); - break; - - case ADXLCMD_RANGE: - call Resource.release(); - post rangeDone(); - break; - } - } - } - - /* default handlers */ - default event void X.readDone(error_t error, uint16_t data){ - return; - } - - default event void Y.readDone(error_t error, uint16_t data){ - return; - } - - default event void Z.readDone(error_t error, uint16_t data){ - return; - } - -} diff --git a/apps/tests/z1/SimpleADXL/Makefile b/apps/tests/z1/SimpleADXL/Makefile deleted file mode 100644 index 19d97a7b7d..0000000000 --- a/apps/tests/z1/SimpleADXL/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=TestADXL345AppC -include $(MAKERULES) - diff --git a/apps/tests/z1/SimpleADXL/PrintfUART.h b/apps/tests/z1/SimpleADXL/PrintfUART.h deleted file mode 100644 index 8b7e64a120..0000000000 --- a/apps/tests/z1/SimpleADXL/PrintfUART.h +++ /dev/null @@ -1,70 +0,0 @@ - -#ifndef PRINTFUART_H -#define PRINTFUART_H -#include -#include - -#warning including printfUART - -#define DEBUGBUF_SIZE 256 -char debugbuf[DEBUGBUF_SIZE]; -char debugbufROMtoRAM[DEBUGBUF_SIZE]; - -#define printfUART(__format...) { \ - sprintf(debugbuf, __format); \ - writedebug(); \ -} - - -/** - * Initialize the UART port. Call this from your startup routine. - */ -#define printfUART_init() {atomic printfUART_init_private();} -void printfUART_init_private() -{ - #warning initialize z1 serial port - /* - P3SEL |= 0xC0; // P3.6,7 = USCI_A1 TXD/RXD - UCA1CTL1 |= UCSSEL_1; // CLK = ACLK - UCA1BR0 = 0x03; // 32kHz/9600 = 3.41 - UCA1BR1 = 0x00; // - UCA1MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 - UCA1CTL1 &= ~UCSWRST; // **Initialize USCI state machine** - */ - P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD - UCA0CTL1 |= UCSSEL_1; // CLK = ACLK - UCA0BR0 = 0x03; // 32kHz/9600 = 3.41 - UCA0BR1 = 0x00; // - UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 - UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** -} - -/** - * Outputs a char to the UART. - */ -void UARTPutChar(char c) -{ - if (c == '\n') - UARTPutChar('\r'); - /* - while (!(UC1IFG&UCA1TXIFG)); - atomic UCA1TXBUF = c; - */ - while (!(IFG2&UCA0TXIFG)); - atomic UCA0TXBUF = c; - -} - -/** - * Outputs the entire debugbuf to the UART, or until it encounters '\0'. - */ -void writedebug() -{ - uint16_t i = 0; - - while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE) - UARTPutChar(debugbuf[i++]); -} - -#endif // PRINTFUART_H - diff --git a/apps/tests/z1/SimpleADXL/TestADXL345AppC.nc b/apps/tests/z1/SimpleADXL/TestADXL345AppC.nc deleted file mode 100644 index 285e694653..0000000000 --- a/apps/tests/z1/SimpleADXL/TestADXL345AppC.nc +++ /dev/null @@ -1,21 +0,0 @@ -// $Id: RadioSenseToLedsAppC.nc,v 1.4 2006/12/12 18:22:49 vlahan Exp $ - - - -configuration TestADXL345AppC {} -implementation { - components MainC, TestADXL345C as App, LedsC; - App.Boot -> MainC.Boot; - - App.Leds -> LedsC; - components new TimerMilliC() as TimerRead; - App.TimerRead -> TimerRead; - - components ADXL345C; - App.XAxis -> ADXL345C.X; - App.YAxis -> ADXL345C.Y; - App.ZAxis -> ADXL345C.Z; - App.AccelControl -> ADXL345C; - App.ADXL345Control -> ADXL345C; - -} diff --git a/apps/tests/z1/SimpleADXL/TestADXL345C.nc b/apps/tests/z1/SimpleADXL/TestADXL345C.nc deleted file mode 100644 index 4fb7734534..0000000000 --- a/apps/tests/z1/SimpleADXL/TestADXL345C.nc +++ /dev/null @@ -1,71 +0,0 @@ - -#include "Timer.h" -#include "PrintfUART.h" -#include "ADXL345.h" - -module TestADXL345C { - uses { - interface Leds; - interface Boot; - interface Timer as TimerRead; - interface Read as XAxis; - interface Read as YAxis; - interface Read as ZAxis; - interface SplitControl as AccelControl; - interface ADXL345Control; - } -} -implementation { - - int16_t x, y, z; - - event void Boot.booted() { - call Leds.led0On(); - printfUART_init(); - printfUART("Booted\n"); - call AccelControl.start(); - } - - event void AccelControl.startDone(error_t error){ - printfUART("Accel ON\n"); - call Leds.led1On(); - call ADXL345Control.setRange(ADXL345_RANGE_4G, ADXL345_FULLRES); - } - - event void AccelControl.stopDone(error_t error){ - - } - - event void ADXL345Control.setRangeDone(){ - printfUART("done \n"); - call TimerRead.startPeriodic(1000); - } - - event void TimerRead.fired(){ - call XAxis.read(); - } - - event void XAxis.readDone(error_t error, uint16_t data){ - //call Leds.led2Toggle(); - x = data; - printfUART("X %d ", x); - //printfUART("X %d \n", x); - call YAxis.read(); - } - - event void YAxis.readDone(error_t error, uint16_t data){ - //call Leds.led2Toggle(); - y = data; - printfUART("\tY %d", y); - call ZAxis.read(); - } - - event void ZAxis.readDone(error_t error, uint16_t data){ - call Leds.led2Toggle(); - z = data; - printfUART("\tZ %d\n", z); - } - - - -} diff --git a/apps/tests/z1/Temperature/Makefile b/apps/tests/z1/Temperature/Makefile index fa4816b6f9..848e886089 100644 --- a/apps/tests/z1/Temperature/Makefile +++ b/apps/tests/z1/Temperature/Makefile @@ -1,3 +1,6 @@ -COMPONENT=TemperatureAppC +COMPONENT=TestTmp102AppC CFLAGS += -DPRINTFUART_ENABLED -include $(MAKERULES) \ No newline at end of file +CFLAGS += -DMSP430XSPEED8 +include $(MAKERULES) + + diff --git a/apps/tests/z1/Temperature/README b/apps/tests/z1/Temperature/README new file mode 100644 index 0000000000..2fe85de1e8 --- /dev/null +++ b/apps/tests/z1/Temperature/README @@ -0,0 +1,24 @@ +README for Tmp102 sensor test app +Author/Contact: Antonio Linan + +Description: + +This application simple polls periodically the Tmp102 sensor for data. +The Tmp102 sensor is a temperature sensor and its already integrated as +part of the Zolertia Z1 mote. + +The data is printed over the serial port, using a client like putty or +picocom you can see the readings of the sensor adjusting the serial port +to this configuration: + +bauds: 115200 +bits: 8 +parity: none + +Tools: + +None + +Known bugs/limitations: + +None. diff --git a/apps/tests/z1/Temperature/TemperatureAppC.nc b/apps/tests/z1/Temperature/TemperatureAppC.nc deleted file mode 100644 index ad4c6aeea2..0000000000 --- a/apps/tests/z1/Temperature/TemperatureAppC.nc +++ /dev/null @@ -1,18 +0,0 @@ -configuration TemperatureAppC -{ -} -implementation -{ - components MainC, TemperatureC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new TimerMilliC() as TimerTemperature; - App.TimerTemperature -> TimerTemperature; - - components new SimpleTMP102C(); - App.Temperature -> SimpleTMP102C; - -} \ No newline at end of file diff --git a/apps/tests/z1/Temperature/TemperatureC.nc b/apps/tests/z1/Temperature/TemperatureC.nc deleted file mode 100644 index dcc22cb8fd..0000000000 --- a/apps/tests/z1/Temperature/TemperatureC.nc +++ /dev/null @@ -1,28 +0,0 @@ -#include "printfZ1.h" - -module TemperatureC -{ - uses interface Boot; - uses interface Leds; - uses interface Timer as TimerTemperature; - uses interface Read as Temperature; -} -implementation -{ - event void Boot.booted() - { - printfz1_init(); - call TimerTemperature.startPeriodic( 1024 ); - } - - event void TimerTemperature.fired() - { - call Leds.led0Toggle(); - call Temperature.read(); - } - - event void Temperature.readDone(error_t error, uint16_t data){ - printfz1(" + Temperature (%d)\n", data); - } - -} \ No newline at end of file diff --git a/apps/tests/z1/Temperature/TestTmp102AppC.nc b/apps/tests/z1/Temperature/TestTmp102AppC.nc new file mode 100644 index 0000000000..ebab219a00 --- /dev/null +++ b/apps/tests/z1/Temperature/TestTmp102AppC.nc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test the TMP102 temperature sensor + * built-in Zolertia Z1 motes + * + * @author: Antonio Linan + */ + + +#include "PrintfUART.h" + +configuration TestTmp102C {} +implementation { + components MainC, TestTmp102C as App, LedsC; + App.Leds -> LedsC; + App.Boot -> MainC.Boot; + components new TimerMilliC() as TestTimer; + App.TestTimer -> TestTimer; + + components new SimpleTMP102C() as Temperature; + App.TempSensor -> Temperature; +} + + diff --git a/apps/tests/z1/Temperature/TestTmp102C.nc b/apps/tests/z1/Temperature/TestTmp102C.nc new file mode 100644 index 0000000000..5cbbab8650 --- /dev/null +++ b/apps/tests/z1/Temperature/TestTmp102C.nc @@ -0,0 +1,90 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test the TMP102 temperature sensor + * built-in Zolertia Z1 motes + * + * @author: Antonio Linan + */ + + #include "Timer.h" + #include "PrintfUART.h" + +module TestTmp102C { + uses { + interface Leds; + interface Boot; + interface Timer as TestTimer; + interface Read as TempSensor; + + } +} +implementation { + + void printTitles(){ + printfUART("\n\n"); + printfUART(" ###############################\n"); + printfUART(" # #\n"); + printfUART(" # TMP102 TEST #\n"); + printfUART(" # #\n"); + printfUART(" ###############################\n"); + printfUART("\n"); + } + + event void Boot.booted() { + printfUART_init(); + printTitles(); + call TestTimer.startPeriodic(1024); + } + + event void TestTimer.fired(){ + call TempSensor.read(); + } + + event void TempSensor.readDone(error_t error, uint16_t data){ + if (error == SUCCESS){ + call Leds.led2Toggle(); + if (data > 2047) data -= (1<<12); + data *=0.625; + printfUART("Temp: %2d.%1.2d\n", data/10, data>>2); + } + } + +} + + + + + diff --git a/apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc b/apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc deleted file mode 100644 index 0124d5e211..0000000000 --- a/apps/tests/z1/TestADXL345/TestZ1DUTAppC.nc +++ /dev/null @@ -1,17 +0,0 @@ - -#include "PrintfUART.h" - -configuration TestZ1DUTAppC {} -implementation { - components MainC, TestZ1DUTC as App, LedsC; - App.Leds -> LedsC; - App.Boot -> MainC.Boot; - components new TimerMilliC() as TestTimer; - App.TestTimer -> TestTimer; - - components new ADXL345C(); - App.Zaxis -> ADXL345C.Z; - App.AccelControl -> ADXL345C.SplitControl; -} - - diff --git a/apps/tests/z1/TestADXL345/TestZ1DUTC.nc b/apps/tests/z1/TestADXL345/TestZ1DUTC.nc deleted file mode 100644 index a64cc7dec6..0000000000 --- a/apps/tests/z1/TestADXL345/TestZ1DUTC.nc +++ /dev/null @@ -1,54 +0,0 @@ - -// #include "Timer.h" -#include "PrintfUART.h" - -module TestZ1DUTC { - uses { - interface Leds; - interface Boot; - interface Timer as TestTimer; - interface Read as Zaxis; - interface SplitControl as AccelControl; - } -} -implementation { - void printTitles(){ - printfUART("\n\n"); - printfUART(" ###############################\n"); - printfUART(" # Z1 DUT MOTE v1.0 #\n"); - printfUART(" ###############################\n"); - printfUART("\n"); - } - - event void Boot.booted() { - printfUART_init(); - printTitles(); - call TestTimer.startPeriodic(1024); - } - - event void TestTimer.fired(){ - call AccelControl.start(); - } - - event void AccelControl.startDone(error_t err) { - if (err == SUCCESS){ - call Zaxis.read(); - } - } - - event void AccelControl.stopDone(error_t err) {} - - event void Zaxis.readDone(error_t result, uint16_t data){ - if (result == SUCCESS){ - call Leds.led2Toggle(); - printfUART("Zaxis: %d\n", data); - } - } - - -} - - - - - diff --git a/apps/tests/z1/TestEui/Makefile b/apps/tests/z1/TestEui/Makefile new file mode 100644 index 0000000000..2aeec0dca2 --- /dev/null +++ b/apps/tests/z1/TestEui/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestEuiAppC +CFLAGS += -DPRINTFUART_ENABLED +include $(MAKERULES) + diff --git a/apps/tests/z1/TestEui/README.txt b/apps/tests/z1/TestEui/README.txt new file mode 100644 index 0000000000..12dd0f1da9 --- /dev/null +++ b/apps/tests/z1/TestEui/README.txt @@ -0,0 +1,24 @@ +$Id: README.txt,v 1.1 2008-10-31 17:01:31 sallai Exp $ + +README for TestEui +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +The TestEui application prints out the IEEE EUI64 of the device periodically +using printfUART, ported to Zolertia Z1 mote. + +Tools: + +Any serial reader, like putty or picocom + +Usage: + +bauds: 115200 +bits: 8 +parity: none + +Known bugs/limitations: + +None. + diff --git a/apps/tests/z1/TestEui/TestEuiAppC.nc b/apps/tests/z1/TestEui/TestEuiAppC.nc new file mode 100644 index 0000000000..1f86302706 --- /dev/null +++ b/apps/tests/z1/TestEui/TestEuiAppC.nc @@ -0,0 +1,52 @@ +// $Id: TestEuiAppC.nc,v 1.2 2010-06-29 22:07:22 scipio Exp $ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Janos Sallai + */ + +/** + * This application reads the 64-bit EUI of the device at initialization time + * and then periodically prints it out using printf. + * + */ +configuration TestEuiAppC{} +implementation { + components MainC, TestEuiC, LedsC, LocalIeeeEui64C, new TimerMilliC(); + + MainC.Boot <- TestEuiC; + TestEuiC.Timer -> TimerMilliC; + + TestEuiC -> LedsC.Leds; + + TestEuiC.LocalIeeeEui64 -> LocalIeeeEui64C; +} + diff --git a/apps/tests/z1/TestEui/TestEuiC.nc b/apps/tests/z1/TestEui/TestEuiC.nc new file mode 100644 index 0000000000..1307af7325 --- /dev/null +++ b/apps/tests/z1/TestEui/TestEuiC.nc @@ -0,0 +1,73 @@ +// $Id: TestEuiC.nc,v 1.2 2010-06-29 22:07:23 scipio Exp $ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Janos Sallai + */ + +/** + * This application reads the 64-bit EUI of the device at initialization time + * and then periodically, and prints it out using printf. + * + */ + +#include "PrintfUART.h" + +module TestEuiC{ + uses interface Boot; + uses interface Timer; + uses interface Leds; + uses interface LocalIeeeEui64; +} + +implementation{ + + event void Boot.booted() { + printfUART_init(); + call Timer.startPeriodic(1000); + } + + event void Timer.fired() { + int i; + ieee_eui64_t id; + + call Leds.led0Toggle(); + + id = call LocalIeeeEui64.getId(); + + printfUART("IEEE 64-bit UID: "); + for(i=0;i<8;i++) { + printfUART("%d ", id.data[i]); + } + printfUART("\n"); + } +} + diff --git a/apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc b/apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc deleted file mode 100644 index 3d53c9497c..0000000000 --- a/apps/tests/z1/TestTmp102/TestZ1DUTAppC.nc +++ /dev/null @@ -1,16 +0,0 @@ - -#include "PrintfUART.h" - -configuration TestZ1DUTAppC {} -implementation { - components MainC, TestZ1DUTC as App, LedsC; - App.Leds -> LedsC; - App.Boot -> MainC.Boot; - components new TimerMilliC() as TestTimer; - App.TestTimer -> TestTimer; - - components new SimpleTMP102C() as Temperature; - App.TempSensor -> Temperature; -} - - diff --git a/apps/tests/z1/TestTmp102/TestZ1DUTC.nc b/apps/tests/z1/TestTmp102/TestZ1DUTC.nc deleted file mode 100644 index 9c4ccc0ed0..0000000000 --- a/apps/tests/z1/TestTmp102/TestZ1DUTC.nc +++ /dev/null @@ -1,50 +0,0 @@ - - #include "Timer.h" -#include "PrintfUART.h" - -module TestZ1DUTC { - uses { - interface Leds; - interface Boot; - interface Timer as TestTimer; - interface Read as TempSensor; - - } -} -implementation { - void printTitles(){ - printfUART("\n\n"); - printfUART(" ###############################\n"); - printfUART(" # #\n"); - printfUART(" # Z1 DUT MOTE v1.0 #\n"); - printfUART(" # #\n"); - printfUART(" ###############################\n"); - printfUART("\n"); - } - - event void Boot.booted() { - printfUART_init(); - printTitles(); - call TestTimer.startPeriodic(1024); - } - - event void TestTimer.fired(){ - call TempSensor.read(); - } - - event void TempSensor.readDone(error_t error, uint16_t data){ - if (error == SUCCESS){ - call Leds.led2Toggle(); - if (data > 2047){ - data -= (1<<12);} - data *=0.625; - printfUART("Temp: %2d.%1.2d\n", data/10, data>>2); - } - } - -} - - - - - diff --git a/apps/tests/z1/TestADXL345/Makefile b/apps/tests/z1/Ziglets/SimpleTSL2563/Makefile old mode 100644 new mode 100755 similarity index 100% rename from apps/tests/z1/TestADXL345/Makefile rename to apps/tests/z1/Ziglets/SimpleTSL2563/Makefile diff --git a/apps/tests/z1/Ziglets/SimpleTSL2563/TSLC.nc b/apps/tests/z1/Ziglets/SimpleTSL2563/TSLC.nc new file mode 100755 index 0000000000..4392c79deb --- /dev/null +++ b/apps/tests/z1/Ziglets/SimpleTSL2563/TSLC.nc @@ -0,0 +1,68 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple driver for the ZIG-LIGHT Ziglet, based on the TAOS TSL2563 + * digital light sensor, features only a read light command. + * + * @author: Antonio Linan + */ + +#include "PrintfUART.h" + +configuration TSLC { + provides { + interface Read as Light; + } +} + +implementation { + + components TSLP; + Light = TSLP; + + components new Msp430I2CB1C() as I2C; + TSLP.Resource -> I2C; + TSLP.ResourceRequested -> I2C; + TSLP.I2CBasicAddr -> I2C; + + components new TimerMilliC() as TimeoutTimer; + TSLP.TimeoutTimer -> TimeoutTimer; + + components new TimerMilliC() as TimerUp; + TSLP.TimerUp -> TimerUp; + +} + + diff --git a/apps/tests/z1/Ziglets/SimpleTSL2563/TSLP.nc b/apps/tests/z1/Ziglets/SimpleTSL2563/TSLP.nc new file mode 100755 index 0000000000..b83f52c719 --- /dev/null +++ b/apps/tests/z1/Ziglets/SimpleTSL2563/TSLP.nc @@ -0,0 +1,173 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple driver for the ZIG-LIGHT Ziglet, based on the TAOS TSL2563 + * digital light sensor, features only a read light command. + * + * @author: Antonio Linan + */ + +#include "tsl2563.h" +#include "PrintfUART.h" + +module TSLP { + provides{ + interface Read as Light; + } + uses { + interface I2CPacket as I2CBasicAddr; + interface Resource; + interface ResourceRequested; + interface Timer as TimerUp; + interface Timer as TimeoutTimer; + interface Leds; + } +} + +implementation { + + norace uint8_t state = TSLCMD_IDLE; + norace uint8_t pointer; + norace uint8_t setreg; + norace uint16_t lightBuff[4]; + norace uint16_t reading[2]; + norace uint16_t lux; + + uint16_t calculatelux(){ + uint32_t ch0, ch1 = 0; + uint32_t aux = (1<<14); + uint32_t ratio; + uint32_t lratio; + uint32_t tmp=0; + ch0 = (reading[0]*aux) >> 10; + ch1 = (reading[1]*aux) >> 10; + ratio = (ch1 << 10)/ch0; + lratio = (ratio+1) >> 1; + + if ((lratio >= 0) && (lratio <= K1T)) + tmp = (ch0*B1T) - (ch1*M1T); + else if (lratio <= K2T) + tmp = (ch0*B2T) - (ch1*M2T); + else if (lratio <= K3T) + tmp = (ch0*B3T) - (ch1*M3T); + else if (lratio <= K4T) + tmp = (ch0*B4T) - (ch1*M4T); + else if (lratio <= K5T) + tmp = (ch0*B5T) - (ch1*M5T); + else if (lratio <= K6T) + tmp = (ch0*B6T) - (ch1*M6T); + else if (lratio <= K7T) + tmp = (ch0*B7T) - (ch1*M7T); + else if (lratio > K8T) + tmp = (ch0*B8T) - (ch1*M8T); + + if (tmp < 0) tmp = 0; + + tmp += (1<<13); + return (tmp >> 14); + } + + task void signalEvent(){ + signal Light.readDone(SUCCESS, lux); + } + + command error_t Light.read(){ + // atomic P5DIR |= 0x06; + state = TSLCMD_START; + call TimeoutTimer.startOneShot(1024); + call TimerUp.startOneShot(100); + return SUCCESS; + } + + event void TimerUp.fired(){ + call Resource.request(); + } + + event void Resource.granted(){ + error_t error; + pointer = 0xAC; + setreg = 0x3; + error = call I2CBasicAddr.write((I2C_START | I2C_STOP), TSL2563_ADDRESS, 1, &setreg); + if (error){ + printfUART("Error write:RS\n"); + call Resource.release(); + signal Light.readDone(error, 0xFFFF); + } + } + + + async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + error_t e; + if(call Resource.isOwner()){ + if(state == TSLCMD_START){ + state = TSLCMD_READ; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), TSL2563_ADDRESS, 1, &pointer); + } else if (state == TSLCMD_READ){ + e = call I2CBasicAddr.read((I2C_START | I2C_STOP), TSL2563_ADDRESS, 4, &lightBuff); + } + if (e){ + printfUART("Error Read:RD\n"); + call Resource.release(); + signal Light.readDone(error, 0xFFFF); + } + } + } + + async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ + if (call Resource.isOwner()){ + uint16_t tmp; + state = TSLCMD_IDLE; + for(tmp=0;tmp<0xffff;tmp++); //delay + call Resource.release(); + reading[0] = (data[1] << 8) + data[0]; + reading[1] = (data[3] << 8) + data[2]; + lux = calculatelux(); + post signalEvent(); + call TimeoutTimer.stop(); + } + } + + event void TimeoutTimer.fired(){ + printfUART("TSL: timeout\n"); + } + + default event void Light.readDone(error_t error, uint16_t data){ + return; + } + + async event void ResourceRequested.requested(){} + async event void ResourceRequested.immediateRequested(){} + +} diff --git a/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc b/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc new file mode 100755 index 0000000000..3df7d370ed --- /dev/null +++ b/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to poll data from the ZIG-LIGHT Ziglet, based + * on the TAOS TSL2563 digital light sensor. + * + * @author: Antonio Linan + */ + +#include "PrintfUART.h" + +configuration TestTSLAppC {} +implementation { + components MainC, TestTSLAppC as App, LedsC; + App.Leds -> LedsC; + App.Boot -> MainC.Boot; + + components new TimerMilliC() as TestTimer; + App.TestTimer -> TestTimer; + + components TSLC; + App.Light -> TSLC.Light; + +} + + diff --git a/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLC.nc b/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLC.nc new file mode 100755 index 0000000000..b16a78298b --- /dev/null +++ b/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLC.nc @@ -0,0 +1,80 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to poll data from the ZIG-LIGHT Ziglet, based + * on the TAOS TSL2563 digital light sensor. + * + * @author: Antonio Linan + */ + +#include "Timer.h" +#include "PrintfUART.h" + +module TestTSLC { + uses { + interface Leds; + interface Boot; + interface Timer as TestTimer; + interface Read as Light; + } +} +implementation { + void printTitles(){ + printfUART("\n\n"); + printfUART(" ###############################\n"); + printfUART(" # Light TEST #\n"); + printfUART(" ###############################\n"); + printfUART("\n"); + } + + event void Boot.booted() { + printfUART_init(); + printTitles(); + call TestTimer.startPeriodic(1024); + } + + event void TestTimer.fired(){ + call Light.read(); + } + + event void Light.readDone(error_t error, uint16_t data){ + if (error == SUCCESS){ + printfUART("Light: %d\n", data); + call Leds.led2Toggle(); + } + } + +} + diff --git a/apps/tests/z1/Ziglets/SimpleTSL2563/tsl2563.h b/apps/tests/z1/Ziglets/SimpleTSL2563/tsl2563.h new file mode 100755 index 0000000000..84202d6e21 --- /dev/null +++ b/apps/tests/z1/Ziglets/SimpleTSL2563/tsl2563.h @@ -0,0 +1,63 @@ + +#ifndef TESTSENSOR_H +#define TESTSENSOR_H + +#define TSL2563_ADDRESS 0x39 + +#define TSL256X_CONTROL_POWER_ON (0x3) +#define TSL256X_CONTROL_POWER_OFF (0x0) + +#define TSL256X_PTR_CONTROL (0x0) + +#define TSL256X_COMMAND_CMD (1<<7) +#define TSL256X_COMMAND_CLEAR (1<<6) +#define TSL256X_COMMAND_WORD (1<<5) +#define TSL256X_COMMAND_BLOCK (1<<4) +#define TSL256X_COMMAND_ADDRESS(_x) ((_x) & 0xF) + +#define TSL256X_PTR_DATA0LOW (0xC) +#define TSL256X_PTR_DATA0HIGH (0xD) +#define TSL256X_PTR_DATA1LOW (0xE) +#define TSL256X_PTR_DATA1HIGH (0xF) + +#define K1T 0X0040 +#define B1T 0x01f2 +#define M1T 0x01b2 + +#define K2T 0x0080 +#define B2T 0x0214 +#define M2T 0x02d1 + +#define K3T 0x00c0 +#define B3T 0x023f +#define M3T 0x037b + +#define K4T 0x0100 +#define B4T 0x0270 +#define M4T 0x03fe + +#define K5T 0x0138 +#define B5T 0x016f +#define M5T 0x01fc + +#define K6T 0x019a +#define B6T 0x00d2 +#define M6T 0x00fb + +#define K7T 0x029a +#define B7T 0x0018 +#define M7T 0x0012 + +#define K8T 0x029a +#define B8T 0x0000 +#define M8T 0x0000 + +enum { +TSLCMD_IDLE = 0, +TSLCMD_START, +TSLCMD_READ, +TSLCMD_STOP, +} CMD; + + +#endif diff --git a/apps/tests/z1/Ziglets/TestSht11/Makefile b/apps/tests/z1/Ziglets/TestSht11/Makefile new file mode 100644 index 0000000000..1379a7a560 --- /dev/null +++ b/apps/tests/z1/Ziglets/TestSht11/Makefile @@ -0,0 +1,7 @@ +COMPONENT=TestSht11AppC +CFLAGS += -DPRINTFUART_ENABLED +CFLAGS += -DMSP430XSPEED8 +#CFLAGS += -DIS_ZIGLET +include $(MAKERULES) + + diff --git a/apps/tests/z1/Ziglets/TestSht11/README b/apps/tests/z1/Ziglets/TestSht11/README new file mode 100644 index 0000000000..35b934b5dc --- /dev/null +++ b/apps/tests/z1/Ziglets/TestSht11/README @@ -0,0 +1,28 @@ +README for SHT1X sensor test app +Author/Contact: Antonio Linan + +Description: + +This application simple polls periodically the SHT1X sensor for data +(temperature and humidity). + +The data is printed over the serial port, using a client like putty or +picocom you can see the readings of the sensor adjusting the serial port +to this configuration: + +bauds: 115200 +bits: 8 +parity: none + +The SHT1X sensor is a part of the ZIGTH11 board, which can be connected +to a Ziglet port (an I2C digital port of the Z1 mote), or to regular GPIO +port (depending on how you connect it), if using as a Ziglet make sure +IS_ZIGLET is uncommented in Makefile. + +Tools: + +None + +Known bugs/limitations: + +None. diff --git a/apps/tests/z1/Ziglets/TestSht11/TestSht11AppC.nc b/apps/tests/z1/Ziglets/TestSht11/TestSht11AppC.nc new file mode 100644 index 0000000000..596700d044 --- /dev/null +++ b/apps/tests/z1/Ziglets/TestSht11/TestSht11AppC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to read Temp & Humidity values from the ZIGTH11 + * Ziglet, based on the SHT1X sensor. + * + * @author: Antonio Linan + */ + +#include "PrintfUART.h" + +configuration TestSht11AppC {} +implementation { + components MainC, TestSht11C as App, LedsC; + App.Leds -> LedsC; + App.Boot -> MainC.Boot; + components new TimerMilliC() as TestTimer; + App.TestTimer -> TestTimer; + + components new SensirionSht11C() as Temperature; + App.Temperature -> Temperature.Temperature; + + components new SensirionSht11C() as Humidity; + App.Humidity -> Humidity.Humidity; + +} + + diff --git a/apps/tests/z1/Ziglets/TestSht11/TestSht11C.nc b/apps/tests/z1/Ziglets/TestSht11/TestSht11C.nc new file mode 100644 index 0000000000..f6199d7cf1 --- /dev/null +++ b/apps/tests/z1/Ziglets/TestSht11/TestSht11C.nc @@ -0,0 +1,108 @@ +/* + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to read Temp & Humidity values from the ZIGTH11 + * Ziglet, based on the SHT1X sensor. + * + * @author: Antonio Linan + */ + +#include "Timer.h" +#include "PrintfUART.h" + +module TestSht11C { + uses { + interface Leds; + interface Boot; + interface Timer as TestTimer; + interface Read as Temperature; + interface Read as Humidity; + + } +} +implementation { + + uint8_t pass; + + void printTitles(){ + printfUART("\n\n"); + printfUART(" ###############################\n"); + printfUART(" # TEST SHT1X #\n"); + printfUART(" ###############################\n"); + printfUART("\n"); + } + + event void Boot.booted() { + printfUART_init(); + printTitles(); + call TestTimer.startPeriodic(1024); + } + + event void TestTimer.fired(){ + pass++; + if (pass % 2 == 0){ + call Temperature.read(); + } else { + call Humidity.read(); + } + } + + event void Temperature.readDone(error_t error, uint16_t data){ + uint16_t temp; + if (error == SUCCESS){ + call Leds.led2Toggle(); + temp = (data/10) -400; + printfUART("Temp: %d.%d\n", temp/10, temp>>2); + } + } + + event void Humidity.readDone(error_t error, uint16_t data){ + uint16_t hum; + if (error == SUCCESS){ + hum = data*0.0367; + hum -= 2.0468; + if (hum>100) hum = 100; + call Leds.led2Toggle(); + printfUART("Hum: %d\n", hum); + } + } + + +} + + + + + diff --git a/tos/chips/adxl345/ADXL345.h b/tos/chips/adxl345/ADXL345.h index fa8b0270e4..c8bf0ee654 100644 --- a/tos/chips/adxl345/ADXL345.h +++ b/tos/chips/adxl345/ADXL345.h @@ -1,3 +1,48 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote + * + * Credits goes to DEXMA SENSORS SL + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Antonio Linan + * + */ + #ifndef ADXL345_H #define ADXL345_H @@ -73,6 +118,7 @@ typedef enum { ADXLCMD_READ_X, ADXLCMD_READ_Y, ADXLCMD_READ_Z, + ADXLCMD_READ_XYZ, ADXLCMD_SET_RANGE, ADXLCMD_STOP, ADXLCMD_SLEEP, @@ -98,5 +144,11 @@ typedef enum { ADXLINT_SINGLE_TAP = 0x40, ADXLINT_DATA_READY = 0x80, } adxlint_state_t; + +typedef struct { + uint16_t x_axis; + uint16_t y_axis; + uint16_t z_axis; +} adxl345_readxyt_t; #endif diff --git a/tos/chips/adxl345/ADXL345C.nc b/tos/chips/adxl345/ADXL345C.nc index 71c4c7565f..ebe9a66c51 100644 --- a/tos/chips/adxl345/ADXL345C.nc +++ b/tos/chips/adxl345/ADXL345C.nc @@ -1,3 +1,48 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote + * + * Credits goes to DEXMA SENSORS SL + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Antonio Linan + * @author: Andre Rodrigues + */ + #include "ADXL345.h" generic configuration ADXL345C() { @@ -5,6 +50,7 @@ generic configuration ADXL345C() { provides interface Read as X; provides interface Read as Y; provides interface Read as Z; + provides interface Read as XYZ; provides interface Read as IntSource; provides interface Read as Register; provides interface ADXL345Control; @@ -16,12 +62,14 @@ implementation { X = ADXL345P.X; Y = ADXL345P.Y; Z = ADXL345P.Z; + XYZ = ADXL345P.XYZ; IntSource = ADXL345P.IntSource; SplitControl = ADXL345P; ADXL345Control = ADXL345P; Register = ADXL345P.Register; #warning ADXL345: using generic wiring (usciB1). Should wire actual device in platform wiring. + components new Msp430I2CB1C() as I2C; ADXL345P.Resource -> I2C; ADXL345P.ResourceRequested -> I2C; diff --git a/tos/chips/adxl345/ADXL345Control.nc b/tos/chips/adxl345/ADXL345Control.nc index 7f0d074019..21074fdcaa 100644 --- a/tos/chips/adxl345/ADXL345Control.nc +++ b/tos/chips/adxl345/ADXL345Control.nc @@ -1,3 +1,47 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote + * + * Credits goes to DEXMA SENSORS SL + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Antonio Linan + */ + interface ADXL345Control { command error_t setRange(uint8_t range, uint8_t resolution); diff --git a/tos/chips/adxl345/ADXL345P.nc b/tos/chips/adxl345/ADXL345P.nc index 00559fda2b..82a851b4fd 100644 --- a/tos/chips/adxl345/ADXL345P.nc +++ b/tos/chips/adxl345/ADXL345P.nc @@ -1,4 +1,49 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote + * + * Credits goes to DEXMA SENSORS SL + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Antonio Linan + */ + #include "ADXL345.h" +#include "PrintfUART.h" module ADXL345P { provides { @@ -15,6 +60,7 @@ module ADXL345P { interface Read as X; interface Read as Y; interface Read as Z; + interface Read as XYZ; interface ADXL345Control; interface Notify as Int1; interface Notify as Int2; @@ -54,15 +100,16 @@ implementation { norace uint16_t x_axis; norace uint16_t y_axis; norace uint16_t z_axis; + norace adxl345_readxyt_t xyz_axis; task void sendEvent1(); task void sendEvent2(); task void started(){ - if(call TimeoutAlarm.isRunning()) call TimeoutAlarm.stop(); - lock = FALSE; - signal SplitControl.startDone(error_return); + if(call TimeoutAlarm.isRunning()) call TimeoutAlarm.stop(); + lock = FALSE; + signal SplitControl.startDone(error_return); } task void stopped(){ @@ -110,6 +157,11 @@ implementation { signal Z.readDone(error_return, z_axis); } + task void calculateXYZ(){ + lock = FALSE; + signal XYZ.readDone(error_return, xyz_axis); + } + task void calculateRegister() { lock = FALSE; signal Register.readDone(error_return, regData); @@ -165,6 +217,7 @@ implementation { } task void setReadAddressDone() { + lock = FALSE; signal ADXL345Control.setReadAddressDone(SUCCESS); } @@ -178,7 +231,7 @@ implementation { if (e==SUCCESS) { call TimeoutAlarm.startOneShot(ADXL345_START_TIMEOUT); return SUCCESS; - } + } lock = FALSE; return e; } @@ -202,13 +255,14 @@ implementation { if( address >= 0x01 && address <= 0x1C) return EINVAL; //reserved, do not access if( address >= 0x3A) return EINVAL; //to big readAddress = address; - lock=FALSE; + // lock=FALSE; // Commented out, as the setReadAddressDone handles this + post setReadAddressDone(); // Added return SUCCESS; } command error_t ADXL345Control.setRange(uint8_t range, uint8_t resolution){ error_t e; - if(lock) return EBUSY; + if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_SET_RANGE; e=call Resource.request(); @@ -243,8 +297,8 @@ implementation { adxlcmd = ADXLCMD_INT; e = call Resource.request(); if (e==SUCCESS) { - int_enable = int_enable_par; - return SUCCESS; + int_enable = int_enable_par; + return SUCCESS; } lock = FALSE; return e; @@ -257,8 +311,8 @@ implementation { adxlcmd = ADXLCMD_SET_DURATION; e = call Resource.request(); if (e==SUCCESS) { - duration = duration_par; - return SUCCESS; + duration = duration_par; + return SUCCESS; } lock = FALSE; return e; @@ -271,8 +325,8 @@ implementation { adxlcmd = ADXLCMD_SET_LATENT; e = call Resource.request(); if (e==SUCCESS) { - latent = latent_par; - return SUCCESS; + latent = latent_par; + return SUCCESS; } lock = FALSE; return e; @@ -285,8 +339,8 @@ implementation { adxlcmd = ADXLCMD_SET_WINDOW; e = call Resource.request(); if (e==SUCCESS) { - window = window_par; - return SUCCESS; + window = window_par; + return SUCCESS; } lock = FALSE; return e; @@ -299,8 +353,8 @@ implementation { adxlcmd = ADXLCMD_SET_INT_MAP; e = call Resource.request(); if (e==SUCCESS) { - int_map = int_map_par; - return SUCCESS; + int_map = int_map_par; + return SUCCESS; } lock = FALSE; return e; @@ -313,7 +367,7 @@ implementation { adxlcmd = ADXLCMD_READ_POWER_CTL; e = call Resource.request(); if (e==SUCCESS) { - return SUCCESS; + return SUCCESS; } lock = FALSE; return e; @@ -326,7 +380,7 @@ implementation { adxlcmd = ADXLCMD_READ_BW_RATE; e = call Resource.request(); if (e==SUCCESS) { - return SUCCESS; + return SUCCESS; } lock = FALSE; return e; @@ -339,7 +393,7 @@ implementation { adxlcmd = ADXLCMD_READ_INT_ENABLE; e = call Resource.request(); if (e==SUCCESS) { - return SUCCESS; + return SUCCESS; } lock = FALSE; return e; @@ -352,7 +406,7 @@ implementation { adxlcmd = ADXLCMD_READ_INT_MAP; e = call Resource.request(); if (e==SUCCESS) { - return SUCCESS; + return SUCCESS; } lock = FALSE; return e; @@ -365,7 +419,7 @@ implementation { adxlcmd = ADXLCMD_READ_INT_SOURCE; e = call Resource.request(); if (e==SUCCESS) { - return SUCCESS; + return SUCCESS; } lock = FALSE; return e; @@ -378,7 +432,7 @@ implementation { adxlcmd = ADXLCMD_READ_REGISTER; e = call Resource.request(); if (e==SUCCESS) { - return SUCCESS; + return SUCCESS; } lock = FALSE; return e; @@ -390,12 +444,12 @@ implementation { lock = TRUE; adxlcmd = ADXLCMD_READ_X; if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { - lock=FALSE; - return FAIL; + lock=FALSE; + return FAIL; } e = call Resource.request(); if (e==SUCCESS) { - return SUCCESS; + return SUCCESS; } lock = FALSE; return e; @@ -407,13 +461,11 @@ implementation { lock = TRUE; adxlcmd = ADXLCMD_READ_Y; if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { - lock=FALSE; - return FAIL; + lock=FALSE; + return FAIL; } e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; - } + if (e==SUCCESS) return SUCCESS; lock = FALSE; return e; } @@ -424,13 +476,26 @@ implementation { lock = TRUE; adxlcmd = ADXLCMD_READ_Z; if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { - lock=FALSE; - return FAIL; + lock=FALSE; + return FAIL; } e = call Resource.request(); - if (e==SUCCESS) { - return SUCCESS; + if (e==SUCCESS) return SUCCESS; + lock = FALSE; + return e; + } + + command error_t XYZ.read(){ + error_t e; + if(lock) return EBUSY; + lock = TRUE; + adxlcmd = ADXLCMD_READ_XYZ; + if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { + lock=FALSE; + return FAIL; } + e = call Resource.request(); + if (e==SUCCESS) return SUCCESS; lock = FALSE; return e; } @@ -468,7 +533,7 @@ implementation { adxlcmd = ADXLCMD_READ_WINDOW; e = call Resource.request(); if (e==SUCCESS) { - return SUCCESS; + return SUCCESS; } lock = FALSE; return e; @@ -477,6 +542,15 @@ implementation { event void Resource.granted(){ error_t e; switch(adxlcmd){ + case ADXLCMD_READ_XYZ: //NOTE moved to speedup + pointer = ADXL345_DATAX0; + e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); + if (e!= SUCCESS) { + error_return = e; + post calculateXYZ(); + } + break; + case ADXLCMD_START: power_ctl = power_ctl | ADXL345_MEASURE_MODE; databuf[0] = ADXL345_THRESH_TAP; @@ -500,8 +574,9 @@ implementation { databuf[18] = 0x0; //ADXL345_INT_ENABLE (all disabled by default) e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 19, databuf); if (e!= SUCCESS) { - error_return = e; - post started(); + error_return = e; + printfUART("dead\n"); + post started(); } break; @@ -693,7 +768,6 @@ implementation { post windowDone(); } break; - } } @@ -718,6 +792,12 @@ implementation { tmp = tmp + data[0]; } switch(adxlcmd){ + case ADXLCMD_READ_XYZ: //NOTE moved to speedup + xyz_axis.x_axis = (data[1] << 8) + data[0]; + xyz_axis.y_axis = (data[3] << 8) + data[2]; + xyz_axis.z_axis = (data[5] << 8) + data[4]; + post calculateXYZ(); + break; case ADXLCMD_READ_REGISTER: regData=data[0]; post calculateRegister(); @@ -773,7 +853,8 @@ implementation { async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ if(call Resource.isOwner()) { error_return=error; - if( adxlcmd != ADXLCMD_READ_REGISTER + if( adxlcmd != ADXLCMD_READ_XYZ //NOTE moved to speedup + && adxlcmd != ADXLCMD_READ_REGISTER && adxlcmd != ADXLCMD_READ_DURATION && adxlcmd != ADXLCMD_READ_LATENT && adxlcmd != ADXLCMD_READ_WINDOW @@ -788,6 +869,12 @@ implementation { call Resource.release(); } switch(adxlcmd){ + case ADXLCMD_READ_XYZ: //NOTE moved to speedup + if (error==SUCCESS) + call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 6, databuf); + else + post calculateXYZ(); + break; case ADXLCMD_START: post started(); break; @@ -939,6 +1026,10 @@ implementation { default event void Z.readDone(error_t error, uint16_t data){ return; } + + default event void XYZ.readDone(error_t error, adxl345_readxyt_t data){ + return; + } default event void ADXL345Control.setRangeDone(error_t error){ return; @@ -980,10 +1071,9 @@ implementation { /*defaut handlers end*/ event void TimeoutAlarm.fired() { - if(lock && (adxlcmd == ADXLCMD_START)) - { +printfUART("timeout\n"); + if(lock && (adxlcmd == ADXLCMD_START)){ lock = FALSE; - signal SplitControl.startDone(EOFF); } } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index b359371cbd..15d816fa51 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -348,6 +348,15 @@ implementation { async command void Usci.enableI2C() { atomic { + + #ifdef PLATFORM_Z1 + /* Dirty, needs fixing */ + P5OUT &= ~0x06; + P5REN &= ~0x06; + P5OUT |= 0x06; + P5REN |= 0x06; + #endif + call USDA.selectModuleFunc(); call USCL.selectModuleFunc(); } diff --git a/tos/chips/tmp102/SimpleTMP102C.nc b/tos/chips/tmp102/SimpleTMP102C.nc index 3b4081e3f8..042db473e1 100644 --- a/tos/chips/tmp102/SimpleTMP102C.nc +++ b/tos/chips/tmp102/SimpleTMP102C.nc @@ -1,3 +1,44 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of a simple read interface for the TMP102 temperature + * sensor built-in Zolertia Z1 motes + * + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ generic configuration SimpleTMP102C() { provides interface Read; diff --git a/tos/chips/tmp102/SimpleTMP102P.nc b/tos/chips/tmp102/SimpleTMP102P.nc index 102c679ffe..d8cf4bb898 100644 --- a/tos/chips/tmp102/SimpleTMP102P.nc +++ b/tos/chips/tmp102/SimpleTMP102P.nc @@ -1,17 +1,59 @@ -#include "TMP102.h" +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of a simple read interface for the TMP102 temperature + * sensor built-in Zolertia Z1 motes, returns value in celsius degrees + * multiplied by 10, only 1 digit accuracy. + * + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ +#include "TMP102.h" module SimpleTMP102P { provides interface Read; uses { interface Timer as TimerSensor; interface Timer as TimerFail; - interface Resource; - interface ResourceRequested; - interface I2CPacket as I2CBasicAddr; + interface Resource; + interface ResourceRequested; + interface I2CPacket as I2CBasicAddr; } - } + implementation { uint16_t temp; @@ -22,74 +64,67 @@ implementation { norace uint8_t tempcmd; task void calculateTemp(){ - uint16_t tmp; - atomic tmp = temp; - signal Read.readDone(SUCCESS, tmp); + uint16_t tmp = temp; + #ifdef Z1_TMP102_CELSIUS + if(tmp > 2047) tmp -= (1<<12); + atomic tmp *= 0.625; + #endif + signal Read.readDone(SUCCESS, tmp); } command error_t Read.read(){ - atomic P5DIR |= 0x01; - atomic P5OUT |= 0x01; - call TimerSensor.startOneShot(100); - //call TimerFail.startOneShot(1024); - return SUCCESS; + atomic P5DIR |= 0x01; + atomic P5OUT |= 0x01; + call TimerSensor.startOneShot(100); + //call TimerFail.startOneShot(1024); + return SUCCESS; } event void TimerSensor.fired() { - call Resource.request(); + call Resource.request(); } event void TimerFail.fired() { - signal Read.readDone(SUCCESS, 0); + signal Read.readDone(SUCCESS, 0xFFFF); } event void Resource.granted(){ - error_t error; - pointer = TMP102_TEMPREG; - tempcmd = TMP_READ_TMP; - error= call I2CBasicAddr.write((I2C_START | I2C_STOP), TMP102_ADDRESS, 1, &pointer); - if(error) - { - call Resource.release(); - signal Read.readDone(error, 0); - } - } - - async event void ResourceRequested.requested(){ - - } - - async event void ResourceRequested.immediateRequested(){ - + error_t error; + pointer = TMP102_TEMPREG; + tempcmd = TMP_READ_TMP; + error= call I2CBasicAddr.write((I2C_START | I2C_STOP), TMP102_ADDRESS, 1, &pointer); + if(error){ + call Resource.release(); + signal Read.readDone(error, 0); + } } async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ if(call Resource.isOwner()) { - uint16_t tmp; - for(tmp=0;tmp<0xffff;tmp++); //delay - call Resource.release(); - tmp = data[0]; - tmp = tmp << 8; - tmp = tmp + data[1]; - tmp = tmp >> 4; - atomic temp = tmp; - post calculateTemp(); - } + uint16_t tmp; + for(tmp=0;tmp<0xffff;tmp++); //delay + call Resource.release(); + tmp = data[0]; + tmp = tmp << 8; + tmp = tmp + data[1]; + tmp = tmp >> 4; + atomic temp = tmp; + post calculateTemp(); + } } async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ - //printfUART("write done in temp\n"); - if(call Resource.isOwner()){ - error_t e; - e = call I2CBasicAddr.read((I2C_START | I2C_STOP), TMP102_ADDRESS, 2, temperaturebuff); - if(e) - { - call Resource.release(); - signal Read.readDone(error, 0); - } - } + if(call Resource.isOwner()){ + error_t e; + e = call I2CBasicAddr.read((I2C_START | I2C_STOP), TMP102_ADDRESS, 2, temperaturebuff); + if(e){ + call Resource.release(); + signal Read.readDone(error, 0); + } + } } - + async event void ResourceRequested.requested(){ } + async event void ResourceRequested.immediateRequested(){ } } diff --git a/tos/chips/tmp102/TMP102.h b/tos/chips/tmp102/TMP102.h index 77b1fe0cb7..e4378150b5 100644 --- a/tos/chips/tmp102/TMP102.h +++ b/tos/chips/tmp102/TMP102.h @@ -1,3 +1,45 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of a simple read interface for the TMP102 temperature + * sensor built-in Zolertia Z1 motes + * + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + #ifndef TMP102_H #define TMP102_H @@ -7,4 +49,4 @@ #define TMP_READ_TMP 1 -#endif \ No newline at end of file +#endif diff --git a/tos/platforms/z1/DemoSensorC.nc b/tos/platforms/z1/DemoSensorC.nc index 85d57646fd..222798bf58 100644 --- a/tos/platforms/z1/DemoSensorC.nc +++ b/tos/platforms/z1/DemoSensorC.nc @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + /** * DemoSensorC is a generic sensor device that provides a 16-bit * value. The platform author chooses which sensor actually sits @@ -5,10 +39,13 @@ * Temperature, there are no guarantees. * * This particular DemoSensorC on the z1 platform provides a - * voltage reading, using BatteryC. + * voltage reading using BatteryC, * or * a temperature reading using + * the TMP102 sensor. + * + * Works with Oscilloscope. * - * @author Jordi Soucheiron - * @version $Revision: 1.0 $ $Date: 2010/04/28 10:51:45 $ + * @author: Jordi Soucheiron + * @author: Antonio Linan */ generic configuration DemoSensorC() { @@ -18,4 +55,10 @@ generic configuration DemoSensorC() { implementation { components new BatteryC() as DemoSensor; Read = DemoSensor; + +/* + components new SimpleTMP102C() as DemoSensor; + Read = DemoSensor; +*/ + } diff --git a/tos/platforms/z1/LedsIntensity.nc b/tos/platforms/z1/LedsIntensity.nc index 9e2f93bdda..ae935d3b95 100644 --- a/tos/platforms/z1/LedsIntensity.nc +++ b/tos/platforms/z1/LedsIntensity.nc @@ -1,3 +1,42 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + interface LedsIntensity { command void set( uint8_t ledNum, uint8_t intensity ); diff --git a/tos/platforms/z1/LedsIntensityC.nc b/tos/platforms/z1/LedsIntensityC.nc index 9013330f30..e1d1a0c7de 100644 --- a/tos/platforms/z1/LedsIntensityC.nc +++ b/tos/platforms/z1/LedsIntensityC.nc @@ -1,3 +1,42 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + configuration LedsIntensityC { provides interface StdControl; diff --git a/tos/platforms/z1/LedsIntensityP.nc b/tos/platforms/z1/LedsIntensityP.nc index 3dc9ba8bce..926025f47a 100644 --- a/tos/platforms/z1/LedsIntensityP.nc +++ b/tos/platforms/z1/LedsIntensityP.nc @@ -1,3 +1,42 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + generic module LedsIntensityP() { provides interface StdControl; provides interface LedsIntensity; @@ -108,4 +147,4 @@ implementation m_run = FALSE; return SUCCESS; } -} \ No newline at end of file +} diff --git a/tos/platforms/z1/PlatformC.nc b/tos/platforms/z1/PlatformC.nc index 33e7b80539..0551e2a4ba 100644 --- a/tos/platforms/z1/PlatformC.nc +++ b/tos/platforms/z1/PlatformC.nc @@ -1,14 +1,52 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + #include "hardware.h" -configuration PlatformC -{ +configuration PlatformC{ provides interface Init; } -implementation -{ + +implementation{ + components PlatformP, Msp430ClockC; Init = PlatformP; - PlatformP.Msp430ClockInit -> Msp430ClockC.Init; - + PlatformP.Msp430ClockInit -> Msp430ClockC.Init; } diff --git a/tos/platforms/z1/PlatformLedsC.nc b/tos/platforms/z1/PlatformLedsC.nc index b00640e66d..f2af13a6c0 100644 --- a/tos/platforms/z1/PlatformLedsC.nc +++ b/tos/platforms/z1/PlatformLedsC.nc @@ -1,3 +1,42 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + #include "hardware.h" configuration PlatformLedsC { diff --git a/tos/platforms/z1/PlatformP.nc b/tos/platforms/z1/PlatformP.nc index 282c6a71da..abaa5a75d1 100644 --- a/tos/platforms/z1/PlatformP.nc +++ b/tos/platforms/z1/PlatformP.nc @@ -1,3 +1,44 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Eric B. Decker + */ + #include "hardware.h" module PlatformP{ @@ -6,6 +47,7 @@ module PlatformP{ uses interface Init as LedsInit; } implementation { + /* * We assume that the clock system after reset has been * set to some reasonable value. ie ~1MHz. We assume that diff --git a/tos/platforms/z1/PlatformSerialC.nc b/tos/platforms/z1/PlatformSerialC.nc index a88e49c52a..c19515a80e 100644 --- a/tos/platforms/z1/PlatformSerialC.nc +++ b/tos/platforms/z1/PlatformSerialC.nc @@ -1,3 +1,41 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ configuration PlatformSerialC { diff --git a/tos/platforms/z1/chips/adxl345/HplADXL345C.nc b/tos/platforms/z1/chips/adxl345/HplADXL345C.nc index e93629f7b3..4599895ac2 100644 --- a/tos/platforms/z1/chips/adxl345/HplADXL345C.nc +++ b/tos/platforms/z1/chips/adxl345/HplADXL345C.nc @@ -1,3 +1,46 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 20011 ZOLERTIA LABS + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote + * + * Credits goes to DEXMA SENSORS SL + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Antonio Linan + */ configuration HplADXL345C { provides interface GeneralIO as GeneralIO1; diff --git a/tos/platforms/z1/chips/msp430/adc12/BatteryC.nc b/tos/platforms/z1/chips/msp430/adc12/BatteryC.nc index 6141df89d9..9c9daaf3d5 100644 --- a/tos/platforms/z1/chips/msp430/adc12/BatteryC.nc +++ b/tos/platforms/z1/chips/msp430/adc12/BatteryC.nc @@ -1,3 +1,42 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + generic configuration BatteryC() { provides interface DeviceMetadata; provides interface Read; diff --git a/tos/platforms/z1/chips/msp430/adc12/BatteryP.nc b/tos/platforms/z1/chips/msp430/adc12/BatteryP.nc index 7288e81fe2..25a0c83027 100644 --- a/tos/platforms/z1/chips/msp430/adc12/BatteryP.nc +++ b/tos/platforms/z1/chips/msp430/adc12/BatteryP.nc @@ -1,5 +1,43 @@ -#include "Msp430Adc12.h" +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ +#include "Msp430Adc12.h" module BatteryP { provides interface DeviceMetadata; diff --git a/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc b/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc index d05dc3f180..0c701d6fc9 100644 --- a/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc +++ b/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc @@ -1,3 +1,42 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + module Z1SerialP { provides interface StdControl; provides interface Msp430UartConfigure; diff --git a/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc b/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc index c5b616f903..d9ea2920c5 100644 --- a/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc +++ b/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc @@ -1,6 +1,41 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ - -/* why is this generic? */ +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ generic module Z1UsciP() { provides interface Msp430SpiConfigure[ uint8_t id ]; diff --git a/tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc b/tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc old mode 100644 new mode 100755 index cf5792e770..9d228715b0 --- a/tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc +++ b/tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc @@ -1,3 +1,51 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * HalSensirionSht11C is an advanced access component for the + * Sensirion SHT11 model humidity and temperature sensor, available on + * the telosb platform. This component provides the SensirionSht11 + * interface, which offers full control over the device. Please + * acquire the Resource before using it. + * + * @author Gilman Tolle + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ configuration HalSensirionSht11C { provides interface Resource[ uint8_t client ]; @@ -11,8 +59,10 @@ implementation { Resource = HplSensirionSht11C.Resource; SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA; SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK; - SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA; - + #ifndef IS_ZIGLET + SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA; + #endif + components new TimerMilliC(); SensirionSht11LogicP.Timer -> TimerMilliC; diff --git a/tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc b/tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc old mode 100644 new mode 100755 index 046b961012..3ba51e7c9f --- a/tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc +++ b/tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc @@ -1,37 +1,104 @@ +/* + * Copyright (c) 2011 Zolertia Labs + * All rights reserved. + * + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * HplSensirionSht11C is a low-level component, intended to provide + * the physical resources used by the Sensirion SHT11 sensor on the + * telosb platform so that the chip driver can make use of them. You + * really shouldn't be wiring to this, unless you're writing a new + * Sensirion SHT11 driver. + * + * @author Gilman Tolle + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Antonio Linan + */ configuration HplSensirionSht11C { provides interface Resource[ uint8_t id ]; provides interface GeneralIO as DATA; provides interface GeneralIO as SCK; - provides interface GpioInterrupt as InterruptDATA; + #ifndef IS_ZIGLET + provides interface GpioInterrupt as InterruptDATA; + #endif + } implementation { components HplMsp430GeneralIOC; components new Msp430GpioC() as DATAM; components new Msp430GpioC() as SCKM; - components new Msp430GpioC() as PWRM; + #ifndef IS_ZIGLET + components new Msp430GpioC() as PWRM; + PWRM -> HplMsp430GeneralIOC.Port21; + DATAM -> HplMsp430GeneralIOC.Port10; + SCKM -> HplMsp430GeneralIOC.Port16; + #endif - DATAM -> HplMsp430GeneralIOC.Port10; - SCKM -> HplMsp430GeneralIOC.Port16; - PWRM -> HplMsp430GeneralIOC.Port21; + #ifdef IS_ZIGLET + #warning USING SHT1X SENSOR IN ZIGLET PORT + DATAM -> HplMsp430GeneralIOC.Port51; //10 + SCKM -> HplMsp430GeneralIOC.Port52; //56 + #endif DATA = DATAM; SCK = SCKM; components HplSensirionSht11P; - HplSensirionSht11P.PWR -> PWRM; + #ifndef IS_ZIGLET + HplSensirionSht11P.PWR -> PWRM; + #endif + HplSensirionSht11P.DATA -> DATAM; HplSensirionSht11P.SCK -> SCKM; components new TimerMilliC(); HplSensirionSht11P.Timer -> TimerMilliC; - components HplMsp430InterruptC; - components new Msp430InterruptC() as InterruptDATAC; - InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port10; - InterruptDATA = InterruptDATAC.Interrupt; - + #ifndef IS_ZIGLET + components HplMsp430InterruptC; + components new Msp430InterruptC() as InterruptDATAC; + InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port10; + InterruptDATA = InterruptDATAC.Interrupt; + #endif + components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter; Resource = Arbiter; diff --git a/tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc b/tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc old mode 100644 new mode 100755 index 02ab426d05..b10d891b03 --- a/tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc +++ b/tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc @@ -1,9 +1,51 @@ +/* + * Copyright (c) 2011 Zolertia Labs + * All rights reserved. + * + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ -#include "Timer.h" - -/** +/* * HplSensirionSht11P is a low-level component that controls power for - * the Sensirion SHT11 sensor on the telosb platform. + * the Sensirion SHT11 sensor on the telosb and Z1 platform. + * + * @author Gilman Tolle + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Antonio Lignan */ module HplSensirionSht11P { @@ -17,22 +59,30 @@ implementation { task void stopTask(); command error_t SplitControl.start() { + #ifndef IS_ZIGLET call PWR.makeOutput(); call PWR.set(); call Timer.startOneShot( 11 ); return SUCCESS; + #endif + + #ifdef IS_ZIGLET + signal SplitControl.startDone( SUCCESS ); + #endif } - + event void Timer.fired() { signal SplitControl.startDone( SUCCESS ); } - + command error_t SplitControl.stop() { call SCK.makeInput(); call SCK.clr(); call DATA.makeInput(); call DATA.clr(); + #ifndef IS_ZIGLET call PWR.clr(); + #endif post stopTask(); return SUCCESS; } diff --git a/tos/platforms/z1/chips/sht11/SensirionSht11C.nc b/tos/platforms/z1/chips/sht11/SensirionSht11C.nc old mode 100644 new mode 100755 index 094b003514..e3143f2ef3 --- a/tos/platforms/z1/chips/sht11/SensirionSht11C.nc +++ b/tos/platforms/z1/chips/sht11/SensirionSht11C.nc @@ -1,3 +1,53 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * SensirionSht11C is a top-level access component for the Sensirion + * SHT11 model humidity and temperature sensor, available on the + * telosb and Z1 platform. Because this component represents one physical + * device, simultaneous calls to read temperature and humidity will be + * arbitrated and executed in sequential order. Feel free to read both + * at the same time, just be aware that they'll come back + * sequentially. + * + * @author Gilman Tolle + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ generic configuration SensirionSht11C() { provides interface Read as Temperature; diff --git a/tos/platforms/z1/chips/sht11/SensirionSht11LogicP.nc b/tos/platforms/z1/chips/sht11/SensirionSht11LogicP.nc new file mode 100755 index 0000000000..3119c654c1 --- /dev/null +++ b/tos/platforms/z1/chips/sht11/SensirionSht11LogicP.nc @@ -0,0 +1,450 @@ +/* + * Copyright (c) 2011 Zolertia Labs + * All rights reserved. + * + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * SensirionSht11LogicP contains the actual driver logic needed to + * read from the Sensirion SHT11 temperature/humidity sensor. It + * depends on 2 underlying GeneralIO interfaces, one for the data pin + * and one for the clock pin, and one underlying GpioInterrupt. It + * provides the HAL-level SensirionSht11 interface. It's generic, so + * you can instantiate it multiple times if you have more than one + * Sensirion SHT11 attached to a node. + * + *

+ * This code assumes that the MCU clock is less than 10 MHz. If you + * ever run this on a faster MCU, you'll need to insert a lot of + * waits to keep the Sensirion happy. + * + * Modified to work for both GPIO's and Ziglet port of Zolertia Z1 mote + * Shadows /chip/sht1x. To use sensor as Ziglet, simply add: + * CFLAGS += -DIS_ZIGLET + * + * @author Gilman Tolle + * @author: Xavier Orduna + * @author: Jordi Soucheiron + * @author: Antonio Lignan + */ + +#include "Timer.h" +#include "SensirionSht11.h" + + + +generic module SensirionSht11LogicP() { + provides interface SensirionSht11[ uint8_t client ]; + + uses interface GeneralIO as DATA; + uses interface GeneralIO as CLOCK; + + uses interface Timer; + uses interface Leds; + #ifndef IS_ZIGLET + uses interface GpioInterrupt as InterruptDATA; + #endif + +} +implementation { + + typedef enum { + CMD_MEASURE_TEMPERATURE = 0x3, + CMD_MEASURE_HUMIDITY = 0x5, + CMD_READ_STATUS = 0x7, + CMD_WRITE_STATUS = 0x6, + CMD_SOFT_RESET = 0x1E, + } sht_cmd_t; + + enum { + TIMEOUT_RESET = 11, + TIMEOUT_14BIT = 250, + TIMEOUT_12BIT = 80, //70, + TIMEOUT_8BIT = 20, //15, + } sht_timeout_t; + + bool on = TRUE; + bool busy = FALSE; + uint8_t status = 0; + sht_cmd_t cmd; + uint8_t newStatus; + bool writeFail = FALSE; + + uint8_t currentClient; + + error_t performCommand(); + void initPins(); + void resetDevice(); + void transmissionStart(); + void sendCommand(uint8_t _cmd); + void writeByte(uint8_t byte); + error_t waitForResponse(); + void enableInterrupt(); + uint8_t readByte(); + void ack(); + void endTransmission(); + + task void readSensor(); + task void signalStatusDone(); + + command error_t SensirionSht11.reset[ uint8_t client ]() { + if ( !on ) { return EOFF; } + if ( busy ) { return EBUSY; } else { busy = TRUE; } + cmd = CMD_SOFT_RESET; + currentClient = client; + return performCommand(); + } + + command error_t SensirionSht11.measureTemperature[ uint8_t client ]() { + if ( !on ) { return EOFF; } + if ( busy ) { return EBUSY; } else { busy = TRUE; } + cmd = CMD_MEASURE_TEMPERATURE; + currentClient = client; + return performCommand(); + } + + command error_t SensirionSht11.measureHumidity[ uint8_t client ]() { + if ( !on ) { return EOFF; } + if ( busy ) { return EBUSY; } else { busy = TRUE; } + cmd = CMD_MEASURE_HUMIDITY; + currentClient = client; + return performCommand(); + } + + /* FIXME: these don't seem to work */ + command error_t SensirionSht11.readStatusReg[ uint8_t client ]() { + if ( !on ) { return EOFF; } + if ( busy ) { return EBUSY; } else { busy = TRUE; } + cmd = CMD_READ_STATUS; + currentClient = client; + return performCommand(); + } + + /* FIXME: these don't seem to work */ + command error_t SensirionSht11.writeStatusReg[ uint8_t client ]( uint8_t val ) { + if ( !on ) { return EOFF; } + if ( busy ) { return EBUSY; } else { busy = TRUE; } + cmd = CMD_WRITE_STATUS; + newStatus = val; + currentClient = client; + return performCommand(); + } + + // performCommand() returns both error_t and status reg -- fortunately, error_t is 8bit + error_t performCommand() { + uint8_t i = 0; + initPins(); + resetDevice(); + transmissionStart(); + cmd &= 0x1F; // clear the first 3 address bits to 000 + sendCommand(cmd); + + if ( waitForResponse() != SUCCESS ) { + busy = FALSE; + return FAIL; + } + + switch(cmd) { + + case CMD_SOFT_RESET: + call Timer.startOneShot( TIMEOUT_RESET ); + break; + + case CMD_MEASURE_TEMPERATURE: + enableInterrupt(); + if ( status & SHT11_STATUS_LOW_RES_BIT ) { + call Timer.startOneShot( TIMEOUT_12BIT ); + } else { + call Timer.startOneShot( TIMEOUT_14BIT ); + } + + break; + + case CMD_MEASURE_HUMIDITY: + enableInterrupt(); + if ( status & SHT11_STATUS_LOW_RES_BIT ) { + call Timer.startOneShot( TIMEOUT_8BIT ); + } else { + call Timer.startOneShot( TIMEOUT_12BIT ); + } + + break; + + case CMD_READ_STATUS: + { + uint8_t tempStatus; + uint8_t crc; + + tempStatus = readByte(); + crc = readByte(); + endTransmission(); + + status = tempStatus; // FIXME: need to check CRC! + + post signalStatusDone(); + } + + case CMD_WRITE_STATUS: + writeByte( newStatus ); + + if ( waitForResponse() != SUCCESS ) { + writeFail = TRUE; + } else { + status = newStatus; + } + + post signalStatusDone(); + } + + // leave the device busy...we're waiting for an interrupt + return SUCCESS; + } + + void initPins() { + call CLOCK.makeOutput(); + call CLOCK.clr(); + call DATA.makeInput(); + call DATA.set(); + #ifndef IS_ZIGLET + call InterruptDATA.disable(); + #endif + } + + void resetDevice() { + uint8_t i; + call DATA.makeOutput(); + call DATA.set(); + call CLOCK.clr(); + for( i = 0; i < 9; i++ ) { + call CLOCK.set(); + call CLOCK.clr(); + } + } + + void transmissionStart() { + call DATA.makeOutput(); + call DATA.set(); + call CLOCK.clr(); + call CLOCK.set(); + call DATA.clr(); + call CLOCK.clr(); + call CLOCK.set(); + call DATA.set(); + call CLOCK.clr(); + } + + void sendCommand(uint8_t _cmd) { + writeByte(_cmd); + } + + void writeByte(uint8_t byte) { + uint8_t i; + for( i = 0; i < 8; i++ ) { + if ( byte & 0x80 ) + call DATA.set(); + else + call DATA.clr(); + byte = byte << 1; + call CLOCK.set(); + call CLOCK.clr(); + } + } + + error_t waitForResponse() { + call DATA.makeInput(); + call DATA.set(); + call CLOCK.set(); + if (call DATA.get()) { + // the device didn't pull the DATA line low + // the command wasn't received or acknowledged + return FAIL; + } + call CLOCK.clr(); + return SUCCESS; + } + + #ifdef IS_ZIGLET + task void stayAwake(){ + if (!call DATA.get()){ + post readSensor(); + } else { + post stayAwake(); + } + } + #endif + + void enableInterrupt() { + call DATA.makeInput(); + call DATA.set(); + #ifndef IS_ZIGLET + call InterruptDATA.enableFallingEdge(); + #endif + + #ifdef IS_ZIGLET + post stayAwake(); + #endif + } + + event void Timer.fired() { + + switch(cmd) { + + case CMD_SOFT_RESET: + // driver has waited long enough for device to reset + busy = FALSE; + signal SensirionSht11.resetDone[currentClient]( SUCCESS ); + break; + + case CMD_MEASURE_TEMPERATURE: + // timeout expired with no data interrupt + busy = FALSE; + signal SensirionSht11.measureTemperatureDone[currentClient]( FAIL, 0 ); + break; + + case CMD_MEASURE_HUMIDITY: + // timeout expired with no data interrupt + busy = FALSE; + signal SensirionSht11.measureHumidityDone[currentClient]( FAIL, 0 ); + break; + + default: + // we're in an unexpected state. what to do? + break; + } + } + + #ifndef IS_ZIGLET + async event void InterruptDATA.fired() { + call InterruptDATA.disable(); + post readSensor(); + } + #endif + + task void readSensor() { + uint16_t data = 0; + uint8_t crc = 0; + + if ( busy == FALSE ) { + // the interrupt was received after the timeout. + // we've already signaled FAIL to the client, so just give up. + return; + } + + call Timer.stop(); + + data = readByte() << 8; + data |= readByte(); + // printfUART("readb %d %d\n", data, readByte()); + crc = readByte(); + + endTransmission(); + + switch( cmd ) { + case CMD_MEASURE_TEMPERATURE: + busy = FALSE; + signal SensirionSht11.measureTemperatureDone[currentClient]( SUCCESS, data ); + break; + + case CMD_MEASURE_HUMIDITY: + busy = FALSE; + signal SensirionSht11.measureHumidityDone[currentClient]( SUCCESS, data ); + + break; + + default: + break; // unknown command - shouldn't reach here + } + } + + uint8_t readByte() { + uint8_t byte = 0; + uint8_t i; + + for( i = 0; i < 8; i++ ) { + call CLOCK.set(); + if (call DATA.get()) + byte |= 1; + if (i != 7) + byte = byte << 1; + call CLOCK.clr(); + } + + ack(); + return byte; + } + + void ack() { + call DATA.makeOutput(); + call DATA.clr(); + call CLOCK.set(); + call CLOCK.clr(); + call DATA.makeInput(); + call DATA.set(); + } + + void endTransmission() { + call DATA.makeOutput(); + call DATA.set(); + call CLOCK.set(); + call CLOCK.clr(); + } + + task void signalStatusDone() { + bool _writeFail = writeFail; + switch( cmd ) { + case CMD_READ_STATUS: + busy = FALSE; + signal SensirionSht11.readStatusRegDone[currentClient]( SUCCESS, status ); + break; + case CMD_WRITE_STATUS: + busy = FALSE; + writeFail = FALSE; + signal SensirionSht11.writeStatusRegDone[currentClient]( (_writeFail ? FAIL : SUCCESS) ); + break; + default: + // shouldn't happen. + break; + } + } + + default event void SensirionSht11.resetDone[uint8_t client]( error_t result ) { } + default event void SensirionSht11.measureTemperatureDone[uint8_t client]( error_t result, uint16_t val ) { } + default event void SensirionSht11.measureHumidityDone[uint8_t client]( error_t result, uint16_t val ) { } + default event void SensirionSht11.readStatusRegDone[uint8_t client]( error_t result, uint8_t val ) { } + default event void SensirionSht11.writeStatusRegDone[uint8_t client]( error_t result ) { } +} + diff --git a/tos/platforms/z1/hardware.h b/tos/platforms/z1/hardware.h index e875b451c3..c6bbb9661a 100644 --- a/tos/platforms/z1/hardware.h +++ b/tos/platforms/z1/hardware.h @@ -1,3 +1,42 @@ +/* + * Copyright (c) 2009 DEXMA SENSORS SL + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author: Xavier Orduna + * @author: Jordi Soucheiron + */ + #ifndef _H_hardware_h #define _H_hardware_h From 0aa92a1f6a0bd54f04d191aa26cdab3025c38470 Mon Sep 17 00:00:00 2001 From: Antonio Lignan Date: Wed, 27 Jul 2011 13:17:22 +0200 Subject: [PATCH 163/411] Fixed conflicting type of .transferDone in DMA, also cleaned up test/z1/FastADC --- apps/tests/z1/FastADC/FastADCC.nc | 21 +++++++++++++-------- tos/chips/msp430/adc12/Msp430Adc12DMAP.nc | 2 +- 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/apps/tests/z1/FastADC/FastADCC.nc b/apps/tests/z1/FastADC/FastADCC.nc index 0b9d90c6e5..b430a2de9e 100644 --- a/apps/tests/z1/FastADC/FastADCC.nc +++ b/apps/tests/z1/FastADC/FastADCC.nc @@ -67,8 +67,15 @@ implementation{ uint16_t pos; msp430adc12_channel_config_t adcconfig = { + + // inch: INPUT_CHANNEL_A7, inch: TEMPERATURE_DIODE_CHANNEL, sref: REFERENCE_AVcc_AVss, + + /* For battery readings */ + // inch: SUPPLY_VOLTAGE_HALF_CHANNEL, + // sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_1_5, adc12ssel: SHT_SOURCE_ACLK, adc12div: SHT_CLOCK_DIV_1, @@ -78,24 +85,22 @@ implementation{ }; void showerror(){ - call Leds.led0On(); + call Leds.led0On(); } void configureSingle(){ error_t e; printfz1("configuring single\n"); e = call adc.configureSingle(&adcconfig); - if(e != SUCCESS) - showerror(); + if(e != SUCCESS) showerror(); printfz1("error %d\n", e); } void configureMultiple(){ error_t e; printfz1("configuring multiple\n"); - e = call adc.configureMultiple(&adcconfig, adb, FADSAMPLES, 3); - if(e != SUCCESS) - showerror(); + e = call adc.configureMultiple(&adcconfig, adb, FADSAMPLES, 20); + if(e != SUCCESS) showerror(); printfz1("error %d\n", e); } @@ -116,7 +121,7 @@ implementation{ event void Boot.booted(){ printfz1_init(); - printfz1("booting\n"); + printfz1("Booting\n"); call Resource.request(); } @@ -145,7 +150,7 @@ implementation{ } async event error_t adc.singleDataReady(uint16_t data){ - //printfz1("sample: %d\n", data); + // printfz1("sample: %d\n", data); return SUCCESS; } diff --git a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc index f33b37f0d9..7142d825b9 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc @@ -158,7 +158,7 @@ enum { return 0; } - async event void DMAChannel.transferDone(error_t success) + async event void DMAChannel.transferDone() { uint16_t* next; uint8_t oldMode = mode; From 5632fd338080cd57fba5a7d4af8690246cdb9f4f Mon Sep 17 00:00:00 2001 From: Antonio Lignan Date: Wed, 27 Jul 2011 13:17:22 +0200 Subject: [PATCH 164/411] Fixed conflicting type of .transferDone in DMA, also cleaned up tests --- apps/tests/z1/Ziglets/SimpleTSL2563/Makefile | 2 +- apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/apps/tests/z1/Ziglets/SimpleTSL2563/Makefile b/apps/tests/z1/Ziglets/SimpleTSL2563/Makefile index c68f589e30..11b5b9a3a0 100755 --- a/apps/tests/z1/Ziglets/SimpleTSL2563/Makefile +++ b/apps/tests/z1/Ziglets/SimpleTSL2563/Makefile @@ -1,4 +1,4 @@ -COMPONENT=TestZ1DUTAppC +COMPONENT=TestTSLAppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 include $(MAKERULES) diff --git a/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc b/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc index 3df7d370ed..d189b7ca7d 100755 --- a/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc +++ b/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc @@ -43,7 +43,7 @@ configuration TestTSLAppC {} implementation { - components MainC, TestTSLAppC as App, LedsC; + components MainC, TestTSLC as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; From 60c66ec639dcdf08bdc918c830aebb40e1c2b30f Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Fri, 22 Jul 2011 10:16:08 +0100 Subject: [PATCH 165/411] I2C Driver updated I2CPacket.write function now sends STOP as last byte is transmitted, also removed bus busy check, not needed and did'nt work with some I2C devices --- tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc | 48 ++++++++----------- 1 file changed, 20 insertions(+), 28 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc index 1a8bc8f5fa..bc6d1ce2c3 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciI2CP.nc @@ -37,6 +37,7 @@ #include "msp430usci.h" #include +#include /** * Implement the I2C-related interfaces for a MSP430 USCI module @@ -69,6 +70,7 @@ implementation { enum { TIMEOUT = 1000, + WRITETIMEOUT = 100000, }; /** @@ -252,20 +254,11 @@ implementation { * @return SUCCESS if bus available and request accepted. */ async command error_t I2CPacket.write[uint8_t client] (i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { - uint16_t i = 0; + uint32_t i = 0; uint8_t m_tx_len = length; uint8_t * m_tx_buf = data; uint16_t m_tx_addr = addr; - while ((call Usci.getStat() & UCBBUSY)) { - if (i >= TIMEOUT) { - m_tx_len = 0; - signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); - return FAIL; - } - i++; - } - if(flags & I2C_START) { call Usci.setTransmitMode(); /*set transmit mode on i2c*/ call Usci.setI2Csa(addr); /*Set the Slave Address*/ @@ -278,16 +271,15 @@ implementation { } i++; } - i=0; - while ((call Usci.getStat() & UCBBUSY)) { - if (i >= TIMEOUT) { - m_tx_len = 0; + call Usci.setTXStart(); /*Set the uart to generate a repeat/start condition in transmit mode*/ + while (call Usci.getStopBit()) { /*the STOP bit is cleared when the slave acks the address*/ + if(i >= TIMEOUT+WRITETIMEOUT) { /*Some devices use a start with no data to test if the device is ready for write*/ + m_tx_len -= length; signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); return FAIL; } i++; } - call Usci.setTXStart(); /*Set the uart to generate a repeat/start condition in transmit mode*/ } else call Usci.setTransmitMode(); /*Make sure the uart is in transmit mode*/ @@ -300,31 +292,31 @@ implementation { signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); return FAIL; } - if ((call Usci.getStat()) == (UCBBUSY | UCNACKIFG | UCSCLLOW)) { + if ((call Usci.getIe()) == UCNACKIFG) { m_tx_len -= length; signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); return FAIL; } i++; } - length--; - } - - if (flags & I2C_STOP) { - call Usci.setTXStop(); /*Set the uart to generate a STOP*/ - i=0; - while (call Usci.getStopBit()) { - if(i >= TIMEOUT) { - m_tx_len -= length; - signal I2CPacket.writeDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); - return FAIL; + if((flags & I2C_STOP) && length == 1) { /*if we are sending the last byte and we want to end send STOP*/ + call Usci.setTXStop(); /*Set the uart to generate a STOP*/ + i=0; + while (call Usci.getStopBit()) { + if (i >= TIMEOUT) { + m_tx_len -= length; + signal I2CPacket.readDone[client](FAIL,m_tx_addr,m_tx_len,m_tx_buf); + return FAIL; + } + i++; } - i++; } + length--; } m_tx_len -= length; signal I2CPacket.writeDone[client](SUCCESS,m_tx_addr,m_tx_len,m_tx_buf); + return SUCCESS; } From 3ea5d7566a96c8c993f41e59c4678762823a3563 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Fri, 29 Jul 2011 10:13:29 +0100 Subject: [PATCH 166/411] Add to rf1a funtion to get the current lqi status --- tos/chips/msp430/rf1a/physical/HplMsp430Rf1aP.nc | 16 ++++++++++++++++ tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc | 13 +++++++++++++ 2 files changed, 29 insertions(+) diff --git a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aP.nc b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aP.nc index 6f7f649312..3b4fe6250c 100644 --- a/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aP.nc +++ b/tos/chips/msp430/rf1a/physical/HplMsp430Rf1aP.nc @@ -1523,6 +1523,22 @@ generic module HplMsp430Rf1aP () @safe() { return rv; } + async command int Rf1aPhysical.lqi[uint8_t client] () { + int rv; + + /* Radio must be assigned */ + if (! call ArbiterInfo.inUse()) { + return EOFF; + } + /* This must be the right client */ + if (client != call ArbiterInfo.userId()) { + return EBUSY; + } + atomic { + rv = call Rf1aIf.readRegister(LQI); + } + return ((rv & 0x7F)*-1); + } async command void Rf1aPhysicalMetadata.store (rf1a_metadata_t* metadatap) { atomic { metadatap->rssi = rx_rssi_raw; diff --git a/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc b/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc index e7b83bbb6b..51083b1008 100644 --- a/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc +++ b/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc @@ -380,6 +380,19 @@ interface Rf1aPhysical { */ async command int rssi_dBm (); + /** Read the LQI value. + * + * Returns the LQI value from the LQI status register + * the lower the number indicates a better link quality. + * the CRC OK bit(7) is mask off in the return result and the + * value is made negative. + * + * @return EOFF if radio is off; EBUSY if assigned to another + * client. A negative value indicates a valid LQI measurement. + * @note This is not an error_t. + */ + + async command int lqi (); /** Read the current radio configuration. * * @note This command always succeeds and returns the current From 6785e7d09beb1eba2f7b0ce8d0d0ad5054b8fe66 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Fri, 29 Jul 2011 10:14:42 +0100 Subject: [PATCH 167/411] Compiler #warn changed to #warning --- tos/chips/msp430/adc12/HplAdc12P.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc index 86ff2e8f8c..2f6f3fda7f 100644 --- a/tos/chips/msp430/adc12/HplAdc12P.nc +++ b/tos/chips/msp430/adc12/HplAdc12P.nc @@ -52,7 +52,7 @@ #endif #if defined(__MSP430_HAS_ADC12_PLUS__) -#warn "HplAdc12P: processor uses ADC12_PLUS (may not work correctly)" +#warning "HplAdc12P: processor uses ADC12_PLUS (may not work correctly)" #endif module HplAdc12P { From 6f4cd6983d109b64d01ffa004e1c973154b07bea Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 4 Aug 2011 20:58:03 -0700 Subject: [PATCH 168/411] Revise 01_Repo_Notes and make README point at it --- 01_Repo_Notes | 28 +++++++++++++++++++++++----- README | 10 +--------- 2 files changed, 24 insertions(+), 14 deletions(-) mode change 100644 => 120000 README diff --git a/01_Repo_Notes b/01_Repo_Notes index 115a9e3367..08f33e5b31 100644 --- a/01_Repo_Notes +++ b/01_Repo_Notes @@ -1,5 +1,19 @@ -Welcome to TinyProd (TinyOS Production) +============================================================================ + +TinyProd + tp-freeforall/prod + +msp430-int: msp430 integration +msp430-int-pu: msp430 integration (proposed updates) + +msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. + +If in doubt, branch off from msp430-int-pu. + +============================================================================ + +Welcome to TinyProd * About TinyProd: @@ -50,8 +64,11 @@ family) its primary focus is on the newer processors which requires the newer toolchain. The intent is that all processors (original, x1 as well as the newer x2 and x5 families) should be tested with the newer toolchain. -An interium installation tarball can be found at -http://tinyprod.net/cire/msp430-20110612.tgz. It should be installed in root (/). +An interium tarball of an installed toolchain can be found at +http://tinyprod.net/downloads/msp430-20110716.tgz. It should be installed in root (/). +Additional packages (libmpc-dev libmpc2) need to be installed as they are needed by +the toolchain to function correctly. + Debian packages are being built for Ubuntu Oneiric (11.10). Some testing with the old 3.2.3 toolchain (original tinyos and z1 varient) has @@ -110,7 +127,8 @@ msp430-int-pu: proposed updates to msp430-int (no msp430-int-next). swreset: potential msp430 swreset implementation. -motenet-rel: replacement for the serialforwarder. +motenet-rel: replacement for the serialforwarder. Adds AF_AM sockets and + a socket interface to the serial stack. svn-vhsb: remove bad z1 commit from svn trunk @@ -156,7 +174,7 @@ svn t2 mainline ---| * Branches: -svn-upstream: is the main branch coming from the svn t2 mainline. Updated manually. +svn/upstream: is the main branch coming from the svn t2 mainline. Updated manually. svn-vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main trunk. This branch tracks master but has the superfluous Z1 commit diff --git a/README b/README deleted file mode 100644 index 3f754070c6..0000000000 --- a/README +++ /dev/null @@ -1,9 +0,0 @@ -TinyProd - tp-freeforall/prod - -msp430-int: msp430 integration -msp430-int-pu: msp430 integration (proposed updates) - -msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. - -If in doubt, branch off from msp430-int-pu. diff --git a/README b/README new file mode 120000 index 0000000000..85948ce16f --- /dev/null +++ b/README @@ -0,0 +1 @@ +01_Repo_Notes \ No newline at end of file From 73d82f55171116d59ce68170eb55c97b48f35213 Mon Sep 17 00:00:00 2001 From: Derek Baker Date: Wed, 3 Aug 2011 08:25:03 +0100 Subject: [PATCH 169/411] ADC12 registers re-define for newer x5xxx chip set Re-defined: ENC as ADC12ENC CONSEQ0 ADC12CONSEQ0 CONSEQ1 ADC12CONSEQ1 Compiled and tested, all works ok! --- tos/chips/msp430/msp430hardware.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index bf1ffd869a..0d75587889 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -547,4 +547,21 @@ enum { #define STATIC_ARRAY_SIZE(_s) (_s) #endif /* STATIC_ARRAY_SIZE */ +/* + * Define the following ADC12 registers for the x5xxx chip set, + * the x5xxx header file does not have the older register names + * + */ +#ifndef ENC +#define ENC ADC12ENC +#endif + +#ifndef CONSEQ0 +#define CONSEQ0 ADC12CONSEQ0 +#endif + +#ifndef CONSEQ1 +#define CONSEQ1 ADC12CONSEQ1 +#endif + #endif // _H_msp430hardware_h From 04f1373b7119d66f752fa95ed3c50ac8fe19b6f8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 22 Aug 2011 16:17:31 -0700 Subject: [PATCH 170/411] msp430/x5: McuSleep/msp430PowerBits should have LPM2 includ SCG0 for FLL disable. The TI documentation for the 5438 (all x5 family?) says the FLL is disabled if SCG0 or SCG1 are set (SR) and yes that is true. If either bit is set then the FLL isn't driving the DCO (either because the FLL integrator is turned off or the DCO itself is turned off). In LPM2, SCG1 is set which disables the DCO generator (and the FLL). But if SCG0 is clear it looks like the frequency integrator is still running. Which doesn't buy us anything. The DCO is off so what is the point. So it seems to make sense to kick both SCG0 and SCG1. --- tos/chips/msp430/x5xxx/lpm/McuSleepP.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/chips/msp430/x5xxx/lpm/McuSleepP.nc b/tos/chips/msp430/x5xxx/lpm/McuSleepP.nc index 81143eb13e..37f7cb3c17 100644 --- a/tos/chips/msp430/x5xxx/lpm/McuSleepP.nc +++ b/tos/chips/msp430/x5xxx/lpm/McuSleepP.nc @@ -74,7 +74,7 @@ implementation { 0, // ACTIVE SR_CPUOFF, // LPM0 SR_SCG0+SR_CPUOFF, // LPM1 - SR_SCG1+SR_CPUOFF, // LPM2 + SR_SCG1+SR_SCG0+SR_CPUOFF, // LPM2 SR_SCG1+SR_SCG0+SR_CPUOFF, // LPM3 SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF, // LPM4 }; From 95bcb3ca194ec1917ffcf1a083c3a2f069e9b978 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 22 Aug 2011 16:29:33 -0700 Subject: [PATCH 171/411] msp430: remove extraneous nop from atomic (dint provides it). old old old toolchains needed the nop in the dint delay slot. Newer toolchains don't need this. Get rid of it. Don't burn the extra 2 bytes every time we do an atomic. See code for more details. --- tos/chips/msp430/msp430hardware.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 0d75587889..4c364654a1 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -492,10 +492,36 @@ void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts); * though. */ + /* + * Entry for atomic. (__nesc_atomic_start()) + * + * Basically, test for GIE (remember for later), and then disable interrupts. + * + * old versions of the toolchain needed a nop following the dint to make sure + * that the dint took. Otherwise, there was a race condition where the + * instruction following the dint could be executed before interrupts got + * disabled. + * + * Toolchains starting with uniarch (LTS_20110716, mspgcc 4.5.3+) automatically + * generate the nop when using the _dint intrinsic (invoked by dint()) and the + * extra nop is no longer needed. The precence of the macro __MSPGCC__ is assumed + * to indicate a newer toolchain. + * + * Why do we care? Well atomic is used all over the place and the extra nop + * burns two extra bytes of ROM. We don't have that much to throw away so + * we deal with it. + */ + __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { __nesc_atomic_t result = (READ_SR & SR_GIE); + dint(); + +#ifndef __MSPGCC__ + /* see above */ nop(); +#endif + asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ return result; } From 7ac704ffacff24556626b4ca86d6dbe4329865cf Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 26 Aug 2011 03:51:05 -0700 Subject: [PATCH 172/411] sense wrong in _HAS_ protection clauses, fix. --- tos/chips/msp430/flash/driver/Msp430FlashP.nc | 4 ++-- tos/chips/msp430/wdt/WdtP.nc | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/tos/chips/msp430/flash/driver/Msp430FlashP.nc b/tos/chips/msp430/flash/driver/Msp430FlashP.nc index d9c03d559f..0f59984030 100644 --- a/tos/chips/msp430/flash/driver/Msp430FlashP.nc +++ b/tos/chips/msp430/flash/driver/Msp430FlashP.nc @@ -40,12 +40,12 @@ * @author David Moss */ -#if !defined(__MSP430_HAS_FLASH__) || !defined(__MSP430_HAS_FLASH2__) +#if !defined(__MSP430_HAS_FLASH__) && !defined(__MSP430_HAS_FLASH2__) #error "Msp430FlashP: processor not supported, need FLASH or FLASH2" #endif #if defined(__MSP430_HAS_FLASH2__) -#warn "Msp430FlashP: FLASH2 may not function correctly" +#warn "Msp430FlashP: FLASH driver, FLASH2 defined, may not function correctly" #endif #include "Msp430Flash.h" diff --git a/tos/chips/msp430/wdt/WdtP.nc b/tos/chips/msp430/wdt/WdtP.nc index ebcfd118c4..e1846a2ab1 100644 --- a/tos/chips/msp430/wdt/WdtP.nc +++ b/tos/chips/msp430/wdt/WdtP.nc @@ -32,7 +32,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -#if !defined(__MSP430_HAS_WDT__) || !defined(__MSP430_HAS_WDT_A__) +#if !defined(__MSP430_HAS_WDT__) && !defined(__MSP430_HAS_WDT_A__) #error "Msp430WdtP: processor not supported, need WDT or WDT_A" #endif From d0c576513daa3ab0a80e8b07f37c89ce3fb8a663 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 26 Aug 2011 03:52:24 -0700 Subject: [PATCH 173/411] update toolchain notes and update comments about cpu clocks (4MiHz) --- 11_Release_Notes | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index c0b4a10be2..fedd9419ff 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -20,12 +20,14 @@ done using the following: changes, 26xx processors. Does not properly support x5 chips. mspgcc4.4.5(20110312) Initial mspgcc4 supports x5 chips. experimental. - mspgcc4.5.2 (mspgcc) Uniarch varient supports all chips. experimental. + mspgcc4.5.2 (mspgcc) Uniarch variant supports all chips. experimental. (20110612) slated to become new main toolchain. + mspgcc4.5.3 (LTS 20110716) long term support of uniarch (pre-20bit) + mspgcc4.5.3 (20110813) later version of LTS20110716 with patches through 0813. -It is recommended that all verification work be done using the 20110612 toolchain. -The sooner we get that toolchain squared away the better. +It is recommended that all verification work be done using the latest toolchain +available. The sooner we get that toolchain squared away the better. Families: @@ -50,8 +52,10 @@ Other notable changes: ie. Msp430Uart0 -> Msp430UartA0. Better matches what will come in with the x5 code where there are lots of ports. -* Default clocks 1611 (x1) 4 MiHz, 2617/2618 (x2) 8 MiHz, - 5137/5438 (x5) 16 MiHz +* The main cpu clock for the 3 families is defaulted to 4 MiHz. This is done + for a number of reasons. 1) low power and 2) the 5438a starts off in low + power mode and doesn't support faster than 8 MHz (note decimal MHz not + binary). * use common clock module for x1 and x2. msp430/clock_bcs. Handles basic_clock and bc2. From 56bc3f209e50e519a3ef52aa17de6b21af0f552f Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 27 Aug 2011 01:33:07 -0700 Subject: [PATCH 174/411] CRLF nonsense, nuke, MoteISTx5 --- support/make/MoteISTx5.target | 18 +-- tos/platforms/MoteISTx5/.platform | 184 +++++++++++++++--------------- 2 files changed, 101 insertions(+), 101 deletions(-) diff --git a/support/make/MoteISTx5.target b/support/make/MoteISTx5.target index 45ccecf386..57563d0016 100755 --- a/support/make/MoteISTx5.target +++ b/support/make/MoteISTx5.target @@ -1,9 +1,9 @@ -#-*-Makefile-*- vim:syntax=make - -PLATFORM = MoteISTx5 -MSP_MCU = msp430x5438 - -$(call TOSMake_include_platform,msp) - -MoteISTx5: $(BUILD_DEPS) - @: +#-*-Makefile-*- vim:syntax=make + +PLATFORM = MoteISTx5 +MSP_MCU = msp430x5438 + +$(call TOSMake_include_platform,msp) + +MoteISTx5: $(BUILD_DEPS) + @: diff --git a/tos/platforms/MoteISTx5/.platform b/tos/platforms/MoteISTx5/.platform index 14bdf3c1a5..f1391944a4 100755 --- a/tos/platforms/MoteISTx5/.platform +++ b/tos/platforms/MoteISTx5/.platform @@ -1,92 +1,92 @@ -# Includes that should take precedence come first. Platforms come before -# chips because they may override files. These must be specified as -# @includes instead of -I's to @opts, otherwise the %T won't be processed -# by ncc. - -for (split(/\n/, <<'EOText' - - %P/hardware/pins - %P/hardware/buttons - %P/hardware/leds - %P/hardware/usci - %P/hardware/adc - %P/hardware/clock - - %T/chips/msp430/x5xxx - %T/chips/msp430/x5xxx/lpm - %T/chips/msp430/x5xxx/timer - %T/chips/msp430/x5xxx/usci - %T/chips/msp430 - %T/chips/msp430/pins - %T/chips/msp430/timer - - %T/chips/msp430/pmm - %T/chips/msp430/adc12 - - %T/platforms/MoteISTx5/chips/cc2420 - %T/chips/cc2420 - %T/chips/cc2420/alarm - %T/chips/cc2420/control - %T/chips/cc2420/csma - %T/chips/cc2420/interfaces - %T/chips/cc2420/link - %T/chips/cc2420/lowpan - %T/chips/cc2420/lpl - %T/chips/cc2420/packet - %T/chips/cc2420/receive - %T/chips/cc2420/spi - %T/chips/cc2420/transmit - %T/chips/cc2420/unique - - %T/lib/timer - %T/lib/serial - %T/lib/power - - %T/lib/util/keyvaluerecord - %T/lib/serialprintf - -EOText -)) { - s/\#.*$//; - s/^\s*//g; - s/\s*$//g; - push(@includes, $_) if $_; -} - -@opts = qw( - -gcc=msp430-gcc - -mmcu=msp430x5438 - -fnesc-target=msp430 - -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask -); - - - -#push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; -#push @opts, "-mingw-gcc" if $cygwin; - -$ENV{'CIL_MACHINE'} = - "version_major=3 " . - "version_minor=2 " . - "version=msp430-3.2.3 " . - "short=2,2 " . - "int=2,2 " . - "long=4,2 " . - "long_long=8,2 " . - "pointer=2,2 " . - "enum=2,2 " . - "float=4,2 " . - "double=4,2 " . - "long_double=4,2 " . - "void=1,1 " . - "fun=1,2 " . - "wchar_size_size=2,2 " . - "alignof_string=1 " . - "max_alignment=1 " . - "char_wchar_signed=true,true " . - "const_string_literals=true " . - "big_endian=false " . - "underscore_name=false " . - "__builtin_va_list=true " . - "__thread_is_keyword=true"; - +# Includes that should take precedence come first. Platforms come before +# chips because they may override files. These must be specified as +# @includes instead of -I's to @opts, otherwise the %T won't be processed +# by ncc. + +for (split(/\n/, <<'EOText' + + %P/hardware/pins + %P/hardware/buttons + %P/hardware/leds + %P/hardware/usci + %P/hardware/adc + %P/hardware/clock + + %T/chips/msp430/x5xxx + %T/chips/msp430/x5xxx/lpm + %T/chips/msp430/x5xxx/timer + %T/chips/msp430/x5xxx/usci + %T/chips/msp430 + %T/chips/msp430/pins + %T/chips/msp430/timer + + %T/chips/msp430/pmm + %T/chips/msp430/adc12 + + %T/platforms/MoteISTx5/chips/cc2420 + %T/chips/cc2420 + %T/chips/cc2420/alarm + %T/chips/cc2420/control + %T/chips/cc2420/csma + %T/chips/cc2420/interfaces + %T/chips/cc2420/link + %T/chips/cc2420/lowpan + %T/chips/cc2420/lpl + %T/chips/cc2420/packet + %T/chips/cc2420/receive + %T/chips/cc2420/spi + %T/chips/cc2420/transmit + %T/chips/cc2420/unique + + %T/lib/timer + %T/lib/serial + %T/lib/power + + %T/lib/util/keyvaluerecord + %T/lib/serialprintf + +EOText +)) { + s/\#.*$//; + s/^\s*//g; + s/\s*$//g; + push(@includes, $_) if $_; +} + +@opts = qw( + -gcc=msp430-gcc + -mmcu=msp430x5438 + -fnesc-target=msp430 + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask +); + + + +#push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; +#push @opts, "-mingw-gcc" if $cygwin; + +$ENV{'CIL_MACHINE'} = + "version_major=3 " . + "version_minor=2 " . + "version=msp430-3.2.3 " . + "short=2,2 " . + "int=2,2 " . + "long=4,2 " . + "long_long=8,2 " . + "pointer=2,2 " . + "enum=2,2 " . + "float=4,2 " . + "double=4,2 " . + "long_double=4,2 " . + "void=1,1 " . + "fun=1,2 " . + "wchar_size_size=2,2 " . + "alignof_string=1 " . + "max_alignment=1 " . + "char_wchar_signed=true,true " . + "const_string_literals=true " . + "big_endian=false " . + "underscore_name=false " . + "__builtin_va_list=true " . + "__thread_is_keyword=true"; + From 793ceb1efc1295efe963b392a4971296c0fef536 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 27 Aug 2011 02:04:10 -0700 Subject: [PATCH 175/411] update MoteISTx5 .platform, switch to msp430f5438a --- support/make/MoteISTx5.target | 2 +- tos/platforms/MoteISTx5/.platform | 11 +++++++++-- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/support/make/MoteISTx5.target b/support/make/MoteISTx5.target index 57563d0016..2e58dabeac 100755 --- a/support/make/MoteISTx5.target +++ b/support/make/MoteISTx5.target @@ -1,7 +1,7 @@ #-*-Makefile-*- vim:syntax=make PLATFORM = MoteISTx5 -MSP_MCU = msp430x5438 +MSP_MCU = msp430f5438a $(call TOSMake_include_platform,msp) diff --git a/tos/platforms/MoteISTx5/.platform b/tos/platforms/MoteISTx5/.platform index f1391944a4..288d5501dc 100755 --- a/tos/platforms/MoteISTx5/.platform +++ b/tos/platforms/MoteISTx5/.platform @@ -20,9 +20,16 @@ for (split(/\n/, <<'EOText' %T/chips/msp430/pins %T/chips/msp430/timer + %T/chips/msp430/pmm/pmm-msp430 %T/chips/msp430/pmm %T/chips/msp430/adc12 + %T/chips/msp430/flash/settings + %T/chips/msp430/flash/driver + %T/chips/msp430/flash/constants + %T/chips/msp430/crc16 + %T/chips/msp430/wdt + %T/platforms/MoteISTx5/chips/cc2420 %T/chips/cc2420 %T/chips/cc2420/alarm @@ -43,7 +50,7 @@ for (split(/\n/, <<'EOText' %T/lib/power %T/lib/util/keyvaluerecord - %T/lib/serialprintf + %T/lib/printf EOText )) { @@ -55,7 +62,7 @@ EOText @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x5438 + -mmcu=msp430f5438a -fnesc-target=msp430 -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask ); From dbc6653d36a7caf9bbfdbb390e328b8df6e7ef48 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 31 Aug 2011 10:52:44 -0700 Subject: [PATCH 176/411] x5, usci: comment about setIctl being dangerous. The USCI ICTL register is the 16 bit concatenation of IE and IFG. Using this to manipulate the IE bits or IFG bits is dangerous because one has to protect against mutual exclusion because the h/w can be tweaking the IFG bits. --- tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc index a6ae8d22c6..4f32650887 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc @@ -250,7 +250,10 @@ interface HplMsp430Usci { * This register is present on all USCI modules. * * ICTL is the 16 bit concatenation of IE (interrupt enable) and IFG - * (interrupt flag). + * (interrupt flag). WARNING: Using this to set or clear interrupt + * enables and/or IFGs is not recommended. There are potential + * h/w race conditions. It is much better to use the byte accessors + * get/setIe, get/setIfg. */ async command uint16_t setIctl(uint16_t v); From 68d3d8625b6f4b096abdd49734f7bb82755ed7e3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 31 Aug 2011 11:13:51 -0700 Subject: [PATCH 177/411] x5, usci: use | instead of + for SWRST --- tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc index 03027d45d5..3dc476ce87 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc @@ -170,7 +170,7 @@ implementation { return; } call Usci.enterResetMode_(); - UCmxCTLW0 = config->ctlw0 + UCSWRST; + UCmxCTLW0 = config->ctlw0 | UCSWRST; /* use or rather than +, safer */ UCmxBRW = config->brw; UCmxMCTL = config->mctl; if (! leave_in_reset) { From 7ebdf8c4814fe1d8040caa83655c0b64fc01a5ff Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 16 Sep 2011 21:33:40 -0600 Subject: [PATCH 178/411] tinyprod-base: add various top level description files. new file: .gitignore new file: 00_Getting_Started deleted: 00_Repo_Notes new file: 00a_Contribution_Process new file: 01_Repo_Notes new file: 10_CopyrightTemplate renamed: 01_Merge_Notes -> 12_Merge_Notes --- .gitignore | 7 + 00_Getting_Started | 330 ++++++++++++++++++++++ 00_Repo_Notes | 73 ----- 00a_Contribution_Process | 466 +++++++++++++++++++++++++++++++ 01_Repo_Notes | 199 +++++++++++++ 10_CopyrightTemplate | 33 +++ 01_Merge_Notes => 12_Merge_Notes | 0 7 files changed, 1035 insertions(+), 73 deletions(-) create mode 100644 .gitignore create mode 100644 00_Getting_Started delete mode 100644 00_Repo_Notes create mode 100644 00a_Contribution_Process create mode 100644 01_Repo_Notes create mode 100644 10_CopyrightTemplate rename 01_Merge_Notes => 12_Merge_Notes (100%) diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000000..e14fcec05f --- /dev/null +++ b/.gitignore @@ -0,0 +1,7 @@ +*.[oa] +*~ +*.pyc +build +#*# +.#* +.gdb* diff --git a/00_Getting_Started b/00_Getting_Started new file mode 100644 index 0000000000..e390a723e4 --- /dev/null +++ b/00_Getting_Started @@ -0,0 +1,330 @@ + +Getting Started. + +Git is great. Git is good. Git is powerful. + +Alas, that makes it a little daunting getting started. This document should +help make it a little less painful. Git is powerful and hopefully you will +find it is worth the effort. + +This document is written assuming that you will be using github to contribute +to the TinyProd TinyOS repository structure. + + +Contents: + +- Why Git? +- GitHub +- Set up Git +- Set up your working repository +- Further Reading +- Guidelines + + +* Why Git? + +The main reason behind the selection of GIT is it's fully distributed nature, +fast branching, and associated merge magic. The TinyOS development community +is essentially world wide and we want to make encourage the rate of development +by making the contribution process very easy as well as accessable. + + o Fully distributed. + + o Everything is local. No need of a centralized server for anything. + (note our workflow does require integration repositories but this isn't + implicit in GIT), nor does it impact the contribution process. + + o Cheap local branching. This is important. We want to foster faster + development. Try something out while still staying in touch with what + is happening in the mainline. This is much more difficult with rTinyOS's + (research TinyOS) CVS contrib and SVN based repositories. + + Note, branching in GIT is fundamentally different than pretty much any + other SCM system and is responsbile for much of the productivity of projects + using GIT. + + o GITHUB. When coupled with github, git provides very powerful visibility tools + (what is being changed and by whom). Code review becomes very easy when + using GIT and github. + + o Git is Small + + o Git is Fast + + o Support for any workflow. Although we are using the Integration Manager + Workflow. This also promotes code review. + + o Allows gradual reintegration of currently active contrib source bodies. + Currently the contrib source body is maintained in CVS and is rather + cumbersome to use. Bringing active contrib code into the TinyProd + github realm would provide the same mechanism for accessing and using + active contrib code as the main TinyOS body. + + Using TinyProd hosted contrib code would be as simple as merging two + git branches or possibly two branches in different git repositories. + + o Other DVCS could also have been chosen (SVN is not a DVCS), such as Hg + or Bzr but I happened to be a fan of GIT. And it seems to be working + well for what we are trying to do. + + +* GitHub + +* We use github to host the repository. And they have very good help files + that will assist you in getting set up. + +* Go to github.com and get yourself a logon. Choose your login name + carefully. You can rename it once (but only once). + + Once you are logged in, You'll be presented a start up page which + includes things like "Set Up Git", "Create a Repository", "Fork a + Repository", etc. We will be using existing repositories. + + +* Set Up Git. + + This section details items that only need to be when first getting started. + For more information on using git and contributing to the project please + see 00a_Contribution_Process. + + o set up SSH keys. If you have an existing SSH key you can use it. + Existing keys can typically be found in ~/.ssh. The instructions have + you backup and remove and then regenerating a new ssh key. You don't + need to do that but can use your existing key if you wish. For + example: you could use ~/.ssh/id_rsa.pub as your key. + + o Set your username and email + + $ git config --global user.name "Firsname Lastname" + $ git config --global user.email "your_email@youremail.com" + + o Set your GitHub token. + + Follow the instructions on the github help page (Set Up Git). + + +* Other things to put into your git config. (global for the user, + which lives at ~/.gitconfig) + + o To avoid problems with DOS EOL sequences, we always store in the + repository using UNIX EOL sequences. Set autocrlf to input to + avoid these problems. + + $ git config --global core.autocrlf input + + o It is handy to set up local copies of remote branches automatically. + + $ git config --global branch.autosetupmerge true + + o And when pushing handy to push only the current branch (the most common + activity). + + $ git config --global push.default current + + o It is really handy to define various aliases for common commands. + + $ git config --global alias.b branch + $ git config --global alias.ci commit + + will define two aliases, b for branch and ci for commit. You can do + things like: + + $ git b # display current branch + $ git ci # same as git commit + + +An example ~/.gitconfig looks like: (Its mine with the github token +redacted)... + +[user] + name = Eric B. Decker + email = cire831@gmail.com +[core] + editor = emacsclient + autocrlf = input +[alias] + b = branch + br = branch + c = config + ci = commit + co = checkout + cp = cherry-pick + d = diff + lp = log -p + r = remote + rem= remote + st = status + s = status + wc = whatchanged +[branch] + autosetupmerge = true +[pack] + threads = 0 +[push] + default = current +[github] + user = cire831 + token = xxxxxxxxxx + + +* Set up your working repository + + See 00_Repo_Notes for the structure of the repositories and their + relationships. + + Also see 00a_Contribution_Process for examples of how to interacte with the + various branches and repositories. + + The main repo is https://github.com/tinyprod/prod with an integration repo + at https://github.com/tp-freeforall/prod. (The later is a fork off + tinyprod/prod). + + Contributors work in a local repo linked to a working github repo that is + forked from tp-freeforall/prod. This keeps a fair amount of independence + between different developers. + + Contributors work initially on a contributor branch in their local + repository. When a contributor is happy with the work they have done, + they will integrate their changes into a local copy of the integration + branch. This integration branch is pushed back to the contributor's + github fork and a request for a pull is made between the contributor's + branch and the main integration branch. + + Please refer to 00a_Contribution_Process for details on how to set up + your working repository. + + +* Further Reading + + o GitHub Help + (http://help.github.com) + + GitHub has lots of help. The TinyProd structure is a bit more + complicated than what is presented in the help files. So keep + that in mind when working through the examples. + + o Main Git Site, Documentation + (http://git-scm.com/documentation) + + o Git Reference + (http://gitref.org) + + o Git from the bottom up. + (http://ftp.newartisans.com/pub/git.from.bottom.up.pdf) + + Is an easy to understand description of how git works from the bottom up. + + o Pro Git is a book about git that is very good. + (http://progit.org) + + o Distributed Git + (http://progit.org/book/ch5-0.html) + + This chapter talks about using Git as part of a distributed workflow. It + gives a good foundation about how we are managing the TinyProd repository. + + In particular, please read Integration-Manger Workflow (its what we are + using). And we have added one more repository to the left of the + Blessed Repository which is VeryBlessed. :-) [VeryBlessed is the + gh:TinyProd/prod repository]. + + Also please read, Contributing to a Project. Some of what is written there + is also summarized in the Guidelines section below. + + +* Guidelines + +* Commit guidelines. + + o First and foremost make commits logical units. + + Logically seperate changesets. Don't code for weeks and then bring the + whole piece in as one commit. + + Make a commit something that can be looked at and digested reasonably. + Solves one problem. + + Keep the history clean and understandable. + + + o Use meaningful commit messages. + + the first line (50 chars or less) is used as the short message. This + message is displayed in one line logs and other places. Make it + meaningful and concise if possible. + + Follow the first line by a blank line then a more detailed message which + should provide more detailed information about what the commit does. The + GIT project itself requires motivation as well as contrasting the new + behaviour to old behaviour. Why was this change necessary? Its not a + bad habit to get into when it makes sense to do so. + + o Use the imperative present tense when writing commit messages. + + o Always include a blank line after the short message (the first line). + + o Always run git diff --check to make sure you aren't introducing trailing + whitespace. Some tools bitch about this and it is really annoying. + + +* Copyright. + + The main TinyOS code is copyrighted by individual authors using the 3 clause + Modified BSD license. The simplest thing to do is either use no copyright + or use the BSD license. + + We are trying to get any new code to use the same boilerplate license. The + intent is to minimize any extraneous noise when generating diffs. The + boilerplate is written so the only part that needs to be modified as new + authors are added is the actually Copyright (c) clause at + the front. + + A template for this copyright can be found in $(TOSROOT)/licenses/bsd.txt. + + +* coding style. These are suggestions. There isn't a style nazi. + + TinyProd is directly downstream from the academic TinyOS SVN trunk. As such + most of the coding style is adapted to be consistent with that repository. + Some changes have been made to keep the code as compact as possible. + + o Indent:2 + + if ( a == b) { + c = d; + } + + o Braces: same line (see above), closing brace by itself. + + o single provides/uses: same line, multiple blocked. + + module xyz { + provides interface NameInterface as NI; + uses interface AnotherInterface as AI; + } + + module abc { + provides { + interface NameInterface as NI; + interface AnotherInterface as AI; + } + uses { + interface Inter1; + interface Inter2; + } + implementation { + ... + } + + o if then else + + if ( a == b) + + else + + + if ( a == b) { + block statements + } else { + block statements + } diff --git a/00_Repo_Notes b/00_Repo_Notes deleted file mode 100644 index b7e5abfe2a..0000000000 --- a/00_Repo_Notes +++ /dev/null @@ -1,73 +0,0 @@ - -* Repo Structure - -The msp430.git repo is located at: - -git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git (r/w) -git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git (read-only) - -The msp430.git repo on hinrg belongs to group cire-git. Users needing -repo write access need to belong to the cire-git group. - -The msp430.git repo tracks the hinrg t2 git repo which in turn imports from the -main svn T2 trunk. - - -svn t2 mainline ---| - | hourly - | - v (git) ------------------- hinrg t2 ----------------------- - - master - | - | - - master_vhsb - | - | - ------ mm-z1 - | - | - --- mm-z1-next - | - | - --- mm-z1-pu - -master: is the main branch coming from the svn t2 mainline. Updated manually. - -master_vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main - trunk. This branch tracks master but has the superfluous Z1 commit - removed as it conflicts with the collapsed msp430 x2xxx work done in - mm_core. This collapsage forms the majority of the work of merging - the trees and there isn't much sense in reinventing the wheel. - -mm-z1: main consolidation branch for the mm-z1 integration. It represents the - current released version of the branch. - -mm-z1-next: As changes get accepted they get brought back into -next. When - all is good, next gets integrated into mm-z1. - -mm-z1-pu: proposed updates. After new code has been worked on for a bit and - is ready to be integrated with other code in the mm-z1 area, mm-z1-pu - is the place to put it. Some code from pu will go into next. When - enough stuff is ready to go in next, it is brought over to main - (mm-z1). - - -To pull a working branch based on the mm-z1-pu branch (a reasonable place to -fork a working branch), do the following: - - cd ~/mm # make sure at top level, we call it mm - git clone git://hinrg.cs.jhu.edu/git/cire/msp430.git # grab from ro place - cd msp430 - git config --add push.default matching # make sure only existing branches get pushed. - # only effects rw repos - git checkout -t origin/mm-z1-pu # start with proposed updates, tracking branch - git checkout -b work # local working branch - - -To start with a read-write copy of the repo replace the clone with: - - git clone ssh://hinrg.cs.jhu.edu/home/cire/msp430.git # grab from ro place - -You need to have a login on hinrg and belong to group cire-git. diff --git a/00a_Contribution_Process b/00a_Contribution_Process new file mode 100644 index 0000000000..d5de42cdb4 --- /dev/null +++ b/00a_Contribution_Process @@ -0,0 +1,466 @@ +00a_Contribution_Process + +This document describes and gives details for how to contribute to the TinyProd +repositories. + +1) Notation: + + * We reference a fictional developer throughout this document, Robert Hunter, + whose initials are rh. + + * Github has a notion of context and repositories are owned by that context. + Contexts maybe a github owner or maybe a github organization which can + associate owners and contributors and associate them to a repository. + + gh:/ is used to refer to a repository hosted on + github.com. + + local: refers to your local working repository. + + * Branch names are presented in parentheses. + ie: "gh:tp-freeforall/prod(msp430-int-pu)" is the msp430-int-pu branch + in the tp-freeforall/prod.git repository (on github.com). + "local(msp430-int-pu)" refers to the msp430-int-pu branch in your local + working repository. + + Note: local(msp430-int-pu) and gh:tp-freeforall/prod(msp430-int-pu) + are not necessarily the same git object. If the local repository has + diverged (or conversly if gh:tp-freeforall/prod has diverged) then these + objects will most certainly not be the same. + + * Remote branch names. + + Remote branches take the form "remotes//". A local + git repository can be configured to refer to remote git repositories using + the "git remote add" command. When data is fetched from that repository + the branches references will be prepended with the "remotes/" + prefix. + + Remote branches when unique may be referenced using any of the following + forms: + + remotes// full specification. + + / + + /prod developer fork of tp-freeforall. Used to host + published developer branches. Refered to as the + developer repo. + + local local developer repository. Located on the + development system. Where the actual work + gets done. Refered to as Developer Local or + just "local". + + pushes and pulls to gh:/prod + +3) Common Branch Names. + + There are several persistent branches in the tinyprod and tp-freeforall + repositories. Also persistent branches will be created for ongoing + integration efforts for various features or efforts. + +VeryBlessed (release) repository: (gh:tinyprod/prod) + + master: The main release line in TinyProd. Current stable point. + master-pu: proposed updates for next release, accepted and integrated. + master-next: 1st stage updates for next release. + + svn/upstream: tracks the upstream SVN T2 trunk. This is manually updated + to schedule potential impact on downstream development. + + master-next feeds master-pu which feeds master. When the next release + is done, master-pu becomes master and new master-pu and master-next + branches are started. + + +Blessed (integration) repository: (gh:tp-freeforall/prod) + + Typically branches from the TinyProd repository will be tracked in the + tp-freeforall/prod repository. In addition, feature integration and other + integration branches will exist to facilitate cooperation/convergence + between distributed developers. + + integration: If multiple features need to be merged into a single + whole this is where that happens. + + -int: main integration branch for a feature. ie. + gh:tp-freeforall/prod(msp430-int) is the + integration branch for the new msp430 core + being brought into tinyos. + + -int-next: ie. gh:tp-freeforall/prod(msp430-int-next) + Accepted changes updates for the feature. Will + get merged into -int. + + -int-pu: ie. gh:tp-freeforall/prod(msp430-int-pu) + proposed updates for the feature. + + Note that branches are only created if the complexity of the development + structure warrants the complexity. This is left up to the discretion + of the integration manager. + + +Local repository: + + The above branches will show up in the local repository based off remotes. + + Typically there will be an origin remote ("origin") for the developers + repo from github, and an upstream remote ("up") for the source repo that + the developer forked, (gh:tp-freeforall/prod). The upstream tracks + changes as they become integrated and allows the developer to track these + changes locally. + + For example, we might see the following (assuming the developer Robert + Hunter): + + bash(30): git remote -v show + origin git@github.com:roberthunter/prod.git + up git://github.com/tp-freeforall/prod.git + + remotes/up/master current branch values from the upstream + remotes/up/svn/upstream tp-freeforall/prod at the time of the last + remotes/up/msp430-int fetch. + remotes/up/msp430-int-pu + + remotes/origin/rh branch values from the developers published + remotes/origin/master repository at the time the repository was + remotes/origin/svn/upstream originally forked or if the branches are + remotes/origin/msp430-int updated by the developer. (not automatic). + remotes/origin/msp430-int-pu + + + Typically, the developer will only update origin branches for those + branches of immediate concern. Typically, the working branch (rh) and the + feature branch being integrated with. + + +4) Creating your published and working repositories and associated working branches. + + o Log in to your github account + + o Create a working fork. Working repos are forked off the integration + repository, gh:tp-freeforall/prod. See the url: + + https://github.com/tp-freeforall/prod + + This will bring up the main page for the tp-freeforall/prod repo. + + To create a working repo, click on the fork button. This will create a + fork of tp-freeforall/prod in your local context (your login context). + + This will create the repository github.com//prod + which is forked off github.com/tp-freeforall/prod. All working repos are + forked off the tp-freeforall/prod repo. This is to keep the amount of + extra data in the main repository down to a minimum. + + For our virtual user this will create the repository + gh:roberthunter/prod + + o Create your local repo. + + mkdir -p w/rh # create working directory + cd w/rh + git clone git@github.com:roberthunter/prod.git tinyos-2.x + cd tinyos-2.x + + # you will now have w/rh/tinyos-2.x populated with the default branch + # of the fork. Your fork will inherit the default branch from + # tp-freeforall/prod repo. Currently this is msp430-int-pu. But you + # will want to check to see where you are. + # + # this will create the remote origin linked to your working fork on github. + + # you will also want to track changes coming into tp-freeforall, so + # create a remote that will be used for tracking. And pull in information + # from the repository. + + git remote add up git://github.com/tp-freeforall/prod.git + git fetch up + + o Create your working branch. For Robert Hunter we use his initials + as the working branch name. This will be published as + gh:roberthunter/prod(rh) if this branch is pushed (published) + to Robert Hunter's Developer Repository (on github). + + git branch # make sure on the appropriate branch + # should show msp430-int-pu which is the + # current default branch. + git checkout -t up/msp430-int-pu # create a tracking branch. + git checkout -b rh # create the working branch off the + # current branch (msp430-int-pu) + + + + git add -u # add changed files that are tracked. + git commit # commit. editor will get invoked + # for the commit message. + + # please see Guidelines in 00_Getting_Started for a guide on how to write + # good commit messages. It really is important to write decent commit + # messages. + + # when you are ready to publish your changes, push the changes back to + # your working fork on github. + + git push origin rh + + +5) Workflow: (simulated github user: Robert Hunter) + + on github, fork github.com/tp-freeforall/prod (as Robert Hunter) + (this creates the developer repo on github, github.com/roberthunter/prod) + + The feature branch that Robert is working on is msp430 core integration. + The main branch is msp430-int and updates get brought in via msp430-int-pu, + (proposed updates). + + Robert's working branch (rh) starts off msp430-int-pu. + + When the initial local repository is created (via cloning) the remote + "origin" is created. In the example below this refers to git@github.com: + roberthunter/prod.git and is read/write (assuming Robert set up his github + account properly with his SSH key). + + We also want a remote for the upstream called "up", for upstream. In this + example the upstream is always the repository Robert forked from, + gh:tp-freeforall/prod. + + mkdir -p ~/w/rh + cd ~/w/rh + git clone git@github.com:roberthunter/prod.git tinyos-2.x + cd tinyos-2.x + git remote add up git://github.com/tp-freeforall/prod.git + git fetch up + git checkout -t up/msp430-int-pu # create a local tracking branch + git checkout -b rh # create the rh branch off msp430-int-pu + + # We are publishing the new values for the branches rh and msp430-int-pu + # in gh:roberthunter/prod. The values of these branches in the local + # repository are remotes/origin/rh and remotes/origin/msp430-int-pu. Not + # to be confused with remotes/up/msp430-int-pu which is the branch state + # as currently known locally from the upstream. + + git push origin rh + git push origin msp430-int-pu + + +Robert Hunter makes changes and commits his working branch (rh) to his local +repository. + +He may also publish his working branch to his developer repository +on github (gh:roberthunter/prod(rh)) to allow others to observe what +he is doing. + +He will also want to keep his working branch (rh) up to date with the +main branch he cares about, msp430-int-pu from the upstream. +(gh:tp-freeforall/prod(msp430-int-pu)). + +When he is happy with the state of his development, he brings his commits +into his local copy of the msp430-int-pu branch, (he first needs to make +sure that local(msp430-int-pu) is up to date wrt the upstream, +gh:tp-freeforall/prod(msp430-int-pu)). + +The new local version of the integration branch (local(msp430-int-pu)) should +be constructed to be the new upstream msp430-int-pu. This local copy gets +published to the developer's repository at github +(gh:roberthunter/prod(msp430-int-pu) and a pull request is generated. +The upstream (gh:tp-freeforall/prod(msp430-int-pu)) pulls the changes +yielding the new upstream. + + +Succinctly: + +* Making changes to the local working area and repository (local(rh)). + + mkdir -p ~/w/rh + cd ~/w/rh/tinyos-2.x # inside existing local repo + git checkout rh # branch off msp430-int-pu + + work work work, busy little bee + keep commits small and logical + use good commit messages. + + git add -u # add to index + git commit # check the changes in, msg in editor + + + +Another operation routinely done is updating working branches from the +integration master (ie. msp430-int-pu). + +For example, Robert wants to make sure that his changes are consistent with +what is happening on the tp-freeforall/prod(msp430-int-pu) branch. He +accomplishes this by the following commands: + + cd ~/w/rh/tinyos-2.x + git fetch up # get current information from + # tp-freeforall + + git checkout rh # make sure on rh branch + git merge up/msp430-int-pu # merge in the current + # proposed integration branch + # which is the feature Robert is + # working on. +* refreshing the local copy of msp430-int-pu + + git checkout msp430-int-pu # integration branch is msp430-int-pu + git fetch up # update from the upstream + git merge up/msp430-int-pu # make sure our local is up to date + + +* Update local branch with upstream changes. + + Integrate changes from up/msp430-int-pu into the working repository. One + mechanism assumes relatively simple changes so uses "git-rebase" to move + the working branch on to the new tip of msp430-int-pu. + + WARNING: This is only recommended here because the local(rh) branch is + intended to be private and not a published branch used by others to base + their work on. In other words, it is expressly assumed that others will + not be forking or basing their work on branch names (git objects) inherited + from a private developer repository. + + If people will be sharing state from your private developer repository don't + use rebase. Rather all of your repository branch manipulation should be + done using "git merge" rather than "git rebase". + + "git rebase" is suggested because it's result in some what cleaner and + easier to read histories. + + git checkout msp430-int-pu # refresh local copy + git fetch up + git merge up/msp430-int-pu + git checkout rh # switch back to working + git rebase msp430-int-pu + + # rh has now been rewritten to be on the new tip of msp430-int-pu as + # imported from the upstream. + + +* Move the current local(rh) branch to the tip of the updated msp430-int-pu + and publish the result. + + # the simplest method assumes that all of the most current changes on the + # rh branch are getting pulled over into msp430-int-pu. We first rebase + # the rh branch onto the tip of the msp430-int-pu to clean up the history + # and then simply fast forward msp430-int-pu + + # first make sure msp430-int-pu is current + + git checkout msp430-int-pu + git fetch up + git merge up/msp430-int-pu + + git checkout rh + git rebase msp430-int-pu # move rh to tip of map430-int-pu + git checkout msp430-int-pu + git merge rh # advance msp430-int-pu to include rh + # should be a fast-forward + + # if you have published rh at gh:roberthunter/prod(rh) then you will have + # to override the remote branch when you push. This is because the SHAs of + # rh change when you rebase. It is rewriting the history of the change set + # to be based off the current version of msp430-int-pu. + # + # If you don't publish your current working branch you don't need to do this + # because the branch rh doesn't exist or isn't being moved. + + git push origin +rh # only if you publish. + git push origin msp430-int-pu # publish the new version of msp430-int-pu + + +* Complicated move of particular commits from working branch to local int-pu + + # If the change set is complicated or if only pieces of the change set + # needs to be brought over, then cherry-pick should be used. + + git checkout msp430-int-pu + git fetch up + git merge up/msp430-int-pu + + # for each commit on rh that needs to be included in msp430-int-pu + git cherry-pick + + +* Looking at differences between working branch and integration branch + + # To see what changes you are bringing over use the following: + git log --oneline up/msp430-int-pu..msp430-int-pu + + # to see the changes you are bringing over + git diff up/msp430-int-pu msp430-int-pu + + +* Publishing. + +When the new msp430-int-pu is ready, push it back to your published fork on +github: ie. gh:roberthunter/prod(msp430-int-pu). + + git push origin msp430-int-pu + +Robert then requests a pull from his repositories main page. + + https://github.com/roberthunter/prod/pull/new/msp430-int-pu + +This requests a pull from gh:roberthunter/prod(msp430-int-pu) to +gh:tp-freeforall/prod(msp430-int-pu). + + +* Further Integration + +The integration master for msp430-int-pu reviews the changes and when approved +will pull the changes into gh:tp-freeforall/prod(msp430-int-pu). + +After the upstream merge is complete, developers using msp430-int-pu should +refresh their local copies of the upstream branch. + +After other changes from other developers comes in and msp430-int-pu has +sufficiently matured, msp430-int-pu is merged into tp-freeforall/prod(msp430-int). + +Testing of the integration branches happens on tp-freeforall/prod(feature-int). +Groups of features are combined on gh:tp-freeforall/prod(pu) [proposed updates], +which migrates to the next branch as the branch matures and the changes are accepted. + +When all integration branches have matured sufficiently, they are merged +together, tested, and becomes tinyprod/prod(master) as a new release. The +intent is to release features as they become available using a continuous +release process. + + +* Backmerging + +While various integration work is being done, working branches should be +refreshed with more current content from the integration repositories. This +is referred to as a backmerge. + +After a proposal has been accepted and integrated into the integration branch, +it is important to update the state of the local and working repos with the +new integration branch data. This will effectively move the working branches +onto the tip of the new integration branch (msp430-int-pu). + + cd ~/w/rh/tinyos-2.x + git fetch up # get current upstream data + git checkout msp430-int-pu # update local copy + git merge up/msp430-int-pu + git checkout rh # switch to working branch + git rebase msp430-int-pu # move to tip of integration + + or + + git merge msp430-int-pu # depending. diff --git a/01_Repo_Notes b/01_Repo_Notes new file mode 100644 index 0000000000..87b63e3fdd --- /dev/null +++ b/01_Repo_Notes @@ -0,0 +1,199 @@ + +============================================================================ + +TinyProd + tp-freeforall/prod + + +msp430-int: msp430 integration +msp430-int-pu: msp430 integration (proposed updates) + +msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. + +If in doubt, branch off from msp430-int-pu. + +============================================================================ + +Welcome to TinyProd + +* About TinyProd: + +TinyProd is a GIT based TinyOS repository that is immediately downstream from +the main SVN based TinyOS repository that is maintained by the academic TinyOS +community. + +TinyProd is intended to be a developer/production orientated repository. +Some of the features include: + + o organize git based TinyOS development. + o More vibrant, higher rate of change for the community. + o Encourage collaboration + o Optimize developer resources. (Streamline the development process). + Developer centric rather than academic centric. + o Peer driven code review, norm rather than the exception. + o real issue and bug tracking + o tracking changes to TinyProd managed pieces of the source tree + and linking to appropriate tracking documents. + o stable mainline. + o Continuous release cycle. + +The intent is to keep the structure as simple as possible while allowing +for reasonable levels of contribution. We want a forum where developers +can make their code easily accessible, mechanisms for real code review and +feedback, and a reasonable level of stability in the releases. + +The assumption is that developer resources are scarce and should be optimized +while still maintaining good development practices. + +If a developer takes the time to put a reasonable piece of code together, gets +it reviewed, then they should have a place where it can live and contribute +to the mainline. The critical resource for getting development done is the +developers time and effort. We should be making their life easier and +providing a mechanism for their code to become part of the whole. + +If you have something to contribute we will find a reasonable way to get it +published and easy to find as part of the TinyOS community. + + +* Msp430 Toolchain: + +The initial major feature of the TinyProd repository is the creation of a more +complete TI Msp430 core. This requires use of an updated TI msp430 toolchain. +The new toolchain is being worked on by Peter Bigot and is in active development +and needs to be verified. While this repository supports old TI processors (x1 +family) its primary focus is on the newer processors which requires the newer +toolchain. The intent is that all processors (original, x1 as well as the newer +x2 and x5 families) should be tested with the newer toolchain. + +The base msp430 toolchain (4.5.3 and later) is available for Ubuntu Oneric +(11.10). And an complete interium msp430 toolchain is available from +http://tinyprod.net/debian-dev. Just follow the instructions in the README. + +Some testing with the old 3.2.3 toolchain (original tinyos and z1 varient) has +also been done for basic functionality (ie. does it compile). The old tool +chain is available as *legacy* in the same tool repo mentioned above. + + +* Repo Structure + +github.com/tinyprod/prod: main TinyProd repo. + The VeryBlessed repo. Holds the stable mainline (master). Releases + come off this repo and the master branch. + +github.com/tp-freeforall/prod: working fork. + Blessed repo. Holds consolidated integration branches and + proposed updates. + +github.com//prod: user's tinyprod working fork. + branched off tp-freeforall/prod. working branches + should be branched off the tp-freeforall/prod(branch) + that the user is working on. (ie. msp430-int-pu) + +The general form for a repository/branch is: /(branch) +ie. gh:tp-freeforall/prod(msp430-int-pu) is the msp430-int-pu branch in the +tp-freeforall/prod repository. + +Local repositories are referenced using local(branch). local(remote/branch). + + +Also see 00_Getting_Started and 00a_Contribution_Process for more details on +getting started and using git to contribute. + + + +main persistent branches: + +svn/upstream: svn tinyos tracking branch. +svn/upstream-next: the upstream of the repo is being moved. This is the new +proposed upstream position. + +master: the main tinyprod release line. +next: integration branch for next release on master. +pu: integration branch for proposed updates. + +-int: integration branch for feature +-int-pu: proposed update. +-int-next: accepted updates. + +(some of these branches may be skipped depending on need). + + + + +Other current branches: + +msp430-int: msp430 integration (msp430 core, x1, x2, x5) feature branch + +msp430-int-pu: proposed updates to msp430-int (no msp430-int-next). + +swreset: potential msp430 swreset implementation. + +motenet-rel: replacement for the serialforwarder. Adds AF_AM sockets and + a socket interface to the serial stack. + +tinyprod-base: base changes forming the base of the tinyprod repo. Minimal +changes from the tinyos trunk. (originally vhsb removed the msp430X commit +but this has now been reconciled). + +(note: tinyprod's master branch will eventually consist of a merge between +msp430-int, svn-vhsb, swreset, and motenet-rel). + + + +user branches are working branches in user working forks. ie. + + local(msp430-int-pu) refers to the msp430-int-pu branch in a + user's local working repository. + + gh:roberthunter/prod(rh) refers to the branch rh (a developer branch) + in the developer repository at github. + + + +svn t2 mainline ---| + | hourly + | + v (git) +------------------ hinrg t2 ----------------------- + | | | + | | | + prod svn/upstream --------------------------------- + | | + | | + - tinyprod-base -------\ + \ + swreset ------------------ master + / + motenet-rel ---------/ + + + + tinyprod-base ------------------- + | | | + --------------------------msp430-int ---------------- + | | | + ---- msp430-int-pu ------------------ + + +* Branches: + +svn/upstream: is the main branch coming from the svn t2 mainline. Updated manually. +svn/upstream-next: proposed next version of an upstream snapshot. + +tinyprod-base: Minimal base changes for the tinyprod repository. Current + t2 trunk includes the revised Z1 commits which kills the need for + the vhsb (remove extraneous Z1 msp430X commits). Tinyprod-base + is the replacement. + +msp430-int: main integration branch for the msp430 core. It represents the + current released version of the branch. + + includes all three major families (x1, x2, and x5). Major cpu dependancies + held in tos/chips/msp430/{x1xxx,x2xxx,x5xxx} + +msp430-int-pu: new proposed changes to msp430-int are first integrated here. + When verified these get merged into msp430-int. + + + +Please see 00a_Contribution_Process for typical workflows. diff --git a/10_CopyrightTemplate b/10_CopyrightTemplate new file mode 100644 index 0000000000..b445f398b7 --- /dev/null +++ b/10_CopyrightTemplate @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2011 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ diff --git a/01_Merge_Notes b/12_Merge_Notes similarity index 100% rename from 01_Merge_Notes rename to 12_Merge_Notes From f3d4112951f3cb3dc13ef95c1b36847e82724887 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 21 Sep 2011 15:45:48 -0700 Subject: [PATCH 179/411] update status in 01_Repo_Notes, various -next branches --- 01_Repo_Notes | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/01_Repo_Notes b/01_Repo_Notes index 87b63e3fdd..341ec93b4a 100644 --- a/01_Repo_Notes +++ b/01_Repo_Notes @@ -12,6 +12,24 @@ msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. If in doubt, branch off from msp430-int-pu. +Status: 2011-09-21 + +msp430-int-pu merged into msp430-int, includes base x5 (prior to tinyprod-base) +tinyprod-base: new branch replaces vhsb (nuke old z1 code) + tinyprod-base now based on the tinyos-main trunk (2011-09-21) mainline. +msp430-int-next, vhsb nuked, based on tinyprod-base +msp430-int-pu-next, new int-pu based on tinyprod-base. + +msp430-int <- msp430-int-pu +msp430-int-pu temporarily reserved (to give folks time to adapt). + +upstream-next: new upstream +tinyprod-base: based off upstream-next. +msp430-int-next: off tinyprod-base +msp430-int-pu-next: off msp430-int-next (at this point should be pristine). +msp430-int-svn: continues along. (commits that should come into the + tinyos-main mainline) + ============================================================================ Welcome to TinyProd @@ -66,12 +84,12 @@ toolchain. The intent is that all processors (original, x1 as well as the newe x2 and x5 families) should be tested with the newer toolchain. The base msp430 toolchain (4.5.3 and later) is available for Ubuntu Oneric -(11.10). And an complete interium msp430 toolchain is available from +(11.10). And a complete interium msp430 toolchain is available from http://tinyprod.net/debian-dev. Just follow the instructions in the README. Some testing with the old 3.2.3 toolchain (original tinyos and z1 varient) has also been done for basic functionality (ie. does it compile). The old tool -chain is available as *legacy* in the same tool repo mentioned above. +chain (3.2.3, tinyos) is available as *legacy* in the same tool repo mentioned above. * Repo Structure From f4407f25ded5a962bd0ed34c950b49f29a88a4a3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 21 Sep 2011 17:12:58 -0700 Subject: [PATCH 180/411] update Repo Notes (nuking vhsb, adding tinyprod-base) msp430-int-pu merged into msp430-int, includes base x5 (prior to tinyprod-base) tinyprod-base: new branch replaces vhsb (nuke old z1 code) tinyprod-base now based on the tinyos-main trunk (2011-09-21) mainline. msp430-int-next, vhsb nuked, based on tinyprod-base msp430-int-pu-next, new int-pu based on tinyprod-base. msp430-int <- msp430-int-pu msp430-int-pu temporarily reserved (to give folks time to adapt). upstream-next: new upstream tinyprod-base: based off upstream-next. msp430-int-next: off tinyprod-base msp430-int-pu-next: off msp430-int-next (at this point should be pristine). msp430-int-svn: continues along. (commits that should come into the tinyos-main mainline) --- 01_Repo_Notes | 67 +++++++++++++++++++++++++++++++++------------------ 1 file changed, 44 insertions(+), 23 deletions(-) diff --git a/01_Repo_Notes b/01_Repo_Notes index 08f33e5b31..341ec93b4a 100644 --- a/01_Repo_Notes +++ b/01_Repo_Notes @@ -4,6 +4,7 @@ TinyProd tp-freeforall/prod + msp430-int: msp430 integration msp430-int-pu: msp430 integration (proposed updates) @@ -11,6 +12,24 @@ msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. If in doubt, branch off from msp430-int-pu. +Status: 2011-09-21 + +msp430-int-pu merged into msp430-int, includes base x5 (prior to tinyprod-base) +tinyprod-base: new branch replaces vhsb (nuke old z1 code) + tinyprod-base now based on the tinyos-main trunk (2011-09-21) mainline. +msp430-int-next, vhsb nuked, based on tinyprod-base +msp430-int-pu-next, new int-pu based on tinyprod-base. + +msp430-int <- msp430-int-pu +msp430-int-pu temporarily reserved (to give folks time to adapt). + +upstream-next: new upstream +tinyprod-base: based off upstream-next. +msp430-int-next: off tinyprod-base +msp430-int-pu-next: off msp430-int-next (at this point should be pristine). +msp430-int-svn: continues along. (commits that should come into the + tinyos-main mainline) + ============================================================================ Welcome to TinyProd @@ -21,8 +40,8 @@ TinyProd is a GIT based TinyOS repository that is immediately downstream from the main SVN based TinyOS repository that is maintained by the academic TinyOS community. -TinyProd is intended to be a more vibrant, developer/production orientated -repository. Some of the features include: +TinyProd is intended to be a developer/production orientated repository. +Some of the features include: o organize git based TinyOS development. o More vibrant, higher rate of change for the community. @@ -64,15 +83,13 @@ family) its primary focus is on the newer processors which requires the newer toolchain. The intent is that all processors (original, x1 as well as the newer x2 and x5 families) should be tested with the newer toolchain. -An interium tarball of an installed toolchain can be found at -http://tinyprod.net/downloads/msp430-20110716.tgz. It should be installed in root (/). -Additional packages (libmpc-dev libmpc2) need to be installed as they are needed by -the toolchain to function correctly. - -Debian packages are being built for Ubuntu Oneiric (11.10). +The base msp430 toolchain (4.5.3 and later) is available for Ubuntu Oneric +(11.10). And a complete interium msp430 toolchain is available from +http://tinyprod.net/debian-dev. Just follow the instructions in the README. Some testing with the old 3.2.3 toolchain (original tinyos and z1 varient) has -also been done for basic functionality (ie. does it compile). +also been done for basic functionality (ie. does it compile). The old tool +chain (3.2.3, tinyos) is available as *legacy* in the same tool repo mentioned above. * Repo Structure @@ -88,10 +105,10 @@ github.com/tp-freeforall/prod: working fork. github.com//prod: user's tinyprod working fork. branched off tp-freeforall/prod. working branches should be branched off the tp-freeforall/prod(branch) - that the user is working on. + that the user is working on. (ie. msp430-int-pu) The general form for a repository/branch is: /(branch) -ie. tp-freeforall/prod(msp430-int-pu) is the msp430-int-pu branch in the +ie. gh:tp-freeforall/prod(msp430-int-pu) is the msp430-int-pu branch in the tp-freeforall/prod repository. Local repositories are referenced using local(branch). local(remote/branch). @@ -105,6 +122,8 @@ getting started and using git to contribute. main persistent branches: svn/upstream: svn tinyos tracking branch. +svn/upstream-next: the upstream of the repo is being moved. This is the new +proposed upstream position. master: the main tinyprod release line. next: integration branch for next release on master. @@ -130,7 +149,9 @@ swreset: potential msp430 swreset implementation. motenet-rel: replacement for the serialforwarder. Adds AF_AM sockets and a socket interface to the serial stack. -svn-vhsb: remove bad z1 commit from svn trunk +tinyprod-base: base changes forming the base of the tinyprod repo. Minimal +changes from the tinyos trunk. (originally vhsb removed the msp430X commit +but this has now been reconciled). (note: tinyprod's master branch will eventually consist of a merge between msp430-int, svn-vhsb, swreset, and motenet-rel). @@ -139,11 +160,11 @@ msp430-int, svn-vhsb, swreset, and motenet-rel). user branches are working branches in user working forks. ie. - local(msp430-int-pu) refers to the msp430-int-pu branch in the - local working repository. + local(msp430-int-pu) refers to the msp430-int-pu branch in a + user's local working repository. - github:roberthunter/prod(rh) refers to the branch rh (a developer branch) - in the developer repository at github. + gh:roberthunter/prod(rh) refers to the branch rh (a developer branch) + in the developer repository at github. @@ -157,7 +178,7 @@ svn t2 mainline ---| prod svn/upstream --------------------------------- | | | | - - svn-vhsb ------------\ + - tinyprod-base -------\ \ swreset ------------------ master / @@ -165,7 +186,7 @@ svn t2 mainline ---| - svn-vhsb --------------------- + tinyprod-base ------------------- | | | --------------------------msp430-int ---------------- | | | @@ -175,12 +196,12 @@ svn t2 mainline ---| * Branches: svn/upstream: is the main branch coming from the svn t2 mainline. Updated manually. +svn/upstream-next: proposed next version of an upstream snapshot. -svn-vhsb: (vogon hyper-spatial bypass) Bypass the Z1 commits on the main - trunk. This branch tracks master but has the superfluous Z1 commit - removed as it conflicts with the collapsed msp430 x2xxx work done in - mm_core. This collapsage forms the majority of the work of merging - the trees and there isn't much sense in reinventing the wheel. +tinyprod-base: Minimal base changes for the tinyprod repository. Current + t2 trunk includes the revised Z1 commits which kills the need for + the vhsb (remove extraneous Z1 msp430X commits). Tinyprod-base + is the replacement. msp430-int: main integration branch for the msp430 core. It represents the current released version of the branch. From 487f496630184332be635fc8992482e618d3e9cc Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 22 Sep 2011 00:12:55 -0700 Subject: [PATCH 181/411] msp430: move unified dma driver to dma_unified. Better to keep the new driver seperate. Easier to integrate and transition. Make room for the old dma driver, old dma driver brought back in with next commit. --- tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaC.nc | 0 tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaChannel.nc | 0 tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaChannelP.nc | 0 tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaControl.nc | 0 tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaControlP.nc | 0 tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaInterrupt.nc | 0 tos/chips/msp430/{dma => dma_unified}/Msp430Dma.h | 0 tos/chips/msp430/{dma => dma_unified}/Msp430DmaC.nc | 0 tos/chips/msp430/{dma => dma_unified}/Msp430DmaChannel.nc | 0 tos/chips/msp430/{dma => dma_unified}/Msp430DmaChannelP.nc | 0 tos/chips/msp430/{dma => dma_unified}/Msp430DmaControl.nc | 0 tos/chips/msp430/{dma => dma_unified}/Msp430DmaControlP.nc | 0 tos/chips/msp430/{dma => dma_unified}/tests/DmaC.nc | 0 tos/chips/msp430/{dma => dma_unified}/tests/DmaP.nc | 0 tos/chips/msp430/{dma => dma_unified}/tests/Makefile | 0 tos/chips/msp430/{dma => dma_unified}/tests/README.txt | 0 16 files changed, 0 insertions(+), 0 deletions(-) rename tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaC.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaChannel.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaChannelP.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaControl.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaControlP.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/HplMsp430DmaInterrupt.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/Msp430Dma.h (100%) rename tos/chips/msp430/{dma => dma_unified}/Msp430DmaC.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/Msp430DmaChannel.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/Msp430DmaChannelP.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/Msp430DmaControl.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/Msp430DmaControlP.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/tests/DmaC.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/tests/DmaP.nc (100%) rename tos/chips/msp430/{dma => dma_unified}/tests/Makefile (100%) rename tos/chips/msp430/{dma => dma_unified}/tests/README.txt (100%) diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma_unified/HplMsp430DmaC.nc similarity index 100% rename from tos/chips/msp430/dma/HplMsp430DmaC.nc rename to tos/chips/msp430/dma_unified/HplMsp430DmaC.nc diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma_unified/HplMsp430DmaChannel.nc similarity index 100% rename from tos/chips/msp430/dma/HplMsp430DmaChannel.nc rename to tos/chips/msp430/dma_unified/HplMsp430DmaChannel.nc diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc b/tos/chips/msp430/dma_unified/HplMsp430DmaChannelP.nc similarity index 100% rename from tos/chips/msp430/dma/HplMsp430DmaChannelP.nc rename to tos/chips/msp430/dma_unified/HplMsp430DmaChannelP.nc diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma_unified/HplMsp430DmaControl.nc similarity index 100% rename from tos/chips/msp430/dma/HplMsp430DmaControl.nc rename to tos/chips/msp430/dma_unified/HplMsp430DmaControl.nc diff --git a/tos/chips/msp430/dma/HplMsp430DmaControlP.nc b/tos/chips/msp430/dma_unified/HplMsp430DmaControlP.nc similarity index 100% rename from tos/chips/msp430/dma/HplMsp430DmaControlP.nc rename to tos/chips/msp430/dma_unified/HplMsp430DmaControlP.nc diff --git a/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc b/tos/chips/msp430/dma_unified/HplMsp430DmaInterrupt.nc similarity index 100% rename from tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc rename to tos/chips/msp430/dma_unified/HplMsp430DmaInterrupt.nc diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma_unified/Msp430Dma.h similarity index 100% rename from tos/chips/msp430/dma/Msp430Dma.h rename to tos/chips/msp430/dma_unified/Msp430Dma.h diff --git a/tos/chips/msp430/dma/Msp430DmaC.nc b/tos/chips/msp430/dma_unified/Msp430DmaC.nc similarity index 100% rename from tos/chips/msp430/dma/Msp430DmaC.nc rename to tos/chips/msp430/dma_unified/Msp430DmaC.nc diff --git a/tos/chips/msp430/dma/Msp430DmaChannel.nc b/tos/chips/msp430/dma_unified/Msp430DmaChannel.nc similarity index 100% rename from tos/chips/msp430/dma/Msp430DmaChannel.nc rename to tos/chips/msp430/dma_unified/Msp430DmaChannel.nc diff --git a/tos/chips/msp430/dma/Msp430DmaChannelP.nc b/tos/chips/msp430/dma_unified/Msp430DmaChannelP.nc similarity index 100% rename from tos/chips/msp430/dma/Msp430DmaChannelP.nc rename to tos/chips/msp430/dma_unified/Msp430DmaChannelP.nc diff --git a/tos/chips/msp430/dma/Msp430DmaControl.nc b/tos/chips/msp430/dma_unified/Msp430DmaControl.nc similarity index 100% rename from tos/chips/msp430/dma/Msp430DmaControl.nc rename to tos/chips/msp430/dma_unified/Msp430DmaControl.nc diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma_unified/Msp430DmaControlP.nc similarity index 100% rename from tos/chips/msp430/dma/Msp430DmaControlP.nc rename to tos/chips/msp430/dma_unified/Msp430DmaControlP.nc diff --git a/tos/chips/msp430/dma/tests/DmaC.nc b/tos/chips/msp430/dma_unified/tests/DmaC.nc similarity index 100% rename from tos/chips/msp430/dma/tests/DmaC.nc rename to tos/chips/msp430/dma_unified/tests/DmaC.nc diff --git a/tos/chips/msp430/dma/tests/DmaP.nc b/tos/chips/msp430/dma_unified/tests/DmaP.nc similarity index 100% rename from tos/chips/msp430/dma/tests/DmaP.nc rename to tos/chips/msp430/dma_unified/tests/DmaP.nc diff --git a/tos/chips/msp430/dma/tests/Makefile b/tos/chips/msp430/dma_unified/tests/Makefile similarity index 100% rename from tos/chips/msp430/dma/tests/Makefile rename to tos/chips/msp430/dma_unified/tests/Makefile diff --git a/tos/chips/msp430/dma/tests/README.txt b/tos/chips/msp430/dma_unified/tests/README.txt similarity index 100% rename from tos/chips/msp430/dma/tests/README.txt rename to tos/chips/msp430/dma_unified/tests/README.txt From c097cc32403f0807eb539126e2b6229b8da46d35 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 22 Sep 2011 00:19:03 -0700 Subject: [PATCH 182/411] bring old dma driver back in. unfortunately this loses the history. But redoing all the dma stuff is a pain. So screw it. History of the old dma driver can be found looking at tos/chips/msp430/dma and tos/chips/msp430/dma_unified. --- tos/chips/msp430/dma/HplMsp430DmaC.nc | 70 +++++ tos/chips/msp430/dma/HplMsp430DmaChannel.nc | 86 ++++++ tos/chips/msp430/dma/HplMsp430DmaControl.nc | 51 ++++ tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc | 40 +++ tos/chips/msp430/dma/HplMsp430DmaP.nc | 106 +++++++ tos/chips/msp430/dma/HplMsp430DmaXP.nc | 264 ++++++++++++++++++ tos/chips/msp430/dma/Msp430Dma.h | 192 +++++++++++++ tos/chips/msp430/dma/Msp430DmaC.nc | 77 +++++ tos/chips/msp430/dma/Msp430DmaChannel.nc | 109 ++++++++ tos/chips/msp430/dma/Msp430DmaChannelP.nc | 129 +++++++++ tos/chips/msp430/dma/Msp430DmaControl.nc | 44 +++ tos/chips/msp430/dma/Msp430DmaControlP.nc | 80 ++++++ 12 files changed, 1248 insertions(+) create mode 100644 tos/chips/msp430/dma/HplMsp430DmaC.nc create mode 100644 tos/chips/msp430/dma/HplMsp430DmaChannel.nc create mode 100644 tos/chips/msp430/dma/HplMsp430DmaControl.nc create mode 100644 tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc create mode 100644 tos/chips/msp430/dma/HplMsp430DmaP.nc create mode 100644 tos/chips/msp430/dma/HplMsp430DmaXP.nc create mode 100644 tos/chips/msp430/dma/Msp430Dma.h create mode 100644 tos/chips/msp430/dma/Msp430DmaC.nc create mode 100644 tos/chips/msp430/dma/Msp430DmaChannel.nc create mode 100644 tos/chips/msp430/dma/Msp430DmaChannelP.nc create mode 100644 tos/chips/msp430/dma/Msp430DmaControl.nc create mode 100644 tos/chips/msp430/dma/Msp430DmaControlP.nc diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc new file mode 100644 index 0000000000..3f76a64a18 --- /dev/null +++ b/tos/chips/msp430/dma/HplMsp430DmaC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Ben Greenstein + * @author Jonathan Hui + * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ + */ + +configuration HplMsp430DmaC { + + provides interface HplMsp430DmaControl as Control; + provides interface HplMsp430DmaChannel as Channel0; + provides interface HplMsp430DmaChannel as Channel1; + provides interface HplMsp430DmaChannel as Channel2; + +} + +implementation { + + components HplMsp430DmaP; + components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_, + DMA0SZ_, DMA0TSEL_MASK, + DMA0TSEL_SHIFT ) as Dma0; + components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_, + DMA1SZ_, DMA1TSEL_MASK, + DMA1TSEL_SHIFT ) as Dma1; + components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_, + DMA2SZ_, DMA2TSEL_MASK, + DMA2TSEL_SHIFT ) as Dma2; + + Control = HplMsp430DmaP; + Channel0 = Dma0; + Channel1 = Dma1; + Channel2 = Dma2; + Dma0.Interrupt -> HplMsp430DmaP; + Dma1.Interrupt -> HplMsp430DmaP; + Dma2.Interrupt -> HplMsp430DmaP; + +} + diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc new file mode 100644 index 0000000000..d5ef3bd047 --- /dev/null +++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Ben Greenstein + * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + */ + +interface HplMsp430DmaChannel { + async command error_t setTrigger(dma_trigger_t trigger); + async command void clearTrigger(); + async command void setSingleMode(); + async command void setBlockMode(); + async command void setBurstMode(); + async command void setRepeatedSingleMode(); + async command void setRepeatedBlockMode(); + async command void setRepeatedBurstMode(); + async command void setSrcNoIncrement(); + async command void setSrcDecrement(); + async command void setSrcIncrement(); + async command void setDstNoIncrement(); + async command void setDstDecrement(); + async command void setDstIncrement(); + async command void setWordToWord(); + async command void setByteToWord(); + async command void setWordToByte(); + async command void setByteToByte(); + async command void setEdgeSensitive(); + async command void setLevelSensitive(); + + async command void enableDMA(); + async command void disableDMA(); + + async command void enableInterrupt() ; + async command void disableInterrupt() ; + + async command bool interruptPending(); + + async command bool aborted(); + async command void triggerDMA(); + + async command void setSrc(void *saddr); + async command void setDst(void *daddr); + async command void setSize(uint16_t sz); + + async command void setState(dma_channel_state_t s, dma_channel_trigger_t t, void* src, void* dest, uint16_t size); + async command void setStateRaw(uint16_t state, uint16_t trigger, void* src, void* dest, uint16_t size); + async command dma_channel_state_t getState(); + async command void* getSource(); + async command void* getDestination(); + async command uint16_t getSize(); + async command dma_channel_trigger_t getTrigger(); + + async command void reset(); + + async event void transferDone(error_t success); +} diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc new file mode 100644 index 0000000000..febe987701 --- /dev/null +++ b/tos/chips/msp430/dma/HplMsp430DmaControl.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Ben Greenstein + * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + */ + +#include "Msp430Dma.h" + +interface HplMsp430DmaControl { + + async command void setOnFetch(); + async command void clearOnFetch(); + async command void setRoundRobin(); + async command void clearRoundRobin(); + async command void setENNMI(); + async command void clearENNMI(); + async command void setState(dma_state_t s); + async command dma_state_t getState(); + async command void reset(); +} diff --git a/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc new file mode 100644 index 0000000000..869f2fc498 --- /dev/null +++ b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Ben Greenstein + * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + */ + +interface HplMsp430DmaInterrupt { + async event void fired(); +} diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaP.nc new file mode 100644 index 0000000000..592ab964f5 --- /dev/null +++ b/tos/chips/msp430/dma/HplMsp430DmaP.nc @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Ben Greenstein + * @author Jonathan Hui + * @author Joe Polastre + * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $ + */ + +module HplMsp430DmaP { + + provides interface HplMsp430DmaControl as DmaControl; + provides interface HplMsp430DmaInterrupt as Interrupt; + +} + +implementation { + + MSP430REG_NORACE( DMACTL0 ); + MSP430REG_NORACE( DMACTL1 ); + + // X1 family share the same interrupt vector with DAC, X2 family has its own + + #if defined(DACDMA_VECTOR) + #define XX_DMA_VECTOR_XX DACDMA_VECTOR + #elif defined(DMA_VECTOR) + #define XX_DMA_VECTOR_XX DMA_VECTOR + #else + #error "DMA VECTOR not defined for cpu selected" + #endif + + TOSH_SIGNAL( XX_DMA_VECTOR_XX ) { + signal Interrupt.fired(); + } + + async command void DmaControl.setOnFetch(){ + DMACTL1 |= DMAONFETCH; + } + + async command void DmaControl.clearOnFetch(){ + DMACTL1 &= ~DMAONFETCH; + } + + async command void DmaControl.setRoundRobin(){ + DMACTL1 |= ROUNDROBIN; + } + async command void DmaControl.clearRoundRobin(){ + DMACTL1 &= ~ROUNDROBIN; + } + + async command void DmaControl.setENNMI(){ + DMACTL1 |= ENNMI; + } + + async command void DmaControl.clearENNMI(){ + DMACTL1 &= ~ENNMI; + } + + async command void DmaControl.setState(dma_state_t s){ + DMACTL1 = *(int*)&s; + } + + async command dma_state_t DmaControl.getState(){ + dma_state_t s; + s = *(dma_state_t*)&DMACTL1; + return s; + } + + async command void DmaControl.reset(){ + DMACTL0 = 0; + DMACTL1 = 0; + } + +} + diff --git a/tos/chips/msp430/dma/HplMsp430DmaXP.nc b/tos/chips/msp430/dma/HplMsp430DmaXP.nc new file mode 100644 index 0000000000..9d1ab6583e --- /dev/null +++ b/tos/chips/msp430/dma/HplMsp430DmaXP.nc @@ -0,0 +1,264 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Ben Greenstein + * @author Jonathan Hui + * @author Joe Polastre + * @author Mark Hays + * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ + */ + +generic module HplMsp430DmaXP( uint16_t DMAxCTL_addr, + uint16_t DMAxSA_addr, + uint16_t DMAxDA_addr, + uint16_t DMAxSZ_addr, + uint16_t DMAxTSEL_mask, + uint16_t DMAxTSEL_shift ) @safe() { + + provides interface HplMsp430DmaChannel as DMA; + uses interface HplMsp430DmaInterrupt as Interrupt; + +} + +implementation { + + MSP430REG_NORACE( DMACTL0 ); + +#define DMAxCTL (*(volatile TYPE_DMA0CTL*)DMAxCTL_addr) +#define DMAxSA (*(volatile TYPE_DMA0SA*)DMAxSA_addr) +#define DMAxDA (*(volatile TYPE_DMA0DA*)DMAxDA_addr) +#define DMAxSZ (*(volatile TYPE_DMA0SZ*)DMAxSZ_addr) + + async event void Interrupt.fired() { + error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS; + if ( DMAxCTL & DMAIFG ) { + DMAxCTL &= ~DMAIFG; + DMAxCTL &= ~DMAABORT; + signal DMA.transferDone( error ); + } + } + + async error_t command DMA.setTrigger( dma_trigger_t trigger ) { + + if ( DMAxCTL & DMAEN ) + return FAIL; + + DMACTL0 = ( ( DMACTL0 & ~DMAxTSEL_mask ) | + ( ( trigger << DMAxTSEL_shift ) & DMAxTSEL_mask ) ); + + return SUCCESS; + + } + + async command void DMA.clearTrigger() { + DMACTL0 &= ~DMAxTSEL_mask; + } + + async command void DMA.setSingleMode() { + DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); + DMAxCTL |= DMA_SINGLE_TRANSFER; + } + + async command void DMA.setBlockMode() { + DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); + DMAxCTL |= DMA_BLOCK_TRANSFER; + } + + async command void DMA.setBurstMode() { + DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); + DMAxCTL |= DMA_BURST_BLOCK_TRANSFER; + } + + async command void DMA.setRepeatedSingleMode() { + DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); + DMAxCTL |= DMA_REPEATED_SINGLE_TRANSFER; + } + + async command void DMA.setRepeatedBlockMode() { + DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); + DMAxCTL |= DMA_REPEATED_BLOCK_TRANSFER; + } + + async command void DMA.setRepeatedBurstMode() { + DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); + DMAxCTL |= DMA_REPEATED_BURST_BLOCK_TRANSFER; + } + + async command void DMA.setSrcNoIncrement() { + DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); + DMAxCTL |= DMA_ADDRESS_UNCHANGED; + } + + async command void DMA.setSrcDecrement() { + DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); + DMAxCTL |= DMA_ADDRESS_DECREMENTED; + } + + async command void DMA.setSrcIncrement() { + DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); + DMAxCTL |= DMA_ADDRESS_INCREMENTED; + } + + async command void DMA.setDstNoIncrement() { + DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); + DMAxCTL |= DMA_ADDRESS_UNCHANGED; + } + + async command void DMA.setDstDecrement() { + DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); + DMAxCTL |= DMA_ADDRESS_DECREMENTED; + } + + async command void DMA.setDstIncrement() { + DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); + DMAxCTL |= DMA_ADDRESS_INCREMENTED; + } + + async command void DMA.setWordToWord() { + DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); + DMAxCTL |= DMASWDW; + } + + async command void DMA.setByteToWord() { + DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); + DMAxCTL |= DMASBDW; + } + + async command void DMA.setWordToByte() { + DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); + DMAxCTL |= DMASWDB; + } + + async command void DMA.setByteToByte() { + DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); + DMAxCTL |= DMASBDB; + } + + async command void DMA.setEdgeSensitive() { + DMAxCTL &= ~DMALEVEL; + } + + async command void DMA.setLevelSensitive() { + DMAxCTL |= DMALEVEL; + } + + async command void DMA.enableDMA() { + DMAxCTL |= DMAEN; + } + + async command void DMA.disableDMA() { + DMAxCTL &= ~DMAEN; + } + + async command void DMA.enableInterrupt() { + DMAxCTL |= DMAIE; + } + + async command void DMA.disableInterrupt() { + DMAxCTL &= ~DMAIE; + } + + async command bool DMA.interruptPending() { + return !!( DMAxCTL & DMAIFG ); + } + + async command bool DMA.aborted() { + return !!( DMAxCTL & DMAABORT ); + } + + async command void DMA.triggerDMA() { + DMAxCTL |= DMAREQ; + } + + async command void DMA.setSrc( void *saddr ) { + DMAxSA = (uint16_t)saddr; + } + + async command void DMA.setDst( void *daddr ) { + DMAxDA = (uint16_t)daddr; + } + + async command void DMA.setSize( uint16_t sz ) { + DMAxSZ = sz; + } + + async command void DMA.setState( dma_channel_state_t s, + dma_channel_trigger_t t, + void* src, void* dest, + uint16_t size ) { + call DMA.setStateRaw( *(uint16_t*)&s, *(uint16_t*)&t, + src, dest, size); + } + + async command void DMA.setStateRaw( uint16_t s, uint16_t t, + void* src, void* dest, + uint16_t size ) { + DMAxSA = (uint16_t)src; + DMAxDA = (uint16_t)dest; + DMAxSZ = size; + call DMA.setTrigger((dma_trigger_t) t); + DMAxCTL = s; + } + + async command dma_channel_state_t DMA.getState() { + dma_channel_state_t s = *(dma_channel_state_t*) &DMAxCTL; + return s; + } + + async command void* DMA.getSource() { + return (void*)DMAxSA; + } + + async command void* DMA.getDestination() { + return (void*)DMAxDA; + } + + async command uint16_t DMA.getSize() { + return DMAxSZ; + } + + async command dma_channel_trigger_t DMA.getTrigger() { + dma_channel_trigger_t t; + t.trigger = ( DMACTL0 & DMAxTSEL_mask ) >> DMAxTSEL_shift; + return t; + } + + async command void DMA.reset() { + DMAxCTL = 0; + DMAxSA = 0; + DMAxDA = 0; + DMAxSZ = 0; + } +} + diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h new file mode 100644 index 0000000000..f83051e28d --- /dev/null +++ b/tos/chips/msp430/dma/Msp430Dma.h @@ -0,0 +1,192 @@ +/** + * Copyright (c) 2009 DEXMA SENSORS SL + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the COPYRIGHT HOLDERS nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDERS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Ben Greenstein + * @author Jonathan Hui + * @author Mark Hays + * @author Xavier Orduna + * $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $ + */ + +#ifndef MSP430DMA_H +#define MSP430DMA_H + +// General stuff +enum { + DMA_CHANNELS = 3 +}; + +enum { + DMA_CHANNEL0 = 0, + DMA_CHANNEL1 = 1, + DMA_CHANNEL2 = 2, + DMA_CHANNEL_UNKNOWN = 3 +}; + +enum { + DMA_CHANNEL_AVAILABLE = 0, + DMA_CHANNEL_IN_USE = 1 +}; + +//////////////////////////////////////// +// Per-channel fields in DMACTL0 +enum { + DMA0TSEL_SHIFT = 0, + DMA1TSEL_SHIFT = 4, + DMA2TSEL_SHIFT = 8, + DMATSEL_MASK = (uint16_t)0xf, + DMA0TSEL_MASK = ( 0xf ), + DMA1TSEL_MASK = ( 0xf0 ), + DMA2TSEL_MASK = ( 0xf00 ), +}; + +// Per-field (channel) in DMACTL0 +typedef enum { + DMA_TRIGGER_DMAREQ = 0x0, // software trigger + DMA_TRIGGER_TACCR2 = 0x1, + DMA_TRIGGER_TBCCR2 = 0x2, + +#if defined(__msp430x261x) + DMA_TRIGGER_UCA0RXIFG = 0x3, // RX on USCIA0 (UART/SPI) + DMA_TRIGGER_UCA0TXIFG = 0x4, // TX on USCIA0 (UART/SPI) +#else + DMA_TRIGGER_URXIFG0 = 0x3, // RX on USART0 (UART/SPI) + DMA_TRIGGER_UTXIFG0 = 0x4, // TX on USART0 (UART/SPI) +#endif + DMA_TRIGGER_DAC12IFG = 0x5, // DAC12_0CTL DAC12IFG bit + DMA_TRIGGER_ADC12IFGx = 0x6, + DMA_TRIGGER_TACCR0 = 0x7, // CCIFG bit + DMA_TRIGGER_TBCCR0 = 0x8, // CCIFG bit +#if defined(__msp430x261x) + DMA_TRIGGER_UCB0RXIFG = 0x9, // RX on USCIB0 (UART/SPI) + DMA_TRIGGER_UCB0TXIFG = 0xa, // TX on USCIB0 (UART/SPI) +#else + DMA_TRIGGER_URXIFG1 = 0x9, // RX on USART1 (UART/SPI) + DMA_TRIGGER_UTXIFG1 = 0xa, // TX on USART1 (UART/SPI) +#endif + DMA_TRIGGER_MULT = 0xb, // Hardware Multiplier Ready + DMA_TRIGGER_DMAxIFG = 0xe, // DMA0IFG triggers DMA channel 1 + // DMA1IFG triggers DMA channel 2 + // DMA2IFG triggers DMA channel 0 + DMA_TRIGGER_DMAE0 = 0xf // External Trigger DMAE0 +} dma_trigger_t; + +typedef struct dma_channel_trigger_s { + unsigned int trigger : 4; + unsigned int reserved : 12; +} __attribute__ ((packed)) dma_channel_trigger_t; + +//////////////////////////////////////// +// Bits in DMACTL1 +enum { + DISABLE_NMI = 0, + ENABLE_NMI = 1, +}; + +enum { + NOT_ROUND_ROBIN = 0, + ROUND_ROBIN = 1, +}; + +enum { + NOT_ON_FETCH = 0, + ON_FETCH = 1, +}; + +typedef struct dma_state_s { + unsigned int enableNMI : 1; + unsigned int roundRobin : 1; + unsigned int onFetch : 1; + unsigned int reserved : 13; +} __attribute__ ((packed)) dma_state_t; + +//////////////////////////////////////// +// Stuff in DMAxCTL + +// DMADTx +enum { + DMADT_SHIFT = 12, + DMADT_MASK = 0x7, +}; + +typedef enum { + DMA_SINGLE_TRANSFER = 0x0, + DMA_BLOCK_TRANSFER = 0x1, + DMA_BURST_BLOCK_TRANSFER = 0x2, + DMA_REPEATED_SINGLE_TRANSFER = 0x4, + DMA_REPEATED_BLOCK_TRANSFER = 0x5, + DMA_REPEATED_BURST_BLOCK_TRANSFER = 0x7 +} dma_transfer_mode_t; + +// DMA{SRC,DST}INCRx +enum { + DMASRCINCR_SHIFT = 8, + DMADSTINCR_SHIFT = 10, + DMAINCR_MASK = 0x3, +}; + +typedef enum { + DMA_ADDRESS_UNCHANGED = 0x0, + DMA_ADDRESS_DECREMENTED = 0x2, + DMA_ADDRESS_INCREMENTED = 0x3 +} dma_incr_t; + +typedef enum { + DMA_WORD = 0x0, + DMA_BYTE = 0x1 +} dma_byte_t; + +// DMALEVEL +typedef enum { + DMA_EDGE_SENSITIVE = 0x0, + DMA_LEVEL_SENSITIVE = 0x1 +} dma_level_t; + +typedef struct dma_channel_state_s { + unsigned int request : 1; + unsigned int abort : 1; + unsigned int interruptEnable : 1; + unsigned int interruptFlag : 1; + unsigned int enable : 1; + unsigned int level : 1; /* or edge- triggered */ + unsigned int srcByte : 1; /* or word */ + unsigned int dstByte : 1; + unsigned int srcIncrement : 2; /* or no-increment, decrement */ + unsigned int dstIncrement : 2; + unsigned int transferMode : 3; + unsigned int reserved2 : 1; +} __attribute__ ((packed)) dma_channel_state_t; + +#endif + diff --git a/tos/chips/msp430/dma/Msp430DmaC.nc b/tos/chips/msp430/dma/Msp430DmaC.nc new file mode 100644 index 0000000000..9a661b3b76 --- /dev/null +++ b/tos/chips/msp430/dma/Msp430DmaC.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Implementation of the HAL level component for the MSP430 DMA module. + * This configuration provides the available DMA channels through the + * MSP430DMA parameterized interface. If more channels are requested + * than available through unique("DMA"), there will be no mapping for + * that channel and compilation will fail. + * + * @author Ben Greenstein + * @author Jonathan Hui + * @author Joe Polastre + * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + */ + +configuration Msp430DmaC { + + provides interface Msp430DmaControl as Control; + provides interface Msp430DmaChannel as Channel0; + provides interface Msp430DmaChannel as Channel1; + provides interface Msp430DmaChannel as Channel2; + +} +implementation { + + components HplMsp430DmaC as HplDmaC; + + components new Msp430DmaChannelP() as Channel0P; + Channel0 = Channel0P; + Channel0P.HplChannel -> HplDmaC.Channel0; + + components new Msp430DmaChannelP() as Channel1P; + Channel1 = Channel1P; + Channel1P.HplChannel -> HplDmaC.Channel1; + + components new Msp430DmaChannelP() as Channel2P; + Channel2 = Channel2P; + Channel2P.HplChannel -> HplDmaC.Channel2; + + components Msp430DmaControlP as ControlP; + Control = ControlP; + ControlP.HplControl -> HplDmaC; + ControlP.HplChannel0 -> HplDmaC.Channel0; + ControlP.HplChannel1 -> HplDmaC.Channel1; + ControlP.HplChannel2 -> HplDmaC.Channel2; + +} diff --git a/tos/chips/msp430/dma/Msp430DmaChannel.nc b/tos/chips/msp430/dma/Msp430DmaChannel.nc new file mode 100644 index 0000000000..f476b37fc9 --- /dev/null +++ b/tos/chips/msp430/dma/Msp430DmaChannel.nc @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Ben Greenstein + * @author Joe Polastre + * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + */ + +#include "Msp430Dma.h" + +interface Msp430DmaChannel { + + /** + * Setup a transfer using explicit argument (most robust and simple + * mechanism and recommended for novice users) + * + * See MSP430DMA.h for parameter options + */ + async command error_t setupTransfer( dma_transfer_mode_t transfer_mode, + dma_trigger_t trigger, + dma_level_t level, + void *src_addr, + void *dst_addr, + uint16_t size, + dma_byte_t src_byte, + dma_byte_t dst_byte, + dma_incr_t src_incr, + dma_incr_t dst_incr ); + + /** + * Raw interface for setting up a DMA transfer. This function is + * intended to provide as much raw performance as possible but + * sacrifices type checking in the process. Recommended ONLY for + * advanced users that have very intricate knowledge of the MSP430 + * DMA module described in the user's guide. + * + * @param state The control register value, as specified by + * dma_control_state_t in MSP430DMA.h + * @param trigger The trigger for the DMA transfer. Should be one + * of the options from dma_trigger_t in MSP430DMA.h + * @param src Pointer to the source address + * @param dest Pointer to the destination address + * @param size Size of the DMA transfer + * + * See MSP430DMA.h for parameter options + */ + async command void setupTransferRaw( uint16_t state, uint16_t trigger, + void* src, void* dest, int size ); + + /** + * Enable the DMA module. Equivalent to setting the DMA enable bit. + * This function does not force a transfer. + */ + async command error_t startTransfer(); + + /** + * Repeat a DMA transfer using previous settings but new pointers + * and transfer size. Automatically starts the transfer (sets the + * enable bit). + */ + async command error_t repeatTransfer( void *src_addr, void *dst_addr, + uint16_t size ); + + /** + * Trigger a DMA transfer using software + */ + async command error_t softwareTrigger(); + + /** + * Stop a DMA transfer in progress + */ + async command error_t stopTransfer(); + + /** + * Notification that the transfer has completed + */ + async event void transferDone(error_t success); + +} diff --git a/tos/chips/msp430/dma/Msp430DmaChannelP.nc b/tos/chips/msp430/dma/Msp430DmaChannelP.nc new file mode 100644 index 0000000000..7ba2bbefbb --- /dev/null +++ b/tos/chips/msp430/dma/Msp430DmaChannelP.nc @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Ben Greenstein + * @author Jonathan Hui + * @author Joe Polastre + * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + */ + +#include "Msp430Dma.h" + +generic module Msp430DmaChannelP() { + + provides interface Msp430DmaChannel as Channel; + uses interface HplMsp430DmaChannel as HplChannel; + +} + +implementation { + + norace dma_channel_state_t gChannelState; + norace dma_channel_trigger_t gChannelTrigger; + + async command void Channel.setupTransferRaw( uint16_t s, uint16_t t, + void* src, void* dest, + int size ) { + call HplChannel.setStateRaw( s, t, src, dest, size ); + } + + async command error_t Channel.setupTransfer( dma_transfer_mode_t transfer_mode, + dma_trigger_t trigger, + dma_level_t level, + void *src_addr, + void *dst_addr, + uint16_t size, + dma_byte_t src_byte, + dma_byte_t dst_byte, + dma_incr_t src_incr, + dma_incr_t dst_incr ) { + + gChannelState.request = 0; + gChannelState.abort = 0; + gChannelState.interruptEnable = 1; + gChannelState.interruptFlag = 0; + gChannelState.enable = 0; /* don't start an xfer */ + gChannelState.level = level; + gChannelState.srcByte = src_byte; + gChannelState.dstByte = dst_byte; + gChannelState.srcIncrement = src_incr; + gChannelState.dstIncrement = dst_incr; + gChannelState.transferMode = transfer_mode; + + gChannelTrigger.trigger = trigger; + + call HplChannel.setState( gChannelState, gChannelTrigger, + src_addr, dst_addr, size ); + + return SUCCESS; + + } + + async command error_t Channel.startTransfer() { + call HplChannel.enableDMA(); + return SUCCESS; + } + + async command error_t Channel.repeatTransfer( void *src_addr, + void *dst_addr, + uint16_t size ) { + call HplChannel.setSrc( src_addr ); + call HplChannel.setDst(dst_addr); + call HplChannel.setSize(size); + call HplChannel.enableDMA(); + return SUCCESS; + } + + async command error_t Channel.softwareTrigger() { + if (gChannelTrigger.trigger != DMA_TRIGGER_DMAREQ) + return FAIL; + call HplChannel.triggerDMA(); + return SUCCESS; + } + + async command error_t Channel.stopTransfer() { + if ( gChannelState.transferMode != DMA_BURST_BLOCK_TRANSFER || + gChannelState.transferMode != DMA_REPEATED_BURST_BLOCK_TRANSFER) + return FAIL; + call HplChannel.disableDMA(); + return SUCCESS; + + } + + async event void HplChannel.transferDone( error_t error ) { + signal Channel.transferDone( error ); + } + + default async event void Channel.transferDone( error_t error ) {} + +} diff --git a/tos/chips/msp430/dma/Msp430DmaControl.nc b/tos/chips/msp430/dma/Msp430DmaControl.nc new file mode 100644 index 0000000000..4a7fee26b9 --- /dev/null +++ b/tos/chips/msp430/dma/Msp430DmaControl.nc @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Ben Greenstein + * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + */ + +#include "Msp430Dma.h" + +interface Msp430DmaControl { + async command void init(); + async command void setFlags( bool enable_nmi, bool round_robin, + bool on_fetch); +} diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc new file mode 100644 index 0000000000..89dc05c953 --- /dev/null +++ b/tos/chips/msp430/dma/Msp430DmaControlP.nc @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Ben Greenstein + * @author Jonathan Hui + * @author Joe Polastre + * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ + */ + +#include "Msp430Dma.h" + +module Msp430DmaControlP { + + provides interface Msp430DmaControl as Control; + + uses interface HplMsp430DmaControl as HplControl; + uses interface HplMsp430DmaChannel as HplChannel0; + uses interface HplMsp430DmaChannel as HplChannel1; + uses interface HplMsp430DmaChannel as HplChannel2; + +} + +implementation { + + async command void Control.init() { + call HplControl.reset(); + call HplChannel0.reset(); + call HplChannel1.reset(); + call HplChannel2.reset(); + } + + async command void Control.setFlags( bool enable_nmi, bool round_robin, + bool on_fetch ) { + + // NOTE: on_fetch must be true when dst addr is flash + + if (enable_nmi) call HplControl.setENNMI(); + else call HplControl.clearENNMI(); + if (round_robin) call HplControl.setRoundRobin(); + else call HplControl.clearRoundRobin(); + if (on_fetch) call HplControl.setOnFetch(); + else call HplControl.clearOnFetch(); + + } + + async event void HplChannel0.transferDone( error_t error ) {} + async event void HplChannel1.transferDone( error_t error ) {} + async event void HplChannel2.transferDone( error_t error ) {} + +} From e62aeede9298e307edb40ef9cbba8b970ed804da Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 30 Sep 2011 22:40:06 -0700 Subject: [PATCH 183/411] msp430-int-next: update release notes for msp430-int (2011-09-30) --- 11_Release_Notes | 43 ++++++++++++++++++++++++++++++++++--------- 1 file changed, 34 insertions(+), 9 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index fedd9419ff..85f87fd5e4 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -1,10 +1,15 @@ Major Changes to the msp430 core software: +(branch: gh:tp-freeforall/prod(msp430-int-next) + will migrate to msp430-int (~ 2011-10-07)) -Welcome to a major rework of the core msp430 files. Originally, tinyos msp430 -support was for the first generation msp430 cpus. Later the MSP430X and -MSP430XV2 processor chips were released by TI. As newer cpu chips have been -ported to TinyOS the architecture of the core msp430 s/w has needed changes. +Last Update: 2011-09-30, cire + +Msp430-Int (msp430 integration branch) is a major rework of the core tinyos +msp430 files. Originally, tinyos msp430 support was for the first generation +msp430 cpus. Later the MSP430X and MSP430XV2 processor chips were released by +TI. As newer cpu chips have been ported to TinyOS the architecture of the +core msp430 s/w has needed changes. Major areas of impact include: peripheral register access, clock modules, dma support, usart vs. usci support, and interrupt architecture. In addition the @@ -24,7 +29,8 @@ done using the following: (20110612) slated to become new main toolchain. mspgcc4.5.3 (LTS 20110716) long term support of uniarch (pre-20bit) - mspgcc4.5.3 (20110813) later version of LTS20110716 with patches through 0813. + mspgcc4.5.3 (20110905) later version of LTS20110716 with patches through 0905. + see http://tinyprod.net/debian-dev. It is recommended that all verification work be done using the latest toolchain available. The sooner we get that toolchain squared away the better. @@ -33,7 +39,8 @@ available. The sooner we get that toolchain squared away the better. Families: A family is a group of similar msp430 processor chips that have been instantiated -in TinyOS. +in TinyOS. The overlap between cpus is not just cpu features but can include clocks +and other peripherals. x1: 1st generation MSP430. Supported: msp430f149, msp430f1611 (telosb) @@ -46,7 +53,10 @@ x5: 3rd generation MSP430X. Modified instruction timings. Peripheral modificat Other notable changes: -* Remove duplicate files between original x1 and Z1 (x2) +* Remove duplicate files between original x1 and Z1 (x2). Msp430-int has + been fully integrated with the tinyos-main trunk as of 2011-09-30 which + includes an updated Z1 (x2) core. All duplicated files between x1 and Z1 + have been removed. * change low level usci port naming back to h/w centric. ie. Msp430Uart0 -> Msp430UartA0. Better matches what will come in with @@ -70,8 +80,16 @@ Other notable changes: * Change DCO specifications from KHZ to HZ to eliminate confusion with decimal vs. binary frequency specs. Make Z1 use binary clocks. + WARNING: The whole issue of binary vs. decimal clocks needs to revisted. For + various good reasons (32768 = power of two, and is XT1/ACLK which is used to + stabilize the main DCO clock which runs everything else (SMCLK which drives + the peripherals). Anyway, TinyOS wants binary clocks but TI states that upper + limits for the various processors is in decimal (ie. 8MHz). It is generally + dangerous to overclock the TI parts and is asking for flakey behaviour. + * Revised DCO calibrator to work with both 1611 and Z1 2617/1618. Z1 uses dco - calibrator to sync up to 8MiHz. + calibrator to sync up to 8MiHz. The Z1 uses the 2617 which can be clocked + to 16MHz so 8MiHz is safe. * Device configuration blocks by default moved to ROM. This saves start up cpu cycles and space in RAM. Config blocks can still be placed in RAM and modified @@ -105,6 +123,11 @@ Other notable changes: - make interrupts be parameterized. This routes dma interrupts to the appropriate channel handler. + *** The old dma handler has been brought back in for backward compatibility and + the new dma handler (supports x5) is now in tos/chips/msp430/dma_unified. How + to migrate existing code is a bit of a pain. Should revert existing code + back to old dma handler. + * X5 additions: @@ -134,4 +157,6 @@ a lot more work and is not recommended. Cloning for tosthreads creates a maintanence headache. TosThreads should be modified to place any necessary hooks into the actual device -drivers themselves rather than duplicating the files and then shadowing. +drivers themselves rather than duplicating the files and then shadowing. Kevin +Klues at one point evaluated using in place code and for some reason went the other +way. The reasoning wasn't documented. From e86bbe6ad1ed8e9c8d46e570a056b68965d6cdee Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 30 Sep 2011 23:50:36 -0700 Subject: [PATCH 184/411] msp430-int-next: update Repo_Notes, move Getting_Started around prep --- 01_Repo_Notes | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/01_Repo_Notes b/01_Repo_Notes index 341ec93b4a..045826f6b0 100644 --- a/01_Repo_Notes +++ b/01_Repo_Notes @@ -4,6 +4,8 @@ TinyProd tp-freeforall/prod +Main Branch: (2011-09-30) msp430-int-pu + msp430-int: msp430 integration msp430-int-pu: msp430 integration (proposed updates) @@ -12,8 +14,15 @@ msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. If in doubt, branch off from msp430-int-pu. -Status: 2011-09-21 +Status: 2011-09-30 + +tinyprod-base integrated with the tip of tinyos-main trunk (82dab04, r5767) +msp430-int-next: integrated with updated tinyprod-base. + +Merge with Z1 (x2) tinyos-main code complete. + +2011-09-21 msp430-int-pu merged into msp430-int, includes base x5 (prior to tinyprod-base) tinyprod-base: new branch replaces vhsb (nuke old z1 code) tinyprod-base now based on the tinyos-main trunk (2011-09-21) mainline. @@ -32,6 +41,19 @@ msp430-int-svn: continues along. (commits that should come into the ============================================================================ +Where to look for stuff: + +01_Repo_Notes: For a general overview of what this Repo is about. Note + this repository is uses GIT as its DVCS. + +00_Getting_Started: Overview of getting started using the Repo and GIT. + +00a_Contribution_Process: Contributing back to the central Repository. + +00b_Development_Environment: Setting up a development environment. + +============================================================================ + Welcome to TinyProd * About TinyProd: @@ -198,6 +220,8 @@ svn t2 mainline ---| svn/upstream: is the main branch coming from the svn t2 mainline. Updated manually. svn/upstream-next: proposed next version of an upstream snapshot. +svn/current: tracks the main svn t2 mainline but is updated more often then svn/upstream. + tinyprod-base: Minimal base changes for the tinyprod repository. Current t2 trunk includes the revised Z1 commits which kills the need for the vhsb (remove extraneous Z1 msp430X commits). Tinyprod-base @@ -211,7 +235,3 @@ msp430-int: main integration branch for the msp430 core. It represents the msp430-int-pu: new proposed changes to msp430-int are first integrated here. When verified these get merged into msp430-int. - - - -Please see 00a_Contribution_Process for typical workflows. From 9903e1cdff254fdd35a67f7dc8488c6761e59c6c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 30 Sep 2011 23:55:57 -0700 Subject: [PATCH 185/411] Move Getting Started files around to make more sense --- 01_Repo_Notes => 00a_Repo_Notes | 0 00b_Development_Environment | 0 00_Getting_Started => 00c_Getting_Started_Git | 0 00a_Contribution_Process => 00d_Contribution_Process | 0 README | 2 +- 5 files changed, 1 insertion(+), 1 deletion(-) rename 01_Repo_Notes => 00a_Repo_Notes (100%) create mode 100644 00b_Development_Environment rename 00_Getting_Started => 00c_Getting_Started_Git (100%) rename 00a_Contribution_Process => 00d_Contribution_Process (100%) diff --git a/01_Repo_Notes b/00a_Repo_Notes similarity index 100% rename from 01_Repo_Notes rename to 00a_Repo_Notes diff --git a/00b_Development_Environment b/00b_Development_Environment new file mode 100644 index 0000000000..e69de29bb2 diff --git a/00_Getting_Started b/00c_Getting_Started_Git similarity index 100% rename from 00_Getting_Started rename to 00c_Getting_Started_Git diff --git a/00a_Contribution_Process b/00d_Contribution_Process similarity index 100% rename from 00a_Contribution_Process rename to 00d_Contribution_Process diff --git a/README b/README index 85948ce16f..953cb5179f 120000 --- a/README +++ b/README @@ -1 +1 @@ -01_Repo_Notes \ No newline at end of file +00a_Repo_Notes \ No newline at end of file From 89ad283ae3f649db0c1b22a256b8bca704bb5c67 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 1 Oct 2011 02:19:19 -0700 Subject: [PATCH 186/411] Tweak getting started. Bring in fleshed Dev. Env. set up. --- 00a_Repo_Notes | 36 +++-- 00b_Development_Environment | 282 ++++++++++++++++++++++++++++++++++++ 00c_Getting_Started_Git | 6 +- 3 files changed, 309 insertions(+), 15 deletions(-) diff --git a/00a_Repo_Notes b/00a_Repo_Notes index 045826f6b0..e2fa48d5a5 100644 --- a/00a_Repo_Notes +++ b/00a_Repo_Notes @@ -1,14 +1,21 @@ +WARNING: Default branch has been switched to *** msp430-int-next *** + +============================================================================ + +See "Where to begin" (next section) for where to start. + ============================================================================ TinyProd tp-freeforall/prod -Main Branch: (2011-09-30) msp430-int-pu +Default (Main working) Branch: (2011-09-30) msp430-int-next + Integration cycle. Merging tinyos-main (SVN) -> msp430-int msp430-int: msp430 integration -msp430-int-pu: msp430 integration (proposed updates) +msp430-int-pu: msp430 integration (proposed updates) (currently collapsed) msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. @@ -32,7 +39,7 @@ msp430-int-pu-next, new int-pu based on tinyprod-base. msp430-int <- msp430-int-pu msp430-int-pu temporarily reserved (to give folks time to adapt). -upstream-next: new upstream +upstream-next: new upstream, present during an update cycle. tinyprod-base: based off upstream-next. msp430-int-next: off tinyprod-base msp430-int-pu-next: off msp430-int-next (at this point should be pristine). @@ -41,16 +48,18 @@ msp430-int-svn: continues along. (commits that should come into the ============================================================================ -Where to look for stuff: +Where to begin: -01_Repo_Notes: For a general overview of what this Repo is about. Note - this repository is uses GIT as its DVCS. +00a_Repo_Notes: (this file). For a general overview of what this Repo is + about. Note this repository uses GIT as its DVCS. -00_Getting_Started: Overview of getting started using the Repo and GIT. +00b_Development_Environment: Setting up a development environment. -00a_Contribution_Process: Contributing back to the central Repository. +00c_Getting_Started_Git: Overview of getting started using git, github, and + this repo. + +00d_Contribution_Process: Contributing back to the central Repository. -00b_Development_Environment: Setting up a development environment. ============================================================================ @@ -217,10 +226,13 @@ svn t2 mainline ---| * Branches: -svn/upstream: is the main branch coming from the svn t2 mainline. Updated manually. -svn/upstream-next: proposed next version of an upstream snapshot. +svn/upstream: is the main branch coming from the svn t2 mainline. Updated + manually. It denotes a merge point taken for tinyprod. +svn/upstream-next: proposed next version of an upstream snapshot. Indicates a + merge cycle in underway. -svn/current: tracks the main svn t2 mainline but is updated more often then svn/upstream. +svn/current: tracks the main svn t2 mainline but is updated more often then + svn/upstream. tinyprod-base: Minimal base changes for the tinyprod repository. Current t2 trunk includes the revised Z1 commits which kills the need for diff --git a/00b_Development_Environment b/00b_Development_Environment index e69de29bb2..46a88c713c 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -0,0 +1,282 @@ + + +Installing a development environment for TinyOS (TinyProd). + + +State: + +2011-09-30: + Ubuntu 10.04 or 11.04. Debian Squeeze works as well. + T2 (TinyProd) github:tp-freeforall/prod(msp430-int-pu), + mspdebug JTAG debugging. mspgcc-LTS20110716 toolchain with patches + +************************************************************************************** + +This brief is written assuming that there is a common root directory, +we'll call it top and it is usually at the top level of a working +directory. ie. ~/top. You can put this directory anywhere, environment +variables are used to tell the tools where things live. + +Most commands are entered from a terminal window. + +************************************************************************************** + +1) OS Install. + +We currently only support development using Linux Ubuntu 10.04 (lucid). 11.04 is also +known to behave. 10.04 was chosen because Mac laptops (MacBook Pros (3,1 and 7,1)) seem +to work pretty well using 10.04. 11.04 (natty) also works but the Macs run hot. (fans and cpu +throttling doesn't seem to work right). + +Obtain an ISO image from releases/ubuntu.com or alternativly from tinyprod.net/downloads. +Burn the iso to a CD and install on your box. A simple install is fine and will +take less time. + +When the install is complete, boot the system, and use "apt-get" to install the following +packages: + + build-essential stow automake autoconf libtool libc6-dev + git-core git-daemon-run git-doc git-email git-gui gitk gitmagic + openssh-client openssh-server + +The following will do the trick: + +sudo -s +apt-get install build-essential stow automake autoconf libtool libc6-dev +apt-get install git-core git-daemon-run git-doc git-email git-gui gitk gitmagic +apt-get install openssh-client openssh-server +exit + + +************************************************************************************** + +2) Install the TinyOS toolset (msp430) + +We want the tinyos toolset for msp430 based motes (telosb). Debian packages +are available from Stanford and TinyProd.net. The toolchain at TinyProd.Net +is more up to date. + +We want the following packages: + + msp430-binutils-tinyos + msp430-gcc-tinyos + msp430-gdb-tinyos + msp430-libc-tinyos + msp430-tinyos + msp430mcu-tinyos + mspdebug-tinyos + nesc + +You want to follow the instructions at: http://tinyprod.net/debian-dev. + +The following should be equivilent. With some additions... + +sudo -s + +# +# add the keys for Razvan, the package signer +# +gpg --keyserver subkeys.pgp.net --recv-keys F99BE531 +gpg -a --export F99BE531 | sudo apt-key add - + +# +# add a repo pointer into sources.list +# +echo "deb http://tinyprod.net/debian-dev squeeze main" >> /etc/apt/sources.list +apt-get update +apt-get install nesc msp430-tinyos mspdebug-tinyos +exit + +You will also need to install the tinyos-tools.tgz tarball. These tools haven't +been packaged yet, so will need to be manually installed. The tools live in +/usr/local. + +sudo -s +cd /usr/local +wget http://tinyprod.net/downloads/tinyos-tools.tgz +tar xfz tinyos-tools.tgz +exit + +Make sure your PATH environment variable includes /usr/local/bin. + +************************************************************************************** + +3) TinyOS 2.x tree checkout + +This is a basic check out of the msp430-int-next branch of the github repository +tp-freeforall/prod.git. This repo tracks the main tinyos SVN repository used +for development. It has modifications to support newer TI MSP430 processors. + +This basic checkout gives you a read-only copy of the msp430-int-next branch. It +is a fully functional local repository that can be commited into (locally only). +To set up for contibuting to the main repository, the instructions in +00c_Getting_Started_Git and 00d_Contribution_Process should be followed. + + cd ~/top + mkdir t2_cur + cd t2_cur + git clone -v git://github.com/tp-freeforall/prod tinyos-2.x + cd tinyos-2.x + git checkout -b + +This will create a new branch named and will check you into that branch. +It will be branched off of the main branch from the remote, gh:tp-freeforall/prod +(msp430-int-next). + +This will keep your changes locally grouped. You will have a remote named 'origin' +that points at the repository that you cloned from namely, +git://github.com/tp-freeforall/prod.git. Your branch will be rooted +at the default branch of tp-freeforall/prod, msp430-int-next. + +************************************************************************************** + +4) Set up build environment settings + +The following environment variables must be set to build. + + TOSROOT + TOSDIR + MAKERULES + CLASSPATH + + for example: working dir ~/top + + #!/bin/sh + + MOTECOM="serial@/dev/ttyUSB0:telosb" + + TOSROOT=~/top/t2_cur/tinyos-2.x + TOSDIR=$TOSROOT/tos + + MAKERULES=$TOSROOT/support/make/Makerules + CLASSPATH=.:$TOSROOT/support/sdk/java/tinyos.jar + + PYTHONPATH=$TOSROOT/support/sdk/python:$PYTHONPATH + + export MAKERULES TOSDIR TOSROOT CLASSPATH PYTHONPATH + export MOTECOM + + +************************************************************************************** + +5) Do a test compile. + + For telosb hardware: (assumes pluged in to a USB port) + + cd ~/top/t2_cur/tinyos-2.x/apps/Blink + make telosb install + + The Leds should start to blink. + + +************************************************************************************** + +6) Build SerialForwarder and libmote library. (optional) + +WARNING: This should get replaced with libmotenet. Superset of the SF but also +allows using AM sockets or IPv6 sockets for connections. + + + Build the serial forwarder and associated library (also includes direct serial access) + + cd $TOSROOT/support/sdk/c/sf + ./bootstrap + ./configure --prefix=/opt/stow/sf_c + make + + sudo -s + make install + + ("sudo make install" for some reason doesn't pick up the value of $TOSROOT properly so + the make install doesn't work write unless you are root first) + + This will install bin/{sf, sflisten, sfsend, seriallisten, serialsend}, include/{message.h, + serialsource.h, sfsource.h}, and lib/libmote.a. These will be installed into /opt/stow/sf_c. + + + Install into /opt/{bin,include,lib} using stow. + + cd /opt/stow + stow sf_c + + +************************************************************************************** + +7) We use GIT as the SCM. Here are some pointers to get you started: + + Start here: http://book.git-scm.com/2_setup_and_initialization.html + Everyday GIT: http://www.kernel.org/pub/software/scm/git/docs/everyday.html + Cheat Sheet: http://zrusin.blogspot.com/2007/09/git-cheat-sheet.html + SVN to GIT: http://git-scm.com/course/svn.html + GIT Book: http://book.git-scm.com/ + Another Book: http://progit.org/book/ + + + + +Documentation on getting started with T2 can be found at: + + http://docs.tinyos.net + http://docs.tinyos.net/index.php/Getting_started + + +************************************************************************************** + +8) Using the serialforwarder/seriallistener + + a) make sure that tinyos.jar has been built. It should live in $TOSROOT/support/sdk/java/tinyos.jar + b) to rebuild: + + cd $TOSROOT/support/sdk/java/ + make tinyos.jar + + c) Install TOSComm JNI support if needed. Did java bitch about not finding TOSComm JNI support? + + assuming tinyos-tools is installed run: + + tos-install-jni + + d) To watch raw bytes coming from the serial port + + Make sure CLASSPATH includes $TOSROOT/support/sdk/java/tinyos.jar, ie: + + CLASSPATH=.:/home/joe/mm/t2_cur/tinyos-2.x/support/sdk/java/tinyos.jar + +execute: + + java net.tinyos.tools.Listen -comm serial@/dev/ttyUSB0:telosb + + +And you should see packets that look something like this: (depends on what the mote is sending) + + 00 FF FF 00 00 12 00 A1 00 12 07 09 00 0C 9E 23 00 0C 9E 30 F6 2C FF D7 FF FF + 00 FF FF 00 00 12 00 A1 00 12 07 05 00 0C 9E 24 00 0C 9E 3F E5 AF B1 6F 9E D4 + 00 FF FF 00 00 0E 00 A1 00 0E 07 06 00 0C 9E 33 00 0C 9E 46 78 80 + 00 FF FF 00 00 0E 00 A1 00 0E 07 07 00 0C 9E 33 00 0C 9E 52 FF FF + 00 FF FF 00 00 10 00 A1 00 10 07 08 00 0C 9E 33 00 0C 9E 61 FF FF FF FF + + 00 FF FF 00 00 10 00 A1 00 10 07 08 00 0C 9E 33 00 0C 9E 61 FF FF FF FF + ^ ^ ^ ^ ^ ^ ^ ^ ^ | -- sensor 8 data + | | | | | | | | |- sensor id + | | | | | | | |- sensor data type + | | | | | | |-- length of data block + | | | | | |-- AM type MM_DT (data, typed) + | | | | |-- AM group + | | | |-- serial length + | | |-- src addr + | |-- dest addr + |-- dispatch byte - 0 says AM + +If you define MOTECOM you won't need to specify the -comm parameter. ie: + + MOTECOM=serial@/dev/ttyUSB1:telosb + + + + +************************************************************************************** + +9) Repos: + +See $(TOSROOT)/00a_Repo_Notes for details about how the TinyProd/prod repo is organized. +github:tinyprod/prod or github:tp-freeforall/prod hold the main t2 repository. diff --git a/00c_Getting_Started_Git b/00c_Getting_Started_Git index e390a723e4..4bfb8bbccf 100644 --- a/00c_Getting_Started_Git +++ b/00c_Getting_Started_Git @@ -169,10 +169,10 @@ redacted)... * Set up your working repository - See 00_Repo_Notes for the structure of the repositories and their + See 00a_Repo_Notes for the structure of the repositories and their relationships. - Also see 00a_Contribution_Process for examples of how to interacte with the + Also see 00d_Contribution_Process for examples of how to interacte with the various branches and repositories. The main repo is https://github.com/tinyprod/prod with an integration repo @@ -190,7 +190,7 @@ redacted)... github fork and a request for a pull is made between the contributor's branch and the main integration branch. - Please refer to 00a_Contribution_Process for details on how to set up + Please refer to 00d_Contribution_Process for details on how to set up your working repository. From 12f43286419e9e1a934fc3a5b6c2d2bc67bbddc4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 1 Oct 2011 03:02:02 -0700 Subject: [PATCH 187/411] After careful thought, remove the old dma driver. next commit will move dma_unified back to dma. Here is why... 1) We really want a unified driver. The new driver supports the x5 and other families. Various parts of the code (like the ADC12 subsystem) use DMA. The ADC12 is supported across multiple families. 2) Interface names cleaned up in unified driver. Intended to be easier to understand the function/interface to the driver. 3) The unified driver has a cleaned up structure. Prior DMA driver had some confusing structures and hopefully the unified driver has a cleaner easier to understand structure. Better maintainablity? Clean up module names so they are more descriptive of what is being controlled. DmaXP -> DmaChannelP which actually means something. 4) Structure and naming changes makes it very difficult to interface existing code to the two different drivers. Too much is different. It very quickly gets really ugly or complex and it simply isn't worth it. Simpler to bite the bullet and change the code that uses the dma code. There isn't that much of it. Basically just too much of a pain in the ass to maintain two drivers when changing over wasn't that difficult. 5) Various idiosyncrocies in the old driver were cleaned up. Excessive complexity was removed. Didn't buy anything and made the driver more complex without any real payback. Things like NMI ABORT were removed because they were silly. 6) The new driver was intentionally made faster. Code was examined that set up and launched the DMA engines. Care was taken to make this code minimal. 7) Make it blantently obvious that only 16 bit addresses are used for the DMA subsystem. RAM on the msp430 always lives in the low 64K. Sure you could DMA out of ROM but not sure what the application would actually be. When that occurs, we will cross that bridge and add a 32 bit capable driver. Note that carrying the extra address bits is very expensive and you had better have a really good reason for it. The old driver used void * to pass pointers around which is problematic. When 20 bit support is added, the actual size of the pointers is determined by model being used which means the pointer size can change. While this can be dealt with, it is just plain simpler to just be blantent about the driver supporting 16 bit addresses. In other words, Keep It Simple, Stupoid. Ah, ok. 8) Optimize interrupt handling. Make it so only the channel interrupting causing signalling to occur. 9) Don't reinvent the wheel by redefining the h/w definition bits. Use the definitions directly from the TI cpu headers. Do not abstract the control definitions. While this is nice from an abstraction level, it is still cpu dependent, and adds code and complexity to accomplish the translation. Silly. Remove all h/w definitions from Msp430Dma.h, these should come from the CPU dependent TI file. See the following commits for full motivation: d6ab745 msp430 dma: nuke error return from setTrigger dabff9a msp430 dma: nuke ABORT. 63d5995 msp430 dma: fix DmaControl.reset. Control.reset now does a full reset of all engines. 3b73ded msp430 dma: Make it blatantly obvious that the DMA addressing is 16 bits. ce668a7 msp430 dma: move channel interrupts to a parameterized interface. 944d420 msp430 dma: add test program for dma (tos/chips/msp430/dma/tests) 8eb8788 msp430 dma: New dma driver for x1,2,5 cpus. Unified dma driver. fe41adb msp430 dma: prep for dma rewrite, fix copyrights and other cosmetics. --- tos/chips/msp430/dma/HplMsp430DmaC.nc | 70 ----- tos/chips/msp430/dma/HplMsp430DmaChannel.nc | 86 ------ tos/chips/msp430/dma/HplMsp430DmaControl.nc | 51 ---- tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc | 40 --- tos/chips/msp430/dma/HplMsp430DmaP.nc | 106 ------- tos/chips/msp430/dma/HplMsp430DmaXP.nc | 264 ------------------ tos/chips/msp430/dma/Msp430Dma.h | 192 ------------- tos/chips/msp430/dma/Msp430DmaC.nc | 77 ----- tos/chips/msp430/dma/Msp430DmaChannel.nc | 109 -------- tos/chips/msp430/dma/Msp430DmaChannelP.nc | 129 --------- tos/chips/msp430/dma/Msp430DmaControl.nc | 44 --- tos/chips/msp430/dma/Msp430DmaControlP.nc | 80 ------ 12 files changed, 1248 deletions(-) delete mode 100644 tos/chips/msp430/dma/HplMsp430DmaC.nc delete mode 100644 tos/chips/msp430/dma/HplMsp430DmaChannel.nc delete mode 100644 tos/chips/msp430/dma/HplMsp430DmaControl.nc delete mode 100644 tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc delete mode 100644 tos/chips/msp430/dma/HplMsp430DmaP.nc delete mode 100644 tos/chips/msp430/dma/HplMsp430DmaXP.nc delete mode 100644 tos/chips/msp430/dma/Msp430Dma.h delete mode 100644 tos/chips/msp430/dma/Msp430DmaC.nc delete mode 100644 tos/chips/msp430/dma/Msp430DmaChannel.nc delete mode 100644 tos/chips/msp430/dma/Msp430DmaChannelP.nc delete mode 100644 tos/chips/msp430/dma/Msp430DmaControl.nc delete mode 100644 tos/chips/msp430/dma/Msp430DmaControlP.nc diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc deleted file mode 100644 index 3f76a64a18..0000000000 --- a/tos/chips/msp430/dma/HplMsp430DmaC.nc +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ - */ - -configuration HplMsp430DmaC { - - provides interface HplMsp430DmaControl as Control; - provides interface HplMsp430DmaChannel as Channel0; - provides interface HplMsp430DmaChannel as Channel1; - provides interface HplMsp430DmaChannel as Channel2; - -} - -implementation { - - components HplMsp430DmaP; - components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_, - DMA0SZ_, DMA0TSEL_MASK, - DMA0TSEL_SHIFT ) as Dma0; - components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_, - DMA1SZ_, DMA1TSEL_MASK, - DMA1TSEL_SHIFT ) as Dma1; - components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_, - DMA2SZ_, DMA2TSEL_MASK, - DMA2TSEL_SHIFT ) as Dma2; - - Control = HplMsp430DmaP; - Channel0 = Dma0; - Channel1 = Dma1; - Channel2 = Dma2; - Dma0.Interrupt -> HplMsp430DmaP; - Dma1.Interrupt -> HplMsp430DmaP; - Dma2.Interrupt -> HplMsp430DmaP; - -} - diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc deleted file mode 100644 index d5ef3bd047..0000000000 --- a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holder nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Ben Greenstein - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ - */ - -interface HplMsp430DmaChannel { - async command error_t setTrigger(dma_trigger_t trigger); - async command void clearTrigger(); - async command void setSingleMode(); - async command void setBlockMode(); - async command void setBurstMode(); - async command void setRepeatedSingleMode(); - async command void setRepeatedBlockMode(); - async command void setRepeatedBurstMode(); - async command void setSrcNoIncrement(); - async command void setSrcDecrement(); - async command void setSrcIncrement(); - async command void setDstNoIncrement(); - async command void setDstDecrement(); - async command void setDstIncrement(); - async command void setWordToWord(); - async command void setByteToWord(); - async command void setWordToByte(); - async command void setByteToByte(); - async command void setEdgeSensitive(); - async command void setLevelSensitive(); - - async command void enableDMA(); - async command void disableDMA(); - - async command void enableInterrupt() ; - async command void disableInterrupt() ; - - async command bool interruptPending(); - - async command bool aborted(); - async command void triggerDMA(); - - async command void setSrc(void *saddr); - async command void setDst(void *daddr); - async command void setSize(uint16_t sz); - - async command void setState(dma_channel_state_t s, dma_channel_trigger_t t, void* src, void* dest, uint16_t size); - async command void setStateRaw(uint16_t state, uint16_t trigger, void* src, void* dest, uint16_t size); - async command dma_channel_state_t getState(); - async command void* getSource(); - async command void* getDestination(); - async command uint16_t getSize(); - async command dma_channel_trigger_t getTrigger(); - - async command void reset(); - - async event void transferDone(error_t success); -} diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc deleted file mode 100644 index febe987701..0000000000 --- a/tos/chips/msp430/dma/HplMsp430DmaControl.nc +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holder nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Ben Greenstein - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ - */ - -#include "Msp430Dma.h" - -interface HplMsp430DmaControl { - - async command void setOnFetch(); - async command void clearOnFetch(); - async command void setRoundRobin(); - async command void clearRoundRobin(); - async command void setENNMI(); - async command void clearENNMI(); - async command void setState(dma_state_t s); - async command dma_state_t getState(); - async command void reset(); -} diff --git a/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc deleted file mode 100644 index 869f2fc498..0000000000 --- a/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holder nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Ben Greenstein - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ - */ - -interface HplMsp430DmaInterrupt { - async event void fired(); -} diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaP.nc deleted file mode 100644 index 592ab964f5..0000000000 --- a/tos/chips/msp430/dma/HplMsp430DmaP.nc +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holder nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $ - */ - -module HplMsp430DmaP { - - provides interface HplMsp430DmaControl as DmaControl; - provides interface HplMsp430DmaInterrupt as Interrupt; - -} - -implementation { - - MSP430REG_NORACE( DMACTL0 ); - MSP430REG_NORACE( DMACTL1 ); - - // X1 family share the same interrupt vector with DAC, X2 family has its own - - #if defined(DACDMA_VECTOR) - #define XX_DMA_VECTOR_XX DACDMA_VECTOR - #elif defined(DMA_VECTOR) - #define XX_DMA_VECTOR_XX DMA_VECTOR - #else - #error "DMA VECTOR not defined for cpu selected" - #endif - - TOSH_SIGNAL( XX_DMA_VECTOR_XX ) { - signal Interrupt.fired(); - } - - async command void DmaControl.setOnFetch(){ - DMACTL1 |= DMAONFETCH; - } - - async command void DmaControl.clearOnFetch(){ - DMACTL1 &= ~DMAONFETCH; - } - - async command void DmaControl.setRoundRobin(){ - DMACTL1 |= ROUNDROBIN; - } - async command void DmaControl.clearRoundRobin(){ - DMACTL1 &= ~ROUNDROBIN; - } - - async command void DmaControl.setENNMI(){ - DMACTL1 |= ENNMI; - } - - async command void DmaControl.clearENNMI(){ - DMACTL1 &= ~ENNMI; - } - - async command void DmaControl.setState(dma_state_t s){ - DMACTL1 = *(int*)&s; - } - - async command dma_state_t DmaControl.getState(){ - dma_state_t s; - s = *(dma_state_t*)&DMACTL1; - return s; - } - - async command void DmaControl.reset(){ - DMACTL0 = 0; - DMACTL1 = 0; - } - -} - diff --git a/tos/chips/msp430/dma/HplMsp430DmaXP.nc b/tos/chips/msp430/dma/HplMsp430DmaXP.nc deleted file mode 100644 index 9d1ab6583e..0000000000 --- a/tos/chips/msp430/dma/HplMsp430DmaXP.nc +++ /dev/null @@ -1,264 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holder nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @author Mark Hays - * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ - */ - -generic module HplMsp430DmaXP( uint16_t DMAxCTL_addr, - uint16_t DMAxSA_addr, - uint16_t DMAxDA_addr, - uint16_t DMAxSZ_addr, - uint16_t DMAxTSEL_mask, - uint16_t DMAxTSEL_shift ) @safe() { - - provides interface HplMsp430DmaChannel as DMA; - uses interface HplMsp430DmaInterrupt as Interrupt; - -} - -implementation { - - MSP430REG_NORACE( DMACTL0 ); - -#define DMAxCTL (*(volatile TYPE_DMA0CTL*)DMAxCTL_addr) -#define DMAxSA (*(volatile TYPE_DMA0SA*)DMAxSA_addr) -#define DMAxDA (*(volatile TYPE_DMA0DA*)DMAxDA_addr) -#define DMAxSZ (*(volatile TYPE_DMA0SZ*)DMAxSZ_addr) - - async event void Interrupt.fired() { - error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS; - if ( DMAxCTL & DMAIFG ) { - DMAxCTL &= ~DMAIFG; - DMAxCTL &= ~DMAABORT; - signal DMA.transferDone( error ); - } - } - - async error_t command DMA.setTrigger( dma_trigger_t trigger ) { - - if ( DMAxCTL & DMAEN ) - return FAIL; - - DMACTL0 = ( ( DMACTL0 & ~DMAxTSEL_mask ) | - ( ( trigger << DMAxTSEL_shift ) & DMAxTSEL_mask ) ); - - return SUCCESS; - - } - - async command void DMA.clearTrigger() { - DMACTL0 &= ~DMAxTSEL_mask; - } - - async command void DMA.setSingleMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_SINGLE_TRANSFER; - } - - async command void DMA.setBlockMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_BLOCK_TRANSFER; - } - - async command void DMA.setBurstMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_BURST_BLOCK_TRANSFER; - } - - async command void DMA.setRepeatedSingleMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_SINGLE_TRANSFER; - } - - async command void DMA.setRepeatedBlockMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_BLOCK_TRANSFER; - } - - async command void DMA.setRepeatedBurstMode() { - DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); - DMAxCTL |= DMA_REPEATED_BURST_BLOCK_TRANSFER; - } - - async command void DMA.setSrcNoIncrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_UNCHANGED; - } - - async command void DMA.setSrcDecrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_DECREMENTED; - } - - async command void DMA.setSrcIncrement() { - DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); - DMAxCTL |= DMA_ADDRESS_INCREMENTED; - } - - async command void DMA.setDstNoIncrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_UNCHANGED; - } - - async command void DMA.setDstDecrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_DECREMENTED; - } - - async command void DMA.setDstIncrement() { - DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); - DMAxCTL |= DMA_ADDRESS_INCREMENTED; - } - - async command void DMA.setWordToWord() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASWDW; - } - - async command void DMA.setByteToWord() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASBDW; - } - - async command void DMA.setWordToByte() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASWDB; - } - - async command void DMA.setByteToByte() { - DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); - DMAxCTL |= DMASBDB; - } - - async command void DMA.setEdgeSensitive() { - DMAxCTL &= ~DMALEVEL; - } - - async command void DMA.setLevelSensitive() { - DMAxCTL |= DMALEVEL; - } - - async command void DMA.enableDMA() { - DMAxCTL |= DMAEN; - } - - async command void DMA.disableDMA() { - DMAxCTL &= ~DMAEN; - } - - async command void DMA.enableInterrupt() { - DMAxCTL |= DMAIE; - } - - async command void DMA.disableInterrupt() { - DMAxCTL &= ~DMAIE; - } - - async command bool DMA.interruptPending() { - return !!( DMAxCTL & DMAIFG ); - } - - async command bool DMA.aborted() { - return !!( DMAxCTL & DMAABORT ); - } - - async command void DMA.triggerDMA() { - DMAxCTL |= DMAREQ; - } - - async command void DMA.setSrc( void *saddr ) { - DMAxSA = (uint16_t)saddr; - } - - async command void DMA.setDst( void *daddr ) { - DMAxDA = (uint16_t)daddr; - } - - async command void DMA.setSize( uint16_t sz ) { - DMAxSZ = sz; - } - - async command void DMA.setState( dma_channel_state_t s, - dma_channel_trigger_t t, - void* src, void* dest, - uint16_t size ) { - call DMA.setStateRaw( *(uint16_t*)&s, *(uint16_t*)&t, - src, dest, size); - } - - async command void DMA.setStateRaw( uint16_t s, uint16_t t, - void* src, void* dest, - uint16_t size ) { - DMAxSA = (uint16_t)src; - DMAxDA = (uint16_t)dest; - DMAxSZ = size; - call DMA.setTrigger((dma_trigger_t) t); - DMAxCTL = s; - } - - async command dma_channel_state_t DMA.getState() { - dma_channel_state_t s = *(dma_channel_state_t*) &DMAxCTL; - return s; - } - - async command void* DMA.getSource() { - return (void*)DMAxSA; - } - - async command void* DMA.getDestination() { - return (void*)DMAxDA; - } - - async command uint16_t DMA.getSize() { - return DMAxSZ; - } - - async command dma_channel_trigger_t DMA.getTrigger() { - dma_channel_trigger_t t; - t.trigger = ( DMACTL0 & DMAxTSEL_mask ) >> DMAxTSEL_shift; - return t; - } - - async command void DMA.reset() { - DMAxCTL = 0; - DMAxSA = 0; - DMAxDA = 0; - DMAxSZ = 0; - } -} - diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h deleted file mode 100644 index f83051e28d..0000000000 --- a/tos/chips/msp430/dma/Msp430Dma.h +++ /dev/null @@ -1,192 +0,0 @@ -/** - * Copyright (c) 2009 DEXMA SENSORS SL - * Copyright (c) 2005-2006 Arch Rock Corporation - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the COPYRIGHT HOLDERS nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT HOLDERS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Mark Hays - * @author Xavier Orduna - * $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $ - */ - -#ifndef MSP430DMA_H -#define MSP430DMA_H - -// General stuff -enum { - DMA_CHANNELS = 3 -}; - -enum { - DMA_CHANNEL0 = 0, - DMA_CHANNEL1 = 1, - DMA_CHANNEL2 = 2, - DMA_CHANNEL_UNKNOWN = 3 -}; - -enum { - DMA_CHANNEL_AVAILABLE = 0, - DMA_CHANNEL_IN_USE = 1 -}; - -//////////////////////////////////////// -// Per-channel fields in DMACTL0 -enum { - DMA0TSEL_SHIFT = 0, - DMA1TSEL_SHIFT = 4, - DMA2TSEL_SHIFT = 8, - DMATSEL_MASK = (uint16_t)0xf, - DMA0TSEL_MASK = ( 0xf ), - DMA1TSEL_MASK = ( 0xf0 ), - DMA2TSEL_MASK = ( 0xf00 ), -}; - -// Per-field (channel) in DMACTL0 -typedef enum { - DMA_TRIGGER_DMAREQ = 0x0, // software trigger - DMA_TRIGGER_TACCR2 = 0x1, - DMA_TRIGGER_TBCCR2 = 0x2, - -#if defined(__msp430x261x) - DMA_TRIGGER_UCA0RXIFG = 0x3, // RX on USCIA0 (UART/SPI) - DMA_TRIGGER_UCA0TXIFG = 0x4, // TX on USCIA0 (UART/SPI) -#else - DMA_TRIGGER_URXIFG0 = 0x3, // RX on USART0 (UART/SPI) - DMA_TRIGGER_UTXIFG0 = 0x4, // TX on USART0 (UART/SPI) -#endif - DMA_TRIGGER_DAC12IFG = 0x5, // DAC12_0CTL DAC12IFG bit - DMA_TRIGGER_ADC12IFGx = 0x6, - DMA_TRIGGER_TACCR0 = 0x7, // CCIFG bit - DMA_TRIGGER_TBCCR0 = 0x8, // CCIFG bit -#if defined(__msp430x261x) - DMA_TRIGGER_UCB0RXIFG = 0x9, // RX on USCIB0 (UART/SPI) - DMA_TRIGGER_UCB0TXIFG = 0xa, // TX on USCIB0 (UART/SPI) -#else - DMA_TRIGGER_URXIFG1 = 0x9, // RX on USART1 (UART/SPI) - DMA_TRIGGER_UTXIFG1 = 0xa, // TX on USART1 (UART/SPI) -#endif - DMA_TRIGGER_MULT = 0xb, // Hardware Multiplier Ready - DMA_TRIGGER_DMAxIFG = 0xe, // DMA0IFG triggers DMA channel 1 - // DMA1IFG triggers DMA channel 2 - // DMA2IFG triggers DMA channel 0 - DMA_TRIGGER_DMAE0 = 0xf // External Trigger DMAE0 -} dma_trigger_t; - -typedef struct dma_channel_trigger_s { - unsigned int trigger : 4; - unsigned int reserved : 12; -} __attribute__ ((packed)) dma_channel_trigger_t; - -//////////////////////////////////////// -// Bits in DMACTL1 -enum { - DISABLE_NMI = 0, - ENABLE_NMI = 1, -}; - -enum { - NOT_ROUND_ROBIN = 0, - ROUND_ROBIN = 1, -}; - -enum { - NOT_ON_FETCH = 0, - ON_FETCH = 1, -}; - -typedef struct dma_state_s { - unsigned int enableNMI : 1; - unsigned int roundRobin : 1; - unsigned int onFetch : 1; - unsigned int reserved : 13; -} __attribute__ ((packed)) dma_state_t; - -//////////////////////////////////////// -// Stuff in DMAxCTL - -// DMADTx -enum { - DMADT_SHIFT = 12, - DMADT_MASK = 0x7, -}; - -typedef enum { - DMA_SINGLE_TRANSFER = 0x0, - DMA_BLOCK_TRANSFER = 0x1, - DMA_BURST_BLOCK_TRANSFER = 0x2, - DMA_REPEATED_SINGLE_TRANSFER = 0x4, - DMA_REPEATED_BLOCK_TRANSFER = 0x5, - DMA_REPEATED_BURST_BLOCK_TRANSFER = 0x7 -} dma_transfer_mode_t; - -// DMA{SRC,DST}INCRx -enum { - DMASRCINCR_SHIFT = 8, - DMADSTINCR_SHIFT = 10, - DMAINCR_MASK = 0x3, -}; - -typedef enum { - DMA_ADDRESS_UNCHANGED = 0x0, - DMA_ADDRESS_DECREMENTED = 0x2, - DMA_ADDRESS_INCREMENTED = 0x3 -} dma_incr_t; - -typedef enum { - DMA_WORD = 0x0, - DMA_BYTE = 0x1 -} dma_byte_t; - -// DMALEVEL -typedef enum { - DMA_EDGE_SENSITIVE = 0x0, - DMA_LEVEL_SENSITIVE = 0x1 -} dma_level_t; - -typedef struct dma_channel_state_s { - unsigned int request : 1; - unsigned int abort : 1; - unsigned int interruptEnable : 1; - unsigned int interruptFlag : 1; - unsigned int enable : 1; - unsigned int level : 1; /* or edge- triggered */ - unsigned int srcByte : 1; /* or word */ - unsigned int dstByte : 1; - unsigned int srcIncrement : 2; /* or no-increment, decrement */ - unsigned int dstIncrement : 2; - unsigned int transferMode : 3; - unsigned int reserved2 : 1; -} __attribute__ ((packed)) dma_channel_state_t; - -#endif - diff --git a/tos/chips/msp430/dma/Msp430DmaC.nc b/tos/chips/msp430/dma/Msp430DmaC.nc deleted file mode 100644 index 9a661b3b76..0000000000 --- a/tos/chips/msp430/dma/Msp430DmaC.nc +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * Implementation of the HAL level component for the MSP430 DMA module. - * This configuration provides the available DMA channels through the - * MSP430DMA parameterized interface. If more channels are requested - * than available through unique("DMA"), there will be no mapping for - * that channel and compilation will fail. - * - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ - */ - -configuration Msp430DmaC { - - provides interface Msp430DmaControl as Control; - provides interface Msp430DmaChannel as Channel0; - provides interface Msp430DmaChannel as Channel1; - provides interface Msp430DmaChannel as Channel2; - -} -implementation { - - components HplMsp430DmaC as HplDmaC; - - components new Msp430DmaChannelP() as Channel0P; - Channel0 = Channel0P; - Channel0P.HplChannel -> HplDmaC.Channel0; - - components new Msp430DmaChannelP() as Channel1P; - Channel1 = Channel1P; - Channel1P.HplChannel -> HplDmaC.Channel1; - - components new Msp430DmaChannelP() as Channel2P; - Channel2 = Channel2P; - Channel2P.HplChannel -> HplDmaC.Channel2; - - components Msp430DmaControlP as ControlP; - Control = ControlP; - ControlP.HplControl -> HplDmaC; - ControlP.HplChannel0 -> HplDmaC.Channel0; - ControlP.HplChannel1 -> HplDmaC.Channel1; - ControlP.HplChannel2 -> HplDmaC.Channel2; - -} diff --git a/tos/chips/msp430/dma/Msp430DmaChannel.nc b/tos/chips/msp430/dma/Msp430DmaChannel.nc deleted file mode 100644 index f476b37fc9..0000000000 --- a/tos/chips/msp430/dma/Msp430DmaChannel.nc +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holder nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Ben Greenstein - * @author Joe Polastre - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ - */ - -#include "Msp430Dma.h" - -interface Msp430DmaChannel { - - /** - * Setup a transfer using explicit argument (most robust and simple - * mechanism and recommended for novice users) - * - * See MSP430DMA.h for parameter options - */ - async command error_t setupTransfer( dma_transfer_mode_t transfer_mode, - dma_trigger_t trigger, - dma_level_t level, - void *src_addr, - void *dst_addr, - uint16_t size, - dma_byte_t src_byte, - dma_byte_t dst_byte, - dma_incr_t src_incr, - dma_incr_t dst_incr ); - - /** - * Raw interface for setting up a DMA transfer. This function is - * intended to provide as much raw performance as possible but - * sacrifices type checking in the process. Recommended ONLY for - * advanced users that have very intricate knowledge of the MSP430 - * DMA module described in the user's guide. - * - * @param state The control register value, as specified by - * dma_control_state_t in MSP430DMA.h - * @param trigger The trigger for the DMA transfer. Should be one - * of the options from dma_trigger_t in MSP430DMA.h - * @param src Pointer to the source address - * @param dest Pointer to the destination address - * @param size Size of the DMA transfer - * - * See MSP430DMA.h for parameter options - */ - async command void setupTransferRaw( uint16_t state, uint16_t trigger, - void* src, void* dest, int size ); - - /** - * Enable the DMA module. Equivalent to setting the DMA enable bit. - * This function does not force a transfer. - */ - async command error_t startTransfer(); - - /** - * Repeat a DMA transfer using previous settings but new pointers - * and transfer size. Automatically starts the transfer (sets the - * enable bit). - */ - async command error_t repeatTransfer( void *src_addr, void *dst_addr, - uint16_t size ); - - /** - * Trigger a DMA transfer using software - */ - async command error_t softwareTrigger(); - - /** - * Stop a DMA transfer in progress - */ - async command error_t stopTransfer(); - - /** - * Notification that the transfer has completed - */ - async event void transferDone(error_t success); - -} diff --git a/tos/chips/msp430/dma/Msp430DmaChannelP.nc b/tos/chips/msp430/dma/Msp430DmaChannelP.nc deleted file mode 100644 index 7ba2bbefbb..0000000000 --- a/tos/chips/msp430/dma/Msp430DmaChannelP.nc +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ - */ - -#include "Msp430Dma.h" - -generic module Msp430DmaChannelP() { - - provides interface Msp430DmaChannel as Channel; - uses interface HplMsp430DmaChannel as HplChannel; - -} - -implementation { - - norace dma_channel_state_t gChannelState; - norace dma_channel_trigger_t gChannelTrigger; - - async command void Channel.setupTransferRaw( uint16_t s, uint16_t t, - void* src, void* dest, - int size ) { - call HplChannel.setStateRaw( s, t, src, dest, size ); - } - - async command error_t Channel.setupTransfer( dma_transfer_mode_t transfer_mode, - dma_trigger_t trigger, - dma_level_t level, - void *src_addr, - void *dst_addr, - uint16_t size, - dma_byte_t src_byte, - dma_byte_t dst_byte, - dma_incr_t src_incr, - dma_incr_t dst_incr ) { - - gChannelState.request = 0; - gChannelState.abort = 0; - gChannelState.interruptEnable = 1; - gChannelState.interruptFlag = 0; - gChannelState.enable = 0; /* don't start an xfer */ - gChannelState.level = level; - gChannelState.srcByte = src_byte; - gChannelState.dstByte = dst_byte; - gChannelState.srcIncrement = src_incr; - gChannelState.dstIncrement = dst_incr; - gChannelState.transferMode = transfer_mode; - - gChannelTrigger.trigger = trigger; - - call HplChannel.setState( gChannelState, gChannelTrigger, - src_addr, dst_addr, size ); - - return SUCCESS; - - } - - async command error_t Channel.startTransfer() { - call HplChannel.enableDMA(); - return SUCCESS; - } - - async command error_t Channel.repeatTransfer( void *src_addr, - void *dst_addr, - uint16_t size ) { - call HplChannel.setSrc( src_addr ); - call HplChannel.setDst(dst_addr); - call HplChannel.setSize(size); - call HplChannel.enableDMA(); - return SUCCESS; - } - - async command error_t Channel.softwareTrigger() { - if (gChannelTrigger.trigger != DMA_TRIGGER_DMAREQ) - return FAIL; - call HplChannel.triggerDMA(); - return SUCCESS; - } - - async command error_t Channel.stopTransfer() { - if ( gChannelState.transferMode != DMA_BURST_BLOCK_TRANSFER || - gChannelState.transferMode != DMA_REPEATED_BURST_BLOCK_TRANSFER) - return FAIL; - call HplChannel.disableDMA(); - return SUCCESS; - - } - - async event void HplChannel.transferDone( error_t error ) { - signal Channel.transferDone( error ); - } - - default async event void Channel.transferDone( error_t error ) {} - -} diff --git a/tos/chips/msp430/dma/Msp430DmaControl.nc b/tos/chips/msp430/dma/Msp430DmaControl.nc deleted file mode 100644 index 4a7fee26b9..0000000000 --- a/tos/chips/msp430/dma/Msp430DmaControl.nc +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the copyright holder nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Ben Greenstein - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ - */ - -#include "Msp430Dma.h" - -interface Msp430DmaControl { - async command void init(); - async command void setFlags( bool enable_nmi, bool round_robin, - bool on_fetch); -} diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc deleted file mode 100644 index 89dc05c953..0000000000 --- a/tos/chips/msp430/dma/Msp430DmaControlP.nc +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * Copyright (c) 2000-2005 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - */ - -/** - * @author Ben Greenstein - * @author Jonathan Hui - * @author Joe Polastre - * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ - */ - -#include "Msp430Dma.h" - -module Msp430DmaControlP { - - provides interface Msp430DmaControl as Control; - - uses interface HplMsp430DmaControl as HplControl; - uses interface HplMsp430DmaChannel as HplChannel0; - uses interface HplMsp430DmaChannel as HplChannel1; - uses interface HplMsp430DmaChannel as HplChannel2; - -} - -implementation { - - async command void Control.init() { - call HplControl.reset(); - call HplChannel0.reset(); - call HplChannel1.reset(); - call HplChannel2.reset(); - } - - async command void Control.setFlags( bool enable_nmi, bool round_robin, - bool on_fetch ) { - - // NOTE: on_fetch must be true when dst addr is flash - - if (enable_nmi) call HplControl.setENNMI(); - else call HplControl.clearENNMI(); - if (round_robin) call HplControl.setRoundRobin(); - else call HplControl.clearRoundRobin(); - if (on_fetch) call HplControl.setOnFetch(); - else call HplControl.clearOnFetch(); - - } - - async event void HplChannel0.transferDone( error_t error ) {} - async event void HplChannel1.transferDone( error_t error ) {} - async event void HplChannel2.transferDone( error_t error ) {} - -} From b8ae76716a20f26187ccf9f84bc879491bbe0108 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 1 Oct 2011 03:32:10 -0700 Subject: [PATCH 188/411] Part 2 of removing old dma driver, move unified back into place. See prev commit. See commit 12f4328: After careful thought, remove old dma driver for motivation. It is extensive. Basically not worth the headache of trying to support both drivers. The old one is also somewhat uglier so this is better. I'm sure someone will disagree. Alas. --- tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaC.nc | 0 tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaChannel.nc | 0 tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaChannelP.nc | 0 tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaControl.nc | 0 tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaControlP.nc | 0 tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaInterrupt.nc | 0 tos/chips/msp430/{dma_unified => dma}/Msp430Dma.h | 0 tos/chips/msp430/{dma_unified => dma}/Msp430DmaC.nc | 0 tos/chips/msp430/{dma_unified => dma}/Msp430DmaChannel.nc | 0 tos/chips/msp430/{dma_unified => dma}/Msp430DmaChannelP.nc | 0 tos/chips/msp430/{dma_unified => dma}/Msp430DmaControl.nc | 0 tos/chips/msp430/{dma_unified => dma}/Msp430DmaControlP.nc | 0 tos/chips/msp430/{dma_unified => dma}/tests/DmaC.nc | 0 tos/chips/msp430/{dma_unified => dma}/tests/DmaP.nc | 0 tos/chips/msp430/{dma_unified => dma}/tests/Makefile | 0 tos/chips/msp430/{dma_unified => dma}/tests/README.txt | 0 16 files changed, 0 insertions(+), 0 deletions(-) rename tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaC.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaChannel.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaChannelP.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaControl.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaControlP.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/HplMsp430DmaInterrupt.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/Msp430Dma.h (100%) rename tos/chips/msp430/{dma_unified => dma}/Msp430DmaC.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/Msp430DmaChannel.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/Msp430DmaChannelP.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/Msp430DmaControl.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/Msp430DmaControlP.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/tests/DmaC.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/tests/DmaP.nc (100%) rename tos/chips/msp430/{dma_unified => dma}/tests/Makefile (100%) rename tos/chips/msp430/{dma_unified => dma}/tests/README.txt (100%) diff --git a/tos/chips/msp430/dma_unified/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc similarity index 100% rename from tos/chips/msp430/dma_unified/HplMsp430DmaC.nc rename to tos/chips/msp430/dma/HplMsp430DmaC.nc diff --git a/tos/chips/msp430/dma_unified/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc similarity index 100% rename from tos/chips/msp430/dma_unified/HplMsp430DmaChannel.nc rename to tos/chips/msp430/dma/HplMsp430DmaChannel.nc diff --git a/tos/chips/msp430/dma_unified/HplMsp430DmaChannelP.nc b/tos/chips/msp430/dma/HplMsp430DmaChannelP.nc similarity index 100% rename from tos/chips/msp430/dma_unified/HplMsp430DmaChannelP.nc rename to tos/chips/msp430/dma/HplMsp430DmaChannelP.nc diff --git a/tos/chips/msp430/dma_unified/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc similarity index 100% rename from tos/chips/msp430/dma_unified/HplMsp430DmaControl.nc rename to tos/chips/msp430/dma/HplMsp430DmaControl.nc diff --git a/tos/chips/msp430/dma_unified/HplMsp430DmaControlP.nc b/tos/chips/msp430/dma/HplMsp430DmaControlP.nc similarity index 100% rename from tos/chips/msp430/dma_unified/HplMsp430DmaControlP.nc rename to tos/chips/msp430/dma/HplMsp430DmaControlP.nc diff --git a/tos/chips/msp430/dma_unified/HplMsp430DmaInterrupt.nc b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc similarity index 100% rename from tos/chips/msp430/dma_unified/HplMsp430DmaInterrupt.nc rename to tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc diff --git a/tos/chips/msp430/dma_unified/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h similarity index 100% rename from tos/chips/msp430/dma_unified/Msp430Dma.h rename to tos/chips/msp430/dma/Msp430Dma.h diff --git a/tos/chips/msp430/dma_unified/Msp430DmaC.nc b/tos/chips/msp430/dma/Msp430DmaC.nc similarity index 100% rename from tos/chips/msp430/dma_unified/Msp430DmaC.nc rename to tos/chips/msp430/dma/Msp430DmaC.nc diff --git a/tos/chips/msp430/dma_unified/Msp430DmaChannel.nc b/tos/chips/msp430/dma/Msp430DmaChannel.nc similarity index 100% rename from tos/chips/msp430/dma_unified/Msp430DmaChannel.nc rename to tos/chips/msp430/dma/Msp430DmaChannel.nc diff --git a/tos/chips/msp430/dma_unified/Msp430DmaChannelP.nc b/tos/chips/msp430/dma/Msp430DmaChannelP.nc similarity index 100% rename from tos/chips/msp430/dma_unified/Msp430DmaChannelP.nc rename to tos/chips/msp430/dma/Msp430DmaChannelP.nc diff --git a/tos/chips/msp430/dma_unified/Msp430DmaControl.nc b/tos/chips/msp430/dma/Msp430DmaControl.nc similarity index 100% rename from tos/chips/msp430/dma_unified/Msp430DmaControl.nc rename to tos/chips/msp430/dma/Msp430DmaControl.nc diff --git a/tos/chips/msp430/dma_unified/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc similarity index 100% rename from tos/chips/msp430/dma_unified/Msp430DmaControlP.nc rename to tos/chips/msp430/dma/Msp430DmaControlP.nc diff --git a/tos/chips/msp430/dma_unified/tests/DmaC.nc b/tos/chips/msp430/dma/tests/DmaC.nc similarity index 100% rename from tos/chips/msp430/dma_unified/tests/DmaC.nc rename to tos/chips/msp430/dma/tests/DmaC.nc diff --git a/tos/chips/msp430/dma_unified/tests/DmaP.nc b/tos/chips/msp430/dma/tests/DmaP.nc similarity index 100% rename from tos/chips/msp430/dma_unified/tests/DmaP.nc rename to tos/chips/msp430/dma/tests/DmaP.nc diff --git a/tos/chips/msp430/dma_unified/tests/Makefile b/tos/chips/msp430/dma/tests/Makefile similarity index 100% rename from tos/chips/msp430/dma_unified/tests/Makefile rename to tos/chips/msp430/dma/tests/Makefile diff --git a/tos/chips/msp430/dma_unified/tests/README.txt b/tos/chips/msp430/dma/tests/README.txt similarity index 100% rename from tos/chips/msp430/dma_unified/tests/README.txt rename to tos/chips/msp430/dma/tests/README.txt From 59bfe8a1d52ddaa90083c6f827a721eda6af1ace Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 4 Oct 2011 23:57:39 -0700 Subject: [PATCH 189/411] sudo needs to be after key import --- 00b_Development_Environment | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/00b_Development_Environment b/00b_Development_Environment index 46a88c713c..41361a79f9 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -71,14 +71,14 @@ You want to follow the instructions at: http://tinyprod.net/debian-dev. The following should be equivilent. With some additions... -sudo -s - # # add the keys for Razvan, the package signer # gpg --keyserver subkeys.pgp.net --recv-keys F99BE531 gpg -a --export F99BE531 | sudo apt-key add - +sudo -s + # # add a repo pointer into sources.list # From 1bacddaa7bb7e64f502f3bf7adeecdf7e7c3852d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 5 Oct 2011 00:01:29 -0700 Subject: [PATCH 190/411] update support/sdk/c/sf/Makefile, install aux programs and libmote.a --- support/sdk/c/sf/Makefile.am | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/support/sdk/c/sf/Makefile.am b/support/sdk/c/sf/Makefile.am index eb8adc035a..a70d78525f 100644 --- a/support/sdk/c/sf/Makefile.am +++ b/support/sdk/c/sf/Makefile.am @@ -6,9 +6,10 @@ SERIAL_H = $(TOS)/lib/serial/Serial.h BUILT_SOURCES = serialpacket.h serialprotocol.h -bin_PROGRAMS=sf -noinst_PROGRAMS=prettylisten sflisten sfsend seriallisten serialsend -noinst_LIBRARIES=libmote.a +bin_PROGRAMS=sf prettylisten sflisten sfsend seriallisten serialsend +lib_LIBRARIES=libmote.a +#noinst_PROGRAMS=prettylisten sflisten sfsend seriallisten serialsend +#noinst_LIBRARIES=libmote.a sf_SOURCES = sf.c sf_LDADD = libmote.a From b7dba143baf1aeada21a3f7e43d19a5b17ba39d5 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 7 Oct 2011 01:37:44 -0700 Subject: [PATCH 191/411] finish switching over from KHZ to HZ x5, shimmer, telosa, and z1 --- tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc | 10 +++++----- tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h | 13 ++++++++++++- tos/platforms/shimmer/chips/cc2420x/Msp430ClockP.nc | 2 +- .../shimmer/chips/cc2420x/tmicro/Msp430ClockP.nc | 2 +- tos/platforms/telosa/chips/cc2420x/Msp430ClockP.nc | 2 +- .../telosa/chips/cc2420x/tmicro/Msp430ClockP.nc | 2 +- tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc | 2 +- 7 files changed, 22 insertions(+), 11 deletions(-) diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc index 2808e40460..311adde545 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockP.nc @@ -64,16 +64,16 @@ module Msp430XV2ClockP @safe() { * If somebody hasn't told us the preferred target DCO, look for it in * the legacy location */ -#ifndef TARGET_DCO_KHZ +#ifndef TARGET_DCO_HZ #include "Msp430DcoSpec.h" -#endif /* TARGET_DCO_KHZ */ +#endif /* TARGET_DCO_HZ */ /* Pick something based on target DCO */ -#if 4096 == TARGET_DCO_KHZ +#if 4194304 == TARGET_DCO_HZ #define MSP430XV2_DCO_CONFIG MSP430XV2_DCO_8MHz_RSEL3 -#else /* TARGET_DCO_KHZ value */ +#else /* TARGET_DCO_HZ value */ #define MSP430XV2_DCO_CONFIG MSP430XV2_DCO_8MHz_RSEL3 -#endif /* TARGET_DCO_KHZ value */ +#endif /* TARGET_DCO_HZ value */ #endif /* MSP430XV2_DCO_CONFIG */ command error_t Init.init() { diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h b/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h index 34c8c09e05..607f653010 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2Dco.h @@ -44,7 +44,7 @@ * DCO configuration is normally performed in Msp430XV2ClockControlP. * DCO rates below are in binary megahertz (viz., 4MiHz == 2^24Hz). In * the default implementation ACLK is always at 2^15 Hz (32KiHz), MCLK - * is always half the DCO rate, and SMCLK is scaled to be 1MHz + * is always half the DCO rate, and SMCLK is scaled to be 1MiHz * (2^20Hz). The frequency range selection value is taken from the * "DCO Frequency" table in the chip-specific electrical * characteristics datasheet. Where one DCO frequency is available as @@ -52,6 +52,17 @@ * with two different configurations, which may have different * stability characteristics. It is the developer's responsibility to * select the correct DCO/RSEL pairing for the target chip. + * + * Warning: TinyOS likes timers/clocks to be powers of 2. This probably + * was to make syncing the DCO to the 32KiHz time base easier. But this + * presents problems in juxtaposition with TI's chips. The x5 chips can + * have a variable Vcore which also determines what the maximum frequency + * supported is. All of the specs are given in terms of powers of ten. + * + * Relaxing the binary time constraint makes life easier for the h/w and + * makes it easier to run the cpu at the full speed for a given Vcore. + * This however makes TinyOS time a power of ten rather than binary. This + * probably isn't an issue as long as it is documented. */ /** Constants used to configure specific DCO rates on MSP430 chips. */ diff --git a/tos/platforms/shimmer/chips/cc2420x/Msp430ClockP.nc b/tos/platforms/shimmer/chips/cc2420x/Msp430ClockP.nc index 78ab12ac97..12283dd1f1 100644 --- a/tos/platforms/shimmer/chips/cc2420x/Msp430ClockP.nc +++ b/tos/platforms/shimmer/chips/cc2420x/Msp430ClockP.nc @@ -64,7 +64,7 @@ implementation enum { ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, + TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD, }; async command mcu_power_t McuPowerOverride.lowestState() { diff --git a/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430ClockP.nc b/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430ClockP.nc index f324f92390..072db6d546 100644 --- a/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430ClockP.nc +++ b/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430ClockP.nc @@ -54,7 +54,7 @@ implementation enum { ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, + TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD, }; async command mcu_power_t McuPowerOverride.lowestState() { diff --git a/tos/platforms/telosa/chips/cc2420x/Msp430ClockP.nc b/tos/platforms/telosa/chips/cc2420x/Msp430ClockP.nc index a02f1b6b3b..6f84f53261 100644 --- a/tos/platforms/telosa/chips/cc2420x/Msp430ClockP.nc +++ b/tos/platforms/telosa/chips/cc2420x/Msp430ClockP.nc @@ -64,7 +64,7 @@ implementation enum { ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, + TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD, }; async command mcu_power_t McuPowerOverride.lowestState() { diff --git a/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430ClockP.nc b/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430ClockP.nc index d7c7ca9cf2..aee5d45710 100644 --- a/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430ClockP.nc +++ b/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430ClockP.nc @@ -54,7 +54,7 @@ implementation enum { ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD + TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD }; async command mcu_power_t McuPowerOverride.lowestState() { diff --git a/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc b/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc index 59445af06d..1cb2bc7c89 100644 --- a/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc +++ b/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc @@ -60,7 +60,7 @@ implementation enum { ACLK_CALIB_PERIOD = 8, - TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, + TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD, }; async command mcu_power_t McuPowerOverride.lowestState() { From 330fbf3aeaddf51495316282b052e4ae4ebf5013 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 7 Oct 2011 01:38:58 -0700 Subject: [PATCH 192/411] switch default x5 from 16 MiHz to 4 MiHz --- tos/chips/msp430/x5xxx/Msp430DcoSpec.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tos/chips/msp430/x5xxx/Msp430DcoSpec.h b/tos/chips/msp430/x5xxx/Msp430DcoSpec.h index 43fe4ac656..3b0f892355 100644 --- a/tos/chips/msp430/x5xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x5xxx/Msp430DcoSpec.h @@ -53,13 +53,13 @@ #ifndef MS430DCOSPEC_H #define MS430DCOSPEC_H -/* 16 MiHZ */ -#define TARGET_DCO_HZ 16777216UL +/* 4 MiHZ, low power */ +#define TARGET_DCO_HZ 4194304UL #define ACLK_HZ 32768UL #define DIV_UIS 16 #ifdef notdef -#define TARGET_DCO_KHZ 16384 // the target DCO clock rate in binary kHz +#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz #define ACLK_KHZ 32 // the ACLK rate in binary kHz #endif From 8c3f170babff8f659058f6909adc2782b81e222a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 8 Oct 2011 01:38:01 -0700 Subject: [PATCH 193/411] Nuke unused Leds from x2xxx/usci/* files Left over from the Z1 folks debugging. Nuke it. Shouldn't be there. --- tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430SpiA0NoDmaP.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430SpiA1NoDmaP.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430SpiB0NoDmaP.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430SpiB1NoDmaP.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc | 1 - tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc | 1 - tos/chips/msp430/x2xxx/usci/Msp430UartA0P.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430UartA1P.nc | 3 --- tos/chips/msp430/x2xxx/usci/Msp430UartP.nc | 1 - 12 files changed, 30 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc index 66cdfb9c3a..792580bf7f 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0DmaP.nc @@ -84,7 +84,4 @@ implementation { #ifdef DMA_VERBOSE #warning Msp430SpiA0DmaP: using dma channels 1 and 2 #endif - - components LedsC as Leds; - SpiP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiA0NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0NoDmaP.nc index 5c6caa6d63..bdcc7a42b9 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiA0NoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA0NoDmaP.nc @@ -66,7 +66,4 @@ implementation { components HplMsp430UsciA0C as UsciC; SpiP.Usci -> UsciC; - - components LedsC as Leds; - SpiP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc index f820b5db35..30de4ffd72 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1DmaP.nc @@ -84,7 +84,4 @@ implementation { #ifdef DMA_VERBOSE #warning Msp430SpiA1DmaP: using dma channels 1 and 2 #endif - - components LedsC as Leds; - SpiP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiA1NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1NoDmaP.nc index e635d4edc8..37e53ef12d 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiA1NoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiA1NoDmaP.nc @@ -66,7 +66,4 @@ implementation { components HplMsp430UsciA1C as UsciC; SpiP.Usci -> UsciC; - - components LedsC as Leds; - SpiP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc index 3776d4e98b..be7a8b6b95 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0DmaP.nc @@ -84,7 +84,4 @@ implementation { #ifdef DMA_VERBOSE #warning Msp430SpiB0DmaP: using dma channels 1 and 2 #endif - - components LedsC as Leds; - SpiP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiB0NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0NoDmaP.nc index a8766f11a3..b1d28b1acb 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiB0NoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB0NoDmaP.nc @@ -66,7 +66,4 @@ implementation { components HplMsp430UsciB0C as UsciC; SpiP.Usci -> UsciC; - - components LedsC as Leds; - SpiP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiB1NoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1NoDmaP.nc index e91f22bcbb..daee37cdf4 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiB1NoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1NoDmaP.nc @@ -66,7 +66,4 @@ implementation { components HplMsp430UsciB1C as UsciC; SpiP.Usci -> UsciC; - - components LedsC as Leds; - SpiP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc index ad29feceec..636990f147 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc @@ -63,7 +63,6 @@ generic module Msp430SpiDmaP( uint16_t IFG_addr, interface Msp430SpiConfigure[uint8_t id ]; interface HplMsp430UsciB as Usci; interface HplMsp430UsciInterrupts as UsciInterrupts; - interface Leds; } } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc index 4a7bdd4497..0e88db7501 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaP.nc @@ -51,7 +51,6 @@ generic module Msp430SpiNoDmaP() { interface Msp430SpiConfigure[ uint8_t id ]; interface HplMsp430UsciB as Usci; interface HplMsp430UsciInterrupts as UsciInterrupts; - interface Leds; } } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UartA0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartA0P.nc index a630901828..59b1b1b1be 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UartA0P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartA0P.nc @@ -68,7 +68,4 @@ implementation { components Counter32khz16C as CounterC; UartP.Counter -> CounterC; - - components LedsC as Leds; - UartP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UartA1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartA1P.nc index af6e22e6f3..34a0ae52b5 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UartA1P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartA1P.nc @@ -68,7 +68,4 @@ implementation { components Counter32khz16C as CounterC; UartP.Counter -> CounterC; - - components LedsC as Leds; - UartP.Leds -> Leds; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc index e2995dd671..97854094a9 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc @@ -54,7 +54,6 @@ generic module Msp430UartP() { interface HplMsp430UsciA as Usci; interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; interface Counter; - interface Leds; } } From 7b0964533c2542a8fab787097ae3f88c93ed2808 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 8 Oct 2011 01:39:52 -0700 Subject: [PATCH 194/411] x2xxx/usci: SpiB1C, update comment about SpiB1 not supporting DMA --- tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc index 88242c1af5..4267aa8e86 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiB1C.nc @@ -40,7 +40,8 @@ * On the x2xxx processors, USCI_B1 does not have any DMA triggers available * on the DMA engine so SPI1 does not support DMA. Note.... This only * applies for the x2xxx processors. x5xxx processors have more triggers so - * can support DMA. How to handle. + * can support DMA. But the control files for this are in a completely different + * directory (x5xxx/usci). * * This argues for this being a platform thing. The platform indicates * what cpu is being used so also denotes what ports are available. From 221e0fddec34cdae2ff4d7ee2321843a67f07395 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 8 Oct 2011 01:40:46 -0700 Subject: [PATCH 195/411] x2xxx/usci: update misc documentation and warnings. --- tos/chips/msp430/x2xxx/usci/PrintfUART.h | 2 +- tos/chips/msp430/x5xxx/usci/msp430usci.h | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/tos/chips/msp430/x2xxx/usci/PrintfUART.h b/tos/chips/msp430/x2xxx/usci/PrintfUART.h index 4b95174aea..d6cc8484d3 100644 --- a/tos/chips/msp430/x2xxx/usci/PrintfUART.h +++ b/tos/chips/msp430/x2xxx/usci/PrintfUART.h @@ -84,7 +84,7 @@ #include #include -#warning including printfZ1 +#warning including x2xxx/usci/PrintfUART.h // ------------------------------------------------------------------- #ifdef PRINTFUART_ENABLED diff --git a/tos/chips/msp430/x5xxx/usci/msp430usci.h b/tos/chips/msp430/x5xxx/usci/msp430usci.h index 709bd29662..6c667b0aad 100644 --- a/tos/chips/msp430/x5xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci/msp430usci.h @@ -3,6 +3,7 @@ #include "msp430hardware.h" +/* when would this ever get used? */ #define MSP430_USCI_RESOURCE "Msp430Usci.Resource" #define MSP430_USCI_A0_RESOURCE "Msp430Usci.A0.Resource" @@ -36,6 +37,11 @@ typedef struct msp430_usci_config_t { #define TOS_DEFAULT_BAUDRATE 115200 #endif /* TOS_DEFAULT_BAUDRATE */ + +/* + * This table assumes UART clock input (SMCLK) is 1MiHz (2^20Hz). + */ + msp430_usci_config_t msp430_usci_uart_default_config = { /* N81 UART mode driven by SMCLK */ ctlw0 : (0 << 8) | UCSSEL__SMCLK, From 5887597a807d4299ef683b1bc31c107c653b0c07 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 8 Oct 2011 02:07:43 -0700 Subject: [PATCH 196/411] add insts. for using stow for sf program (support/sdk/c/sf/README) --- support/sdk/c/sf/README | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/support/sdk/c/sf/README b/support/sdk/c/sf/README index 100865c28d..80bdffbceb 100644 --- a/support/sdk/c/sf/README +++ b/support/sdk/c/sf/README @@ -9,6 +9,29 @@ running TinyOS 2.0. To build this SDK, run in the current directory and, if you wish, "make install" to install the C-based serial forwarder in /bin. +To install using stow: + + ./bootstrap + ./configure --prefix=/opt/stow/sf_c + make + + sudo -s + make install + + ("sudo make install" for some reason doesn't pick up the value of $TOSROOT properly so + the make install doesn't work write unless you are root first) + + This will install bin/{sf, sflisten, sfsend, seriallisten, serialsend}, include/{message.h, + serialsource.h, sfsource.h}, and lib/libmote.a. These will be installed into /opt/stow/sf_c. + + + Install into /opt/{bin,include,lib} using stow. (still root) + + cd /opt/stow + stow sf_c + + + This directory contains one utility: - sf: a C-based serial forwarder: sf From 9c76d5b829a8faa0c20f4c9de6c98de6c4eaf391 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 8 Oct 2011 02:28:07 -0700 Subject: [PATCH 197/411] print err code if forward_packet write fails --- support/sdk/c/sf/sf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/support/sdk/c/sf/sf.c b/support/sdk/c/sf/sf.c index f26fe81002..a1e980d2c9 100644 --- a/support/sdk/c/sf/sf.c +++ b/support/sdk/c/sf/sf.c @@ -238,7 +238,7 @@ void forward_packet(const void *packet, int len) if (ok < 0) exit(2); if (ok > 0) - fprintf(stderr, "Note: write failed\n"); + fprintf(stderr, "Note: write failed: %d\n", ok); } int main(int argc, char **argv) From 7fa1ddbf6ff1c3bc6fdf0786952af78a016d37ba Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 9 Oct 2011 04:45:41 -0700 Subject: [PATCH 198/411] USCI Pin mapping occurs in platforms//hardware/usci/PlatformUsciMapC.nc PlatformUsciMapC defines the mapping between USCI pins and where the pins actually are on the chip. This is done on a per platform basis because a CPU is herently a platform thing and also we only want to map what pins we are actually using.... Clean up various places where pin mapping erroneously got stuck in the msp430 core usci files. The core files are pin mapping agnostic and putting pin mappings out there actually cause problems. Change the mapping file from PlatformUsciInitC to PlatformUsciMapC. This better reflects what the purpose of this files is. It doesn't actually initilize anything. --- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc | 10 +--------- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc | 10 +--------- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc | 10 +--------- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc | 10 +--------- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc | 10 +--------- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc | 10 +--------- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc | 10 +--------- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc | 10 +--------- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc | 1 - tos/platforms/MoteISTx5/PlatformC.nc | 3 +++ .../usci/{PlatformUsciInitC.nc => PlatformUsciMapC.nc} | 2 +- tos/platforms/red/PlatformC.nc | 2 +- .../usci/{PlatformUsciInitC.nc => PlatformUsciMapC.nc} | 2 +- tos/platforms/surf/PlatformC.nc | 2 +- .../usci/{PlatformUsciInitC.nc => PlatformUsciMapC.nc} | 2 +- 15 files changed, 16 insertions(+), 78 deletions(-) rename tos/platforms/MoteISTx5/hardware/usci/{PlatformUsciInitC.nc => PlatformUsciMapC.nc} (98%) rename tos/platforms/red/hardware/usci/{PlatformUsciInitC.nc => PlatformUsciMapC.nc} (98%) rename tos/platforms/surf/hardware/usci/{PlatformUsciInitC.nc => PlatformUsciMapC.nc} (98%) diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc index 2038466302..5926ace18a 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A0 */ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -41,9 +42,6 @@ /** * Generic configuration for a client that shares USCI_A0 in SPI mode. - * - * Connected the SPI pins to HplMsp430GeneralIOC - * @author João Gonçalves */ generic configuration Msp430UsciSpiA0C() { @@ -68,10 +66,4 @@ implementation { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - - components HplMsp430GeneralIOC as GIO; - - SpiC.SIMO -> GIO.UCA0SIMO; - SpiC.SOMI -> GIO.UCA0SOMI; - SpiC.CLK -> GIO.UCA0CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc index f5ecb1efcb..35142ca156 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A1 */ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -41,9 +42,6 @@ /** * Generic configuration for a client that shares USCI_A1 in SPI mode. - * - * Connected the SPI pins to HplMsp430GeneralIOC - * @author João Gonçalves */ generic configuration Msp430UsciSpiA1C() { @@ -68,10 +66,4 @@ implementation { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - - components HplMsp430GeneralIOC as GIO; - - SpiC.SIMO -> GIO.UCA1SIMO; - SpiC.SOMI -> GIO.UCA1SOMI; - SpiC.CLK -> GIO.UCA1CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc index 8952f60479..48e994220d 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A2 */ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -41,9 +42,6 @@ /** * Generic configuration for a client that shares USCI_A2 in SPI mode. - * - * Connected the SPI pins to HplMsp430GeneralIOC - * @author João Gonçalves */ generic configuration Msp430UsciSpiA2C() { @@ -68,10 +66,4 @@ implementation { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - - components HplMsp430GeneralIOC as GIO; - - SpiC.SIMO -> GIO.UCA2SIMO; - SpiC.SOMI -> GIO.UCA2SOMI; - SpiC.CLK -> GIO.UCA2CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc index 9c8a90c9ae..62c5b267a9 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A3 */ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -41,9 +42,6 @@ /** * Generic configuration for a client that shares USCI_A3 in SPI mode. - * - * Connected the SPI pins to HplMsp430GeneralIOC - * @author João Gonçalves */ generic configuration Msp430UsciSpiA3C() { @@ -68,10 +66,4 @@ implementation { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - - components HplMsp430GeneralIOC as GIO; - - SpiC.SIMO -> GIO.UCA3SIMO; - SpiC.SOMI -> GIO.UCA3SOMI; - SpiC.CLK -> GIO.UCA3CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc index 3bf7318009..43815518e9 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -39,9 +40,6 @@ /** * Generic configuration for a client that shares USCI_B0 in SPI mode. - * - * Connected the SPI pins to HplMsp430GeneralIOC - * @author João Gonçalves */ generic configuration Msp430UsciSpiB0C() { @@ -66,10 +64,4 @@ implementation { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - - components HplMsp430GeneralIOC as GIO; - - SpiC.SIMO -> GIO.UCB0SIMO; - SpiC.SOMI -> GIO.UCB0SOMI; - SpiC.CLK -> GIO.UCB0CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc index 1cb2d91f76..787e4ae8c2 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B1 */ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -41,9 +42,6 @@ /** * Generic configuration for a client that shares USCI_B1 in SPI mode. - * - * Connected the SPI pins to HplMsp430GeneralIOC - * @author João Gonçalves */ generic configuration Msp430UsciSpiB1C() { @@ -68,10 +66,4 @@ implementation { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - - components HplMsp430GeneralIOC as GIO; - - SpiC.SIMO -> GIO.UCB1SIMO; - SpiC.SOMI -> GIO.UCB1SOMI; - SpiC.CLK -> GIO.UCB1CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc index 14088f6f2a..f91512649e 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B2 */ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -41,9 +42,6 @@ /** * Generic configuration for a client that shares USCI_B2 in SPI mode. - * - * Connected the SPI pins to HplMsp430GeneralIOC - * @author João Gonçalves */ generic configuration Msp430UsciSpiB2C() { @@ -68,10 +66,4 @@ implementation { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - - components HplMsp430GeneralIOC as GIO; - - SpiC.SIMO -> GIO.UCB2SIMO; - SpiC.SOMI -> GIO.UCB2SOMI; - SpiC.CLK -> GIO.UCB2CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc index 639b5604a1..28bf416c18 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc @@ -1,6 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B3 */ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -41,9 +42,6 @@ /** * Generic configuration for a client that shares USCI_B3 in SPI mode. - * - * Connected the SPI pins to HplMsp430GeneralIOC - * @author João Gonçalves */ generic configuration Msp430UsciSpiB3C() { @@ -68,10 +66,4 @@ implementation { Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; - - components HplMsp430GeneralIOC as GIO; - - SpiC.SIMO -> GIO.UCB3SIMO; - SpiC.SOMI -> GIO.UCB3SOMI; - SpiC.CLK -> GIO.UCB3CLK; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc index 7aaa13bdf8..6709625f44 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc @@ -59,7 +59,6 @@ generic module Msp430UsciSpiP () @safe() { interface Msp430UsciConfigure[ uint8_t client ]; interface ArbiterInfo; - interface Leds; } } implementation { diff --git a/tos/platforms/MoteISTx5/PlatformC.nc b/tos/platforms/MoteISTx5/PlatformC.nc index 5775392ab0..0ba4edbb5a 100755 --- a/tos/platforms/MoteISTx5/PlatformC.nc +++ b/tos/platforms/MoteISTx5/PlatformC.nc @@ -58,6 +58,9 @@ implementation { components PlatformLedsC; PlatformP.PlatformLeds -> PlatformLedsC; + components PlatformUsciMapC; + // No code initialization required; just connect the pins + components PlatformClockC; PlatformP.PlatformClock -> PlatformClockC; } diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciInitC.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc similarity index 98% rename from tos/platforms/MoteISTx5/hardware/usci/PlatformUsciInitC.nc rename to tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc index 73dc0de4fc..cdeee335a0 100755 --- a/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciInitC.nc +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc @@ -40,7 +40,7 @@ * @author Peter A. Bigot */ -configuration PlatformUsciInitC { +configuration PlatformUsciMapC { } implementation { components HplMsp430GeneralIOC as GIO; diff --git a/tos/platforms/red/PlatformC.nc b/tos/platforms/red/PlatformC.nc index c2e2a518de..d9a7964480 100644 --- a/tos/platforms/red/PlatformC.nc +++ b/tos/platforms/red/PlatformC.nc @@ -59,7 +59,7 @@ implementation { components PlatformLedC; //Surf Led System PlatformP.PlatformLed -> PlatformLedC; - components PlatformUsciInitC; + components PlatformUsciMapC; // No code initialization required; just connect the pins components Msp430PmmC; diff --git a/tos/platforms/red/hardware/usci/PlatformUsciInitC.nc b/tos/platforms/red/hardware/usci/PlatformUsciMapC.nc similarity index 98% rename from tos/platforms/red/hardware/usci/PlatformUsciInitC.nc rename to tos/platforms/red/hardware/usci/PlatformUsciMapC.nc index e9b8b6efca..6da62955f2 100644 --- a/tos/platforms/red/hardware/usci/PlatformUsciInitC.nc +++ b/tos/platforms/red/hardware/usci/PlatformUsciMapC.nc @@ -42,7 +42,7 @@ * @author Derek Baker */ -configuration PlatformUsciInitC { +configuration PlatformUsciMapC { } implementation { components HplMsp430GeneralIOC as GIO; diff --git a/tos/platforms/surf/PlatformC.nc b/tos/platforms/surf/PlatformC.nc index 57f918d06c..00038197cd 100644 --- a/tos/platforms/surf/PlatformC.nc +++ b/tos/platforms/surf/PlatformC.nc @@ -67,7 +67,7 @@ implementation { components PlatformLedC; PlatformP.PlatformLed -> PlatformLedC; - components PlatformUsciInitC; + components PlatformUsciMapC; // No code initialization required; just connect the pins components Msp430PmmC; diff --git a/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc b/tos/platforms/surf/hardware/usci/PlatformUsciMapC.nc similarity index 98% rename from tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc rename to tos/platforms/surf/hardware/usci/PlatformUsciMapC.nc index bd6d90b1d6..dccb2cb219 100644 --- a/tos/platforms/surf/hardware/usci/PlatformUsciInitC.nc +++ b/tos/platforms/surf/hardware/usci/PlatformUsciMapC.nc @@ -39,7 +39,7 @@ * @author Peter A. Bigot */ -configuration PlatformUsciInitC { +configuration PlatformUsciMapC { } implementation { components HplMsp430GeneralIOC as GIO; From 62bd07f6adedc506ff5cf112c9916d633c39190e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 9 Oct 2011 05:09:38 -0700 Subject: [PATCH 199/411] msp430: (x5) pins/GeneralIO: add usci ports {A,B}{2,3} Conflicts: tos/chips/msp430/pins/HplMsp430GeneralIOC.nc --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 78 ++++++++++++++++---- 1 file changed, 62 insertions(+), 16 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 329b9caaab..33db8d76a8 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -41,10 +41,6 @@ * @author Peter A. Bigot * @author Eric B. Decker * @author João Gonçalves - * - Mapped Pins for msp430x543x, msp430x541x. - * The duplicate functionality on different pins is not implemented - * because of the duplicate names. - * - Added ports 7,8,9,10,11 */ configuration HplMsp430GeneralIOC { @@ -169,7 +165,7 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as Port117; #endif - // provides special ports explicitly + // provides special ports explicitly // this section of HplMsp430GeneralIOC supports the F14x series // x1 family: msp430f149 and msp430f1611 @@ -326,8 +322,6 @@ configuration HplMsp430GeneralIOC { #if defined(__msp430x541x) || defined(__msp430x543x) -//duplicate ouputs on different pins from the ones mapped are not defined yet - provides interface HplMsp430GeneralIO as TA0CCR0; provides interface HplMsp430GeneralIO as TA0CCR1; provides interface HplMsp430GeneralIO as TA0CCR2; @@ -356,19 +350,19 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as ADC12CLK; provides interface HplMsp430GeneralIO as DMAE0; - provides interface HplMsp430GeneralIO as UCA0RXD; - provides interface HplMsp430GeneralIO as UCA0SOMI; - provides interface HplMsp430GeneralIO as UCA0TXD; - provides interface HplMsp430GeneralIO as UCA0SIMO; provides interface HplMsp430GeneralIO as UCA0CLK; provides interface HplMsp430GeneralIO as UCA0STE; + provides interface HplMsp430GeneralIO as UCA0TXD; + provides interface HplMsp430GeneralIO as UCA0RXD; + provides interface HplMsp430GeneralIO as UCA0SIMO; + provides interface HplMsp430GeneralIO as UCA0SOMI; + provides interface HplMsp430GeneralIO as UCB0CLK; provides interface HplMsp430GeneralIO as UCB0STE; - provides interface HplMsp430GeneralIO as UCB0SOMI; - provides interface HplMsp430GeneralIO as UCB0SCL; provides interface HplMsp430GeneralIO as UCB0SIMO; + provides interface HplMsp430GeneralIO as UCB0SOMI; provides interface HplMsp430GeneralIO as UCB0SDA; - provides interface HplMsp430GeneralIO as UCB0CLK; + provides interface HplMsp430GeneralIO as UCB0SCL; provides interface HplMsp430GeneralIO as UCA1CLK; provides interface HplMsp430GeneralIO as UCA1STE; @@ -384,7 +378,33 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as UCB1SDA; provides interface HplMsp430GeneralIO as UCB1SCL; -// Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 + provides interface HplMsp430GeneralIO as UCA2CLK; + provides interface HplMsp430GeneralIO as UCA2STE; + provides interface HplMsp430GeneralIO as UCA2TXD; + provides interface HplMsp430GeneralIO as UCA2RXD; + provides interface HplMsp430GeneralIO as UCA2SIMO; + provides interface HplMsp430GeneralIO as UCA2SOMI; + + provides interface HplMsp430GeneralIO as UCB2CLK; + provides interface HplMsp430GeneralIO as UCB2STE; + provides interface HplMsp430GeneralIO as UCB2SIMO; + provides interface HplMsp430GeneralIO as UCB2SOMI; + provides interface HplMsp430GeneralIO as UCB2SDA; + provides interface HplMsp430GeneralIO as UCB2SCL; + + provides interface HplMsp430GeneralIO as UCA3CLK; + provides interface HplMsp430GeneralIO as UCA3STE; + provides interface HplMsp430GeneralIO as UCA3TXD; + provides interface HplMsp430GeneralIO as UCA3RXD; + provides interface HplMsp430GeneralIO as UCA3SIMO; + provides interface HplMsp430GeneralIO as UCA3SOMI; + + provides interface HplMsp430GeneralIO as UCB3CLK; + provides interface HplMsp430GeneralIO as UCB3STE; + provides interface HplMsp430GeneralIO as UCB3SIMO; + provides interface HplMsp430GeneralIO as UCB3SOMI; + provides interface HplMsp430GeneralIO as UCB3SDA; + provides interface HplMsp430GeneralIO as UCB3SCL; provides interface HplMsp430GeneralIO as ADC0; provides interface HplMsp430GeneralIO as ADC1; @@ -975,7 +995,33 @@ implementation { UCB1SCL = P54; UCB1CLK = P55; -// Pins left to map of modules: UCB2/UCB3 and UCA2/UCA3 + UCA2CLK = P90; + UCA2STE = P93; + UCA2TXD = P94; + UCA2SIMO = P94; + UCA2RXD = P95; + UCA2SOMI = P95; + + UCB2STE = P90; + UCB2SIMO = P91; + UCB2SOMI = P92; + UCB2CLK = P93; + UCB2SDA = P91; + UCB2SCL = P92; + + UCA3CLK = P100; + UCA3STE = P103; + UCA3TXD = P104; + UCA3SIMO = P104; + UCA3RXD = P105; + UCA3SOMI = P105; + + UCB3STE = P100; + UCB3SIMO = P101; + UCB3SOMI = P102; + UCB3CLK = P103; + UCB3SDA = P101; + UCB3SCL = P102; ADC0 = P60; ADC1 = P61; From 90d15bc5dbf1cc6fdf071ebca226dd33edbe945a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 11 Oct 2011 03:10:10 -0700 Subject: [PATCH 200/411] msp430/x5: add SpiBlock.transfer, comment about SpiPacket, SpiByte, etc. Conflicts: tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc --- .../msp430/x5xxx/usci/Msp430UsciSpiA0C.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiA0P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiA1C.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiA1P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiA2C.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiA2P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiA3C.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiA3P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiB0C.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiB0P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiB1C.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiB1P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiB2C.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiB2P.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiB3C.nc | 4 +- .../msp430/x5xxx/usci/Msp430UsciSpiB3P.nc | 4 +- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc | 68 ++++++++-------- tos/interfaces/SpiBlock.nc | 77 +++++++++++++++++++ tos/interfaces/SpiInterfaces.txt | 48 ++++++++++++ 19 files changed, 211 insertions(+), 46 deletions(-) create mode 100644 tos/interfaces/SpiBlock.nc create mode 100644 tos/interfaces/SpiInterfaces.txt diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc index 5926ace18a..ea79874157 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciSpiA0C() { provides { interface Resource; interface SpiPacket; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; } @@ -62,7 +63,8 @@ implementation { components Msp430UsciSpiA0P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; - SpiByte = SpiC.SpiByte; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc index cacab860db..59d3abbd04 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA0P.nc @@ -3,6 +3,7 @@ configuration Msp430UsciSpiA0P { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -26,7 +27,8 @@ implementation { Msp430UsciConfigure = SpiC; ResourceConfigure = SpiC; SpiPacket = SpiC; - SpiByte = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; Msp430UsciError = SpiC; SIMO = SpiC.SIMO; SOMI = SpiC.SOMI; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc index 35142ca156..a8bfcf8b2f 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciSpiA1C() { provides { interface Resource; interface SpiPacket; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; } @@ -62,7 +63,8 @@ implementation { components Msp430UsciSpiA1P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; - SpiByte = SpiC.SpiByte; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc index db2169a5eb..9f4b0d7d18 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA1P.nc @@ -3,6 +3,7 @@ configuration Msp430UsciSpiA1P { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -26,7 +27,8 @@ implementation { Msp430UsciConfigure = SpiC; ResourceConfigure = SpiC; SpiPacket = SpiC; - SpiByte = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; Msp430UsciError = SpiC; SIMO = SpiC.SIMO; SOMI = SpiC.SOMI; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc index 48e994220d..7d874a8c68 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciSpiA2C() { provides { interface Resource; interface SpiPacket; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; } @@ -62,7 +63,8 @@ implementation { components Msp430UsciSpiA2P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; - SpiByte = SpiC.SpiByte; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc index e8cb90e0b3..0115bc5f63 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA2P.nc @@ -3,6 +3,7 @@ configuration Msp430UsciSpiA2P { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -26,7 +27,8 @@ implementation { Msp430UsciConfigure = SpiC; ResourceConfigure = SpiC; SpiPacket = SpiC; - SpiByte = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; Msp430UsciError = SpiC; SIMO = SpiC.SIMO; SOMI = SpiC.SOMI; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc index 62c5b267a9..1c6b5455cb 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciSpiA3C() { provides { interface Resource; interface SpiPacket; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; } @@ -62,7 +63,8 @@ implementation { components Msp430UsciSpiA3P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; - SpiByte = SpiC.SpiByte; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc index 81ccfb32c1..03eb70da2d 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiA3P.nc @@ -3,6 +3,7 @@ configuration Msp430UsciSpiA3P { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -26,7 +27,8 @@ implementation { Msp430UsciConfigure = SpiC; ResourceConfigure = SpiC; SpiPacket = SpiC; - SpiByte = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; Msp430UsciError = SpiC; SIMO = SpiC.SIMO; SOMI = SpiC.SOMI; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc index 43815518e9..8874d04da8 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0C.nc @@ -46,6 +46,7 @@ generic configuration Msp430UsciSpiB0C() { provides { interface Resource; interface SpiPacket; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; } @@ -60,7 +61,8 @@ implementation { components Msp430UsciSpiB0P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; - SpiByte = SpiC.SpiByte; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc index c9415c1515..296a1f827e 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB0P.nc @@ -1,6 +1,7 @@ configuration Msp430UsciSpiB0P { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -24,7 +25,8 @@ implementation { Msp430UsciConfigure = SpiC; ResourceConfigure = SpiC; SpiPacket = SpiC; - SpiByte = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; Msp430UsciError = SpiC; SIMO = SpiC.SIMO; SOMI = SpiC.SOMI; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc index 787e4ae8c2..1d7ec346e0 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciSpiB1C() { provides { interface Resource; interface SpiPacket; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; } @@ -62,7 +63,8 @@ implementation { components Msp430UsciSpiB1P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; - SpiByte = SpiC.SpiByte; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc index f7ad12aa3b..23a00b80f0 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB1P.nc @@ -3,6 +3,7 @@ configuration Msp430UsciSpiB1P { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -26,7 +27,8 @@ implementation { Msp430UsciConfigure = SpiC; ResourceConfigure = SpiC; SpiPacket = SpiC; - SpiByte = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; Msp430UsciError = SpiC; SIMO = SpiC.SIMO; SOMI = SpiC.SOMI; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc index f91512649e..aa767c9cab 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciSpiB2C() { provides { interface Resource; interface SpiPacket; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; } @@ -62,7 +63,8 @@ implementation { components Msp430UsciSpiB2P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; - SpiByte = SpiC.SpiByte; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc index 055eca4f7f..93fc7b3549 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB2P.nc @@ -3,6 +3,7 @@ configuration Msp430UsciSpiB2P { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -26,7 +27,8 @@ implementation { Msp430UsciConfigure = SpiC; ResourceConfigure = SpiC; SpiPacket = SpiC; - SpiByte = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; Msp430UsciError = SpiC; SIMO = SpiC.SIMO; SOMI = SpiC.SOMI; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc index 28bf416c18..49da8f3f0b 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciSpiB3C() { provides { interface Resource; interface SpiPacket; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; } @@ -62,7 +63,8 @@ implementation { components Msp430UsciSpiB3P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; - SpiByte = SpiC.SpiByte; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc index c14647f046..911e43d54b 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiB3P.nc @@ -3,6 +3,7 @@ configuration Msp430UsciSpiB3P { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -26,7 +27,8 @@ implementation { Msp430UsciConfigure = SpiC; ResourceConfigure = SpiC; SpiPacket = SpiC; - SpiByte = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; Msp430UsciError = SpiC; SIMO = SpiC.SIMO; SOMI = SpiC.SOMI; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc index 6709625f44..dd3b08b7b8 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc @@ -46,6 +46,7 @@ generic module Msp430UsciSpiP () @safe() { provides { interface SpiPacket[ uint8_t client ]; + interface SpiBlock; interface SpiByte; interface Msp430UsciError; interface ResourceConfigure[ uint8_t client ]; @@ -91,12 +92,12 @@ implementation { * * Assumes the USCI is currently in SPI mode. This will busy-wait * until any characters being actively transmitted or received are - * out of their shift register. It disables the interrupts, puts - * the USCI into software resent, and returns the SPI-related pins - * to their IO rather than module role. + * out of their shift register. The USCI is reset (which also + * disables interrupts) and returns the SPI-related pins to their + * IO function rather than module role. * - * The USCI is left in software reset mode to avoid power drain per - * CC430 errata UCS6. + * The USCI is left in software reset mode to avoid power drain. + * Errata UCS6 doesn't apply. */ void unconfigure_ () { while (UCBUSY & (call Usci.getStat())) { @@ -128,7 +129,8 @@ implementation { /* * Do basic configuration, leaving USCI in reset mode. Configure - * the SPI pins, enable the USCI, and turn on the interrupts. + * the SPI pins, enable the USCI, and leave interrupts off. Note + * reseting the USCI will kill the IEs so no need to do so explicitly. */ call Usci.configure(config, TRUE); call SIMO.makeOutput(); @@ -146,6 +148,7 @@ implementation { async command uint8_t SpiByte.write (uint8_t data) { uint8_t stat; + while (! (UCTXIFG & call Usci.getIfg())) { ; /* busywait */ } @@ -163,35 +166,40 @@ implementation { return data; } - async command error_t SpiPacket.send[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { - - uint16_t bytesLeft = len; - while (bytesLeft) { - while (! (UCTXIFG & call Usci.getIfg())) { - ; /* busywait */ - } - call Usci.setTxbuf(txBuf[len-bytesLeft]); - - while (! (UCRXIFG & call Usci.getIfg())) { - ; /* busywait */ - } + async command void SpiBlock.transfer(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { + uint8_t byt; + + while (len) { + while (!call Usci.isTxIntrPending()) + ; /* busy wait */ + byt = 0; + if (txBuf) + byt = *txBuf++; + call Usci.setTxbuf(byt); + while (!call Usci.isRxIntrPending()) + ; /* busy wait */ + byt = call Usci.getRxbuf(); + if (rxBuf) + *rxBuf++ = byt; + len--; + } + } - rxBuf[len-bytesLeft] = call Usci.getRxbuf(); - bytesLeft=bytesLeft-1; - } - /* - * WARNING: interrupts are disabled for this signal handler (event). This - * in general is a bad idea. We are doing it here because this is wired - * into the CC2420 stack which yields lots of non-atomic accesses. A redesign - * of some flavor would be needed to fix this unless we put an atomic here. - */ - atomic signal SpiPacket.sendDone[client](txBuf, rxBuf, len, SUCCESS); - return SUCCESS; + /* + * SpiPacket.send is improperly implemented. It should be split phase. Other msp430 families + * implement it using interrupts and/or dma. + * + * For the time being, the functionality implemented originally by the x5 SpiPacket, is now + * available in SpiBlock.transfer. This routine now returns FAIL. + */ + async command error_t SpiPacket.send[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { + return FAIL; } - default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error ) { } + default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, + uint8_t* rxBuf, uint16_t len, error_t error ) { } async event void Interrupts.interrupted (uint8_t iv) { if (! call ArbiterInfo.inUse()) { diff --git a/tos/interfaces/SpiBlock.nc b/tos/interfaces/SpiBlock.nc new file mode 100644 index 0000000000..28a124faa9 --- /dev/null +++ b/tos/interfaces/SpiBlock.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Send/Receive (transfer) SPI data, single phase. + * + * Similar to SpiPacket but is not split phase. Transfering any data + * on the SPI requires both a transmit and a receive. SpiBlock.write + * can be used for transmit, receive, or both simultaneously. + * + * Many SPI transfers are a small number of (>1) bytes. SpiPacket requires + * split phase and that costs a non-zero overhead. Potentially uses + * interrupts (which can be expensive) or DMA (much better for large data + * transfers). + * + * So we really want a more efficient small number of bytes mechanism. That + * is the purpose of SpiBlock. + * + * Often, an SPI bus must first be acquired using a Resource interface + * before sending commands with SPIPacket. In the case of multiple + * devices attached to a single SPI bus, chip select pins are often also + * used. + * + * @author Eric B. Decker + */ + +interface SpiBlock { + + /** + * Transmit/Receive a buffer over the SPI bus. (single phase, efficient) + * + * @param 'uint8_t* COUNT_NOK(len) txBuf' A pointer to the buffer to send + * over the bus. If this parameter is NULL, then CPU will + * write zeros. + * @param 'uint8_t* COUNT_NOK(len) rxBuf' A pointer to the buffer where + * received data should be stored. If this parameter is NULL, + * then incoming bytes will be discarded. + * @param len Length of the message. Note that non-NULL rxBuf and txBuf + * parameters must be AT LEAST as large as len, or buffer + * overflow will occur. + * + * @return SUCCESS + */ + + async command void transfer(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len); +} diff --git a/tos/interfaces/SpiInterfaces.txt b/tos/interfaces/SpiInterfaces.txt new file mode 100644 index 0000000000..515aceeea8 --- /dev/null +++ b/tos/interfaces/SpiInterfaces.txt @@ -0,0 +1,48 @@ +Spi Interfaces. + +There are three supplied interfaces to underlying SPI hardware: + +SpiByte: Single byte tx/rx interface. + +SpiBlock: tx buffer is sent, rx buffer received, single phase, + Intended to be a more efficient version of SpiPacket. + +SpiPacket: tx buffer sent, rx buffer received. Split phase. + Intended for interrupt driven or DMA driven transfers. + +Which approach is appropriate depends on a number of factors, including +SPI clock speed, transfer size, additional system activity, and desired +behaviour. Having the three different interface mechanisms allows tayloring +the system behaviour depending on various tradeoffs. + +The SPI bus is a bi-directional, simultaneous tx/rx, synchonously clocked +bus. As tranmitted bits are clocked out, received bits are clocked in +so simultaneous tx/rx occurs. + +Interfacing to the spi h/w can be done directly, using interrupts, or DMA. +Direct uses busy waits and accesses the h/w directly to achieve data transfer. +The busy waiting can be expensive but if the SPI clock speed is high +the waiting will be minimum and will avoid the overhead of other mechanisms. +SpiByte (single) and SpiBlock (multiple) implement busy wait mechanisms. +Both SpiByte and SpiBlock are single phase and provide very simple access +mechanisms. + +SpiPacket is split phase and can be used for the interface to an interrupt +based or DMA based implementaion. + + +Basically, the slower the SPI is clocked the more interrupt vs. direct +makes sense. The converse is also true, the faster the clock the more +direct access makes sense. + +For large data transfer sizes, DMA starts making more sense. This is +especially true when low power operation requires sleeping the CPU +as much as possible. + + +Consider an arbitrated, interrupt driven, SpiPacket, being clocked at 4MHz. +Each byte transfered will take 2uS and one interrupt will be generated for +each of the transmitted bytes and received bytes. 2 interrupts/2uS. This +presents a very high interrupt processing load. Whereas direct access +sees the byte available and processes it directly with out any of the +interrupt overhead. From f78e29326009719a5e0cdaa961c70f67cfccdf81 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 13 Oct 2011 02:31:34 -0700 Subject: [PATCH 201/411] install header files in /include --- support/sdk/c/sf/Makefile.am | 1 + 1 file changed, 1 insertion(+) diff --git a/support/sdk/c/sf/Makefile.am b/support/sdk/c/sf/Makefile.am index a70d78525f..cb5d8e06fd 100644 --- a/support/sdk/c/sf/Makefile.am +++ b/support/sdk/c/sf/Makefile.am @@ -8,6 +8,7 @@ BUILT_SOURCES = serialpacket.h serialprotocol.h bin_PROGRAMS=sf prettylisten sflisten sfsend seriallisten serialsend lib_LIBRARIES=libmote.a +include_HEADERS=sfsource.h serialsource.h message.h #noinst_PROGRAMS=prettylisten sflisten sfsend seriallisten serialsend #noinst_LIBRARIES=libmote.a From 18c270b2a270a88296e6b4fbfb8f579e1fc373fc Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 13 Oct 2011 02:34:53 -0700 Subject: [PATCH 202/411] Add SendBusy interface and AMQueue Add SendBusy interface (tos/interfaces) Add guts to AMQueueImplP --- tos/interfaces/SendBusy.nc | 10 ++++++++++ tos/system/AMQueueImplP.nc | 33 ++++++++++++++++++++++----------- 2 files changed, 32 insertions(+), 11 deletions(-) create mode 100644 tos/interfaces/SendBusy.nc diff --git a/tos/interfaces/SendBusy.nc b/tos/interfaces/SendBusy.nc new file mode 100644 index 0000000000..337fef898c --- /dev/null +++ b/tos/interfaces/SendBusy.nc @@ -0,0 +1,10 @@ + +interface SendBusy { + /** + * Check whether send queue entry is in use + * + * @return TRUE If client is active. + * FALSE Otherwise. + */ + command bool busy(); +} diff --git a/tos/system/AMQueueImplP.nc b/tos/system/AMQueueImplP.nc index 055f1de6ba..d7bb82111c 100644 --- a/tos/system/AMQueueImplP.nc +++ b/tos/system/AMQueueImplP.nc @@ -1,7 +1,7 @@ -// $Id: AMQueueImplP.nc,v 1.11 2010-06-29 22:07:56 scipio Exp $ /* -* Copyright (c) 2005 Stanford University. All rights reserved. -* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2005 Stanford University. All rights reserved. + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -37,13 +37,16 @@ * clients. * * @author Philip Levis - * @date Jan 16 2006 + * @author Eric B. Decker (cire831@gmail.com) */ #include "AM.h" generic module AMQueueImplP(int numClients) @safe() { - provides interface Send[uint8_t client]; + provides { + interface Send[uint8_t client]; + interface SendBusy[uint8_t client]; + } uses{ interface AMSend[am_id_t id]; interface AMPacket; @@ -60,12 +63,19 @@ implementation { queue_entry_t queue[numClients]; uint8_t cancelMask[numClients/8 + 1]; + command bool SendBusy.busy[uint8_t clientId]() { + if (clientId >= numClients) return TRUE; + if (queue[clientId].msg) return TRUE; + return FALSE; + } + void tryToSend(); void nextPacket() { uint8_t i; - current = (current + 1) % numClients; - for(i = 0; i < numClients; i++) { + + current = (current + 1) % numClients; + for(i = 0; i < numClients; i++) { if((queue[current].msg == NULL) || (cancelMask[current/8] & (1 << current%8))) { @@ -96,10 +106,10 @@ implementation { return EBUSY; } dbg("AMQueue", "AMQueue: request to send from %hhu (%p): passed checks\n", clientId, msg); - + queue[clientId].msg = msg; call Packet.setPayloadLength(msg, len); - + if (current >= numClients) { // queue empty error_t err; am_id_t amId = call AMPacket.type(msg); @@ -107,7 +117,7 @@ implementation { dbg("AMQueue", "%s: request to send from %hhu (%p): queue empty\n", __FUNCTION__, clientId, msg); current = clientId; - + err = call AMSend.send[amId](dest, msg, len); if (err != SUCCESS) { dbg("AMQueue", "%s: underlying send failed.\n", __FUNCTION__); @@ -141,7 +151,7 @@ implementation { } } } - + command error_t Send.cancel[uint8_t clientId](message_t* msg) { if (clientId >= numClients || // Not a valid client queue[clientId].msg == NULL || // No packet pending @@ -215,6 +225,7 @@ implementation { default event void Send.sendDone[uint8_t id](message_t* msg, error_t err) { // Do nothing } + default command error_t AMSend.send[uint8_t id](am_addr_t am_id, message_t* msg, uint8_t len) { return FAIL; } From e499ba60fcb1130a376051ed9ad0e765d4bd6ae7 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 20 Oct 2011 01:03:26 -0700 Subject: [PATCH 203/411] AMQueue: clean up modulo arith, too expensive. --- tos/system/AMQueueImplP.nc | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/tos/system/AMQueueImplP.nc b/tos/system/AMQueueImplP.nc index d7bb82111c..c40a179fe0 100644 --- a/tos/system/AMQueueImplP.nc +++ b/tos/system/AMQueueImplP.nc @@ -58,7 +58,7 @@ implementation { typedef struct { message_t* ONE_NOK msg; } queue_entry_t; - + uint8_t current = numClients; // mark as empty queue_entry_t queue[numClients]; uint8_t cancelMask[numClients/8 + 1]; @@ -70,20 +70,25 @@ implementation { } void tryToSend(); - + void nextPacket() { uint8_t i; - current = (current + 1) % numClients; + /* current = (current + 1) % numClients; + * which uses mult math and is expensive. Replaced with the following + * which is much more efficient. + */ + current++; + if (current >= numClients) + current = 0; for(i = 0; i < numClients; i++) { - if((queue[current].msg == NULL) || - (cancelMask[current/8] & (1 << current%8))) - { - current = (current + 1) % numClients; - } - else { - break; - } + if((queue[current].msg == NULL) || + (cancelMask[current/8] & (1 << current%8))) { + current++; + if (current >= numClients) + current = 0; + } else + break; } if(i >= numClients) current = numClients; } @@ -114,7 +119,7 @@ implementation { error_t err; am_id_t amId = call AMPacket.type(msg); am_addr_t dest = call AMPacket.destination(msg); - + dbg("AMQueue", "%s: request to send from %hhu (%p): queue empty\n", __FUNCTION__, clientId, msg); current = clientId; @@ -123,7 +128,6 @@ implementation { dbg("AMQueue", "%s: underlying send failed.\n", __FUNCTION__); current = numClients; queue[clientId].msg = NULL; - } return err; } @@ -136,6 +140,7 @@ implementation { task void CancelTask() { uint8_t i,j,mask,last; message_t *msg; + for(i = 0; i < numClients/8 + 1; i++) { if(cancelMask[i]) { for(mask = 1, j = 0; j < 8; j++) { @@ -195,7 +200,7 @@ implementation { } } } - + event void AMSend.sendDone[am_id_t id](message_t* msg, error_t err) { // Bug fix from John Regehr: if the underlying radio mixes things // up, we don't want to read memory incorrectly. This can occur @@ -213,7 +218,7 @@ implementation { __FUNCTION__, msg, queue[current].msg); } } - + command uint8_t Send.maxPayloadLength[uint8_t id]() { return call AMSend.maxPayloadLength[0](); } From ab8a3ee6f5799fcce6d268a74dae670c0725cdcb Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 00:50:09 -0700 Subject: [PATCH 204/411] SerialAM: Packet.clear should zero out metadata. --- tos/lib/serial/SerialActiveMessageP.nc | 2 ++ tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc | 2 ++ 2 files changed, 4 insertions(+) diff --git a/tos/lib/serial/SerialActiveMessageP.nc b/tos/lib/serial/SerialActiveMessageP.nc index 0f9b6bef0f..0cced49c2a 100644 --- a/tos/lib/serial/SerialActiveMessageP.nc +++ b/tos/lib/serial/SerialActiveMessageP.nc @@ -116,6 +116,8 @@ implementation { command void Packet.clear(message_t* msg) { memset(getHeader(msg), 0, sizeof(serial_header_t)); + /* no footer */ + memset(getMetadata(msg), 0, sizeof(serial_metadata_t)); return; } diff --git a/tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc b/tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc index 9a133f1c08..af2b794166 100644 --- a/tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc +++ b/tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc @@ -116,6 +116,8 @@ implementation { command void Packet.clear(message_t* msg) { memset(getHeader(msg), 0, sizeof(serial_header_t)); + /* no footer */ + memset(getMetadata(msg), 0, sizeof(serial_metadata_t)); return; } From 5a3e88273d5a0b044a702431acb3222fa18db0a2 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 01:21:09 -0700 Subject: [PATCH 205/411] Arbiter: significant rework, fix requested/release/request, other fixes. Reorganize and clean up Arbiter. Make easier to understand. clean up state names. Add RES_PREGRANT state for use by DefaultOwner changes. (make default owner capable of really owning the h/w including interrupts, more changes later commit). Make Requested/Release/Request really work. Formerly, the owner could easily get right back in. Need full queuing discipline. Protect the Arbiter queue so that a client can not under any circumstances be anywhere in the queue more than once. --- tos/system/ArbiterP.nc | 256 ++++++++++++++++++++++++++++++----------- 1 file changed, 190 insertions(+), 66 deletions(-) diff --git a/tos/system/ArbiterP.nc b/tos/system/ArbiterP.nc index cb2b1c4a04..d1f65f5135 100644 --- a/tos/system/ArbiterP.nc +++ b/tos/system/ArbiterP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011, Eric B. Decker * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * @@ -34,6 +35,7 @@ * This component provides the Resource, ResourceRequested, ArbiterInfo, * and ResourceDefaultOwner interfaces and uses the ResourceConfigure interface as * described in TEP 108. It provides arbitration to a shared resource. + * * A Queue is used to keep track of which users have put * in requests for the resource. Upon the release of the resource by one * of these users, the queue is checked and the next user @@ -47,8 +49,50 @@ * * @author Kevin Klues (klues@tkn.tu-berlin.de) * @author Philip Levis + * @author Eric B. Decker (cire831@gmail.com) + * + * WARNING: This Arbiter differs from the main TinyOS trunk Arbiter!..... It + * has the following features/bug fixes: + * + * ResourceRequested can be used to allow a holder of a resource to release + * and request upon an incoming request from another client. + * + * The previous arbiter (if no other resources queued up) would always immediately + * grant to the original holder (ie. the new requester would be starved). And other + * strange, out of order behaviour. + * + * The following is the sequence we are talking about: + * + * Client 1: Client 2: + * Holding resource + * new request comes up + * Sees ResourceRequested + * releases (this should let the new resource (or any other queued client) get the resource) + * requests + * client 2 gains control. + * + * There does need to be a mechanism to let a holder of the resource to check to see + * if (and possibly how many) other clients are waiting for the resource. There are + * cases where using the event (ResourceRequested) doesn't work because the clients + * have already posted their requests prior to the eventual resource holder gaining + * control. IT IS VERY EASY TO HANG THE ARBITER BECAUSE OF MISSED EVENTS. Use + * Request/Release at your own risk. + * + * + * Protection has been put in to insure that a given client can not end up with + * multiple requests queued up. This would give the client an unfair advantage + * and also would occur non-uniformly (depends on the sequence of execution). This + * problem could occur because while the Queueing mechanism does protect against multiple + * instances of the id in the queue, there is also the reqResId cell which is effectively + * the head of the queue. This must also be properly handled to prevent a client from + * getting into the queue multiple times. + * + * + * Provisions have been made to support DefaultOwners actually doing something with the + * hardware vs. just handling power. PREGRANT helps with this. Also the resId being + * default_owner_id indicates that h/w events should be steered to the DefaultOwner. */ - + generic module ArbiterP(uint8_t default_owner_id) @safe() { provides { interface Resource[uint8_t id]; @@ -64,27 +108,91 @@ generic module ArbiterP(uint8_t default_owner_id) @safe() { } implementation { - enum {RES_CONTROLLED, RES_GRANTING, RES_IMM_GRANTING, RES_BUSY}; + /* + * States: + * + * DEF_OWNED: (formely CONTROLLED), indicates that the DefaultOwner of the + * resource has control. Typically this will power down the resource, but can + * also be used to hook a default driver that runs when ever othe clients are + * not used the resource. + * + * PREGRANT denotes the resource state where a client has requested but the default + * owner still owns, vs GRANTING where the default owner has released the resource + * and will no longer receive resource event (such as data delivery). GRANTING vs. + * PREGRANT means the client will definitely be owning the resource soon. This was + * needed because of the DefaultOwner changes, where a DefaultOwner can really own + * the hardware rather than just handling power state. + * + * GRANTING: the resource ownership is in the process of switching to a new owner. + * + * IMM_GRANTING: same as GRANTING but indicates an immediate grant (from an immediate + * request). + * + * BUSY: the resource is owned by the client indicated in resId. + * + * + * state RES_DEF_OWNED means the default owner owns the resource rather than any + * client. Its value needs to be 0 so that when uninitilized memory (bss) is + * hit, state gets set to RES_DEF_OWNED. + */ + + typedef enum {RES_DEF_OWNED = 0, RES_PREGRANT, RES_GRANTING, + RES_IMM_GRANTING, RES_BUSY} + arb_state_t; + enum {default_owner_id = default_owner_id}; enum {NO_RES = 0xFF}; - uint8_t state = RES_CONTROLLED; + uint8_t state; /* init'd to 0, RES_DEF_OWNED */ norace uint8_t resId = default_owner_id; - norace uint8_t reqResId; + norace uint8_t reqResId = NO_RES; task void grantedTask(); async command error_t Resource.request[uint8_t id]() { + error_t rval; + + /* + * make sure that we respect queue order, determined by the queuing discipline. + */ + atomic { + /* + * Queue.enqueue should check for the id already being in the list. + * I don't think we want to have multiple instances of any id in the list + * of folks waiting for the arbiter (multiple requests for the same client?) + * + * We also need to check to see if this client is already waiting for the + * resource (ie. it is the next one to get it, reqResId). + */ + if (reqResId == id) /* already waiting for the resource. */ + return EBUSY; + if ((rval = call Queue.enqueue(id))) + return rval; /* failed */ + } + signal ResourceRequested.requested[resId](); + + /* + * ResourceRequested.requested yanks on the current owner so that it may if desired + * take into account that others want the resource. As a consequence, requested may + * change state of the arbiter. + */ + atomic { - if(state == RES_CONTROLLED) { - state = RES_GRANTING; - reqResId = id; - } - else if (reqResId == id) { - return SUCCESS; - } - else return call Queue.enqueue(id); + /* + * if the resource owned by a client or will be then the current + * request just gets queued. In other words, we are done at this point. + * * This is also the most likely case, so bailing early is good. */ + if (state != RES_DEF_OWNED) + return SUCCESS; + + /* + * Default owner has the resource, this client will be next once + * the def_owner releases. Change state to PREGRANT, set reqResId, + * and tell the def_owner that the resource has been requested. + */ + state = RES_PREGRANT; + reqResId = call Queue.dequeue(); } signal ResourceDefaultOwner.requested(); return SUCCESS; @@ -93,37 +201,55 @@ implementation { async command error_t Resource.immediateRequest[uint8_t id]() { signal ResourceRequested.immediateRequested[resId](); atomic { - if(state == RES_CONTROLLED) { - state = RES_IMM_GRANTING; - reqResId = id; - } - else return FAIL; + /* + * Make sure that the default owner has it. Otherwise some other + * client owns the resource and immediateRequested has to fail. + */ + if (state != RES_DEF_OWNED) + return FAIL; + state = RES_IMM_GRANTING; + reqResId = id; } signal ResourceDefaultOwner.immediateRequested(); if(resId == id) { call ResourceConfigure.configure[resId](); return SUCCESS; } - atomic state = RES_CONTROLLED; + + /* + * We returned from immediateRequested and the requester + * still doesn't own the resource. The DefaultOwner has + * decided to keep it? So force back to DEF_OWNED. + */ + atomic state = RES_DEF_OWNED; return FAIL; } async command error_t Resource.release[uint8_t id]() { atomic { if(state == RES_BUSY && resId == id) { - if(call Queue.isEmpty() == FALSE) { + if(call Queue.isEmpty()) { + /* + * queue empty, no more client requests, give back to the + * default owner. + */ + resId = default_owner_id; + state = RES_DEF_OWNED; + call ResourceConfigure.unconfigure[id](); + signal ResourceDefaultOwner.granted(); + } else { + /* + * queue not empty, take next client from the queue + * and give the resource to them. Go immediately to + * GRANTING, which says the default owner doesn't + * need to release, already released. + */ reqResId = call Queue.dequeue(); resId = NO_RES; state = RES_GRANTING; post grantedTask(); call ResourceConfigure.unconfigure[id](); } - else { - resId = default_owner_id; - state = RES_CONTROLLED; - call ResourceConfigure.unconfigure[id](); - signal ResourceDefaultOwner.granted(); - } return SUCCESS; } } @@ -133,12 +259,14 @@ implementation { async command error_t ResourceDefaultOwner.release() { atomic { if(resId == default_owner_id) { - if(state == RES_GRANTING) { + if(state == RES_GRANTING || state == RES_PREGRANT) { + state = RES_GRANTING; post grantedTask(); return SUCCESS; } else if(state == RES_IMM_GRANTING) { resId = reqResId; + reqResId = NO_RES; state = RES_BUSY; return SUCCESS; } @@ -151,70 +279,66 @@ implementation { Check if the Resource is currently in use */ async command bool ArbiterInfo.inUse() { - atomic { - if (state == RES_CONTROLLED) - return FALSE; - } - return TRUE; + atomic return (state != RES_DEF_OWNED); } /** - Returns the current user of the Resource. - If there is no current user, the return value - will be 0xFF - */ + * Returns the current user of the Resource. + * + * formerly checked state, but now relies solely on current + * owner, ie. resId. Just return resId. If the + * default owner owns the resource then the resId will + * be one higher than the max client id. + * + * This was originally part of ResourceDefaultOwner + * (SerialDemux) changes. It is needed if a DefaultOwner + * actually needs to do something with the hardware. Ie. + * interrupts need to be steered to the ResourceDefaultOwner + * demultiplexer. In which case the client id (resId) is + * used to do the signal and needs to be a real number and not + * 0xff (NO_RES). + */ async command uint8_t ArbiterInfo.userId() { - atomic { - if(state != RES_BUSY) - return NO_RES; - return resId; - } + return resId; } - /** - * Returns my user id. + /** + * Is this client the owner of the resource. */ async command bool Resource.isOwner[uint8_t id]() { - atomic { - if(resId == id && state == RES_BUSY) return TRUE; - else return FALSE; - } + atomic return (resId == id && state == RES_BUSY); } async command bool ResourceDefaultOwner.isOwner() { - atomic return (state == RES_CONTROLLED - || (resId == default_owner_id - && (state == RES_GRANTING || state == RES_IMM_GRANTING))); + atomic return (state == RES_DEF_OWNED || state == RES_PREGRANT); } - + task void grantedTask() { atomic { resId = reqResId; + reqResId = NO_RES; state = RES_BUSY; } call ResourceConfigure.configure[resId](); signal Resource.granted[resId](); } - //Default event/command handlers for all of the other - //potential users/providers of the parameterized interfaces - //that have not been connected to. - default event void Resource.granted[uint8_t id]() { - } - default async event void ResourceRequested.requested[uint8_t id]() { - } - default async event void ResourceRequested.immediateRequested[uint8_t id]() { - } - default async event void ResourceDefaultOwner.granted() { - } +// Default event/command handlers for all of the other +// potential users/providers of the parameterized interfaces +// that have not been connected to. + + default event void Resource.granted[uint8_t id]() { } + default async event void ResourceRequested.requested[uint8_t id]() { } + default async event void ResourceRequested.immediateRequested[uint8_t id]() { } + default async event void ResourceDefaultOwner.granted() { } + default async command void ResourceConfigure.configure[uint8_t id]() { } + default async command void ResourceConfigure.unconfigure[uint8_t id]() { } + default async event void ResourceDefaultOwner.requested() { call ResourceDefaultOwner.release(); } + default async event void ResourceDefaultOwner.immediateRequested() { - call ResourceDefaultOwner.release(); - } - default async command void ResourceConfigure.configure[uint8_t id]() { - } - default async command void ResourceConfigure.unconfigure[uint8_t id]() { + call ResourceDefaultOwner.release(); } } From b780a88c96f394998825113e3336743ff1545703 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 00:43:38 -0700 Subject: [PATCH 206/411] add new arbiter test, TestReqRelease. use ResourceRequested interface to trigger a resource holder to give it up. Test the sequencing. This duplicates the old arbiter behaviour where release/request by the main holder, gives the resource back to the original holder. New arbiter doesn't have this behaviour. This test program demonstates that behaviour. --- apps/tests/arbiters/TestReqRelease/Makefile | 4 + apps/tests/arbiters/TestReqRelease/README.txt | 26 ++++ apps/tests/arbiters/TestReqRelease/ReqRelC.nc | 70 +++++++++ apps/tests/arbiters/TestReqRelease/ReqRelM.nc | 143 ++++++++++++++++++ 4 files changed, 243 insertions(+) create mode 100644 apps/tests/arbiters/TestReqRelease/Makefile create mode 100644 apps/tests/arbiters/TestReqRelease/README.txt create mode 100644 apps/tests/arbiters/TestReqRelease/ReqRelC.nc create mode 100644 apps/tests/arbiters/TestReqRelease/ReqRelM.nc diff --git a/apps/tests/arbiters/TestReqRelease/Makefile b/apps/tests/arbiters/TestReqRelease/Makefile new file mode 100644 index 0000000000..ce4eb5c7d7 --- /dev/null +++ b/apps/tests/arbiters/TestReqRelease/Makefile @@ -0,0 +1,4 @@ +COMPONENT=ReqRelC +#OPTFLAGS = -O0 +include $(MAKERULES) + diff --git a/apps/tests/arbiters/TestReqRelease/README.txt b/apps/tests/arbiters/TestReqRelease/README.txt new file mode 100644 index 0000000000..b7a3cf38d8 --- /dev/null +++ b/apps/tests/arbiters/TestReqRelease/README.txt @@ -0,0 +1,26 @@ +README for ReqRel +Author/Contact: cire831@gmail.com +@author Eric B. Decker (cire831@gmail.com) + +Description: + +Please refer to TEP 108 for more information about the components +this application is used to test. + +This application is used to test the functionality of the +FcfsArbiter component developed using the Resource +interface. Three Resource users are created. + +ResourceRequested is used to signal the current owner that +a new requester has shown up. The owner releases which allows +the new requester to get in. + + +Tools: + +None. + +Known bugs/limitations: + +None. + diff --git a/apps/tests/arbiters/TestReqRelease/ReqRelC.nc b/apps/tests/arbiters/TestReqRelease/ReqRelC.nc new file mode 100644 index 0000000000..d590624b58 --- /dev/null +++ b/apps/tests/arbiters/TestReqRelease/ReqRelC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Please refer to TEP 108 for more information about the components + * this application is used to test.

+ */ + +#define TEST_ARBITER_RESOURCE "Test.Arbiter.Resource" + +configuration ReqRelC{ } +implementation { + components MainC, ReqRelM as App, LedsC, + new TimerMilliC() as Timer0, + new TimerMilliC() as Timer1, + new TimerMilliC() as Timer2, + new FcfsArbiterC(TEST_ARBITER_RESOURCE) as Arbiter; + + enum { + R0 = unique(TEST_ARBITER_RESOURCE), + R1 = unique(TEST_ARBITER_RESOURCE), + R2 = unique(TEST_ARBITER_RESOURCE), + }; + + App -> MainC.Boot; + + App.Resource0 -> Arbiter.Resource[R0]; + App.R0Requested -> Arbiter.ResourceRequested[R0]; + App.Timer0 -> Timer0; + + App.Resource1 -> Arbiter.Resource[R1]; + App.R1Requested -> Arbiter.ResourceRequested[R1]; + App.Timer1 -> Timer1; + + App.Resource2 -> Arbiter.Resource[R2]; + App.Timer2 -> Timer2; +// App.R2Requested -> Arbiter.ResourceRequested[R2]; + + App.Leds -> LedsC; +} diff --git a/apps/tests/arbiters/TestReqRelease/ReqRelM.nc b/apps/tests/arbiters/TestReqRelease/ReqRelM.nc new file mode 100644 index 0000000000..141979d72b --- /dev/null +++ b/apps/tests/arbiters/TestReqRelease/ReqRelM.nc @@ -0,0 +1,143 @@ +/* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Eric B. Decker (cire831@gmail.com) + */ + +/** + * This application is used to test the functionality of the + * FcfsArbiter component developed using the Resource + * interface. + * + * In particular, this test looks at what happens when a request + * is coupled to the current owners code via the ResourceRequested + * interface. Client0 then releases the resource (which allows the + * new requester to acquire the resource) and then gets back in line. + */ + +#include "Timer.h" + +module ReqRelM { + uses { + interface Boot; + interface Leds; + + interface Resource as Resource0; + interface ResourceRequested as R0Requested; + interface Timer as Timer0; + + interface Resource as Resource1; + interface ResourceRequested as R1Requested; + interface Timer as Timer1; + + interface Resource as Resource2; +// interface ResourceRequested as R2Requested; + interface Timer as Timer2; + } +} +implementation { + + #define HOLD_PERIOD 256 + + event void Boot.booted() { + call Resource0.request(); + } + + /* + * Resource 0 is the main background holder of the resource. + */ + event void Resource0.granted() { + call Timer0.startOneShot(HOLD_PERIOD); + call Leds.led0On(); + } + + event void Timer0.fired() { + call Leds.led0Off(); + call Resource1.request(); + } + + task void R0request() { + call Resource0.request(); + } + + async event void R0Requested.requested() { + call Resource0.release(); + call Resource0.request(); +// post R0request(); + } + + event void Resource1.granted() { + call Timer1.startOneShot(HOLD_PERIOD); + call Leds.led1On(); + } + + event void Timer1.fired() { + call Leds.led1Off(); + call Resource2.request(); + } + + task void R1request() { + call Resource1.request(); + } + + async event void R1Requested.requested() { + call Resource1.release(); +// post R1request(); +// call Resource1.request(); + } + + event void Resource2.granted() { + call Timer2.startOneShot(HOLD_PERIOD); + call Leds.led2On(); + } + + event void Timer2.fired() { + call Leds.led2Off(); + call Resource2.release(); + } + +#ifdef notdef + task void R2request() { + call Resource2.request(); + } + + async event void R2Requested.requested() { + call Resource2.release(); +// post R2request(); +// call Resource2.request(); + } +#endif + + async event void R0Requested.immediateRequested() { } + async event void R1Requested.immediateRequested() { } +// async event void R2Requested.immediateRequested() { } +} From 629ae69003f291b87b6cd5f6427447ed4cbb58b6 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 01:30:11 -0700 Subject: [PATCH 207/411] add msp/debug_noopt.extra, completly turn off optimization --- support/make/msp/debug_noopt.extra | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 support/make/msp/debug_noopt.extra diff --git a/support/make/msp/debug_noopt.extra b/support/make/msp/debug_noopt.extra new file mode 100644 index 0000000000..beaf530126 --- /dev/null +++ b/support/make/msp/debug_noopt.extra @@ -0,0 +1,8 @@ +#-*-Makefile-*- vim:syntax=make +# +# Modern GDB debuggers can handle optimized code pretty well so +# we no longer specify -O1 to turn optimization off to simplify +# debugging. Rather use the default optimization level which is -Os +# for size. + +OPTFLAGS += -O0 -g -fnesc-no-inline From 9403084923fc4e6b0546f5fea029dafb0b57b8bc Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 01:33:11 -0700 Subject: [PATCH 208/411] add I2CSA register to MSP430REG_NORACE --- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc | 1 + tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 1 + 2 files changed, 2 insertions(+) diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc index 4234689c04..676e67379f 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc @@ -80,6 +80,7 @@ implementation { MSP430REG_NORACE(UCB0TXBUF); MSP430REG_NORACE(UCB0RXBUF); MSP430REG_NORACE(UCB0I2COA); + MSP430REG_NORACE(UCB0I2CSA); MSP430REG_NORACE(UCB0I2CIE); async event void UsciRawInterrupts.rxDone(uint8_t temp) { diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index 326c5c5bae..02921c1c02 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -77,6 +77,7 @@ implementation { MSP430REG_NORACE(UCB1CTL1); MSP430REG_NORACE(UCB1STAT); MSP430REG_NORACE(UCB1I2COA); + MSP430REG_NORACE(UCB1I2CSA); MSP430REG_NORACE(UCB1I2CIE); MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCB1TXBUF); From 89ad349a4ac70defc16eedd0749f4ea503ea5e43 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 01:51:26 -0700 Subject: [PATCH 209/411] add support for h/w controlling DefaultOwners. This commit provides support for making a ResourceDefaultOwner being able to really control the h/w. This includes being able to steer h/w interrupts to a DefaultOwner module for processing. add ResourceDefaultOwnerInfo interface. Needed for having more than one module hung off the DefaultOwner interface. Add SerailDemux as an example. Has a GPS and Dock Serial module that both (at different times) can be controlling and receiving data from a single serial port (yes there is an external multiplexer too). --- .../usart/SerialDemux/Msp430UsartShare1P.nc | 67 +++++++++ .../SerialDemux/ResourceDefaultOwnerMux.nc | 56 ++++++++ .../msp430/usart/SerialDemux/SerialDemuxC.nc | 77 ++++++++++ .../msp430/usart/SerialDemux/SerialDemuxP.nc | 136 ++++++++++++++++++ .../msp430/usart/SerialDemux/SerialNullC.nc | 52 +++++++ .../msp430/usart/SerialDemux/SerialNullP.nc | 95 ++++++++++++ .../msp430/usart/SerialDemux/serial_demux.h | 20 +++ .../msp430/x2xxx/usci/Msp430UsciArbA0P.nc | 6 +- .../msp430/x2xxx/usci/Msp430UsciArbA1P.nc | 6 +- .../msp430/x2xxx/usci/Msp430UsciArbB0P.nc | 6 +- .../msp430/x2xxx/usci/Msp430UsciArbB1P.nc | 6 +- tos/interfaces/ResourceDefaultOwnerInfo.nc | 10 ++ tos/lib/mac/tkn154/SimpleTransferArbiterP.nc | 25 ++-- tos/system/ArbiterP.nc | 13 +- tos/system/FcfsArbiterC.nc | 45 ++---- tos/system/FcfsPriorityArbiterC.nc | 2 +- tos/system/FcfsResourceQueueC.nc | 8 +- tos/system/SimpleArbiterP.nc | 9 +- 18 files changed, 576 insertions(+), 63 deletions(-) create mode 100644 tos/chips/msp430/usart/SerialDemux/Msp430UsartShare1P.nc create mode 100644 tos/chips/msp430/usart/SerialDemux/ResourceDefaultOwnerMux.nc create mode 100644 tos/chips/msp430/usart/SerialDemux/SerialDemuxC.nc create mode 100644 tos/chips/msp430/usart/SerialDemux/SerialDemuxP.nc create mode 100644 tos/chips/msp430/usart/SerialDemux/SerialNullC.nc create mode 100644 tos/chips/msp430/usart/SerialDemux/SerialNullP.nc create mode 100644 tos/chips/msp430/usart/SerialDemux/serial_demux.h create mode 100644 tos/interfaces/ResourceDefaultOwnerInfo.nc diff --git a/tos/chips/msp430/usart/SerialDemux/Msp430UsartShare1P.nc b/tos/chips/msp430/usart/SerialDemux/Msp430UsartShare1P.nc new file mode 100644 index 0000000000..31b3de3c9c --- /dev/null +++ b/tos/chips/msp430/usart/SerialDemux/Msp430UsartShare1P.nc @@ -0,0 +1,67 @@ +/** + * Copyright (c) 2005-2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arched Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Vlado Handziski + * @author Jonathan Hui + * @author Eric B. Decker + * @version $Revision: 1.6 $ $Date: 2008/05/21 22:11:57 $ + */ + +configuration Msp430UsartShare1P { + + provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ]; + provides interface Resource[ uint8_t id ]; + provides interface ResourceRequested[ uint8_t id ]; + provides interface ArbiterInfo; + + uses interface ResourceConfigure[ uint8_t id ]; +} + +implementation { + + components new Msp430UsartShareP() as UsartShareP; + components HplMsp430Usart1C as UsartC; + + Interrupts = UsartShareP; + UsartShareP.RawInterrupts -> UsartC; + + components new FcfsArbiterC( MSP430_HPLUSART1_RESOURCE ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ArbiterInfo = ArbiterC; + UsartShareP.ArbiterInfo -> ArbiterC; + + components SerialDemuxC; + SerialDemuxC.ResourceDefaultOwner -> ArbiterC; + SerialDemuxC.ResourceDefaultOwnerInfo <- ArbiterC; +} diff --git a/tos/chips/msp430/usart/SerialDemux/ResourceDefaultOwnerMux.nc b/tos/chips/msp430/usart/SerialDemux/ResourceDefaultOwnerMux.nc new file mode 100644 index 0000000000..e0bc761030 --- /dev/null +++ b/tos/chips/msp430/usart/SerialDemux/ResourceDefaultOwnerMux.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2008, Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Eric B. Decker (cire831@gmail.com) + * @date: 2008/12/22 21:18:06 $ + */ + +interface ResourceDefaultOwnerMux { + /** + * Tell the multiplexer who is the current default owner. + * + * @param owner default owner to be set + * @return SUCCESS The new mux value has been set. + * FAIL The value requested is out of range. + */ + + async command error_t set_mux(uint8_t owner); + + /** + * Obtain the current default owner from the multiplexer. + * + * @return the current default owner + */ + + async command uint8_t get_mux(); +} diff --git a/tos/chips/msp430/usart/SerialDemux/SerialDemuxC.nc b/tos/chips/msp430/usart/SerialDemux/SerialDemuxC.nc new file mode 100644 index 0000000000..3c56a7881e --- /dev/null +++ b/tos/chips/msp430/usart/SerialDemux/SerialDemuxC.nc @@ -0,0 +1,77 @@ +/** + * SerialDemuxC - Configuration to wire up serial demuxing for USART1 + * See tos/chips/msp430/usart/Msp430UsartShare1P.nc for the wiring that + * causes this module to be invoked by the USART1 arbiter. + * + * Copyright @ 2008-2010 Eric B. Decker + * @author Eric B. Decker + * + * This module provides a DefaultOwner Multiplexer intended to sit on top + * of a shared resource that needs to have different default owners depending + * on system state. Only one default owner can be active at a time, and when + * the underlying arbiter indicates that the default owner should have control + * of the resource the current client default owner is given the grant. + * + * Default Owner clients connect via SerialDefOwnerClient (mux'd ResourceDefaultOwner). + * Clients must arbritrate for the priviledge of being the default owner via + * the SerialDemuxResource arbiter. The SerialDemuxResource also has a default + * owner (SerialDemuxDefaultOwner) that gets control when no clients wish to have + * control. This can be used to power down the serial hardware when no one is + * actively using it. + * + * At the bottom end is a ResourceDefaultOwner interface that connects to the + * arbiter controlling the underlying resource. When this arbiter signals + * ResourceDefaultOwner.granted this event is passed to the controlling + * client owner or to the SerialDemuxDefaultOwner. + * + * Control of the demultiplexer is handled via the ResourceDefaultOwnerMux interface. + * + **/ + +#include "serial_demux.h" +#include "msp430usart.h" + +configuration SerialDemuxC { + provides { + interface UartByte as SerialClientUartByte[uint8_t client_id]; + interface UartStream as SerialClientUartStream[uint8_t client_id]; + interface ResourceDefaultOwner as SerialDefOwnerClient[uint8_t client_id]; + interface Resource as SerialDemuxResource[uint8_t client_id]; + interface ResourceDefaultOwner as SerialDemuxDefaultOwner; + interface ResourceDefaultOwnerMux as MuxControl; + interface ResourceDefaultOwnerInfo; + } + + uses { + interface ResourceDefaultOwner; + } +} + +implementation { + components SerialDemuxP; + SerialClientUartStream = SerialDemuxP; + SerialClientUartByte = SerialDemuxP; + SerialDefOwnerClient = SerialDemuxP; + MuxControl = SerialDemuxP; + ResourceDefaultOwnerInfo = SerialDemuxP; + + /* + * The arbiter that controls the Usart1 resource uses ArbiterP which assigns + * default_owner_id to be uniqueCount(MSP430_HPLUSART1_RESOURCE). We use + * this id to wire in handlers for handling DefaultOwner interrupts. + */ + components Msp430Uart1P as UartP; + SerialDemuxP.UartByte -> UartP.UartByte[uniqueCount(MSP430_HPLUSART1_RESOURCE)]; + SerialDemuxP.UartStream -> UartP.UartStream[uniqueCount(MSP430_HPLUSART1_RESOURCE)]; + + components PanicC; + SerialDemuxP.Panic -> PanicC; + + components Msp430UsartShare1P as UsartShareP; + UartP.UsartInterrupts[uniqueCount(MSP430_HPLUSART1_RESOURCE)] -> UsartShareP.Interrupts[uniqueCount(MSP430_HPLUSART1_RESOURCE)]; + + components new FcfsArbiterC( SERIAL_DEMUX_RESOURCE ) as SerialDemuxArbiterC; + SerialDemuxResource = SerialDemuxArbiterC; + SerialDemuxDefaultOwner = SerialDemuxArbiterC; + ResourceDefaultOwner = SerialDemuxP; +} diff --git a/tos/chips/msp430/usart/SerialDemux/SerialDemuxP.nc b/tos/chips/msp430/usart/SerialDemux/SerialDemuxP.nc new file mode 100644 index 0000000000..0a39d38d36 --- /dev/null +++ b/tos/chips/msp430/usart/SerialDemux/SerialDemuxP.nc @@ -0,0 +1,136 @@ +/** + * Copyright @ 2008-2010 Eric B. Decker + * @author Eric B. Decker + */ + +#include "serial_demux.h" + +module SerialDemuxP { + provides { + interface UartByte as SerialClientUartByte[uint8_t client_id]; + interface UartStream as SerialClientUartStream[uint8_t client_id]; + interface ResourceDefaultOwner as SerialDefOwnerClient[uint8_t client_id]; + interface ResourceDefaultOwnerMux as MuxControl; + interface ResourceDefaultOwnerInfo; + } + + uses { + interface ResourceDefaultOwner; + interface UartByte; + interface UartStream; + interface Panic; + } +} + +implementation { + norace uint8_t serial_defowner = 0; + + void sdm_warn(uint8_t where, uint16_t p) { + call Panic.warn(PANIC_COMM, where, p, 0, 0, 0); + } + + async command error_t SerialClientUartByte.send[ uint8_t client_id ]( uint8_t data ) { + if (serial_defowner != client_id) { + sdm_warn(1, client_id); + return FAIL; + } + return call UartByte.send(data); + } + + async command error_t SerialClientUartByte.receive[ uint8_t client_id ]( uint8_t* byte, uint8_t timeout ) { + if (serial_defowner != client_id) { + sdm_warn(2, client_id); + return FAIL; + } + return call UartByte.receive(byte, timeout); + } + + async event void UartStream.receivedByte(uint8_t byte) { + signal SerialClientUartStream.receivedByte[serial_defowner](byte); + } + + async command error_t SerialClientUartStream.enableReceiveInterrupt[ uint8_t client_id ]() { + if (serial_defowner != client_id) { + sdm_warn(3, client_id); + return FAIL; + } + return call UartStream.enableReceiveInterrupt(); + } + + async command error_t SerialClientUartStream.disableReceiveInterrupt[ uint8_t client_id ]() { + if (serial_defowner != client_id) { + sdm_warn(4, client_id); + return FAIL; + } + return call UartStream.disableReceiveInterrupt(); + } + + async command error_t SerialClientUartStream.receive[ uint8_t client_id ]( uint8_t* buf, uint16_t len ) { + if (serial_defowner != client_id) { + sdm_warn(5, client_id); + return FAIL; + } + return call UartStream.receive(buf, len); + } + + async event void UartStream.receiveDone(uint8_t* buf, uint16_t len, error_t error) { + signal SerialClientUartStream.receiveDone[serial_defowner](buf, len, error); + } + + async command error_t SerialClientUartStream.send[ uint8_t client_id ]( uint8_t* buf, uint16_t len ) { + if (serial_defowner != client_id) { + sdm_warn(6, client_id); + return FAIL; + } + return call UartStream.send(buf, len); + } + + async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t error) { + signal SerialClientUartStream.sendDone[serial_defowner](buf, len, error); + } + + async command error_t MuxControl.set_mux(uint8_t owner) { + serial_defowner = owner; + return SUCCESS; + } + + async command uint8_t MuxControl.get_mux() { + return serial_defowner; + } + + async command error_t SerialDefOwnerClient.release[uint8_t client_id]() { + if (serial_defowner == client_id) + return call ResourceDefaultOwner.release(); + sdm_warn(7, client_id); + return FAIL; + } + + async command bool SerialDefOwnerClient.isOwner[uint8_t client_id]() { + if (serial_defowner != client_id) + return FALSE; + return call ResourceDefaultOwner.isOwner(); + } + + async event void ResourceDefaultOwner.granted() { + signal SerialDefOwnerClient.granted[serial_defowner](); + } + + async event void ResourceDefaultOwner.requested() { + signal SerialDefOwnerClient.requested[serial_defowner](); + } + + async event void ResourceDefaultOwner.immediateRequested() { + signal SerialDefOwnerClient.immediateRequested[serial_defowner](); + } + + async command bool ResourceDefaultOwnerInfo.inUse() { + return serial_defowner != 0; + } + + default async event void SerialDefOwnerClient.granted[uint8_t client_id]() {} + default async event void SerialDefOwnerClient.requested[uint8_t client_id]() {} + + default async event void SerialClientUartStream.sendDone[ uint8_t client_id ](uint8_t* buf, uint16_t len, error_t error) {} + default async event void SerialClientUartStream.receivedByte[ uint8_t client_id ](uint8_t byte) {} + default async event void SerialClientUartStream.receiveDone[ uint8_t client_id ]( uint8_t* buf, uint16_t len, error_t error ) {} +} diff --git a/tos/chips/msp430/usart/SerialDemux/SerialNullC.nc b/tos/chips/msp430/usart/SerialDemux/SerialNullC.nc new file mode 100644 index 0000000000..fa5472dc7f --- /dev/null +++ b/tos/chips/msp430/usart/SerialDemux/SerialNullC.nc @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2008 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Stanford University nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ERIC DECKER + * OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Eric B. Decker (cire831@gmail.com) + * @date Dec 30, 2008 + */ + +#include "serial_demux.h" + +configuration SerialNullC { +} + +implementation { + components SerialNullP; + + components HplMsp430Usart1C; + SerialNullP.AsyncStdControl -> HplMsp430Usart1C; + + components SerialDemuxC; + SerialNullP.SerialDefOwner -> SerialDemuxC.SerialDefOwnerClient[SERIAL_OWNER_NULL]; + SerialNullP.MuxDefOwner -> SerialDemuxC.SerialDemuxDefaultOwner; + SerialNullP.MuxControl -> SerialDemuxC; +} diff --git a/tos/chips/msp430/usart/SerialDemux/SerialNullP.nc b/tos/chips/msp430/usart/SerialDemux/SerialNullP.nc new file mode 100644 index 0000000000..9ffb670427 --- /dev/null +++ b/tos/chips/msp430/usart/SerialDemux/SerialNullP.nc @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2008 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Stanford University nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD + * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Eric B. Decker (cire831@gmail.com) + * @date 28 May 2008 + */ + +module SerialNullP { + provides interface Init; + uses { + interface ResourceDefaultOwner as SerialDefOwner; + interface AsyncStdControl; + + interface ResourceDefaultOwner as MuxDefOwner; + interface ResourceDefaultOwnerMux as MuxControl; + } +} + +implementation { + + void serial_shutdown() { + mmP5out.ser_sel = SER_SEL_NONE; + call AsyncStdControl.stop(); + } + + void serial_turnon() { + call AsyncStdControl.start(); + } + + /* + * When we first start out the SerialDemuxResource is owned by its + * DefaultOwner (MuxDefOwner). The h/w state should be off. + */ + command error_t Init.init() { + serial_shutdown(); + return SUCCESS; + } + + async event void MuxDefOwner.granted() { + call MuxControl.set_mux(SERIAL_OWNER_NULL); + if (call SerialDefOwner.isOwner()) + serial_shutdown(); + } + + async event void MuxDefOwner.requested() { + call MuxDefOwner.release(); + } + + async event void MuxDefOwner.immediateRequested() { + call MuxDefOwner.release(); + } + + async event void SerialDefOwner.requested() { + serial_turnon(); + call SerialDefOwner.release(); + } + + async event void SerialDefOwner.immediateRequested() { + call AsyncStdControl.start(); + call SerialDefOwner.release(); + } + + async event void SerialDefOwner.granted() { + serial_shutdown(); + } +} diff --git a/tos/chips/msp430/usart/SerialDemux/serial_demux.h b/tos/chips/msp430/usart/SerialDemux/serial_demux.h new file mode 100644 index 0000000000..59474c5f7a --- /dev/null +++ b/tos/chips/msp430/usart/SerialDemux/serial_demux.h @@ -0,0 +1,20 @@ +/* + * serial_demux.h + * Copyright 2008-2010, Eric B. Decker + * Mam-Mark Project + */ + +#ifndef __SERIAL_DEMUX_H__ +#define __SERIAL_DEMUX_H__ + + +#define SERIAL_DEMUX_RESOURCE "Serial_Demux_Resource" + +enum { + SERIAL_OWNER_NULL = unique(SERIAL_DEMUX_RESOURCE), + SERIAL_OWNER_SERIAL = unique(SERIAL_DEMUX_RESOURCE), + SERIAL_OWNER_GPS = unique(SERIAL_DEMUX_RESOURCE), + SERIAL_OWNER_NUM_CLIENTS = uniqueCount(SERIAL_DEMUX_RESOURCE), +}; + +#endif /* __SERIAL_DEMUX_H__ */ diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0P.nc index 2d9022d091..b72b27ad8c 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA0P.nc @@ -46,7 +46,10 @@ configuration Msp430UsciArbA0P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; } - uses interface ResourceConfigure[ uint8_t id ]; + uses { + interface ResourceConfigure[ uint8_t id ]; + interface ResourceDefaultOwnerInfo; + } } implementation { @@ -61,6 +64,7 @@ implementation { ResourceRequested = ArbiterC; ResourceDefaultOwner = ArbiterC; ResourceConfigure = ArbiterC; + ResourceDefaultOwnerInfo = ArbiterC; ArbiterInfo = ArbiterC; UsciIntP.ArbiterInfo -> ArbiterC; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc index 99331d00ae..8ef156384b 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc @@ -46,7 +46,10 @@ configuration Msp430UsciArbA1P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; } - uses interface ResourceConfigure[ uint8_t id ]; + uses { + interface ResourceConfigure[ uint8_t id ]; + interface ResourceDefaultOwnerInfo; + } } implementation { @@ -61,6 +64,7 @@ implementation { ResourceRequested = ArbiterC; ResourceDefaultOwner = ArbiterC; ResourceConfigure = ArbiterC; + ResourceDefaultOwnerInfo = ArbiterC; ArbiterInfo = ArbiterC; UsciArbP.ArbiterInfo -> ArbiterC; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0P.nc index f6d19dd88e..d9741f8b61 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB0P.nc @@ -46,7 +46,10 @@ configuration Msp430UsciArbB0P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; } - uses interface ResourceConfigure[ uint8_t id ]; + uses { + interface ResourceConfigure[ uint8_t id ]; + interface ResourceDefaultOwnerInfo; + } } implementation { @@ -61,6 +64,7 @@ implementation { ResourceRequested = ArbiterC; ResourceDefaultOwner = ArbiterC; ResourceConfigure = ArbiterC; + ResourceDefaultOwnerInfo = ArbiterC; ArbiterInfo = ArbiterC; UsciIntP.ArbiterInfo -> ArbiterC; } diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1P.nc index 54c91c234d..13c2c534e7 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbB1P.nc @@ -46,7 +46,10 @@ configuration Msp430UsciArbB1P { interface ArbiterInfo; interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; } - uses interface ResourceConfigure[ uint8_t id ]; + uses { + interface ResourceConfigure[ uint8_t id ]; + interface ResourceDefaultOwnerInfo; + } } implementation { @@ -61,6 +64,7 @@ implementation { ResourceRequested = ArbiterC; ResourceDefaultOwner = ArbiterC; ResourceConfigure = ArbiterC; + ResourceDefaultOwnerInfo = ArbiterC; ArbiterInfo = ArbiterC; UsciIntP.ArbiterInfo -> ArbiterC; } diff --git a/tos/interfaces/ResourceDefaultOwnerInfo.nc b/tos/interfaces/ResourceDefaultOwnerInfo.nc new file mode 100644 index 0000000000..3fd4b64f30 --- /dev/null +++ b/tos/interfaces/ResourceDefaultOwnerInfo.nc @@ -0,0 +1,10 @@ + +interface ResourceDefaultOwnerInfo { + /** + * Check whether a DefaultOwner has an active client. + * + * @return TRUE If client is active. + * FALSE Otherwise. + */ + async command bool inUse(); +} diff --git a/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc b/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc index 32d58b7615..bdfcd5f1a3 100644 --- a/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc +++ b/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc @@ -144,16 +144,23 @@ implementation { } /** - Returns the current user of the Resource. - If there is no current user, the return value - will be 0xFF - */ + * Returns the current user of the Resource. + * + * formerly check state, but now relies on current + * owner, ie. resId. Just return resId. If the + * default owner owns the resource then the resId will + * be one higher than the max client id. + * + * This was originally part of ResourceDefaultOwner + * (SerialDemux) changes. It is needed if a DefaultOwner + * actually needs to do something with the hardware. Ie. + * interrupts need to be steared to the ResourceDefaultOwner + * demultiplexer. In which case the client id (resId) is + * used to do the signal and needs to be a real number and not + * 0xff. + */ async command uint8_t ArbiterInfo.userId() { - atomic { - if(state != RES_BUSY) - return NO_RES; - return resId; - } + atomic return resId; } /** diff --git a/tos/system/ArbiterP.nc b/tos/system/ArbiterP.nc index d1f65f5135..d817763635 100644 --- a/tos/system/ArbiterP.nc +++ b/tos/system/ArbiterP.nc @@ -101,6 +101,7 @@ generic module ArbiterP(uint8_t default_owner_id) @safe() { interface ArbiterInfo; } uses { + interface ResourceDefaultOwnerInfo; interface ResourceConfigure[uint8_t id]; interface ResourceQueue as Queue; interface Leds; @@ -277,9 +278,15 @@ implementation { /** Check if the Resource is currently in use + + DefaultOwner maybe busy using the resourse. Need extra level of check. */ async command bool ArbiterInfo.inUse() { - atomic return (state != RES_DEF_OWNED); + atomic { + if (state == RES_DEF_OWNED) + return call ResourceDefaultOwnerInfo.inUse(); + return TRUE; + } } /** @@ -341,4 +348,8 @@ implementation { default async event void ResourceDefaultOwner.immediateRequested() { call ResourceDefaultOwner.release(); } + + default async command bool ResourceDefaultOwnerInfo.inUse() { + return FALSE; + } } diff --git a/tos/system/FcfsArbiterC.nc b/tos/system/FcfsArbiterC.nc index 3674108980..75b80b128b 100644 --- a/tos/system/FcfsArbiterC.nc +++ b/tos/system/FcfsArbiterC.nc @@ -1,5 +1,7 @@ /* + * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005 Washington University in St. Louis. + * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -30,42 +32,6 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* - * Copyright (c) 2004, Technische Universitat Berlin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of the Technische Universitat Berlin nor the names - * of its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -/* - * - Revision ------------------------------------------------------------- - * $Revision: 1.7 $ - * $Date: 2010-06-29 22:07:56 $ - * ======================================================================== - */ - /** * Please refer to TEP 108 for more information about this component and its * intended use.

@@ -84,6 +50,7 @@ * @param resourceName -- The name of the Resource being shared * * @author Kevin Klues (klues@tkn.tu-berlin.de) + * @author Eric B. Decker (cire831@gmail.com) */ generic configuration FcfsArbiterC(char resourceName[]) { @@ -93,7 +60,10 @@ generic configuration FcfsArbiterC(char resourceName[]) { interface ResourceDefaultOwner; interface ArbiterInfo; } - uses interface ResourceConfigure[uint8_t id]; + uses { + interface ResourceConfigure[uint8_t id]; + interface ResourceDefaultOwnerInfo; + } } implementation { components MainC; @@ -107,6 +77,7 @@ implementation { ResourceDefaultOwner = Arbiter; ArbiterInfo = Arbiter; ResourceConfigure = Arbiter; + ResourceDefaultOwnerInfo = Arbiter; Arbiter.Queue -> Queue; } diff --git a/tos/system/FcfsPriorityArbiterC.nc b/tos/system/FcfsPriorityArbiterC.nc index 3f5e09888c..349f271007 100644 --- a/tos/system/FcfsPriorityArbiterC.nc +++ b/tos/system/FcfsPriorityArbiterC.nc @@ -299,7 +299,7 @@ implementation { will be 0xFF */ async command uint8_t ArbiterInfo.userId() { - atomic return resId; + return resId; } /** diff --git a/tos/system/FcfsResourceQueueC.nc b/tos/system/FcfsResourceQueueC.nc index 65427338ea..01c90d0d95 100644 --- a/tos/system/FcfsResourceQueueC.nc +++ b/tos/system/FcfsResourceQueueC.nc @@ -83,10 +83,10 @@ implementation { atomic { if(!(call FcfsQueue.isEnqueued(id))) { if(qHead == NO_ENTRY) - qHead = id; - else - resQ[qTail] = id; - qTail = id; + qHead = id; + else + resQ[qTail] = id; + qTail = id; return SUCCESS; } return EBUSY; diff --git a/tos/system/SimpleArbiterP.nc b/tos/system/SimpleArbiterP.nc index 742a2fdfd3..f85743386c 100644 --- a/tos/system/SimpleArbiterP.nc +++ b/tos/system/SimpleArbiterP.nc @@ -131,15 +131,10 @@ implementation { /** Returns the current user of the Resource. - If there is no current user, the return value - will be 0xFF + May return the default owner id. */ async command uint8_t ArbiterInfo.userId() { - atomic { - if(state != RES_BUSY) - return NO_RES; - return resId; - } + return resId; } /** From 56da31fc16f81533dd4e001ecae883053396d3c7 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 02:07:27 -0700 Subject: [PATCH 210/411] msp430: mm5s platform, add support Essentially a simplified mm5 prototype. Also supports the TI MSP430-5438 EVAL board. --- support/make/mm5s.target | 9 + tos/platforms/mm5s/.platform | 77 +++ tos/platforms/mm5s/Ieee154MessageC.nc | 70 +++ tos/platforms/mm5s/LocalIeeeEui64C.nc | 63 +++ tos/platforms/mm5s/PlatformC.nc | 66 +++ tos/platforms/mm5s/PlatformP.nc | 90 ++++ tos/platforms/mm5s/hardware.h | 84 ++++ .../mm5s/hardware/adc/DemoSensorC.nc | 56 +++ .../mm5s/hardware/adc/DemoSensorNowC.nc | 60 +++ .../mm5s/hardware/adc/DemoSensorStreamC.nc | 56 +++ .../mm5s/hardware/adc/PlatformAdcC.nc | 75 +++ tos/platforms/mm5s/hardware/adc/VoltageC.nc | 55 ++ .../mm5s/hardware/buttons/HplUserButtonC.nc | 55 ++ .../mm5s/hardware/buttons/SwitchToggleC.nc | 94 ++++ .../mm5s/hardware/buttons/UserButton.h | 46 ++ .../mm5s/hardware/buttons/UserButtonC.nc | 65 +++ .../mm5s/hardware/buttons/UserButtonP.nc | 78 +++ .../mm5s/hardware/clock/PlatformClockC.nc | 49 ++ .../mm5s/hardware/clock/PlatformClockP.nc | 472 ++++++++++++++++++ tos/platforms/mm5s/hardware/leds/LedsC.nc | 47 ++ tos/platforms/mm5s/hardware/leds/LedsP.nc | 51 ++ .../mm5s/hardware/leds/PlatformLedsC.nc | 66 +++ .../mm5s/hardware/leds/PlatformLedsP.nc | 148 ++++++ .../mm5s/hardware/pins/PlatformPinsC.nc | 49 ++ .../mm5s/hardware/pins/PlatformPinsP.nc | 67 +++ .../mm5s/hardware/usci/PlatformSerialC.nc | 74 +++ .../mm5s/hardware/usci/PlatformSerialP.nc | 58 +++ .../mm5s/hardware/usci/PlatformSpiC.nc | 29 ++ .../mm5s/hardware/usci/PlatformSpiP.nc | 17 + .../mm5s/hardware/usci/PlatformUsciMapC.nc | 60 +++ tos/platforms/mm5s/platform.h | 0 tos/platforms/mm5s/platform_message.h | 59 +++ 32 files changed, 2345 insertions(+) create mode 100755 support/make/mm5s.target create mode 100644 tos/platforms/mm5s/.platform create mode 100644 tos/platforms/mm5s/Ieee154MessageC.nc create mode 100644 tos/platforms/mm5s/LocalIeeeEui64C.nc create mode 100644 tos/platforms/mm5s/PlatformC.nc create mode 100644 tos/platforms/mm5s/PlatformP.nc create mode 100644 tos/platforms/mm5s/hardware.h create mode 100644 tos/platforms/mm5s/hardware/adc/DemoSensorC.nc create mode 100644 tos/platforms/mm5s/hardware/adc/DemoSensorNowC.nc create mode 100644 tos/platforms/mm5s/hardware/adc/DemoSensorStreamC.nc create mode 100644 tos/platforms/mm5s/hardware/adc/PlatformAdcC.nc create mode 100644 tos/platforms/mm5s/hardware/adc/VoltageC.nc create mode 100644 tos/platforms/mm5s/hardware/buttons/HplUserButtonC.nc create mode 100644 tos/platforms/mm5s/hardware/buttons/SwitchToggleC.nc create mode 100644 tos/platforms/mm5s/hardware/buttons/UserButton.h create mode 100644 tos/platforms/mm5s/hardware/buttons/UserButtonC.nc create mode 100644 tos/platforms/mm5s/hardware/buttons/UserButtonP.nc create mode 100644 tos/platforms/mm5s/hardware/clock/PlatformClockC.nc create mode 100644 tos/platforms/mm5s/hardware/clock/PlatformClockP.nc create mode 100644 tos/platforms/mm5s/hardware/leds/LedsC.nc create mode 100644 tos/platforms/mm5s/hardware/leds/LedsP.nc create mode 100644 tos/platforms/mm5s/hardware/leds/PlatformLedsC.nc create mode 100644 tos/platforms/mm5s/hardware/leds/PlatformLedsP.nc create mode 100644 tos/platforms/mm5s/hardware/pins/PlatformPinsC.nc create mode 100644 tos/platforms/mm5s/hardware/pins/PlatformPinsP.nc create mode 100644 tos/platforms/mm5s/hardware/usci/PlatformSerialC.nc create mode 100644 tos/platforms/mm5s/hardware/usci/PlatformSerialP.nc create mode 100644 tos/platforms/mm5s/hardware/usci/PlatformSpiC.nc create mode 100644 tos/platforms/mm5s/hardware/usci/PlatformSpiP.nc create mode 100644 tos/platforms/mm5s/hardware/usci/PlatformUsciMapC.nc create mode 100644 tos/platforms/mm5s/platform.h create mode 100644 tos/platforms/mm5s/platform_message.h diff --git a/support/make/mm5s.target b/support/make/mm5s.target new file mode 100755 index 0000000000..e7d3010569 --- /dev/null +++ b/support/make/mm5s.target @@ -0,0 +1,9 @@ +#-*-Makefile-*- vim:syntax=make + +PLATFORM = mm5s +MSP_MCU = msp430x5438 + +$(call TOSMake_include_platform,msp) + +mm5s: $(BUILD_DEPS) + @: diff --git a/tos/platforms/mm5s/.platform b/tos/platforms/mm5s/.platform new file mode 100644 index 0000000000..7afcbf4812 --- /dev/null +++ b/tos/platforms/mm5s/.platform @@ -0,0 +1,77 @@ +# Includes that should take precedence come first. Platforms come before +# chips because they may override files. These must be specified as +# @includes instead of -I's to @opts, otherwise the %T won't be processed +# by ncc. + +for (split(/\n/, <<'EOText' + + %P/hardware/adc + %P/hardware/buttons + %P/hardware/clock + %P/hardware/leds + %P/hardware/pins + %P/hardware/usci + + %T/chips/msp430/x5xxx + %T/chips/msp430/x5xxx/lpm + %T/chips/msp430/x5xxx/timer + %T/chips/msp430/x5xxx/usci + %T/chips/msp430 + %T/chips/msp430/pins + %T/chips/msp430/timer + + %T/chips/msp430/pmm + %T/chips/msp430/adc12 + + %T/chips/tmp112 + %T/chips/lis3dh + + %T/lib/timer + %T/lib/serial + %T/lib/power + %T/lib/printf + +EOText +)) { + s/\#.*$//; + s/^\s*//g; + s/\s*$//g; + push(@includes, $_) if $_; +} + +@opts = qw( + -gcc=msp430-gcc + -mmcu=msp430x5438 + -fnesc-target=msp430 + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask +); + + + +#push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; +#push @opts, "-mingw-gcc" if $cygwin; + +$ENV{'CIL_MACHINE'} = + "version_major=3 " . + "version_minor=2 " . + "version=msp430-3.2.3 " . + "short=2,2 " . + "int=2,2 " . + "long=4,2 " . + "long_long=8,2 " . + "pointer=2,2 " . + "enum=2,2 " . + "float=4,2 " . + "double=4,2 " . + "long_double=4,2 " . + "void=1,1 " . + "fun=1,2 " . + "wchar_size_size=2,2 " . + "alignof_string=1 " . + "max_alignment=1 " . + "char_wchar_signed=true,true " . + "const_string_literals=true " . + "big_endian=false " . + "underscore_name=false " . + "__builtin_va_list=true " . + "__thread_is_keyword=true"; diff --git a/tos/platforms/mm5s/Ieee154MessageC.nc b/tos/platforms/mm5s/Ieee154MessageC.nc new file mode 100644 index 0000000000..306c3ab3cf --- /dev/null +++ b/tos/platforms/mm5s/Ieee154MessageC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2008 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Stephen Dawson-Haggerty + */ + +configuration Ieee154MessageC { + provides { + interface SplitControl; + + interface Resource as SendResource[uint8_t clientId]; + interface Ieee154Send; + interface Receive as Ieee154Receive; + + interface Ieee154Packet; + interface Packet; + + interface PacketAcknowledgements; + interface LinkPacketMetadata; + interface LowPowerListening; + interface PacketLink; + } + +} implementation { + components CC2420Ieee154MessageC as Msg; + + SplitControl = Msg; + SendResource = Msg; + Ieee154Send = Msg; + Ieee154Receive = Msg; + Ieee154Packet = Msg; + Packet = Msg; + + PacketAcknowledgements = Msg; + LinkPacketMetadata = Msg; + LowPowerListening = Msg; + PacketLink = Msg; +} diff --git a/tos/platforms/mm5s/LocalIeeeEui64C.nc b/tos/platforms/mm5s/LocalIeeeEui64C.nc new file mode 100644 index 0000000000..20e7d020d3 --- /dev/null +++ b/tos/platforms/mm5s/LocalIeeeEui64C.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE.* All rights reserved. + */ + + /** + * Stephen Dawson-Haggerty + * Dummy Extended Address + */ + +#include "IeeeEui64.h" + +module LocalIeeeEui64C { + provides interface LocalIeeeEui64; +} implementation { + command ieee_eui64_t LocalIeeeEui64.getId() { + ieee_eui64_t id; + /* this is UCB's OUI */ + id.data[0] = 0x00; + id.data[1] = 0x12; + id.data[2] = 0x6d; + + /* UCB will let anyone use this OUI so long as these two octets + are 'LO' -- "local". All other octets are reserved. */ + /* SDH -- 9/10/2010 */ + id.data[3] = 'L'; + id.data[4] = 'O'; + + id.data[5] = 0; + id.data[6] = TOS_NODE_ID >> 8; + id.data[7] = TOS_NODE_ID & 0xff; + return id; + } +} diff --git a/tos/platforms/mm5s/PlatformC.nc b/tos/platforms/mm5s/PlatformC.nc new file mode 100644 index 0000000000..0b21ef24c1 --- /dev/null +++ b/tos/platforms/mm5s/PlatformC.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Joe Polastre + * @author Cory Sharp + * @author David Moss + */ + +#include "hardware.h" + +configuration PlatformC { + provides interface Init as PlatformInit; + uses interface Init as PeripheralInit; +} + +implementation { + + components PlatformP; + PlatformInit = PlatformP; + PeripheralInit = PlatformP.PeripheralInit; + + components PlatformPinsC; + PlatformP.PlatformPins -> PlatformPinsC; + + components PlatformLedsC; + PlatformP.PlatformLeds -> PlatformLedsC; + +// components PlatformUsciMapC; + // No code initialization required; just connect the pins + + components PlatformClockC; + PlatformP.PlatformClock -> PlatformClockC; +} diff --git a/tos/platforms/mm5s/PlatformP.nc b/tos/platforms/mm5s/PlatformP.nc new file mode 100644 index 0000000000..8b3387a316 --- /dev/null +++ b/tos/platforms/mm5s/PlatformP.nc @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Warning: many of these routines directly touch cpu registers + * it is assumed that this is initilization code and interrupts are + * off. + * + * @author Eric B. Decker + */ + +#ifdef notdef +#include "hardware.h" +#include "platform_version.h" + +const uint8_t _major = MAJOR; +const uint8_t _minor = MINOR; +const uint8_t _build = _BUILD; + + +#define BOOT_MAJIK 0x01021910 +noinit uint32_t boot_majik; +noinit uint16_t boot_count; + +#endif + + +module PlatformP { + provides interface Init; + uses { + interface Init as PlatformPins; + interface Init as PlatformLeds; + interface Init as Msp430Pmm; + interface Init as PlatformClock; + interface Init as MoteInit; + interface Init as PeripheralInit; + } +} + +implementation { + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + command error_t Init.init() { + WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer + + call PlatformPins.init(); // Initializes the GIO pins + call PlatformLeds.init(); // Initializes the Leds + call PlatformClock.init(); // Initializes UCS + call PeripheralInit.init(); + return SUCCESS; + } + + /***************** Defaults ***************/ + default command error_t PeripheralInit.init() { + return SUCCESS; + } +} diff --git a/tos/platforms/mm5s/hardware.h b/tos/platforms/mm5s/hardware.h new file mode 100644 index 0000000000..81a0b20ccd --- /dev/null +++ b/tos/platforms/mm5s/hardware.h @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter Bigot + */ + +#ifndef _H_hardware_h +#define _H_hardware_h + +#include "msp430hardware.h" + +// enum so components can override power saving, +// as per TEP 112. +enum { + TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, +}; + +#define __msp430x543x +//Unlock for Special funcionality of PINS such as SPI + +/* Use the PlatformAdcC component, and enable 8 pins */ +//#define ADC12_USE_PLATFORM_ADC 1 +//#define ADC12_PIN_AUTO_CONFIGURE 1 +//#define ADC12_PINS_AVAILABLE 8 + +/* @TODO@ Disable probe for XT1 support until the anomaly observed in + * apps/bootstrap/LocalTime is resolved. */ +#ifndef PLATFORM_MSP430_HAS_XT1 +#define PLATFORM_MSP430_HAS_XT1 1 +#endif /* PLATFORM_MSP430_HAS_XT1 */ + +// LEDs +TOSH_ASSIGN_PIN(RED_LED, 1, 0); +TOSH_ASSIGN_PIN(GREEN_LED, 1, 1); +TOSH_ASSIGN_PIN(YELLOW_LED, 4, 6); + +// CC2420 RADIO #defines +TOSH_ASSIGN_PIN(RADIO_CSN, 3, 0); +TOSH_ASSIGN_PIN(RADIO_VREF, 2, 6); +TOSH_ASSIGN_PIN(RADIO_RESET, 2, 5); +TOSH_ASSIGN_PIN(RADIO_FIFOP, 2, 3); +TOSH_ASSIGN_PIN(RADIO_SFD, 2, 1); +TOSH_ASSIGN_PIN(RADIO_GIO0, 5, 0); +TOSH_ASSIGN_PIN(RADIO_FIFO, 2, 2); +TOSH_ASSIGN_PIN(RADIO_GIO1, 5, 1); +TOSH_ASSIGN_PIN(RADIO_CCA, 2, 4); + +TOSH_ASSIGN_PIN(CC_FIFOP, 2, 3); +TOSH_ASSIGN_PIN(CC_FIFO, 2, 2); +TOSH_ASSIGN_PIN(CC_SFD, 2, 1); +TOSH_ASSIGN_PIN(CC_VREN, 2, 6); +TOSH_ASSIGN_PIN(CC_RSTN, 2, 5); + +#endif // _H_hardware_h diff --git a/tos/platforms/mm5s/hardware/adc/DemoSensorC.nc b/tos/platforms/mm5s/hardware/adc/DemoSensorC.nc new file mode 100644 index 0000000000..31dfb7dab7 --- /dev/null +++ b/tos/platforms/mm5s/hardware/adc/DemoSensorC.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular DemoSensorC on the telosb platform provides a + * voltage reading, using VoltageC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorC() { + provides interface Read; +} +implementation { + components new VoltageC() as DemoSensor; + Read = DemoSensor; +} diff --git a/tos/platforms/mm5s/hardware/adc/DemoSensorNowC.nc b/tos/platforms/mm5s/hardware/adc/DemoSensorNowC.nc new file mode 100644 index 0000000000..7f3b5d16a1 --- /dev/null +++ b/tos/platforms/mm5s/hardware/adc/DemoSensorNowC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE.x + */ + +/** + * DemoSensorNowC is a generic sensor device that provides a 16-bit + * value that can be read from async context. The platform author + * chooses which sensor actually sits behind DemoSensorNowC, and + * though it's probably Voltage, Light, or Temperature, there are no + * guarantees. + * + * This particular DemoSensorNowC on the telosb platform provides a + * voltage reading, using VoltageC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorNowC() { + provides interface Resource; + provides interface ReadNow; +} +implementation { + components new Msp430InternalVoltageC() as DemoSensorNow; + + Resource = DemoSensorNow; + ReadNow = DemoSensorNow; +} diff --git a/tos/platforms/mm5s/hardware/adc/DemoSensorStreamC.nc b/tos/platforms/mm5s/hardware/adc/DemoSensorStreamC.nc new file mode 100644 index 0000000000..4f476b2412 --- /dev/null +++ b/tos/platforms/mm5s/hardware/adc/DemoSensorStreamC.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorStreamC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorStreamC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular DemoSensorStreamC on the telosb platform provides a + * voltage reading, using VoltageStreamC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorStreamC() { + provides interface ReadStream; +} +implementation { + components new VoltageC() as DemoSensor; + ReadStream = DemoSensor; +} diff --git a/tos/platforms/mm5s/hardware/adc/PlatformAdcC.nc b/tos/platforms/mm5s/hardware/adc/PlatformAdcC.nc new file mode 100644 index 0000000000..e5ea8d4e38 --- /dev/null +++ b/tos/platforms/mm5s/hardware/adc/PlatformAdcC.nc @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +configuration PlatformAdcC { + provides { + interface HplMsp430GeneralIO as A0; + interface HplMsp430GeneralIO as A1; + interface HplMsp430GeneralIO as A2; + interface HplMsp430GeneralIO as A3; + interface HplMsp430GeneralIO as A4; + interface HplMsp430GeneralIO as A5; + interface HplMsp430GeneralIO as A6; + interface HplMsp430GeneralIO as A7; + + interface Msp430Timer as TimerA; + interface Msp430TimerControl as ControlA0; + interface Msp430TimerControl as ControlA1; + interface Msp430Compare as CompareA0; + interface Msp430Compare as CompareA1; + } +} + +implementation { + + components HplMsp430GeneralIOC; + A0 = HplMsp430GeneralIOC.Port20; + A1 = HplMsp430GeneralIOC.Port21; + A2 = HplMsp430GeneralIOC.Port22; + A3 = HplMsp430GeneralIOC.Port23; + A4 = HplMsp430GeneralIOC.Port24; + A5 = HplMsp430GeneralIOC.Port25; + A6 = HplMsp430GeneralIOC.Port26; + A7 = HplMsp430GeneralIOC.Port27; + + components Msp430TimerC; + TimerA = Msp430TimerC.Timer0_A; + ControlA0 = Msp430TimerC.Control0_A0; + ControlA1 = Msp430TimerC.Control0_A1; + CompareA0 = Msp430TimerC.Compare0_A0; + CompareA1 = Msp430TimerC.Compare0_A1; + +} diff --git a/tos/platforms/mm5s/hardware/adc/VoltageC.nc b/tos/platforms/mm5s/hardware/adc/VoltageC.nc new file mode 100644 index 0000000000..e9086fa754 --- /dev/null +++ b/tos/platforms/mm5s/hardware/adc/VoltageC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * VoltageC is a common name for the Msp430InternalVoltageC voltage + * sensor available on the telosb platform. + * + * To convert from ADC counts to actual voltage, divide by 4096 and + * multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration VoltageC() { + provides { + interface Read; + interface ReadStream; + } +} +implementation { + components new Msp430InternalVoltageC(); + Read = Msp430InternalVoltageC.Read; + ReadStream = Msp430InternalVoltageC.ReadStream; +} diff --git a/tos/platforms/mm5s/hardware/buttons/HplUserButtonC.nc b/tos/platforms/mm5s/hardware/buttons/HplUserButtonC.nc new file mode 100644 index 0000000000..a9cce13afb --- /dev/null +++ b/tos/platforms/mm5s/hardware/buttons/HplUserButtonC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the em430 platform + * + * @author Gilman Tolle + * @author Peter A. Bigot + */ + +configuration HplUserButtonC { + provides interface HplMsp430GeneralIO; + provides interface GpioInterrupt; +} +implementation { + components HplMsp430GeneralIOC as GeneralIOC; + components HplMsp430InterruptC as InterruptC; + + HplMsp430GeneralIO = GeneralIOC.Port17; + + components new Msp430InterruptC() as InterruptUserButtonC; + InterruptUserButtonC.HplInterrupt -> InterruptC.Port17; + GpioInterrupt = InterruptUserButtonC.Interrupt; +} diff --git a/tos/platforms/mm5s/hardware/buttons/SwitchToggleC.nc b/tos/platforms/mm5s/hardware/buttons/SwitchToggleC.nc new file mode 100644 index 0000000000..b7dfa1bce4 --- /dev/null +++ b/tos/platforms/mm5s/hardware/buttons/SwitchToggleC.nc @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Not quite generic layer to translate a GIO into a toggle switch + * (Newer MSP430 chips require configuring pull-up resistor) + * + * @author Gilman Tolle + * @author Peter A. Bigot + */ + +#include + +generic module SwitchToggleC() { + provides interface Get; + provides interface Notify; + + uses interface HplMsp430GeneralIO; + uses interface GpioInterrupt; +} +implementation { + norace bool m_pinHigh; + + task void sendEvent(); + + command bool Get.get() { return call HplMsp430GeneralIO.get(); } + + command error_t Notify.enable() { + error_t rv; + + call HplMsp430GeneralIO.makeInput(); + call HplMsp430GeneralIO.setResistor(MSP430_PORT_RESISTOR_PULLUP); + if ( call HplMsp430GeneralIO.get() ) { + m_pinHigh = TRUE; + return call GpioInterrupt.enableFallingEdge(); + } else { + m_pinHigh = FALSE; + return call GpioInterrupt.enableRisingEdge(); + } + } + + command error_t Notify.disable() { + return call GpioInterrupt.disable(); + } + + async event void GpioInterrupt.fired() { + call GpioInterrupt.disable(); + + m_pinHigh = !m_pinHigh; + + post sendEvent(); + } + + task void sendEvent() { + bool pinHigh; + pinHigh = m_pinHigh; + signal Notify.notify( pinHigh ); + if ( pinHigh ) + call GpioInterrupt.enableFallingEdge(); + else + call GpioInterrupt.enableRisingEdge(); + } +} diff --git a/tos/platforms/mm5s/hardware/buttons/UserButton.h b/tos/platforms/mm5s/hardware/buttons/UserButton.h new file mode 100644 index 0000000000..bb0065fbdb --- /dev/null +++ b/tos/platforms/mm5s/hardware/buttons/UserButton.h @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + */ + +#ifndef USERBUTTON_H +#define USERBUTTON_H + +typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t; + +#endif diff --git a/tos/platforms/mm5s/hardware/buttons/UserButtonC.nc b/tos/platforms/mm5s/hardware/buttons/UserButtonC.nc new file mode 100644 index 0000000000..f208b8638f --- /dev/null +++ b/tos/platforms/mm5s/hardware/buttons/UserButtonC.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform. Get + * returns the current state of the button by reading the pin, + * regardless of whether enable() or disable() has been called on the + * Interface. Notify.enable() and Notify.disable() modify the + * underlying interrupt state of the pin, and have the effect of + * enabling or disabling notifications that the button has changed + * state. + * + * @author Gilman Tolle + */ + +#include + +configuration UserButtonC { + provides interface Get; + provides interface Notify; +} +implementation { + components HplUserButtonC; + components new SwitchToggleC(); + SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt; + SwitchToggleC.HplMsp430GeneralIO -> HplUserButtonC.HplMsp430GeneralIO; + + components UserButtonP; + Get = UserButtonP; + Notify = UserButtonP; + + UserButtonP.GetLower -> SwitchToggleC.Get; + UserButtonP.NotifyLower -> SwitchToggleC.Notify; +} diff --git a/tos/platforms/mm5s/hardware/buttons/UserButtonP.nc b/tos/platforms/mm5s/hardware/buttons/UserButtonP.nc new file mode 100644 index 0000000000..a25838de6f --- /dev/null +++ b/tos/platforms/mm5s/hardware/buttons/UserButtonP.nc @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + */ + +#include + +module UserButtonP { + provides interface Get; + provides interface Notify; + + uses interface Get as GetLower; + uses interface Notify as NotifyLower; +} +implementation { + + command button_state_t Get.get() { + if ( call GetLower.get() ) { + return BUTTON_PRESSED; + } else { + return BUTTON_RELEASED; + } + } + + command error_t Notify.enable() { + return call NotifyLower.enable(); + } + + command error_t Notify.disable() { + return call NotifyLower.disable(); + } + + event void NotifyLower.notify( bool val ) { + // telosb user button pin is high when released - invert state + if ( val ) { + signal Notify.notify( BUTTON_RELEASED ); + } else { + signal Notify.notify( BUTTON_PRESSED ); + } + } + + default event void Notify.notify( button_state_t val ) { } +} diff --git a/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc b/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc new file mode 100644 index 0000000000..3cff253d46 --- /dev/null +++ b/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Top-level initialization of anything to do with the clock + * subsystem. + * + * @author Peter A. Bigot + */ + +configuration PlatformClockC { + provides interface Init; +} implementation { + components PlatformClockP; + Init = PlatformClockP; +} diff --git a/tos/platforms/mm5s/hardware/clock/PlatformClockP.nc b/tos/platforms/mm5s/hardware/clock/PlatformClockP.nc new file mode 100644 index 0000000000..d64b0c1d97 --- /dev/null +++ b/tos/platforms/mm5s/hardware/clock/PlatformClockP.nc @@ -0,0 +1,472 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * + * Initilization of the Clock system for the MM5 series motes. + * + * MM5s are based on msp430f5438 series cpus. + * + * The 5438 runs at 2.2V and can clock up to 18MHz. The 5438a + * can run at 1.8V (up to 8 MHz), and its core can be tweaked to + * enable faster clocking. We default to using 8MHz so allow + * low power execution on the 5438a. + * + * Previous ports of TinyOS to msp430 cpus, would set the cpu to + * clock at a power of 2 (MiHz). This was to facilitate syncronizing + * with the 32768 (32 KiHz) XT1 crystal. The Timer TEP talks about + * time in TinyOS being binary time. 1 mis (binary millisec = 1/1024) + * is provided by TMilli and 1 uis (binary microsec = 1/1024/1024) + * is provided by TMicro. + * + * It is very desireable to run the 5438a at 1.8V for power conservation + * (the specs are quite good). We also want to run it at 8MHz (decimal). + * Clocking at 8MiHz is not recommended (out of spec). It might work but + * it is unclear how flakey behaviour would manifest. Not recommended. + * + * So for power performance reasons we want to configure for 8MHz and 1.8V. + * (Yes the 5438 is different but we are using it to simulate set up for + * the 5438a which has the tasty power performance specs.) + * + * The TMicro timer (TA1) is run off DCOCLK/8 which yields 1us (not 1uis) + * ticks. However, TMilli is the long term timer that runs when the system + * is sleeping. It is clocked off XT1 at 32KiHz. This is a power of 2 + * and TMilli is defined by TEP to be in terms of 1mis. + * + * However, this then means that TMicro is in terms of 1us and TMilli is + * in terms of 1mis (essentially different units). This is not a good situation. + * It is better to be consistent in terms of units for both TMilli and TMicro. + * The constrant is on TMicro because of the 8MHz restriction forcing 1us. + * This argues for TMilli also being in decimal time (1ms). + * + * We want the following set up to be true when we are complete: + * + * 8 MHz clock. The 5438a is spec'd for a max of 8MHz when + * running at 1.8V. So that is what we use. Acutally 7995392 Hz + * (.0576% error, it'll do). + * + * DCOCLK -> MCLK, SMCLK. Also drives high speed timer that + * provides TMicro. 1us (note, decimal microsecs). DCOCLK + * sync'd to FLL/XT1/32KiHz. + * + * MCLK /1: main cpu clock. Off DCOCLK. + * + * SMCLK /1: used for timers and peripherals. We want to run the + * SPI (SD, GPS, subsystems, etc.) quickly and this gives us the + * option. Off DCOCLK. May want to divide it down because it isn't + * needed to be full speed. Dividing it down should save some energy + * because we won't be clocking downstream parts as fast. + * + * ACLK: 32 KiHz. Primarily used for slow speed timer that + * provides TMilli. + * + * FLL: in use and clocked off the 32 KiHz XT1 input. + * + * Much of the system relies on the 32KiHz XT1 xtal working correctly. + * We bring that up first and let it stabilize. + * + * The code loops up to 625ms waiting for XT1 stability. If stability + * is not achieved, the XT1 functionality is disabled. This should + * cause a hcf_panic which results in writing a panic block in slow + * mode. Should never happen. Famous last words (right before the + * rocket blows up). + * + * Stabilization appears to take roughly 150ms. + * + * @author Eric B. Decker + */ + +#define noinit __attribute__ ((section(".noinit"))) + +uint16_t xt1_ctr; +noinit uint16_t xt1_stop; + +#define XT1_DELTAS 10 +uint16_t xt1_idx; +uint16_t xt1_deltas[XT1_DELTAS]; +uint16_t xt1_cap; +bool cap; +uint16_t xt1_read; +uint16_t last_xt1, last_dco; + +/* + * debugging code for tracing how the FLL homes in on the + * target frequency. We only nab those values which change. + */ + +#define STUFF_SIZE 128 + +noinit uint16_t ucsctl0[STUFF_SIZE]; + +noinit bool clear_stuff; +noinit uint16_t nxt; + +void set_stuff() { + if (clear_stuff) { + memset(ucsctl0, 0, sizeof(ucsctl0)); + clear_stuff = 0; + nxt = 0; + } + if (nxt >= STUFF_SIZE) + nxt = 0; + ucsctl0[nxt] = UCSCTL0; + nxt++; +} + + +module PlatformClockP { + provides interface Init; +} implementation { + + /* + * wait_for_32K() + * + * The 32KiHz Xtal provides a stable low power time base for everything + * else needing time in the system. It drives the FLL which provides + * syncronization for the DCO and ACLK which provides the time base + * for low power time (TMilli). + * + * The h/w has provisions for detecting XT1 oscillator faults but we + * don't know if that takes into account frequency stability. We have + * observed on the msp430f2618 that the XT1 oscillator takes a considerable + * amount of time to actual home to its base frequency. And that + * is where we want it before we do anything else. So we need to + * give it time to stabilize before using it. This should only be true + * coming out of reset. Anytime we reset P7.0 and P7.1 (XT1IN, XT1OUT) + * are reset to inputs and Pin Control and this shuts down the oscillator. + * So we need to bring it back up. + * + * On reset the 5438/5438a UCS is set to a configuration much like the + * following: (all values in hex). + * + * ucsctl0: 13e8 0020 101f 0000 0044 0000 c1cd 0403 0307 + * + * dco: 13, mod: 1e, rsel: 2, flld: 1 (f_dcoclk/2), flln: 1f + * selref: 0 (XT1CLK), fllrefdiv: 0 (f_fllrefclk/1) + * sela: 0 (xt1clk), sels: 4 (dcoclkdiv), selm: 4 (dcoclkdiv) + * diva = divs = divm = 0 (/1) + * xt2off, xt1off + * + * xt1 is off so clocking from REFO (32KiHz), XT1 pins set to Port/In. + * FLL is comparing 32KiHz * 32 = 1MiHz vs. dcoclk/2 => dcoclk 2MiHz + * SMCLK, MCLK => 1MiHz. + * + * We wait about a second for the 32KHz to stablize. + * + * PWR_UP_SEC is the number of times we need to wait for + * TimerA to cycle (16 bits) when clocked at the default + * msp430f5438 dco (about 2MHz). + */ + +#define PWR_UP_SEC 16 + + uint16_t maj_xt1() { + uint16_t a, b, c; + + a = TA0R; b = TA0R; c = TA0R; + if (a == b) return a; + if (a == c) return a; + if (b == c) return b; + while (1) + nop(); + return 0; + } + + + void wait_for_32K() __attribute__ ((noinline)) { + uint16_t left; + + /* + * TA0 -> XT1 32768 (just for fun and to compare against TA1 (1uis ticker) + * TA1 -> SMCLK/1 (should be 1uis ticker) + */ + TA0CTL = TACLR; // also zeros out control bits + TA1CTL = TACLR; + TA0CTL = TASSEL__ACLK | MC__CONTINOUS; // ACLK/1, continuous + TA1CTL = TASSEL__SMCLK | MC__CONTINOUS; // SMCLK/1, continuous + + /* + * wait for about a sec for the 32KHz to come up and + * stabilize. We are guessing that it is stable and + * on frequency after about a second but this needs + * to be verified. + * + * FIX ME. Need to verify stability of 32KHz. It definitely + * has a good looking waveform but what about its frequency + * stability. Needs to be measured. + * + * One thing to try is watching successive edges (ticks, TA0R, changing + * by one) and seeing how many TA1 (1 uis) ticks have gone by. When it is + * around 30-31 ticks then we are in the right neighborhood. + * + * We should see about PWR_UP_SEC (16) * 64Ki * 1/1024/1024 seconds which just + * happens to majikly equal 1 second. whew! + */ + + xt1_cap = 16; + left = PWR_UP_SEC; + while (1) { + if (TA1CTL & TAIFG) { + /* + * wrapped, clear IFG, and decrement major count + */ + TA1CTL &= ~TAIFG; + if (--left == 0) + break; + if (left <= xt1_cap) { + cap = TRUE; + xt1_cap = 0; /* disable future capture triggers */ + xt1_idx = 0; + last_xt1 = maj_xt1(); + last_dco = TA1R; + } + } + if (cap) { + xt1_read = maj_xt1(); + if (last_xt1 == xt1_read) + continue; + if (last_xt1 != xt1_read) { + xt1_deltas[xt1_idx++] = TA1R - last_dco; + last_xt1 = xt1_read; + last_dco = TA1R; + if (xt1_idx >= XT1_DELTAS) { + cap = FALSE; + nop(); + } + } + } + } + nop(); + } + + + command error_t Init.init () { + /* + * Enable XT1, lowest capacitance. + * + * XT1 pins (7.0 and 7.1) default to Pins/In. For the XT1 + * to function these have to be swithed to Module control. + * + * Surf code mumbles something about P5.0 and 1 must be clear + * in P5DIR. Shouldn't have any effect (the pins get kicked + * over to the Module for the Xtal and so the direction should + * be a don't care). Regardless we don't change the P7DIR + * from its power up value so will be cleared (IN). + * + * The surf code also talks about SMCLK being 4 per-mil faster + * if XCAP_3 is retained. Not sure what effect XCAP setting + * should have on SMCLK because XCAP effects the LF osc in LF mode, + * XTS=0 (which it will be). So a strange comment. + * + * Surf found XCAP=0 worked nice. We do the same thing but it should + * be checked. FIXME. + */ + + P7SEL |= (BIT0 | BIT1); + UCSCTL6 &= ~(XT1OFF | XCAP_3); + + /* + * From comments in Surf code. + * + * Spin waiting for a stable signal. This loop runs somewhere + * between 10K and 20K times; if it gets to 65536 without success, + * assume the crystal's absent or broken. At the power-up DCO + * (RSEL: 2, DCO: 19, MOD: 27) rate of ~2MHz and no crystal, the + * loop takes 625ms to complete. + * + * @note The UCS module will fall back to REFOCLK if configured + * for LF-mode XT1 and XT1 is not stable. It does not, however, + * revert to XT1 upon stabilization: the UCS module documentation + * implies that OFIFG must be cleared for this to occur. + * Consequently, we have to wait for stabilization even if we + * "know" a crystal is present. + */ + + /* + * xt1_ctr is initialized to 0 and counts up, if it hits zero + * again because it wrapped then we bail and panic. + */ + xt1_ctr = 0; + do { + xt1_ctr++; + UCSCTL7 &= ~(XT1LFOFFG | DCOFFG); + SFRIFG1 &= ~OFIFG; + nop(); + nop(); + if ((SFRIFG1 & OFIFG) == 0) + break; + } while (xt1_ctr); + + /* + * If the XT1 signal is still not valid, disable it. + * + * This is a major failure as we assume we have an XT1 xtal for + * timing stability. Flag it and try again? + * FIXME + */ + if (UCSCTL7 & XT1LFOFFG) { + P7SEL &= ~(BIT0| BIT1); + UCSCTL6 |= XT1OFF; + while (1) + nop(); + return FAIL; + } + + /* + * XT1 up, lower the drive as suggested by TI. + * + * TI example code suggests clearing XT1DRIVE to reduce power. + * Current measurement does not indicate any value in doing so, + * at least not in LPM4, but it doesn't seem to hurt either. + * + * Note: we don't ever go into LPM4, LPM3 is required for the + * low speed timer to run (clocked from XT1). + */ + UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive + + /* + * We are no longer faulting, but we should still wait for the frequency to + * stabilize. Use wait_for_32k(). + */ + + wait_for_32K(); + + /* + * ACLK is to be set to XT1CLK, assumed to be 32KiHz (2^15Hz). + * This drives TA0 for TMilli. + * + * We run DCO into the integrator as /1 (FLLD_0). This also makes + * DCOCLKDIV = DCO. FLLN gets set to 243. 32768 * (243 + 1) + * = 7,995,392 Hz. The 32768 XT1 REFCLK is not divided down + * (/1, REFDIV). + */ + + /* Disable FLL control */ + __bis_SR_register(SR_SCG0); + + /* + * Use XT1CLK as the FLL input: if it isn't valid, the module + * will fall back to REFOCLK. Use FLLREFDIV value 1 (selected + * by bits 000) + */ + UCSCTL3 = SELREF__XT1CLK; + + /* + * The appropriate value for DCORSEL is obtained from the DCO + * Frequency table of the device datasheet. Find the DCORSEL + * value from that table where the maximum frequency with DCOx=31 + * is closest to your desired DCO frequency. (Where did this + * come from?) I've chosen next range up, don't want to run out + * of head room. + */ + + UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx + UCSCTL1 = DCORSEL_4; + UCSCTL2 = FLLD_0 + 243; + __bic_SR_register(SR_SCG0); // Enable the FLL control loop + + /* + * Worst-case settling time for the DCO when the DCO range bits have been + * changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx + * UG for optimization. + * + * n x 32 x 32 x 8 MHz / 32,768 Hz = 256000 = MCLK cycles for DCO to settle. + * but we don't know what n is (depends on how the FLL integrator works). + * + * Now this seems like a strange way to do this. This of course assumes + * that we are going to home on an arbritrary frequency so need to start + * from dco:0/mod:0. But even that doesn't make a whole boat load of sense. + * If going to an arbritary frequency, seems to make sense to start in the + * middle and either move up or down. + * + * Now that said, we have a pretty good idea of where we are going. To take + * into account temperature variance and dies we start below our target. But + * not that far. ie. we know we are going to ~8MHz and dco:x/mod:y is one + * such result. So starting ~25% below that should work just fine and greatly + * reduces potential start up time. This eliminates the need for the maximum + * delay waiting for the FLL to lock in. We can simply run, checking dco/mod + * looking for the maximum value we allow. Or just let it run to dco: 31, mod: 0. + * If it hits 31 we be done. + */ + + xt1_ctr = 0; + clear_stuff = 1; + do { + xt1_ctr++; + set_stuff(); + if (xt1_ctr == xt1_stop) + nop(); + } while (xt1_ctr); + + /* + * Loop until DCO fault flag is cleared. Ignore OFIFG, since it + * incorporates XT1 and XT2 fault detection. + * + * But XT2 is off so shouldn't be generating a fault and XT1 better + * be running we are assuming it drives the FLL. Yes if it fails + * then we auto switch over to the internal 32KiHz REFO. But this + * would be counter productive so looking for XT1 fault makes + * some sense. But it would be an error bail. Shouldn't happen. + */ + + do { + UCSCTL7 &= ~(XT1LFOFFG | DCOFFG); + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while (UCSCTL7 & DCOFFG); // Test DCO fault flag + + /* + * ACLK is XT1/1, 32KiHz. + * MCLK is set to DCOCLK/1. 8 MHz + * SMCLK is set to DCOCLK/1. 8 MHz. + * DCO drives TA1 for TMicro and is set to provide 1us ticks. + * ACLK drives TA0 for TMilli. + */ + UCSCTL4 = SELA__XT1CLK | SELS__DCOCLK | SELM__DCOCLK; + UCSCTL5 = DIVA__1 | DIVS__1 | DIVM__1; + + /* + * TA0 clocked off XT1, used for TMilli, 32KiHz. + */ + TA0CTL = TASSEL__ACLK | TACLR | MC__CONTINOUS | TAIE; + TA0R = 0; + + /* + * TA1 clocked off SMCLK off DCO, /8, 1us tick + */ + TA1CTL = TASSEL__SMCLK | ID__8 | TACLR | MC__CONTINOUS | TAIE; + TA1R = 0; + + return SUCCESS; + } +} diff --git a/tos/platforms/mm5s/hardware/leds/LedsC.nc b/tos/platforms/mm5s/hardware/leds/LedsC.nc new file mode 100644 index 0000000000..8f5da66904 --- /dev/null +++ b/tos/platforms/mm5s/hardware/leds/LedsC.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * EM430 has only two LEDs. + * @author Peter A. Bigot + */ + +configuration LedsC { + provides interface Leds; +} +implementation { + components PlatformLedsC; + + Leds = PlatformLedsC; +} diff --git a/tos/platforms/mm5s/hardware/leds/LedsP.nc b/tos/platforms/mm5s/hardware/leds/LedsP.nc new file mode 100644 index 0000000000..f595c8e8c0 --- /dev/null +++ b/tos/platforms/mm5s/hardware/leds/LedsP.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** +* 3 LED implementation + * + * @author Peter A. Bigot + * @author João Gonçalves + */ + +module LedsP @safe() { + provides interface Leds; + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} +implementation { +} diff --git a/tos/platforms/mm5s/hardware/leds/PlatformLedsC.nc b/tos/platforms/mm5s/hardware/leds/PlatformLedsC.nc new file mode 100644 index 0000000000..bd93a501d7 --- /dev/null +++ b/tos/platforms/mm5s/hardware/leds/PlatformLedsC.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter A. Bigot + */ + +#include "hardware.h" + +configuration PlatformLedsC { + provides { + interface Init; + interface Leds; + } +} +implementation { + components PlatformLedsP; + Leds = PlatformLedsP; + Init = PlatformLedsP; + + components HplMsp430GeneralIOC as GeneralIOC; + + /* RED LED (D1) at P4.7 */ + components new Msp430GpioC() as Led0Impl; + Led0Impl -> GeneralIOC.Port10; + PlatformLedsP.Led0 -> Led0Impl; + + /* Yellow LED (D2) at P4.6 */ + components new Msp430GpioC() as Led1Impl; + Led1Impl -> GeneralIOC.Port11; + PlatformLedsP.Led1 -> Led1Impl; + + /* Green LED (D1) at P4.5 */ + components new Msp430GpioC() as Led2Impl; + Led2Impl -> GeneralIOC.Port45; + PlatformLedsP.Led2 -> Led2Impl; +} diff --git a/tos/platforms/mm5s/hardware/leds/PlatformLedsP.nc b/tos/platforms/mm5s/hardware/leds/PlatformLedsP.nc new file mode 100644 index 0000000000..b344001a7f --- /dev/null +++ b/tos/platforms/mm5s/hardware/leds/PlatformLedsP.nc @@ -0,0 +1,148 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This module provides the general Led interface. + * + * The advantage to doing it this way is we can now create a platforms + * that provide more or less than 3 LED's, and the LED's can be pull-up or + * pull-down enabled. + * + * @author David Moss + */ + +module PlatformLedsP { + provides { + interface Init; + interface Leds; + } + + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} + +implementation { + + /***************** Init Commands ****************/ + command error_t Init.init() { + atomic { + call Led0.makeOutput(); + call Led1.makeOutput(); + call Led2.makeOutput(); + call Led0.clr(); + call Led1.clr(); + call Led2.clr(); + } + return SUCCESS; + } + + /***************** Leds Commands ****************/ + async command void Leds.led0On() { + call Led0.set(); + } + + async command void Leds.led0Off() { + call Led0.clr(); + } + + async command void Leds.led0Toggle() { + call Led0.toggle(); + } + + async command void Leds.led1On() { + call Led1.set(); + } + + async command void Leds.led1Off() { + call Led1.clr(); + } + + async command void Leds.led1Toggle() { + call Led1.toggle(); + } + + async command void Leds.led2On() { + call Led2.set(); + } + + async command void Leds.led2Off() { + call Led2.clr(); + } + + async command void Leds.led2Toggle() { + call Led2.toggle(); + } + + async command uint8_t Leds.get() { + uint8_t rval; + atomic { + rval = 0; + if (!call Led0.get()) { + rval |= LEDS_LED0; + } + if (!call Led1.get()) { + rval |= LEDS_LED1; + } + if (!call Led2.get()) { + rval |= LEDS_LED2; + } + } + return rval; + } + + async command void Leds.set(uint8_t val) { + atomic { + if (val & LEDS_LED0) { + call Leds.led0On(); + } else { + call Leds.led0Off(); + } + if (val & LEDS_LED1) { + call Leds.led1On(); + } else { + call Leds.led1Off(); + } +#ifdef notdef + if (val & LEDS_LED2) { + call Leds.led2On(); + } else { + call Leds.led2Off(); + } +#endif + } + } +} diff --git a/tos/platforms/mm5s/hardware/pins/PlatformPinsC.nc b/tos/platforms/mm5s/hardware/pins/PlatformPinsC.nc new file mode 100644 index 0000000000..5a77232299 --- /dev/null +++ b/tos/platforms/mm5s/hardware/pins/PlatformPinsC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author David Moss + * @author Peter A. Bigot + */ + +configuration PlatformPinsC { + provides { + interface Init; + } +} + +implementation { + components PlatformPinsP; + Init = PlatformPinsP; +} diff --git a/tos/platforms/mm5s/hardware/pins/PlatformPinsP.nc b/tos/platforms/mm5s/hardware/pins/PlatformPinsP.nc new file mode 100644 index 0000000000..aac55fcf1a --- /dev/null +++ b/tos/platforms/mm5s/hardware/pins/PlatformPinsP.nc @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformPinsP { + provides interface Init; +} + +implementation { + int i; + + command error_t Init.init() { + atomic { + /* + * for now, just leave it all as the reset state. + * + * 5438, all input, with OUT/IN left alone. + */ + +#if 0 /* Disabled: these specific setting sare defaults, but others might not be */ + PMAPPWD = PMAPPW; // Get write-access to port mapping regs + P1MAP5 = PM_UCA0RXD; // Map UCA0RXD output to P1.5 + P1MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6 + PMAPPWD = 0; // Lock port mapping registers +#endif // + + } + return SUCCESS; + } +} diff --git a/tos/platforms/mm5s/hardware/usci/PlatformSerialC.nc b/tos/platforms/mm5s/hardware/usci/PlatformSerialC.nc new file mode 100644 index 0000000000..9c471defbd --- /dev/null +++ b/tos/platforms/mm5s/hardware/usci/PlatformSerialC.nc @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/** + * De-facto standard component for platform independent access to a serial port. + * + * This implementation supports the TI EM430 and other MSP430XV2-based boards. + * + * Note that, since the standard practice is to use StdControl to + * start and stop this module (which requests and releases the + * corresponding USCI UART module), inclusion of this into an + * application is incompatible with sharing the UART among multiple + * clients in the TEP108 sense of resource sharing. + * + * @author David Moss + * @author Peter A. Bigot + */ + +configuration PlatformSerialC { + provides { + interface StdControl; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSerialP; + StdControl = PlatformSerialP; + + components new Msp430UsciUartA0C() as UartC; + + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + PlatformSerialP.Resource -> UartC.Resource; + +} diff --git a/tos/platforms/mm5s/hardware/usci/PlatformSerialP.nc b/tos/platforms/mm5s/hardware/usci/PlatformSerialP.nc new file mode 100644 index 0000000000..50fcd72fe4 --- /dev/null +++ b/tos/platforms/mm5s/hardware/usci/PlatformSerialP.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformSerialP { + provides interface StdControl; + uses interface Resource; +} + +implementation { + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop(){ + return call Resource.release(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/mm5s/hardware/usci/PlatformSpiC.nc b/tos/platforms/mm5s/hardware/usci/PlatformSpiC.nc new file mode 100644 index 0000000000..231bbab782 --- /dev/null +++ b/tos/platforms/mm5s/hardware/usci/PlatformSpiC.nc @@ -0,0 +1,29 @@ + +configuration PlatformSpiC { + provides { + interface SpiByte; + interface Resource; + interface SpiPacket; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSpiP; + +// components MainC; +// MainC.SoftwareInit -> PlatformSpiP; + + components new Msp430UsciSpiB0C() as SpiC; + + SpiByte = SpiC; + Resource = SpiC; + SpiPacket = SpiC; + + Msp430UsciError = SpiC; + PlatformSpiP.Resource -> SpiC.Resource; + + components PlatformLedsC; + PlatformSpiP.Leds -> PlatformLedsC; +} diff --git a/tos/platforms/mm5s/hardware/usci/PlatformSpiP.nc b/tos/platforms/mm5s/hardware/usci/PlatformSpiP.nc new file mode 100644 index 0000000000..aa2bc846f3 --- /dev/null +++ b/tos/platforms/mm5s/hardware/usci/PlatformSpiP.nc @@ -0,0 +1,17 @@ + +module PlatformSpiP { + provides interface Init; + uses { + interface Resource; + interface Leds; + } +} + +implementation { + + command error_t Init.init() { + return call Resource.immediateRequest(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/mm5s/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/mm5s/hardware/usci/PlatformUsciMapC.nc new file mode 100644 index 0000000000..53ea18488e --- /dev/null +++ b/tos/platforms/mm5s/hardware/usci/PlatformUsciMapC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Connect the appropriate pins for USCI support on a CC430. + * + * @author Peter A. Bigot + */ + +configuration PlatformUsciMapC { +} implementation { + components HplMsp430GeneralIOC as GIO; + + components Msp430UsciUartA0P as UartA0C; + UartA0C.URXD -> GIO.UCA0RXD; + UartA0C.UTXD -> GIO.UCA0TXD; + + components Msp430UsciSpiB0P as SpiB0C; + SpiB0C.SIMO -> GIO.UCB0SIMO; + SpiB0C.SOMI -> GIO.UCB0SOMI; + SpiB0C.CLK -> GIO.UCB0CLK; + + components Msp430UsciSpiA3P as SpiA3C; + SpiA3C.SIMO -> GIO.UCA3SIMO; + SpiA3C.SOMI -> GIO.UCA3SOMI; + SpiA3C.CLK -> GIO.UCA3CLK; +} diff --git a/tos/platforms/mm5s/platform.h b/tos/platforms/mm5s/platform.h new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tos/platforms/mm5s/platform_message.h b/tos/platforms/mm5s/platform_message.h new file mode 100644 index 0000000000..e3d24e69ee --- /dev/null +++ b/tos/platforms/mm5s/platform_message.h @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005 The Regents of the University of California. + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Defining the platform-independently named packet structures to be the + * chip-specific CC1000 packet structures. + * + * @author Philip Levis + */ + +#ifndef PLATFORM_MESSAGE_H +#define PLATFORM_MESSAGE_H + +#include +#include + +typedef union message_header { + serial_header_t serial; +} message_header_t; + +typedef union TOSRadioFooter { +} message_footer_t; + +typedef union TOSRadioMetadata { +} message_metadata_t; + +#endif From 367bee01e709f99df153d6387573f0b8073a6001 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 02:24:15 -0700 Subject: [PATCH 211/411] msp430: nuke references to __msp430x543x in header files. The standard TI cpu files for the 5438 etc. defines __msp430x54x or 54xA use that instead of forceing the define for __msp430x543x in hardware.h --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 6 +++--- tos/platforms/MoteISTx5/hardware.h | 3 --- tos/platforms/mm5s/PlatformC.nc | 2 +- tos/platforms/mm5s/hardware.h | 3 --- 4 files changed, 4 insertions(+), 10 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 33db8d76a8..09f340d9a6 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -320,7 +320,7 @@ configuration HplMsp430GeneralIOC { #endif /* cc430x513x || cc430x612x || cc430x613x */ -#if defined(__msp430x541x) || defined(__msp430x543x) +#if defined(__msp430x54x) || defined(__msp430x54xA) provides interface HplMsp430GeneralIO as TA0CCR0; provides interface HplMsp430GeneralIO as TA0CCR1; @@ -937,7 +937,7 @@ implementation { #endif /* cc430x513x || cc430x613x */ #endif /* cc430x513x || cc430x612x || cc430x613x */ -#if defined(__msp430x543x) || defined(__msp430x541x) +#if defined(__msp430x54x) || defined(__msp430x54xA) TA0CCR0 = P11; TA0CCR1 = P12; @@ -1061,5 +1061,5 @@ implementation { TA1CCR2 = P73; #endif -#endif /* __msp430x543x || __msp430x541x */ +#endif /* __msp430x54x || __msp430x54xA */ } diff --git a/tos/platforms/MoteISTx5/hardware.h b/tos/platforms/MoteISTx5/hardware.h index 05ab8c36c5..d825affaad 100755 --- a/tos/platforms/MoteISTx5/hardware.h +++ b/tos/platforms/MoteISTx5/hardware.h @@ -45,9 +45,6 @@ enum { TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, }; -#define __msp430x543x -//Unlock for Special funcionality of PINS such as SPI - /* Use the PlatformAdcC component, and enable 8 pins */ //#define ADC12_USE_PLATFORM_ADC 1 //#define ADC12_PIN_AUTO_CONFIGURE 1 diff --git a/tos/platforms/mm5s/PlatformC.nc b/tos/platforms/mm5s/PlatformC.nc index 0b21ef24c1..0ba4edbb5a 100644 --- a/tos/platforms/mm5s/PlatformC.nc +++ b/tos/platforms/mm5s/PlatformC.nc @@ -58,7 +58,7 @@ implementation { components PlatformLedsC; PlatformP.PlatformLeds -> PlatformLedsC; -// components PlatformUsciMapC; + components PlatformUsciMapC; // No code initialization required; just connect the pins components PlatformClockC; diff --git a/tos/platforms/mm5s/hardware.h b/tos/platforms/mm5s/hardware.h index 81a0b20ccd..3c1d7688f0 100644 --- a/tos/platforms/mm5s/hardware.h +++ b/tos/platforms/mm5s/hardware.h @@ -45,9 +45,6 @@ enum { TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, }; -#define __msp430x543x -//Unlock for Special funcionality of PINS such as SPI - /* Use the PlatformAdcC component, and enable 8 pins */ //#define ADC12_USE_PLATFORM_ADC 1 //#define ADC12_PIN_AUTO_CONFIGURE 1 From 7147d4c9b3bbdf2ee8784c5544fdd7ae43e2528e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 19 Oct 2011 02:28:56 -0700 Subject: [PATCH 212/411] make error_t and enum, better code generation --- tos/types/TinyError.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/tos/types/TinyError.h b/tos/types/TinyError.h index 6d3acc67ec..ae2155b41c 100644 --- a/tos/types/TinyError.h +++ b/tos/types/TinyError.h @@ -48,8 +48,8 @@ #define NESC_COMBINE(x) #endif -enum { - SUCCESS = 0, +typedef enum { + SUCCESS = 0, FAIL = 1, // Generic condition: backwards compatible ESIZE = 2, // Parameter passed in was too big. ECANCEL = 3, // Operation cancelled by a call. @@ -62,16 +62,16 @@ enum { ENOMEM = 10, // Memory required not available ENOACK = 11, // A packet was not acknowledged ELAST = 11 // Last enum value -}; +} error_t NESC_COMBINE("ecombine"); -typedef uint8_t error_t NESC_COMBINE("ecombine"); - -error_t ecombine(error_t r1, error_t r2) @safe() -/* Returns: r1 if r1 == r2, FAIL otherwise. This is the standard error - combination function: two successes, or two identical errors are - preserved, while conflicting errors are represented by FAIL. -*/ -{ +/* + * Returns: r1 if r1 == r2, FAIL otherwise. + * + * This is the standard error combination function: two successes, or + * two identical errors are preserved, while conflicting errors are + * represented by FAIL. + */ +error_t ecombine(error_t r1, error_t r2) @safe() { return r1 == r2 ? r1 : FAIL; } From 99d908cf60becd1170970a2945ddbf4d389e22c3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 30 Nov 2011 23:46:49 -0800 Subject: [PATCH 213/411] update Dev_Environ to reflect tinyos-tools from tinyprod/debian-dev. o also update to reflect tp-freeforall/prod(msp430-int-next). o remove tinyos-tools tar into /usr/local kludge o reflect that the debian-dev repo now includes tinyos-tools package. --- 00b_Development_Environment | 34 +++++++++++++--------------------- 1 file changed, 13 insertions(+), 21 deletions(-) diff --git a/00b_Development_Environment b/00b_Development_Environment index 41361a79f9..4d667c8333 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -5,10 +5,11 @@ Installing a development environment for TinyOS (TinyProd). State: -2011-09-30: +2011-12-01: Ubuntu 10.04 or 11.04. Debian Squeeze works as well. - T2 (TinyProd) github:tp-freeforall/prod(msp430-int-pu), + T2 (TinyProd) github:tp-freeforall/prod(msp430-int-next), mspdebug JTAG debugging. mspgcc-LTS20110716 toolchain with patches + Toolchain from http://tinyprod.net/repos/debian-dev ************************************************************************************** @@ -58,6 +59,7 @@ is more up to date. We want the following packages: + nesc msp430-binutils-tinyos msp430-gcc-tinyos msp430-gdb-tinyos @@ -65,7 +67,7 @@ We want the following packages: msp430-tinyos msp430mcu-tinyos mspdebug-tinyos - nesc + tinyos-tools You want to follow the instructions at: http://tinyprod.net/debian-dev. @@ -80,25 +82,13 @@ gpg -a --export F99BE531 | sudo apt-key add - sudo -s # -# add a repo pointer into sources.list +# add the repo pointer into sources.list # -echo "deb http://tinyprod.net/debian-dev squeeze main" >> /etc/apt/sources.list +echo "deb http://tinyprod.net/repos/debian-dev squeeze main" >> /etc/apt/sources.list apt-get update -apt-get install nesc msp430-tinyos mspdebug-tinyos -exit - -You will also need to install the tinyos-tools.tgz tarball. These tools haven't -been packaged yet, so will need to be manually installed. The tools live in -/usr/local. - -sudo -s -cd /usr/local -wget http://tinyprod.net/downloads/tinyos-tools.tgz -tar xfz tinyos-tools.tgz +apt-get install nesc msp430-tinyos mspdebug-tinyos tinyos-tools exit -Make sure your PATH environment variable includes /usr/local/bin. - ************************************************************************************** 3) TinyOS 2.x tree checkout @@ -109,8 +99,6 @@ for development. It has modifications to support newer TI MSP430 processors. This basic checkout gives you a read-only copy of the msp430-int-next branch. It is a fully functional local repository that can be commited into (locally only). -To set up for contibuting to the main repository, the instructions in -00c_Getting_Started_Git and 00d_Contribution_Process should be followed. cd ~/top mkdir t2_cur @@ -128,6 +116,9 @@ that points at the repository that you cloned from namely, git://github.com/tp-freeforall/prod.git. Your branch will be rooted at the default branch of tp-freeforall/prod, msp430-int-next. +To set up for contibuting to the main repository, the instructions in +00c_Getting_Started_Git and 00d_Contribution_Process should be followed. + ************************************************************************************** 4) Set up build environment settings @@ -174,7 +165,8 @@ The following environment variables must be set to build. 6) Build SerialForwarder and libmote library. (optional) WARNING: This should get replaced with libmotenet. Superset of the SF but also -allows using AM sockets or IPv6 sockets for connections. +allows using AM sockets or IPv6 sockets for connections. Note: currently libmotenet +is a work in progress and should be considered experimental. Build the serial forwarder and associated library (also includes direct serial access) From c8ba49c78e66a545ed68b456efb4d11b180d3ee4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 10 Dec 2011 15:35:58 -0800 Subject: [PATCH 214/411] Force nesc_{en,dis}able_interrupt to be inline. Avoid generating the calls. --- tos/chips/msp430/msp430hardware.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 41d865813c..c4c6bab906 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -434,7 +434,7 @@ MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL); // TOSH_ASSIGN_PIN creates functions that are effectively marked as // "norace". This means race conditions that result from their use will not -// be detectde by nesc. +// be detected by nesc. #define TOSH_ASSIGN_PIN_HEX(name, port, hex) \ void TOSH_SET_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \ @@ -463,12 +463,12 @@ enum { MSP430_POWER_LPM4 = 5 }; -inline void __nesc_disable_interrupt(void) @safe() { +inline void __nesc_disable_interrupt(void) __attribute__((always_inline)) @safe() { dint(); nop(); } -inline void __nesc_enable_interrupt(void) @safe() { +inline void __nesc_enable_interrupt(void) __attribute__((always_inline)) @safe() { eint(); } @@ -481,8 +481,8 @@ inline void __nesc_enable_interrupt(void) @safe() { * This should be checked to verify that it generates minimal code. It does. */ typedef uint16_t __nesc_atomic_t; -__nesc_atomic_t __nesc_atomic_start(void); -void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts); +inline __nesc_atomic_t __nesc_atomic_start(void) __attribute__((always_inline)); +inline void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) __attribute__((always_inline)); #ifndef NESC_BUILD_BINARY /* @@ -512,7 +512,7 @@ void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts); * we deal with it. */ -__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { +inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() __attribute__((always_inline)) @safe() { __nesc_atomic_t result = (READ_SR & SR_GIE); dint(); @@ -526,7 +526,7 @@ __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { return result; } -void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe() { +inline void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() __attribute__((always_inline)) @safe() { asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ if( reenable_interrupts ) eint(); From 022520cbfab83f7811d4737808ca3c0b85b63fd8 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 10 Dec 2011 18:29:15 -0800 Subject: [PATCH 215/411] update Release Notes --- 11_Release_Notes | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index 85f87fd5e4..16b64c748d 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -1,9 +1,9 @@ Major Changes to the msp430 core software: (branch: gh:tp-freeforall/prod(msp430-int-next) - will migrate to msp430-int (~ 2011-10-07)) + will migrate to msp430-int (~ 2011-11-15)) -Last Update: 2011-09-30, cire +Last Update: 2011-12-10, cire Msp430-Int (msp430 integration branch) is a major rework of the core tinyos msp430 files. Originally, tinyos msp430 support was for the first generation @@ -29,8 +29,8 @@ done using the following: (20110612) slated to become new main toolchain. mspgcc4.5.3 (LTS 20110716) long term support of uniarch (pre-20bit) - mspgcc4.5.3 (20110905) later version of LTS20110716 with patches through 0905. - see http://tinyprod.net/debian-dev. + mspgcc4.5.3 (20111008) later version of LTS20110716 with patches through 1008. + see http://tinyprod.net/repos/debian-dev. It is recommended that all verification work be done using the latest toolchain available. The sooner we get that toolchain squared away the better. @@ -53,6 +53,9 @@ x5: 3rd generation MSP430X. Modified instruction timings. Peripheral modificat Other notable changes: +* Revise nesc_{en,dis}able_interrupt to generate better code. Also force + these routines to be inline regardless of the optimization level. + * Remove duplicate files between original x1 and Z1 (x2). Msp430-int has been fully integrated with the tinyos-main trunk as of 2011-09-30 which includes an updated Z1 (x2) core. All duplicated files between x1 and Z1 @@ -87,9 +90,7 @@ Other notable changes: limits for the various processors is in decimal (ie. 8MHz). It is generally dangerous to overclock the TI parts and is asking for flakey behaviour. -* Revised DCO calibrator to work with both 1611 and Z1 2617/1618. Z1 uses dco - calibrator to sync up to 8MiHz. The Z1 uses the 2617 which can be clocked - to 16MHz so 8MiHz is safe. +* Revised DCO calibrator to work with both 1611 and Z1 2617/1618. * Device configuration blocks by default moved to ROM. This saves start up cpu cycles and space in RAM. Config blocks can still be placed in RAM and modified @@ -123,11 +124,6 @@ Other notable changes: - make interrupts be parameterized. This routes dma interrupts to the appropriate channel handler. - *** The old dma handler has been brought back in for backward compatibility and - the new dma handler (supports x5) is now in tos/chips/msp430/dma_unified. How - to migrate existing code is a bit of a pain. Should revert existing code - back to old dma handler. - * X5 additions: From 283248794d46034f7fd0275b85cbbd5a40f03bb3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Dec 2011 02:23:35 -0800 Subject: [PATCH 216/411] Add ifdefs for the 241x 241x (241[6-9]) are same as 261x without the DAC. Add check in McuSleepC for an ADC10 --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 17 ++++++++++----- tos/chips/msp430/x2xxx/McuSleepC.nc | 23 +++++++++++++++++--- 2 files changed, 32 insertions(+), 8 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 09f340d9a6..a0412ef578 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -207,7 +207,15 @@ configuration HplMsp430GeneralIOC { /* - * x2 family: msp430f2{4,6}1{6,7,8,9} processors + * x2 family: msp430f2{4,6}1[6-9] processors + * + * __msp430x24x: msp430f24[7-9], msp430f2410 + * __msp430x241x: msp430f241[6-9] + * __msp430x26x: msp430f261[6-9] + * __msp430x261x: new headers none, 3.2.3 headers: msp430x261x.h + * + * Note: 247, 248, 249, and 2410 aren't currently used for a tinyos platform. + * 241[6-9] and 261[6-9] are used by tinyos platforms. * * Old headers: mspgccX (3.2.3) includes msp430x261x.h (-mmcu=msp430x2617) * which defines __msp430x261x. @@ -215,11 +223,10 @@ configuration HplMsp430GeneralIOC { * New headers: mspgcc4 (4.4.5, uniarch, TI_HEADERS) defines __msp430x26x. There * doesn't look like there is any conflict with any other processor defines. * - * WARNING: The 2410 apprears to be different from the 241[6-9] processors. It - * defines __msp430x24x, while the 241[6-9] includes define __msp430x241x which - * is what we are interested in. I haven't looked at what is different. + * Differences between 2410 and 241x: + * 241x processors MSP430X_CPU + * 241x include ports 7 and 8. */ - #if defined(__msp430x241x) || defined(__msp430x261x) || defined(__msp430x26x) provides interface HplMsp430GeneralIO as UCA0CLK; provides interface HplMsp430GeneralIO as UCA0STE; diff --git a/tos/chips/msp430/x2xxx/McuSleepC.nc b/tos/chips/msp430/x2xxx/McuSleepC.nc index d8d17f700e..f18545fab7 100644 --- a/tos/chips/msp430/x2xxx/McuSleepC.nc +++ b/tos/chips/msp430/x2xxx/McuSleepC.nc @@ -100,15 +100,32 @@ implementation { } } #endif - + +#if defined(__msp430_have_adc10) || defined(__MSP430_HAS_ADC10__) + // ADC10 check, pre-condition: pState != MSP430_POWER_ACTIVE + if (ADC10CTL0 & ADC10ON){ + if (ADC10CTL1 & ADC10SSEL_2){ + // sample or conversion operation with MCLK or SMCLK + if (ADC10CTL1 & ADC10SSEL_1) + pState = MSP430_POWER_LPM1; + else + pState = MSP430_POWER_ACTIVE; + } else if ((ADC10CTL1 & SHS_3) && ((TACTL & TASSEL_3) == TASSEL_2)){ + // Timer A is used as sample-and-hold source and SMCLK sources Timer A + // (Timer A interrupts are always disabled when it is used by the + // ADC subsystem, that's why the Timer check above is not enough) + pState = MSP430_POWER_LPM1; + } + } +#endif return pState; } - + void computePowerState() { powerState = mcombine(getPowerState(), call McuPowerOverride.lowestState()); } - + async command void McuSleep.sleep() { uint16_t temp; if (dirty) { From c6c8a4fc7aa412a7e7a212a1cc91043fe20620ab Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Mon, 12 Dec 2011 11:13:43 +0100 Subject: [PATCH 217/411] Add gnode platform. --- support/make/gnode.target | 45 ++ tos/platforms/gnode/.platform | 89 ++ tos/platforms/gnode/ActiveMessageC.nc | 42 + tos/platforms/gnode/DefaultAdcConfigureC.nc | 29 + tos/platforms/gnode/DemoSensorC.nc | 57 ++ tos/platforms/gnode/DummyGeneralIOC.nc | 91 +++ tos/platforms/gnode/GeneralIOC.nc | 17 + tos/platforms/gnode/LedsP.nc | 150 ++++ tos/platforms/gnode/LocalTime32khzC.nc | 13 + tos/platforms/gnode/PlatformC.nc | 24 + tos/platforms/gnode/PlatformClockC.nc | 8 + tos/platforms/gnode/PlatformLedsC.nc | 17 + tos/platforms/gnode/PlatformP.nc | 21 + tos/platforms/gnode/PlatformPinsC.nc | 8 + tos/platforms/gnode/PlatformSerialC.nc | 26 + tos/platforms/gnode/PlatformSerialUsciP.nc | 52 ++ tos/platforms/gnode/Serial.h | 137 ++++ tos/platforms/gnode/SerialActiveMessageC.nc | 74 ++ tos/platforms/gnode/SerialActiveMessageP.nc | 197 +++++ tos/platforms/gnode/TimeSyncMessageC.nc | 47 ++ tos/platforms/gnode/VoltageC.nc | 13 + tos/platforms/gnode/VoltageP.nc | 20 + tos/platforms/gnode/chips/23axxx/23Axxx.txt | 12 + .../gnode/chips/23axxx/Microchip23AxxxC.nc | 20 + .../gnode/chips/23axxx/Microchip23AxxxP.nc | 87 ++ tos/platforms/gnode/chips/23axxx/SRAM.nc | 4 + tos/platforms/gnode/chips/23axxx/SRAMC.nc | 15 + .../gnode/chips/23axxx/SRAMQueueC.nc | 14 + .../gnode/chips/23axxx/SRAMQueueP.nc | 77 ++ .../gnode/chips/at45db/HplAt45dbC.nc | 52 ++ .../gnode/chips/at45db/HplAt45dbP.nc | 71 ++ .../gnode/chips/at45db/HplAt45db_chip.h | 45 ++ .../chips/cc1101/ChipconRegisterValues.h | 209 +++++ .../gnode/chips/ccpacket/ChipconAssert.h | 40 + tos/platforms/gnode/chips/ccpacket/ack/Ack.h | 8 + .../gnode/chips/ccpacket/ack/AckC.nc | 38 + .../gnode/chips/ccpacket/ack/AckP.nc | 326 ++++++++ tos/platforms/gnode/chips/ccpacket/am/AM.h | 44 + .../ccpacket/am/ActiveMessageAddressC.nc | 48 ++ .../ccpacket/am/ChipconActiveMessageC.nc | 72 ++ .../ccpacket/am/ChipconActiveMessageP.nc | 176 ++++ .../gnode/chips/ccpacket/am/NetMask.nc | 9 + .../chips/ccpacket/hal/ChipconRegisters.h | 90 +++ .../chips/ccpacket/hal/HalChipconControl.h | 11 + .../chips/ccpacket/hal/HalChipconControl.nc | 114 +++ .../chips/ccpacket/hal/HalChipconControlC.nc | 37 + .../chips/ccpacket/hal/HalChipconControlP.nc | 765 ++++++++++++++++++ .../chips/ccpacket/lpl/LowPowerListening.h | 20 + .../chips/ccpacket/lpl/LowPowerListening.nc | 76 ++ .../chips/ccpacket/lpl/LowPowerListeningC.nc | 42 + .../chips/ccpacket/lpl/LowPowerListeningP.nc | 280 +++++++ .../ccpacket/lpl/NoLowPowerListeningC.nc | 33 + .../ccpacket/lpl/NoLowPowerListeningP.nc | 42 + .../chips/ccpacket/packet/ChipconPacket.h | 55 ++ .../chips/ccpacket/packet/ChipconPacket.nc | 14 + .../chips/ccpacket/packet/ChipconPacketC.nc | 24 + .../chips/ccpacket/packet/ChipconPacketP.nc | 206 +++++ .../chips/ccpacket/packet/PacketMetadata.nc | 17 + .../chips/ccpacket/packet/PacketMetadataC.nc | 13 + .../chips/ccpacket/packet/PacketMetadataP.nc | 24 + .../gnode/chips/ccpacket/rxtx/PowerP.nc | 40 + .../gnode/chips/ccpacket/rxtx/ReceiveP.nc | 59 ++ .../gnode/chips/ccpacket/rxtx/SendNotify.nc | 6 + .../gnode/chips/ccpacket/rxtx/SendP.nc | 259 ++++++ .../gnode/chips/ccpacket/rxtx/SendReceiveC.nc | 46 ++ .../gnode/chips/ccpacket/rxtx/SendReceiveP.nc | 118 +++ .../chips/ccpacket/spi/DedicatedResourceC.nc | 51 ++ .../ccpacket/spi/HplChipconHardwareSpiC.nc | 23 + .../ccpacket/spi/HplChipconPacketRadioC.nc | 40 + .../ccpacket/spi/HplChipconSoftwareSpiC.nc | 28 + .../ccpacket/spi/HplChipconSoftwareSpiP.nc | 214 +++++ .../gnode/chips/ccpacket/spi/HplChipconSpi.nc | 28 + .../chips/ccpacket/spi/HplChipconSpiB0P.nc | 123 +++ .../ccpacket/spi/HplChipconSpiGenericP.nc | 47 ++ .../timesync/ChipconTimeSyncMessageC.nc | 55 ++ .../ccpacket/timesync/PacketTimeStampC.nc | 26 + .../ccpacket/timesync/PacketTimeStampP.nc | 45 ++ .../chips/ccpacket/timesync/PacketTimeSync.h | 13 + .../ccpacket/timesync/PacketTimeSyncC.nc | 51 ++ .../ccpacket/timesync/PacketTimeSyncP.nc | 228 ++++++ .../gnode/chips/msp430/StackGuardWatchDogC.nc | 15 + .../gnode/chips/msp430/StackGuardWatchDogP.nc | 115 +++ .../chips/msp430/flash/InternalFlashC.nc | 138 ++++ .../chips/msp430/pins/Msp430GeneralIOC.nc | 95 +++ .../chips/msp430/pins/Msp430GeneralIOP.nc | 55 ++ .../gnode/chips/msp430/pins/Msp430GpioC.nc | 53 ++ .../chips/msp430/pins/Msp430InterruptC.nc | 76 ++ .../gnode/chips/msp430/pins/msp430_ports.h | 30 + .../gnode/chips/msp430/timer/Msp430DcoSpec.h | 69 ++ .../msp430/timer/Msp430Timer32khzMapC.nc | 75 ++ .../gnode/chips/msp430/timer/Msp430TimerC.nc | 170 ++++ tos/platforms/gnode/hardware.h | 27 + tos/platforms/gnode/interfaces/GeneralIO.nc | 44 + tos/platforms/gnode/lib/assert/Assert.h | 15 + tos/platforms/gnode/lib/assert/AssertReboot.h | 9 + .../gnode/lib/assert/AssertRebootC.nc | 15 + .../gnode/lib/assert/AssertRebootP.nc | 39 + tos/platforms/gnode/lib/assert/AssertUart.h | 23 + tos/platforms/gnode/lib/assert/AssertUartC.nc | 24 + tos/platforms/gnode/lib/assert/AssertUartP.nc | 126 +++ tos/platforms/gnode/lib/assert/Reboot.nc | 10 + tos/platforms/gnode/lib/assert/RebootC.nc | 13 + tos/platforms/gnode/lib/printf/NoPrintfC.nc | 7 + .../gnode/lib/printf/OutputStream.nc | 4 + tos/platforms/gnode/lib/printf/PrintfC.nc | 20 + tos/platforms/gnode/lib/printf/PrintfFlush.nc | 3 + tos/platforms/gnode/lib/printf/PrintfP.nc | 128 +++ tos/platforms/gnode/lib/printf/Putchar.nc | 6 + tos/platforms/gnode/lib/printf/PutcharC.nc | 15 + .../gnode/lib/printf/UartOutputStreamC.nc | 12 + .../gnode/lib/printf/UartOutputStreamP.nc | 42 + tos/platforms/gnode/lib/printf/noprintf.h | 7 + tos/platforms/gnode/lib/printf/printf.h | 7 + tos/platforms/gnode/lib/spi/SoftwareSpi.txt | 38 + tos/platforms/gnode/lib/spi/SoftwareSpiC.nc | 31 + tos/platforms/gnode/lib/spi/SoftwareSpiP.nc | 202 +++++ tos/platforms/gnode/obsolete.txt | 14 + tos/platforms/gnode/platform.h | 0 tos/platforms/gnode/platform_message.h | 23 + 119 files changed, 7702 insertions(+) create mode 100644 support/make/gnode.target create mode 100644 tos/platforms/gnode/.platform create mode 100644 tos/platforms/gnode/ActiveMessageC.nc create mode 100644 tos/platforms/gnode/DefaultAdcConfigureC.nc create mode 100644 tos/platforms/gnode/DemoSensorC.nc create mode 100644 tos/platforms/gnode/DummyGeneralIOC.nc create mode 100644 tos/platforms/gnode/GeneralIOC.nc create mode 100644 tos/platforms/gnode/LedsP.nc create mode 100644 tos/platforms/gnode/LocalTime32khzC.nc create mode 100644 tos/platforms/gnode/PlatformC.nc create mode 100644 tos/platforms/gnode/PlatformClockC.nc create mode 100644 tos/platforms/gnode/PlatformLedsC.nc create mode 100644 tos/platforms/gnode/PlatformP.nc create mode 100644 tos/platforms/gnode/PlatformPinsC.nc create mode 100644 tos/platforms/gnode/PlatformSerialC.nc create mode 100644 tos/platforms/gnode/PlatformSerialUsciP.nc create mode 100644 tos/platforms/gnode/Serial.h create mode 100755 tos/platforms/gnode/SerialActiveMessageC.nc create mode 100755 tos/platforms/gnode/SerialActiveMessageP.nc create mode 100644 tos/platforms/gnode/TimeSyncMessageC.nc create mode 100644 tos/platforms/gnode/VoltageC.nc create mode 100644 tos/platforms/gnode/VoltageP.nc create mode 100644 tos/platforms/gnode/chips/23axxx/23Axxx.txt create mode 100644 tos/platforms/gnode/chips/23axxx/Microchip23AxxxC.nc create mode 100644 tos/platforms/gnode/chips/23axxx/Microchip23AxxxP.nc create mode 100644 tos/platforms/gnode/chips/23axxx/SRAM.nc create mode 100644 tos/platforms/gnode/chips/23axxx/SRAMC.nc create mode 100644 tos/platforms/gnode/chips/23axxx/SRAMQueueC.nc create mode 100644 tos/platforms/gnode/chips/23axxx/SRAMQueueP.nc create mode 100644 tos/platforms/gnode/chips/at45db/HplAt45dbC.nc create mode 100644 tos/platforms/gnode/chips/at45db/HplAt45dbP.nc create mode 100644 tos/platforms/gnode/chips/at45db/HplAt45db_chip.h create mode 100644 tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h create mode 100644 tos/platforms/gnode/chips/ccpacket/ChipconAssert.h create mode 100644 tos/platforms/gnode/chips/ccpacket/ack/Ack.h create mode 100644 tos/platforms/gnode/chips/ccpacket/ack/AckC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/ack/AckP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/am/AM.h create mode 100644 tos/platforms/gnode/chips/ccpacket/am/ActiveMessageAddressC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/am/NetMask.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/hal/ChipconRegisters.h create mode 100644 tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.h create mode 100644 tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.h create mode 100644 tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h create mode 100644 tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/packet/PacketMetadata.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/rxtx/PowerP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/rxtx/ReceiveP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/rxtx/SendNotify.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/rxtx/SendP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/spi/DedicatedResourceC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/spi/HplChipconPacketRadioC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpi.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiB0P.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiGenericP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/timesync/ChipconTimeSyncMessageC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampP.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSync.h create mode 100644 tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncC.nc create mode 100644 tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncP.nc create mode 100644 tos/platforms/gnode/chips/msp430/StackGuardWatchDogC.nc create mode 100644 tos/platforms/gnode/chips/msp430/StackGuardWatchDogP.nc create mode 100644 tos/platforms/gnode/chips/msp430/flash/InternalFlashC.nc create mode 100644 tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOC.nc create mode 100644 tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOP.nc create mode 100644 tos/platforms/gnode/chips/msp430/pins/Msp430GpioC.nc create mode 100644 tos/platforms/gnode/chips/msp430/pins/Msp430InterruptC.nc create mode 100644 tos/platforms/gnode/chips/msp430/pins/msp430_ports.h create mode 100644 tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h create mode 100644 tos/platforms/gnode/chips/msp430/timer/Msp430Timer32khzMapC.nc create mode 100644 tos/platforms/gnode/chips/msp430/timer/Msp430TimerC.nc create mode 100644 tos/platforms/gnode/hardware.h create mode 100644 tos/platforms/gnode/interfaces/GeneralIO.nc create mode 100644 tos/platforms/gnode/lib/assert/Assert.h create mode 100644 tos/platforms/gnode/lib/assert/AssertReboot.h create mode 100644 tos/platforms/gnode/lib/assert/AssertRebootC.nc create mode 100644 tos/platforms/gnode/lib/assert/AssertRebootP.nc create mode 100644 tos/platforms/gnode/lib/assert/AssertUart.h create mode 100644 tos/platforms/gnode/lib/assert/AssertUartC.nc create mode 100644 tos/platforms/gnode/lib/assert/AssertUartP.nc create mode 100644 tos/platforms/gnode/lib/assert/Reboot.nc create mode 100644 tos/platforms/gnode/lib/assert/RebootC.nc create mode 100644 tos/platforms/gnode/lib/printf/NoPrintfC.nc create mode 100644 tos/platforms/gnode/lib/printf/OutputStream.nc create mode 100644 tos/platforms/gnode/lib/printf/PrintfC.nc create mode 100644 tos/platforms/gnode/lib/printf/PrintfFlush.nc create mode 100644 tos/platforms/gnode/lib/printf/PrintfP.nc create mode 100644 tos/platforms/gnode/lib/printf/Putchar.nc create mode 100644 tos/platforms/gnode/lib/printf/PutcharC.nc create mode 100644 tos/platforms/gnode/lib/printf/UartOutputStreamC.nc create mode 100644 tos/platforms/gnode/lib/printf/UartOutputStreamP.nc create mode 100644 tos/platforms/gnode/lib/printf/noprintf.h create mode 100644 tos/platforms/gnode/lib/printf/printf.h create mode 100644 tos/platforms/gnode/lib/spi/SoftwareSpi.txt create mode 100644 tos/platforms/gnode/lib/spi/SoftwareSpiC.nc create mode 100644 tos/platforms/gnode/lib/spi/SoftwareSpiP.nc create mode 100644 tos/platforms/gnode/obsolete.txt create mode 100644 tos/platforms/gnode/platform.h create mode 100644 tos/platforms/gnode/platform_message.h diff --git a/support/make/gnode.target b/support/make/gnode.target new file mode 100644 index 0000000000..d503b03453 --- /dev/null +++ b/support/make/gnode.target @@ -0,0 +1,45 @@ +PLATFORM = gnode +MCU_FAMILY = msp430 +MCU = msp430f2418 + +# pass MCU to gcc +CFLAGS += -mmcu=$(MCU) + +# this is resolved relative to the msp directory, see msp/msp.rules +DEFAULT_PROGRAM ?= bsl + +# use our bootloader; the default assumes a telos node +MSP_BSL = lnode-bsl + +# if not set, default to the G-Node v1.3 configuration +# alternatively, explicitly clear it, or msp.rules adds "--telos" +ifeq ($(MSP_BSL_FLAGS),) +MSP_BSL_FLAGS = --invert-sda --invert-scl +#MSP_BSL_FLAGS = +endif + +# turn bsl.n into /dev/ttyUSBn, which is what bsl.extra expects +ifneq ($(BSL),) +BSL := /dev/ttyUSB$(BSL) +endif + +# pass AM group and network mask to preprocessor +ifneq ($(GROUP),) +DEFAULT_LOCAL_GROUP=$(GROUP) +else +# use default set in AM.h +DEFAULT_LOCAL_GROUP= +endif + +ifneq ($(NETMASK),) +CFLAGS+=-DDEFINED_AM_NETWORK_MASK=$(NETMASK) +endif + +# AT45db flash memory support +VOLUME_ALLOCATOR = tos-storage-at45db +VOLUME_FILE = volumes-at45db.xml + +$(call TOSMake_include_platform,msp) + +gnode: $(BUILD_DEPS) + @: diff --git a/tos/platforms/gnode/.platform b/tos/platforms/gnode/.platform new file mode 100644 index 0000000000..0ce393c9b6 --- /dev/null +++ b/tos/platforms/gnode/.platform @@ -0,0 +1,89 @@ +# Includes that should take precedence come first. Platforms come before +# chips because they may override files. These must be specified as +# @includes instead of -I's to @opts, otherwise the %T won't be processed +# by ncc. + +push( @includes, qw( + + %P + %P/interfaces + %P/chips/msp430 + %P/chips/msp430/flash + %P/chips/msp430/pins + %P/chips/msp430/timer + %P/chips/cc1101 + %P/chips/ccpacket + %P/chips/ccpacket/spi + %P/chips/ccpacket/hal + %P/chips/ccpacket/rxtx + %P/chips/ccpacket/ack + %P/chips/ccpacket/lpl + %P/chips/ccpacket/packet + %P/chips/ccpacket/am + %P/chips/ccpacket/timesync + %P/chips/at45db + %P/chips/23axxx + %P/lib/assert + %P/lib/printf + %P/lib/spi + + %T/chips/msp430 + %T/chips/msp430/adc12 + %T/chips/msp430/clock_bcs + %T/chips/msp430/dma + %T/chips/msp430/pins + %T/chips/msp430/sensors + %T/chips/msp430/timer + %T/chips/msp430/x1x2/timer + %T/chips/msp430/x2xxx + %T/chips/msp430/x2xxx/usci + + %T/chips/at45db + %T/lib/timer + %T/lib/serial + %T/lib/adc + %T/lib/power + +) ); + +# if we're using an MSP430X compiler, use 16 bit data pointers +push @opts, "-mdata-64k" if `msp430-gcc --target-help | grep mdata-64k`; + +# uniarch by default enables the watchdog +push @opts, "-mdisable-watchdog" if `msp430-gcc --target-help | grep mdisable-watchdog`; + +push (@opts, qw( + + -gcc=msp430-gcc + -fnesc-target=msp430 + -fnesc-no-debug + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask + +) ); + +push @opts, "-mingw-gcc" if $cygwin; + +$ENV{'CIL_MACHINE'} = + "version_major=3 " . + "version_minor=2 " . + "version=msp430-3.2.3 " . + "short=2,2 " . + "int=2,2 " . + "long=4,2 " . + "long_long=8,2 " . + "pointer=2,2 " . + "enum=2,2 " . + "float=4,2 " . + "double=4,2 " . + "long_double=4,2 " . + "void=1,1 " . + "fun=1,2 " . + "wchar_size_size=2,2 " . + "alignof_string=1 " . + "max_alignment=1 " . + "char_wchar_signed=true,true " . + "const_string_literals=true " . + "big_endian=false " . + "underscore_name=false " . + "__builtin_va_list=true " . + "__thread_is_keyword=true"; diff --git a/tos/platforms/gnode/ActiveMessageC.nc b/tos/platforms/gnode/ActiveMessageC.nc new file mode 100644 index 0000000000..578512b08f --- /dev/null +++ b/tos/platforms/gnode/ActiveMessageC.nc @@ -0,0 +1,42 @@ +#include "AM.h" +#include "Timer.h" + +/** + * Wraps/renames ChipconActiveMessageC. + */ +configuration ActiveMessageC { + provides { + interface StdControl; + interface SplitControl; + + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; + interface LowPowerListening; + + interface PacketTimeStamp; + interface PacketTimeStamp as PacketTimeStamp32khz; + } +} + +implementation { + + components ChipconActiveMessageC as AM; + + StdControl = AM; + SplitControl = AM; + AMSend = AM; + Receive = AM.Receive; + Snoop = AM.Snoop; + Packet = AM; + AMPacket = AM; + PacketAcknowledgements = AM; + LowPowerListening = AM; + PacketTimeStamp = AM; + PacketTimeStamp32khz = AM; + +} diff --git a/tos/platforms/gnode/DefaultAdcConfigureC.nc b/tos/platforms/gnode/DefaultAdcConfigureC.nc new file mode 100644 index 0000000000..96ea24710b --- /dev/null +++ b/tos/platforms/gnode/DefaultAdcConfigureC.nc @@ -0,0 +1,29 @@ +#include "Msp430Adc12.h" + +/** + * Default MSP430 ADC configuration that just takes a channel as a parameter. + */ +generic module DefaultAdcConfigureC(uint8_t channel) { + provides { + interface AdcConfigure; + } +} + +implementation { + + const msp430adc12_channel_config_t config = { + inch: channel, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_1_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() { + return &config; + } + +} diff --git a/tos/platforms/gnode/DemoSensorC.nc b/tos/platforms/gnode/DemoSensorC.nc new file mode 100644 index 0000000000..31e7cc2921 --- /dev/null +++ b/tos/platforms/gnode/DemoSensorC.nc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * DemoSensorC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular DemoSensorC on the telosb platform provides a + * voltage reading, using VoltageC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $ + * + */ + +generic configuration DemoSensorC() +{ + provides interface Read; +} +implementation +{ + components new VoltageC() as DemoSensor; + Read = DemoSensor; +} diff --git a/tos/platforms/gnode/DummyGeneralIOC.nc b/tos/platforms/gnode/DummyGeneralIOC.nc new file mode 100644 index 0000000000..5ad6056929 --- /dev/null +++ b/tos/platforms/gnode/DummyGeneralIOC.nc @@ -0,0 +1,91 @@ +/** + * Do-nothing GeneralIO/GpioInterrupt implementation. + */ +generic module DummyGeneralIOC(bool high) { + provides { + interface GeneralIO; + interface GpioInterrupt; + interface HplMsp430GeneralIO; + interface HplMsp430Interrupt; + } +} + +implementation { + + uint8_t value = high; + uint8_t directionInput = TRUE; + + void set() { + atomic value = TRUE; + } + + void clear() { + atomic value = FALSE; + } + + void toggle() { + atomic value = !value; + } + + uint8_t get() { + atomic return value; + } + + void makeInput() { + atomic directionInput = TRUE; + } + + void makeOutput() { + atomic directionInput = FALSE; + } + + uint8_t isInput() { + atomic return directionInput; + } + + uint8_t isOutput() { + atomic return !directionInput; + } + + async command void GeneralIO.set() { set(); } + async command void GeneralIO.clr() { clear(); } + async command void GeneralIO.toggle() { toggle(); } + async command bool GeneralIO.get() { return get(); } + async command void GeneralIO.makeInput() { makeInput(); } + async command bool GeneralIO.isInput() { return isInput(); } + async command void GeneralIO.makeOutput() { makeOutput(); } + async command bool GeneralIO.isOutput() { return isOutput(); } + async command void GeneralIO.pullup() { set(); } + async command void GeneralIO.pulldown() { clear(); } + async command void GeneralIO.highZ() { makeInput(); } + + async command error_t GpioInterrupt.enableRisingEdge() { return SUCCESS; } + async command error_t GpioInterrupt.enableFallingEdge() { return SUCCESS; } + async command error_t GpioInterrupt.disable() { return SUCCESS; } + + async command void HplMsp430GeneralIO.set() { set(); } + async command void HplMsp430GeneralIO.clr() { clear(); } + async command void HplMsp430GeneralIO.toggle() { toggle(); } + async command uint8_t HplMsp430GeneralIO.getRaw() { // return value as if whole port had value of this IO pin + atomic return value ? 255 : 0; + } + async command bool HplMsp430GeneralIO.get() { return get(); } + async command void HplMsp430GeneralIO.makeInput() { makeInput(); } + async command bool HplMsp430GeneralIO.isInput() { return isInput(); } + async command void HplMsp430GeneralIO.makeOutput() { makeOutput(); } + async command bool HplMsp430GeneralIO.isOutput() { return isOutput(); } + async command void HplMsp430GeneralIO.selectModuleFunc() {} + async command bool HplMsp430GeneralIO.isModuleFunc() { return FALSE; } + async command void HplMsp430GeneralIO.selectIOFunc() {} + async command bool HplMsp430GeneralIO.isIOFunc() { return TRUE; } + + async command void HplMsp430Interrupt.enable() {} + async command void HplMsp430Interrupt.disable() {} + async command void HplMsp430Interrupt.clear() {} + async command void HplMsp430Interrupt.edge(bool low_to_high) {} + async command bool HplMsp430Interrupt.getValue() { return get(); } + + async command error_t HplMsp430GeneralIO.setResistor(uint8_t mode) { return SUCCESS; } + async command uint8_t HplMsp430GeneralIO.getResistor() { return MSP430_PORT_RESISTOR_OFF; } + +} diff --git a/tos/platforms/gnode/GeneralIOC.nc b/tos/platforms/gnode/GeneralIOC.nc new file mode 100644 index 0000000000..d3d8044f0d --- /dev/null +++ b/tos/platforms/gnode/GeneralIOC.nc @@ -0,0 +1,17 @@ +/** + * Wraps/renames Msp430GeneralIOC. + */ +configuration GeneralIOC { + provides { + interface GeneralIO[uint8_t pin]; + interface GpioInterrupt[uint8_t pin]; + } +} + +implementation { + + components Msp430GeneralIOC; + GeneralIO = Msp430GeneralIOC; + GpioInterrupt = Msp430GeneralIOC; + +} diff --git a/tos/platforms/gnode/LedsP.nc b/tos/platforms/gnode/LedsP.nc new file mode 100644 index 0000000000..5e110dc796 --- /dev/null +++ b/tos/platforms/gnode/LedsP.nc @@ -0,0 +1,150 @@ +// $Id: LedsP.nc,v 1.4 2006/12/12 18:23:47 vlahan Exp $ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * The implementation of the standard 3 LED mote abstraction. + * + * @author Joe Polastre + * @author Philip Levis + * + * @date March 21, 2005 + * + * Outputs inverted (active high). + * @author Michiel Konstapel + */ + +module LedsP { + provides { + interface Init; + interface Leds; + } + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} +implementation { + command error_t Init.init() { + atomic { + dbg("Init", "LEDS: initialized.\n"); + call Led0.makeOutput(); + call Led1.makeOutput(); + call Led2.makeOutput(); + call Led0.clr(); + call Led1.clr(); + call Led2.clr(); + } + return SUCCESS; + } + + /* Note: the call is inside the dbg, as it's typically a read of a volatile + location, so can't be deadcode eliminated */ +#define DBGLED(n) \ + dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on"); + + async command void Leds.led0On() { + call Led0.set(); + DBGLED(0); + } + + async command void Leds.led0Off() { + call Led0.clr(); + DBGLED(0); + } + + async command void Leds.led0Toggle() { + call Led0.toggle(); + DBGLED(0); + } + + async command void Leds.led1On() { + call Led1.set(); + DBGLED(1); + } + + async command void Leds.led1Off() { + call Led1.clr(); + DBGLED(1); + } + + async command void Leds.led1Toggle() { + call Led1.toggle(); + DBGLED(1); + } + + async command void Leds.led2On() { + call Led2.set(); + DBGLED(2); + } + + async command void Leds.led2Off() { + call Led2.clr(); + DBGLED(2); + } + + async command void Leds.led2Toggle() { + call Led2.toggle(); + DBGLED(2); + } + + async command uint8_t Leds.get() { + uint8_t rval; + atomic { + rval = 0; + if (!call Led0.get()) { + rval |= LEDS_LED0; + } + if (!call Led1.get()) { + rval |= LEDS_LED1; + } + if (!call Led2.get()) { + rval |= LEDS_LED2; + } + } + return rval; + } + + async command void Leds.set(uint8_t val) { + atomic { + if (val & LEDS_LED0) { + call Leds.led0On(); + } + else { + call Leds.led0Off(); + } + if (val & LEDS_LED1) { + call Leds.led1On(); + } + else { + call Leds.led1Off(); + } + if (val & LEDS_LED2) { + call Leds.led2On(); + } + else { + call Leds.led2Off(); + } + } + } +} diff --git a/tos/platforms/gnode/LocalTime32khzC.nc b/tos/platforms/gnode/LocalTime32khzC.nc new file mode 100644 index 0000000000..f3a8e7a0f5 --- /dev/null +++ b/tos/platforms/gnode/LocalTime32khzC.nc @@ -0,0 +1,13 @@ +#include "Timer.h" + +configuration LocalTime32khzC { + provides interface LocalTime; +} + +implementation { + components Counter32khz32C; + components new CounterToLocalTimeC(T32khz); + + LocalTime = CounterToLocalTimeC; + CounterToLocalTimeC.Counter -> Counter32khz32C; +} diff --git a/tos/platforms/gnode/PlatformC.nc b/tos/platforms/gnode/PlatformC.nc new file mode 100644 index 0000000000..26b04b5816 --- /dev/null +++ b/tos/platforms/gnode/PlatformC.nc @@ -0,0 +1,24 @@ +#include "hardware.h" + + // some TinyOS apps don't include this, +// instead depending on the platform to do it for them +#include "AM.h" + +configuration PlatformC { + provides interface Init; +} + +implementation { + +#ifndef assert + components AssertRebootC; +#endif + + components PlatformP, PlatformClockC, PlatformPinsC, StackGuardWatchDogC; + + Init = PlatformP; + PlatformP.InitLevel[0] -> PlatformClockC; // setup clocks + PlatformP.InitLevel[1] -> PlatformPinsC; // configure I/O pins + PlatformP.InitLevel[2] -> StackGuardWatchDogC; // init stack protection and start watchdog + +} diff --git a/tos/platforms/gnode/PlatformClockC.nc b/tos/platforms/gnode/PlatformClockC.nc new file mode 100644 index 0000000000..e71775b9b0 --- /dev/null +++ b/tos/platforms/gnode/PlatformClockC.nc @@ -0,0 +1,8 @@ +configuration PlatformClockC { + provides interface Init; +} + +implementation { + components Msp430ClockC; + Init = Msp430ClockC; +} diff --git a/tos/platforms/gnode/PlatformLedsC.nc b/tos/platforms/gnode/PlatformLedsC.nc new file mode 100644 index 0000000000..84cb225557 --- /dev/null +++ b/tos/platforms/gnode/PlatformLedsC.nc @@ -0,0 +1,17 @@ +configuration PlatformLedsC { + provides interface GeneralIO as Led0; + provides interface GeneralIO as Led1; + provides interface GeneralIO as Led2; + uses interface Init; +} +implementation +{ + components GeneralIOC, PlatformP; + + Init = PlatformP.InitLevel[2]; + + Led0 = GeneralIOC.GeneralIO[LED_GREEN]; + Led1 = GeneralIOC.GeneralIO[LED_YELLOW]; + Led2 = GeneralIOC.GeneralIO[LED_RED]; + +} diff --git a/tos/platforms/gnode/PlatformP.nc b/tos/platforms/gnode/PlatformP.nc new file mode 100644 index 0000000000..775691331b --- /dev/null +++ b/tos/platforms/gnode/PlatformP.nc @@ -0,0 +1,21 @@ +/** + * Initialize the node by calling all connected Init interfaces. + * Order of initialization is determined by the "level" they are wired to. + */ +module PlatformP{ + provides interface Init; + uses interface Init as InitLevel[uint8_t level]; +} + +implementation { + command error_t Init.init() { + uint16_t level; + for (level = 0; level < 256; level++) { + call InitLevel.init[level](); + } + + return SUCCESS; + } + + default command error_t InitLevel.init[uint8_t level]() { return SUCCESS; } +} diff --git a/tos/platforms/gnode/PlatformPinsC.nc b/tos/platforms/gnode/PlatformPinsC.nc new file mode 100644 index 0000000000..382b8ebeb2 --- /dev/null +++ b/tos/platforms/gnode/PlatformPinsC.nc @@ -0,0 +1,8 @@ +configuration PlatformPinsC { + provides interface Init; +} + +implementation { + components Msp430GeneralIOC; + Init = Msp430GeneralIOC; +} diff --git a/tos/platforms/gnode/PlatformSerialC.nc b/tos/platforms/gnode/PlatformSerialC.nc new file mode 100644 index 0000000000..bc7121d754 --- /dev/null +++ b/tos/platforms/gnode/PlatformSerialC.nc @@ -0,0 +1,26 @@ +/** + * Use UART0 as the platform UART. + * Offers AsyncStdControl as well. + */ +configuration PlatformSerialC { + + provides interface StdControl; + provides interface AsyncStdControl; + provides interface UartStream; + provides interface UartByte; + +} + +implementation { + + components new Msp430UartA0C() as UartC; + UartStream = UartC; + UartByte = UartC; + + components PlatformSerialUsciP as PlatformSerial; + StdControl = PlatformSerial; + AsyncStdControl = PlatformSerial; + PlatformSerial.Msp430UartConfigure <- UartC.Msp430UartConfigure; + PlatformSerial.Resource -> UartC.Resource; + +} diff --git a/tos/platforms/gnode/PlatformSerialUsciP.nc b/tos/platforms/gnode/PlatformSerialUsciP.nc new file mode 100644 index 0000000000..d68adff3e6 --- /dev/null +++ b/tos/platforms/gnode/PlatformSerialUsciP.nc @@ -0,0 +1,52 @@ +module PlatformSerialUsciP { + provides interface StdControl; + provides interface AsyncStdControl; + provides interface Msp430UartConfigure; + uses interface Resource; +} + +implementation { + + #ifndef PLATFORM_SERIAL_BAUD_RATE + #define PLATFORM_SERIAL_BAUD_RATE 57600 + #endif + + // build up, for example, UBR_4MIHZ_57600 + #define CONCAT2(a, b, c, d) a ## b ## c ## d + #define CONCAT(a, b, c, d) CONCAT2(a, b, c, d) + + msp430_uart_union_config_t msp430_uart_config = {{ + ubr: CONCAT(UBR_, SMCLK_MHZ, MIHZ_, PLATFORM_SERIAL_BAUD_RATE), + umctl: CONCAT(UMCTL_, SMCLK_MHZ, MIHZ_, PLATFORM_SERIAL_BAUD_RATE), + ucmode: 0, // UART mode + ucspb: 0, // 1 stop bit + uc7bit: 0, // 8 data bits + ucpen: 0, // no parity + ucssel: 0x02, // SMCLK + }}; + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop(){ + call Resource.release(); + return SUCCESS; + } + + async command error_t AsyncStdControl.start(){ + return call Resource.immediateRequest(); + } + + async command error_t AsyncStdControl.stop(){ + call Resource.release(); + return SUCCESS; + } + + event void Resource.granted(){} + + async command const msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { + return &msp430_uart_config; + } + +} diff --git a/tos/platforms/gnode/Serial.h b/tos/platforms/gnode/Serial.h new file mode 100644 index 0000000000..030fbfa895 --- /dev/null +++ b/tos/platforms/gnode/Serial.h @@ -0,0 +1,137 @@ +//$Id: Serial.h,v 1.7 2008/02/20 04:53:37 scipio Exp $ +/* "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ +/* + * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By + * downloading, copying, installing or using the software you agree to + * this license. If you do not agree to this license, do not download, + * install, copy or use the software. + * + * Intel Open Source License + * + * Copyright (c) 2002 Intel Corporation + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * Neither the name of the Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Phil Buonadonna + * + */ + +/** + * @author Phil Buonadonna + * @author Lewis Girod + * @author Ben Greenstein + * @author Philip Levis + * @date August 7 2005 + * + * @author Michiel Konstapel + * Define serial_header_t with explicit types to be compatible with the TinyOS + * toolchain, which doesn't expect 32 bit addresses. + * Note that this means that over-the-air and over-the-wire addresses + * are not necessarily the same. + */ + +#ifndef SERIAL_H +#define SERIAL_H +#include "AM.h" + +typedef uint8_t uart_id_t; + +#define UQ_SERIALQUEUE_SEND "SerialQueueP.Send" + +enum { + HDLC_FLAG_BYTE = 0x7e, + HDLC_CTLESC_BYTE = 0x7d, +}; + +// message_t type dispatch + +enum { + TOS_SERIAL_ACTIVE_MESSAGE_ID = 0, + TOS_SERIAL_CC1000_ID = 1, + TOS_SERIAL_802_15_4_ID = 2, + TOS_SERIAL_UNKNOWN_ID = 255, +}; + +// Framer-level dispatch +enum { + SERIAL_PROTO_ACK = 67, + SERIAL_PROTO_PACKET_ACK = 68, + SERIAL_PROTO_PACKET_NOACK = 69, + SERIAL_PROTO_PACKET_UNKNOWN = 255 +}; + +typedef struct radio_stats { + uint8_t version; + uint8_t flags; + uint8_t reserved; + uint8_t platform; + uint16_t MTU; + uint16_t radio_crc_fail; + uint16_t radio_queue_drops; + uint16_t serial_crc_fail; + uint16_t serial_tx_fail; + uint16_t serial_short_packets; + uint16_t serial_proto_drops; +} radio_stats_t; + +// define serial header to match what the TinyOS toolchain expects, +// so use 16 bit, big endian addresses, instead of our am_addr_t. +typedef nx_struct serial_header { + nx_uint16_t dest; + nx_uint16_t src; + nx_uint8_t length; + nx_uint8_t group; + nx_am_id_t type; +} serial_header_t; + +typedef nx_struct serial_packet { + serial_header_t header; + nx_uint8_t data[]; +} serial_packet_t; + +typedef nx_struct serial_metadata { + nx_uint8_t ack; +} serial_metadata_t; + +#endif diff --git a/tos/platforms/gnode/SerialActiveMessageC.nc b/tos/platforms/gnode/SerialActiveMessageC.nc new file mode 100755 index 0000000000..7462ab186b --- /dev/null +++ b/tos/platforms/gnode/SerialActiveMessageC.nc @@ -0,0 +1,74 @@ +//$Id: SerialActiveMessageC.nc,v 1.4 2006/12/12 18:23:31 vlahan Exp $ + +/* "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * Sending active messages over the serial port. + * + * @author Philip Levis + * @author Ben Greenstein + * @date August 7 2005 + * + */ + +/** + * Edited by SOWNet to work with the Lnode 32 bit addresss scheme + * now uses ActiveMessageAddressC to get the current group address instead of + * returning hardcoded TOS_AM_GROUP + * @author Bas van der Doorn + * @date August 12 2008 + */ + + +#include "Serial.h" +configuration SerialActiveMessageC { + provides { + interface SplitControl; + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; + } + uses interface Leds; +} +implementation { + components new SerialActiveMessageP() as AM, SerialDispatcherC; + components SerialPacketInfoActiveMessageP as Info, MainC; + + MainC.SoftwareInit -> SerialDispatcherC; + Leds = SerialDispatcherC; + SplitControl = SerialDispatcherC; + + AMSend = AM; + Receive = AM; + Packet = AM; + AMPacket = AM; + PacketAcknowledgements = AM; + + AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID]; + AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID]; + + SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info; + + components ActiveMessageAddressC; + AM.ActiveMessageAddress -> ActiveMessageAddressC; +} diff --git a/tos/platforms/gnode/SerialActiveMessageP.nc b/tos/platforms/gnode/SerialActiveMessageP.nc new file mode 100755 index 0000000000..924d08e019 --- /dev/null +++ b/tos/platforms/gnode/SerialActiveMessageP.nc @@ -0,0 +1,197 @@ +//$Id: SerialActiveMessageP.nc,v 1.5 2007/06/21 16:00:04 scipio Exp $ + +/* "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * Sending active messages over the serial port. + * + * @author Philip Levis + * @author Ben Greenstein + * @date August 7 2005 + * + */ + +/** + * Edited by SOWNet to work with the Lnode 32 bit addresss scheme + * now uses ActiveMessageAddressC to get the current group address instead of + * returning hardcoded TOS_AM_GROUP + * @author Bas van der Doorn + * @date August 12 2008 + */ + +#include + +generic module SerialActiveMessageP () { + provides { + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface AMPacket; + interface Packet; + interface PacketAcknowledgements; + } + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface ActiveMessageAddress; + } +} +implementation { + + serial_header_t* ONE getHeader(message_t* ONE msg) { + return TCAST(serial_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(serial_header_t)); + } + + command error_t AMSend.send[am_id_t id](am_addr_t dest, + message_t* msg, + uint8_t len) { + serial_header_t* header = getHeader(msg); + header->dest = dest; + // Do not set the source address or group, as doing so + // prevents transparent bridging. Need a better long-term + // solution for this. + //header->src = call AMPacket.address(); + //header->group = call ActiveMessageAddress.amGroup(); // edited by SOWNet as TOS_AM_GROUP was in comments here and the Lnode no longer has a fixed group + header->type = id; + header->length = len; + + return call SubSend.send(msg, len); + } + + command error_t AMSend.cancel[am_id_t id](message_t* msg) { + return call SubSend.cancel(msg); + } + + command uint8_t AMSend.maxPayloadLength[am_id_t id]() { + return call Packet.maxPayloadLength(); + } + + command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { + return call Packet.getPayload(m, len); + } + + event void SubSend.sendDone(message_t* msg, error_t result) { + signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); + } + + default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t result) { + return; + } + + default event message_t* Receive.receive[uint8_t id](message_t* msg, void* payload, uint8_t len) { + return msg; + } + + event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { + return signal Receive.receive[call AMPacket.type(msg)](msg, msg->data, len); + } + + command void Packet.clear(message_t* msg) { + memset(getHeader(msg), 0, sizeof(serial_header_t)); + return; + } + + command uint8_t Packet.payloadLength(message_t* msg) { + serial_header_t* header = getHeader(msg); + return header->length; + } + + command void Packet.setPayloadLength(message_t* msg, uint8_t len) { + getHeader(msg)->length = len; + } + + command uint8_t Packet.maxPayloadLength() { + return TOSH_DATA_LENGTH; + } + + command void* Packet.getPayload(message_t* msg, uint8_t len) { + if (len > call Packet.maxPayloadLength()) { + return NULL; + } else { + return (void * COUNT_NOK(len))msg->data; + } + } + + command am_addr_t AMPacket.address() { + return 0; + } + + command am_addr_t AMPacket.destination(message_t* amsg) { + serial_header_t* header = getHeader(amsg); + return header->dest; + } + + command am_addr_t AMPacket.source(message_t* amsg) { + serial_header_t* header = getHeader(amsg); + return header->src; + } + + command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { + serial_header_t* header = getHeader(amsg); + header->dest = addr; + } + + command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { + serial_header_t* header = getHeader(amsg); + header->src = addr; + } + + command bool AMPacket.isForMe(message_t* amsg) { + return TRUE; + } + + command am_id_t AMPacket.type(message_t* amsg) { + serial_header_t* header = getHeader(amsg); + return header->type; + } + + command void AMPacket.setType(message_t* amsg, am_id_t type) { + serial_header_t* header = getHeader(amsg); + header->type = type; + } + + async command error_t PacketAcknowledgements.requestAck( message_t* msg ) { + return FAIL; + } + async command error_t PacketAcknowledgements.noAck( message_t* msg ) { + return SUCCESS; + } + + command void AMPacket.setGroup(message_t* msg, am_group_t group) { + serial_header_t* header = getHeader(msg); + header->group = group; + } + + command am_group_t AMPacket.group(message_t* msg) { + serial_header_t* header = getHeader(msg); + return header->group; + } + + command am_group_t AMPacket.localGroup() { + return call ActiveMessageAddress.amGroup(); // edited by SOWNet as TOS_AM_GROUP was returned here and the Lnode no longer has a fixed group + } + + + async command bool PacketAcknowledgements.wasAcked(message_t* msg) { + return FALSE; + } + + async event void ActiveMessageAddress.changed() {} // added by SOWNet +} diff --git a/tos/platforms/gnode/TimeSyncMessageC.nc b/tos/platforms/gnode/TimeSyncMessageC.nc new file mode 100644 index 0000000000..8817b00d2a --- /dev/null +++ b/tos/platforms/gnode/TimeSyncMessageC.nc @@ -0,0 +1,47 @@ +#include "PacketTimeSync.h" + +configuration TimeSyncMessageC { + provides { + interface StdControl; + interface SplitControl; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface AMPacket; + interface Packet; + interface LowPowerListening; + interface PacketAcknowledgements; + + // explicitly named precisions for FTSP, although TEP 132/133 + // say the TMilli interfaces should have names without suffixes + interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t]; + interface TimeSyncPacket as TimeSyncPacketMilli; + interface PacketTimeStamp as PacketTimeStampMilli; + + interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t] ; + interface TimeSyncPacket as TimeSyncPacket32khz; + interface PacketTimeStamp as PacketTimeStamp32khz; + } +} + +implementation { + + components ChipconTimeSyncMessageC; + + StdControl = ChipconTimeSyncMessageC; + SplitControl = ChipconTimeSyncMessageC; + Receive = ChipconTimeSyncMessageC.Receive; + Snoop = ChipconTimeSyncMessageC.Snoop; + AMPacket = ChipconTimeSyncMessageC; + Packet = ChipconTimeSyncMessageC; + LowPowerListening = ChipconTimeSyncMessageC; + PacketAcknowledgements = ChipconTimeSyncMessageC; + + TimeSyncAMSendMilli = ChipconTimeSyncMessageC; + TimeSyncPacketMilli = ChipconTimeSyncMessageC; + PacketTimeStampMilli = ChipconTimeSyncMessageC; + + TimeSyncAMSend32khz = ChipconTimeSyncMessageC; + TimeSyncPacket32khz = ChipconTimeSyncMessageC; + PacketTimeStamp32khz = ChipconTimeSyncMessageC; + +} diff --git a/tos/platforms/gnode/VoltageC.nc b/tos/platforms/gnode/VoltageC.nc new file mode 100644 index 0000000000..b20c8805e1 --- /dev/null +++ b/tos/platforms/gnode/VoltageC.nc @@ -0,0 +1,13 @@ +/** + * VoltageC wraps Msp430InternalVoltageC and converts the output to millivolts. + */ +generic configuration VoltageC() { + provides interface Read; +} + +implementation { + components new Msp430InternalVoltageC(), new VoltageP(); + Read = VoltageP; + VoltageP.SubRead -> Msp430InternalVoltageC; +} + diff --git a/tos/platforms/gnode/VoltageP.nc b/tos/platforms/gnode/VoltageP.nc new file mode 100644 index 0000000000..0ffb4fd8ee --- /dev/null +++ b/tos/platforms/gnode/VoltageP.nc @@ -0,0 +1,20 @@ +/** + * Convert the output of the internal voltage measurement to millivolts. + */ +generic module VoltageP() { + provides interface Read; + uses interface Read as SubRead; +} + +implementation { + + command error_t Read.read() { + return call SubRead.read(); + } + + event void SubRead.readDone(error_t error, uint16_t val) { + // measured voltage is VCC/3, 12 bit ADC + uint32_t millivolts = (val * 3000UL)/4096; + signal Read.readDone(error, (uint16_t) millivolts); + } +} diff --git a/tos/platforms/gnode/chips/23axxx/23Axxx.txt b/tos/platforms/gnode/chips/23axxx/23Axxx.txt new file mode 100644 index 0000000000..fb7109edf5 --- /dev/null +++ b/tos/platforms/gnode/chips/23axxx/23Axxx.txt @@ -0,0 +1,12 @@ +Component: 23Axxx +Description: Microchip Technology Inc. 23Axxx Serial SRAM devices with an SPI interface. + +Usage: +This provides a read/write interface to the serial SRAM, as well as a BigQueue implementation backed by SRAM. + +Dependencies: +- Assert +- SoftwareSpiC + +Known bugs: +None diff --git a/tos/platforms/gnode/chips/23axxx/Microchip23AxxxC.nc b/tos/platforms/gnode/chips/23axxx/Microchip23AxxxC.nc new file mode 100644 index 0000000000..0d1570106f --- /dev/null +++ b/tos/platforms/gnode/chips/23axxx/Microchip23AxxxC.nc @@ -0,0 +1,20 @@ +generic configuration Microchip23AxxxC() { + provides { + interface SRAM; + } + + uses { + interface SpiByte; + interface GeneralIO as ChipSelect; + } +} + +implementation { + + components new Microchip23AxxxP(), MainC; + SRAM = Microchip23AxxxP; + SpiByte = Microchip23AxxxP; + ChipSelect = Microchip23AxxxP; + MainC.SoftwareInit -> Microchip23AxxxP; + +} \ No newline at end of file diff --git a/tos/platforms/gnode/chips/23axxx/Microchip23AxxxP.nc b/tos/platforms/gnode/chips/23axxx/Microchip23AxxxP.nc new file mode 100644 index 0000000000..4dedbdd797 --- /dev/null +++ b/tos/platforms/gnode/chips/23axxx/Microchip23AxxxP.nc @@ -0,0 +1,87 @@ +#include "Assert.h" + +generic module Microchip23AxxxP() { + provides { + interface Init; + interface SRAM; + } + + uses { + interface SpiByte; + interface GeneralIO as ChipSelect; + } +} + +implementation { + + enum Commands { + WRSR = 1, // 0000 0001: Write STATUS register + WRITE = 2, // 0000 0010: Write data to memory array beginning at selected address + READ = 3, // 0000 0011: Read data from memory array beginning at selected address + RDSR = 5, // 0000 0101: Read STATUS register + }; + + void send(uint8_t cmd, uint16_t address) { + call SpiByte.write(cmd); + call SpiByte.write(address >> 8); + call SpiByte.write(address >> 0); + } + + void start() { + call ChipSelect.clr(); + } + + void stop() { + call ChipSelect.set(); + } + + command error_t Init.init() { + uint8_t status; + + call ChipSelect.makeOutput(); + call ChipSelect.set(); + + // select sequential mode: 7:6 = 01b + start(); + call SpiByte.write(WRSR); + call SpiByte.write(0x40); + stop(); + + // The data sheet says: + // "Bits 2 through 5 are reserved and should always be set + // to �0�. Bit 1 will read back as �1� but should always be + // written as �0�." + // so the expected value is 0100 0010 = 0x42 + start(); + call SpiByte.write(RDSR); + status = call SpiByte.write(0); + assertEquals(status, 0x42, ASSERT_CANT_HAPPEN); + stop(); + + return SUCCESS; + } + + command void SRAM.read(uint16_t address, uint8_t len, void* buffer) { + uint8_t* bytes = buffer; + uint8_t i; + + start(); + send(READ, address); + for (i = 0; i < len; i++) { + bytes[i] = call SpiByte.write(0); + } + stop(); + } + + command void SRAM.write(uint16_t address, uint8_t len, void* buffer) { + uint8_t* bytes = buffer; + uint8_t i; + start(); + send(WRITE, address); + for (i = 0; i < len; i++) { + call SpiByte.write(bytes[i]); + } + stop(); + } + +} \ No newline at end of file diff --git a/tos/platforms/gnode/chips/23axxx/SRAM.nc b/tos/platforms/gnode/chips/23axxx/SRAM.nc new file mode 100644 index 0000000000..217df1199d --- /dev/null +++ b/tos/platforms/gnode/chips/23axxx/SRAM.nc @@ -0,0 +1,4 @@ +interface SRAM { + command void read(uint16_t addr, uint8_t len, void* buffer); + command void write(uint16_t addr, uint8_t len, void* buffer); +} diff --git a/tos/platforms/gnode/chips/23axxx/SRAMC.nc b/tos/platforms/gnode/chips/23axxx/SRAMC.nc new file mode 100644 index 0000000000..6e89464ccf --- /dev/null +++ b/tos/platforms/gnode/chips/23axxx/SRAMC.nc @@ -0,0 +1,15 @@ +configuration SRAMC { + provides interface SRAM; +} + +implementation { + + components new Microchip23AxxxC(), new SoftwareSpiC(0, 0), GeneralIOC; + SRAM = Microchip23AxxxC; + Microchip23AxxxC.SpiByte -> SoftwareSpiC; + Microchip23AxxxC.ChipSelect -> GeneralIOC.GeneralIO[SRAM_CSN]; + SoftwareSpiC.MOSI -> GeneralIOC.GeneralIO[SRAM_MOSI]; + SoftwareSpiC.MISO -> GeneralIOC.GeneralIO[SRAM_MISO]; + SoftwareSpiC.Clock -> GeneralIOC.GeneralIO[SRAM_SCK]; + +} diff --git a/tos/platforms/gnode/chips/23axxx/SRAMQueueC.nc b/tos/platforms/gnode/chips/23axxx/SRAMQueueC.nc new file mode 100644 index 0000000000..548ceebd28 --- /dev/null +++ b/tos/platforms/gnode/chips/23axxx/SRAMQueueC.nc @@ -0,0 +1,14 @@ +/** + * Provides a BigQueue implementation backed by the SRAM chip. + */ +generic configuration SRAMQueueC(typedef t, uint16_t size, uint16_t offset) { + provides interface BigQueue; +} + +implementation { + + components SRAMC, new SRAMQueueP(t, size, offset); + BigQueue = SRAMQueueP; + SRAMQueueP.SRAM -> SRAMC; + +} diff --git a/tos/platforms/gnode/chips/23axxx/SRAMQueueP.nc b/tos/platforms/gnode/chips/23axxx/SRAMQueueP.nc new file mode 100644 index 0000000000..411ace7f46 --- /dev/null +++ b/tos/platforms/gnode/chips/23axxx/SRAMQueueP.nc @@ -0,0 +1,77 @@ +generic module SRAMQueueP(typedef queue_t, uint16_t QUEUE_SIZE, uint16_t OFFSET) { + provides { + interface BigQueue; + } + + uses { + interface SRAM; + } +} + +implementation { + + uint16_t head = 0; + uint16_t tail = 0; + uint16_t size = 0; + + uint16_t addr(uint16_t idx) { + return OFFSET + idx * sizeof(queue_t); + } + + queue_t read(uint16_t idx) { + queue_t item; + call SRAM.read(addr(idx), sizeof(queue_t), &item); + return item; + } + + void write(uint16_t idx, queue_t item) { + call SRAM.write(addr(idx), sizeof(queue_t), &item); + } + + command bool BigQueue.empty() { + return size == 0; + } + + command uint16_t BigQueue.size() { + return size; + } + + command uint16_t BigQueue.maxSize() { + return QUEUE_SIZE; + } + + command queue_t BigQueue.head() { + return read(head); + } + + command queue_t BigQueue.dequeue() { + queue_t t = call BigQueue.head(); + if (!call BigQueue.empty()) { + head++; + head %= QUEUE_SIZE; + size--; + } + + return t; + } + + command error_t BigQueue.enqueue(queue_t newVal) { + if (call BigQueue.size() < call BigQueue.maxSize()) { + write(tail, newVal); + tail++; + tail %= QUEUE_SIZE; + size++; + return SUCCESS; + } + else { + return FAIL; + } + } + + command queue_t BigQueue.element(uint16_t idx) { + idx += head; + idx %= QUEUE_SIZE; + return read(idx); + } + +} diff --git a/tos/platforms/gnode/chips/at45db/HplAt45dbC.nc b/tos/platforms/gnode/chips/at45db/HplAt45dbC.nc new file mode 100644 index 0000000000..a9dd01e170 --- /dev/null +++ b/tos/platforms/gnode/chips/at45db/HplAt45dbC.nc @@ -0,0 +1,52 @@ +/* +* Copyright (c) 2006, Technische Universitat Berlin +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* - Neither the name of the Technische Universitat Berlin nor the names +* of its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, +* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +configuration HplAt45dbC { + provides interface HplAt45db; +} + +implementation { + + components new HplAt45dbByteC(9), HplAt45dbP, + new SoftwareSpiC(1, 1) as Spi, GeneralIOC; + + HplAt45db = HplAt45dbByteC; + + HplAt45dbByteC.Resource -> Spi; + HplAt45dbByteC.FlashSpi -> Spi; + HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP; + + HplAt45dbP.Select -> GeneralIOC.GeneralIO[FLASH_CSN]; + HplAt45dbP.FlashSpi -> Spi; + + Spi.MISO -> GeneralIOC.GeneralIO[FLASH_MISO]; + Spi.MOSI -> GeneralIOC.GeneralIO[FLASH_MOSI]; + Spi.Clock -> GeneralIOC.GeneralIO[FLASH_SCK]; + +} diff --git a/tos/platforms/gnode/chips/at45db/HplAt45dbP.nc b/tos/platforms/gnode/chips/at45db/HplAt45dbP.nc new file mode 100644 index 0000000000..0226844f1a --- /dev/null +++ b/tos/platforms/gnode/chips/at45db/HplAt45dbP.nc @@ -0,0 +1,71 @@ +/* +* Copyright (c) 2006, Technische Universitat Berlin +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* - Neither the name of the Technische Universitat Berlin nor the names +* of its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, +* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + + +module HplAt45dbP { + provides { + interface HplAt45dbByte; + } + uses { + interface SpiByte as FlashSpi; + interface GeneralIO as Select; + } +} +implementation +{ + command void HplAt45dbByte.select() { + call Select.makeOutput(); + call Select.clr(); + } + + command void HplAt45dbByte.deselect() { + call Select.makeOutput(); + call Select.set(); + } + + task void idleTask() { + uint8_t status; + status = call FlashSpi.write(0); + if (!(status & 0x80)) { + post idleTask(); + } else { + signal HplAt45dbByte.idle(); + } + } + + command void HplAt45dbByte.waitIdle() { + post idleTask(); + } + + command bool HplAt45dbByte.getCompareStatus() { + uint8_t status; + status = call FlashSpi.write(0); + return (!(status & 0x40)); + } +} diff --git a/tos/platforms/gnode/chips/at45db/HplAt45db_chip.h b/tos/platforms/gnode/chips/at45db/HplAt45db_chip.h new file mode 100644 index 0000000000..5530b655fe --- /dev/null +++ b/tos/platforms/gnode/chips/at45db/HplAt45db_chip.h @@ -0,0 +1,45 @@ +// $Id: HplAt45db_chip.h,v 1.2 2006/12/13 02:34:15 vlahan Exp $ + +/* tab:4 + * "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +#ifndef HPLAT45DB_CHIP_H +#define HPLAT45DB_CHIP_H + +// flash characteristics +enum { + AT45_MAX_PAGES = 2048, + AT45_PAGE_SIZE = 264, + AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes +}; + +typedef uint16_t at45page_t; +typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */ + +#endif diff --git a/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h b/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h new file mode 100644 index 0000000000..44f8ada162 --- /dev/null +++ b/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h @@ -0,0 +1,209 @@ +#ifndef CHIPCON_REGISTER_VALUES_H +#define CHIPCON_REGISTER_VALUES_H + +#include "ChipconRegisters.h" +#include "ChipconPacket.h" + +// Settings needed by software stack for proper operation - +// make sure these match the register values below! +enum { + PREAMBLE_BYTES = 4, // number of preamble bytes + SYNC_BYTES = 4, // number of sync bytes + CRC_BYTES = 2, // number of CRC bytes + RSSI_OFFSET = 74, // offset applied to the RSSI output, in dB + EXPECTED_PARTNUM = 0x00, // expected value of the PARTNUM register + EXPECTED_VERSION_CC1101 = 0x04, // expected values of VERSION register + EXPECTED_VERSION_RF1A = 0x06, // for CC1101 and RF1A (CC430) + // BAUD_RATE is defined below, based on data rate and encoding +}; + +// output power levels in dBm +enum OutputPower { + POWER_DEFAULT = 0xC6, // 8.5 dBm + POWER_MINUS_30 = 0x03, + POWER_MINUS_10 = 0x27, + POWER_MINUS_5 = 0x67, + POWER_0 = 0x50, + POWER_5 = 0x81, + POWER_7 = 0xCB, + POWER_10 = 0xC2, + POWER_12 = 0xC5, +}; + +// defaults: maximum power, 868 MHz, channel 0, 38400 bps with Manchester encoding +#ifndef CHIPCON_OUTPUT_POWER +#define CHIPCON_OUTPUT_POWER POWER_12 +#endif + +#ifndef CHIPCON_DATA_RATE +#define CHIPCON_DATA_RATE 38400UL +#endif + +#ifndef CHIPCON_MANCHESTER_ENCODING +#define CHIPCON_MANCHESTER_ENCODING 1 +#endif + +#ifndef CHIPCON_FREQUENCY +#define CHIPCON_FREQUENCY 868 +#endif + +#ifndef CHIPCON_CHANNEL +#define CHIPCON_CHANNEL 0 +#endif + +#if CHIPCON_DATA_RATE == 38400UL + // RX filterbandwidth = 101.562500 kHz + // Deviation = 19 kHz + // Datarate = 38.383484 kBaud + #define _FSCTRL1 0x06 + #define _MDMCFG4 0xCA + #define _MDMCFG3 0x83 + #define _DEVIATN 0x34 + #define _TEST2 0x81 + #define _TEST1 0x35 +#elif CHIPCON_DATA_RATE == 250000UL + // RX filterbandwidth = 541.666667 kHz + // Deviation = 127 kHz + // Datarate = 249.938965 kBaud + #define _FSCTRL1 0x0C + #define _MDMCFG4 0x2D + #define _MDMCFG3 0x3B + #define _DEVIATN 0x62 + #define _TEST2 0x88 + #define _TEST1 0x31 +#else + #error "Unsupported data rate" +#endif + +// Manchester encoding halves the effective data rate but improves sensitivity +#if CHIPCON_MANCHESTER_ENCODING == 1 + #define _MDMCFG2 0x1B + #define BAUD_RATE (CHIPCON_DATA_RATE/2) +#else + #define _MDMCFG2 0x13 + #define BAUD_RATE CHIPCON_DATA_RATE +#endif + +// In general, relative threshold CS is preferable because it adapts to +// background noise. However, we can't use it with low power listening, +// because then the radio generally won't catch the sudden increase +// or decrease in RSSI as it only briefly samples the channel. +#ifdef LOW_POWER_LISTENING + // absolute threshold, set at 7 dB under MAGN_TARGET, + // which is about 5 dB over the sensitivity threshold + // (varies with data rate, depends on the amplifier gain settings in AGCTRL2) + #define _AGCCTRL1 0x49 +#else + // relative CS threshold (+10 dB) + #define _AGCCTRL1 0x68 +#endif + +// frequency presets +#if CHIPCON_FREQUENCY == 868 + #if CHIPCON_DATA_RATE == 38400UL + // low speed: 868.3 MHz (sub-band 1) + #define _FREQ2 0x21 + #define _FREQ1 0x65 + #define _FREQ0 0x6A + #elif CHIPCON_DATA_RATE == 250000UL + // high speed: 869.5 MHz (sub-band 6) + #define _FREQ2 0x21 + #define _FREQ1 0x71 + #define _FREQ0 0x3B + #else + #error "Unsupported data rate" + #endif + +#elif CHIPCON_FREQUENCY == 915 + // 915 MHz + #define _FREQ2 0x23 + #define _FREQ1 0x31 + #define _FREQ0 0x3B +#else + #error "Unsupported frequency" +#endif + +const uint8_t chipconRegisterValues[NUM_REGISTERS * 2] = { + // Chipcon + // Product = CC1101 + // Chip version = A (VERSION = 0x04) + // Crystal accuracy = 10 ppm + // X-tal frequency = 26 MHz + // RF output power = 10 dBm + // Modulation = (1) 2-GFSK + // RF Frequency = 868.299866 MHz (default) + // Channel spacing = 199.951172 kHz + // Channel number = 0 + // Optimization = - + // Sync mode = (3) 30/32 sync word bits detected + // Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX + // CRC operation = (1) CRC calculation in TX and CRC check in RX enabled + // Forward Error Correction = (0) FEC disabled + // Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. + // Packetlength = 255 + // Preamble count = (2) 4 bytes + // Append status = 1 + // Address check = (0) No address check + // FIFO autoflush = 0 + // Device address = 0 + // GDO0 signal selection = (6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet + // GDO2 signal selection = (9) CCA + FSCTRL1, _FSCTRL1, // Frequency synthesizer control. + FSCTRL0, 0x00, // Frequency synthesizer control. + FREQ2, _FREQ2, // Frequency control word, high byte. + FREQ1, _FREQ1, // Frequency control word, middle byte. + FREQ0, _FREQ0, // Frequency control word, low byte. + MDMCFG4, _MDMCFG4, // Modem configuration. + MDMCFG3, _MDMCFG3, // Modem configuration. + MDMCFG2, _MDMCFG2, // Modem configuration. + MDMCFG1, 0x22, // Modem configuration. + MDMCFG0, 0xF8, // Modem configuration. + CHANNR, CHIPCON_CHANNEL, // Channel number. + DEVIATN, _DEVIATN, // Modem deviation setting (when FSK modulation is enabled). + FREND1, 0x56, // Front end RX configuration. + FREND0, 0x10, // Front end RX configuration. + FOCCFG, 0x16, // Frequency Offset Compensation Configuration. + BSCFG, 0x6C, // Bit synchronization Configuration. + AGCCTRL2, 0x43, // AGC control. + AGCCTRL1, _AGCCTRL1, // AGC control. + AGCCTRL0, 0x91, // AGC control. + FSCAL3, 0xE9, // Frequency synthesizer calibration. + FSCAL2, 0x2A, // Frequency synthesizer calibration. + FSCAL1, 0x00, // Frequency synthesizer calibration. + FSCAL0, 0x1F, // Frequency synthesizer calibration. + FSTEST, 0x59, // Frequency synthesizer calibration. + TEST2, _TEST2, // Various test settings. + TEST1, _TEST1, // Various test settings. + TEST0, 0x09, // Various test settings. + + // use as CCA indicator + IOCFG2, 0x09, // GDO2 output pin configuration. + + // asserts when sync word has been sent / received, and de-asserts at the end of the packet + IOCFG0, 0x06, // GDO0 output pin configuration. Refer to SmartRF� Studio User Manual for detailed pseudo register explanation. + + // CRC autoflush on, address checking on + // PKTCTRL1, 0x0F, // Packet automation control. + + // CRC autoflush on, address checking off + PKTCTRL1, 0x0C, // Packet automation control. + + // data whitening on + PKTCTRL0, 0x45, // Packet automation control. + + ADDR, 0x00, // Device address. + + // restrict max packet length to what will fit into our message_t, up to 61 bytes (64 bytes FIFO) + // this does not include the length byte itself + PKTLEN, MAX_PACKET_LENGTH - 1, // Packet length. + + // go to IDLE after TX and go to IDLE after RX + MCSM1, 0x30, // Main Radio Control State Machine configuration. + + // calibrate after going from TX or RX to IDLE + MCSM0, 0x28, // Main Radio Control State Machine configuration. + + PATABLE, CHIPCON_OUTPUT_POWER, // PA output power. +}; + +#endif diff --git a/tos/platforms/gnode/chips/ccpacket/ChipconAssert.h b/tos/platforms/gnode/chips/ccpacket/ChipconAssert.h new file mode 100644 index 0000000000..064e98ea26 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/ChipconAssert.h @@ -0,0 +1,40 @@ +#ifndef CHIPCON_ASSERT_H +#define CHIPCON_ASSERT_H + +enum ErrorCodes { + ASSERT_CC_OFFSET = 100, + ASSERT_CC_TEST = ASSERT_CC_OFFSET + 6, + ASSERT_CC_HAL_SPI_REQUEST, + ASSERT_CC_HAL_CHIP_VERSION, + ASSERT_CC_HAL_TX_ALREADY, + ASSERT_CC_HAL_CCA_NO_RX, + ASSERT_CC_HAL_RSSI_NO_RX, + ASSERT_CC_HAL_NOT_IDLE, + ASSERT_CC_HAL_RX_FIFO_EMPTY, + ASSERT_CC_HAL_PACKET_TOO_LARGE, + ASSERT_CC_HAL_INVALID_LENGTH, + ASSERT_CC_HAL_NO_PENDING, + ASSERT_CC_HAL_TOO_MANY_PENDING, + ASSERT_CC_HAL_TX_WAS_RX, + ASSERT_CC_HAL_G0_HIGH, + ASSERT_CC_HAL_NO_TX, + ASSERT_CC_HAL_CALIBRATE_TX, + ASSERT_CC_RXTX_NULL_POINTER, + ASSERT_CC_RXTX_BAD_TX_POINTER, + ASSERT_CC_RXTX_BROADCAST, + ASSERT_CC_ACK_SUBSEND_FAILED, + ASSERT_CC_ACK_SEND_ACK_FAILED, + ASSERT_CC_ACK_UNEXPECTED_ERROR, + ASSERT_CC_ACK_SEND, + ASSERT_CC_ACK_PACKET, + ASSERT_CC_ACK_BUSY, + ASSERT_CC_ACK_STATE, + ASSERT_CC_LPL_OFF, + ASSERT_CC_LPL_START, + ASSERT_CC_LPL_STOP, + ASSERT_CC_LPL_SEND, + ASSERT_CC_AM_SENDDONE, + ASSERT_CC_AM_MODIFIED, +}; + +#endif diff --git a/tos/platforms/gnode/chips/ccpacket/ack/Ack.h b/tos/platforms/gnode/chips/ccpacket/ack/Ack.h new file mode 100644 index 0000000000..b3b4f6058a --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/ack/Ack.h @@ -0,0 +1,8 @@ +#ifndef ACK_H +#define ACK_H + +#ifndef ACK_DEFAULT +#define ACK_DEFAULT TRUE // if unspecified, use acknowledgements +#endif + +#endif diff --git a/tos/platforms/gnode/chips/ccpacket/ack/AckC.nc b/tos/platforms/gnode/chips/ccpacket/ack/AckC.nc new file mode 100644 index 0000000000..a41bd69538 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/ack/AckC.nc @@ -0,0 +1,38 @@ +/** + * Provides synchronous acknowledgements. + * Must be wired into the stack below LowPowerListening. + */ +configuration AckC { + provides { + interface StdControl; + interface Send; + interface Receive; + interface PacketAcknowledgements; + } + + uses { + interface StdControl as SubControl; + interface Send as SubSend; + interface Receive as SubReceive; + } +} + +implementation { + + components AckP, ChipconPacketC, new TimerMilliC(); + + StdControl = AckP; + Receive = AckP; + Send = AckP; + PacketAcknowledgements = ChipconPacketC; + + AckP.SubSend = SubSend; + AckP.SubReceive = SubReceive; + AckP.SubControl = SubControl; + + AckP.Packet -> ChipconPacketC; + AckP.AMPacket -> ChipconPacketC; + AckP.ChipconPacket -> ChipconPacketC; + AckP.AckTimer -> TimerMilliC; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc b/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc new file mode 100644 index 0000000000..703293ba42 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc @@ -0,0 +1,326 @@ +/** + * Provides synchronous acknowledgements. + * + * @author Michiel Konstapel + */ +module AckP { + provides { + interface StdControl; + interface Send; + interface Receive; + } + + uses { + interface StdControl as SubControl; + interface Send as SubSend; + interface Receive as SubReceive; + interface Packet; + interface ChipconPacket; + interface AMPacket; + interface PacketAcknowledgements; + interface Timer as AckTimer; + } +} + +implementation { + + #include "Ack.h" + #include "ChipconRegisterValues.h" + + // total length of an ack packet + #define ACK_BYTES (PREAMBLE_BYTES + SYNC_BYTES + sizeof(chipcon_header_t)) + + // time it takes to send an ack packet - 4 ms at 38400 bps + #define ACK_TX_TIME ((ACK_BYTES * 8 * 1024UL) / BAUD_RATE) + + // Time to wait for an acknowledgement, in addition to transmission time. + // Test results so far: + // - just send/receive: 1 ms required + // - with some printfs involved: 3 ms + // - when running CTP: 4 ms + // Applications may introduce more delays, so I'm setting this conservatively for now. + #ifndef ACK_EXTRA_TIME + #define ACK_EXTRA_TIME 20 + #endif + + #define ACK_WAIT_TIME (ACK_TX_TIME + ACK_EXTRA_TIME) + + message_t rxBuffer; // for buffer swapping + message_t* buffer = &rxBuffer; // current receive buffer + + // ack messages are just headers and this buffer is only for sending, + // so we don't need space for a payload, footers and metadata + // NB: headers are right-aligned against the payload, so we need a full message_header_t, not just a chipcon_header_t! + message_header_t ackBuffer; + message_t* ackMessage = TCAST(message_t*, &ackBuffer); + message_t* txMessage; // the message being sent, either pending or awaiting an acknowledgement + message_t* rxMessage; // the message being received, held while we're sending its acknowledgement + + bool sending; // between send() and sendDone() + bool subSending; // packet handed off to lower layer + bool acking; // sending an ack + + command error_t StdControl.start() { + return call SubControl.start(); + } + + command error_t StdControl.stop() { + // LowPowerListening might try to turn us off when it sees no radio activity, + // but we might be busy sending an ack. + if (acking) { + platform_printf("Ack: stop: EBUSY\n"); + return EBUSY; + } + + return call SubControl.stop(); + } + + /** + * Set or clear the ack bit in the header and set the ack flag in the metadata. + */ + void setAck(message_t* msg, bool ack) { + chipcon_header_t* header = call ChipconPacket.getHeader(msg); + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(msg); + if (ack) { + // set the ack request bit + header->flags |= FLAG_ACK_REQUEST; + } else { + // clear the ack request bit + header->flags &= ~FLAG_ACK_REQUEST; + } + + // set the ack field in the metadata to indicate the default was overridden + metadata->ack = TRUE; + } + + /** + * @return TRUE if this message should be acked: not a broadcast and the ack request flag is set. + */ + bool needsAck(message_t* msg) { + chipcon_header_t* header = call ChipconPacket.getHeader(msg); + return call AMPacket.destination(msg) != AM_BROADCAST_ADDR && (header->flags & FLAG_ACK_REQUEST); + } + + /** + * Acks are sent with the FLAG_ACK_REPLY bit set. + */ + bool isAck(message_t* msg) { + chipcon_header_t* header = call ChipconPacket.getHeader(msg); + return header->flags & FLAG_ACK_REPLY; + } + + /** + * Check whether the source and destination fields match our sent packet. + */ + bool matchAck(message_t* msg) { + chipcon_header_t* ackHeader = call ChipconPacket.getHeader(msg); + chipcon_header_t* txHeader = call ChipconPacket.getHeader(txMessage); + assert(ackHeader->flags & FLAG_ACK_REPLY, ASSERT_CC_ACK_PACKET); + return + ackHeader->dest == txHeader->src && + ackHeader->src == txHeader->dest; + } + + /** + * Create and send an acknowledgement for this message. + */ + error_t sendAck(message_t* msg) { + error_t error; + + // create ack packet by copying the received header, easy way to obtain correct AM group + // swap source/dest fields, clear the ack request flag, and set the flag indicating this is an ack + chipcon_header_t* rxHeader = call ChipconPacket.getHeader(msg); + chipcon_header_t* ackHeader = call ChipconPacket.getHeader(ackMessage); + *ackHeader = *rxHeader; + ackHeader->src = rxHeader->dest; + ackHeader->dest = rxHeader->src; + ackHeader->flags &= ~FLAG_ACK_REQUEST; + ackHeader->flags |= FLAG_ACK_REPLY; + + // lower layer may be busy sending a packet if we gave it a message to send + // while the packet we want to ack was being received + error = call SubSend.send(ackMessage, 0); + if (error == SUCCESS) { + return SUCCESS; + } else if (error == EBUSY) { + // try cancelling the packet + if (call SubSend.cancel(txMessage) == SUCCESS) { + subSending = FALSE; + platform_printf("Ack: cancelled data for ack\n"); + + // data packet cancelled; + // sending is still TRUE and subSending is now FALSE again, so after sending our ack packet, the data packet will be resent + // sending the ack may still fail if the radio is busy (because we won't wait/backoff) + error = call SubSend.send(ackMessage, 0); + if (error == SUCCESS) { + platform_printf("Ack: sending ack\n"); + } else { + // can't send ack, "uncancel" the data packet + error_t resendError; + platform_printf("Ack: still couldn't ack: %d\n", error); + + // we're not busy so this must succeed + resendError = call SubSend.send(txMessage, call ChipconPacket.getPayloadLength(txMessage)); + assertSuccess(resendError, ASSERT_CC_ACK_SEND); + subSending = TRUE; + } + + return error; + } else { + // well, tough luck + platform_printf("Ack: couldn't cancel, no ack\n"); + return FAIL; + } + } else { + platform_printf("Ack: send: %u\n", error); + return error; + } + } + + /** + * Signal Send.sendDone() and reset the ack flag for the next send operation. + */ + void sendDone(error_t error) { + message_t* tmp; + assert(txMessage != NULL, ASSERT_CC_ACK_STATE); + tmp = txMessage; + txMessage = NULL; + sending = FALSE; + signal Send.sendDone(tmp, error); + (call ChipconPacket.getMetadata(tmp))->ack = FALSE; + } + + event void SubSend.sendDone(message_t* msg, error_t error) { + if (error == ECANCEL) { + // we've cancelled a packet to send an ack + // nothing to do; packet will be resent afterwards + return; + } + + if (msg == ackMessage) { + // ack sent, deliver the message we received and see if we have a regular message waiting + uint8_t payloadLength; + assert(acking, ASSERT_CC_ACK_STATE); + acking = FALSE; + + // deliver the message and use the returned message_t* as our buffer + payloadLength = call Packet.payloadLength(rxMessage); + buffer = signal Receive.receive(rxMessage, call Packet.getPayload(rxMessage, payloadLength), payloadLength); + + // we may receive multiple messages, and send multiple acks, while our client message is in backoff + // so keep track of whether we've already called SubSend.send() + if (sending && !subSending) { + error = call SubSend.send(txMessage, call ChipconPacket.getPayloadLength(txMessage)); + assertSuccess(error, ASSERT_CC_ACK_SEND); + subSending = TRUE; + } + } else { + // we just sent a regular message + assert(msg == txMessage, ASSERT_CC_ACK_STATE); + if (error == SUCCESS) { + // regular packet sent; radio is now in RX mode to receive an acknowledgement + // expect an acknowledgement if the message was not a broadcast and the ack request flag is set + if (needsAck(msg)) { + call AckTimer.startOneShot(ACK_WAIT_TIME); + } else { + // not acked, still successful + (call ChipconPacket.getMetadata(txMessage))->ack = FALSE; + sendDone(SUCCESS); + } + } else { + // not successfully sent + platform_printf("Ack: ERROR %d\n", error); + (call ChipconPacket.getMetadata(txMessage))->ack = FALSE; + sendDone(error); + } + } + } + + command error_t Send.send(message_t* msg, uint8_t len) { + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(msg); + + if (sending) return EBUSY; + sending = TRUE; + subSending = FALSE; + + if (!metadata->ack) { + // acknowledgement not explicitly specified, use the default + setAck(msg, ACK_DEFAULT); + } + + assert(txMessage == NULL, ASSERT_CC_ACK_STATE); + txMessage = msg; + + if (acking) { + // we'll send it after the ack + return SUCCESS; + } else { + // send rightaway + // since we're not busy, this mustn't fail + error_t error = call SubSend.send(msg, len); + assertSuccess(error, ASSERT_CC_ACK_SEND); + subSending = TRUE; + return SUCCESS; + } + } + + /** + * Message received. + * If it is an acknowledgement, see if it acknowledges the packet we sent. If so, signal sendDone(). + * If it is a normal message, see if it requests an ack. If so, send the ack. Else, deliver the message up the stack. + */ + event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { + if (isAck(msg)) { + if (sending && matchAck(msg)) { + if (call AckTimer.isRunning()) { + call AckTimer.stop(); + (call ChipconPacket.getMetadata(txMessage))->ack = TRUE; + sendDone(SUCCESS); + } else { + // ignore acks that arrive too late, we already signalled sendDone() + platform_printf("*** Ack: too late\n"); + } + } + + return msg; + } else { + if (needsAck(msg) && call AMPacket.destination(msg) == call AMPacket.address()) { + if (sendAck(msg) == SUCCESS) { + // swap buffers: keep the incoming pointer to signal upwards later + // and return our buffer to the lower layer + acking = TRUE; + rxMessage = msg; + return buffer; + } + } + + // ack either failed or wasn't needed; deliver immediately + return signal Receive.receive(msg, payload, len); + } + } + + event void AckTimer.fired() { + // platform_printf("Ack: expired\n"); + // timer expired: acknowledgement expected but not received + (call ChipconPacket.getMetadata(txMessage))->ack = FALSE; + sendDone(SUCCESS); + } + + /** + * Not supported: we use SubSend.cancel() internally. + * Could be made to work by allowing cancellation when acking is FALSE, + * or by using a separate flag. + */ + command error_t Send.cancel(message_t* msg) { + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { + return call SubSend.maxPayloadLength(); + } + + command void* Send.getPayload(message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + +} diff --git a/tos/platforms/gnode/chips/ccpacket/am/AM.h b/tos/platforms/gnode/chips/ccpacket/am/AM.h new file mode 100644 index 0000000000..cda6c786f4 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/am/AM.h @@ -0,0 +1,44 @@ +#ifndef AM_H +#define AM_H + +typedef uint8_t am_id_t; +typedef nx_uint8_t nx_am_id_t; + +typedef uint32_t am_netmask_t; +typedef uint32_t am_group_t; +typedef uint32_t am_addr_t; + +// nx versions are little endian because the radio can only check one byte +// and we want that to be the least significant byte (most likely to differ) +typedef nxle_uint32_t nx_am_netmask_t; +typedef nxle_uint32_t nx_am_group_t; +typedef nxle_uint32_t nx_am_addr_t; + +// defaults +#ifndef DEFINED_AM_NETWORK_MASK +#define DEFINED_AM_NETWORK_MASK 0xFFFF0000UL +#endif + +#ifndef DEFINED_TOS_AM_GROUP +#define DEFINED_TOS_AM_GROUP 0x00000000UL +#endif + +#ifndef DEFINED_TOS_AM_ADDRESS +#define DEFINED_TOS_AM_ADDRESS (DEFINED_TOS_AM_GROUP | 1) +#endif + +// all access to these SHOULD go through ActiveMessageAddressC +//#define TOS_AM_ADDRESS DEFINED_TOS_AM_ADDRESS +//#define TOS_AM_GROUP DEFINED_TOS_AM_GROUP +//#define AM_NETWORK_MASK DEFINED_AM_NETWORK_MASK + +// this is the "logical" broadcast address, irrespective of radio group +#define AM_BROADCAST_ADDR 0xFFFFFFFFUL + +#define UQ_AMQUEUE_SEND "amqueue.send" + +// printf formatting +#define DOTTED_QUAD_FORMAT "%lu.%lu.%lu.%lu" +#define DOTTED_QUAD(addr) (addr >> 24) & 0xFF, (addr >> 16) & 0xFF, (addr >> 8) & 0xFF, (addr >> 0) & 0xFF + +#endif diff --git a/tos/platforms/gnode/chips/ccpacket/am/ActiveMessageAddressC.nc b/tos/platforms/gnode/chips/ccpacket/am/ActiveMessageAddressC.nc new file mode 100644 index 0000000000..2d9ba185ad --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/am/ActiveMessageAddressC.nc @@ -0,0 +1,48 @@ +/** + * Component that stores the node's active message address and group ID. + * The L-node provides its own because our AM address includes the AM group bits. + * It also provides an additional NetMask interface. + */ +module ActiveMessageAddressC { + provides { + interface ActiveMessageAddress; + interface NetMask; + } +} + +implementation { + + // this is set to TOS_NODE_ID by tos-set-symbols, so we'll add the group bits on demand + am_addr_t addr = DEFINED_TOS_AM_ADDRESS; + am_addr_t group = DEFINED_TOS_AM_GROUP; + am_addr_t netmask = DEFINED_AM_NETWORK_MASK; + + async command am_addr_t ActiveMessageAddress.amAddress() { + atomic return group | addr; + } + + async command void ActiveMessageAddress.setAddress(am_group_t myGroup, am_addr_t myAddr) { + atomic { + addr = myAddr; + group = myGroup; + } + + signal ActiveMessageAddress.changed(); + } + + async command am_group_t ActiveMessageAddress.amGroup() { + atomic return group; + } + + async command void NetMask.setNetMask(am_netmask_t myNetmask) { + atomic netmask = myNetmask; + signal ActiveMessageAddress.changed(); + } + + async command am_netmask_t NetMask.netMask() { + atomic return netmask; + } + + default async event void ActiveMessageAddress.changed() {} + +} diff --git a/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageC.nc b/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageC.nc new file mode 100644 index 0000000000..49e9da625a --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageC.nc @@ -0,0 +1,72 @@ +#include "AM.h" +#include "ChipconAssert.h" + +// the radio stack uses platform_printf debug statements which can be redirected to printf, +// but the default is to turn them into no-ops +#ifndef platform_printf +#define platform_printf(...); +#endif + +/** + * The Active Message layer for the Chipcon packet radio. + * In addition to the required SplitControl, it also offers StdControl. + */ +configuration ChipconActiveMessageC { + provides { + interface StdControl; + interface SplitControl; + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface AMPacket; + interface Packet; + interface LowPowerListening; + interface PacketAcknowledgements; + interface PacketTimeStamp as PacketTimeStampMilli; + interface PacketTimeStamp as PacketTimeStamp32khz; + } +} + +implementation { + components ActiveMessageAddressC, ChipconPacketC, PacketMetadataC, ChipconActiveMessageP as AM, CrcC; + + components PacketTimeStampC; + +#ifdef LOW_POWER_LISTENING + components LowPowerListeningC as LPL; +#else + components NoLowPowerListeningC as LPL; +#endif + + components AckC; + components SendReceiveC; + + StdControl = AM; + SplitControl = AM; + AMSend = AM; + Receive = AM.Receive; + Snoop = AM.Snoop; + + Packet = ChipconPacketC; + AMPacket = ChipconPacketC; + PacketAcknowledgements = ChipconPacketC; + LowPowerListening = LPL; + PacketTimeStampMilli = PacketTimeStampC; + PacketTimeStamp32khz = PacketTimeStampC; + + AM.AMPacket -> ChipconPacketC; + AM.PacketMetadata -> PacketMetadataC; + AM.SubControl -> LPL; + AM.SubSend -> LPL; + AM.SubReceive -> LPL; + AM.Crc -> CrcC; + + LPL.SubControl -> AckC; + LPL.SubSend -> AckC; + LPL.SubReceive -> AckC; + + AckC.SubControl -> SendReceiveC; + AckC.SubSend -> SendReceiveC; + AckC.SubReceive -> SendReceiveC; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageP.nc b/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageP.nc new file mode 100644 index 0000000000..e78155c371 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageP.nc @@ -0,0 +1,176 @@ +/** + * The Active Message layer for the Chipcon packet radio. + */ +module ChipconActiveMessageP @safe() { + provides { + interface StdControl; + interface SplitControl; + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + } + + uses { + interface StdControl as SubControl; + interface Send as SubSend; + interface Receive as SubReceive; + interface AMPacket; + interface PacketMetadata; + interface Crc; + } +} + +implementation { + + bool txBusy; + uint16_t crc; // for checking whether what goes in also comes out + + task void started() { + signal SplitControl.startDone(SUCCESS); + } + + task void stopped() { + signal SplitControl.stopDone(SUCCESS); + } + + command error_t SplitControl.start() { + error_t error = call SubControl.start(); + dbg("ActiveMessageP", "%s N%u: %s: Started with error %u\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, error); + if (error == SUCCESS) post started(); + return error; + } + + command error_t SplitControl.stop() { + error_t error = call SubControl.stop(); + dbg("ActiveMessageP", "%s N%u: %s: Stopped with error %u\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, error); + if (error == SUCCESS) post stopped(); + return error; + } + + // While StdControl is convenient, other components may depend on the SplitControl events. + // CtpForwardingEngine looks for startDone/stopDone events to know whether the radio is on. + + command error_t StdControl.start() { + error_t error = call SubControl.start(); + dbg("ActiveMessageP", "%s N%u: %s: Started with error %u\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, error); + if (error == SUCCESS) signal SplitControl.startDone(SUCCESS); + return error; + } + + command error_t StdControl.stop() { + error_t error = call SubControl.stop(); + dbg("ActiveMessageP", "%s N%u: %s: Stopped with error %u\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, error); + if (error == SUCCESS) signal SplitControl.stopDone(SUCCESS); + return error; + } + +#ifdef DEBUG_CHIPCON_AM + void print(message_t* msg, uint8_t len, char* NTS s, bool rx) { + uint8_t i; + uint8_t* payload = (uint8_t*) call SubSend.getPayload(msg, len); + + platform_printf("AM: %s: src=" DOTTED_QUAD_FORMAT ", dst=" DOTTED_QUAD_FORMAT ", am=%u, len=%u,", + s, DOTTED_QUAD(call AMPacket.source(msg)), DOTTED_QUAD(call AMPacket.destination(msg)), + call AMPacket.type(msg), len); + + if (rx) { + platform_printf(" rssi=%d, lqi=%u,", call PacketMetadata.getRssi(msg), call PacketMetadata.getLqi(msg)); + } + + for (i=0; i < len; i++) { + platform_printf(" %02X", payload[i]); + } + + platform_printf("\n"); + } +#endif + + uint16_t crcMessage(message_t* msg) { +#ifdef AM_TIMESYNCMSG + // time sync messages have their time stamp changed, so only check the header + uint8_t len = sizeof(message_header_t); +#else + // metadata is allowed to change, so don't include that in the checksum + uint8_t len = sizeof(message_header_t) + TOSH_DATA_LENGTH + sizeof(message_footer_t); +#endif + + return call Crc.crc16(msg, len); + } + + command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { + error_t error; + if (txBusy) return EBUSY; + + call AMPacket.setType(msg, id); + call AMPacket.setDestination(msg, addr); + call AMPacket.setSource(msg, call AMPacket.address()); +#ifdef DEBUG_CHIPCON_AM + print(msg, len, "TX", FALSE); +#endif + dbg("ActiveMessageP", "%s N%u: %s: Calling radio send for msg type %u, length %u, dest %u\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, id, len, addr); + + error = call SubSend.send(msg, len); + if (error == SUCCESS) { + txBusy = TRUE; + crc = crcMessage(msg); + } + + dbg("ActiveMessageP", "%s N%u: %s: Radio send %u (msg type %u, length %u, dest %u)\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, error, id, len, addr); + + return error; + } + + command error_t AMSend.cancel[am_id_t id](message_t* msg) { + return call SubSend.cancel(msg); + } + + command uint8_t AMSend.maxPayloadLength[am_id_t id]() { + return call SubSend.maxPayloadLength(); + } + + command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { + return call SubSend.getPayload(m, len); + } + + event void SubSend.sendDone(message_t* msg, error_t result) { + dbg("ActiveMessageP", "%s N%u: %s: Radio sendDone %u (msg type %u, dest %u)\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, result, call AMPacket.type(msg), call AMPacket.destination(msg)); + +#ifdef DEBUG_CHIPCON_AM + if (crc != crcMessage(msg)) { + uint8_t len = sizeof(message_header_t) + TOSH_DATA_LENGTH + sizeof(message_footer_t); + print(msg, len, "msg", FALSE); + } +#endif + + assertEquals(crc, crcMessage(msg), ASSERT_CC_AM_MODIFIED); + + txBusy = FALSE; + signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); + } + + event message_t* SubReceive.receive(message_t* msg, void *payload, uint8_t len) { +#ifdef DEBUG_CHIPCON_AM + print(msg, len, "RX", TRUE); +#endif + dbg("ActiveMessageP", "%s N%u: %s: Radio received msg from %u type %u, length %u, dest %u\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, call AMPacket.source(msg), call AMPacket.type(msg), len, call AMPacket.destination(msg)); + if (call AMPacket.isForMe(msg)) { + return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); + } else { + return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); + } + } + + default event void SplitControl.startDone(error_t error) {} + default event void SplitControl.stopDone(error_t error) {} + + default event message_t* Receive.receive[am_id_t id](message_t* msg, void *payload, uint8_t len) { + return msg; + } + + default event message_t* Snoop.receive[am_id_t id](message_t* msg, void *payload, uint8_t len) { + return msg; + } + + default event void AMSend.sendDone[am_id_t id](message_t* msg, error_t err) {} + +} diff --git a/tos/platforms/gnode/chips/ccpacket/am/NetMask.nc b/tos/platforms/gnode/chips/ccpacket/am/NetMask.nc new file mode 100644 index 0000000000..b9e73e55ac --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/am/NetMask.nc @@ -0,0 +1,9 @@ +#include "AM.h" + +/** + * Allows setting and reading a node's netmask - which address bits represent the AM group. + */ +interface NetMask { + async command void setNetMask(am_netmask_t mask); + async command am_netmask_t netMask(); +} diff --git a/tos/platforms/gnode/chips/ccpacket/hal/ChipconRegisters.h b/tos/platforms/gnode/chips/ccpacket/hal/ChipconRegisters.h new file mode 100644 index 0000000000..14828c9fe9 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/hal/ChipconRegisters.h @@ -0,0 +1,90 @@ +#ifndef CHIPCON_REGISTERS_H +#define CHIPCON_REGISTERS_H + +enum { NUM_REGISTERS = 36 }; + +#ifndef __MSP430_HAS_CC1101__ +enum ChipconConfigRegisters { + FSCTRL1 = 0x0B, // Frequency synthesizer control. + FSCTRL0 = 0x0C, // Frequency synthesizer control. + FREQ2 = 0x0D, // Frequency control word, high byte. + FREQ1 = 0x0E, // Frequency control word, middle byte. + FREQ0 = 0x0F, // Frequency control word, low byte. + MDMCFG4 = 0x10, // Modem configuration. + MDMCFG3 = 0x11, // Modem configuration. + MDMCFG2 = 0x12, // Modem configuration. + MDMCFG1 = 0x13, // Modem configuration. + MDMCFG0 = 0x14, // Modem configuration. + CHANNR = 0x0A, // Channel number. + DEVIATN = 0x15, // Modem deviation setting (when FSK modulation is enabled). + FREND1 = 0x21, // Front end RX configuration. + FREND0 = 0x22, // Front end RX configuration. + MCSM1 = 0x17, // Main Radio Control State Machine configuration. + MCSM0 = 0x18, // Main Radio Control State Machine configuration. + FOCCFG = 0x19, // Frequency Offset Compensation Configuration. + BSCFG = 0x1A, // Bit synchronization Configuration. + AGCCTRL2 = 0x1B,// AGC control. + AGCCTRL1 = 0x1C,// AGC control. + AGCCTRL0 = 0x1D,// AGC control. + FSCAL3 = 0x23, // Frequency synthesizer calibration. + FSCAL2 = 0x24, // Frequency synthesizer calibration. + FSCAL1 = 0x25, // Frequency synthesizer calibration. + FSCAL0 = 0x26, // Frequency synthesizer calibration. + FSTEST = 0x29, // Frequency synthesizer calibration. + TEST2 = 0x2C, // Various test settings. + TEST1 = 0x2D, // Various test settings. + TEST0 = 0x2E, // Various test settings. + IOCFG2 = 0x00, // GDO2 output pin configuration. + IOCFG0 = 0x02, // GDO0 output pin configuration. Refer to SmartRF� Studio User Manual for detailed pseudo register explanation. + PKTCTRL1 = 0x07,// Packet automation control. + PKTCTRL0 = 0x08,// Packet automation control. + ADDR = 0x09, // Device address. + PKTLEN = 0x06, // Packet length. + PATABLE = 0x3E, // PA power control - special register, see data sheet for use. +}; + +enum StatusRegisters { + PARTNUM = 0x30, // Part number for CC1101 + VERSION = 0x31, // Current version number + FREQEST = 0x32, // Frequency Offset Estimate + LQI = 0x33, // Demodulator estimate for Link Quality + RSSI = 0x34, // Received signal strength indication + MARCSTATE = 0x35, // Control state machine state + WORTIME1 = 0x36, // High byte of WOR timer + WORTIME0 = 0x37, // Low byte of WOR timer + PKTSTATUS = 0x38, // Current GDOx status and packet status + VCO_VC_DAC = 0x39, // Current setting from PLL calibration module + TXBYTES = 0x3A, // Underflow and number of bytes in the TX FIFO + RXBYTES = 0x3B, // Overflow and number of bytes in the RX FIFO + RCCTRL1_STATUS = 0x3C, // Last RC oscillator calibration result + RCCTRL0_STATUS = 0x3D, // Last RC oscillator calibration result +}; + +enum FifoAccess { + TXFIFO = 0x3F, + RXFIFO = 0xBF, + TX_BURST_WRITE = 0x7F, + RX_BURST_READ = 0xFF, +}; +#endif // __MSP430_HAS_CC1101__ + +enum Strobes { + SRES = 0x30, // Reset chip. + SFSTXON = 0x31, // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1). If in RX (with CCA): + // Go to a wait state where only the synthesizer is running (for quick RX / TX turnaround). + SXOFF = 0x32, // Turn off crystal oscillator. + SCAL = 0x33, // Calibrate frequency synthesizer and turn it off. SCAL can be strobed from IDLE mode without + // setting manual calibration mode (MCSM0.FS_AUTOCAL=0) + SRX = 0x34, // Enable RX. Perform calibration first if coming from IDLE and MCSM0.FS_AUTOCAL=1. + STX = 0x35, // In IDLE state: Enable TX. Perform calibration first if MCSM0.FS_AUTOCAL=1. + // If in RX state and CCA is enabled: Only go to TX if channel is clear. + SIDLE = 0x36, // Exit RX / TX, turn off frequency synthesizer and exit Wake-On-Radio mode if applicable. + SWOR = 0x38, // Start automatic RX polling sequence (Wake-on-Radio) as described in Section 19.5 if WORCTRL.RC_PD=0. + SPWD = 0x39, // Enter power down mode when CSn goes high. + SFRX = 0x3A, // Flush the RX FIFO buffer. Only issue SFRX in IDLE or RXFIFO_OVERFLOW states. + SFTX = 0x3B, // Flush the TX FIFO buffer. Only issue SFTX in IDLE or TXFIFO_UNDERFLOW states. + SWORRST = 0x3C, // Reset real time clock to Event1 value. + SNOP = 0x3D, // No operation. May be used to get access to the chip status byte. +}; + +#endif diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.h b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.h new file mode 100644 index 0000000000..87c0098ccd --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.h @@ -0,0 +1,11 @@ +#ifndef HAL_CHIPCON_CONTROL_H +#define HAL_CHIPCON_CONTROL_H + +typedef struct { + uint32_t txCount; // number of packets transmitted + uint32_t rxCount; // number of packets received + uint32_t dropCount; // number of packets dropped + uint8_t errorCount; // number of detected non-fatal errors +} cc_hal_status_t; + +#endif diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.nc b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.nc new file mode 100644 index 0000000000..838f22327a --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.nc @@ -0,0 +1,114 @@ +interface HalChipconControl { + + /** + * Configure the radio with default settings, then power it down and release the SPI bus. + */ + command void init(); + + /** + * Claim the SPI bus, power up the radio chip and go to RX mode. + * @pre SPI bus not already owned and immediately available + */ + command void on(); + + /** + * Power down and release the SPI bus. + */ + command void off(); + + /** + * Switch to TX mode and send the data in the TX FIFO. If the FIFO is empty, + * the radio will start sending a continuous preamble until data is written to the FIFO. + * It will only switch to TX if the channel is clear and the radio is not currently receiving + * a packet. + * + * @pre not already transmitting + * @pre radio is in receive mode (to do CCA) + * @return: + * SUCCESS if the switch was made (txDone() will be signalled), + * EOFF if the radio is off, + * ERETRY if the radio is calibrating, + * EBUSY if the radio is busy receiving a packet, + * FAIL if we could not switch because of CCA + */ + command error_t tx(); + + /** + * Sync word has been sent or is about to be. Currently, this event + * is generated just before writing the data to the FIFO. For accuracy, + * it is very important not to do anything lengthy in the event handler! + * The time stamp corresponds to the start of the packet. + */ + event void txStart(uint32_t timestamp); + + /** + * The packet in the buffer was sent or the transmisison was aborted. + * The time stamp corresponds to the end of the packet. + * @return SUCCESS if the packet was sent, EOFF if the radio was turned off in the middle of a transmission, ERETRY if the TX buffer underflowed. + */ + event void txDone(uint32_t timestamp, error_t error); + + /** + * A packet was received and is waiting in the RX buffer. + * The radio is now IDLE until the FIFO is emptied by calling read(). + * The time stamp corresponds to the end of the packet. + */ + event void rxWaiting(uint32_t timestamp); + + /** + * Reports whether the channel is clear. Returns TRUE if the radio is not in RX mode. + */ + command bool isChannelClear(); + + /** + * Returns the current RSSI if no packet is being received, or the RSSI of the sync word + * if a packet is being received. + * @pre radio is in RX mode + */ + command int16_t getRssi(); + + /** + * @return TRUE iff the radio is currently busy transmitting or receiving a packet. + */ + command bool isBusy(); + + /** + * Enable or disable address checking (disabled by default). + */ + command void useAddressChecking(bool enable); + + /** + * Set the channel number. + * This sets the frequency to the base frequency + (channel number * channel width). + * @pre not currently transmitting + */ + command void setChannel(uint8_t channel); + + /** + * Enable or disable automatic calibration when going from IDLE to RX or TX (on by default). + */ + command void autoCalibrate(bool enable); + + /** + * If not transmitting, go idle, calibrate the radio and resume receiving. + * Otherwise, do nothing (keep transmitting). + */ + command void calibrate(); + + /** + * Write packet payload into the TX FIFO. If the buffer underflows, this will be detected + * by the end-of-packet interrupt, which will signal txDone(ERETRY). + * @pre length < FIFO_SIZE (64) + */ + command void write(uint8_t* buffer, uint8_t length); + + /** + * Read a packet and 2 status bytes from the RX FIFO into the buffer. + * After emptying the FIFO, the radio returns to RX mode unless it is already transmitting. + * @pre there is a packet in the RX FIFO + * @pre packet is smaller than MAX_PACKET_LENGTH (should be enforced by the radio) + * @return FAIL if the buffer contents were found invalid, SUCCESS otherwise + */ + command error_t read(uint8_t* buffer); + +} diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlC.nc b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlC.nc new file mode 100644 index 0000000000..0cd11483d7 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlC.nc @@ -0,0 +1,37 @@ +#include "AM.h" +#include "HalChipconControl.h" + +/** + * Radio control and configuration. + */ +configuration HalChipconControlC { + provides { + interface HalChipconControl; + interface Get as Status; + } +} + +implementation { + + components MainC, BusyWaitMicroC, ActiveMessageAddressC, LocalTime32khzC; + components HalChipconControlP, HplChipconPacketRadioC, new TimerMilliC(); + + HalChipconControl = HalChipconControlP; + Status = HalChipconControlP; + + MainC.SoftwareInit -> HalChipconControlP; + + HalChipconControlP.ActiveMessageAddress -> ActiveMessageAddressC; + HalChipconControlP.BusyWait -> BusyWaitMicroC; + HalChipconControlP.SpiResource-> HplChipconPacketRadioC; + HalChipconControlP.HplChipconSpi -> HplChipconPacketRadioC; + HalChipconControlP.SI -> HplChipconPacketRadioC.SI; + HalChipconControlP.SO -> HplChipconPacketRadioC.SO; + HalChipconControlP.Clock -> HplChipconPacketRadioC.Clock; + HalChipconControlP.CSn -> HplChipconPacketRadioC.CSn; + HalChipconControlP.G0 -> HplChipconPacketRadioC.G0; + HalChipconControlP.G2 -> HplChipconPacketRadioC.G2; + HalChipconControlP.G0Interrupt -> HplChipconPacketRadioC.G0Interrupt; + HalChipconControlP.TxTimer -> TimerMilliC; + HalChipconControlP.LocalTime -> LocalTime32khzC; +} diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc new file mode 100644 index 0000000000..6c8e1be869 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc @@ -0,0 +1,765 @@ +#include "Assert.h" +#include "ChipconRegisters.h" +#include "ChipconRegisterValues.h" +#include "ChipconAssert.h" +#include "HalChipconControl.h" + +/** + * Radio on/off control and configuration. + * All HalChipconControl commands except init() are only available in between StdControl.start()/stop(). + */ +module HalChipconControlP { + provides { + interface Init; + interface HalChipconControl; + interface Get as Status; + } + + uses { + interface Resource as SpiResource; + interface HplChipconSpi; + interface GeneralIO as SI; + interface GeneralIO as SO; + interface GeneralIO as Clock; + interface GeneralIO as CSn; + interface GeneralIO as G0; + interface GeneralIO as G2; + interface GpioInterrupt as G0Interrupt; + interface BusyWait; + interface ActiveMessageAddress; + interface Timer as TxTimer; + interface LocalTime; + } +} + +implementation { + + // Timing values in microseconds taken from the data sheet, Table 28: State Transition Timing, + // Application Note 038: Wake-On-Radio, and Design Note 505: RSSI Interpretation and Timing + enum Timings { + CALIBRATION_TIME = 721, // additional time taken when calibrating during a state transition + OFF_TO_IDLE_TIME = 300, // startup and stabilising the crystal + IDLE_TO_RXTX_TIME = 89, // switching from idle mode to RX or TX (not including calibration) + RX_TO_TX_TIME = 10, // switching from RX to TX + }; + + // limit the amount of time we'll send a preamble to prevent a broken program jamming everyone + #define TX_PREAMBLE_TIMEOUT 60*1024UL + + // if we don't get a txDone within a reasonable time window, assume the interrupt was lost and recover + #define TX_DATA_TIMEOUT (3 * 8 * MAX_PACKET_LENGTH * 1024UL)/BAUD_RATE + + // Chip states, Table 17: Status Byte Summary + enum States { + STATE_IDLE, + STATE_RX, + STATE_TX, + STATE_FSTXON, + STATE_CALIBRATE, + STATE_SETTLING, + STATE_RXFIFO_OVERFLOW, + STATE_TXFIFO_UNDERFLOW, + STATE_OFF, // extra state to represent the radio being turned off + }; + + enum { + FIFO_SIZE = 64 + }; + + // indicates if we are currently transmitting + bool transmitting = FALSE; + + // number of end of packet events pending + uint8_t pending = 0; + + // timestamps of the last end-of-packet interrupt + uint32_t rxTimeStamp; + uint32_t txTimeStamp; + + // number of packets sent, received and dropped + cc_hal_status_t status; + + /** + * Send a command strobe. + * @return the chip status byte. + */ + uint8_t strobe(uint8_t cmd) { + return call HplChipconSpi.strobe(cmd); + } + + /** + * Extract the chip state from the chip status byte, obtained by sending a NOP strobe. + * If the radio is off (CSn is high), this returns STATE_OFF without querying the radio. + */ + uint8_t getChipState() { + uint8_t statusByte; + + if (call CSn.get()) { + // chip select is high, so the radio is off + return STATE_OFF; + } + + // chip state is in bits [6:4] of the chip status byte + statusByte = strobe(SNOP); + return (statusByte >> 4) & 0x07; + } + + /** + * Wait for the voltage control and oscillator to stabilize after + * power up or coming out of sleep mode. + */ + void waitForChipReady() { + // chip is ready when SO goes low + while (call SO.get()); + } + + /** + * Read a register. + */ + uint8_t readRegister(uint8_t reg) { + // for status registers (address 0x30 to 0x3E), set the burst bit to distinguish them from command strobes + if (reg >= 0x30 && reg <= 0x3E) reg |= 0x40; + + // set the read flag + reg |= 0x80; + + return call HplChipconSpi.readRegister(reg); + } + + /** + * Write a register. + */ + void writeRegister(uint8_t reg, uint8_t value) { + call HplChipconSpi.writeRegister(reg, value); + } + + /** + * Send reset command. + * @pre not currently transmitting + */ + void reset() { + atomic assertNot(transmitting, ASSERT_CC_HAL_NOT_IDLE); + + /* + * Wiggle the pins according to section 19.1 of the data sheet. + * We don't set the CLK/SI SIDLE pin control combination (section 11.3) + * because + * a) it wouldn't work if hardware SPI already has control of the pins, + * b) we never activate pin control mode, and + * c) even if we did trigger a pin control command (which would be SPWD), + * the radio will be turned off after it is configured, anyway. + */ + + call CSn.set(); + call CSn.clr(); + call CSn.set(); + call BusyWait.wait(40); + call CSn.clr(); + waitForChipReady(); + + strobe(SRES); + waitForChipReady(); + } + + /** + * Verify the part number and version registers. + */ + void checkChipVersion() { + uint8_t partnum = readRegister(PARTNUM); + uint8_t version = readRegister(VERSION); + assert(partnum == EXPECTED_PARTNUM, ASSERT_CC_HAL_CHIP_VERSION); + assert(version == EXPECTED_VERSION_CC1101 || version == EXPECTED_VERSION_RF1A, ASSERT_CC_HAL_CHIP_VERSION); + } + + /** + * Send calibration command and busy wait for it to finish. + */ + void calibrate() { + strobe(SCAL); + call BusyWait.wait(CALIBRATION_TIME); + } + + /** + * Load default configuration into registers. + */ + void configure() { + uint8_t i; + for (i = 0; i < NUM_REGISTERS * 2; i += 2) { + uint8_t reg = chipconRegisterValues[i]; + uint8_t value = chipconRegisterValues[i+1]; + call HplChipconSpi.writeRegister(reg, value); + } + } + + /** + * Switch to RX mode. + * Depending on radio settings, this may perform calibration first, + * so the radio may not go to RX mode immediately. + */ + void listen() { + strobe(SRX); + } + + /** + * Wait for either the CS (Carrier Senser) or CCA (Clear Channel Assessment) bits + * to be set (which indicates the radio has a valid RSSI measurement). + */ + void waitForRssiValid() { + // wait until either CS (bit 6) or CCA (bit 4) is asserted in PKTSTATUS + uint8_t valid = (1<< 6) | (1 << 4); + while (!(readRegister(PKTSTATUS) & valid)); + } + + /** + * Set the ADDR register to the low byte of our current ActiveMessage address. + */ + void setAddress() { + // Address can change at any time (for example, GuArtNet changes it during + // PlatformInit by reading it from flash) and we may not have access to the SPI yet. + // In that case, just skip it and HalChipconControl.init() will set the address later. + if (call SpiResource.isOwner()) { + writeRegister(ADDR, call ActiveMessageAddress.amAddress() & 0xFF); + } + } + + task void taskSetAddress() { + setAddress(); + } + + async event void ActiveMessageAddress.changed() { + // post a task so we don't have to worry about using the SPI bus asynchronously + post taskSetAddress(); + } + + /** + * Packet sent, check for underflow or radio turned off, post task to signal the event and resume receiving. + */ + task void txDone() { + uint8_t state; + uint32_t timestamp; + + atomic { + assertEquals(pending, 1, ASSERT_CC_HAL_TOO_MANY_PENDING); + pending = 0; + transmitting = FALSE; + timestamp = txTimeStamp; + call TxTimer.stop(); + } + + dbg("HALRadio", "%s N%u: %s: txDone\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + + // verify we didn't interpret a received packet as a transmitted packet + // TODO: remove? No: it just happened! RXBYTES was read as 116. + // May be the "SPI Read Synchronization Issue" described here: + // http://focus.ti.com/lit/er/swrz020b/swrz020b.pdf + // for now, check the value twice if it is non-zero + // Update: still breaks, but it seems to have no adverse effect, so leave the assert disabled. + // assertEquals(readRegister(RXBYTES), 0, ASSERT_CC_HAL_TX_WAS_RX); + if (readRegister(RXBYTES) != 0) { + platform_printf("Hal: RX_BYTES = %u\n", readRegister(RXBYTES)); + strobe(SIDLE); + strobe(SFRX); + platform_printf("Hal: flush: RX_BYTES = %u\n", readRegister(RXBYTES)); + } + + state = getChipState(); + if (state == STATE_OFF) { + signal HalChipconControl.txDone(timestamp, EOFF); + } else if (state == STATE_TXFIFO_UNDERFLOW) { + platform_printf("Hal: TX_FIFO_UNDERFLOW\n"); + + // acknowledge underflow + strobe(SFTX); + + // go back to receive mode and inform upper layer of failed transmission + listen(); + signal HalChipconControl.txDone(timestamp, ERETRY); + } else if (state == STATE_IDLE || state == STATE_CALIBRATE) { + // return to receive mode and signal successful completion event + status.txCount++; + listen(); + signal HalChipconControl.txDone(timestamp, SUCCESS); + } else { + // unexpected state, report what state we're in + // (by comparing to one we know it isn't) + assertEquals(state, STATE_IDLE, ASSERT_CC_HAL_NOT_IDLE); + } + } + + /** + * Packet received, address check failed or maximum length exceeded, CRC error, or RX FIFO overflowed. + */ + task void rxDone() { + uint8_t state = getChipState(); + uint8_t bytesInFifo; + bool overflow; + + atomic { + assert(pending > 0, ASSERT_CC_HAL_NO_PENDING); + + // Not every end-of-packet interrupt results in an actual packet in the RX FIFO. + // Some conditions (failed address or length check) leave the radio in RX, in which case + // another interrupt can follow shortly, esp. at high data rates. + + // If we are still in RX, we can't reset pending to zero because another rxDone() may + // already have been posted (and would see pending == 0). Instead, decrement it. + if (state == STATE_RX) { + pending--; + + if (pending > 0) { + // ensure the the task runs once for each pending interrupt + // (a task can't be scheduled multiple times, so if the interrupt + // handler posts it as well, that's OK) + post rxDone(); + } + + return; + } + + // If we are not in RX, we know we won't receive another packet until we have explicitly + // returned to RX, so we can (and should) safely reset pending to zero. + pending = 0; + } + + // nothing to do if the radio is off + if (state == STATE_OFF) { + dbg("HALRadio", "%s N%u: %s: ERROR rxDone dropped packet, radio off\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + return; + } + + // read the number of bytes in the FIFO + // RXFIFO_OVERFLOW is indicated by the top bit + bytesInFifo = readRegister(RXBYTES); + overflow = bytesInFifo & (1<<7); + + if (overflow) { + // acknowledge the overflow + dbg("HALRadio", "%s N%u: %s: WARNING rxDone detected overflow\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + strobe(SFRX); + } + + // when a packet is dropped on the CRC, address or length check, the RX FIFO will be empty + // if we're still in RX, we didn't receive a complete packet (which has occurred, triggering assert (1) below) + if (overflow || bytesInFifo == 0 || state == STATE_RX) { + // radio will automatically resume receiving on a failed address or length check, + // but after a CRC error or overflow will it will be idle, so go to RX mode manually in that case + dbg("HALRadio", "%s N%u: %s: ERROR rxDone empty/overflow/ignored: dropped packet\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + status.dropCount++; + if (state == STATE_IDLE || state == STATE_CALIBRATE || state == STATE_RXFIFO_OVERFLOW) listen(); + } else { + // radio is now idle or calibrating, depending on AUTOCAL setting + uint32_t timestamp; + + assert(state == STATE_IDLE || state == STATE_CALIBRATE, ASSERT_CC_HAL_NOT_IDLE); + status.rxCount++; + + // ReceiveP calling read() will put us back in RX + atomic timestamp = rxTimeStamp; + signal HalChipconControl.rxWaiting(timestamp); + } + } + + /** + * Set to trigger on the falling edge. G0 is configured as follows: + * "Asserts when sync word has been sent / received, and de-asserts at the end of the packet. In RX, the pin will de-assert + * when the optional address check fails or the RX FIFO overflows. In TX the pin will de-assert if the TX FIFO underflows." + * So, this signals one of the following events: + * - TX FIFO underflow + * - RX FIFO overflow + * - packet sent + * - packet received + * - packet dropped on address check + * - packet dropped on CRC error + * - radio turned off or reset + */ + async event void G0Interrupt.fired() { + // if we don't check the transmitting flag here but in a task, there will be a race condition + // between the interrupt, interrupt handler, tx() and rx/txDone() + uint32_t time = call LocalTime.get(); + pending++; + if (transmitting) { + txTimeStamp = time; + post txDone(); + } else { + rxTimeStamp = time; + post rxDone(); + } + } + + /** + * Configure the radio with default settings, then power it down and release the SPI bus. + * @pre: SPI bus unclaimed and available + * @return SUCCESS + */ + command error_t Init.init() { + call HalChipconControl.init(); + dbg("HALRadio", "%s N%u: %s: INFO radio HAL init SUCCESS\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + return SUCCESS; + } + + /** + * Configure the radio with default settings, then power it down and release the SPI bus. + */ + command void HalChipconControl.init() { + atomic transmitting = FALSE; + + // pin configuration + // G0 starts out as a clock signal, so don't enable the interrupt until we reconfigure it + call G0Interrupt.disable(); + call G0.makeInput(); + call G2.makeInput(); + call CSn.makeOutput(); + call CSn.set(); + + call SO.makeInput(); + call SI.makeOutput(); + call Clock.makeOutput(); + dbg("HALRadio", "%s N%u: %s: INFO pins initialized\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + + // enable and initialise the chip + call HalChipconControl.on(); + dbg("HALRadio", "%s N%u: %s: INFO radio chip powered up\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + reset(); + dbg("HALRadio", "%s N%u: %s: INFO radio chip reset\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + checkChipVersion(); + //dbg("HALRadio", "%s N%u: %s: INFO radio chip version OK\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + configure(); + //dbg("HALRadio", "%s N%u: %s: INFO radio chip configured\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + setAddress(); + //dbg("HALRadio", "%s N%u: %s: INFO radio chip address set\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + calibrate(); + //dbg("HALRadio", "%s N%u: %s: INFO radio chip calibrated\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + + // go into sleep mode (power down) + call HalChipconControl.off(); + //dbg("HALRadio", "%s N%u: %s: INFO radio in sleep mode\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + + // enable the end of packet interrupt (a spurious event will be ignored since the radio is off) + call G0Interrupt.enableFallingEdge(); + } + + /** + * Claim the SPI bus, power up the radio chip and go to RX mode. + * @pre SPI bus not already owned and immediately available + */ + command void HalChipconControl.on() { + // claim the SPI bus + error_t error = call SpiResource.immediateRequest(); + assertSuccess(error, ASSERT_CC_HAL_SPI_REQUEST); + + // activate the chip select pin, wait for the chip to power up + call CSn.clr(); + waitForChipReady(); + + // go to receive mode + listen(); + } + + /** + * Power down and release the SPI bus. + */ + command void HalChipconControl.off() { + // go idle, then power down strobe and deactivate the chip enable pin + strobe(SIDLE); + strobe(SPWD); + call CSn.set(); + + // release the SPI bus + call SpiResource.release(); + } + + /** + * @return TRUE iff the radio is currently busy transmitting or receiving a packet. + */ + command bool HalChipconControl.isBusy() { + atomic return transmitting || call G0.get() || pending > 0; + } + + /** + * Switch to TX mode and send the data in the TX FIFO. If the FIFO is empty, + * the radio will start sending a continuous preamble until data is written to the FIFO. + * It will only switch to TX if the channel is clear and the radio is not currently receiving + * a packet. + * + * @pre not already transmitting + * @pre radio is in receive mode (to do CCA) + * @return: + * SUCCESS if the switch was made (txDone() will be signalled), + * EOFF if the radio is off, + * ERETRY if the radio is calibrating, + * EBUSY if the radio is busy receiving a packet, + * FAIL if we could not switch because of CCA + */ + command error_t HalChipconControl.tx() { + uint8_t state = getChipState(); + if (state == STATE_OFF) return EOFF; + + atomic assertNot(transmitting, ASSERT_CC_HAL_TX_ALREADY); + + // we can only do CCA in RX mode, so check for that + // if we're idle, calibrating or settling, return ERETRY so the sender will try again + // else, anything but RX means something is wrong + if (state == STATE_IDLE || state == STATE_CALIBRATE || state == STATE_SETTLING || state == STATE_RXFIFO_OVERFLOW) { + // come back later + return ERETRY; + } else { + assertEquals(state, STATE_RX, ASSERT_CC_HAL_CCA_NO_RX); + } + + // Note: we must be very careful not to create a race condition on the + // transmitting flag and the end-of-packet interrupt. + // The current approach is as follows: + // test G0 outside an atomic block: + // if G0 is high, a packet is being received and we must wait for the interrupt to go off -> EBUSY + // if G0 is low, we should be clear, but maybe it *just went low* and the interrupt is pending. + // That is why the test is outside the atomic block: the interrupt handler will run first and increment pending. + // Then, in the atomic block: + // check if pending > 0; if so, a packet still needs to be handled -> EBUSY + // try to switch to TX (protected by TX-if-CCA) + // if successfully switched, set the transmitting flag + + if (call G0.get()) { + return EBUSY; + } + + // G0 is low; if this just happened (interrupt pending), + // the interrupt handler will run before we enter the atomic block + // and pending will be non-zero + + atomic { + // no pending interrupts - see if any tasks are pending + if (pending > 0) { + return EBUSY; + } + + // If a TX follows quickly after entering RX mode, the RSSI may not be valid yet. + // This may take about 100 us. + waitForRssiValid(); + + // if G0 goes high now, TX-if-CCA will prevent us from switching + // attempt to switch to TX mode + strobe(STX); + + // wait and see if we actually made the transition + call BusyWait.wait(RX_TO_TX_TIME); + + // check against STATE_RX instead of STATE_TX, just in case we're still in STATE_SETTLING or somesuch + if (getChipState() == STATE_RX) { + return FAIL; + } + + // set the flag - next interrupt indicates end of sent packet + transmitting = TRUE; + + // set a timer to guard against losing the end-of-packet interrupt + if (call TxTimer.isRunning()) { + // write() has already been called, stick to the short timeout + } else { + // allow for a reasonable length preamble + call TxTimer.startOneShot(TX_PREAMBLE_TIMEOUT); + } + } + + return SUCCESS; + } + + /** + * Write packet payload into the TX FIFO. If the buffer underflows, this will be detected + * by the end-of-packet interrupt handler, which will signal txDone(ERETRY). + * @pre length < FIFO_SIZE (64) + */ + command void HalChipconControl.write(uint8_t* buffer, uint8_t length) { + assert(length < FIFO_SIZE, ASSERT_CC_HAL_PACKET_TOO_LARGE); + assert(length == buffer[0] + 1, ASSERT_CC_HAL_INVALID_LENGTH); + + // write the first byte to start transmitting the sync word + call HplChipconSpi.writeRegister(TXFIFO, buffer[0]); + + // timestamp the start of the packet + signal HalChipconControl.txStart(call LocalTime.get()); + + // write data + call HplChipconSpi.write(TX_BURST_WRITE, buffer+1, length-1); + + // end burst + call CSn.set(); + call CSn.clr(); + + // If tx() has already been called, the written data will now be sent, or else, tx() will be called soon. + // Either way, we can expect the end of the packet reasonably soon. + dbg("HALRadio", "%s N%u: %s: TxTimer started with interval %u\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, TX_DATA_TIMEOUT); + call TxTimer.startOneShot(TX_DATA_TIMEOUT); + } + + /** + * Read a packet and 2 status bytes from the RX FIFO into the buffer. + * After emptying the FIFO, the radio returns to RX mode. + * @pre there is a packet in the RX FIFO + * @pre packet is smaller than MAX_PACKET_LENGTH (should be enforced by the radio) + * @return EINVALID if the buffer contents were found invalid or too short + */ + command error_t HalChipconControl.read(uint8_t* buffer) { + uint8_t length; + + uint8_t state = getChipState(); + uint8_t bytesInFifo = readRegister(RXBYTES); + uint8_t overflow = bytesInFifo & (1<<7); + assert(state == STATE_IDLE || state == STATE_CALIBRATE, ASSERT_CC_HAL_NOT_IDLE); + + // read and check the length byte first (packet length, excluding the length byte itself and the footer) + length = call HplChipconSpi.readRegister(RXFIFO); + + // while we empty the buffer, the radio can start receiving again + listen(); + + assertNot(overflow, ASSERT_CANT_HAPPEN); + + // these asserts do happen, especially the second + // maybe the buffer gets flushed due to a bad CRC before it is read? + // assert(length > 0, ASSERT_CC_HAL_RX_FIFO_EMPTY); + // assert(length + 2 <= bytesInFifo, ASSERT_CC_HAL_RX_FIFO_EMPTY); // two status bytes + // assert(length + 1 <= MAX_PACKET_LENGTH, ASSERT_CC_HAL_PACKET_TOO_LARGE); // length byte plus data + if (length == 0 || length + 2 > bytesInFifo || length + 1 > MAX_PACKET_LENGTH) { + // resolve the problem by flushing the buffer and restarting receive mode + platform_printf("HAL: length=%u, flushing buffer\n", length); + call CSn.set(); + call CSn.clr(); + strobe(SIDLE); + strobe(SFRX); + listen(); + return FAIL; + } + + // store the length and read the rest (including 2 status bytes) + buffer[0] = length; + call HplChipconSpi.read(RX_BURST_READ, &buffer[1], length + 2); + + // end burst + call CSn.set(); + call CSn.clr(); + return SUCCESS; + } + + /** + * Reports whether the channel is clear. Returns TRUE if the radio is not in RX mode. + */ + command bool HalChipconControl.isChannelClear() { + return call G2.get(); + } + + /** + * Returns the current RSSI if no packet is being received, or the RSSI of the sync word + * if a packet is being received. + * @pre radio is in RX mode + */ + command int16_t HalChipconControl.getRssi() { + uint8_t state = getChipState(); + int16_t rssi; + assertEquals(state, STATE_RX, ASSERT_CC_HAL_RSSI_NO_RX); + rssi = readRegister(RSSI); + if (rssi > 127) rssi -= 256; + return rssi/2 - RSSI_OFFSET; + } + + /** + * Enable or disable address checking (disabled by default). + */ + command void HalChipconControl.useAddressChecking(bool enable) { + // address checking is set in bits 1:0 of PKTCTRL1 + // 00 is off, 11 is on with both 0x00 and 0xFF accepted as broadcast addresses + uint8_t setting = readRegister(PKTCTRL1); + + if (enable) { + setting |= 3; + } else { + setting &= ~3; + } + + writeRegister(PKTCTRL1, setting); + } + + /** + * Set the channel number. + * This sets the frequency to the base frequency + (channel number * channel width). + * @pre not currently transmitting + */ + command void HalChipconControl.setChannel(uint8_t channel) { + atomic assertNot(transmitting, ASSERT_CC_HAL_NOT_IDLE); + + strobe(SIDLE); + writeRegister(CHANNR, channel); + listen(); + } + + /** + * Enable or disable automatic calibration when going from RX or TX to IDLE (on by default). + */ + command void HalChipconControl.autoCalibrate(bool enable) { + // FS_AUTOCAL is bits 5:4 in MCSM0 + // 00 (0x00) is off (manual calibration only), + // 01 (0x10) automatically calibrates when going from IDLE to RX or TX + // 10 (0x20) automatically calibrates when going from RX or TX to IDLE + uint8_t setting = readRegister(MCSM0); + + // clear bits 5:4 + setting &= ~0x30; + if (enable) { + setting |= 0x20; + } + + writeRegister(MCSM0, setting); + } + + /** + * If not transmitting, go idle, calibrate the radio and resume receiving. + * Otherwise, do nothing (keep transmitting). + */ + command void HalChipconControl.calibrate() { + if (transmitting) return; + strobe(SIDLE); + calibrate(); + listen(); + } + + /** + * @return module status: transmitted, received and dropped packet count. + */ + command cc_hal_status_t* Status.get() { + return &status; + } + + /** + * Either we incurred a huge delay during sending, or we didn't get a txDone event. + * If we were delayed but did get an interrupt, leave it to the txDone task. + * Else, generate a txDone event and recover. If the radio is still transmitting, switch back to RX. + */ + event void TxTimer.fired() { + dbg("HALRadio", "%s N%u: %s: INFO TxTimer fired\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + + atomic { + if (pending > 0) { + // the interrupt did fire + return; + } + + dbg("HALRadio", "%s N%u: %s: ERROR TxTimer fired with pending %u\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, pending); + + platform_printf("*** HAL: tx timeout!\n"); + + assert(transmitting, ASSERT_CC_HAL_NO_TX); + status.errorCount++; + transmitting = FALSE; + pending = 0; + if (getChipState() == STATE_TX) listen(); + signal HalChipconControl.txDone(call LocalTime.get(), FAIL); + } + } + + // we only use immediateRequest() + event void SpiResource.granted() {} + + default event void HalChipconControl.rxWaiting(uint32_t timestamp) {} + default event void HalChipconControl.txStart(uint32_t timestamp) {} + default event void HalChipconControl.txDone(uint32_t timestamp, error_t error) {} + +} diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.h b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.h new file mode 100644 index 0000000000..13c5b0acf8 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.h @@ -0,0 +1,20 @@ +#ifndef LOW_POWER_LISTENING_H +#define LOW_POWER_LISTENING_H + +#ifndef LPL_DEFAULT_INTERVAL +#define LPL_DEFAULT_INTERVAL 0 +#endif + +typedef struct { + uint32_t timeOn; // time spent (in ms) with the radio on + uint32_t timeTotal; // total time (in ms) since boot (or clock wraparound) +} cc_lpl_status_t; + +enum { + CCA_SETTLING_TIME = 1, // time to wait before sampling CCA after turning the radio on + LPL_PREAMBLE_OVERLAP = 5, // fixed time (in ms) to add to the receiver's sleep interval to allow for timing jitter; TODO tweak +}; + +#define CALIBRATION_INTERVAL 60*1000U // calibrate the radio every minute + +#endif diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.nc b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.nc new file mode 100644 index 0000000000..63aac847e5 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.nc @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Low Power Listening interface + * + * @author Jonathan Hui + * @author David Moss + * + * Use the 2.x version, which only deals with intervals, not percentage duty cycles. + * @author Michiel Konstapel + * + */ + +#include "message.h" + +interface LowPowerListening { + /** + * Set this this node's radio wakeup interval, in milliseconds. After + * each interval, the node will wakeup and check for radio activity. + * + * Note: The wakeup interval can be set to 0 to indicate that the radio + * should stay on all the time but in order to get a startDone this + * should only be done when the duty-cycling is off (after a stopDone). + * + * @param intervalMs the length of this node's Rx check interval, in [ms] + */ + command void setLocalWakeupInterval(uint16_t intervalMs); + + /** + * @return the local node's wakeup interval, in [ms] + */ + command uint16_t getLocalWakeupInterval(); + + /** + * Configure this outgoing message so it can be transmitted to a neighbor mote + * with the specified wakeup interval. + * @param 'message_t* ONE msg' Pointer to the message that will be sent + * @param intervalMs The receiving node's wakeup interval, in [ms] + */ + command void setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs); + + /** + * @param 'message_t* ONE msg' + * @return the destination node's wakeup interval configured in this message + */ + command uint16_t getRemoteWakeupInterval(message_t *msg); +} diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningC.nc b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningC.nc new file mode 100644 index 0000000000..41fd028500 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningC.nc @@ -0,0 +1,42 @@ +#include "LowPowerListening.h" + +/** + * Provides duty cycling/low power listening. + */ +configuration LowPowerListeningC { + provides { + interface StdControl; + interface Send; + interface Receive; + interface LowPowerListening; + } + + uses { + interface StdControl as SubControl; + interface Send as SubSend; + interface Receive as SubReceive; + } +} + +implementation { + + components LowPowerListeningP, HalChipconControlC, ChipconPacketC, BusyWaitMicroC; + components new TimerMilliC() as DutyCycleTimer, new TimerMilliC() as CcaSampleTimer, new TimerMilliC() as ReceiveTimer; + + LowPowerListeningP.DutyCycleTimer -> DutyCycleTimer; + LowPowerListeningP.CcaSampleTimer -> CcaSampleTimer; + LowPowerListeningP.ReceiveTimer -> ReceiveTimer; + LowPowerListeningP.BusyWait -> BusyWaitMicroC; + LowPowerListeningP.HalChipconControl -> HalChipconControlC; + LowPowerListeningP.ChipconPacket -> ChipconPacketC; + + LowPowerListeningP.SubControl = SubControl; + LowPowerListeningP.SubSend = SubSend; + LowPowerListeningP.SubReceive = SubReceive; + + StdControl = LowPowerListeningP; + Receive = LowPowerListeningP; + Send = LowPowerListeningP; + LowPowerListening = LowPowerListeningP; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc new file mode 100644 index 0000000000..6b32bd6d80 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc @@ -0,0 +1,280 @@ +/** + * Provides duty cycling/low power listening. + */ +module LowPowerListeningP { + provides { + interface StdControl; + interface Send; + interface Receive; + interface LowPowerListening; + } + + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface StdControl as SubControl; + interface HalChipconControl; + interface ChipconPacket; + interface Timer as DutyCycleTimer; + interface Timer as CcaSampleTimer; + interface Timer as ReceiveTimer; + interface BusyWait; + } +} + +implementation { + + // because the default value for the rxInterval field is zero when a packet is cleared, + // and we take that as a sign to use the default LPL interval, i.e. our own, + // we need a separate marker for when a client explicitly requests an interval of zero + #define EXPLICIT_ZERO 0xFFFF + + bool componentOn = FALSE; // is this component running, i.e. is the radio on or duty cycling? + bool radioOn = FALSE; // is the actual radio on, i.e. in its active duty cycle? + bool sending = FALSE; // outgoing packet pending? + uint16_t wakeupInterval = LPL_DEFAULT_INTERVAL; // time between receive checks; 0 means always on + uint16_t calibrationCounter = 0; // when duty cycling, calibrate the radio when this hits zero + + void on() { + error_t error = call SubControl.start(); + assert(error == SUCCESS || error == EALREADY, ASSERT_CC_LPL_START); + radioOn = TRUE; + } + + void off() { + error_t error = call SubControl.stop(); + if (error == SUCCESS) { + radioOn = FALSE; + } else { + // we only expect one kind of error, if AckP is busy + // in which case we'll get a receive() which will result in turning off the radio + assert(error == EBUSY, ASSERT_CC_LPL_STOP); + } + } + + /** + * Start the radio, either duty cycling or always on. + * @return SUCCESS + */ + command error_t StdControl.start() { + componentOn = TRUE; + + // set desired calibration mode + // if we're always on, let the radio calibrate automatically on every RX/TX + // if we are duty cycling, this introduces too much overhead so we calibrate manually every CALIBRATION_INTERVAL + on(); + call HalChipconControl.autoCalibrate(wakeupInterval == 0); + + if (wakeupInterval > 0) { + calibrationCounter = 0; + call DutyCycleTimer.startPeriodic(wakeupInterval); + off(); + } + + return SUCCESS; + } + + /** + * Stop duty cycling and turn the radio off. + */ + command error_t StdControl.stop() { + call DutyCycleTimer.stop(); + call CcaSampleTimer.stop(); + call ReceiveTimer.stop(); + + componentOn = FALSE; + if (radioOn) off(); + + return SUCCESS; + } + + command error_t Send.send(message_t* m, uint8_t len) { + error_t error; + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(m); + + if (sending) return EBUSY; + sending = TRUE; + + // stop any current receive checks + call CcaSampleTimer.stop(); + call ReceiveTimer.stop(); + + // if the receiver sleep interval is not set, use our own + if (call LowPowerListening.getRemoteWakeupInterval(m) == 0) { + metadata->rxInterval = wakeupInterval; + } + + // if the sender explicitly requested a zero interval, set that now + if (call LowPowerListening.getRemoteWakeupInterval(m) == EXPLICIT_ZERO) { + // can't go through LowPowerListening.setRemoteWakeupInterval(), + // because it would just set it to EXPLICIT_ZERO again + metadata->rxInterval = 0; + } + + // if the radio is not on already, turn it on now + if (!radioOn) on(); + + // lower layers should never fail at this point, + // since we are not busy (we checked) and we just + // turned the radio on + error = call SubSend.send(m, len); + assertSuccess(error, ASSERT_CC_LPL_SEND); + return SUCCESS; + } + + event void SubSend.sendDone(message_t* msg, error_t error) { + // turn the radio off if we're duty cycling and not busy + if (wakeupInterval > 0) { + // We may be slow to get here and another packet, like an ack or reply, could already be in the air, + // so do a receive check before turning off the radio. + // Testing shows we should wait a little longer after transmitting than after just waking up + // to prevent false positives, so add 1 ms. + call CcaSampleTimer.startOneShot(CCA_SETTLING_TIME + 1); + } + + sending = FALSE; + signal Send.sendDone(msg, error); + } + + command error_t Send.cancel(message_t* msg) { + return call SubSend.cancel(msg); + } + + command uint8_t Send.maxPayloadLength() { + return call SubSend.maxPayloadLength(); + } + + command void* Send.getPayload(message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + + /** + * Turn the radio on, set to receive and see if there's anyone out there. + * If there is, leave the radio on to receive. If not, turn the radio off again. + */ + event void DutyCycleTimer.fired() { + // skip receive check if radio already on (either we're sending or still listening (ReceiveTimer)) + if (radioOn) return; + + on(); + + // calibrate the radio when the counter hits zero, then reset the counter + // so we calibrate approximately once a minute + if (calibrationCounter == 0) { + call HalChipconControl.calibrate(); + calibrationCounter = CALIBRATION_INTERVAL / wakeupInterval; + } else { + calibrationCounter--; + } + + call CcaSampleTimer.startOneShot(CCA_SETTLING_TIME); + } + + bool clear() { + return !call HalChipconControl.isBusy() && call HalChipconControl.isChannelClear(); + } + + /** + * Radio is now ready to check for a clear channel. + */ + event void CcaSampleTimer.fired() { + if (clear()) { + // assume we don't get false negatives and go back to sleep + off(); + } else { + // 1 ms may be just a bit too fast for reliable CCA and can give us a false positive, + // so check again after another 0.5 ms before deciding to stay awake + call BusyWait.wait(500); + + if (clear()) { + // false alarm + off(); + } else { + // stay awake + call ReceiveTimer.startOneShot(wakeupInterval + LPL_PREAMBLE_OVERLAP); + } + } + } + + /** + * We've waited long enough to pick up a packet if one was coming. + * If it did, stay awake; else go back to sleep. + */ + event void ReceiveTimer.fired() { + if (!call HalChipconControl.isBusy()) { + off(); + } + } + + /** + * A message has arrived. Stop the receive timer, go back to sleep and deliver the message. + */ + event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { + assert(radioOn, ASSERT_CC_LPL_OFF); + + call CcaSampleTimer.stop(); + call ReceiveTimer.stop(); + + // turn the radio off if we're duty cycling and not trying to send a message + // TODO: stay awake for a bit? + if (wakeupInterval > 0 && !sending) { + // see SubSend.sendDone() - do a receive check before turning off the radio + call CcaSampleTimer.startOneShot(CCA_SETTLING_TIME); + } + + return signal Receive.receive(msg, payload, len); + } + + command void LowPowerListening.setLocalWakeupInterval(uint16_t intervalMs) { + uint16_t oldInterval = wakeupInterval; + wakeupInterval = intervalMs; + calibrationCounter = 0; + + if (wakeupInterval == 0) { + // always on, so stop the timers + call DutyCycleTimer.stop(); + call CcaSampleTimer.stop(); + call ReceiveTimer.stop(); + } + + // if we've been started, set the desired calibration mode while the radio is on + // else, it'll be done from StdControl.start() + if (componentOn && oldInterval == 0 && wakeupInterval != 0) { + // the radio was always on and should now start duty cycling + // turn off automatic calibration before turning the radio off, + // we'll manually calibrate every CALIBRATION_INTERVAL + call HalChipconControl.autoCalibrate(FALSE); + off(); + call DutyCycleTimer.startPeriodic(wakeupInterval); + } + + if (componentOn && wakeupInterval == 0 && !radioOn) { + // we're supposed to be always on and the radio is currently turned off, so turn it on + on(); + + // turn on automatic calibration + call HalChipconControl.autoCalibrate(TRUE); + } + } + + command uint16_t LowPowerListening.getLocalWakeupInterval() { + return wakeupInterval; + } + + command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs) { + // Since zero is interpreted as "use the default interval", we use a separate marker value + // for an explicitly requested zero interval. This means you can't set a 65535 ms preamble, + // but the HAL won't send one longer than a minute anyway. + if (intervalMs == 0) intervalMs = EXPLICIT_ZERO; + (call ChipconPacket.getMetadata(msg))->rxInterval = intervalMs; + } + + command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { + // this returns the actual field value, so EXPLICIT_ZERO is not converted back to zero! + return (call ChipconPacket.getMetadata(msg))->rxInterval; + } + + event void HalChipconControl.rxWaiting(uint32_t timestamp) {} + event void HalChipconControl.txStart(uint32_t timestamp) {} + event void HalChipconControl.txDone(uint32_t timestamp, error_t error) {} +} diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningC.nc b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningC.nc new file mode 100644 index 0000000000..276a12c3d0 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningC.nc @@ -0,0 +1,33 @@ +/** + * Disables duty cycling/low power listening, although you can still send to a node which duty cycles. + */ +configuration NoLowPowerListeningC { + provides { + interface StdControl; + interface Send; + interface Receive; + interface LowPowerListening; + } + + uses { + interface StdControl as SubControl; + interface Send as SubSend; + interface Receive as SubReceive; + } +} + +implementation { + +#ifdef LPL_DEFAULT_INTERVAL +#warning LPL_DEFAULT_INTERVAL is defined, but LPL is disabled! +#endif + + components NoLowPowerListeningP, ChipconPacketC; + NoLowPowerListeningP.ChipconPacket -> ChipconPacketC; + + StdControl = SubControl; + Receive = SubReceive; + Send = SubSend; + LowPowerListening = NoLowPowerListeningP; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc new file mode 100644 index 0000000000..e1ea2c1191 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc @@ -0,0 +1,42 @@ +/** + * Disables duty cycling/low power listening, although you can still send to a node which duty cycles. + */ +module NoLowPowerListeningP { + provides { + interface LowPowerListening; + } + + uses { + interface ChipconPacket; + } +} + +implementation { + + command void LowPowerListening.setLocalWakeupInterval(uint16_t sleepIntervalMs) {} + + /** + * @return the local node's sleep interval, in milliseconds + */ + command uint16_t LowPowerListening.getLocalWakeupInterval() { + return 0; + } + + /** + * Configure this outgoing message so it can be transmitted to a neighbor mote + * with the specified Rx sleep interval. + * @param msg Pointer to the message that will be sent + * @param sleepInterval The receiving node's sleep interval, in milliseconds + */ + command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t sleepIntervalMs) { + (call ChipconPacket.getMetadata(msg))->rxInterval = sleepIntervalMs; + } + + /** + * @return the destination node's sleep interval configured in this message + */ + command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { + return (call ChipconPacket.getMetadata(msg))->rxInterval; + } + +} diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h new file mode 100644 index 0000000000..487c79e8e9 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h @@ -0,0 +1,55 @@ +#ifndef CHIPCON_PACKET_H +#define CHIPCON_PACKET_H + +#include "AM.h" + +enum Flags { + FLAG_ACK_REQUEST = 1 << 0, // if set, sender has requested acknowledgement of this message + FLAG_ACK_REPLY = 1 << 1, // if set, this is an acknowledgement of another message +}; + +#define TIMESTAMP_INVALID 0x80000000UL + +/** + * Packet header. + */ +typedef nx_struct chipcon_header_t { + nx_uint8_t length; // packet length, including header, excluding the length byte + nx_am_addr_t dest; // destination address + nx_am_addr_t src; // source address + nx_uint8_t flags; // option bits, for things like acknowledgements + nx_am_id_t type; // AM type +} chipcon_header_t; + +/** + * Packet footer. + */ +typedef nx_struct chipcon_footer_t { +} chipcon_footer_t; + +/** + * Metadata, contains extra information about the message + * that will not be transmitted + */ +typedef nx_struct chipcon_metadata_t { + nx_uint8_t rssi; + nx_uint8_t crcAndLqi; + nx_uint8_t ack; // before sending, tracks if acknowledgement was changed from the default. After sending, this indicates if the packet was acknowledged + nx_uint16_t rxInterval; // LPL sleep interval of receiver + nx_uint32_t timestamp; // transmission or reception timestamp + +#ifdef PACKET_LINK + nx_uint16_t maxRetries; + nx_uint16_t retryDelay; +#endif + +} chipcon_metadata_t; + +#ifndef TOSH_DATA_LENGTH +#define TOSH_DATA_LENGTH 28 +#endif + +// maximum packet length (including the length byte and excluding the appended status bytes) +#define MAX_PACKET_LENGTH (sizeof(chipcon_header_t) + TOSH_DATA_LENGTH + sizeof(chipcon_footer_t)) + +#endif diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.nc b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.nc new file mode 100644 index 0000000000..fed223ae8c --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.nc @@ -0,0 +1,14 @@ +#include "message.h" +#include "ChipconPacket.h" + +/** + * Provides access to the packet header, footer and metadata. + */ +interface ChipconPacket { + async command chipcon_header_t* getHeader(message_t* msg); + async command chipcon_footer_t* getFooter(message_t* msg); + async command chipcon_metadata_t* getMetadata(message_t* msg); + async command uint8_t getPacketLength(message_t* msg); + async command uint8_t getPayloadLength(message_t* msg); + async command void setPayloadLength(message_t* msg, uint8_t len); +} diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketC.nc b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketC.nc new file mode 100644 index 0000000000..59c0f37c2c --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketC.nc @@ -0,0 +1,24 @@ +configuration ChipconPacketC { + provides { + interface ChipconPacket; + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; + interface PacketTimeStamp; + } +} + +implementation { + + components ChipconPacketP, ActiveMessageAddressC; + + ChipconPacket = ChipconPacketP; + Packet = ChipconPacketP; + AMPacket = ChipconPacketP; + PacketAcknowledgements = ChipconPacketP; + PacketTimeStamp = ChipconPacketP; + + ChipconPacketP.ActiveMessageAddress -> ActiveMessageAddressC; + ChipconPacketP.NetMask -> ActiveMessageAddressC; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketP.nc b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketP.nc new file mode 100644 index 0000000000..83006eb0a7 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketP.nc @@ -0,0 +1,206 @@ +#include "message.h" + +module ChipconPacketP { + provides { + interface ChipconPacket; + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; + interface PacketTimeStamp; + } + + uses { + interface ActiveMessageAddress; + interface NetMask; + } +} + +implementation { + + /** + * Return the broadcast address for our AM group, i.e. the address with all 1's for the node ID bits. + * Hence, it's our group OR'd with the inverted netmask. + */ + am_addr_t getLocalBroadcastAddress() { + return call ActiveMessageAddress.amGroup() | ~(call NetMask.netMask()); + } + + async command chipcon_header_t* ChipconPacket.getHeader(message_t* msg) { + return (chipcon_header_t*) (msg->data - sizeof(chipcon_header_t)); + } + + async command chipcon_footer_t* ChipconPacket.getFooter(message_t* msg) { + return (chipcon_footer_t*) (msg->footer); + } + + async command chipcon_metadata_t* ChipconPacket.getMetadata(message_t* msg) { + return (chipcon_metadata_t*) (msg->metadata); + } + + async command uint8_t ChipconPacket.getPacketLength(message_t* msg) { + // the length byte in the header does not include itself, so add one + return (call ChipconPacket.getHeader(msg))->length + 1; + } + + async command uint8_t ChipconPacket.getPayloadLength(message_t* msg) { + // payload length is packet length minus the header and footer + return call ChipconPacket.getPacketLength(msg) - (sizeof(chipcon_header_t) + sizeof(chipcon_footer_t)); + } + + async command void ChipconPacket.setPayloadLength(message_t* msg, uint8_t len) { + (call ChipconPacket.getHeader(msg))->length = sizeof(chipcon_header_t) + len + sizeof(chipcon_footer_t) - 1; + } + + command void Packet.clear(message_t* msg) { + // according to TEP116, this should only clear the headers/footers/metadata, not payload + memset(call ChipconPacket.getHeader(msg), 0, sizeof(chipcon_header_t)); + memset(call ChipconPacket.getFooter(msg), 0, sizeof(chipcon_footer_t)); + memset(call ChipconPacket.getMetadata(msg), 0, sizeof(chipcon_metadata_t)); + } + + command uint8_t Packet.payloadLength(message_t* msg) { + return call ChipconPacket.getPayloadLength(msg); + } + + command void Packet.setPayloadLength(message_t* msg, uint8_t len) { + call ChipconPacket.setPayloadLength(msg, len); + } + + command uint8_t Packet.maxPayloadLength() { + return TOSH_DATA_LENGTH; + } + + command void* Packet.getPayload(message_t* msg, uint8_t len) { + if(len > call Packet.maxPayloadLength()) { + return NULL; + } else { + return (void* COUNT_NOK(len))msg->data; + } + } + + command am_addr_t AMPacket.address() { + return call ActiveMessageAddress.amAddress(); + } + + command am_group_t AMPacket.localGroup() { + return call ActiveMessageAddress.amGroup(); + } + + command am_addr_t AMPacket.destination(message_t* amsg) { + chipcon_header_t* header = call ChipconPacket.getHeader(amsg); + // convert a "physical" broadcast address to a "logical" broadcast address + if (header->dest == getLocalBroadcastAddress()) { + return AM_BROADCAST_ADDR; + } else { + return header->dest; + } + } + + command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { + chipcon_header_t* header = call ChipconPacket.getHeader(amsg); + // convert a "logical" broadcast address to a "physical" broadcast address + if (addr == AM_BROADCAST_ADDR) { + atomic header->dest = getLocalBroadcastAddress(); + } else { + header->dest = addr; + } + } + + command am_addr_t AMPacket.source(message_t* amsg) { + chipcon_header_t* header = call ChipconPacket.getHeader(amsg); + return header->src; + } + + command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { + chipcon_header_t* header = call ChipconPacket.getHeader(amsg); + header->src = addr; + } + + command bool AMPacket.isForMe(message_t* amsg) { + // AMPacket.destination()/setDestination() transparently convert between the local broadcast address + // and AM_BROADCAST_ADDR (255.255.255.255). + // Applications are not expected to send or receive on the global broadcast address, so we require + // the AM group to match. That way, a packet actually sent to the global broadcast address can still be + // received by snooping, but not by accident. + + return call AMPacket.group(amsg) == call AMPacket.localGroup() && + (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); + } + + command am_id_t AMPacket.type(message_t* amsg) { + chipcon_header_t* header = call ChipconPacket.getHeader(amsg); + return header->type; + } + + command void AMPacket.setType(message_t* amsg, am_id_t type) { + chipcon_header_t* header = call ChipconPacket.getHeader(amsg); + header->type = type; + } + + command am_group_t AMPacket.group(message_t* amsg) { + chipcon_header_t* header = call ChipconPacket.getHeader(amsg); + return header->dest & call NetMask.netMask(); + } + + /** + * Does nothing, because the group information is contained in the source + * and destination addresses. + */ + command void AMPacket.setGroup(message_t* amsg, am_group_t grp) {} + + + /** + * Set or clear the ack bit in the header and set the ack flag in the metadata. + */ + void setAck(message_t* msg, bool ack) { + chipcon_header_t* header = call ChipconPacket.getHeader(msg); + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(msg); + if (ack) { + // set the ack request bit + header->flags |= FLAG_ACK_REQUEST; + } else { + // clear the ack request bit + header->flags &= ~FLAG_ACK_REQUEST; + } + + // set the ack field in the metadata to indicate the default was overridden + metadata->ack = TRUE; + } + + async command error_t PacketAcknowledgements.requestAck(message_t* msg) { + setAck(msg, TRUE); + return SUCCESS; + } + + async command error_t PacketAcknowledgements.noAck(message_t* msg) { + setAck(msg, FALSE); + return SUCCESS; + } + + async command bool PacketAcknowledgements.wasAcked(message_t* msg) { + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(msg); + return metadata->ack; + } + + async command bool PacketTimeStamp.isValid(message_t* msg) { + return call PacketTimeStamp.timestamp(msg) != TIMESTAMP_INVALID; + } + + async command uint32_t PacketTimeStamp.timestamp(message_t* msg) { + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(msg); + return metadata->timestamp; + } + + async command void PacketTimeStamp.clear(message_t* msg) { + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(msg); + metadata->timestamp = TIMESTAMP_INVALID; + } + + async command void PacketTimeStamp.set(message_t* msg, uint32_t value) { + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(msg); + metadata->timestamp = value; + } + + async event void ActiveMessageAddress.changed() {} + +} diff --git a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadata.nc b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadata.nc new file mode 100644 index 0000000000..610c2bc434 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadata.nc @@ -0,0 +1,17 @@ +#include "message.h" + +/** + * Provides access to (potentially radio specific) packet metadata fields. + */ +interface PacketMetadata { + + /** + * Return the RSSI value for this packet, in dBm. + */ + command int16_t getRssi(message_t* msg); + + /** + * Return the LQI (link quality indicator) for this packet. + */ + command int16_t getLqi(message_t* msg); +} diff --git a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataC.nc b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataC.nc new file mode 100644 index 0000000000..8857336fd3 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataC.nc @@ -0,0 +1,13 @@ +configuration PacketMetadataC { + provides { + interface PacketMetadata; + } +} + +implementation { + + components PacketMetadataP, ChipconPacketC; + PacketMetadata = PacketMetadataP; + PacketMetadataP.ChipconPacket -> ChipconPacketC; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataP.nc b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataP.nc new file mode 100644 index 0000000000..2c77c3c527 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataP.nc @@ -0,0 +1,24 @@ +#include "ChipconRegisterValues.h" + +/** + * Provide metadata for CC1100 packets. + */ +module PacketMetadataP { + provides interface PacketMetadata; + uses interface ChipconPacket; +} + +implementation { + + command int16_t PacketMetadata.getRssi(message_t* msg) { + // the raw output is in units of 1/2 dBm with an added offset, + // which depends on the frequency and data rate + int16_t rssi = (call ChipconPacket.getMetadata(msg))->rssi; + if (rssi > 127) rssi -= 256; + return rssi/2 - RSSI_OFFSET; + } + + command int16_t PacketMetadata.getLqi(message_t* msg) { + return (call ChipconPacket.getMetadata(msg))->crcAndLqi & 0x7F; + } +} diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/PowerP.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/PowerP.nc new file mode 100644 index 0000000000..592dba68a2 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/PowerP.nc @@ -0,0 +1,40 @@ +module PowerP { + provides interface StdControl; + uses interface HalChipconControl; +} + +implementation { + + bool on = FALSE; + + /** + * Power up the radio, go into RX mode, unless the radio + * is already on, in which case this does nothing (leaves radio in current state). + * @return SUCCESS + */ + command error_t StdControl.start() { + if (!on) { + call HalChipconControl.on(); + on = TRUE; + } + + return SUCCESS; + } + + /** + * Power down the radio if it is not already off. + * @return SUCCESS + */ + command error_t StdControl.stop() { + if (on) { + call HalChipconControl.off(); + on = FALSE; + } + + return SUCCESS; + } + + event void HalChipconControl.txStart(uint32_t timestamp) {} + event void HalChipconControl.txDone(uint32_t timestamp, error_t error) {} + event void HalChipconControl.rxWaiting(uint32_t timestamp) {} +} diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/ReceiveP.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/ReceiveP.nc new file mode 100644 index 0000000000..4593d347ce --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/ReceiveP.nc @@ -0,0 +1,59 @@ +/** + * Provides the basic TinyOS Receive interface on top of the HAL interface and + * timestamps received packets. + */ +module ReceiveP { + provides { + interface Receive; + } + + uses { + interface HalChipconControl; + interface Packet; + interface ChipconPacket; + interface PacketTimeStamp; + } +} + +implementation { + + message_t rxBuffer; + message_t* message = &rxBuffer; + + event void HalChipconControl.rxWaiting(uint32_t timestamp) { + uint8_t* buffer = (uint8_t*) call ChipconPacket.getHeader(message); + chipcon_metadata_t* metadata = call ChipconPacket.getMetadata(message); + uint8_t length; + + // read the packet from the FIFO into our buffer, which will return the radio to receive mode + error_t error = call HalChipconControl.read(buffer); + if (error == SUCCESS) { + // two status bytes are appended by the radio chip, move them to the metadata + // move the last one first, because moving the first might overwrite the second + // (for a packet larger than TOSH_DATA_LENGTH - 1) + length = call ChipconPacket.getPacketLength(message); + metadata->crcAndLqi = buffer[length + 1]; + metadata->rssi = buffer[length]; + call PacketTimeStamp.set(message, timestamp); + + dbg("HALRadio", "%s N%u: %s: INFO packet of length %u received with rssi %u and lqi %x\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__, length, metadata->rssi, metadata->crcAndLqi); + // returned pointer must not be NULL + message = signal Receive.receive(message, message->data, call Packet.payloadLength(message)); + assert(message != NULL, ASSERT_CC_RXTX_NULL_POINTER); + + // The problem with buffer swapping is that everyone has to get it right. + // By zeroing our buffer, it should be obvious when someone kept a pointer to it, + // because it will no longer have valid-looking content. + memset(message, 0, sizeof(message_t)); + } else { + // the invalid buffer contents have been flushed and the radio is back in receive mode + } + } + + event void HalChipconControl.txStart(uint32_t timestamp) {} + event void HalChipconControl.txDone(uint32_t timestamp, error_t error) {} + + default event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { + return msg; + } +} diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/SendNotify.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/SendNotify.nc new file mode 100644 index 0000000000..0ea36c9b4e --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/SendNotify.nc @@ -0,0 +1,6 @@ +interface SendNotify { + /** + * A message is about to be sent. + */ + event void sending(message_t* msg); +} \ No newline at end of file diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/SendP.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/SendP.nc new file mode 100644 index 0000000000..086c0ab6bf --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/SendP.nc @@ -0,0 +1,259 @@ +#include "Assert.h" +#include "LowPowerListening.h" + +/** + * Provides the basic TinyOS Send interface on top of the Chipcon HAL layer. + * It expects the radio to appear to be always on, and in RX mode unless transmitting. + * Supports arbitrary length preambles for LPL and backs off until the channel is clear. + * Supports special handling of acknowledgement messages. + * Supports packet timestamping. + */ +module SendP { + provides { + interface StdControl; + interface Send; + interface SendNotify; + } + + uses { + interface HalChipconControl; + interface ChipconPacket; + interface Random; + interface Timer as BackoffTimer; + interface Timer as PreambleTimer; + interface PacketTimeStamp; + } +} + +implementation { + + #define JIFFIES_PER_MILLI 32 + #define MAX_PACKET_BITS ((PREAMBLE_BYTES + SYNC_BYTES + MAX_PACKET_LENGTH) * 8UL) + #define MAX_PACKET_DURATION ((MAX_PACKET_BITS * 1024 + 512)/BAUD_RATE) // add 512 (half a bit time) for rounding + + enum Backoff { + CCA_BACKOFF = CCA_SETTLING_TIME, // minimum backoff time; covers the time needed for CCA to settle after turning the radio on + END_OF_PACKET_BACKOFF = MAX_PACKET_DURATION, // time to extend the backoff when we hear the end of a packet, to not conflict with a reply packet + INITIAL_RANDOM_BACKOFF = 4, // initial upper bound on the random part of the backoff time + MAX_RANDOM_BACKOFF = 16, // maximum upper bound on the random part of the backoff time + }; + + message_t* message; + bool busy; + uint16_t backoffLimit; // backoff time upper bound + + // difference between calculated and actual packet duration + int16_t packetDurationAdjustment; + + /** + * Backoff for a fixed amount of time plus a random amount, + * which increases exponentially up to backoffLimit. + */ + void backoff(uint16_t fixed) { + uint16_t delay = fixed + (call Random.rand16() % backoffLimit); + call BackoffTimer.startOneShot(delay); + + // exponentially increase the backoff range, up to MAX_BACKOFF + backoffLimit *= 2; + if (backoffLimit > MAX_RANDOM_BACKOFF) backoffLimit = MAX_RANDOM_BACKOFF; + } + + /** + * Load packet into the TX FIFO. + */ + void writeData() { + uint8_t* data = (uint8_t*) call ChipconPacket.getHeader(message); + uint8_t length = call ChipconPacket.getPacketLength(message); + call HalChipconControl.write(data, length); + } + + void attemptTx() { + error_t error; + +#ifndef CHIPCON_ALLOW_GLOBAL_BROADCAST + // TODO: find cause of these packets + // check the address right before we send + assert((call ChipconPacket.getHeader(message))->dest != AM_BROADCAST_ADDR, ASSERT_CC_RXTX_BROADCAST); +#endif + + error = call HalChipconControl.tx(); + if (error == SUCCESS) { + uint16_t interval = (call ChipconPacket.getMetadata(message))->rxInterval; + if (interval == 0) { + // receiver always on, send immediately + writeData(); + } else { + // transmit preamble long enough to match the receiver's sleep interval + call PreambleTimer.startOneShot(interval + LPL_PREAMBLE_OVERLAP); + + // reset the interval field + (call ChipconPacket.getMetadata(message))->rxInterval = 0; + } + } else if (error == ERETRY || error == FAIL || error == EBUSY) { + backoff(CCA_BACKOFF); + } else if (error == EOFF) { + dbg("SendP", "%s N%u: %s: ERROR SendP TX with radio off\n", sim_time_string(), TOS_NODE_ID, __FUNCTION__); + signal HalChipconControl.txDone(0, EOFF); + } else { + assertSuccess(error, ASSERT_CANT_HAPPEN); + } + } + + /** + * Ack packets are sent without backoff + * and default preamble length. + */ + error_t sendAck() { + error_t error; + + // we may have to wait for calibration to finish + // this is rare and doesn't take long + do { + error = call HalChipconControl.tx(); + } while (error == ERETRY); + + if (error == SUCCESS) { + writeData(); + } + + // both EBUSY and FAIL indicate the packet was not sent, + // since we don't back off and retry + if (error == FAIL || error == EBUSY) { + return FAIL; + } + + // report other errors unchanged + return error; + } + + event void BackoffTimer.fired() { + // try again + attemptTx(); + } + + event void PreambleTimer.fired() { + // done sending preamble + writeData(); + } + + /** + * An ack message is indicated by the FLAG_ACK_REPLY flag in the header. + */ + bool isAck(message_t* msg) { + chipcon_header_t* header = call ChipconPacket.getHeader(msg); + return header->flags & FLAG_ACK_REPLY; + } + + command error_t Send.send(message_t* msg, uint8_t len) { + error_t error; + + if (busy) return EBUSY; + if (len > call Send.maxPayloadLength()) return ESIZE; + + message = msg; + call ChipconPacket.setPayloadLength(message, len); + + if (isAck(msg)) { + // special handling of acknowledgements, which are sent without backoff/CCA, but may fail + error = sendAck(); + } else { + // regular message + backoffLimit = INITIAL_RANDOM_BACKOFF; + attemptTx(); + + // will always be sent, eventually + error = SUCCESS; + } + + if (error == SUCCESS) { + busy = TRUE; + } + + return error; + } + + event void HalChipconControl.txStart(uint32_t timestamp) { + // Hal gives us a timestamp for the start of the packet, + // but the receiver timestamps the end of the packet. + // Assuming we are already in TX mode, writing the data will trigger sending the sync word + // which means the packet will end (number of bits / baud rate) seconds later. + // We assume we'll transmit the preamble, the sync word, /length/ data bytes and a CRC. + // Afterwards, we'll correct the adjustment based on the actual end of packet timestamp. + uint8_t bytes = PREAMBLE_BYTES + SYNC_BYTES + CRC_BYTES + call ChipconPacket.getPacketLength(message); + uint16_t bits = bytes * 8; + uint32_t duration = (bits * 1024UL * JIFFIES_PER_MILLI + 512) / BAUD_RATE + packetDurationAdjustment; + call PacketTimeStamp.set(message, timestamp + duration); + signal SendNotify.sending(message); + } + + event void HalChipconControl.txDone(uint32_t timestamp, error_t error) { + if (error == ERETRY) { + // FIFO underflow, try again + attemptTx(); + } else { + if (error == SUCCESS) { + // see how much our estimated end time was off from the actual end time and update our adjustment + uint32_t estimate = call PacketTimeStamp.timestamp(message) - packetDurationAdjustment; + packetDurationAdjustment = timestamp - estimate; +// platform_printf("txS: %lu %lu %d %d\n", call PacketTimeStamp.timestamp(message), timestamp, +// (int16_t) (timestamp - call PacketTimeStamp.timestamp(message)), packetDurationAdjustment); + } + + busy = FALSE; + signal Send.sendDone(message, error); + } + } + + /** + * We can cancel a message when it's still in backoff. + */ + command error_t Send.cancel(message_t* msg) { + if (msg == message && call BackoffTimer.isRunning()) { + call BackoffTimer.stop(); + busy = FALSE; + signal Send.sendDone(message, ECANCEL); + return SUCCESS; + } else { + return FAIL; + } + } + + command uint8_t Send.maxPayloadLength() { + // full payload length available + return TOSH_DATA_LENGTH; + } + + command void* Send.getPayload(message_t* msg, uint8_t len) { + if(len > call Send.maxPayloadLength()) { + return NULL; + } else { + return (void* COUNT_NOK(len))msg->data; + } + } + + /** + * Extend the backoff when we see the end of a packet + * so we don't conflict with a possible reply packet following it. + */ + event void HalChipconControl.rxWaiting(uint32_t timestamp) { + if (call BackoffTimer.isRunning()) { + backoff(END_OF_PACKET_BACKOFF); + } + } + + command error_t StdControl.start() { + return SUCCESS; + } + + command error_t StdControl.stop() { + if (busy && call BackoffTimer.isRunning()) { + // stop waiting and signal sendDone(EOFF) immediately + call BackoffTimer.stop(); + signal HalChipconControl.txDone(0, EOFF); + } + + return SUCCESS; + } + + default event void SendNotify.sending(message_t* msg) {} +} diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveC.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveC.nc new file mode 100644 index 0000000000..433071686c --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveC.nc @@ -0,0 +1,46 @@ +/** + * Wire up Send, Receive and Power modules to provide a minimal HIL stack. + */ +configuration SendReceiveC { + provides { + interface StdControl; + interface Receive; + interface Send; + interface SendNotify; + } +} + +implementation { + + components HalChipconControlC, ChipconPacketC; + + components SendP, RandomC, new TimerMilliC() as BackoffTimer, new TimerMilliC() as PreambleTimer; + SendP.Random -> RandomC; + SendP.BackoffTimer -> BackoffTimer; + SendP.PreambleTimer -> PreambleTimer; + SendP.ChipconPacket -> ChipconPacketC; + SendP.PacketTimeStamp -> ChipconPacketC; + SendP.HalChipconControl -> HalChipconControlC; + + components ReceiveP; + ReceiveP.Packet -> ChipconPacketC; + ReceiveP.ChipconPacket -> ChipconPacketC; + ReceiveP.PacketTimeStamp -> ChipconPacketC; + ReceiveP.HalChipconControl -> HalChipconControlC; + + components PowerP; + PowerP.HalChipconControl -> HalChipconControlC; + + components SendReceiveP; + SendReceiveP.SubControl -> PowerP; + SendReceiveP.SubControl -> SendP; + SendReceiveP.SubSend -> SendP; + SendReceiveP.SubReceive -> ReceiveP; + SendReceiveP.ChipconPacket -> ChipconPacketC; + + StdControl = SendReceiveP; + Receive = SendReceiveP; + Send = SendReceiveP; + SendNotify = SendP; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveP.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveP.nc new file mode 100644 index 0000000000..0c35f7c6d1 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveP.nc @@ -0,0 +1,118 @@ +/** + * Integrates the Send, Receive and Power paths to provide consistent access to the underlying radio. + */ +module SendReceiveP { + provides { + interface StdControl; + interface Send; + interface Receive; + } + + uses { + interface StdControl as SubControl; + interface Send as SubSend; + interface Receive as SubReceive; + interface ChipconPacket; + } +} + +implementation { + + bool on = FALSE; // tracks whether the radio is on or off + message_t* rxBuffer; // helps detect buffer swapping bugs + + /** + * Turn the radio on if it is not already on. + * @return SUCCESS + */ + command error_t StdControl.start() { + if (!on) call SubControl.start(); + on = TRUE; + return SUCCESS; + } + + /** + * Turn the radio off if it is not already off. + * @return SUCCESS + */ + command error_t StdControl.stop() { + if (on) { + call SubControl.stop(); + } + + on = FALSE; + return SUCCESS; + } + +#ifdef DEBUG_CHIPCON_RXTX + void print(message_t* msg, uint8_t len, char* s) { + uint8_t* data = (uint8_t*) call ChipconPacket.getHeader(msg); + uint8_t i; + + platform_printf("SR: %s:", s); + for (i = 0; i < len + sizeof(chipcon_header_t); i++) { + platform_printf(" %02X", data[i]); + } + + platform_printf("\n"); + } +#endif + + /** + * @see SendP.send() + * @return EOFF if the radio is off. + */ + command error_t Send.send(message_t* msg, uint8_t len) { +#ifdef DEBUG_CHIPCON_RXTX + print(msg, len, "TX"); +#endif + + // we can't detect all buffer swap errors, but someone using + // the current receive buffer for sending is definitely a problem + assert(msg != rxBuffer, ASSERT_CC_RXTX_BAD_TX_POINTER); + + if (!on) return EOFF; + return call SubSend.send(msg, len); + } + + /** + * Packet sent, radio is now in RX mode, so just deliver packet up the stack. + */ + event void SubSend.sendDone(message_t* msg, error_t error) { + signal Send.sendDone(msg, error); + } + + /** + * Packet received, radio is now in RX mode. Just pass the pointer up and back down the stack. + */ + event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { +#ifdef DEBUG_CHIPCON_RXTX + print(msg, len, "RX"); +#endif + + rxBuffer = signal Receive.receive(msg, payload, len); + return rxBuffer; + } + + /** + * Wire through. + */ + command error_t Send.cancel(message_t* msg) { + return call SubSend.cancel(msg); + } + + /** + * Wire through. + */ + command uint8_t Send.maxPayloadLength() { + return call SubSend.maxPayloadLength(); + } + + /** + * Wire through. + */ + command void* Send.getPayload(message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + +} diff --git a/tos/platforms/gnode/chips/ccpacket/spi/DedicatedResourceC.nc b/tos/platforms/gnode/chips/ccpacket/spi/DedicatedResourceC.nc new file mode 100644 index 0000000000..abcb555ef1 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/spi/DedicatedResourceC.nc @@ -0,0 +1,51 @@ +/** + * Resource implementation that just tracks whether it is owned or not, for a single owner. + */ +module DedicatedResourceC { + provides interface Resource; +} + +implementation { + + bool owned; + + task void grant() { + signal Resource.granted(); + } + + async command error_t Resource.request() { + atomic { + if (owned) return FAIL; + owned = TRUE; + post grant(); + } + + return SUCCESS; + } + + async command error_t Resource.immediateRequest() { + atomic { + if (owned) return FAIL; + owned = TRUE; + } + + return SUCCESS; + } + + async command error_t Resource.release() { + error_t error; + atomic { + error = owned ? SUCCESS : FAIL; + owned = FALSE; + } + + return error; + } + + async command bool Resource.isOwner() { + atomic return owned; + } + + default event void Resource.granted() {} + +} \ No newline at end of file diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc new file mode 100644 index 0000000000..2fa03c8036 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc @@ -0,0 +1,23 @@ +/** + * Use USCI B0 as SPI for the radio. + */ +configuration HplChipconHardwareSpiC { + provides { + interface Resource; + interface HplChipconSpi; + } +} + +implementation { + + components HplChipconSpiB0P as Spi, DedicatedResourceC, PlatformP; + Resource = DedicatedResourceC; + HplChipconSpi = Spi; + Spi.Init <- PlatformP.InitLevel[2]; + + components HplMsp430GeneralIOC as IO; + Spi.SIMO -> IO.UCB0SIMO; + Spi.SOMI -> IO.UCB0SOMI; + Spi.UCLK -> IO.UCB0CLK; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconPacketRadioC.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconPacketRadioC.nc new file mode 100644 index 0000000000..58fcc9bacc --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconPacketRadioC.nc @@ -0,0 +1,40 @@ +/** + * Provides the GPIO and SPI interface to a Chipcon radio. + */ +configuration HplChipconPacketRadioC { + provides { + interface Resource; + interface HplChipconSpi; + interface GeneralIO as SI; + interface GeneralIO as SO; + interface GeneralIO as Clock; + interface GeneralIO as CSn; + interface GeneralIO as G0; + interface GeneralIO as G2; + interface GpioInterrupt as G0Interrupt; + } +} + +implementation { + + #ifdef CHIPCON_SOFTWARE_SPI + #warning "Falling back to software SPI" + components HplChipconSoftwareSpiC as SpiC; + #else + components HplChipconHardwareSpiC as SpiC; + #endif + + components GeneralIOC; + + Resource = SpiC; + HplChipconSpi = SpiC; + + SI = GeneralIOC.GeneralIO[RADIO_SI]; + SO = GeneralIOC.GeneralIO[RADIO_SO]; + Clock = GeneralIOC.GeneralIO[RADIO_CLK]; + CSn = GeneralIOC.GeneralIO[RADIO_CSN]; + G0 = GeneralIOC.GeneralIO[RADIO_G0]; + G2 = GeneralIOC.GeneralIO[RADIO_G2]; + G0Interrupt = GeneralIOC.GpioInterrupt[RADIO_G0]; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc new file mode 100644 index 0000000000..fa1b7f6db2 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc @@ -0,0 +1,28 @@ +/** + * Provides a software implementation of the SPI protocol for use on MSP430 processors + * that do not have a hardware SPI bus. + */ +configuration HplChipconSoftwareSpiC { + provides { + interface Resource; + interface HplChipconSpi; + } +} + +implementation { + + components PlatformP, DedicatedResourceC, HplChipconSpiGenericP, HplChipconSoftwareSpiP as Spi, HplChipconPacketRadioC as Hpl; + + Resource = DedicatedResourceC; + HplChipconSpi = HplChipconSpiGenericP; + + HplChipconSpiGenericP.SpiByte -> Spi.SpiByte; + HplChipconSpiGenericP.WriteOnly -> Spi.WriteOnly; + HplChipconSpiGenericP.ReadOnly -> Spi.ReadOnly; + + Spi.MOSI -> Hpl.SI; + Spi.MISO -> Hpl.SO; + Spi.Clock -> Hpl.Clock; + Spi.Init <- PlatformP.InitLevel[2]; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiP.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiP.nc new file mode 100644 index 0000000000..506baf1890 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiP.nc @@ -0,0 +1,214 @@ +/** + * Provides a software implementation of the SPI protocol for use on MSP430 processors + * that do not have a hardware SPI bus. + * + * Provides normal read/write SpiByte, as well as faster read-only/write-only versions that + * save cycles by ignoring output and input, respectively. + */ +module HplChipconSoftwareSpiP { + provides { + interface Init; + interface SpiByte; + interface SpiByte as WriteOnly; + interface SpiByte as ReadOnly; + interface SpiPacket; + } + + uses { + interface GeneralIO as MOSI; + interface GeneralIO as MISO; + interface GeneralIO as Clock; + } +} + +implementation { + + enum { + B0 = 1 << 0, + B1 = 1 << 1, + B2 = 1 << 2, + B3 = 1 << 3, + B4 = 1 << 4, + B5 = 1 << 5, + B6 = 1 << 6, + B7 = 1 << 7, + }; + + bool owned = FALSE; + bool busy = FALSE; + + // these are protected by the busy flag + norace uint8_t* txBuffer; + norace uint8_t* rxBuffer; + norace uint16_t length; + norace uint16_t count; + + /** + * Initialise I/O pins. + */ + command error_t Init.init() { + call MISO.makeInput(); + call MOSI.makeOutput(); + call Clock.makeOutput(); + call Clock.clr(); + return SUCCESS; + } + + /** + * Send/receive a single bit. + */ + inline uint8_t sendBit(uint8_t bit) { + // data is read on the rising edge + + // falling edge + call Clock.clr(); + + // wiggle wiggle + if (bit) { + call MOSI.set(); + } else { + call MOSI.clr(); + } + + // rising edge + call Clock.set(); + + return call MISO.get(); + } + + /** + * Synchronous transmit and receive (can be in interrupt context) + * @param tx Byte to transmit + * @return the received byte + */ + async command uint8_t SpiByte.write(uint8_t tx) { + uint8_t rx = 0; + + // shifts are slow, x << n is generated by shifting by one, n times + // also, putting this in an atomic block means all the atomics in GpIO.set()/clr() + // get collapsed into it, resulting in fully inlined assembler (checked with objdump) + atomic { + rx |= sendBit(tx & B7); rx <<= 1; + rx |= sendBit(tx & B6); rx <<= 1; + rx |= sendBit(tx & B5); rx <<= 1; + rx |= sendBit(tx & B4); rx <<= 1; + rx |= sendBit(tx & B3); rx <<= 1; + rx |= sendBit(tx & B2); rx <<= 1; + rx |= sendBit(tx & B1); rx <<= 1; + rx |= sendBit(tx & B0); // don't shift after the last bit + call Clock.clr(); // idle low + } + + return rx; + } + + /** + * Faster, write only version of SpiByte.write(). Saves cycles by not reading the MISO pin + * and always returning 0. + * @param tx Byte to transmit + * @return 0 + */ + async command uint8_t WriteOnly.write(uint8_t tx) { + // putting this in an atomic block means all the atomics in GpIO.set()/clr() + // get collapsed into it, resulting in fully inlined assembler (checked with objdump) + + // falling edge, bit wiggle, rising edge + #define WRITE_BIT(x) call Clock.clr(); if (x) call MOSI.set(); else call MOSI.clr(); call Clock.set() + + atomic { + WRITE_BIT(tx & B7); + WRITE_BIT(tx & B6); + WRITE_BIT(tx & B5); + WRITE_BIT(tx & B4); + WRITE_BIT(tx & B3); + WRITE_BIT(tx & B2); + WRITE_BIT(tx & B1); + WRITE_BIT(tx & B0); + call Clock.clr(); + } + + return 0; + } + + /** + * Faster, read only version of SpiByte.read(). Saves cycles by not toggling the output pin. + * @param tx ignored + * @return the received byte + */ + async command uint8_t ReadOnly.write(uint8_t tx) { + uint8_t rx = 0; + + // shifts are slow, x << n is generated by shifting by one, n times + // also, putting this in an atomic block means all the atomics in GpIO.set()/clr() + // get collapsed into it, resulting in fully inlined assembler (checked with objdump) + + // falling edge, rising edge, read bit into x + #define READ_BIT(x) call Clock.clr(); call Clock.set(); x |= call MISO.get() + + atomic { + READ_BIT(rx); rx <<= 1; + READ_BIT(rx); rx <<= 1; + READ_BIT(rx); rx <<= 1; + READ_BIT(rx); rx <<= 1; + READ_BIT(rx); rx <<= 1; + READ_BIT(rx); rx <<= 1; + READ_BIT(rx); rx <<= 1; + READ_BIT(rx); // don't shift after the last bit + call Clock.clr(); + } + + return rx; + } + + /** + * Process /length/ bytes, one byte per run. + */ + task void send() { + uint8_t received = call SpiByte.write(txBuffer == NULL ? 0 : txBuffer[count]); + if (rxBuffer != NULL) rxBuffer[count] = received; + count++; + + if (count < length) { + post send(); + } else { + // we release the busy flag before signalling, so copy the pointers + uint8_t* tx = txBuffer; + uint8_t* rx = rxBuffer; + atomic busy = FALSE; + + signal SpiPacket.sendDone(tx, rx, length, SUCCESS); + } + } + + /** + * Send a message over the SPI bus. + * + * @param txBuf A pointer to the buffer to send over the bus. If this + * parameter is NULL, then the SPI will send zeroes. + * @param rxBuf A pointer to the buffer where received data should + * be stored. If this parameter is NULL, then the SPI will + * discard incoming bytes. + * @param len Length of the message. Note that non-NULL rxBuf and txBuf + * parameters must be AT LEAST as large as len, or the SPI + * will overflow a buffer. + * + * @return SUCCESS if the request was accepted for transfer + */ + async command error_t SpiPacket.send(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { + atomic { + if (busy) return EBUSY; + busy = TRUE; + } + + txBuffer = txBuf; + rxBuffer = rxBuf; + length = len; + count = 0; + + post send(); + return SUCCESS; + } + + default async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error) {} + +} diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpi.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpi.nc new file mode 100644 index 0000000000..01db0e6389 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpi.nc @@ -0,0 +1,28 @@ +interface HplChipconSpi { + /** + * Send a command strobe and return the chip status byte. + */ + command uint8_t strobe(uint8_t cmd); + + /** + * Read a register. + */ + command uint8_t readRegister(uint8_t reg); + + /** + * Write a register. + */ + command void writeRegister(uint8_t reg, uint8_t value); + + /** + * Burst read /len/ bytes into a buffer. + * The address should have the burst bit set. + */ + command void read(uint8_t addr, uint8_t* buffer, uint8_t len); + + /** + * Burst write /len/ bytes from a buffer. + * The address should have the burst bit set. + */ + command void write(uint8_t addr, uint8_t* buffer, uint8_t len); +} \ No newline at end of file diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiB0P.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiB0P.nc new file mode 100644 index 0000000000..a196bfba8a --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiB0P.nc @@ -0,0 +1,123 @@ +/** + * Provides an optimized hardware implementation of the SPI protocol using USCI B0, + * based on TI's example code (SLAA325 - http://www.ti.com/lit/zip/slaa325). + */ +module HplChipconSpiB0P { + provides { + interface Init; + interface HplChipconSpi; + } + + uses { + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as UCLK; + } +} + +implementation { + + // wait for TXBUF to become available + #define WAIT_TX_READY() while (!(IFG2 & UCB0TXIFG)) + + /** + * Configure the USCI. + */ + command error_t Init.init() { + // set USCI reset bit while configuring and clear it afterwards + UCB0CTL1 |= UCSWRST; + + // SPI master mode, 8 bit data, MSB first, phase = 1, polarity = 0 + UCB0CTL0 = UCSYNC + UCMST + UCMSB + UCCKPH; + + // clock from SMCLK, keep reset bit high + UCB0CTL1 = UCSSEL_2 + UCSWRST; + + // set clock divisor for "as fast as possible" + // note that a divisor of 1 is not allowed + UCB0BR0 = 2; + UCB0BR1 = 0; + + // clear reset bit after reconfiguration + UCB0CTL1 &= ~UCSWRST; + + // disable interrupts (we use polling) + IE2 &= ~(UCB0TXIE | UCB0RXIE); + + // switch I/O pins to SPI mode + call SIMO.selectModuleFunc(); + call SOMI.selectModuleFunc(); + call UCLK.selectModuleFunc(); + + return SUCCESS; + } + + command uint8_t HplChipconSpi.strobe(uint8_t strobe) { + uint8_t status; + WAIT_TX_READY(); + UCB0TXBUF = strobe; // send strobe + while (UCB0STAT & UCBUSY); // wait for TX to complete + status = UCB0RXBUF; // read chip status byte + return status; + } + + command uint8_t HplChipconSpi.readRegister(uint8_t reg) { + uint8_t value; + WAIT_TX_READY(); + UCB0TXBUF = reg; // send address + WAIT_TX_READY(); + UCB0TXBUF = 0; // dummy write so we can read data + while (UCB0STAT & UCBUSY); // wait for TX to complete + value = UCB0RXBUF; // read data + return value; + } + + command void HplChipconSpi.writeRegister(uint8_t reg, uint8_t value) { + WAIT_TX_READY(); + UCB0TXBUF = reg; // send address + WAIT_TX_READY(); + UCB0TXBUF = value; // send data + while (UCB0STAT & UCBUSY); // wait for TX to complete + } + + command void HplChipconSpi.read(uint8_t addr, uint8_t* buffer, uint8_t len) { + uint8_t i; + + WAIT_TX_READY(); + UCB0TXBUF = addr; // Send address + while (UCB0STAT & UCBUSY); // Wait for TX to complete + + atomic { + UCB0TXBUF = 0; // Dummy write to read 1st data byte + IFG2 &= ~UCB0RXIFG; // Clear flag + // Addr byte is now being TX'ed, with dummy byte to follow immediately after + while (!(IFG2&UCB0RXIFG)); // Wait for end of 1st data byte TX + } + + // First data byte now in RXBUF + for (i = 0; i < (len-1); i++) { + // this overlapping sequence only works reliably with interrupts disabled, + // because an interrupt between writing TX and reading the previous RX byte + // can cause the while loop to never end + atomic { + UCB0TXBUF = 0; // Initiate next data RX, meanwhile.. + buffer[i] = UCB0RXBUF; // Store data from last data RX + while (!(IFG2&UCB0RXIFG)); // Wait for RX to finish + } + } + + buffer[len-1] = UCB0RXBUF; // Store last RX byte in buffer + } + + command void HplChipconSpi.write(uint8_t addr, uint8_t* buffer, uint8_t len) { + uint8_t i; + WAIT_TX_READY(); + UCB0TXBUF = addr; // send address + for (i = 0; i < len; i++) { + WAIT_TX_READY(); + UCB0TXBUF = buffer[i]; // send data + } + + while (UCB0STAT & UCBUSY); // wait for TX to complete + } +} diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiGenericP.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiGenericP.nc new file mode 100644 index 0000000000..f686447357 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiGenericP.nc @@ -0,0 +1,47 @@ +/** + * Provides a generic implementation of the SPI protocol using an SpiByte provider. + */ +module HplChipconSpiGenericP { + provides { + interface HplChipconSpi; + } + + uses { + interface SpiByte; + interface SpiByte as WriteOnly; + interface SpiByte as ReadOnly; + } +} + +implementation { + + command uint8_t HplChipconSpi.strobe(uint8_t strobe) { + return call SpiByte.write(strobe); + } + + command uint8_t HplChipconSpi.readRegister(uint8_t reg) { + call WriteOnly.write(reg); + return call SpiByte.write(0); + } + + command void HplChipconSpi.writeRegister(uint8_t reg, uint8_t value) { + call WriteOnly.write(reg); + call WriteOnly.write(value); + } + + command void HplChipconSpi.read(uint8_t addr, uint8_t* buffer, uint8_t len) { + uint8_t i; + call WriteOnly.write(addr); + for (i = 0; i < len; i++) { + buffer[i] = call ReadOnly.write(0); + } + } + + command void HplChipconSpi.write(uint8_t addr, uint8_t* buffer, uint8_t len) { + uint8_t i; + call WriteOnly.write(addr); + for (i = 0; i < len; i++) { + call WriteOnly.write(buffer[i]); + } + } +} diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/ChipconTimeSyncMessageC.nc b/tos/platforms/gnode/chips/ccpacket/timesync/ChipconTimeSyncMessageC.nc new file mode 100644 index 0000000000..7cefdd83dd --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/timesync/ChipconTimeSyncMessageC.nc @@ -0,0 +1,55 @@ +#include "PacketTimeSync.h" + +configuration ChipconTimeSyncMessageC { + provides { + interface StdControl; + interface SplitControl; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface AMPacket; + interface Packet; + interface LowPowerListening; + interface PacketAcknowledgements; + + interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t]; + interface TimeSyncPacket as TimeSyncPacketMilli; + interface PacketTimeStamp as PacketTimeStampMilli; + + interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t] ; + interface TimeSyncPacket as TimeSyncPacket32khz; + interface PacketTimeStamp as PacketTimeStamp32khz; + } +} + +implementation { + + components PacketTimeSyncC, PacketTimeStampC, ActiveMessageC; + + StdControl = ActiveMessageC; + SplitControl = ActiveMessageC; + LowPowerListening = ActiveMessageC; + PacketAcknowledgements = ActiveMessageC; + + PacketTimeStampMilli = PacketTimeStampC; + PacketTimeStamp32khz = PacketTimeStampC; + + TimeSyncAMSendMilli = PacketTimeSyncC; + TimeSyncPacketMilli = PacketTimeSyncC; + + TimeSyncAMSend32khz = PacketTimeSyncC; + TimeSyncPacket32khz = PacketTimeSyncC; + + Receive = PacketTimeSyncC.Receive; + Snoop = PacketTimeSyncC.Snoop; + AMPacket = PacketTimeSyncC; + Packet = PacketTimeSyncC; + + // Only wire AM_TIMESYNCMSG if the application uses TimeSyncMessageC, + // or it would conflict with apps like BaseStation, which wire all AM types + // and cause fan-out of the Receive interface, which doesn't work. + components new AMSenderC(AM_TIMESYNCMSG); + PacketTimeSyncC.SubSend -> AMSenderC; + PacketTimeSyncC.SubReceive -> ActiveMessageC.Receive[AM_TIMESYNCMSG]; + PacketTimeSyncC.SubSnoop -> ActiveMessageC.Snoop[AM_TIMESYNCMSG]; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampC.nc b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampC.nc new file mode 100644 index 0000000000..c9a842a56b --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampC.nc @@ -0,0 +1,26 @@ +#include "PacketTimeSync.h" + +/** + * Handles conversion of 32 kHz timestamps to TMilli timestamps. + * Also wires through the 32 kHz version to have a single point of access. + */ +configuration PacketTimeStampC { + provides { + interface PacketTimeStamp as PacketTimeStampMilli; + interface PacketTimeStamp as PacketTimeStamp32khz; + } +} + +implementation { + + components PacketTimeStampP, ChipconPacketC; + + PacketTimeStampMilli = PacketTimeStampP; + PacketTimeStamp32khz = ChipconPacketC; + + components LocalTimeMilliC, LocalTime32khzC; + PacketTimeStampP.PacketTimeStamp32khz -> ChipconPacketC; + PacketTimeStampP.LocalTimeMilli -> LocalTimeMilliC; + PacketTimeStampP.LocalTime32khz -> LocalTime32khzC; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampP.nc b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampP.nc new file mode 100644 index 0000000000..05bf71c7c6 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampP.nc @@ -0,0 +1,45 @@ +module PacketTimeStampP { + provides { + interface PacketTimeStamp as PacketTimeStampMilli; + } + + uses { + interface PacketTimeStamp as PacketTimeStamp32khz; + interface LocalTime as LocalTimeMilli; + interface LocalTime as LocalTime32khz; + } +} + +implementation { + + // convert a timestamp (not a duration) in milliseconds to a time in 32khz ticks based on the local clocks + uint32_t millis2jiffies(uint32_t timestamp) { + uint32_t dtMilli = call LocalTimeMilli.get() - timestamp; + uint32_t dt32khz = dtMilli * 32; + return call LocalTime32khz.get() - dt32khz; + } + + // convert a timestamp (not a duration) in 32khz ticks to a time in milliseconds based on the local clocks + uint32_t jiffies2millis(uint32_t timestamp) { + uint32_t dt32khz = call LocalTime32khz.get() - timestamp; + uint32_t dtMilli = dt32khz / 32; + return call LocalTimeMilli.get() - dtMilli; + } + + async command bool PacketTimeStampMilli.isValid(message_t* msg) { + return call PacketTimeStamp32khz.isValid(msg); + } + + async command void PacketTimeStampMilli.clear(message_t* msg) { + call PacketTimeStamp32khz.clear(msg); + } + + async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg) { + return jiffies2millis(call PacketTimeStamp32khz.timestamp(msg)); + } + + async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value) { + call PacketTimeStamp32khz.set(msg, millis2jiffies(value)); + } + +} diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSync.h b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSync.h new file mode 100644 index 0000000000..865dc22295 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSync.h @@ -0,0 +1,13 @@ +#ifndef PACKET_TIMESYNC_H +#define PACKET_TIMESYNC_H + +#ifndef AM_TIMESYNCMSG +#define AM_TIMESYNCMSG 0x3D +#endif + +typedef nx_struct { + nx_am_id_t type; + nx_uint32_t eventTime; +} chipcon_timesync_header_t; + +#endif \ No newline at end of file diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncC.nc b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncC.nc new file mode 100644 index 0000000000..f6203db69b --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncC.nc @@ -0,0 +1,51 @@ +#include "PacketTimeSync.h" + +configuration PacketTimeSyncC { + provides { + interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t]; + interface TimeSyncPacket as TimeSyncPacketMilli; + + interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t] ; + interface TimeSyncPacket as TimeSyncPacket32khz; + + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface AMPacket; + interface Packet; + } + + uses { + interface AMSend as SubSend; + interface Receive as SubReceive; + interface Receive as SubSnoop; + } +} + +implementation { + + components PacketTimeSyncP, PacketTimeStampC; + + Receive = PacketTimeSyncP.Receive; + Snoop = PacketTimeSyncP.Snoop; + AMPacket = PacketTimeSyncP; + Packet = PacketTimeSyncP; + + SubSend = PacketTimeSyncP.SubSend; + SubReceive = PacketTimeSyncP.SubReceive; + SubSnoop = PacketTimeSyncP.SubSnoop; + + TimeSyncAMSendMilli = PacketTimeSyncP; + TimeSyncPacketMilli = PacketTimeSyncP; + + TimeSyncAMSend32khz = PacketTimeSyncP; + TimeSyncPacket32khz = PacketTimeSyncP; + + components ActiveMessageC, SendReceiveC, LocalTimeMilliC, LocalTime32khzC; + PacketTimeSyncP.SubAMPacket -> ActiveMessageC; + PacketTimeSyncP.SubPacket -> ActiveMessageC; + PacketTimeSyncP.PacketTimeStamp32khz -> PacketTimeStampC; + PacketTimeSyncP.SendNotify -> SendReceiveC; + PacketTimeSyncP.LocalTimeMilli -> LocalTimeMilliC; + PacketTimeSyncP.LocalTime32khz -> LocalTime32khzC; + +} diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncP.nc b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncP.nc new file mode 100644 index 0000000000..252a5054bf --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncP.nc @@ -0,0 +1,228 @@ +module PacketTimeSyncP { + provides { + interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; + interface TimeSyncPacket as TimeSyncPacket32khz; + + interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; + interface TimeSyncPacket as TimeSyncPacketMilli; + + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface Packet; + interface AMPacket; + } + + uses { + interface AMSend as SubSend; + interface Receive as SubReceive; + interface Receive as SubSnoop; + interface Packet as SubPacket; + interface AMPacket as SubAMPacket; + interface SendNotify; + interface PacketTimeStamp as PacketTimeStamp32khz; + interface LocalTime as LocalTimeMilli; + interface LocalTime as LocalTime32khz; + } +} + +implementation { + + #define HEADER_SIZE sizeof(chipcon_timesync_header_t) + + bool busy; + message_t* sending; + uint32_t txTime; + + chipcon_timesync_header_t* getHeader(message_t* msg) { + return (chipcon_timesync_header_t*) call SubPacket.getPayload(msg, call SubPacket.maxPayloadLength()); + } + + // convert a timestamp (not a duration) in milliseconds to a time in 32khz ticks based on the local clocks + uint32_t millis2jiffies(uint32_t timestamp) { + uint32_t dtMilli = call LocalTimeMilli.get() - timestamp; + uint32_t dt32khz = dtMilli * 32; + return call LocalTime32khz.get() - dt32khz; + } + + // convert a timestamp (not a duration) in 32khz ticks to a time in milliseconds based on the local clocks + uint32_t jiffies2millis(uint32_t timestamp) { + uint32_t dt32khz = call LocalTime32khz.get() - timestamp; + uint32_t dtMilli = dt32khz / 32; + return call LocalTimeMilli.get() - dtMilli; + } + + command error_t TimeSyncAMSend32khz.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t eventTime) { + chipcon_timesync_header_t* header; + error_t error; + + if (busy) return EBUSY; + + header = getHeader(msg); + header->type = id; + header->eventTime = TIMESTAMP_INVALID; + sending = msg; + txTime = eventTime; + error = call SubSend.send(addr, msg, len + HEADER_SIZE); + + if (error == SUCCESS) { + busy = TRUE; + } + + return error; + } + + command error_t TimeSyncAMSend32khz.cancel[am_id_t](message_t* msg) { + return call SubSend.cancel(msg); + } + + event void SubSend.sendDone(message_t* msg, error_t error) { + busy = FALSE; + + // we can't distinguish whether the message was sent through the T32khz or TMilli interface, so signal on both + signal TimeSyncAMSend32khz.sendDone[getHeader(msg)->type](msg, error); + signal TimeSyncAMSendMilli.sendDone[getHeader(msg)->type](msg, error); + } + + command uint8_t TimeSyncAMSend32khz.maxPayloadLength[am_id_t]() { + return call SubSend.maxPayloadLength() - HEADER_SIZE; + } + + command void* TimeSyncAMSend32khz.getPayload[am_id_t](message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len + HEADER_SIZE) + HEADER_SIZE; + } + + command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t eventTime) { + return call TimeSyncAMSend32khz.send[id](addr, msg, len, millis2jiffies(eventTime)); + } + + command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg) { + return call TimeSyncAMSend32khz.cancel[id](msg); + } + + command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]() { + return call TimeSyncAMSend32khz.maxPayloadLength[id](); + } + + command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* msg, uint8_t len) { + return call TimeSyncAMSend32khz.getPayload[id](msg, len); + } + + command bool TimeSyncPacket32khz.isValid(message_t* msg) { + return call SubAMPacket.type(msg) == AM_TIMESYNCMSG && + call TimeSyncPacket32khz.eventTime(msg) != TIMESTAMP_INVALID; + } + + command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg) { + chipcon_timesync_header_t* header = getHeader(msg); + return header->eventTime; + } + + command bool TimeSyncPacketMilli.isValid(message_t* msg) { + return call TimeSyncPacket32khz.isValid(msg); + } + + command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg) { + return jiffies2millis(call TimeSyncPacket32khz.eventTime(msg)); + } + + am_id_t received(message_t* msg) { + // convert "air time" to local time + chipcon_timesync_header_t* header = getHeader(msg); + header->eventTime = call PacketTimeStamp32khz.timestamp(msg) - header->eventTime; + return header->type; + } + + event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { + am_id_t type = received(msg); + return signal Receive.receive[type](msg, payload + HEADER_SIZE, len - HEADER_SIZE); + } + + event message_t* SubSnoop.receive(message_t* msg, void* payload, uint8_t len) { + am_id_t type = received(msg); + return signal Snoop.receive[type](msg, payload + HEADER_SIZE, len - HEADER_SIZE); + } + + event void SendNotify.sending(message_t* msg) { + // if it is our message being sent, put in the event time now that it is timestamped + if (msg == sending) { + chipcon_timesync_header_t* header = getHeader(sending); + header->eventTime = call PacketTimeStamp32khz.timestamp(sending) - txTime; + } + } + + // mostly wire-through of the Packet and AMPacket interfaces + command void Packet.clear(message_t* msg) { + call SubPacket.clear(msg); + } + + command void Packet.setPayloadLength(message_t* msg, uint8_t len) { + call SubPacket.setPayloadLength(msg, len + HEADER_SIZE); + } + + command uint8_t Packet.payloadLength(message_t* msg) { + return call SubPacket.payloadLength(msg) - HEADER_SIZE; + } + + command uint8_t Packet.maxPayloadLength() { + return call SubPacket.maxPayloadLength() - HEADER_SIZE; + } + + command void* Packet.getPayload(message_t* msg, uint8_t len) { + return call SubPacket.getPayload(msg, len + HEADER_SIZE); + } + + command am_addr_t AMPacket.address() { + return call SubAMPacket.address(); + } + + command am_group_t AMPacket.localGroup() { + return call SubAMPacket.localGroup(); + } + + command bool AMPacket.isForMe(message_t* msg) { + return call SubAMPacket.isForMe(msg) && call SubAMPacket.type(msg) == AM_TIMESYNCMSG; + } + + command am_addr_t AMPacket.destination(message_t* msg) { + return call SubAMPacket.destination(msg); + } + + command void AMPacket.setDestination(message_t* msg, am_addr_t addr) { + call SubAMPacket.setDestination(msg, addr); + } + + command am_addr_t AMPacket.source(message_t* msg) { + return call SubAMPacket.source(msg); + } + + command void AMPacket.setSource(message_t* msg, am_addr_t addr) { + call SubAMPacket.setSource(msg, addr); + } + + command am_id_t AMPacket.type(message_t* msg) { + return getHeader(msg)->type; + } + + command void AMPacket.setType(message_t* msg, am_id_t type) { + getHeader(msg)->type = type; + } + + command am_group_t AMPacket.group(message_t* msg) { + return call SubAMPacket.group(msg); + } + + command void AMPacket.setGroup(message_t* msg, am_group_t grp) { + call SubAMPacket.setGroup(msg, grp); + } + + default event message_t* Snoop.receive[am_id_t](message_t* msg, void* payload, uint8_t len) { + return msg; + } + + default event message_t* Receive.receive[am_id_t](message_t* msg, void* payload, uint8_t len) { + return msg; + } + + default event void TimeSyncAMSend32khz.sendDone[am_id_t](message_t* msg, error_t error) {} + default event void TimeSyncAMSendMilli.sendDone[am_id_t](message_t* msg, error_t error) {} +} diff --git a/tos/platforms/gnode/chips/msp430/StackGuardWatchDogC.nc b/tos/platforms/gnode/chips/msp430/StackGuardWatchDogC.nc new file mode 100644 index 0000000000..b7793d7c0e --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/StackGuardWatchDogC.nc @@ -0,0 +1,15 @@ +configuration StackGuardWatchDogC { + provides { + interface Init; + } +} + +implementation { + + components MainC, StackGuardWatchDogP, new TimerMilliC(); + + Init = StackGuardWatchDogP; + StackGuardWatchDogP.Boot -> MainC; + StackGuardWatchDogP.Timer -> TimerMilliC; + +} diff --git a/tos/platforms/gnode/chips/msp430/StackGuardWatchDogP.nc b/tos/platforms/gnode/chips/msp430/StackGuardWatchDogP.nc new file mode 100644 index 0000000000..975aa2ca9d --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/StackGuardWatchDogP.nc @@ -0,0 +1,115 @@ +/** + * Periodically checks for stack overflow and resets the watchdog. + * If a stack overflow is detected, an assertion is generated. + * + * Based on: + * http://osdir.com/ml/hardware.texas-instruments.msp430.gcc.cvs/2004-06/msg00011.html + */ +module StackGuardWatchDogP { + + provides interface Init; + + uses { + interface Boot; + interface Timer; + } + +} + +implementation { + + // we use a hardcoded number so we can compile with or without asserts + enum { + ASSERT_STACK_OVERFLOW = 1 + }; + + /** + * A constant that is unlikely to be a valid address/a value that occours in the code. + */ + #define STACK_GUARD_INIT 0xcf55 + + /** + * Access to the stack pointer. + */ + register void* __stackptr asm("r1"); + + /** + * Address after the last used byte of the last segment in RAM (defined by the linker). + */ + extern uint8_t _end __attribute__((C)) ; + + /** + * A pointer to __noinit_end, but aligned to a word boundary. + * If the stack would grow too large, this location would be overwritten. + */ + uint16_t* stackGuard; + + /** + * Initialize the stack checking mechanisms. + * - fill unused memory with a pattern for manual max stack depth evaluation + * - set up the stackGuard + */ + void stackProtectionInit() { + uint16_t* address; + + // align stackGuard to the nearest word boundary if _end is on an odd address + uint16_t p = (uint16_t) &_end; + stackGuard = (uint16_t*) (p + (p & 1)); + + // fill free memory with a pattern for debug purpose (see max stack depth) + for (address = stackGuard; address < (uint16_t*) __stackptr; address++){ + *address = 0x5aa5; + } + + // init stack guard + *stackGuard = STACK_GUARD_INIT; + } + + /** + * This checks for stack overflows. It will perform a device reset if there + * was an overflow. + * + * It cannot help if the stack overflow is huge and overwrites vital + * variables or exeeds the amount of RAM. But it works very well if important + * stuff is at the beginning in the RAM and less important data at the end. + * That way a log message could be printed, maybe even some error recovery + * done. However, the simplest and probably best thing to do, is perform + * a device reset. + */ + void stackCheck() { + if (*stackGuard != STACK_GUARD_INIT) { + // fatal error: the stack guard was altered -> stack overflow + // if assertions are enabled, use them; else, just reboot by tripping the watchdog +#ifdef assert + assert(FALSE, ASSERT_STACK_OVERFLOW); +#else + atomic WDTCTL = 0; +#endif + } + } + + /** + * Reset the watchdog timer. + */ + void resetWatchdog() { + atomic WDTCTL = WDT_ARST_1000; + } + + command error_t Init.init() { + // re-enable the watchdog as soon as possible + resetWatchdog(); + stackProtectionInit(); + return SUCCESS; + } + + event void Timer.fired() { + stackCheck(); + resetWatchdog(); + } + + event void Boot.booted() { + resetWatchdog(); + call Timer.startPeriodic(500); + } + +} diff --git a/tos/platforms/gnode/chips/msp430/flash/InternalFlashC.nc b/tos/platforms/gnode/chips/msp430/flash/InternalFlashC.nc new file mode 100644 index 0000000000..c734afcde9 --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/flash/InternalFlashC.nc @@ -0,0 +1,138 @@ +// $Id: InternalFlashC.nc,v 1.1 2007/07/11 00:42:57 razvanm Exp $ + +/* tab:4 + * + * + * "Copyright (c) 2000-2004 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + */ + +/** + * InternalFlashC.nc - Internal flash implementation for telos msp + * platform. On the msp, the flash must first be erased before a value + * can be written. However, the msp can only erase the flash at a + * segment granularity (128 bytes for the information section). This + * module allows transparent read/write of individual bytes to the + * information section by dynamically switching between the two + * provided segments in the information section. + * + * Valid address range is 0x1000 - 0x107E (0x107F is used to store the + * version number of the information segment). + * + * @author Jonathan Hui + * + * Reformatted and added needed atomic blocks. + * Added support for the 2xx flash memory layout. + * @author Michiel Konstapel + */ + +#include "Assert.h" + +module InternalFlashC { + provides interface InternalFlash; +} + +implementation { + + enum { + ASSERT_IFLASH_OUT_OF_BOUNDS = unique(UQ_ASSERT) + }; + + // the 1xx devices have two 128 byte segments, while the 2xx devices have four 64-byte segments, + // of which the last one (segment A) holds configuration data and is by default not erased + #ifdef __MSP430_HAS_FLASH2__ + #define IFLASH_SIZE 64 + #else + #define IFLASH_SIZE 128 + #endif + + enum { + IFLASH_OFFSET = 0x1000, + IFLASH_SEG0_VNUM_ADDR = IFLASH_OFFSET + IFLASH_SIZE - 1, + IFLASH_SEG1_VNUM_ADDR = IFLASH_OFFSET + IFLASH_SIZE + IFLASH_SIZE - 1, + IFLASH_INVALID_VNUM = -1, + }; + + uint8_t chooseSegment() { + int8_t vnum0 = *(int8_t*)IFLASH_SEG0_VNUM_ADDR; + int8_t vnum1 = *(int8_t*)IFLASH_SEG1_VNUM_ADDR; + if (vnum0 == IFLASH_INVALID_VNUM) + return 1; + else if (vnum1 == IFLASH_INVALID_VNUM) + return 0; + return ( (int8_t)(vnum0 - vnum1) < 0 ); + } + + command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) { + assert((uint16_t) addr + size < IFLASH_SIZE, ASSERT_IFLASH_OUT_OF_BOUNDS); + + // writing to flash must be done with interrupts disabled! + atomic { + volatile int8_t *newPtr; + int8_t *oldPtr; + int8_t *bufPtr = (int8_t*)buf; + int8_t version; + uint16_t i; + + addr += IFLASH_OFFSET; + newPtr = oldPtr = (int8_t*)IFLASH_OFFSET; + if (chooseSegment()) { + oldPtr += IFLASH_SIZE; + } + else { + addr += IFLASH_SIZE; + newPtr += IFLASH_SIZE; + } + + FCTL2 = FWKEY + FSSEL1 + FN2; + FCTL3 = FWKEY; // clear lock bit + FCTL1 = FWKEY + ERASE; // select erase operation + *newPtr = 0; // dummy write to erase the segment + FCTL1 = FWKEY + WRT; // select write operation + + for ( i = 0; i < IFLASH_SIZE-1; i++, newPtr++, oldPtr++ ) { + if ((uint16_t)newPtr < (uint16_t)addr || (uint16_t)addr+size <= (uint16_t)newPtr) + *newPtr = *oldPtr; + else + *newPtr = *bufPtr++; + } + version = *oldPtr + 1; + if (version == IFLASH_INVALID_VNUM) + version++; + *newPtr = version; + + FCTL1 = FWKEY; // clear write bit + FCTL3 = FWKEY + LOCK; // set lock bit + } + + return SUCCESS; + } + + command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) { + addr += IFLASH_OFFSET; + if (chooseSegment()) + addr += IFLASH_SIZE; + + memcpy(buf, addr, size); + + return SUCCESS; + } + +} diff --git a/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOC.nc b/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOC.nc new file mode 100644 index 0000000000..6bf2d4ba88 --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOC.nc @@ -0,0 +1,95 @@ +#include "msp430_ports.h" + +/** + * Provides GPIO and interrupts by number, i.e. port 1.5 is GeneralIO[15]. + * GeneralIO[00] and GeneralIO[01] are virtual (dummy) pins, initialized to a low (0) + * and high (1) level respectively. + */ +configuration Msp430GeneralIOC { + provides { + interface Init; + interface GeneralIO[uint8_t pin]; + interface GpioInterrupt[uint8_t pin]; + } +} + +implementation { + + components Msp430GeneralIOP; + Init = Msp430GeneralIOP; + + components + new DummyGeneralIOC(FALSE) as DummyLow, + new DummyGeneralIOC(TRUE) as DummyHigh; + + GeneralIO[00] = DummyLow; + GeneralIO[01] = DummyHigh; + GpioInterrupt[00] = DummyLow; + GpioInterrupt[01] = DummyHigh; + + components HplMsp430GeneralIOC as IO; + components HplMsp430InterruptC as Interrupts; + +#define IO_PORT(port) \ + IO_PORT_PIN(port, 0); \ + IO_PORT_PIN(port, 1); \ + IO_PORT_PIN(port, 2); \ + IO_PORT_PIN(port, 3); \ + IO_PORT_PIN(port, 4); \ + IO_PORT_PIN(port, 5); \ + IO_PORT_PIN(port, 6); \ + IO_PORT_PIN(port, 7) + +#define IO_PORT_PIN(port, pin) \ + components new Msp430GpioC() as GeneralIO ## port ## pin; \ + GeneralIO ## port ## pin -> IO.Port ## port ## pin; \ + GeneralIO[port ## pin] = GeneralIO ## port ## pin; + +#define INTERRUPT_PORT(port) \ + INTERRUPT_PORT_PIN(port, 0); \ + INTERRUPT_PORT_PIN(port, 1); \ + INTERRUPT_PORT_PIN(port, 2); \ + INTERRUPT_PORT_PIN(port, 3); \ + INTERRUPT_PORT_PIN(port, 4); \ + INTERRUPT_PORT_PIN(port, 5); \ + INTERRUPT_PORT_PIN(port, 6); \ + INTERRUPT_PORT_PIN(port, 7) + +#define INTERRUPT_PORT_PIN(port, pin) \ + components new Msp430InterruptC() as GpioInterrupt ## port ## pin; \ + GpioInterrupt ## port ## pin -> Interrupts.Port ## port ## pin; \ + GpioInterrupt[port ## pin] = GpioInterrupt ## port ## pin + +#ifdef MSP430_HAS_PORT_1 + IO_PORT(1); +#endif + +#ifdef MSP430_HAS_PORT_2 + IO_PORT(2); +#endif + +#ifdef MSP430_HAS_PORT_3 + IO_PORT(3); +#endif + +#ifdef MSP430_HAS_PORT_4 + IO_PORT(4); +#endif + +#ifdef MSP430_HAS_PORT_5 + IO_PORT(5); +#endif + +#ifdef MSP430_HAS_PORT_6 + IO_PORT(6); +#endif + +#ifdef MSP430_HAS_PORT_1 + INTERRUPT_PORT(1); +#endif + +#ifdef MSP430_HAS_PORT_2 + INTERRUPT_PORT(2); +#endif + +} diff --git a/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOP.nc b/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOP.nc new file mode 100644 index 0000000000..1480bce8c7 --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOP.nc @@ -0,0 +1,55 @@ +#include "msp430_ports.h" + +module Msp430GeneralIOP { + provides interface Init; +} + +implementation { + + /** + * Reset all of the ports to be input and using I/O functionality. + */ + command error_t Init.init() { + atomic { +#ifdef MSP430_HAS_PORT_1 + P1SEL = 0; + P1DIR = 0; + P1OUT = 0; + P1IE = 0; +#endif + +#ifdef MSP430_HAS_PORT_2 + P2SEL = 0; + P2DIR = 0; + P2OUT = 0; + P2IE = 0; +#endif + +#ifdef MSP430_HAS_PORT_3 + P3SEL = 0; + P3DIR = 0; + P3OUT = 0; +#endif + +#ifdef MSP430_HAS_PORT_4 + P4SEL = 0; + P4DIR = 0; + P4OUT = 0; +#endif + +#ifdef MSP430_HAS_PORT_5 + P5SEL = 0; + P5DIR = 0; + P5OUT = 0; +#endif + +#ifdef MSP430_HAS_PORT_6 + P6SEL = 0; + P6DIR = 0; + P6OUT = 0; +#endif + } + + return SUCCESS; + } +} diff --git a/tos/platforms/gnode/chips/msp430/pins/Msp430GpioC.nc b/tos/platforms/gnode/chips/msp430/pins/Msp430GpioC.nc new file mode 100644 index 0000000000..2451f0c27a --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/pins/Msp430GpioC.nc @@ -0,0 +1,53 @@ + +/* "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * Implementation of the general-purpose I/O abstraction + * for the TI MSP430 microcontroller. + * + * @author Joe Polastre + * @see Please refer to TEP 117 for more information about this component and its + * intended use. + * + * Added support for internal pullups/pulldowns. + * @author Michiel Konstapel + */ + +generic module Msp430GpioC() @safe() { + provides interface GeneralIO; + uses interface HplMsp430GeneralIO as HplGeneralIO; +} +implementation { + + async command void GeneralIO.set() { call HplGeneralIO.set(); } + async command void GeneralIO.clr() { call HplGeneralIO.clr(); } + async command void GeneralIO.toggle() { call HplGeneralIO.toggle(); } + async command bool GeneralIO.get() { return call HplGeneralIO.get(); } + async command void GeneralIO.makeInput() { call HplGeneralIO.makeInput(); } + async command bool GeneralIO.isInput() { return call HplGeneralIO.isInput(); } + async command void GeneralIO.makeOutput() { call HplGeneralIO.makeOutput(); } + async command bool GeneralIO.isOutput() { return call HplGeneralIO.isOutput(); } + + async command void GeneralIO.pullup() { call HplGeneralIO.setResistor(MSP430_PORT_RESISTOR_PULLUP); } + async command void GeneralIO.pulldown() { call HplGeneralIO.setResistor(MSP430_PORT_RESISTOR_PULLDOWN); } + async command void GeneralIO.highZ() { call HplGeneralIO.setResistor(MSP430_PORT_RESISTOR_OFF); } + +} diff --git a/tos/platforms/gnode/chips/msp430/pins/Msp430InterruptC.nc b/tos/platforms/gnode/chips/msp430/pins/Msp430InterruptC.nc new file mode 100644 index 0000000000..3632437fff --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/pins/Msp430InterruptC.nc @@ -0,0 +1,76 @@ + +/* "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * Implementation of the GPIO interrupt abstraction for + * the TI MSP430 microcontroller. + * + * @author Jonathan Hui + * @author Joe Polastre + * @see Please refer to TEP 117 for more information about this component and its + * intended use. + * + * @author Michiel Konstapel + * Add default event handler so interrupts can be left unwired (for GeneralIOC). + */ + +generic module Msp430InterruptC() @safe() { + + provides interface GpioInterrupt as Interrupt; + uses interface HplMsp430Interrupt as HplInterrupt; + +} + +implementation { + + error_t enable( bool rising ) { + atomic { + call Interrupt.disable(); + call HplInterrupt.edge( rising ); + call HplInterrupt.enable(); + } + return SUCCESS; + } + + async command error_t Interrupt.enableRisingEdge() { + return enable( TRUE ); + } + + async command error_t Interrupt.enableFallingEdge() { + return enable( FALSE ); + } + + async command error_t Interrupt.disable() { + atomic { + call HplInterrupt.disable(); + call HplInterrupt.clear(); + } + return SUCCESS; + } + + async event void HplInterrupt.fired() { + call HplInterrupt.clear(); + signal Interrupt.fired(); + } + + default async event void Interrupt.fired() {} + +} diff --git a/tos/platforms/gnode/chips/msp430/pins/msp430_ports.h b/tos/platforms/gnode/chips/msp430/pins/msp430_ports.h new file mode 100644 index 0000000000..2a69a74103 --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/pins/msp430_ports.h @@ -0,0 +1,30 @@ +#ifndef MSP430_PORTS_H +#define MSP430_PORTS_H + +// define unified names for the various ways of specifying available ports + +#if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) +#define MSP430_HAS_PORT_1 +#endif + +#if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) +#define MSP430_HAS_PORT_2 +#endif + +#if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) +#define MSP430_HAS_PORT_3 +#endif + +#if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__) +#define MSP430_HAS_PORT_4 +#endif + +#if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) +#define MSP430_HAS_PORT_5 +#endif + +#if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__) +#define MSP430_HAS_PORT_6 +#endif + +#endif diff --git a/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h b/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h new file mode 100644 index 0000000000..d753d9d7e9 --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h @@ -0,0 +1,69 @@ +/* -*- mode:c++; indent-tabs-mode: nil -*- + * Copyright (c) 2007, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitaet Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, + * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Specify the target cpu clock speed of your platform by overriding this file. + * + * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some + * platforms have an external high frequency oscilator to generate the SMCLK + * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These + * oscillators provide metric frequencies, but may not run in power down + * modes. Here, we need to switch the SMCLK source, which is easier if + * the external and thd DCO source frequency are the same. + * + * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) + * + * Support different clock speeds: define MCLK_MHZ to the speed you want (4 or 8 MHz). + * Timer A always runs at 1 MHz. + * @author Michiel Konstapel + */ + + +#ifndef MSP430DCOSPEC_H +#define MSP430DCOSPEC_H + +#define ACLK_HZ 32768U + +#ifndef MCLK_MHZ +#define MCLK_MHZ 8 +#endif + +#if MCLK_MHZ == 4 + #define TARGET_DCO_HZ 4194304UL + #define DIV_UIS 4 + #define SMCLK_MHZ 4 +#elif MCLK_MHZ == 8 + #define TARGET_DCO_HZ 8388608UL + #define DIV_UIS 8 + #define SMCLK_MHZ 8 +#else + #error "Unsupported MCLK_MHZ setting" +#endif + +#endif diff --git a/tos/platforms/gnode/chips/msp430/timer/Msp430Timer32khzMapC.nc b/tos/platforms/gnode/chips/msp430/timer/Msp430Timer32khzMapC.nc new file mode 100644 index 0000000000..05ed225b96 --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/timer/Msp430Timer32khzMapC.nc @@ -0,0 +1,75 @@ +//$Id: Msp430Timer32khzMapC.nc,v 1.4 2006/12/12 18:23:11 vlahan Exp $ + +/* "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz + * hardware timers on the MSP430 that are available for compile time allocation + * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. + * + * Platforms based on the MSP430 are encouraged to copy in and override this + * file, presenting only the hardware timers that are available for allocation + * on that platform. + * + * @author Cory Sharp + */ + +configuration Msp430Timer32khzMapC +{ + provides interface Msp430Timer[ uint8_t id ]; + provides interface Msp430TimerControl[ uint8_t id ]; + provides interface Msp430Compare[ uint8_t id ]; +} +implementation +{ + components Msp430TimerC; + + Msp430Timer[0] = Msp430TimerC.TimerB; + Msp430TimerControl[0] = Msp430TimerC.ControlB0; + Msp430Compare[0] = Msp430TimerC.CompareB0; + + Msp430Timer[1] = Msp430TimerC.TimerB; + Msp430TimerControl[1] = Msp430TimerC.ControlB1; + Msp430Compare[1] = Msp430TimerC.CompareB1; + + Msp430Timer[2] = Msp430TimerC.TimerB; + Msp430TimerControl[2] = Msp430TimerC.ControlB2; + Msp430Compare[2] = Msp430TimerC.CompareB2; + +#ifdef __MSP430_HAS_TB7__ + Msp430Timer[3] = Msp430TimerC.TimerB; + Msp430TimerControl[3] = Msp430TimerC.ControlB3; + Msp430Compare[3] = Msp430TimerC.CompareB3; + + Msp430Timer[4] = Msp430TimerC.TimerB; + Msp430TimerControl[4] = Msp430TimerC.ControlB4; + Msp430Compare[4] = Msp430TimerC.CompareB4; + + Msp430Timer[5] = Msp430TimerC.TimerB; + Msp430TimerControl[5] = Msp430TimerC.ControlB5; + Msp430Compare[5] = Msp430TimerC.CompareB5; + + Msp430Timer[6] = Msp430TimerC.TimerB; + Msp430TimerControl[6] = Msp430TimerC.ControlB6; + Msp430Compare[6] = Msp430TimerC.CompareB6; +#endif +} + diff --git a/tos/platforms/gnode/chips/msp430/timer/Msp430TimerC.nc b/tos/platforms/gnode/chips/msp430/timer/Msp430TimerC.nc new file mode 100644 index 0000000000..77a5101d55 --- /dev/null +++ b/tos/platforms/gnode/chips/msp430/timer/Msp430TimerC.nc @@ -0,0 +1,170 @@ + +/* "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * @author Cory Sharp + */ + +configuration Msp430TimerC +{ + provides interface Msp430Timer as TimerA; + provides interface Msp430TimerControl as ControlA0; + provides interface Msp430TimerControl as ControlA1; + provides interface Msp430TimerControl as ControlA2; + provides interface Msp430Compare as CompareA0; + provides interface Msp430Compare as CompareA1; + provides interface Msp430Compare as CompareA2; + provides interface Msp430Capture as CaptureA0; + provides interface Msp430Capture as CaptureA1; + provides interface Msp430Capture as CaptureA2; + + provides interface Msp430Timer as TimerB; + provides interface Msp430TimerControl as ControlB0; + provides interface Msp430TimerControl as ControlB1; + provides interface Msp430TimerControl as ControlB2; + provides interface Msp430Compare as CompareB0; + provides interface Msp430Compare as CompareB1; + provides interface Msp430Compare as CompareB2; + provides interface Msp430Capture as CaptureB0; + provides interface Msp430Capture as CaptureB1; + provides interface Msp430Capture as CaptureB2; + +#ifdef __MSP430_HAS_TB7__ + provides interface Msp430TimerControl as ControlB3; + provides interface Msp430TimerControl as ControlB4; + provides interface Msp430TimerControl as ControlB5; + provides interface Msp430TimerControl as ControlB6; + provides interface Msp430Compare as CompareB3; + provides interface Msp430Compare as CompareB4; + provides interface Msp430Compare as CompareB5; + provides interface Msp430Compare as CompareB6; + provides interface Msp430Capture as CaptureB3; + provides interface Msp430Capture as CaptureB4; + provides interface Msp430Capture as CaptureB5; + provides interface Msp430Capture as CaptureB6; +#endif +} +implementation +{ + components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE, + TASSEL0, TASSEL1, FALSE ) as Msp430TimerA + , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE, + TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB + , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0 + , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1 + , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2 + , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0 + , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1 + , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2 +#ifdef __MSP430_HAS_TB7__ + , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3 + , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4 + , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5 + , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6 +#endif + , Msp430TimerCommonP as Common + ; + + // Timer A + TimerA = Msp430TimerA.Timer; + Msp430TimerA.Overflow -> Msp430TimerA.Event[5]; + Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0; + Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1; + + // Timer A0 + ControlA0 = Msp430TimerA0.Control; + CompareA0 = Msp430TimerA0.Compare; + CaptureA0 = Msp430TimerA0.Capture; + Msp430TimerA0.Timer -> Msp430TimerA.Timer; + Msp430TimerA0.Event -> Msp430TimerA.Event[0]; + + // Timer A1 + ControlA1 = Msp430TimerA1.Control; + CompareA1 = Msp430TimerA1.Compare; + CaptureA1 = Msp430TimerA1.Capture; + Msp430TimerA1.Timer -> Msp430TimerA.Timer; + Msp430TimerA1.Event -> Msp430TimerA.Event[1]; + + // Timer A2 + ControlA2 = Msp430TimerA2.Control; + CompareA2 = Msp430TimerA2.Compare; + CaptureA2 = Msp430TimerA2.Capture; + Msp430TimerA2.Timer -> Msp430TimerA.Timer; + Msp430TimerA2.Event -> Msp430TimerA.Event[2]; + + // Timer B + TimerB = Msp430TimerB.Timer; + Msp430TimerB.Overflow -> Msp430TimerB.Event[7]; + Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0; + Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1; + + // Timer B0 + ControlB0 = Msp430TimerB0.Control; + CompareB0 = Msp430TimerB0.Compare; + CaptureB0 = Msp430TimerB0.Capture; + Msp430TimerB0.Timer -> Msp430TimerB.Timer; + Msp430TimerB0.Event -> Msp430TimerB.Event[0]; + + // Timer B1 + ControlB1 = Msp430TimerB1.Control; + CompareB1 = Msp430TimerB1.Compare; + CaptureB1 = Msp430TimerB1.Capture; + Msp430TimerB1.Timer -> Msp430TimerB.Timer; + Msp430TimerB1.Event -> Msp430TimerB.Event[1]; + + // Timer B2 + ControlB2 = Msp430TimerB2.Control; + CompareB2 = Msp430TimerB2.Compare; + CaptureB2 = Msp430TimerB2.Capture; + Msp430TimerB2.Timer -> Msp430TimerB.Timer; + Msp430TimerB2.Event -> Msp430TimerB.Event[2]; + +#ifdef __MSP430_HAS_TB7__ + // Timer B3 + ControlB3 = Msp430TimerB3.Control; + CompareB3 = Msp430TimerB3.Compare; + CaptureB3 = Msp430TimerB3.Capture; + Msp430TimerB3.Timer -> Msp430TimerB.Timer; + Msp430TimerB3.Event -> Msp430TimerB.Event[3]; + + // Timer B4 + ControlB4 = Msp430TimerB4.Control; + CompareB4 = Msp430TimerB4.Compare; + CaptureB4 = Msp430TimerB4.Capture; + Msp430TimerB4.Timer -> Msp430TimerB.Timer; + Msp430TimerB4.Event -> Msp430TimerB.Event[4]; + + // Timer B5 + ControlB5 = Msp430TimerB5.Control; + CompareB5 = Msp430TimerB5.Compare; + CaptureB5 = Msp430TimerB5.Capture; + Msp430TimerB5.Timer -> Msp430TimerB.Timer; + Msp430TimerB5.Event -> Msp430TimerB.Event[5]; + + // Timer B6 + ControlB6 = Msp430TimerB6.Control; + CompareB6 = Msp430TimerB6.Compare; + CaptureB6 = Msp430TimerB6.Capture; + Msp430TimerB6.Timer -> Msp430TimerB.Timer; + Msp430TimerB6.Event -> Msp430TimerB.Event[6]; +#endif +} + diff --git a/tos/platforms/gnode/hardware.h b/tos/platforms/gnode/hardware.h new file mode 100644 index 0000000000..8f6f29b03b --- /dev/null +++ b/tos/platforms/gnode/hardware.h @@ -0,0 +1,27 @@ +#ifndef _H_hardware_h +#define _H_hardware_h +#include "msp430hardware.h" + +#define RADIO_SI 31 +#define RADIO_SO 32 +#define RADIO_CLK 33 +#define RADIO_CSN 23 +#define RADIO_G0 24 +#define RADIO_G2 25 + +#define LED_GREEN 17 +#define LED_YELLOW 20 +#define LED_RED 21 + +#define FLASH_POWER 43 +#define FLASH_CSN 42 +#define FLASH_SCK 41 +#define FLASH_MOSI 40 +#define FLASH_MISO 27 + +#define SRAM_CSN 47 +#define SRAM_SCK 45 +#define SRAM_MOSI 44 +#define SRAM_MISO 46 + +#endif diff --git a/tos/platforms/gnode/interfaces/GeneralIO.nc b/tos/platforms/gnode/interfaces/GeneralIO.nc new file mode 100644 index 0000000000..57cd5ae6c0 --- /dev/null +++ b/tos/platforms/gnode/interfaces/GeneralIO.nc @@ -0,0 +1,44 @@ +// $Id: GeneralIO.nc,v 1.4 2006/12/12 18:23:14 vlahan Exp $ + +/* "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement + * is hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY + * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * @author Joe Polastre + * + * Added support for internal pullups/pulldowns. + * @author Michiel Konstapel + * + */ + +interface GeneralIO +{ + async command void set(); + async command void clr(); + async command void toggle(); + async command bool get(); + async command void makeInput(); + async command bool isInput(); + async command void makeOutput(); + async command bool isOutput(); + async command void pullup(); + async command void pulldown(); + async command void highZ(); +} diff --git a/tos/platforms/gnode/lib/assert/Assert.h b/tos/platforms/gnode/lib/assert/Assert.h new file mode 100644 index 0000000000..9b431e200c --- /dev/null +++ b/tos/platforms/gnode/lib/assert/Assert.h @@ -0,0 +1,15 @@ +#ifndef ASSERT_H +#define ASSERT_H + +// define the unique() key for generating unique assertion identifiers +#define UQ_ASSERT "Assert" + +enum PredefinedAssertions { + ASSERT_UNUSED = unique(UQ_ASSERT), + ASSERT_RESERVED1 = unique(UQ_ASSERT), + ASSERT_RESERVED2 = unique(UQ_ASSERT), + ASSERT_RESERVED3 = unique(UQ_ASSERT), + ASSERT_CANT_HAPPEN = unique(UQ_ASSERT), +}; + +#endif diff --git a/tos/platforms/gnode/lib/assert/AssertReboot.h b/tos/platforms/gnode/lib/assert/AssertReboot.h new file mode 100644 index 0000000000..b28d7c08c8 --- /dev/null +++ b/tos/platforms/gnode/lib/assert/AssertReboot.h @@ -0,0 +1,9 @@ +#ifndef ASSERTREBOOT_H +#define ASSERTREBOOT_H + +#define assert(condition, output) doAssert((condition), (output)) +#define assertNot(condition, output) doAssertNot((condition), (output)) +#define assertSuccess(error, output) doAssertSuccess((error), (output)) +#define assertEquals(a, b, output) doAssertEquals((a), (b), (output)) + +#endif diff --git a/tos/platforms/gnode/lib/assert/AssertRebootC.nc b/tos/platforms/gnode/lib/assert/AssertRebootC.nc new file mode 100644 index 0000000000..8d2bd5125b --- /dev/null +++ b/tos/platforms/gnode/lib/assert/AssertRebootC.nc @@ -0,0 +1,15 @@ +#include "AssertReboot.h" + +/** + * Handles failed assertions by rebooting the node. + */ +configuration AssertRebootC {} + + +implementation { + + components AssertRebootP, RebootC; + + AssertRebootP.Reboot -> RebootC; + +} diff --git a/tos/platforms/gnode/lib/assert/AssertRebootP.nc b/tos/platforms/gnode/lib/assert/AssertRebootP.nc new file mode 100644 index 0000000000..f46413a9e9 --- /dev/null +++ b/tos/platforms/gnode/lib/assert/AssertRebootP.nc @@ -0,0 +1,39 @@ +/** + * Handles failed assertions by rebooting the node. + */ +module AssertRebootP { + uses { + interface Reboot; + } +} +implementation { + + /** + * Assert a condition is true. + */ + void doAssert(bool condition, uint16_t errorCode) __attribute__((C)) { + if (!condition) call Reboot.reboot(); + } + + /** + * Assert a condition is false. + */ + void doAssertNot(bool condition, uint16_t errorCode) __attribute__((C)) { + doAssert(!condition, errorCode); + } + + /** + * Assert an error code is SUCCESS. + */ + void doAssertSuccess(error_t error, uint16_t errorCode) __attribute__((C)) { + doAssert(error == SUCCESS, errorCode); + } + + /** + * Assert a equals b. + */ + void doAssertEquals(uint32_t a, uint32_t b, uint16_t errorCode) __attribute__((C)) { + doAssert(a == b, errorCode); + } + +} diff --git a/tos/platforms/gnode/lib/assert/AssertUart.h b/tos/platforms/gnode/lib/assert/AssertUart.h new file mode 100644 index 0000000000..9d0623eeaa --- /dev/null +++ b/tos/platforms/gnode/lib/assert/AssertUart.h @@ -0,0 +1,23 @@ +#ifndef ASSERTUART_H +#define ASSERTUART_H + +// preprocessor magic to get __LINE__ as a string, from +// http://www.decompile.com/cpp/faq/file_and_line_error_string.htm +#define STRINGIFY(x) #x +#define TOSTRING(x) STRINGIFY(x) + +// Long paths in __FILE__ file names may use excessive amounts +// of memory (either ROM or both ROM and RAM, depending on your compiler) +// so this define allows you to switch file names on and off. +#ifdef ASSERT_UART_EXCLUDE_FILE_NAME +#define SOURCE_LOCATION "line " TOSTRING(__LINE__) +#else +#define SOURCE_LOCATION __FILE__ ":" TOSTRING(__LINE__) +#endif + +#define assert(condition, output) doAssert((condition), (output), #condition, #output, SOURCE_LOCATION) +#define assertNot(condition, output) doAssertNot((condition), (output), #condition " != FALSE", #output, SOURCE_LOCATION) +#define assertSuccess(err, output) doAssertSuccess((err), (output), #err " != SUCCESS", #output, SOURCE_LOCATION) +#define assertEquals(a, b, output) doAssertEquals((a), (b), (output), #a, #b, #output, SOURCE_LOCATION) + +#endif diff --git a/tos/platforms/gnode/lib/assert/AssertUartC.nc b/tos/platforms/gnode/lib/assert/AssertUartC.nc new file mode 100644 index 0000000000..dd6863218d --- /dev/null +++ b/tos/platforms/gnode/lib/assert/AssertUartC.nc @@ -0,0 +1,24 @@ +#include "AssertUart.h" + +/** + * Outputs failed assertions by repeatedly writing a message to the UART. + * After N messages, reboot the node. This can be suppressed by defining + * ASSERT_UART_NO_REBOOT. + */ +configuration AssertUartC { + uses interface PrintfFlush; +} + +implementation { + + components AssertUartP, PlatformSerialC, BusyWaitMicroC, LedsC, RebootC; + + PrintfFlush = AssertUartP; + AssertUartP.UartControl -> PlatformSerialC; + AssertUartP.UartByte -> PlatformSerialC; + AssertUartP.UartStream -> PlatformSerialC; + AssertUartP.BusyWait -> BusyWaitMicroC; + AssertUartP.Leds -> LedsC; + AssertUartP.Reboot -> RebootC; + +} diff --git a/tos/platforms/gnode/lib/assert/AssertUartP.nc b/tos/platforms/gnode/lib/assert/AssertUartP.nc new file mode 100644 index 0000000000..c9e86a9a02 --- /dev/null +++ b/tos/platforms/gnode/lib/assert/AssertUartP.nc @@ -0,0 +1,126 @@ +module AssertUartP { + uses { + interface AsyncStdControl as UartControl; + interface UartByte; + interface UartStream; + interface BusyWait; + interface PrintfFlush; + interface Leds; + interface Reboot; + } +} +implementation { + + #define COUNTDOWN_FROM 10 + + extern int sprintf (char * str, const char * format, ...) @C(); + + void print(const char* s) { + uint16_t i; + for (i = 0; i < strlen(s); i++) { + call UartByte.send(s[i]); + } + } + + void assertOutput(uint16_t errorCode, const char* strCondition, const char* description, const char* location) { + atomic { + uint8_t countdown = COUNTDOWN_FROM; + + char nodeID[8]; + sprintf(nodeID, "%u", TOS_NODE_ID); + + call Leds.led0On(); + call UartControl.start(); + call PrintfFlush.flush(); + + while (1) { + uint16_t i; + print("Assert failed on node "); + print(nodeID); + print("! "); + print(location); + print(": "); + print(description); + print(": "); + print(strCondition); + print("\r\n"); + for (i = 0; i < 1000; i++) { +#ifdef _H_msp430hardware_h + // reset the MSP430 watchdog since StackGuard can't + atomic WDTCTL = WDT_ARST_1000; +#endif + call Leds.led0Toggle(); + call BusyWait.wait(3000); + } + + countdown--; + if (countdown == 0) { +#ifdef ASSERT_UART_NO_REBOOT + #warning AssertUart will not reboot! +#else + print("Rebooting\n\n"); + call BusyWait.wait(10000); // allow last character to leave the UART + call Reboot.reboot(); +#endif + } + } + } + } + + /** + * Assert a condition is true. + */ + void doAssert(bool condition, uint16_t errorCode, const char* strCondition, const char* description, const char* location) @C() { + if (!condition) assertOutput(errorCode, strCondition, description, location); + } + + /** + * Assert a condition is false. + */ + void doAssertNot(bool condition, uint16_t errorCode, const char* strCondition, const char* description, const char* location) @C() { + doAssert(!condition, errorCode, strCondition, description, location); + } + + /** + * Assert an error code is SUCCESS. + */ + void doAssertSuccess(error_t error, uint16_t errorCode, const char* strCondition, const char* description, const char* location) @C() { + if (error != SUCCESS) { + char buffer[80]; + char* errors[] = { + "SUCCESS", + "FAIL", + "ESIZE", + "ECANCEL", + "EOFF", + "EBUSY", + "EINVAL", + "ERETRY", + "ERESERVE", + "EALREADY", + }; + + sprintf(buffer, "%s (%s) != SUCCESS", strCondition, errors[error]); + assertOutput(errorCode, buffer, description, location); + } + } + + /** + * Assert that a equals b. + */ + void doAssertEquals(uint32_t a, uint32_t b, uint16_t errorCode, const char* strA, const char* strB, const char* description, const char* location) @C() { + if (a != b) { + char buffer[80]; + sprintf(buffer, "%s (%lu) != %s (%lu)", strA, a, strB, b); + assertOutput(errorCode, buffer, description, location); + } + } + + async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t error) {} + async event void UartStream.receivedByte(uint8_t byte) {} + async event void UartStream.receiveDone(uint8_t* buf, uint16_t len, error_t error) {} + + default async command void PrintfFlush.flush() { + print("\n+++\nflush not connected\n+++\n"); + } +} diff --git a/tos/platforms/gnode/lib/assert/Reboot.nc b/tos/platforms/gnode/lib/assert/Reboot.nc new file mode 100644 index 0000000000..d66a6630fe --- /dev/null +++ b/tos/platforms/gnode/lib/assert/Reboot.nc @@ -0,0 +1,10 @@ +/** + * Reboot the node. + */ +interface Reboot { + + /** + * Reboot the node. + */ + async command void reboot(); +} diff --git a/tos/platforms/gnode/lib/assert/RebootC.nc b/tos/platforms/gnode/lib/assert/RebootC.nc new file mode 100644 index 0000000000..493dd0c0fe --- /dev/null +++ b/tos/platforms/gnode/lib/assert/RebootC.nc @@ -0,0 +1,13 @@ +/** + * Reboots the node by tripping the watchdog timer. + */ +module RebootC { + provides interface Reboot; +} + +implementation { + + async command void Reboot.reboot() { + atomic WDTCTL = 0; + } +} diff --git a/tos/platforms/gnode/lib/printf/NoPrintfC.nc b/tos/platforms/gnode/lib/printf/NoPrintfC.nc new file mode 100644 index 0000000000..6b305a0d65 --- /dev/null +++ b/tos/platforms/gnode/lib/printf/NoPrintfC.nc @@ -0,0 +1,7 @@ +#include "noprintf.h" + +/** + * Dummy component that just includes noprintf.h to make printf() a no-op. + */ +configuration NoPrintfC {} +implementation {} diff --git a/tos/platforms/gnode/lib/printf/OutputStream.nc b/tos/platforms/gnode/lib/printf/OutputStream.nc new file mode 100644 index 0000000000..37e6c6f29e --- /dev/null +++ b/tos/platforms/gnode/lib/printf/OutputStream.nc @@ -0,0 +1,4 @@ +interface OutputStream { + command error_t write(uint8_t* buf, uint16_t len); + event void writeDone(error_t error); +} \ No newline at end of file diff --git a/tos/platforms/gnode/lib/printf/PrintfC.nc b/tos/platforms/gnode/lib/printf/PrintfC.nc new file mode 100644 index 0000000000..d9ab64c847 --- /dev/null +++ b/tos/platforms/gnode/lib/printf/PrintfC.nc @@ -0,0 +1,20 @@ +#include "printf.h" + +/** + * Include this component in your program to be able to use printf() to write to the UART. + * printf() is declared in printf.h, which this component includes. If your component is processed + * prior to PrintfC, you may need to include printf.h yourself. + */ +generic configuration PrintfC(uint16_t bufsize) { + provides interface PrintfFlush; +} + +implementation { + components new PrintfP(bufsize), PutcharC, UartOutputStreamC, PlatformSerialC; + + PrintfFlush = PrintfP; + + PrintfP.OutputStream -> UartOutputStreamC; + PrintfP.UartByte -> PlatformSerialC; + PrintfP.Putchar -> PutcharC; +} diff --git a/tos/platforms/gnode/lib/printf/PrintfFlush.nc b/tos/platforms/gnode/lib/printf/PrintfFlush.nc new file mode 100644 index 0000000000..28d29d39b8 --- /dev/null +++ b/tos/platforms/gnode/lib/printf/PrintfFlush.nc @@ -0,0 +1,3 @@ +interface PrintfFlush { + async command void flush(); +} diff --git a/tos/platforms/gnode/lib/printf/PrintfP.nc b/tos/platforms/gnode/lib/printf/PrintfP.nc new file mode 100644 index 0000000000..c9d2d84dd7 --- /dev/null +++ b/tos/platforms/gnode/lib/printf/PrintfP.nc @@ -0,0 +1,128 @@ +#include "Assert.h" + +/** + * Captures output from printf() and puts characters into a buffer, + * which is then written to the UART. + */ +generic module PrintfP(uint16_t bufsize) { + + provides { + interface PrintfFlush; + } + + uses { + interface OutputStream; + interface UartByte; + interface Putchar; + } +} + +implementation { + + #define OVERFLOW_WARNING "\r\n* WARNING: printf() buffer overflow\r\n" + + uint8_t buffer[bufsize]; + uint16_t start; // start of unsent data in buffer + uint16_t length; // number of unsent bytes in buffer + uint16_t sendingLength; // number of bytes currently being sent + bool overflow; // set if characters are dropped due to the buffer being full + bool busy; // set while sending + + enum { + ASSERT_PRINTF_SEND = unique(UQ_ASSERT), + ASSERT_PRINTF_SEND_DONE = unique(UQ_ASSERT), + ASSERT_PRINTF_OUT_OF_BOUNDS = unique(UQ_ASSERT), + }; + + void write(uint8_t* str, uint16_t len) { + error_t result = call OutputStream.write(str, len); + assertSuccess(result, ASSERT_PRINTF_SEND); + } + + task void send() { + atomic { + // make sure we have bytes to send before continuing, + // because an earlier run of the task may already have sent the entire buffer + // (and UartStream.send() returns FAIL when given 0 bytes to send) + if (busy || length == 0) return; + busy = TRUE; + + if (overflow) { + write((uint8_t*) OVERFLOW_WARNING, strlen(OVERFLOW_WARNING)); + overflow = FALSE; + sendingLength = 0; + } else { + if (start + length > bufsize) { + // send the chunk from start to the end of the buffer + sendingLength = bufsize - start; + write(&buffer[start], sendingLength); + } else { + // no wraparound, so we can send everything in one go + sendingLength = length; + write(&buffer[start], sendingLength); + } + } + } + } + + /** + * This is where printf() delivers its output. Put it in a buffer for subsequent sending. + */ + async event void Putchar.putchar(uint8_t c) { + atomic { + assert(start < bufsize, ASSERT_PRINTF_OUT_OF_BOUNDS); + assert(length <= bufsize, ASSERT_PRINTF_OUT_OF_BOUNDS); + + if (length == bufsize) { + overflow = TRUE; + } else { + buffer[(start + length) % bufsize] = c; + length++; + } + } + + post send(); + } + + void printNow(char* s, uint16_t len) { + uint16_t i; + for (i = 0; i < len; i++) { + call UartByte.send(s[i]); + } + } + + /** + * Hook for flushing the buffer, used by AssertUart. + */ + async command void PrintfFlush.flush() { + atomic { + if (busy) length += sendingLength; + printNow("\n+++\n", 5); + if (start + length > bufsize) { + printNow((char*) &buffer[start], bufsize - start); + printNow((char*) &buffer[0], length - (bufsize - start)); + } else { + printNow((char*) &buffer[start], length); + } + printNow("\n+++\n", 5); + } + } + + event void OutputStream.writeDone(error_t result) { + assertSuccess(result, ASSERT_PRINTF_SEND_DONE); + + atomic { + busy = FALSE; + length -= sendingLength; + start = (start + sendingLength) % bufsize; + if (length != 0) post send(); + } + } + +// async event void UartStream.receiveDone(uint8_t* buf, uint16_t len, error_t result) {} +// async event void UartStream.receivedByte(uint8_t byte) {} + + default async command error_t UartByte.send(uint8_t byte) { + return FAIL; + } +} diff --git a/tos/platforms/gnode/lib/printf/Putchar.nc b/tos/platforms/gnode/lib/printf/Putchar.nc new file mode 100644 index 0000000000..5cc75b9717 --- /dev/null +++ b/tos/platforms/gnode/lib/printf/Putchar.nc @@ -0,0 +1,6 @@ +/** + * A nesC wrapper for putchar(). + */ +interface Putchar { + async event void putchar(uint8_t c); +} diff --git a/tos/platforms/gnode/lib/printf/PutcharC.nc b/tos/platforms/gnode/lib/printf/PutcharC.nc new file mode 100644 index 0000000000..f62a39efab --- /dev/null +++ b/tos/platforms/gnode/lib/printf/PutcharC.nc @@ -0,0 +1,15 @@ +/** + * Provides a putchar() function for printf(). + */ + module PutcharC { + provides interface Putchar; +} + +implementation { + + int putchar(int c) @C() @spontaneous() { + signal Putchar.putchar((uint8_t) c); + return 0; + } + +} diff --git a/tos/platforms/gnode/lib/printf/UartOutputStreamC.nc b/tos/platforms/gnode/lib/printf/UartOutputStreamC.nc new file mode 100644 index 0000000000..ad7d183cf9 --- /dev/null +++ b/tos/platforms/gnode/lib/printf/UartOutputStreamC.nc @@ -0,0 +1,12 @@ +configuration UartOutputStreamC { + provides interface OutputStream; +} + +implementation { + components UartOutputStreamP, PlatformSerialC; + + OutputStream = UartOutputStreamP; + UartOutputStreamP.SerialControl -> PlatformSerialC; + UartOutputStreamP.UartStream -> PlatformSerialC; + +} diff --git a/tos/platforms/gnode/lib/printf/UartOutputStreamP.nc b/tos/platforms/gnode/lib/printf/UartOutputStreamP.nc new file mode 100644 index 0000000000..c17de36b5d --- /dev/null +++ b/tos/platforms/gnode/lib/printf/UartOutputStreamP.nc @@ -0,0 +1,42 @@ +#include "Assert.h" + +/** + * Output stream that writes data to a UART. + */ +module UartOutputStreamP { + + provides { + interface OutputStream; + } + + uses { + interface StdControl as SerialControl; + interface UartStream; + } +} + +implementation { + + bool started; // used to start PlatformSerialC on demand + + command error_t OutputStream.write(uint8_t* buf, uint16_t len) { + if (!started) { + call SerialControl.start(); + started = TRUE; + } + + return call UartStream.send(buf, len); + } + + task void sendDone() { + signal OutputStream.writeDone(SUCCESS); + } + + async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t result) { + post sendDone(); + } + + async event void UartStream.receiveDone(uint8_t* buf, uint16_t len, error_t result) {} + async event void UartStream.receivedByte(uint8_t byte) {} + +} diff --git a/tos/platforms/gnode/lib/printf/noprintf.h b/tos/platforms/gnode/lib/printf/noprintf.h new file mode 100644 index 0000000000..d5a2073c77 --- /dev/null +++ b/tos/platforms/gnode/lib/printf/noprintf.h @@ -0,0 +1,7 @@ +#ifndef NOPRINTF_H +#define NOPRINTF_H + +// define printf() to be a no-op +#define printf(...); + +#endif diff --git a/tos/platforms/gnode/lib/printf/printf.h b/tos/platforms/gnode/lib/printf/printf.h new file mode 100644 index 0000000000..5666e51ab4 --- /dev/null +++ b/tos/platforms/gnode/lib/printf/printf.h @@ -0,0 +1,7 @@ +#ifndef PRINTF_H +#define PRINTF_H + +extern int printf(const char * NTS __fmt, ...) __attribute__((C)); +#define platform_printf printf + +#endif diff --git a/tos/platforms/gnode/lib/spi/SoftwareSpi.txt b/tos/platforms/gnode/lib/spi/SoftwareSpi.txt new file mode 100644 index 0000000000..0cc06872b1 --- /dev/null +++ b/tos/platforms/gnode/lib/spi/SoftwareSpi.txt @@ -0,0 +1,38 @@ +Component: SoftwareSpi +Description: software SPI implementation + +Usage: +This implements the SpiPacket and SpiByte interfaces in software, using three general I/O pins. + +Clock polarity and phase +From http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus, which has a picture: + +In addition to setting the clock frequency, the master must also configure the clock polarity +and phase with respect to the data. Freescale's SPI Block Guide [1] names these two options +as CPOL and CPHA respectively, and most vendors have adopted that convention. + +At CPOL=0 the base value of the clock is zero +For CPHA=0, data are read on the clock's rising edge (low->high transition) and data are changed on a falling edge (high->low clock transition). +For CPHA=1, data are read on the clock's falling edge and data are changed on a rising edge. + +At CPOL=1 the base value of the clock is one (inversion of CPOL=0) +For CPHA=0, data are read on clock's falling edge and data are changed on a rising edge. +For CPHA=1, data are read on clock's rising edge and data are changed on a falling edge. + +That is, CPHA=0 means sample on the leading (first) clock edge, while CPHA=1 means sample +on the trailing (second) clock edge, regardless of whether that clock edge is rising or falling. +Note that with CPHA=0, the data must be stable for a half cycle before the first clock cycle. +Also, note that no matter what the CPOL and CPHA modes say, the initial clock value must be +stable before the chip select line goes active. + +Wiring: +Users of this component must connect the following: +MISO, MOSI and Clock general I/O pins + +Dependencies: +None + +Known bugs: +Only modes 0,1 and 1,1 have been tested. + +To do: diff --git a/tos/platforms/gnode/lib/spi/SoftwareSpiC.nc b/tos/platforms/gnode/lib/spi/SoftwareSpiC.nc new file mode 100644 index 0000000000..9895245235 --- /dev/null +++ b/tos/platforms/gnode/lib/spi/SoftwareSpiC.nc @@ -0,0 +1,31 @@ +/** + * Provides a software implementation of the SPI protocol. + */ +generic configuration SoftwareSpiC(uint8_t polarity, uint8_t phase) { + provides { + interface Resource; + interface SpiByte; + interface SpiPacket; + } + + uses { + interface GeneralIO as MISO; + interface GeneralIO as MOSI; + interface GeneralIO as Clock; + } +} + +implementation { + + components new SoftwareSpiP(polarity, phase), MainC; + + MainC.SoftwareInit -> SoftwareSpiP; + + SoftwareSpiP.MISO = MISO; + SoftwareSpiP.MOSI = MOSI; + SoftwareSpiP.Clock = Clock; + + SpiByte = SoftwareSpiP; + SpiPacket = SoftwareSpiP; + Resource = SoftwareSpiP; +} diff --git a/tos/platforms/gnode/lib/spi/SoftwareSpiP.nc b/tos/platforms/gnode/lib/spi/SoftwareSpiP.nc new file mode 100644 index 0000000000..c726ea231c --- /dev/null +++ b/tos/platforms/gnode/lib/spi/SoftwareSpiP.nc @@ -0,0 +1,202 @@ +/** + * Provides a software implementation of the SPI protocol. + * Also provides a fake Resource implementation, since + * it is not meant to be shared. + */ +generic module SoftwareSpiP(uint8_t polarity, uint8_t phase) { + provides { + interface Init; + interface SpiByte; + interface SpiPacket; + interface Resource; + } + + uses { + interface GeneralIO as MOSI; + interface GeneralIO as MISO; + interface GeneralIO as Clock; + } +} + +implementation { + + bool busy = FALSE; + + // these are protected by the busy flag + norace uint8_t* txBuffer; + norace uint8_t* rxBuffer; + norace uint16_t length; + norace uint16_t count; + + /** + * Initialise I/O pins. + */ + void init() { + call MISO.makeInput(); + call MOSI.makeOutput(); + call Clock.makeOutput(); + if (polarity == 0) { + call Clock.clr(); // idle low + } else { + call Clock.set(); // idle high + } + } + + command error_t Init.init() { + init(); + return SUCCESS; + } + + inline void clockLead() { + // leading clock edge + if (polarity == 0) { + // base value is low, start with rising edge + call Clock.set(); + } else { + // base value is high, start with falling edge + call Clock.clr(); + } + } + + inline void clockTrail() { + // trailing clock edge + if (polarity == 0) { + // falling edge + call Clock.clr(); + } else { + // rising edge + call Clock.set(); + } + } + + inline void write(uint8_t bit) { + if (bit) call MOSI.set(); + else call MOSI.clr(); + } + + inline uint8_t read() { + return call MISO.get(); + } + + /** + * Send/receive a single bit. + */ + uint8_t sendBit(uint8_t bit) { + uint8_t rx; + + if (phase == 0) { + // sample on the leading edge, change on the trailing edge + write(bit); + clockLead(); + rx = read(); + clockTrail(); + } else { + // change on the leading edge, sample on the trailing edge + clockLead(); + write(bit); + clockTrail(); + rx = read(); + } + + return rx; + } + + /** + * Synchronous transmit and receive (can be in interrupt context) + * @param tx Byte to transmit + * @param rx Received byte is stored here. + */ + async command uint8_t SpiByte.write(uint8_t tx) { + uint8_t i; + uint8_t rx = 0; + for (i = 0; i < 8; i++) { + // MSB first, so send top bit and receive bottom bit, then shift left + rx |= sendBit(tx >> 7); + + // don't shift after the last bit + if (i < 7) { + tx <<= 1; + rx <<= 1; + } + } + + return rx; + } + + /** + * Process /length/ bytes, one byte per run. + */ + task void send() { + uint8_t received = call SpiByte.write(txBuffer == NULL ? 0 : txBuffer[count]); + if (rxBuffer != NULL) rxBuffer[count] = received; + count++; + + if (count < length) { + post send(); + } else { + // we release the busy flag before signalling, so copy the pointers + uint8_t* tx = txBuffer; + uint8_t* rx = rxBuffer; + atomic busy = FALSE; + + signal SpiPacket.sendDone(tx, rx, length, SUCCESS); + } + } + + /** + * Send a message over the SPI bus. + * + * @param txBuf A pointer to the buffer to send over the bus. If this + * parameter is NULL, then the SPI will send zeroes. + * @param rxBuf A pointer to the buffer where received data should + * be stored. If this parameter is NULL, then the SPI will + * discard incoming bytes. + * @param len Length of the message. Note that non-NULL rxBuf and txBuf + * parameters must be AT LEAST as large as len, or the SPI + * will overflow a buffer. + * + * @return SUCCESS if the request was accepted for transfer + */ + async command error_t SpiPacket.send(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { + atomic { + if (busy) return EBUSY; + busy = TRUE; + } + + txBuffer = txBuf; + rxBuffer = rxBuf; + length = len; + count = 0; + + post send(); + return SUCCESS; + } + + // fake a Resource implementation + + task void grant() { + signal Resource.granted(); + } + + async command error_t Resource.request() { + init(); + post grant(); + return SUCCESS; + } + + async command error_t Resource.immediateRequest() { + init(); + return SUCCESS; + } + + async command error_t Resource.release() { + return SUCCESS; + } + + async command bool Resource.isOwner() { + return TRUE; + } + + default async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error) {} + default event void Resource.granted() {} +} diff --git a/tos/platforms/gnode/obsolete.txt b/tos/platforms/gnode/obsolete.txt new file mode 100644 index 0000000000..5b7c9123eb --- /dev/null +++ b/tos/platforms/gnode/obsolete.txt @@ -0,0 +1,14 @@ +chips/msp430/McuSleepC.nc +chips/msp430/msp430regtypes.h +chips/msp430/msp430hardware.h + +chips/msp430/timer/Msp430ClockP.nc +chips/msp430/timer/Msp430TimerC.nc + +chips/msp430/pins/HplMsp430GeneralIO.nc +chips/msp430/pins/HplMsp430GeneralIOP.nc +chips/msp430/pins/HplMsp430GeneralIOC.nc +chips/msp430/pins/HplMsp430InterruptP.nc +chips/msp430/pins/HplMsp430InterruptC.nc + +chips/msp430/usci diff --git a/tos/platforms/gnode/platform.h b/tos/platforms/gnode/platform.h new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tos/platforms/gnode/platform_message.h b/tos/platforms/gnode/platform_message.h new file mode 100644 index 0000000000..e91be8a40c --- /dev/null +++ b/tos/platforms/gnode/platform_message.h @@ -0,0 +1,23 @@ +#ifndef PLATFORM_MESSAGE_H +#define PLATFORM_MESSAGE_H + +#include "ChipconPacket.h" +#include "Serial.h" + +typedef union message_header { + chipcon_header_t radio; + serial_header_t serial; +} message_header_t; + +typedef union message_footer { + chipcon_footer_t radio; +} message_footer_t; + +typedef union message_metadata { + chipcon_metadata_t radio; +} message_metadata_t; + +// obsolete, but used by CTP +#define TOS_BCAST_ADDR AM_BROADCAST_ADDR + +#endif From d96be7cb6a66b38ef34eac98a971321d93570917 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Dec 2011 02:58:38 -0800 Subject: [PATCH 218/411] Update docs, promotion of msp430-int-next to msp430-int --- 00a_Repo_Notes | 26 ++++++++++++++++---------- 00b_Development_Environment | 12 ++++++------ 11_Release_Notes | 7 ++++--- 3 files changed, 26 insertions(+), 19 deletions(-) diff --git a/00a_Repo_Notes b/00a_Repo_Notes index e2fa48d5a5..2556cb1aa4 100644 --- a/00a_Repo_Notes +++ b/00a_Repo_Notes @@ -1,5 +1,5 @@ -WARNING: Default branch has been switched to *** msp430-int-next *** +WARNING: Default branch has been switched to *** msp430-int *** ============================================================================ @@ -10,25 +10,28 @@ See "Where to begin" (next section) for where to start. TinyProd tp-freeforall/prod -Default (Main working) Branch: (2011-09-30) msp430-int-next +Default (Main working) Branch: (2011-12-16) msp430-int Integration cycle. Merging tinyos-main (SVN) -> msp430-int msp430-int: msp430 integration msp430-int-pu: msp430 integration (proposed updates) (currently collapsed) -msp430-int-svn: msp430 integration slated for inclusion into T2 SVN trunk. +If in doubt, branch off from msp430-int. -If in doubt, branch off from msp430-int-pu. +Status: 2011-12-16 -Status: 2011-09-30 - -tinyprod-base integrated with the tip of tinyos-main trunk (82dab04, r5767) -msp430-int-next: integrated with updated tinyprod-base. +tinyprod-base: integrated with the tip of tinyos-main trunk (82dab04, r5767) +msp430-int: integrated with updated tinyprod-base. Merge with Z1 (x2) tinyos-main code complete. +2011-12-16: msp430-int-next promoted to msp430-int + integration with Z1 x2 tinyos-main (svn) complete. + + bring gnode (sownet) into msp430-int. + 2011-09-21 msp430-int-pu merged into msp430-int, includes base x5 (prior to tinyprod-base) tinyprod-base: new branch replaces vhsb (nuke old z1 code) @@ -136,7 +139,7 @@ github.com/tp-freeforall/prod: working fork. github.com//prod: user's tinyprod working fork. branched off tp-freeforall/prod. working branches should be branched off the tp-freeforall/prod(branch) - that the user is working on. (ie. msp430-int-pu) + that the user is working on. (ie. msp430-int or msp430-int-pu) The general form for a repository/branch is: /(branch) ie. gh:tp-freeforall/prod(msp430-int-pu) is the msp430-int-pu branch in the @@ -173,7 +176,10 @@ Other current branches: msp430-int: msp430 integration (msp430 core, x1, x2, x5) feature branch -msp430-int-pu: proposed updates to msp430-int (no msp430-int-next). +msp430-int-next: code accepted from int-pu and in process of merging into + msp430-int. + +msp430-int-pu: proposed updates to msp430-int. swreset: potential msp430 swreset implementation. diff --git a/00b_Development_Environment b/00b_Development_Environment index 4d667c8333..baa15be263 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -5,9 +5,9 @@ Installing a development environment for TinyOS (TinyProd). State: -2011-12-01: +2011-12-16: Ubuntu 10.04 or 11.04. Debian Squeeze works as well. - T2 (TinyProd) github:tp-freeforall/prod(msp430-int-next), + T2 (TinyProd) github:tp-freeforall/prod(msp430-int), mspdebug JTAG debugging. mspgcc-LTS20110716 toolchain with patches Toolchain from http://tinyprod.net/repos/debian-dev @@ -93,11 +93,11 @@ exit 3) TinyOS 2.x tree checkout -This is a basic check out of the msp430-int-next branch of the github repository +This is a basic check out of the msp430-int branch of the github repository tp-freeforall/prod.git. This repo tracks the main tinyos SVN repository used for development. It has modifications to support newer TI MSP430 processors. -This basic checkout gives you a read-only copy of the msp430-int-next branch. It +This basic checkout gives you a read-only copy of the msp430-int branch. It is a fully functional local repository that can be commited into (locally only). cd ~/top @@ -109,12 +109,12 @@ is a fully functional local repository that can be commited into (locally only). This will create a new branch named and will check you into that branch. It will be branched off of the main branch from the remote, gh:tp-freeforall/prod -(msp430-int-next). +(msp430-int). This will keep your changes locally grouped. You will have a remote named 'origin' that points at the repository that you cloned from namely, git://github.com/tp-freeforall/prod.git. Your branch will be rooted -at the default branch of tp-freeforall/prod, msp430-int-next. +at the default branch of tp-freeforall/prod, msp430-int. To set up for contibuting to the main repository, the instructions in 00c_Getting_Started_Git and 00d_Contribution_Process should be followed. diff --git a/11_Release_Notes b/11_Release_Notes index 16b64c748d..652786a463 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -1,9 +1,10 @@ Major Changes to the msp430 core software: -(branch: gh:tp-freeforall/prod(msp430-int-next) - will migrate to msp430-int (~ 2011-11-15)) +(branch: gh:tp-freeforall/prod(msp430-int) -Last Update: 2011-12-10, cire +Last Update: 2011-12-16, cire + +msp430-int-next merged into msp430-int. 2011-12-16 Msp430-Int (msp430 integration branch) is a major rework of the core tinyos msp430 files. Originally, tinyos msp430 support was for the first generation From 8b7bee11fca6468612efe990d9a25b9bb16f7736 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Dec 2011 17:57:07 -0800 Subject: [PATCH 219/411] add definition for noinit --- tos/chips/msp430/msp430hardware.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index c4c6bab906..608ebf25b8 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -53,6 +53,14 @@ #include #endif /* __MSPGCC__ */ +/* + * old tool chain (3.2.3) defined in iomacros.h, new 4.5.+ no longer + * defines these. Add back in those we use. + */ +#ifndef noinit +#define noinit __attribute__ ((section(".noinit"))) +#endif + #if defined(__msp430x261x) && !defined(__msp430x26x) /* * The old 3.2.3 toolchain defined __msp430x261x when compiling for the From b46edcbd0ed3d899d312d6e9cdc20c2a86617e6e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Dec 2011 18:28:36 -0800 Subject: [PATCH 220/411] fix typo, UsciArbP.ArbiterInfo should have been UsciIntP.ArbiterInfo --- tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc index 8ef156384b..82d1c624fe 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UsciArbA1P.nc @@ -66,5 +66,5 @@ implementation { ResourceConfigure = ArbiterC; ResourceDefaultOwnerInfo = ArbiterC; ArbiterInfo = ArbiterC; - UsciArbP.ArbiterInfo -> ArbiterC; + UsciIntP.ArbiterInfo -> ArbiterC; } From 637f06dcc990b5727e74359176fff79de1655715 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Dec 2011 20:57:00 -0800 Subject: [PATCH 221/411] finish removing vestiges of disable-hwmul --- support/make/epic.target | 2 -- support/make/eyesIFXv1.target | 2 -- support/make/eyesIFXv2.target | 4 +--- support/make/shimmer.target | 3 --- support/make/shimmer2.target | 3 --- support/make/shimmer2r.target | 3 --- support/make/span.target | 3 --- support/make/telosa.target | 3 --- support/make/telosb.target | 3 --- support/make/tinynode.target | 7 ------- support/make/z1.target | 3 --- tools/tinyos/tosthreads/tosthreads-gen-dynamic-app | 2 +- tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 | 2 +- 13 files changed, 3 insertions(+), 37 deletions(-) diff --git a/support/make/epic.target b/support/make/epic.target index 2e7d861103..2291d76ad4 100644 --- a/support/make/epic.target +++ b/support/make/epic.target @@ -3,8 +3,6 @@ PLATFORM ?= epic -# Remove MSP430 hardware multiply disable: new msp430-gcc fixes -# PFLAGS += -mdisable-hwmul # OPTFLAGS += -O # Default BSL assumes telosb-like programming interface diff --git a/support/make/eyesIFXv1.target b/support/make/eyesIFXv1.target index 8d097653db..b59fb77d0b 100644 --- a/support/make/eyesIFXv1.target +++ b/support/make/eyesIFXv1.target @@ -5,8 +5,6 @@ PLATFORM = eyesIFXv1 MSP_MCU = msp430x149 -# Remove MSP430 hardware multiply disable: new msp430-gcc fixes -# PFLAGS += -mdisable-hwmul OPTFLAGS += -O ifndef DEFAULT_PROGRAM diff --git a/support/make/eyesIFXv2.target b/support/make/eyesIFXv2.target index dec7c50317..270e9174fd 100644 --- a/support/make/eyesIFXv2.target +++ b/support/make/eyesIFXv2.target @@ -9,8 +9,6 @@ MSP_MCU = msp430x1611 VOLUME_FILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db -# Disable MSP430 hardware multiply because it makes MSPGCC die -PFLAGS += -mdisable-hwmul OPTFLAGS += -O ifndef DEFAULT_PROGRAM @@ -25,7 +23,7 @@ ifeq (,$(findstring /dev/ttyUSB,$(BSL))) endif endif -NESC_FLAGS:=-Wnesc-all -mdisable-hwmul +NESC_FLAGS:=-Wnesc-all $(call TOSMake_include_platform,msp) diff --git a/support/make/shimmer.target b/support/make/shimmer.target index db5911f1c5..23d582b8e4 100644 --- a/support/make/shimmer.target +++ b/support/make/shimmer.target @@ -1,8 +1,5 @@ PLATFORM = shimmer -# Remove MSP430 hardware multiply disable: new msp430-gcc fixes -# PFLAGS += -mdisable-hwmul - OPTFLAGS += -O MSP_BSL ?= tos-bsl diff --git a/support/make/shimmer2.target b/support/make/shimmer2.target index 7f3ac4d4bd..caa0c1505c 100644 --- a/support/make/shimmer2.target +++ b/support/make/shimmer2.target @@ -1,8 +1,5 @@ PLATFORM = shimmer2 -# Remove MSP430 hardware multiply disable: new msp430-gcc fixes -# PFLAGS += -mdisable-hwmul - OPTFLAGS += -O MSP_BSL ?= tos-bsl diff --git a/support/make/shimmer2r.target b/support/make/shimmer2r.target index a7bd320cc1..06d523f343 100644 --- a/support/make/shimmer2r.target +++ b/support/make/shimmer2r.target @@ -1,8 +1,5 @@ PLATFORM = shimmer2r -# Remove MSP430 hardware multiply disable: new msp430-gcc fixes -#PFLAGS += -mdisable-hwmul - OPTFLAGS += -O MSP_BSL ?= tos-bsl diff --git a/support/make/span.target b/support/make/span.target index 958773aac4..1f88008017 100644 --- a/support/make/span.target +++ b/support/make/span.target @@ -1,8 +1,5 @@ PLATFORM = span -# Remove MSP430 hardware multiply disable: new msp430-gcc fixes -# PFLAGS += -mdisable-hwmul - OPTFLAGS += -O MSP_BSL ?= tos-bsl diff --git a/support/make/telosa.target b/support/make/telosa.target index bb3a612ef8..192d1b60ff 100644 --- a/support/make/telosa.target +++ b/support/make/telosa.target @@ -4,9 +4,6 @@ PLATFORM ?= telosa MSP_MCU = msp430x149 -# Remove MSP430 hardware multiply disable: new msp430-gcc (4.5.3+) fixes -# PFLAGS += -mdisable-hwmul - # The default msp OPTFLAGS should be -Os, that's what we want # if -O is added here it will override the -Os, we really want -Os # OPTFLAGS += -O diff --git a/support/make/telosb.target b/support/make/telosb.target index b2982e3b68..3ce3e8d82e 100644 --- a/support/make/telosb.target +++ b/support/make/telosb.target @@ -4,9 +4,6 @@ PLATFORM ?= telosb #MSP_MCU = msp430x1611 -# Remove MSP430 hardware multiply disable: new msp430-gcc (4.5.3+) fixes -# PFLAGS += -mdisable-hwmul - # The default msp OPTFLAGS should be -Os, that's what we want # if -O is added here it will override the -Os, we really want -Os # OPTFLAGS += -O diff --git a/support/make/tinynode.target b/support/make/tinynode.target index 0787419397..239150085f 100644 --- a/support/make/tinynode.target +++ b/support/make/tinynode.target @@ -16,13 +16,6 @@ VOLUME_ALLOCATOR ?= tos-storage-at45db OPTFLAGS += -Os #OPTFLAGS = -# Disable MSP430 hardware multiply because it makes MSPGCC die -PFLAGS += -mdisable-hwmul - -# removed per Pierre.Castella@tinynode.com, not needed. -# causes problems with newer toolchains that don't support -mstrict-align -# PFLAGS += -mstrict-align - $(call TOSMake_include_platform,tinynode) $(call TOSMake_include_platform,msp) diff --git a/support/make/z1.target b/support/make/z1.target index 357add4e6f..8594372ffb 100644 --- a/support/make/z1.target +++ b/support/make/z1.target @@ -8,9 +8,6 @@ MSP_MCU ?= msp430x261 MSP_GCC ?= msp430-gcc MSP_NESC_TARGET ?= msp430 -# Remove MSP430 hardware multiply disable: new msp430-gcc (4.5.3+) fixes -# PFLAGS += -mdisable-hwmul - # # Old Z1, mspgccX (3.2.3) tool chain accepts -mdata-64k and -mcode-64k # but new mspgcc4 (4.5.3+) doesn't understand these and causes the diff --git a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app index 413b662353..a2ca4177c3 100755 --- a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app +++ b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app @@ -47,7 +47,7 @@ FLAG=$2 GCC="msp430-gcc" OBJCOPY="msp430-objcopy" NESCFLAGS="-target=telosb -x nesc -fnesc-target=msp430" -CFLAGS="-c -gcc=$GCC -mmcu=msp430x1611 -Os -mdisable-hwmul -Wall -Wshadow" +CFLAGS="-c -gcc=$GCC -mmcu=msp430x1611 -Os -Wall -Wshadow" OBJFILE=`basename $CFILE .c`.o BINFILE=`basename $CFILE .c`.bin diff --git a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 index 5f6abc298c..14db40291f 100755 --- a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 +++ b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 @@ -15,7 +15,7 @@ FLAG=$2 GCC="msp430-gcc" OBJCOPY="msp430-objcopy" NESCFLAGS="-target=telosb -x nesc -fnesc-target=msp430" -CFLAGS="-c -gcc=$GCC -mmcu=msp430x1611 -Os -mdisable-hwmul -Wall -Wshadow" +CFLAGS="-c -gcc=$GCC -mmcu=msp430x1611 -Os -Wall -Wshadow" OBJFILE=`basename $CFILE .c`.o BINFILE=`basename $CFILE .c`.bin From d0ab6dec16aefde6ccf9b7a0361f73aaf6ad15f1 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Dec 2011 21:11:20 -0800 Subject: [PATCH 222/411] regularize conditional OPTFLAGS setting (?= -Os) --- support/make/epic.target | 2 +- support/make/eyesIFXv1.target | 2 +- support/make/eyesIFXv2.target | 2 +- support/make/msp/debug.extra | 7 ------- support/make/msp/debug_noopt.extra | 5 ----- support/make/red.target | 2 +- support/make/shimmer.target | 2 +- support/make/shimmer2.target | 2 +- support/make/shimmer2r.target | 2 +- support/make/span.target | 2 +- support/make/telosa.target | 4 +--- support/make/telosb.target | 4 +--- support/make/tinynode.target | 3 +-- 13 files changed, 11 insertions(+), 28 deletions(-) diff --git a/support/make/epic.target b/support/make/epic.target index 2291d76ad4..1e6069bb26 100644 --- a/support/make/epic.target +++ b/support/make/epic.target @@ -3,7 +3,7 @@ PLATFORM ?= epic -# OPTFLAGS += -O +OPTFLAGS ?= -Os # Default BSL assumes telosb-like programming interface MSP_BSL ?= tos-bsl diff --git a/support/make/eyesIFXv1.target b/support/make/eyesIFXv1.target index b59fb77d0b..a34461ef62 100644 --- a/support/make/eyesIFXv1.target +++ b/support/make/eyesIFXv1.target @@ -5,7 +5,7 @@ PLATFORM = eyesIFXv1 MSP_MCU = msp430x149 -OPTFLAGS += -O +OPTFLAGS ?= -Os ifndef DEFAULT_PROGRAM DEFAULT_PROGRAM = jtag diff --git a/support/make/eyesIFXv2.target b/support/make/eyesIFXv2.target index 270e9174fd..d5ed5dac7d 100644 --- a/support/make/eyesIFXv2.target +++ b/support/make/eyesIFXv2.target @@ -9,7 +9,7 @@ MSP_MCU = msp430x1611 VOLUME_FILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db -OPTFLAGS += -O +OPTFLAGS ?= -Os ifndef DEFAULT_PROGRAM DEFAULT_PROGRAM = bsl diff --git a/support/make/msp/debug.extra b/support/make/msp/debug.extra index 4c9598ec3d..014aa3ca67 100644 --- a/support/make/msp/debug.extra +++ b/support/make/msp/debug.extra @@ -1,11 +1,4 @@ #-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ -# Modern GDB debuggers can handle optimized code pretty well so -# we no longer specify -O1 to turn optimization off to simplify -# debugging. Rather use the default optimization level which is -Os -# for size. -# -# OPTFLAGS = -O1 -g -fnesc-no-inline - OPTFLAGS += -g -fnesc-no-inline diff --git a/support/make/msp/debug_noopt.extra b/support/make/msp/debug_noopt.extra index beaf530126..71b3562f6b 100644 --- a/support/make/msp/debug_noopt.extra +++ b/support/make/msp/debug_noopt.extra @@ -1,8 +1,3 @@ #-*-Makefile-*- vim:syntax=make -# -# Modern GDB debuggers can handle optimized code pretty well so -# we no longer specify -O1 to turn optimization off to simplify -# debugging. Rather use the default optimization level which is -Os -# for size. OPTFLAGS += -O0 -g -fnesc-no-inline diff --git a/support/make/red.target b/support/make/red.target index 6e3baaf517..0c604e93ad 100644 --- a/support/make/red.target +++ b/support/make/red.target @@ -2,7 +2,7 @@ PLATFORM ?= red -#OPTFLAGS += -O +OPTFLAGS ?= -Os MSP_MCU = cc430x5137 IAR_MCU_GROUP = cc430x513x diff --git a/support/make/shimmer.target b/support/make/shimmer.target index 23d582b8e4..8b5673a6f6 100644 --- a/support/make/shimmer.target +++ b/support/make/shimmer.target @@ -1,6 +1,6 @@ PLATFORM = shimmer -OPTFLAGS += -O +OPTFLAGS ?= -Os MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --invert-test --invert-reset diff --git a/support/make/shimmer2.target b/support/make/shimmer2.target index caa0c1505c..ceba4d41cd 100644 --- a/support/make/shimmer2.target +++ b/support/make/shimmer2.target @@ -1,6 +1,6 @@ PLATFORM = shimmer2 -OPTFLAGS += -O +OPTFLAGS ?= -Os MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --invert-test --invert-reset diff --git a/support/make/shimmer2r.target b/support/make/shimmer2r.target index 06d523f343..67f48c1dc1 100644 --- a/support/make/shimmer2r.target +++ b/support/make/shimmer2r.target @@ -1,6 +1,6 @@ PLATFORM = shimmer2r -OPTFLAGS += -O +OPTFLAGS ?= -Os MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --invert-test --invert-reset diff --git a/support/make/span.target b/support/make/span.target index 1f88008017..189660511d 100644 --- a/support/make/span.target +++ b/support/make/span.target @@ -1,6 +1,6 @@ PLATFORM = span -OPTFLAGS += -O +OPTFLAGS ?= -Os MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --invert-test --invert-reset diff --git a/support/make/telosa.target b/support/make/telosa.target index 192d1b60ff..a8f060b4dc 100644 --- a/support/make/telosa.target +++ b/support/make/telosa.target @@ -4,9 +4,7 @@ PLATFORM ?= telosa MSP_MCU = msp430x149 -# The default msp OPTFLAGS should be -Os, that's what we want -# if -O is added here it will override the -Os, we really want -Os -# OPTFLAGS += -O +OPTFLAGS ?= -Os MSP_BSL ?= tos-bsl diff --git a/support/make/telosb.target b/support/make/telosb.target index 3ce3e8d82e..960e8f5ef3 100644 --- a/support/make/telosb.target +++ b/support/make/telosb.target @@ -4,9 +4,7 @@ PLATFORM ?= telosb #MSP_MCU = msp430x1611 -# The default msp OPTFLAGS should be -Os, that's what we want -# if -O is added here it will override the -Os, we really want -Os -# OPTFLAGS += -O +OPTFLAGS ?= -Os MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --telosb diff --git a/support/make/tinynode.target b/support/make/tinynode.target index 239150085f..96747fdceb 100644 --- a/support/make/tinynode.target +++ b/support/make/tinynode.target @@ -13,8 +13,7 @@ MSP_BSL ?= tos-bsl VOLUME_FILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db -OPTFLAGS += -Os -#OPTFLAGS = +OPTFLAGS ?= -Os $(call TOSMake_include_platform,tinynode) $(call TOSMake_include_platform,msp) From 3e3eef6b9118d0d9f1ad194ca19613aa17cf899e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Dec 2011 21:30:37 -0800 Subject: [PATCH 223/411] regularized MCU setting, ie msp430x1611 -> msp430f1611 --- support/make/eyesIFXv1.target | 2 +- support/make/eyesIFXv2.target | 2 +- support/make/mm5s.target | 2 +- support/make/msp/msp.rules | 1 - support/make/red.target | 2 +- support/make/surf.target | 2 +- support/make/telosa.target | 2 +- support/make/telosb.target | 2 +- support/make/z1.target | 2 +- tools/tinyos/tosthreads/tosthreads-gen-dynamic-app | 2 +- tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 | 2 +- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 2 +- tos/platforms/epic/.platform | 2 +- tos/platforms/eyesIFX/eyesIFXv1/.platform | 2 +- tos/platforms/eyesIFX/eyesIFXv2/.platform | 2 +- tos/platforms/mm5s/.platform | 2 +- tos/platforms/red/.platform | 2 +- tos/platforms/shimmer/.platform | 2 +- tos/platforms/shimmer2/.platform | 2 +- tos/platforms/shimmer2r/.platform | 2 +- tos/platforms/span/.platform | 2 +- tos/platforms/surf/.platform | 2 +- tos/platforms/telosa/.platform | 2 +- tos/platforms/telosb/.platform | 2 +- tos/platforms/tinynode/.platform | 2 +- tos/platforms/z1/.platform | 2 +- 26 files changed, 25 insertions(+), 26 deletions(-) diff --git a/support/make/eyesIFXv1.target b/support/make/eyesIFXv1.target index a34461ef62..45ab32256b 100644 --- a/support/make/eyesIFXv1.target +++ b/support/make/eyesIFXv1.target @@ -3,7 +3,7 @@ PLATFORM = eyesIFXv1 -MSP_MCU = msp430x149 +MSP_MCU = msp430f149 OPTFLAGS ?= -Os diff --git a/support/make/eyesIFXv2.target b/support/make/eyesIFXv2.target index d5ed5dac7d..41f3f8618c 100644 --- a/support/make/eyesIFXv2.target +++ b/support/make/eyesIFXv2.target @@ -3,7 +3,7 @@ PLATFORM = eyesIFXv2 -MSP_MCU = msp430x1611 +MSP_MCU = msp430f1611 #Flash Config VOLUME_FILE = volumes-at45db.xml diff --git a/support/make/mm5s.target b/support/make/mm5s.target index e7d3010569..691615980a 100755 --- a/support/make/mm5s.target +++ b/support/make/mm5s.target @@ -1,7 +1,7 @@ #-*-Makefile-*- vim:syntax=make PLATFORM = mm5s -MSP_MCU = msp430x5438 +MSP_MCU = msp430f5438a $(call TOSMake_include_platform,msp) diff --git a/support/make/msp/msp.rules b/support/make/msp/msp.rules index 13964f4d1b..4cb4d3cc5b 100644 --- a/support/make/msp/msp.rules +++ b/support/make/msp/msp.rules @@ -29,7 +29,6 @@ endif #MSP_NESC_TARGET ?= msp430 #MSP_GCC ?= msp430-gcc -#MSP_MCU ?= msp430x149 #PFLAGS += -fnesc-target=$(MSP_NESC_TARGET) -gcc=$(MSP_GCC) -mmcu=$(MSP_MCU) OBJCOPY = msp430-objcopy diff --git a/support/make/red.target b/support/make/red.target index 0c604e93ad..5ebf1edf2d 100644 --- a/support/make/red.target +++ b/support/make/red.target @@ -4,7 +4,7 @@ PLATFORM ?= red OPTFLAGS ?= -Os -MSP_MCU = cc430x5137 +MSP_MCU = cc430f5137 IAR_MCU_GROUP = cc430x513x IAR_LINKER_XCL = lnkcc430F5137.xcl diff --git a/support/make/surf.target b/support/make/surf.target index a767c1d65f..647d93fbe0 100644 --- a/support/make/surf.target +++ b/support/make/surf.target @@ -9,7 +9,7 @@ HAS_FLASH ?= 1 #IAR_LINKER_XCL = lnkcc430F5137.xcl PLATFORM ?= surf -MSP_MCU = cc430x5137 +MSP_MCU = cc430f5137 PFLAGS += -DSURF_REV_$(SURF_REV) PFLAGS += -DPLATFORM_HAS_FLASH=$(HAS_FLASH) diff --git a/support/make/telosa.target b/support/make/telosa.target index a8f060b4dc..fa98b88771 100644 --- a/support/make/telosa.target +++ b/support/make/telosa.target @@ -2,7 +2,7 @@ PLATFORM ?= telosa -MSP_MCU = msp430x149 +MSP_MCU = msp430f149 OPTFLAGS ?= -Os diff --git a/support/make/telosb.target b/support/make/telosb.target index 960e8f5ef3..7d2f183760 100644 --- a/support/make/telosb.target +++ b/support/make/telosb.target @@ -2,7 +2,7 @@ PLATFORM ?= telosb -#MSP_MCU = msp430x1611 +MSP_MCU = msp430f1611 OPTFLAGS ?= -Os diff --git a/support/make/z1.target b/support/make/z1.target index 8594372ffb..6bd09d24f7 100644 --- a/support/make/z1.target +++ b/support/make/z1.target @@ -4,7 +4,7 @@ MSP_BSL ?= tos-bsl MOTELIST ?= motelist MSP_BSL_FLAGS = --z1 -MSP_MCU ?= msp430x261 +MSP_MCU ?= msp430f2617 MSP_GCC ?= msp430-gcc MSP_NESC_TARGET ?= msp430 diff --git a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app index a2ca4177c3..a8da2cfc9d 100755 --- a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app +++ b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app @@ -47,7 +47,7 @@ FLAG=$2 GCC="msp430-gcc" OBJCOPY="msp430-objcopy" NESCFLAGS="-target=telosb -x nesc -fnesc-target=msp430" -CFLAGS="-c -gcc=$GCC -mmcu=msp430x1611 -Os -Wall -Wshadow" +CFLAGS="-c -gcc=$GCC -mmcu=msp430f1611 -Os -Wall -Wshadow" OBJFILE=`basename $CFILE .c`.o BINFILE=`basename $CFILE .c`.bin diff --git a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 index 14db40291f..0ad7231729 100755 --- a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 +++ b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 @@ -15,7 +15,7 @@ FLAG=$2 GCC="msp430-gcc" OBJCOPY="msp430-objcopy" NESCFLAGS="-target=telosb -x nesc -fnesc-target=msp430" -CFLAGS="-c -gcc=$GCC -mmcu=msp430x1611 -Os -Wall -Wshadow" +CFLAGS="-c -gcc=$GCC -mmcu=msp430f1611 -Os -Wall -Wshadow" OBJFILE=`basename $CFILE .c`.o BINFILE=`basename $CFILE .c`.bin diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index a0412ef578..897e8eb25c 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -217,7 +217,7 @@ configuration HplMsp430GeneralIOC { * Note: 247, 248, 249, and 2410 aren't currently used for a tinyos platform. * 241[6-9] and 261[6-9] are used by tinyos platforms. * - * Old headers: mspgccX (3.2.3) includes msp430x261x.h (-mmcu=msp430x2617) + * Old headers: mspgccX (3.2.3) includes msp430x261x.h (-mmcu=msp430f2617) * which defines __msp430x261x. * * New headers: mspgcc4 (4.4.5, uniarch, TI_HEADERS) defines __msp430x26x. There diff --git a/tos/platforms/epic/.platform b/tos/platforms/epic/.platform index de403ab265..fab734654c 100644 --- a/tos/platforms/epic/.platform +++ b/tos/platforms/epic/.platform @@ -49,7 +49,7 @@ push( @includes, qw( # The @opts list contains parameters that are passed to ncc. @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x1611 + -mmcu=msp430f1611 -fnesc-target=msp430 -fnesc-no-debug ); diff --git a/tos/platforms/eyesIFX/eyesIFXv1/.platform b/tos/platforms/eyesIFX/eyesIFXv1/.platform index 5e37b74f1c..b556b3a9cf 100644 --- a/tos/platforms/eyesIFX/eyesIFXv1/.platform +++ b/tos/platforms/eyesIFX/eyesIFXv1/.platform @@ -12,6 +12,6 @@ push( @includes, qw( push ( @opts, qw( - -mmcu=msp430x149 + -mmcu=msp430f149 ) ); diff --git a/tos/platforms/eyesIFX/eyesIFXv2/.platform b/tos/platforms/eyesIFX/eyesIFXv2/.platform index 473901eff1..8a6a649d4b 100644 --- a/tos/platforms/eyesIFX/eyesIFXv2/.platform +++ b/tos/platforms/eyesIFX/eyesIFXv2/.platform @@ -12,5 +12,5 @@ push( @includes, qw( push ( @opts, qw( - -mmcu=msp430x1611 + -mmcu=msp430f1611 ) ); diff --git a/tos/platforms/mm5s/.platform b/tos/platforms/mm5s/.platform index 7afcbf4812..ed5e5c3c38 100644 --- a/tos/platforms/mm5s/.platform +++ b/tos/platforms/mm5s/.platform @@ -41,7 +41,7 @@ EOText @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x5438 + -mmcu=msp430f5438a -fnesc-target=msp430 -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask ); diff --git a/tos/platforms/red/.platform b/tos/platforms/red/.platform index cf82ccae95..a222c8574b 100644 --- a/tos/platforms/red/.platform +++ b/tos/platforms/red/.platform @@ -59,7 +59,7 @@ EOText @opts = qw( -gcc=msp430-gcc - -mmcu=cc430x5137 + -mmcu=cc430f5137 -fnesc-target=msp430 -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask ); diff --git a/tos/platforms/shimmer/.platform b/tos/platforms/shimmer/.platform index a6d9eaf26e..22f92bded7 100644 --- a/tos/platforms/shimmer/.platform +++ b/tos/platforms/shimmer/.platform @@ -53,7 +53,7 @@ push( @includes, qw( @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x1611 + -mmcu=msp430f1611 -fnesc-target=msp430 -fnesc-no-debug ); diff --git a/tos/platforms/shimmer2/.platform b/tos/platforms/shimmer2/.platform index 857629cad9..877a862bae 100644 --- a/tos/platforms/shimmer2/.platform +++ b/tos/platforms/shimmer2/.platform @@ -64,7 +64,7 @@ push( @includes, qw( @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x1611 + -mmcu=msp430f1611 -fnesc-target=msp430 -fnesc-no-debug ); diff --git a/tos/platforms/shimmer2r/.platform b/tos/platforms/shimmer2r/.platform index 0609102d09..399746b856 100644 --- a/tos/platforms/shimmer2r/.platform +++ b/tos/platforms/shimmer2r/.platform @@ -64,7 +64,7 @@ push( @includes, qw( @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x1611 + -mmcu=msp430f1611 -fnesc-target=msp430 -fnesc-no-debug ); diff --git a/tos/platforms/span/.platform b/tos/platforms/span/.platform index a117b6e49a..5cd6ce1cea 100644 --- a/tos/platforms/span/.platform +++ b/tos/platforms/span/.platform @@ -46,7 +46,7 @@ push( @includes, qw( @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x1611 + -mmcu=msp430f1611 -fnesc-target=msp430 -fnesc-no-debug ); diff --git a/tos/platforms/surf/.platform b/tos/platforms/surf/.platform index 504e535e7f..6d237d20e3 100644 --- a/tos/platforms/surf/.platform +++ b/tos/platforms/surf/.platform @@ -70,7 +70,7 @@ EOText @opts = qw( -gcc=msp430-gcc - -mmcu=cc430x5137 + -mmcu=cc430f5137 -fnesc-target=msp430 -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask ); diff --git a/tos/platforms/telosa/.platform b/tos/platforms/telosa/.platform index 9711003d32..3ebc761f5c 100644 --- a/tos/platforms/telosa/.platform +++ b/tos/platforms/telosa/.platform @@ -45,7 +45,7 @@ push( @includes, qw( @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x149 + -mmcu=msp430f149 -fnesc-target=msp430 -fnesc-no-debug diff --git a/tos/platforms/telosb/.platform b/tos/platforms/telosb/.platform index 8dd6553366..3250d3bd9b 100644 --- a/tos/platforms/telosb/.platform +++ b/tos/platforms/telosb/.platform @@ -49,7 +49,7 @@ push( @includes, qw( @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x1611 + -mmcu=msp430f1611 -fnesc-target=msp430 -fnesc-no-debug ); diff --git a/tos/platforms/tinynode/.platform b/tos/platforms/tinynode/.platform index 383b304d7a..732aaf8c20 100644 --- a/tos/platforms/tinynode/.platform +++ b/tos/platforms/tinynode/.platform @@ -38,7 +38,7 @@ push( @includes, qw( @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x1611 + -mmcu=msp430f1611 -fnesc-target=msp430 -fnesc-no-debug); diff --git a/tos/platforms/z1/.platform b/tos/platforms/z1/.platform index 91268aa097..c24f718975 100644 --- a/tos/platforms/z1/.platform +++ b/tos/platforms/z1/.platform @@ -45,7 +45,7 @@ push( @includes, qw( @opts = qw( -gcc=msp430-gcc - -mmcu=msp430x2617 + -mmcu=msp430f2617 -fnesc-target=msp430 -fnesc-no-debug -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask From 692eebf4429b0ef6b31f5133bc6fb287ff187eb6 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 21 Dec 2011 00:26:17 -0800 Subject: [PATCH 224/411] msp430: basic_clock: add configuration mechanism. SMCLK_DIV/TIMERA_DIV --- 11_Release_Notes | 6 +- tos/chips/msp430/clock_bcs/00_Readme | 2 +- tos/chips/msp430/clock_bcs/Msp430ClockP.nc | 142 ++++++++++++------ tos/chips/msp430/x1xxx/Msp430DcoSpec.h | 3 +- tos/chips/msp430/x2xxx/Msp430DcoSpec.h | 3 +- tos/chips/msp430/x5xxx/Msp430DcoSpec.h | 3 +- .../eyesIFX/chips/msp430/Msp430DcoSpec.h | 2 + .../gnode/chips/msp430/timer/Msp430DcoSpec.h | 12 +- 8 files changed, 119 insertions(+), 54 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index 652786a463..690e97248d 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -2,7 +2,7 @@ Major Changes to the msp430 core software: (branch: gh:tp-freeforall/prod(msp430-int) -Last Update: 2011-12-16, cire +Last Update: 2011-12-18, cire msp430-int-next merged into msp430-int. 2011-12-16 @@ -74,6 +74,10 @@ Other notable changes: * use common clock module for x1 and x2. msp430/clock_bcs. Handles basic_clock and bc2. +* add basic_clock configuration mechanism to allow easy configuration of + MCLK (cpu freq), SMCLK (peripheral clock), and 1 uis ticker (TimerA). See + clock_bcs/Msp430ClockP.nc and Msp430DcoSpec.h (various locations). + * gdb files to support different processor families, tos/chips/msp430/99_gdb/gdb{x1,x2,x5}. See tos/chips/msp430/99_gdb/gdbinit for details on how to use these files. diff --git a/tos/chips/msp430/clock_bcs/00_Readme b/tos/chips/msp430/clock_bcs/00_Readme index ced31540b6..b326117421 100644 --- a/tos/chips/msp430/clock_bcs/00_Readme +++ b/tos/chips/msp430/clock_bcs/00_Readme @@ -10,6 +10,6 @@ the processor is sleeping. x1: msp430f1611, TA3 and TB7. x2: msp430f261[6-9], TA3 and TB7. -By default, TA is wired to the 32KiHz timebase and TB is wired to a 1MiHz timebase. +By default, TA is the 1MiHz timebase and TB is a 32KiHz timebase. Other msp430 x1/x2 family chips will have various mixtures of TA and TB. diff --git a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc index bbe7aaa7f1..fc6f4d3b6b 100644 --- a/tos/chips/msp430/clock_bcs/Msp430ClockP.nc +++ b/tos/chips/msp430/clock_bcs/Msp430ClockP.nc @@ -46,44 +46,74 @@ * on the x1 and x2 devices are similar enough to be supported by the same * driver. x5 devices use a different system, the Unified Clock System. * - * FREQ by default is 4MiHz for x1 procs and 8MiHz for x2 procs. Actual - * clock frequency is determined by Msp430DcoSpec.h. The default files - * are in the different x1, x2, and x5 directories. + * TinyOS assumes a 1 uis (us) ticker and a 32 KiHZ (30.5 us) ticker. The + * later is used for timing when sleeping. On the x1 and x2 processors, the + * 1 uis ticker (micro) is implemented by TimerA and the 32 KiHZ ticker is + * on TimerB. * - * Why the different default speeds? The x1 processors are spec'd by - * TI as having a max speed of 8MHz. We do binary so would set this up - * for 8MiHz which would exceed the stated max. So the default is set to - * 4MiHz. Be conservative. x2s have a max of 16MHz so the default is - * set to 8MiHz. And x5s can be run at 25MHz so the default is 16MiHz. + * The basic_clock system provides a main clock (DCO) used to clock the + * CPU (MCLK). Peripherals (timers, usci, uart, spi, i2c, etc) + * are driven off SMCLK (sub-main), driven off DCO via a divider network. + * TimerA is clocked off SMCLK and needs to be set to provide a 1uis (1us) + * ticker. + * + * The include file Msp430DcoSpec.h determines how the clock system should + * be set up. Selectors in this file determine the configuration. + * + * TARGET_DCO_HZ: Base DCO frequency. + * SMCLK_DIV: SMCLK divider. SMCLK = DCO/(SMCLK_DIV). + * TIMERA_DIV: determines the SMCLK divider for TimerA. + * + * Default settings: + * + * CPU clock: DCO 4MiHZ, (MCLK = DCO/1) + * SMCLK: DCO/4 (1MiHZ). + * TimerA: 1uis (1MiHZ), SMCLK/1 + * Default Bauds: based on SMCLK 1MiHZ. + * + * 4 MiHZ is chosen for low power reasons. Other processors support higher + * speeds but defaulting to 4 MiHZ simplifies a number of things. + * + * The x1 processors are spec'd by TI as having a max speed of 8MHz. TinyOS + * is spec'd as using binary time (see TEP102). So the simplest set up is + * to set the x1 clock to 4 MiHZ (4194304 HZ) while 8 MiHZ (8388608) exceeds + * the maximum clock speed as spec'd by TI. Not a good idea. + * + * x2 processors can be clocked up to 16 MHZ, so running at 8 MiHZ would work. + * A default of 4 MiHZ is chosen for lower power and to have a single main + * clock speed. + * + * We also want to have a single set of baud rates as the default. This + * requires having a default SMCLK frequency. We default to 1 MiHZ. * * ACLK (Aux Clk) is assumed to be run off the LFXT interface (low-freq) at * 32KiHz (32768). This clock is used to calibrate the main DCO clock and - * serves as the timer source to run s/w timers when sleeping. + * serves as the timer source for TB, the long term timer when sleeping. * - * MCLK (Main Clk) is run off the DCO (default FREQ) and is calibrated to - * a 32KiHz (32768) crystal (ACLK). DCO/1. + * MCLK (Main Clk) is run off the DCO and is calibrated to 32KiHz (32768) + * crystal (ACLK). DCO/1. * - * SMCLK (sub-main clock) is run directly off the DCO (FREQ). DCO/1. All - * peripherals are run off the SMCLK. For example, the SPI on UsciB is - * clocked from SMCLK so to get the maximum speed we want SMCLK to be DCO/1. + * SMCLK (sub-main clock) is run directly off the DCO (FREQ). DCO/(SMCLK_DIV). + * All peripherals are run off the SMCLK. The default should be 1MiHZ. Default + * baud rate setting are provided assuming this 1 MiHZ SMCLK setting. * - * TimerA is programmed to for 1uis ticks and is SMCLK/4 or SMCLK/8. /8 is - * the highest divisor available on an x1 or x2 proc. If MCLK is cranked - * faster than 8 MiHz either SMCLK can become DCO/2 (which slows the - * peripherals down) or the timer subsystem is changed to deal with a 500ns - * tick. + * TimerA is programmed for a 1uis tick and is SMCLK/(TIMERA_DIV). TIMERA_DIV can + * be a maximum of 8 on x1 or x2 procs. If MCLK is clocked faster than 8 MiHz + * either SMCLK can become DCO/2 (which slows the peripherals down) or the timer + * subsystem is changed to deal with a 512ns tick. * * TimerB is run off the 32KiHz crystal oscillator. This is used to provide * a stable time base for syncronizing the main DCO clock. It also provides * a stable timer that runs the timer system especially when the cpu is * sleeping. * - * XT2 isn't used for an external oscillator because it is expensive. Power - * wise and it has been measured to take roughly 5ms to power up and stabilize. - * You don't want to be doing that if one is putting the cpu to sleep a bunch. + * XT2 isn't used for an external oscillator because it is expensive and a power + * hog. It also takes a long time (measured ~5ms) to power up and stabilize. + * You don't want to be doing that if one is putting the cpu to sleep a bunch + * (which is needed for low power). * * WARNING: This module assumes that the 32KiHz XTAL has stablized. This - * is assumed to have been performed in the Platform Initilization. + * is assumed to have been performed in Platform Initilization. * * The Platform code gets executed on the way up and so certain assumptions can * be made about the state of clocking system. Otherwise we have to put the @@ -101,8 +131,18 @@ * Msp430DcoSpec provides cpu/platform data about clock speed. * * TARGET_DCO_HZ: DCO frequency - * ACLK_HZ: Auxilary clock frequency - * DIV_UIS: DCO divisor for main clock to yield 1uis ticks. + * ACLK_HZ: Auxiliary clock frequency + * SMCLK_DIV: Divisor for SMCLK + * TIMERA_DIV: Divisor for TimerA + * + * TimerA will be DCO/SMCLK_DIV/TIMERA_DIV and should be set for 1MiHZ or 1MHZ. + * + * Suggested set up (if in doubt): + * + * TARGET_DCO_HZ 4194304UL + * ACLK_HZ 32768UL + * SMCLK_DIV 4 + * TIMERA_DIV 1 */ #include "Msp430DcoSpec.h" @@ -121,26 +161,40 @@ #define RSEL_MASK (RSEL0 | RSEL1 | RSEL2) #define RSEL_MAX RSEL2 #else -#error "Msp430ClockP (bcs): processor doesn't support BASIC_CLOCK/BC2" +#error "Msp430ClockP (clock_bcs): processor doesn't support BASIC_CLOCK/BC2" #endif -#ifndef DIV_UIS -/* - * if DIV_UIS is not defined then assume we are running an x1 (1611) at - * 4 MiHz and the DIV_UIS divisor is 4 to yield 1uis ticks. - */ -#warning "ClockP: assuming 4MiHz and /4 divisor" -#define DIV_UIS 4 +#ifndef SMCLK_DIV +#error "ClockP: SMCLK_DIV needs to be defined." #endif -#if DIV_UIS == 4 -/* divisor 4, 4MiHz/4 = 1uis ticks. */ -#define UIS_DIV ID_2 -#elif DIV_UIS == 8 -/* divisor 8, 8MiHz/8 = 1uis ticks. */ -#define UIS_DIV ID_3 +#if SMCLK_DIV == 1 +#define SMCLK_DIVS DIVS_0 +#elif SMCLK_DIV == 2 +#define SMCLK_DIVS DIVS_1 +#elif SMCLK_DIV == 4 +#define SMCLK_DIVS DIVS_2 +#elif SMCLK_DIV == 8 +#define SMCLK_DIVS DIVS_3 #else -#error "ClockP: unknown DIV_UIS defined. Need valid DIV_UIS to proceed." +#error "ClockP: unknown SMCLK_DIV defined. Need valid SMCLK_DIV to proceed." +#endif + +#ifndef TIMERA_DIV +#error "ClockP: TIMERA_DIV needs to be defined." +#endif + +/* TA clock is DCO/SMCLK_DIV/TIMERA_DIV */ +#if TIMERA_DIV == 1 +#define TIMERA_ID ID_0 +#elif TIMERA_DIV == 2 +#define TIMERA_ID ID_1 +#elif TIMERA_DIV == 4 +#define TIMERA_ID ID_2 +#elif TIMERA_DIV == 8 +#define TIMERA_ID ID_3 +#else +#error "ClockP: unknown TIMERA_DIV defined. Need valid TIMERA_DIV to proceed." #endif module Msp430ClockP @safe() { @@ -208,9 +262,9 @@ implementation { // .SELM = 0; select DCOCLK as source for MCLK // .DIVM = 0; set the divisor of MCLK to 1 // .SELS = 0; select DCOCLK as source for SMCLK - // .DIVS = 0; set the divisor of SCLK to 1 + // .DIVS = xxx; set the divisor of SCLK to SMCLK_DIVS // .DCOR = 0; select internal resistor for DCO - BCSCTL2 = 0; + BCSCTL2 = SMCLK_DIVS; // BCSCTL3: use default, on reset set to 4, 6pF. @@ -223,11 +277,11 @@ implementation { // TACTL // .TASSEL = 2; source SMCLK = DCO/1 - // .ID = UIS_DIV; input divisor for 1uis ticks. + // .ID = TIMERA_ID; input divisor for 1uis ticks. // .MC = 0; initially disabled // .TACLR = 0; // .TAIE = 1; enable timer A interrupts - TACTL = TASSEL_2 | UIS_DIV | TAIE; + TACTL = TASSEL_2 | TIMERA_ID | TAIE; } command void Msp430ClockInit.defaultInitTimerB() { diff --git a/tos/chips/msp430/x1xxx/Msp430DcoSpec.h b/tos/chips/msp430/x1xxx/Msp430DcoSpec.h index 1153972c71..3fa7820af6 100644 --- a/tos/chips/msp430/x1xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x1xxx/Msp430DcoSpec.h @@ -59,7 +59,8 @@ */ #define TARGET_DCO_HZ 4194304UL #define ACLK_HZ 32768UL -#define DIV_UIS 4 +#define SMCLK_DIV 4 +#define TIMERA_DIV 1 #ifdef notdef /* deprecating in favor of _HZ which works for all cases */ diff --git a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h index 0f80287ab8..a3c3ce3e1c 100644 --- a/tos/chips/msp430/x2xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x2xxx/Msp430DcoSpec.h @@ -55,7 +55,8 @@ /* 8 MIHZ */ #define TARGET_DCO_HZ 8388608UL #define ACLK_HZ 32768UL -#define DIV_UIS 8 +#define SMCLK_DIV 1 +#define TIMERA_DIV 8 #ifdef notdef #define TARGET_DCO_KHZ 8192 // the target DCO clock rate in binary kHz diff --git a/tos/chips/msp430/x5xxx/Msp430DcoSpec.h b/tos/chips/msp430/x5xxx/Msp430DcoSpec.h index 3b0f892355..9a2c840ae2 100644 --- a/tos/chips/msp430/x5xxx/Msp430DcoSpec.h +++ b/tos/chips/msp430/x5xxx/Msp430DcoSpec.h @@ -56,7 +56,8 @@ /* 4 MiHZ, low power */ #define TARGET_DCO_HZ 4194304UL #define ACLK_HZ 32768UL -#define DIV_UIS 16 +#define SMCLK_DIV 4 +#define TIMERA_DIV 1 #ifdef notdef #define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz diff --git a/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h b/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h index 6f8060388c..0f6d6e5a1a 100644 --- a/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h +++ b/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h @@ -53,6 +53,8 @@ */ #define TARGET_DCO_HZ 4020000UL // the target MCLK clock rate in Hz. #define ACLK_HZ 32768UL // the ACLK rate in Hz +#define SMCLK_DIV 1 +#define TIMERA_DIV 4 // 1us ticks #ifdef notdef #define TARGET_DCO_KHZ 3926 // the target MCLK clock rate in binary kHz (4 020 000 Hz) diff --git a/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h b/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h index d753d9d7e9..d5a03a9ad5 100644 --- a/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h +++ b/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h @@ -48,7 +48,7 @@ #ifndef MSP430DCOSPEC_H #define MSP430DCOSPEC_H -#define ACLK_HZ 32768U +#define ACLK_HZ 32768UL #ifndef MCLK_MHZ #define MCLK_MHZ 8 @@ -56,12 +56,14 @@ #if MCLK_MHZ == 4 #define TARGET_DCO_HZ 4194304UL - #define DIV_UIS 4 - #define SMCLK_MHZ 4 + #define SMCLK_MHZ 4 + #define SMCLK_DIV 1 + #define TIMERA_DIV 4 #elif MCLK_MHZ == 8 #define TARGET_DCO_HZ 8388608UL - #define DIV_UIS 8 - #define SMCLK_MHZ 8 + #define SMCLK_MHZ 8 + #define SMCLK_DIV 1 + #define TIMERA_DIV 8 #else #error "Unsupported MCLK_MHZ setting" #endif From ce989c3d644b1ef83de2bf1f12640e312db0cf3e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 21 Dec 2011 00:39:08 -0800 Subject: [PATCH 225/411] gnode: update defines to use MIHZ rather than MHZ The gnode uses binary frequencies, update its defines to reflect MIHZ rather than MHZ (reflects decimal rather than binary) --- tos/platforms/gnode/PlatformSerialUsciP.nc | 4 ++-- .../gnode/chips/msp430/timer/Msp430DcoSpec.h | 18 +++++++++--------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/tos/platforms/gnode/PlatformSerialUsciP.nc b/tos/platforms/gnode/PlatformSerialUsciP.nc index d68adff3e6..2d9be68f39 100644 --- a/tos/platforms/gnode/PlatformSerialUsciP.nc +++ b/tos/platforms/gnode/PlatformSerialUsciP.nc @@ -16,8 +16,8 @@ implementation { #define CONCAT(a, b, c, d) CONCAT2(a, b, c, d) msp430_uart_union_config_t msp430_uart_config = {{ - ubr: CONCAT(UBR_, SMCLK_MHZ, MIHZ_, PLATFORM_SERIAL_BAUD_RATE), - umctl: CONCAT(UMCTL_, SMCLK_MHZ, MIHZ_, PLATFORM_SERIAL_BAUD_RATE), + ubr: CONCAT(UBR_, SMCLK_MIHZ, MIHZ_, PLATFORM_SERIAL_BAUD_RATE), + umctl: CONCAT(UMCTL_, SMCLK_MIHZ, MIHZ_, PLATFORM_SERIAL_BAUD_RATE), ucmode: 0, // UART mode ucspb: 0, // 1 stop bit uc7bit: 0, // 8 data bits diff --git a/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h b/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h index d5a03a9ad5..06adb82cc0 100644 --- a/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h +++ b/tos/platforms/gnode/chips/msp430/timer/Msp430DcoSpec.h @@ -39,8 +39,8 @@ * * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * - * Support different clock speeds: define MCLK_MHZ to the speed you want (4 or 8 MHz). - * Timer A always runs at 1 MHz. + * Support different clock speeds: define MCLK_MIHZ to the speed you want (4 or 8 MiHZ). + * Timer A always runs at 1 MiHZ. * @author Michiel Konstapel */ @@ -50,22 +50,22 @@ #define ACLK_HZ 32768UL -#ifndef MCLK_MHZ -#define MCLK_MHZ 8 +#ifndef MCLK_MIHZ +#define MCLK_MIHZ 8 #endif -#if MCLK_MHZ == 4 +#if MCLK_MIHZ == 4 #define TARGET_DCO_HZ 4194304UL - #define SMCLK_MHZ 4 + #define SMCLK_MIHZ 4 #define SMCLK_DIV 1 #define TIMERA_DIV 4 -#elif MCLK_MHZ == 8 +#elif MCLK_MIHZ == 8 #define TARGET_DCO_HZ 8388608UL - #define SMCLK_MHZ 8 + #define SMCLK_MIHZ 8 #define SMCLK_DIV 1 #define TIMERA_DIV 8 #else - #error "Unsupported MCLK_MHZ setting" + #error "Unsupported MCLK_MIHZ setting" #endif #endif From 866ec2ffa25ff9503ea37204e3ff65eb6cca6b33 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 21 Dec 2011 03:07:49 -0800 Subject: [PATCH 226/411] Add simple test for BusyMicroWait --- apps/tests/BusyMicroTest/BusyMicroTestC.nc | 19 +++++++++++++ apps/tests/BusyMicroTest/BusyMicroTestP.nc | 31 ++++++++++++++++++++++ apps/tests/BusyMicroTest/Makefile | 6 +++++ 3 files changed, 56 insertions(+) create mode 100644 apps/tests/BusyMicroTest/BusyMicroTestC.nc create mode 100644 apps/tests/BusyMicroTest/BusyMicroTestP.nc create mode 100644 apps/tests/BusyMicroTest/Makefile diff --git a/apps/tests/BusyMicroTest/BusyMicroTestC.nc b/apps/tests/BusyMicroTest/BusyMicroTestC.nc new file mode 100644 index 0000000000..91d405a940 --- /dev/null +++ b/apps/tests/BusyMicroTest/BusyMicroTestC.nc @@ -0,0 +1,19 @@ + +configuration BusyMicroTestC {} +implementation { + + components MainC, BusyMicroTestP as App, LedsC; + App.Boot -> MainC.Boot; + App.Leds -> LedsC; + + components new TimerMilliC() as Timer; + App.Timer -> Timer; + + components BusyWaitMicroC; + App.BusyWait -> BusyWaitMicroC; + + components HplMsp430GeneralIOC as GeneralIOC; + components new Msp430GpioC() as SCLKM; + SCLKM -> GeneralIOC.Port26; + App.SCLK -> SCLKM; +} diff --git a/apps/tests/BusyMicroTest/BusyMicroTestP.nc b/apps/tests/BusyMicroTest/BusyMicroTestP.nc new file mode 100644 index 0000000000..6c5f69d40b --- /dev/null +++ b/apps/tests/BusyMicroTest/BusyMicroTestP.nc @@ -0,0 +1,31 @@ + +#include "printfZ1.h" + +module BusyMicroTestP @safe() { + uses { + interface Leds; + interface Boot; + interface Timer; + interface BusyWait; + interface GeneralIO as SCLK; + } +} +implementation { + event void Boot.booted() { + printfz1_init(); +// call Timer.startPeriodic(4096); + call Leds.led1Toggle(); + + printfz1("booted\n"); + + call SCLK.makeOutput(); + while (1) { + call Leds.led2Toggle(); + call SCLK.toggle(); + call BusyWait.wait(1); + } + } + + event void Timer.fired() { + } +} diff --git a/apps/tests/BusyMicroTest/Makefile b/apps/tests/BusyMicroTest/Makefile new file mode 100644 index 0000000000..982f56e570 --- /dev/null +++ b/apps/tests/BusyMicroTest/Makefile @@ -0,0 +1,6 @@ +COMPONENT=BusyMicroTestC + +//CFLAGS += -DPRINTFUART_ENABLED +OPTFLAGS = -O0 -g -fnesc-no-inline + +include $(MAKERULES) From fa066d9eb81e793953414f91bbdb03c3a75cf138 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Sat, 3 Mar 2012 00:06:00 -0800 Subject: [PATCH 227/411] Update 00b_Development_Environment --- 00b_Development_Environment | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/00b_Development_Environment b/00b_Development_Environment index baa15be263..a6fd4267b2 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -1,5 +1,4 @@ - Installing a development environment for TinyOS (TinyProd). @@ -69,7 +68,7 @@ We want the following packages: mspdebug-tinyos tinyos-tools -You want to follow the instructions at: http://tinyprod.net/debian-dev. +You want to follow the instructions at: http://tinyprod.net/repos/debian-dev. The following should be equivilent. With some additions... From 4aeee1473c80eb0908423520b3079e2333b93c10 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Sat, 3 Mar 2012 17:35:49 -0800 Subject: [PATCH 228/411] Update 00b_Development_Environment: update which Ubuntu/Debian version have been tested and are supported. --- 00b_Development_Environment | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/00b_Development_Environment b/00b_Development_Environment index a6fd4267b2..73d8d19a74 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -1,11 +1,12 @@ - Installing a development environment for TinyOS (TinyProd). State: 2011-12-16: - Ubuntu 10.04 or 11.04. Debian Squeeze works as well. + Ubuntu 10.04 - 12.04. Debian Squeeze works as well. + Tested directly on 10.04 and 11.10, (12.04 in progress) + T2 (TinyProd) github:tp-freeforall/prod(msp430-int), mspdebug JTAG debugging. mspgcc-LTS20110716 toolchain with patches Toolchain from http://tinyprod.net/repos/debian-dev @@ -13,7 +14,7 @@ State: ************************************************************************************** This brief is written assuming that there is a common root directory, -we'll call it top and it is usually at the top level of a working +we'll call it "top" and it is usually at the top level of a working directory. ie. ~/top. You can put this directory anywhere, environment variables are used to tell the tools where things live. @@ -23,10 +24,11 @@ Most commands are entered from a terminal window. 1) OS Install. -We currently only support development using Linux Ubuntu 10.04 (lucid). 11.04 is also -known to behave. 10.04 was chosen because Mac laptops (MacBook Pros (3,1 and 7,1)) seem -to work pretty well using 10.04. 11.04 (natty) also works but the Macs run hot. (fans and cpu -throttling doesn't seem to work right). +Development is only supported on Linux hosts, in particular the Ubuntu and/or Debian +strains. Ubuntu 10.04 and 11.10 have been directly tested (on Apple MacBookPro laptops). +Ubuntu 12.04 is currently being tested. Mac support can be added to 10.04 and 10.10 and +is included directly in 11.10 and later versions. (MacBookPro 3,1 has been directly +tested). Obtain an ISO image from releases/ubuntu.com or alternativly from tinyprod.net/downloads. Burn the iso to a CD and install on your box. A simple install is fine and will From 290a1be1d5d07c2eba38c9fc587702f15edaaa99 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Thu, 8 Mar 2012 01:37:16 -0800 Subject: [PATCH 229/411] Clean up confusion about -pu and -next branches. -pu feeds -next that feeds main. --- 00d_Contribution_Process | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/00d_Contribution_Process b/00d_Contribution_Process index d5de42cdb4..7c8fa329fb 100644 --- a/00d_Contribution_Process +++ b/00d_Contribution_Process @@ -78,14 +78,15 @@ repositories. VeryBlessed (release) repository: (gh:tinyprod/prod) master: The main release line in TinyProd. Current stable point. - master-pu: proposed updates for next release, accepted and integrated. - master-next: 1st stage updates for next release. + master-next: next updates, accepted and integrated. + master-pu: 1st staged changes. Go into svn/upstream: tracks the upstream SVN T2 trunk. This is manually updated to schedule potential impact on downstream development. + This marks the base branch point for TinyProd. - master-next feeds master-pu which feeds master. When the next release - is done, master-pu becomes master and new master-pu and master-next + master-pu feeds master-next which feeds master. When the next release + is done, master-next becomes master and new master-next and master-pu branches are started. @@ -112,7 +113,7 @@ Blessed (integration) repository: (gh:tp-freeforall/prod) proposed updates for the feature. Note that branches are only created if the complexity of the development - structure warrants the complexity. This is left up to the discretion + structure warrants this complexity. This is left up to the discretion of the integration manager. @@ -167,7 +168,7 @@ Local repository: This will create the repository github.com//prod which is forked off github.com/tp-freeforall/prod. All working repos are forked off the tp-freeforall/prod repo. This is to keep the amount of - extra data in the main repository down to a minimum. + extra data in the main repository (tinyprod/prod) down to a minimum. For our virtual user this will create the repository gh:roberthunter/prod From 7533c2bd1c16460f4919dc648e23d6ab83b47483 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Sat, 17 Mar 2012 09:57:33 -0700 Subject: [PATCH 230/411] Add a better overview as to what this repository is all about --- 00a_Repo_Notes | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/00a_Repo_Notes b/00a_Repo_Notes index 2556cb1aa4..ee69247f3e 100644 --- a/00a_Repo_Notes +++ b/00a_Repo_Notes @@ -1,4 +1,3 @@ - WARNING: Default branch has been switched to *** msp430-int *** ============================================================================ @@ -10,6 +9,17 @@ See "Where to begin" (next section) for where to start. TinyProd tp-freeforall/prod +TinyProd is a more production/industrial orientated TinyOS repository. It +actively tracks the academic/development main TinyOS repository. While maintaining +proper production controls. The highly controlled release repository is +tinyprod/prod (github.com/tinyprod/prod). + +tp-freeforall is the main integration flavor and is used to integrate new code. +It is still managed but pretty much almost any new code is allowed to come in. +The intent is to provide an integration platform for new code proposed for addition +to the TinyProd code base. + + Default (Main working) Branch: (2011-12-16) msp430-int Integration cycle. Merging tinyos-main (SVN) -> msp430-int From ff76c042d94f42d8c7d6f01aa1fdf0a0f8b79a6e Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Sat, 17 Mar 2012 10:10:45 -0700 Subject: [PATCH 231/411] Add brief note about what current main feature of TP (new msp430 core) --- 00a_Repo_Notes | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/00a_Repo_Notes b/00a_Repo_Notes index ee69247f3e..4e70981407 100644 --- a/00a_Repo_Notes +++ b/00a_Repo_Notes @@ -20,7 +20,13 @@ The intent is to provide an integration platform for new code proposed for addit to the TinyProd code base. -Default (Main working) Branch: (2011-12-16) msp430-int +The current major feature of TP-freeforall is an integrated msp430 core. This includes +support for the 3 major TI msp430 families (x1, x2, and x5). See tos/chips/msp430/00_Chip_Notes +for more details. When the first TP release occurs, a better release note will be +written. This will occur immediately after the TinyOS 2.1.2 release occurs. + + +** Default (Main working) Branch:** (2011-12-16) msp430-int Integration cycle. Merging tinyos-main (SVN) -> msp430-int @@ -61,7 +67,7 @@ msp430-int-svn: continues along. (commits that should come into the ============================================================================ -Where to begin: +** Where to begin: ** 00a_Repo_Notes: (this file). For a general overview of what this Repo is about. Note this repository uses GIT as its DVCS. From 50b5f9296a975d91543f420af39e010ee9a18967 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Sat, 17 Mar 2012 10:14:11 -0700 Subject: [PATCH 232/411] update formatting --- 00a_Repo_Notes | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/00a_Repo_Notes b/00a_Repo_Notes index 4e70981407..fd9fabc283 100644 --- a/00a_Repo_Notes +++ b/00a_Repo_Notes @@ -10,9 +10,9 @@ TinyProd tp-freeforall/prod TinyProd is a more production/industrial orientated TinyOS repository. It -actively tracks the academic/development main TinyOS repository. While maintaining -proper production controls. The highly controlled release repository is -tinyprod/prod (github.com/tinyprod/prod). +actively tracks the academic/development main TinyOS repository. While +maintaining proper production controls. The highly controlled release +repository is tinyprod/prod (github.com/tinyprod/prod). tp-freeforall is the main integration flavor and is used to integrate new code. It is still managed but pretty much almost any new code is allowed to come in. @@ -20,10 +20,11 @@ The intent is to provide an integration platform for new code proposed for addit to the TinyProd code base. -The current major feature of TP-freeforall is an integrated msp430 core. This includes -support for the 3 major TI msp430 families (x1, x2, and x5). See tos/chips/msp430/00_Chip_Notes -for more details. When the first TP release occurs, a better release note will be -written. This will occur immediately after the TinyOS 2.1.2 release occurs. +The current major feature of TP-freeforall is an integrated msp430 core. This +includes support for the 3 major TI msp430 families (x1, x2, and x5). See +tos/chips/msp430/00_Chip_Notes for more details. When the first TP release occurs, +a better release note will be written. This will occur immediately after the +TinyOS 2.1.2 release occurs. ** Default (Main working) Branch:** (2011-12-16) msp430-int From 1a3e898c8208d2fb13f75643f367a99fb4d3cb87 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Wed, 4 Apr 2012 04:13:02 -0700 Subject: [PATCH 233/411] revise the instructions for setting up sources.list.d/tinyprod-debian.list. --- 00b_Development_Environment | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/00b_Development_Environment b/00b_Development_Environment index 73d8d19a74..1fad00c8d9 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -30,7 +30,7 @@ Ubuntu 12.04 is currently being tested. Mac support can be added to 10.04 and 1 is included directly in 11.10 and later versions. (MacBookPro 3,1 has been directly tested). -Obtain an ISO image from releases/ubuntu.com or alternativly from tinyprod.net/downloads. +Obtain an ISO image from releases/ubuntu.com or alternatively from tinyprod.net/downloads. Burn the iso to a CD and install on your box. A simple install is fine and will take less time. @@ -54,9 +54,9 @@ exit 2) Install the TinyOS toolset (msp430) -We want the tinyos toolset for msp430 based motes (telosb). Debian packages -are available from Stanford and TinyProd.net. The toolchain at TinyProd.Net -is more up to date. +We want the tinyos toolset for msp430 based motes (ie, telosb, msp430f1611). Debian packages +are available from Stanford and TinyProd.net. The toolchain at TinyProd.Net as of +(April 4, 2012) is more up to date. We want the following packages: @@ -70,7 +70,7 @@ We want the following packages: mspdebug-tinyos tinyos-tools -You want to follow the instructions at: http://tinyprod.net/repos/debian-dev. +You want to follow the instructions at: http://tinyprod.net/repos/debian. The following should be equivilent. With some additions... @@ -83,9 +83,9 @@ gpg -a --export F99BE531 | sudo apt-key add - sudo -s # -# add the repo pointer into sources.list +# teach dpkt/apt-get/aptitude about where to find the tinyprod tools repository # -echo "deb http://tinyprod.net/repos/debian-dev squeeze main" >> /etc/apt/sources.list +echo "deb http://tinyprod.net/repos/debian squeeze main" >> /etc/apt/sources.list.d/tinyprod-debian.list apt-get update apt-get install nesc msp430-tinyos mspdebug-tinyos tinyos-tools exit From d53aac6acd6d5b8276bdbbecc602aa11e61d60eb Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Wed, 11 Apr 2012 10:37:26 +0200 Subject: [PATCH 234/411] Add license to gnode files (standard TinyOS Intel license). --- tos/platforms/gnode/ActiveMessageC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/DefaultAdcConfigureC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/DummyGeneralIOC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/GeneralIOC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/LocalTime32khzC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/PlatformC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/PlatformClockC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/PlatformLedsC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/PlatformP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/PlatformPinsC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/PlatformSerialC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/PlatformSerialUsciP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/TimeSyncMessageC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/VoltageC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/VoltageP.nc | 25 +++++++++++++++++++ .../gnode/chips/23axxx/Microchip23AxxxC.nc | 25 +++++++++++++++++++ .../gnode/chips/23axxx/Microchip23AxxxP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/chips/23axxx/SRAM.nc | 25 +++++++++++++++++++ tos/platforms/gnode/chips/23axxx/SRAMC.nc | 25 +++++++++++++++++++ .../gnode/chips/23axxx/SRAMQueueC.nc | 25 +++++++++++++++++++ .../gnode/chips/23axxx/SRAMQueueP.nc | 25 +++++++++++++++++++ .../chips/cc1101/ChipconRegisterValues.h | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/ChipconAssert.h | 25 +++++++++++++++++++ tos/platforms/gnode/chips/ccpacket/ack/Ack.h | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/ack/AckC.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/ack/AckP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/chips/ccpacket/am/AM.h | 25 +++++++++++++++++++ .../ccpacket/am/ActiveMessageAddressC.nc | 25 +++++++++++++++++++ .../ccpacket/am/ChipconActiveMessageC.nc | 25 +++++++++++++++++++ .../ccpacket/am/ChipconActiveMessageP.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/am/NetMask.nc | 25 +++++++++++++++++++ .../chips/ccpacket/hal/ChipconRegisters.h | 25 +++++++++++++++++++ .../chips/ccpacket/hal/HalChipconControl.h | 25 +++++++++++++++++++ .../chips/ccpacket/hal/HalChipconControl.nc | 25 +++++++++++++++++++ .../chips/ccpacket/hal/HalChipconControlC.nc | 25 +++++++++++++++++++ .../chips/ccpacket/hal/HalChipconControlP.nc | 25 +++++++++++++++++++ .../chips/ccpacket/lpl/LowPowerListening.h | 25 +++++++++++++++++++ .../chips/ccpacket/lpl/LowPowerListeningC.nc | 25 +++++++++++++++++++ .../chips/ccpacket/lpl/LowPowerListeningP.nc | 25 +++++++++++++++++++ .../ccpacket/lpl/NoLowPowerListeningC.nc | 25 +++++++++++++++++++ .../ccpacket/lpl/NoLowPowerListeningP.nc | 25 +++++++++++++++++++ .../chips/ccpacket/packet/ChipconPacket.h | 25 +++++++++++++++++++ .../chips/ccpacket/packet/ChipconPacket.nc | 25 +++++++++++++++++++ .../chips/ccpacket/packet/ChipconPacketC.nc | 25 +++++++++++++++++++ .../chips/ccpacket/packet/ChipconPacketP.nc | 25 +++++++++++++++++++ .../chips/ccpacket/packet/PacketMetadata.nc | 25 +++++++++++++++++++ .../chips/ccpacket/packet/PacketMetadataC.nc | 25 +++++++++++++++++++ .../chips/ccpacket/packet/PacketMetadataP.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/rxtx/PowerP.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/rxtx/ReceiveP.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/rxtx/SendNotify.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/rxtx/SendP.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/rxtx/SendReceiveC.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/rxtx/SendReceiveP.nc | 25 +++++++++++++++++++ .../chips/ccpacket/spi/DedicatedResourceC.nc | 25 +++++++++++++++++++ .../ccpacket/spi/HplChipconHardwareSpiC.nc | 25 +++++++++++++++++++ .../ccpacket/spi/HplChipconPacketRadioC.nc | 25 +++++++++++++++++++ .../ccpacket/spi/HplChipconSoftwareSpiC.nc | 25 +++++++++++++++++++ .../ccpacket/spi/HplChipconSoftwareSpiP.nc | 25 +++++++++++++++++++ .../gnode/chips/ccpacket/spi/HplChipconSpi.nc | 25 +++++++++++++++++++ .../chips/ccpacket/spi/HplChipconSpiB0P.nc | 25 +++++++++++++++++++ .../ccpacket/spi/HplChipconSpiGenericP.nc | 25 +++++++++++++++++++ .../timesync/ChipconTimeSyncMessageC.nc | 25 +++++++++++++++++++ .../ccpacket/timesync/PacketTimeStampC.nc | 25 +++++++++++++++++++ .../ccpacket/timesync/PacketTimeStampP.nc | 25 +++++++++++++++++++ .../chips/ccpacket/timesync/PacketTimeSync.h | 25 +++++++++++++++++++ .../ccpacket/timesync/PacketTimeSyncC.nc | 25 +++++++++++++++++++ .../ccpacket/timesync/PacketTimeSyncP.nc | 25 +++++++++++++++++++ .../gnode/chips/msp430/StackGuardWatchDogC.nc | 25 +++++++++++++++++++ .../gnode/chips/msp430/StackGuardWatchDogP.nc | 25 +++++++++++++++++++ .../chips/msp430/pins/Msp430GeneralIOC.nc | 25 +++++++++++++++++++ .../chips/msp430/pins/Msp430GeneralIOP.nc | 25 +++++++++++++++++++ .../gnode/chips/msp430/pins/msp430_ports.h | 25 +++++++++++++++++++ tos/platforms/gnode/hardware.h | 25 +++++++++++++++++++ tos/platforms/gnode/lib/assert/Assert.h | 25 +++++++++++++++++++ tos/platforms/gnode/lib/assert/AssertReboot.h | 25 +++++++++++++++++++ .../gnode/lib/assert/AssertRebootC.nc | 25 +++++++++++++++++++ .../gnode/lib/assert/AssertRebootP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/assert/AssertUart.h | 25 +++++++++++++++++++ tos/platforms/gnode/lib/assert/AssertUartC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/assert/AssertUartP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/assert/Reboot.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/assert/RebootC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/printf/NoPrintfC.nc | 25 +++++++++++++++++++ .../gnode/lib/printf/OutputStream.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/printf/PrintfC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/printf/PrintfFlush.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/printf/PrintfP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/printf/Putchar.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/printf/PutcharC.nc | 25 +++++++++++++++++++ .../gnode/lib/printf/UartOutputStreamC.nc | 25 +++++++++++++++++++ .../gnode/lib/printf/UartOutputStreamP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/printf/noprintf.h | 25 +++++++++++++++++++ tos/platforms/gnode/lib/printf/printf.h | 25 +++++++++++++++++++ tos/platforms/gnode/lib/spi/SoftwareSpiC.nc | 25 +++++++++++++++++++ tos/platforms/gnode/lib/spi/SoftwareSpiP.nc | 25 +++++++++++++++++++ tos/platforms/gnode/platform.h | 25 +++++++++++++++++++ tos/platforms/gnode/platform_message.h | 25 +++++++++++++++++++ 98 files changed, 2450 insertions(+) diff --git a/tos/platforms/gnode/ActiveMessageC.nc b/tos/platforms/gnode/ActiveMessageC.nc index 578512b08f..9403e5fc9f 100644 --- a/tos/platforms/gnode/ActiveMessageC.nc +++ b/tos/platforms/gnode/ActiveMessageC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "AM.h" #include "Timer.h" diff --git a/tos/platforms/gnode/DefaultAdcConfigureC.nc b/tos/platforms/gnode/DefaultAdcConfigureC.nc index 96ea24710b..f311d62e7f 100644 --- a/tos/platforms/gnode/DefaultAdcConfigureC.nc +++ b/tos/platforms/gnode/DefaultAdcConfigureC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "Msp430Adc12.h" /** diff --git a/tos/platforms/gnode/DummyGeneralIOC.nc b/tos/platforms/gnode/DummyGeneralIOC.nc index 5ad6056929..d5abc79fd8 100644 --- a/tos/platforms/gnode/DummyGeneralIOC.nc +++ b/tos/platforms/gnode/DummyGeneralIOC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Do-nothing GeneralIO/GpioInterrupt implementation. */ diff --git a/tos/platforms/gnode/GeneralIOC.nc b/tos/platforms/gnode/GeneralIOC.nc index d3d8044f0d..6180136237 100644 --- a/tos/platforms/gnode/GeneralIOC.nc +++ b/tos/platforms/gnode/GeneralIOC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Wraps/renames Msp430GeneralIOC. */ diff --git a/tos/platforms/gnode/LocalTime32khzC.nc b/tos/platforms/gnode/LocalTime32khzC.nc index f3a8e7a0f5..acaf937cfd 100644 --- a/tos/platforms/gnode/LocalTime32khzC.nc +++ b/tos/platforms/gnode/LocalTime32khzC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "Timer.h" configuration LocalTime32khzC { diff --git a/tos/platforms/gnode/PlatformC.nc b/tos/platforms/gnode/PlatformC.nc index 26b04b5816..27d46a2a46 100644 --- a/tos/platforms/gnode/PlatformC.nc +++ b/tos/platforms/gnode/PlatformC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "hardware.h" // some TinyOS apps don't include this, diff --git a/tos/platforms/gnode/PlatformClockC.nc b/tos/platforms/gnode/PlatformClockC.nc index e71775b9b0..9bd9c5775d 100644 --- a/tos/platforms/gnode/PlatformClockC.nc +++ b/tos/platforms/gnode/PlatformClockC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + configuration PlatformClockC { provides interface Init; } diff --git a/tos/platforms/gnode/PlatformLedsC.nc b/tos/platforms/gnode/PlatformLedsC.nc index 84cb225557..e32b4b2cb3 100644 --- a/tos/platforms/gnode/PlatformLedsC.nc +++ b/tos/platforms/gnode/PlatformLedsC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + configuration PlatformLedsC { provides interface GeneralIO as Led0; provides interface GeneralIO as Led1; diff --git a/tos/platforms/gnode/PlatformP.nc b/tos/platforms/gnode/PlatformP.nc index 775691331b..eb8550139e 100644 --- a/tos/platforms/gnode/PlatformP.nc +++ b/tos/platforms/gnode/PlatformP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Initialize the node by calling all connected Init interfaces. * Order of initialization is determined by the "level" they are wired to. diff --git a/tos/platforms/gnode/PlatformPinsC.nc b/tos/platforms/gnode/PlatformPinsC.nc index 382b8ebeb2..b31f50faab 100644 --- a/tos/platforms/gnode/PlatformPinsC.nc +++ b/tos/platforms/gnode/PlatformPinsC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + configuration PlatformPinsC { provides interface Init; } diff --git a/tos/platforms/gnode/PlatformSerialC.nc b/tos/platforms/gnode/PlatformSerialC.nc index bc7121d754..dd0601cb1a 100644 --- a/tos/platforms/gnode/PlatformSerialC.nc +++ b/tos/platforms/gnode/PlatformSerialC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Use UART0 as the platform UART. * Offers AsyncStdControl as well. diff --git a/tos/platforms/gnode/PlatformSerialUsciP.nc b/tos/platforms/gnode/PlatformSerialUsciP.nc index 2d9be68f39..1384f96c7c 100644 --- a/tos/platforms/gnode/PlatformSerialUsciP.nc +++ b/tos/platforms/gnode/PlatformSerialUsciP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + module PlatformSerialUsciP { provides interface StdControl; provides interface AsyncStdControl; diff --git a/tos/platforms/gnode/TimeSyncMessageC.nc b/tos/platforms/gnode/TimeSyncMessageC.nc index 8817b00d2a..fb62ebff66 100644 --- a/tos/platforms/gnode/TimeSyncMessageC.nc +++ b/tos/platforms/gnode/TimeSyncMessageC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "PacketTimeSync.h" configuration TimeSyncMessageC { diff --git a/tos/platforms/gnode/VoltageC.nc b/tos/platforms/gnode/VoltageC.nc index b20c8805e1..e449960376 100644 --- a/tos/platforms/gnode/VoltageC.nc +++ b/tos/platforms/gnode/VoltageC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * VoltageC wraps Msp430InternalVoltageC and converts the output to millivolts. */ diff --git a/tos/platforms/gnode/VoltageP.nc b/tos/platforms/gnode/VoltageP.nc index 0ffb4fd8ee..015c73b02c 100644 --- a/tos/platforms/gnode/VoltageP.nc +++ b/tos/platforms/gnode/VoltageP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Convert the output of the internal voltage measurement to millivolts. */ diff --git a/tos/platforms/gnode/chips/23axxx/Microchip23AxxxC.nc b/tos/platforms/gnode/chips/23axxx/Microchip23AxxxC.nc index 0d1570106f..20da865ec3 100644 --- a/tos/platforms/gnode/chips/23axxx/Microchip23AxxxC.nc +++ b/tos/platforms/gnode/chips/23axxx/Microchip23AxxxC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + generic configuration Microchip23AxxxC() { provides { interface SRAM; diff --git a/tos/platforms/gnode/chips/23axxx/Microchip23AxxxP.nc b/tos/platforms/gnode/chips/23axxx/Microchip23AxxxP.nc index 4dedbdd797..43b8cda4c7 100644 --- a/tos/platforms/gnode/chips/23axxx/Microchip23AxxxP.nc +++ b/tos/platforms/gnode/chips/23axxx/Microchip23AxxxP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "Assert.h" generic module Microchip23AxxxP() { diff --git a/tos/platforms/gnode/chips/23axxx/SRAM.nc b/tos/platforms/gnode/chips/23axxx/SRAM.nc index 217df1199d..a9d315258e 100644 --- a/tos/platforms/gnode/chips/23axxx/SRAM.nc +++ b/tos/platforms/gnode/chips/23axxx/SRAM.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + interface SRAM { command void read(uint16_t addr, uint8_t len, void* buffer); command void write(uint16_t addr, uint8_t len, void* buffer); diff --git a/tos/platforms/gnode/chips/23axxx/SRAMC.nc b/tos/platforms/gnode/chips/23axxx/SRAMC.nc index 6e89464ccf..0d52b40ebb 100644 --- a/tos/platforms/gnode/chips/23axxx/SRAMC.nc +++ b/tos/platforms/gnode/chips/23axxx/SRAMC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + configuration SRAMC { provides interface SRAM; } diff --git a/tos/platforms/gnode/chips/23axxx/SRAMQueueC.nc b/tos/platforms/gnode/chips/23axxx/SRAMQueueC.nc index 548ceebd28..6ec117b986 100644 --- a/tos/platforms/gnode/chips/23axxx/SRAMQueueC.nc +++ b/tos/platforms/gnode/chips/23axxx/SRAMQueueC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides a BigQueue implementation backed by the SRAM chip. */ diff --git a/tos/platforms/gnode/chips/23axxx/SRAMQueueP.nc b/tos/platforms/gnode/chips/23axxx/SRAMQueueP.nc index 411ace7f46..0ec1a652e2 100644 --- a/tos/platforms/gnode/chips/23axxx/SRAMQueueP.nc +++ b/tos/platforms/gnode/chips/23axxx/SRAMQueueP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + generic module SRAMQueueP(typedef queue_t, uint16_t QUEUE_SIZE, uint16_t OFFSET) { provides { interface BigQueue; diff --git a/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h b/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h index 44f8ada162..2175864c53 100644 --- a/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h +++ b/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef CHIPCON_REGISTER_VALUES_H #define CHIPCON_REGISTER_VALUES_H diff --git a/tos/platforms/gnode/chips/ccpacket/ChipconAssert.h b/tos/platforms/gnode/chips/ccpacket/ChipconAssert.h index 064e98ea26..bdcf0ffc92 100644 --- a/tos/platforms/gnode/chips/ccpacket/ChipconAssert.h +++ b/tos/platforms/gnode/chips/ccpacket/ChipconAssert.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef CHIPCON_ASSERT_H #define CHIPCON_ASSERT_H diff --git a/tos/platforms/gnode/chips/ccpacket/ack/Ack.h b/tos/platforms/gnode/chips/ccpacket/ack/Ack.h index b3b4f6058a..6c05bf9e3d 100644 --- a/tos/platforms/gnode/chips/ccpacket/ack/Ack.h +++ b/tos/platforms/gnode/chips/ccpacket/ack/Ack.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef ACK_H #define ACK_H diff --git a/tos/platforms/gnode/chips/ccpacket/ack/AckC.nc b/tos/platforms/gnode/chips/ccpacket/ack/AckC.nc index a41bd69538..716fc96f1f 100644 --- a/tos/platforms/gnode/chips/ccpacket/ack/AckC.nc +++ b/tos/platforms/gnode/chips/ccpacket/ack/AckC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides synchronous acknowledgements. * Must be wired into the stack below LowPowerListening. diff --git a/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc b/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc index 703293ba42..4243a2d106 100644 --- a/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc +++ b/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides synchronous acknowledgements. * diff --git a/tos/platforms/gnode/chips/ccpacket/am/AM.h b/tos/platforms/gnode/chips/ccpacket/am/AM.h index cda6c786f4..72dbabe755 100644 --- a/tos/platforms/gnode/chips/ccpacket/am/AM.h +++ b/tos/platforms/gnode/chips/ccpacket/am/AM.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef AM_H #define AM_H diff --git a/tos/platforms/gnode/chips/ccpacket/am/ActiveMessageAddressC.nc b/tos/platforms/gnode/chips/ccpacket/am/ActiveMessageAddressC.nc index 2d9ba185ad..4383f0381e 100644 --- a/tos/platforms/gnode/chips/ccpacket/am/ActiveMessageAddressC.nc +++ b/tos/platforms/gnode/chips/ccpacket/am/ActiveMessageAddressC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Component that stores the node's active message address and group ID. * The L-node provides its own because our AM address includes the AM group bits. diff --git a/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageC.nc b/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageC.nc index 49e9da625a..38c7553301 100644 --- a/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageC.nc +++ b/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "AM.h" #include "ChipconAssert.h" diff --git a/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageP.nc b/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageP.nc index e78155c371..4b4f69e7e3 100644 --- a/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageP.nc +++ b/tos/platforms/gnode/chips/ccpacket/am/ChipconActiveMessageP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * The Active Message layer for the Chipcon packet radio. */ diff --git a/tos/platforms/gnode/chips/ccpacket/am/NetMask.nc b/tos/platforms/gnode/chips/ccpacket/am/NetMask.nc index b9e73e55ac..1f0e871481 100644 --- a/tos/platforms/gnode/chips/ccpacket/am/NetMask.nc +++ b/tos/platforms/gnode/chips/ccpacket/am/NetMask.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "AM.h" /** diff --git a/tos/platforms/gnode/chips/ccpacket/hal/ChipconRegisters.h b/tos/platforms/gnode/chips/ccpacket/hal/ChipconRegisters.h index 14828c9fe9..3c3f778242 100644 --- a/tos/platforms/gnode/chips/ccpacket/hal/ChipconRegisters.h +++ b/tos/platforms/gnode/chips/ccpacket/hal/ChipconRegisters.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef CHIPCON_REGISTERS_H #define CHIPCON_REGISTERS_H diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.h b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.h index 87c0098ccd..df3b94e064 100644 --- a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.h +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef HAL_CHIPCON_CONTROL_H #define HAL_CHIPCON_CONTROL_H diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.nc b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.nc index 838f22327a..56eebf22fd 100644 --- a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.nc +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControl.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + interface HalChipconControl { /** diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlC.nc b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlC.nc index 0cd11483d7..fc93314c1e 100644 --- a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlC.nc +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "AM.h" #include "HalChipconControl.h" diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc index 6c8e1be869..110a2f1f92 100644 --- a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "Assert.h" #include "ChipconRegisters.h" #include "ChipconRegisterValues.h" diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.h b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.h index 13c5b0acf8..b9598b2ef3 100644 --- a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.h +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListening.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef LOW_POWER_LISTENING_H #define LOW_POWER_LISTENING_H diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningC.nc b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningC.nc index 41fd028500..b3af124bae 100644 --- a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningC.nc +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "LowPowerListening.h" /** diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc index 6b32bd6d80..a5ca5c6cf5 100644 --- a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides duty cycling/low power listening. */ diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningC.nc b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningC.nc index 276a12c3d0..5c33d185cb 100644 --- a/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningC.nc +++ b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Disables duty cycling/low power listening, although you can still send to a node which duty cycles. */ diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc index e1ea2c1191..49a3acf013 100644 --- a/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc +++ b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Disables duty cycling/low power listening, although you can still send to a node which duty cycles. */ diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h index 487c79e8e9..223b882496 100644 --- a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef CHIPCON_PACKET_H #define CHIPCON_PACKET_H diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.nc b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.nc index fed223ae8c..08a7c05c64 100644 --- a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.nc +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "message.h" #include "ChipconPacket.h" diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketC.nc b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketC.nc index 59c0f37c2c..2f1ff7b103 100644 --- a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketC.nc +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + configuration ChipconPacketC { provides { interface ChipconPacket; diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketP.nc b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketP.nc index 83006eb0a7..5ef574b835 100644 --- a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketP.nc +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacketP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "message.h" module ChipconPacketP { diff --git a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadata.nc b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadata.nc index 610c2bc434..e1f35946f5 100644 --- a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadata.nc +++ b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadata.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "message.h" /** diff --git a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataC.nc b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataC.nc index 8857336fd3..b78c0a3351 100644 --- a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataC.nc +++ b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + configuration PacketMetadataC { provides { interface PacketMetadata; diff --git a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataP.nc b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataP.nc index 2c77c3c527..92c13963b4 100644 --- a/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataP.nc +++ b/tos/platforms/gnode/chips/ccpacket/packet/PacketMetadataP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "ChipconRegisterValues.h" /** diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/PowerP.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/PowerP.nc index 592dba68a2..59ca924030 100644 --- a/tos/platforms/gnode/chips/ccpacket/rxtx/PowerP.nc +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/PowerP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + module PowerP { provides interface StdControl; uses interface HalChipconControl; diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/ReceiveP.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/ReceiveP.nc index 4593d347ce..dcde3622eb 100644 --- a/tos/platforms/gnode/chips/ccpacket/rxtx/ReceiveP.nc +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/ReceiveP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides the basic TinyOS Receive interface on top of the HAL interface and * timestamps received packets. diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/SendNotify.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/SendNotify.nc index 0ea36c9b4e..6d59eaf425 100644 --- a/tos/platforms/gnode/chips/ccpacket/rxtx/SendNotify.nc +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/SendNotify.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + interface SendNotify { /** * A message is about to be sent. diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/SendP.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/SendP.nc index 086c0ab6bf..180c1cb405 100644 --- a/tos/platforms/gnode/chips/ccpacket/rxtx/SendP.nc +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/SendP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "Assert.h" #include "LowPowerListening.h" diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveC.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveC.nc index 433071686c..81919f0026 100644 --- a/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveC.nc +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Wire up Send, Receive and Power modules to provide a minimal HIL stack. */ diff --git a/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveP.nc b/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveP.nc index 0c35f7c6d1..168678d920 100644 --- a/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveP.nc +++ b/tos/platforms/gnode/chips/ccpacket/rxtx/SendReceiveP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Integrates the Send, Receive and Power paths to provide consistent access to the underlying radio. */ diff --git a/tos/platforms/gnode/chips/ccpacket/spi/DedicatedResourceC.nc b/tos/platforms/gnode/chips/ccpacket/spi/DedicatedResourceC.nc index abcb555ef1..750c74e60c 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/DedicatedResourceC.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/DedicatedResourceC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Resource implementation that just tracks whether it is owned or not, for a single owner. */ diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc index 2fa03c8036..893dc052f7 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Use USCI B0 as SPI for the radio. */ diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconPacketRadioC.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconPacketRadioC.nc index 58fcc9bacc..bcb2ab594a 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconPacketRadioC.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconPacketRadioC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides the GPIO and SPI interface to a Chipcon radio. */ diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc index fa1b7f6db2..44e8fd0319 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides a software implementation of the SPI protocol for use on MSP430 processors * that do not have a hardware SPI bus. diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiP.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiP.nc index 506baf1890..43087e6432 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiP.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides a software implementation of the SPI protocol for use on MSP430 processors * that do not have a hardware SPI bus. diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpi.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpi.nc index 01db0e6389..96c67386f1 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpi.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpi.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + interface HplChipconSpi { /** * Send a command strobe and return the chip status byte. diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiB0P.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiB0P.nc index a196bfba8a..ededec9697 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiB0P.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiB0P.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides an optimized hardware implementation of the SPI protocol using USCI B0, * based on TI's example code (SLAA325 - http://www.ti.com/lit/zip/slaa325). diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiGenericP.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiGenericP.nc index f686447357..988c338530 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiGenericP.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSpiGenericP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides a generic implementation of the SPI protocol using an SpiByte provider. */ diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/ChipconTimeSyncMessageC.nc b/tos/platforms/gnode/chips/ccpacket/timesync/ChipconTimeSyncMessageC.nc index 7cefdd83dd..e6f8cbe9a1 100644 --- a/tos/platforms/gnode/chips/ccpacket/timesync/ChipconTimeSyncMessageC.nc +++ b/tos/platforms/gnode/chips/ccpacket/timesync/ChipconTimeSyncMessageC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "PacketTimeSync.h" configuration ChipconTimeSyncMessageC { diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampC.nc b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampC.nc index c9a842a56b..0f9440fdf6 100644 --- a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampC.nc +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "PacketTimeSync.h" /** diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampP.nc b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampP.nc index 05bf71c7c6..1b36dfb048 100644 --- a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampP.nc +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeStampP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + module PacketTimeStampP { provides { interface PacketTimeStamp as PacketTimeStampMilli; diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSync.h b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSync.h index 865dc22295..a80ed34eea 100644 --- a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSync.h +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSync.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef PACKET_TIMESYNC_H #define PACKET_TIMESYNC_H diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncC.nc b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncC.nc index f6203db69b..51833a2a43 100644 --- a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncC.nc +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "PacketTimeSync.h" configuration PacketTimeSyncC { diff --git a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncP.nc b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncP.nc index 252a5054bf..580d21a680 100644 --- a/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncP.nc +++ b/tos/platforms/gnode/chips/ccpacket/timesync/PacketTimeSyncP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + module PacketTimeSyncP { provides { interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; diff --git a/tos/platforms/gnode/chips/msp430/StackGuardWatchDogC.nc b/tos/platforms/gnode/chips/msp430/StackGuardWatchDogC.nc index b7793d7c0e..881225fc64 100644 --- a/tos/platforms/gnode/chips/msp430/StackGuardWatchDogC.nc +++ b/tos/platforms/gnode/chips/msp430/StackGuardWatchDogC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + configuration StackGuardWatchDogC { provides { interface Init; diff --git a/tos/platforms/gnode/chips/msp430/StackGuardWatchDogP.nc b/tos/platforms/gnode/chips/msp430/StackGuardWatchDogP.nc index 975aa2ca9d..ea8d62f6d9 100644 --- a/tos/platforms/gnode/chips/msp430/StackGuardWatchDogP.nc +++ b/tos/platforms/gnode/chips/msp430/StackGuardWatchDogP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Periodically checks for stack overflow and resets the watchdog. * If a stack overflow is detected, an assertion is generated. diff --git a/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOC.nc b/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOC.nc index 6bf2d4ba88..c5093844c4 100644 --- a/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOC.nc +++ b/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "msp430_ports.h" /** diff --git a/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOP.nc b/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOP.nc index 1480bce8c7..fc192bcba2 100644 --- a/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOP.nc +++ b/tos/platforms/gnode/chips/msp430/pins/Msp430GeneralIOP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "msp430_ports.h" module Msp430GeneralIOP { diff --git a/tos/platforms/gnode/chips/msp430/pins/msp430_ports.h b/tos/platforms/gnode/chips/msp430/pins/msp430_ports.h index 2a69a74103..e0676d0e77 100644 --- a/tos/platforms/gnode/chips/msp430/pins/msp430_ports.h +++ b/tos/platforms/gnode/chips/msp430/pins/msp430_ports.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef MSP430_PORTS_H #define MSP430_PORTS_H diff --git a/tos/platforms/gnode/hardware.h b/tos/platforms/gnode/hardware.h index 8f6f29b03b..d31a96997c 100644 --- a/tos/platforms/gnode/hardware.h +++ b/tos/platforms/gnode/hardware.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef _H_hardware_h #define _H_hardware_h #include "msp430hardware.h" diff --git a/tos/platforms/gnode/lib/assert/Assert.h b/tos/platforms/gnode/lib/assert/Assert.h index 9b431e200c..fbb261938d 100644 --- a/tos/platforms/gnode/lib/assert/Assert.h +++ b/tos/platforms/gnode/lib/assert/Assert.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef ASSERT_H #define ASSERT_H diff --git a/tos/platforms/gnode/lib/assert/AssertReboot.h b/tos/platforms/gnode/lib/assert/AssertReboot.h index b28d7c08c8..79a622445c 100644 --- a/tos/platforms/gnode/lib/assert/AssertReboot.h +++ b/tos/platforms/gnode/lib/assert/AssertReboot.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef ASSERTREBOOT_H #define ASSERTREBOOT_H diff --git a/tos/platforms/gnode/lib/assert/AssertRebootC.nc b/tos/platforms/gnode/lib/assert/AssertRebootC.nc index 8d2bd5125b..bd197fcfe6 100644 --- a/tos/platforms/gnode/lib/assert/AssertRebootC.nc +++ b/tos/platforms/gnode/lib/assert/AssertRebootC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "AssertReboot.h" /** diff --git a/tos/platforms/gnode/lib/assert/AssertRebootP.nc b/tos/platforms/gnode/lib/assert/AssertRebootP.nc index f46413a9e9..b40c76ef1a 100644 --- a/tos/platforms/gnode/lib/assert/AssertRebootP.nc +++ b/tos/platforms/gnode/lib/assert/AssertRebootP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Handles failed assertions by rebooting the node. */ diff --git a/tos/platforms/gnode/lib/assert/AssertUart.h b/tos/platforms/gnode/lib/assert/AssertUart.h index 9d0623eeaa..fe755e8ef3 100644 --- a/tos/platforms/gnode/lib/assert/AssertUart.h +++ b/tos/platforms/gnode/lib/assert/AssertUart.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef ASSERTUART_H #define ASSERTUART_H diff --git a/tos/platforms/gnode/lib/assert/AssertUartC.nc b/tos/platforms/gnode/lib/assert/AssertUartC.nc index dd6863218d..c9a272f8c9 100644 --- a/tos/platforms/gnode/lib/assert/AssertUartC.nc +++ b/tos/platforms/gnode/lib/assert/AssertUartC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "AssertUart.h" /** diff --git a/tos/platforms/gnode/lib/assert/AssertUartP.nc b/tos/platforms/gnode/lib/assert/AssertUartP.nc index c9e86a9a02..cd2302590f 100644 --- a/tos/platforms/gnode/lib/assert/AssertUartP.nc +++ b/tos/platforms/gnode/lib/assert/AssertUartP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + module AssertUartP { uses { interface AsyncStdControl as UartControl; diff --git a/tos/platforms/gnode/lib/assert/Reboot.nc b/tos/platforms/gnode/lib/assert/Reboot.nc index d66a6630fe..ee59c64fff 100644 --- a/tos/platforms/gnode/lib/assert/Reboot.nc +++ b/tos/platforms/gnode/lib/assert/Reboot.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Reboot the node. */ diff --git a/tos/platforms/gnode/lib/assert/RebootC.nc b/tos/platforms/gnode/lib/assert/RebootC.nc index 493dd0c0fe..f126ec9dae 100644 --- a/tos/platforms/gnode/lib/assert/RebootC.nc +++ b/tos/platforms/gnode/lib/assert/RebootC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Reboots the node by tripping the watchdog timer. */ diff --git a/tos/platforms/gnode/lib/printf/NoPrintfC.nc b/tos/platforms/gnode/lib/printf/NoPrintfC.nc index 6b305a0d65..5f62b88891 100644 --- a/tos/platforms/gnode/lib/printf/NoPrintfC.nc +++ b/tos/platforms/gnode/lib/printf/NoPrintfC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "noprintf.h" /** diff --git a/tos/platforms/gnode/lib/printf/OutputStream.nc b/tos/platforms/gnode/lib/printf/OutputStream.nc index 37e6c6f29e..bd99b028f1 100644 --- a/tos/platforms/gnode/lib/printf/OutputStream.nc +++ b/tos/platforms/gnode/lib/printf/OutputStream.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + interface OutputStream { command error_t write(uint8_t* buf, uint16_t len); event void writeDone(error_t error); diff --git a/tos/platforms/gnode/lib/printf/PrintfC.nc b/tos/platforms/gnode/lib/printf/PrintfC.nc index d9ab64c847..741ea76247 100644 --- a/tos/platforms/gnode/lib/printf/PrintfC.nc +++ b/tos/platforms/gnode/lib/printf/PrintfC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "printf.h" /** diff --git a/tos/platforms/gnode/lib/printf/PrintfFlush.nc b/tos/platforms/gnode/lib/printf/PrintfFlush.nc index 28d29d39b8..5212adb355 100644 --- a/tos/platforms/gnode/lib/printf/PrintfFlush.nc +++ b/tos/platforms/gnode/lib/printf/PrintfFlush.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + interface PrintfFlush { async command void flush(); } diff --git a/tos/platforms/gnode/lib/printf/PrintfP.nc b/tos/platforms/gnode/lib/printf/PrintfP.nc index c9d2d84dd7..e91a5e18d0 100644 --- a/tos/platforms/gnode/lib/printf/PrintfP.nc +++ b/tos/platforms/gnode/lib/printf/PrintfP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "Assert.h" /** diff --git a/tos/platforms/gnode/lib/printf/Putchar.nc b/tos/platforms/gnode/lib/printf/Putchar.nc index 5cc75b9717..87514377b4 100644 --- a/tos/platforms/gnode/lib/printf/Putchar.nc +++ b/tos/platforms/gnode/lib/printf/Putchar.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * A nesC wrapper for putchar(). */ diff --git a/tos/platforms/gnode/lib/printf/PutcharC.nc b/tos/platforms/gnode/lib/printf/PutcharC.nc index f62a39efab..064068fbf9 100644 --- a/tos/platforms/gnode/lib/printf/PutcharC.nc +++ b/tos/platforms/gnode/lib/printf/PutcharC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides a putchar() function for printf(). */ diff --git a/tos/platforms/gnode/lib/printf/UartOutputStreamC.nc b/tos/platforms/gnode/lib/printf/UartOutputStreamC.nc index ad7d183cf9..76e8c2394a 100644 --- a/tos/platforms/gnode/lib/printf/UartOutputStreamC.nc +++ b/tos/platforms/gnode/lib/printf/UartOutputStreamC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + configuration UartOutputStreamC { provides interface OutputStream; } diff --git a/tos/platforms/gnode/lib/printf/UartOutputStreamP.nc b/tos/platforms/gnode/lib/printf/UartOutputStreamP.nc index c17de36b5d..cdb705aaa8 100644 --- a/tos/platforms/gnode/lib/printf/UartOutputStreamP.nc +++ b/tos/platforms/gnode/lib/printf/UartOutputStreamP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #include "Assert.h" /** diff --git a/tos/platforms/gnode/lib/printf/noprintf.h b/tos/platforms/gnode/lib/printf/noprintf.h index d5a2073c77..a003695685 100644 --- a/tos/platforms/gnode/lib/printf/noprintf.h +++ b/tos/platforms/gnode/lib/printf/noprintf.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef NOPRINTF_H #define NOPRINTF_H diff --git a/tos/platforms/gnode/lib/printf/printf.h b/tos/platforms/gnode/lib/printf/printf.h index 5666e51ab4..c93a2d47c3 100644 --- a/tos/platforms/gnode/lib/printf/printf.h +++ b/tos/platforms/gnode/lib/printf/printf.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef PRINTF_H #define PRINTF_H diff --git a/tos/platforms/gnode/lib/spi/SoftwareSpiC.nc b/tos/platforms/gnode/lib/spi/SoftwareSpiC.nc index 9895245235..5dc05f063d 100644 --- a/tos/platforms/gnode/lib/spi/SoftwareSpiC.nc +++ b/tos/platforms/gnode/lib/spi/SoftwareSpiC.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides a software implementation of the SPI protocol. */ diff --git a/tos/platforms/gnode/lib/spi/SoftwareSpiP.nc b/tos/platforms/gnode/lib/spi/SoftwareSpiP.nc index c726ea231c..a9b6ff244a 100644 --- a/tos/platforms/gnode/lib/spi/SoftwareSpiP.nc +++ b/tos/platforms/gnode/lib/spi/SoftwareSpiP.nc @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + /** * Provides a software implementation of the SPI protocol. * Also provides a fake Resource implementation, since diff --git a/tos/platforms/gnode/platform.h b/tos/platforms/gnode/platform.h index e69de29bb2..c50cd33406 100644 --- a/tos/platforms/gnode/platform.h +++ b/tos/platforms/gnode/platform.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + diff --git a/tos/platforms/gnode/platform_message.h b/tos/platforms/gnode/platform_message.h index e91be8a40c..ad712a9c28 100644 --- a/tos/platforms/gnode/platform_message.h +++ b/tos/platforms/gnode/platform_message.h @@ -1,3 +1,28 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H From 596f12ce4b15c98e4266002b5322fff891f56147 Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Wed, 11 Apr 2012 15:02:40 +0200 Subject: [PATCH 235/411] Bug fixes to AckP from Andres Vahter: - with packet timestamping, acks need a whole message_t because the timestamp is written to the metadata - if a message was held because an ack was being sent, the length field was not stored --- tos/platforms/gnode/chips/ccpacket/ack/AckP.nc | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc b/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc index 4243a2d106..b0edae2061 100644 --- a/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc +++ b/tos/platforms/gnode/chips/ccpacket/ack/AckP.nc @@ -73,11 +73,10 @@ implementation { message_t rxBuffer; // for buffer swapping message_t* buffer = &rxBuffer; // current receive buffer - // ack messages are just headers and this buffer is only for sending, - // so we don't need space for a payload, footers and metadata - // NB: headers are right-aligned against the payload, so we need a full message_header_t, not just a chipcon_header_t! - message_header_t ackBuffer; - message_t* ackMessage = TCAST(message_t*, &ackBuffer); + // ack messages are just headers, but packet timestamping writes into the metadata fields, + // so we do need a full message_t + message_t ackBuffer; + message_t* ackMessage = &ackBuffer; message_t* txMessage; // the message being sent, either pending or awaiting an acknowledgement message_t* rxMessage; // the message being received, held while we're sending its acknowledgement @@ -277,7 +276,8 @@ implementation { txMessage = msg; if (acking) { - // we'll send it after the ack + // we'll send it after the ack, so remember the length + call ChipconPacket.setPayloadLength(txMessage, len); return SUCCESS; } else { // send rightaway From 7382444c76cbb65b64d7eaa8389c4fc58e2e2b5d Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Fri, 13 Apr 2012 17:47:10 +0200 Subject: [PATCH 236/411] Merge from svn: init flash SPI pins in SoftwareInit; more flash pages (8 MBit) --- tos/platforms/gnode/chips/at45db/HplAt45dbC.nc | 3 ++- tos/platforms/gnode/chips/at45db/HplAt45dbP.nc | 9 +++++++-- tos/platforms/gnode/chips/at45db/HplAt45db_chip.h | 2 +- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/tos/platforms/gnode/chips/at45db/HplAt45dbC.nc b/tos/platforms/gnode/chips/at45db/HplAt45dbC.nc index a9dd01e170..fcba6b2f7b 100644 --- a/tos/platforms/gnode/chips/at45db/HplAt45dbC.nc +++ b/tos/platforms/gnode/chips/at45db/HplAt45dbC.nc @@ -34,7 +34,7 @@ configuration HplAt45dbC { implementation { components new HplAt45dbByteC(9), HplAt45dbP, - new SoftwareSpiC(1, 1) as Spi, GeneralIOC; + new SoftwareSpiC(1, 1) as Spi, GeneralIOC, MainC; HplAt45db = HplAt45dbByteC; @@ -44,6 +44,7 @@ implementation { HplAt45dbP.Select -> GeneralIOC.GeneralIO[FLASH_CSN]; HplAt45dbP.FlashSpi -> Spi; + HplAt45dbP.Init <- MainC.SoftwareInit; Spi.MISO -> GeneralIOC.GeneralIO[FLASH_MISO]; Spi.MOSI -> GeneralIOC.GeneralIO[FLASH_MOSI]; diff --git a/tos/platforms/gnode/chips/at45db/HplAt45dbP.nc b/tos/platforms/gnode/chips/at45db/HplAt45dbP.nc index 0226844f1a..c4a44d21c1 100644 --- a/tos/platforms/gnode/chips/at45db/HplAt45dbP.nc +++ b/tos/platforms/gnode/chips/at45db/HplAt45dbP.nc @@ -31,6 +31,7 @@ module HplAt45dbP { provides { interface HplAt45dbByte; + interface Init; } uses { interface SpiByte as FlashSpi; @@ -39,13 +40,17 @@ module HplAt45dbP { } implementation { - command void HplAt45dbByte.select() { + command error_t Init.init() { call Select.makeOutput(); + call Select.set(); + return SUCCESS; + } + + command void HplAt45dbByte.select() { call Select.clr(); } command void HplAt45dbByte.deselect() { - call Select.makeOutput(); call Select.set(); } diff --git a/tos/platforms/gnode/chips/at45db/HplAt45db_chip.h b/tos/platforms/gnode/chips/at45db/HplAt45db_chip.h index 5530b655fe..b1e9dddf1d 100644 --- a/tos/platforms/gnode/chips/at45db/HplAt45db_chip.h +++ b/tos/platforms/gnode/chips/at45db/HplAt45db_chip.h @@ -34,7 +34,7 @@ // flash characteristics enum { - AT45_MAX_PAGES = 2048, + AT45_MAX_PAGES = 4096, AT45_PAGE_SIZE = 264, AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes }; From 65e4b607389de4488860847679632b5cd0b8c7d0 Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Fri, 13 Apr 2012 17:56:24 +0200 Subject: [PATCH 237/411] New platform init levels --- tos/platforms/gnode/PlatformC.nc | 7 +-- tos/platforms/gnode/PlatformLedsC.nc | 4 +- tos/platforms/gnode/PlatformPinsC.nc | 5 ++- tos/platforms/gnode/PlatformPinsP.nc | 45 +++++++++++++++++++ .../ccpacket/spi/HplChipconHardwareSpiC.nc | 4 +- .../ccpacket/spi/HplChipconSoftwareSpiC.nc | 4 +- tos/platforms/gnode/platform.h | 12 +++++ 7 files changed, 73 insertions(+), 8 deletions(-) create mode 100644 tos/platforms/gnode/PlatformPinsP.nc diff --git a/tos/platforms/gnode/PlatformC.nc b/tos/platforms/gnode/PlatformC.nc index 27d46a2a46..e74a278c99 100644 --- a/tos/platforms/gnode/PlatformC.nc +++ b/tos/platforms/gnode/PlatformC.nc @@ -24,6 +24,7 @@ */ #include "hardware.h" +#include "platform.h" // some TinyOS apps don't include this, // instead depending on the platform to do it for them @@ -42,8 +43,8 @@ implementation { components PlatformP, PlatformClockC, PlatformPinsC, StackGuardWatchDogC; Init = PlatformP; - PlatformP.InitLevel[0] -> PlatformClockC; // setup clocks - PlatformP.InitLevel[1] -> PlatformPinsC; // configure I/O pins - PlatformP.InitLevel[2] -> StackGuardWatchDogC; // init stack protection and start watchdog + PlatformP.InitLevel[PLATFORM_INIT_CLOCKS] -> PlatformClockC; // setup clocks + PlatformP.InitLevel[PLATFORM_INIT_GPIO] -> PlatformPinsC; // configure I/O pins + PlatformP.InitLevel[PLATFORM_INIT_WDT] -> StackGuardWatchDogC; // init stack protection and start watchdog } diff --git a/tos/platforms/gnode/PlatformLedsC.nc b/tos/platforms/gnode/PlatformLedsC.nc index e32b4b2cb3..4849cc470f 100644 --- a/tos/platforms/gnode/PlatformLedsC.nc +++ b/tos/platforms/gnode/PlatformLedsC.nc @@ -23,6 +23,8 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#include "platform.h" + configuration PlatformLedsC { provides interface GeneralIO as Led0; provides interface GeneralIO as Led1; @@ -33,7 +35,7 @@ implementation { components GeneralIOC, PlatformP; - Init = PlatformP.InitLevel[2]; + Init = PlatformP.InitLevel[PLATFORM_INIT_GPIO + 1]; Led0 = GeneralIOC.GeneralIO[LED_GREEN]; Led1 = GeneralIOC.GeneralIO[LED_YELLOW]; diff --git a/tos/platforms/gnode/PlatformPinsC.nc b/tos/platforms/gnode/PlatformPinsC.nc index b31f50faab..4168e7d895 100644 --- a/tos/platforms/gnode/PlatformPinsC.nc +++ b/tos/platforms/gnode/PlatformPinsC.nc @@ -28,6 +28,7 @@ configuration PlatformPinsC { } implementation { - components Msp430GeneralIOC; - Init = Msp430GeneralIOC; + components Msp430GeneralIOC, PlatformPinsP; + Init = PlatformPinsP; + PlatformPinsP.DefaultInit -> Msp430GeneralIOC; } diff --git a/tos/platforms/gnode/PlatformPinsP.nc b/tos/platforms/gnode/PlatformPinsP.nc new file mode 100644 index 0000000000..6401fef558 --- /dev/null +++ b/tos/platforms/gnode/PlatformPinsP.nc @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + +module PlatformPinsP { + provides interface Init; + uses interface Init as DefaultInit; +} + +implementation { + + /** + * Initialize I/O pins. + */ + command error_t Init.init() { + call DefaultInit.init(); + + // set the SRAM pins to the appropriate levels to prevent current drain + P4DIR = 0xB0; + P4OUT = 0xB0; + + return SUCCESS; + } +} diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc index 893dc052f7..a3c6655ed0 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconHardwareSpiC.nc @@ -23,6 +23,8 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#include "platform.h" + /** * Use USCI B0 as SPI for the radio. */ @@ -38,7 +40,7 @@ implementation { components HplChipconSpiB0P as Spi, DedicatedResourceC, PlatformP; Resource = DedicatedResourceC; HplChipconSpi = Spi; - Spi.Init <- PlatformP.InitLevel[2]; + Spi.Init <- PlatformP.InitLevel[PLATFORM_INIT_GPIO + 1]; components HplMsp430GeneralIOC as IO; Spi.SIMO -> IO.UCB0SIMO; diff --git a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc index 44e8fd0319..255d600250 100644 --- a/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc +++ b/tos/platforms/gnode/chips/ccpacket/spi/HplChipconSoftwareSpiC.nc @@ -23,6 +23,8 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#include "platform.h" + /** * Provides a software implementation of the SPI protocol for use on MSP430 processors * that do not have a hardware SPI bus. @@ -48,6 +50,6 @@ implementation { Spi.MOSI -> Hpl.SI; Spi.MISO -> Hpl.SO; Spi.Clock -> Hpl.Clock; - Spi.Init <- PlatformP.InitLevel[2]; + Spi.Init <- PlatformP.InitLevel[PLATFORM_INIT_GPIO + 1]; } diff --git a/tos/platforms/gnode/platform.h b/tos/platforms/gnode/platform.h index c50cd33406..76b74b20f6 100644 --- a/tos/platforms/gnode/platform.h +++ b/tos/platforms/gnode/platform.h @@ -23,3 +23,15 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef PLATFORM_H +#define PLATFORM_H + +enum PlatformInit { + PLATFORM_INIT_FIRST = 0, + PLATFORM_INIT_CLOCKS = 10, + PLATFORM_INIT_GPIO = 20, + PLATFORM_INIT_WDT = 30, + PLATFORM_INIT_LAST = 255, +}; + +#endif From 0d55063072f7b099bc9020d54a09594aa1f1ce51 Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Fri, 13 Apr 2012 18:00:51 +0200 Subject: [PATCH 238/411] Define the IO pin for the user button. --- tos/platforms/gnode/hardware.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tos/platforms/gnode/hardware.h b/tos/platforms/gnode/hardware.h index d31a96997c..70c893c04c 100644 --- a/tos/platforms/gnode/hardware.h +++ b/tos/platforms/gnode/hardware.h @@ -34,6 +34,8 @@ #define RADIO_G0 24 #define RADIO_G2 25 +#define USER_BUTTON 26 + #define LED_GREEN 17 #define LED_YELLOW 20 #define LED_RED 21 From e50f36ca55189aeea8bb2c39226526781b10b48b Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Fri, 13 Apr 2012 18:04:51 +0200 Subject: [PATCH 239/411] Radio stack fixes. Fix a lockup in CCA, maintain compatibility with old LPL behaviour (unset/zero means system default) and get rid of a long busy wait, add a -20 dB power setting. --- .../chips/cc1101/ChipconRegisterValues.h | 1 + .../chips/ccpacket/hal/HalChipconControlP.nc | 43 +++++++++++---- .../chips/ccpacket/lpl/LowPowerListeningP.nc | 31 +++++++---- .../gnode/chips/ccpacket/lpl/LplAMSenderP.nc | 54 +++++++++++++++++++ .../ccpacket/lpl/NoLowPowerListeningP.nc | 5 +- .../chips/ccpacket/packet/ChipconPacket.h | 4 +- 6 files changed, 116 insertions(+), 22 deletions(-) create mode 100644 tos/platforms/gnode/chips/ccpacket/lpl/LplAMSenderP.nc diff --git a/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h b/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h index 2175864c53..81646f94e9 100644 --- a/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h +++ b/tos/platforms/gnode/chips/cc1101/ChipconRegisterValues.h @@ -46,6 +46,7 @@ enum { enum OutputPower { POWER_DEFAULT = 0xC6, // 8.5 dBm POWER_MINUS_30 = 0x03, + POWER_MINUS_20 = 0x0F, POWER_MINUS_10 = 0x27, POWER_MINUS_5 = 0x67, POWER_0 = 0x50, diff --git a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc index 110a2f1f92..caaee2b1cc 100644 --- a/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc +++ b/tos/platforms/gnode/chips/ccpacket/hal/HalChipconControlP.nc @@ -230,9 +230,11 @@ implementation { * to be set (which indicates the radio has a valid RSSI measurement). */ void waitForRssiValid() { - // wait until either CS (bit 6) or CCA (bit 4) is asserted in PKTSTATUS - uint8_t valid = (1<< 6) | (1 << 4); - while (!(readRegister(PKTSTATUS) & valid)); + // Wait until either CS (bit 6) or CCA (bit 4) is asserted in PKTSTATUS, + // but drop out of the loop if we're no longer in RX, which can happen + // if (something that looks like) a packet is received while we wait. + uint8_t valid = (1 << 6) | (1 << 4); + while (!(readRegister(PKTSTATUS) & valid) && getChipState() == STATE_RX); } /** @@ -568,13 +570,36 @@ implementation { // wait and see if we actually made the transition call BusyWait.wait(RX_TO_TX_TIME); - // check against STATE_RX instead of STATE_TX, just in case we're still in STATE_SETTLING or somesuch - if (getChipState() == STATE_RX) { - return FAIL; +// // check against STATE_RX instead of STATE_TX, just in case we're still in STATE_SETTLING or somesuch +// if (getChipState() == STATE_RX) { +// return FAIL; +// } +// +// // set the flag - next interrupt indicates end of sent packet +// transmitting = TRUE; + + switch (getChipState()) { + case STATE_RX: + // still in RX, so CCA prevented us from switching + return FAIL; + + case STATE_IDLE: + case STATE_CALIBRATE: + case STATE_RXFIFO_OVERFLOW: + // we received a packet just as we tried to switch + return EBUSY; + + case STATE_TX: + case STATE_SETTLING: + transmitting = TRUE; + break; + + default: + // OK, now I'm curious - which is it? + // compare to one we know it isn't so assertEquals will print it out + assertEquals(state, STATE_IDLE, ASSERT_CC_HAL_NO_TX); + return FAIL; } - - // set the flag - next interrupt indicates end of sent packet - transmitting = TRUE; // set a timer to guard against losing the end-of-packet interrupt if (call TxTimer.isRunning()) { diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc index a5ca5c6cf5..d660d4bb7f 100644 --- a/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LowPowerListeningP.nc @@ -32,6 +32,7 @@ module LowPowerListeningP { interface Send; interface Receive; interface LowPowerListening; + interface SendNotify; } uses { @@ -58,7 +59,8 @@ implementation { bool radioOn = FALSE; // is the actual radio on, i.e. in its active duty cycle? bool sending = FALSE; // outgoing packet pending? uint16_t wakeupInterval = LPL_DEFAULT_INTERVAL; // time between receive checks; 0 means always on - uint16_t calibrationCounter = 0; // when duty cycling, calibrate the radio when this hits zero + uint16_t calibrationCounter; // when duty cycling, calibrate the radio when this hits zero + uint8_t ccaCounter; // counts channel-not-clear detections void on() { error_t error = call SubControl.start(); @@ -139,6 +141,10 @@ implementation { // if the radio is not on already, turn it on now if (!radioOn) on(); + // hook for others to make last minute adjustments, + // especially to the preamble duration + signal SendNotify.sending(m); + // lower layers should never fail at this point, // since we are not busy (we checked) and we just // turned the radio on @@ -192,6 +198,7 @@ implementation { calibrationCounter--; } + ccaCounter = 0; call CcaSampleTimer.startOneShot(CCA_SETTLING_TIME); } @@ -208,12 +215,11 @@ implementation { off(); } else { // 1 ms may be just a bit too fast for reliable CCA and can give us a false positive, - // so check again after another 0.5 ms before deciding to stay awake - call BusyWait.wait(500); - - if (clear()) { - // false alarm - off(); + // so check again after the first "hit" + ccaCounter++; + if (ccaCounter < 2) { + // check again in another millisecond + call CcaSampleTimer.startOneShot(1); } else { // stay awake call ReceiveTimer.startOneShot(wakeupInterval + LPL_PREAMBLE_OVERLAP); @@ -222,12 +228,15 @@ implementation { } /** - * We've waited long enough to pick up a packet if one was coming. - * If it did, stay awake; else go back to sleep. + * If something is being received, or there is still a carrier, + * stay awake and check again after another interval. + * Else, go back to sleep. */ event void ReceiveTimer.fired() { - if (!call HalChipconControl.isBusy()) { + if (clear()) { off(); + } else { + call ReceiveTimer.startOneShot(wakeupInterval + LPL_PREAMBLE_OVERLAP); } } @@ -302,4 +311,6 @@ implementation { event void HalChipconControl.rxWaiting(uint32_t timestamp) {} event void HalChipconControl.txStart(uint32_t timestamp) {} event void HalChipconControl.txDone(uint32_t timestamp, error_t error) {} + + default event void SendNotify.sending(message_t* msg) {} } diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LplAMSenderP.nc b/tos/platforms/gnode/chips/ccpacket/lpl/LplAMSenderP.nc new file mode 100644 index 0000000000..8cc8d4fa57 --- /dev/null +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LplAMSenderP.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + +generic module LplAMSenderP() +{ + provides interface AMSend; + uses { + interface AMSend as SubAMSend; + interface LowPowerListening as Lpl; + interface SystemLowPowerListening; + } +} + +implementation +{ + command error_t AMSend.send(am_addr_t addr, message_t* msg, uint8_t len) { + // if the interval was not set, use the system default + // otherwise, leave it unchanged + if (call Lpl.getRemoteWakeupInterval(msg) == 0) { +// printf("LPLAM: setting default interval: %u ms\n", call SystemLowPowerListening.getDefaultRemoteWakeupInterval()); + call Lpl.setRemoteWakeupInterval(msg, call SystemLowPowerListening.getDefaultRemoteWakeupInterval()); + } else { +// printf("LPLAM: interval already set: %u ms\n", call Lpl.getRemoteWakeupInterval(msg)); + } + return call SubAMSend.send(addr, msg, len); + } + + event void SubAMSend.sendDone(message_t* msg, error_t error) { signal AMSend.sendDone(msg, error); } + command error_t AMSend.cancel(message_t* msg) { return call SubAMSend.cancel(msg); } + command uint8_t AMSend.maxPayloadLength() { return call SubAMSend.maxPayloadLength(); } + command void* AMSend.getPayload(message_t* msg, uint8_t len) { return call SubAMSend.getPayload(msg, len); } +} diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc index 49a3acf013..3089277e1a 100644 --- a/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc +++ b/tos/platforms/gnode/chips/ccpacket/lpl/NoLowPowerListeningP.nc @@ -38,7 +38,10 @@ module NoLowPowerListeningP { implementation { - command void LowPowerListening.setLocalWakeupInterval(uint16_t sleepIntervalMs) {} + command void LowPowerListening.setLocalWakeupInterval(uint16_t sleepIntervalMs) { + // the only valid value is 0 + assertEquals(sleepIntervalMs, 0, ASSERT_CC_LPL_OFF); + } /** * @return the local node's sleep interval, in milliseconds diff --git a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h index 223b882496..dee468099b 100644 --- a/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h +++ b/tos/platforms/gnode/chips/ccpacket/packet/ChipconPacket.h @@ -71,10 +71,10 @@ typedef nx_struct chipcon_metadata_t { } chipcon_metadata_t; #ifndef TOSH_DATA_LENGTH -#define TOSH_DATA_LENGTH 28 +#define TOSH_DATA_LENGTH 28U #endif // maximum packet length (including the length byte and excluding the appended status bytes) -#define MAX_PACKET_LENGTH (sizeof(chipcon_header_t) + TOSH_DATA_LENGTH + sizeof(chipcon_footer_t)) +#define MAX_PACKET_LENGTH ((uint8_t) (sizeof(chipcon_header_t) + TOSH_DATA_LENGTH + sizeof(chipcon_footer_t))) #endif From 429cfe540c95a311226db4f36aa03a5abd4ab0c1 Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Fri, 13 Apr 2012 18:15:50 +0200 Subject: [PATCH 240/411] Just a comment update. --- tos/platforms/gnode/VoltageP.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/platforms/gnode/VoltageP.nc b/tos/platforms/gnode/VoltageP.nc index 015c73b02c..f911ffb74e 100644 --- a/tos/platforms/gnode/VoltageP.nc +++ b/tos/platforms/gnode/VoltageP.nc @@ -38,7 +38,7 @@ implementation { } event void SubRead.readDone(error_t error, uint16_t val) { - // measured voltage is VCC/3, 12 bit ADC + // measured voltage is VCC/2, 1.5V reference, 12 bit ADC uint32_t millivolts = (val * 3000UL)/4096; signal Read.readDone(error, (uint16_t) millivolts); } From bc6df6b1dcfc47a68bf96426742a88b5a32ec8aa Mon Sep 17 00:00:00 2001 From: Michiel Konstapel Date: Fri, 13 Apr 2012 18:45:05 +0200 Subject: [PATCH 241/411] Whitespace and file modes. --- tos/platforms/gnode/PlatformPinsP.nc | 90 +++++++++---------- tos/platforms/gnode/SerialActiveMessageC.nc | 0 tos/platforms/gnode/SerialActiveMessageP.nc | 0 .../gnode/chips/ccpacket/lpl/LplAMSenderP.nc | 50 +++++------ 4 files changed, 70 insertions(+), 70 deletions(-) mode change 100755 => 100644 tos/platforms/gnode/SerialActiveMessageC.nc mode change 100755 => 100644 tos/platforms/gnode/SerialActiveMessageP.nc diff --git a/tos/platforms/gnode/PlatformPinsP.nc b/tos/platforms/gnode/PlatformPinsP.nc index 6401fef558..625d324bbe 100644 --- a/tos/platforms/gnode/PlatformPinsP.nc +++ b/tos/platforms/gnode/PlatformPinsP.nc @@ -1,45 +1,45 @@ -/* - * Copyright (c) 2008-2012, SOWNet Technologies B.V. - * All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. -*/ - -module PlatformPinsP { - provides interface Init; - uses interface Init as DefaultInit; -} - -implementation { - - /** - * Initialize I/O pins. - */ - command error_t Init.init() { - call DefaultInit.init(); - - // set the SRAM pins to the appropriate levels to prevent current drain - P4DIR = 0xB0; - P4OUT = 0xB0; - - return SUCCESS; - } -} +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + +module PlatformPinsP { + provides interface Init; + uses interface Init as DefaultInit; +} + +implementation { + + /** + * Initialize I/O pins. + */ + command error_t Init.init() { + call DefaultInit.init(); + + // set the SRAM pins to the appropriate levels to prevent current drain + P4DIR = 0xB0; + P4OUT = 0xB0; + + return SUCCESS; + } +} diff --git a/tos/platforms/gnode/SerialActiveMessageC.nc b/tos/platforms/gnode/SerialActiveMessageC.nc old mode 100755 new mode 100644 diff --git a/tos/platforms/gnode/SerialActiveMessageP.nc b/tos/platforms/gnode/SerialActiveMessageP.nc old mode 100755 new mode 100644 diff --git a/tos/platforms/gnode/chips/ccpacket/lpl/LplAMSenderP.nc b/tos/platforms/gnode/chips/ccpacket/lpl/LplAMSenderP.nc index 8cc8d4fa57..f3d0eb7da4 100644 --- a/tos/platforms/gnode/chips/ccpacket/lpl/LplAMSenderP.nc +++ b/tos/platforms/gnode/chips/ccpacket/lpl/LplAMSenderP.nc @@ -1,28 +1,28 @@ -/* - * Copyright (c) 2008-2012, SOWNet Technologies B.V. - * All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. -*/ - +/* + * Copyright (c) 2008-2012, SOWNet Technologies B.V. + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. +*/ + generic module LplAMSenderP() { provides interface AMSend; From f7db3e01c71f1ece6c711da0abb501a0fd8cfd3c Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Fri, 20 Apr 2012 18:22:22 -0700 Subject: [PATCH 242/411] Contribution_Process: Reflect that msp430-int-pu is currently not being use. --- 00d_Contribution_Process | 166 +++++++++++++++++++++------------------ 1 file changed, 88 insertions(+), 78 deletions(-) diff --git a/00d_Contribution_Process b/00d_Contribution_Process index 7c8fa329fb..281f7c78d6 100644 --- a/00d_Contribution_Process +++ b/00d_Contribution_Process @@ -18,15 +18,15 @@ repositories. local: refers to your local working repository. * Branch names are presented in parentheses. - ie: "gh:tp-freeforall/prod(msp430-int-pu)" is the msp430-int-pu branch + ie: "gh:tp-freeforall/prod(msp430-int)" is the msp430-int branch in the tp-freeforall/prod.git repository (on github.com). - "local(msp430-int-pu)" refers to the msp430-int-pu branch in your local + "local(msp430-int)" refers to the msp430-int branch in your local working repository. - Note: local(msp430-int-pu) and gh:tp-freeforall/prod(msp430-int-pu) + Note: local(msp430-int) and gh:tp-freeforall/prod(msp430-int) are not necessarily the same git object. If the local repository has - diverged (or conversly if gh:tp-freeforall/prod has diverged) then these - objects will most certainly not be the same. + diverged (or if gh:tp-freeforall/prod has diverged) then these objects + will most certainly not be the same. * Remote branch names. @@ -136,7 +136,7 @@ Local repository: remotes/up/master current branch values from the upstream remotes/up/svn/upstream tp-freeforall/prod at the time of the last - remotes/up/msp430-int fetch. + remotes/up/msp430-int fetch. Note: -pu may or may not exist. remotes/up/msp430-int-pu remotes/origin/rh branch values from the developers published @@ -182,14 +182,16 @@ Local repository: # you will now have w/rh/tinyos-2.x populated with the default branch # of the fork. Your fork will inherit the default branch from - # tp-freeforall/prod repo. Currently this is msp430-int-pu. But you - # will want to check to see where you are. + # tp-freeforall/prod repo. Currently this is msp430-int. This is of + # course subject to change, and you should check the current state to + # see where you are. # # this will create the remote origin linked to your working fork on github. # you will also want to track changes coming into tp-freeforall, so # create a remote that will be used for tracking. And pull in information - # from the repository. + # from the repository. You can use the remote "up", for upstream, in your + # local repository to track the upstream repository. git remote add up git://github.com/tp-freeforall/prod.git git fetch up @@ -200,11 +202,11 @@ Local repository: to Robert Hunter's Developer Repository (on github). git branch # make sure on the appropriate branch - # should show msp430-int-pu which is the + # should show msp430-int which is the # current default branch. - git checkout -t up/msp430-int-pu # create a tracking branch. + git checkout -t up/msp430-int # create a tracking branch. git checkout -b rh # create the working branch off the - # current branch (msp430-int-pu) + # current branch (msp430-int) @@ -229,9 +231,10 @@ Local repository: The feature branch that Robert is working on is msp430 core integration. The main branch is msp430-int and updates get brought in via msp430-int-pu, - (proposed updates). + (proposed updates). If msp430-int-pu doesn't exist then a different mechanism + is being used (direct commits to msp430-int). - Robert's working branch (rh) starts off msp430-int-pu. + Robert's working branch (rh) starts off msp430-int. When the initial local repository is created (via cloning) the remote "origin" is created. In the example below this refers to git@github.com: @@ -248,17 +251,17 @@ Local repository: cd tinyos-2.x git remote add up git://github.com/tp-freeforall/prod.git git fetch up - git checkout -t up/msp430-int-pu # create a local tracking branch - git checkout -b rh # create the rh branch off msp430-int-pu + git checkout -t up/msp430-int # create a local tracking branch + git checkout -b rh # create the rh branch off msp430-int - # We are publishing the new values for the branches rh and msp430-int-pu + # We are publishing the new values for the branches rh and msp430-int # in gh:roberthunter/prod. The values of these branches in the local - # repository are remotes/origin/rh and remotes/origin/msp430-int-pu. Not - # to be confused with remotes/up/msp430-int-pu which is the branch state - # as currently known locally from the upstream. - + # repository are remotes/origin/rh and remotes/origin/msp430-int. Not + # to be confused with remotes/up/msp430-int which is the branch state + # recorded locally about the upstream remote repository. + git push origin rh - git push origin msp430-int-pu + git push origin msp430-int Robert Hunter makes changes and commits his working branch (rh) to his local @@ -269,20 +272,20 @@ on github (gh:roberthunter/prod(rh)) to allow others to observe what he is doing. He will also want to keep his working branch (rh) up to date with the -main branch he cares about, msp430-int-pu from the upstream. -(gh:tp-freeforall/prod(msp430-int-pu)). +main branch he cares about, msp430-int from the upstream. +(gh:tp-freeforall/prod(msp430-int)). When he is happy with the state of his development, he brings his commits -into his local copy of the msp430-int-pu branch, (he first needs to make -sure that local(msp430-int-pu) is up to date wrt the upstream, -gh:tp-freeforall/prod(msp430-int-pu)). +into his local copy of the msp430-int branch, (he first needs to make +sure that local(msp430-int) is up to date wrt the upstream, +gh:tp-freeforall/prod(msp430-int)). -The new local version of the integration branch (local(msp430-int-pu)) should -be constructed to be the new upstream msp430-int-pu. This local copy gets -published to the developer's repository at github -(gh:roberthunter/prod(msp430-int-pu) and a pull request is generated. -The upstream (gh:tp-freeforall/prod(msp430-int-pu)) pulls the changes -yielding the new upstream. +The new local version of the integration branch (local(msp430-int)) is +what you would like the upstream msp430-int to look like after your +changes are applied. This local copy gets published to the developer's +repository at github (gh:roberthunter/prod(msp430-int) and a pull request +is generated. The upstream (gh:tp-freeforall/prod(msp430-int)) pulls the +changes yielding the new upstream. Succinctly: @@ -291,7 +294,7 @@ Succinctly: mkdir -p ~/w/rh cd ~/w/rh/tinyos-2.x # inside existing local repo - git checkout rh # branch off msp430-int-pu + git checkout rh # branch off msp430-int work work work, busy little bee keep commits small and logical @@ -303,10 +306,10 @@ Succinctly: Another operation routinely done is updating working branches from the -integration master (ie. msp430-int-pu). +integration master (ie. msp430-int). For example, Robert wants to make sure that his changes are consistent with -what is happening on the tp-freeforall/prod(msp430-int-pu) branch. He +what is happening on the tp-freeforall/prod(msp430-int) branch. He accomplishes this by the following commands: cd ~/w/rh/tinyos-2.x @@ -314,22 +317,23 @@ accomplishes this by the following commands: # tp-freeforall git checkout rh # make sure on rh branch - git merge up/msp430-int-pu # merge in the current + git merge up/msp430-int # merge in the current # proposed integration branch # which is the feature Robert is # working on. -* refreshing the local copy of msp430-int-pu - git checkout msp430-int-pu # integration branch is msp430-int-pu +* refreshing the local copy of msp430-int + + git checkout msp430-int # integration branch is msp430-int git fetch up # update from the upstream - git merge up/msp430-int-pu # make sure our local is up to date + git merge up/msp430-int # make sure our local is up to date * Update local branch with upstream changes. - Integrate changes from up/msp430-int-pu into the working repository. One + Integrate changes from up/msp430-int into the working repository. One mechanism assumes relatively simple changes so uses "git-rebase" to move - the working branch on to the new tip of msp430-int-pu. + the working branch on to the new tip of msp430-int. WARNING: This is only recommended here because the local(rh) branch is intended to be private and not a published branch used by others to base @@ -341,100 +345,103 @@ accomplishes this by the following commands: use rebase. Rather all of your repository branch manipulation should be done using "git merge" rather than "git rebase". - "git rebase" is suggested because it's result in some what cleaner and - easier to read histories. + "git rebase" is suggested because it keeps your commits grouped together. This + results in some what cleaner and easier to read histories. - git checkout msp430-int-pu # refresh local copy + git checkout msp430-int # refresh local copy git fetch up - git merge up/msp430-int-pu + git merge up/msp430-int git checkout rh # switch back to working - git rebase msp430-int-pu + git rebase msp430-int - # rh has now been rewritten to be on the new tip of msp430-int-pu as + # rh has now been rewritten to be on the new tip of msp430-int as # imported from the upstream. -* Move the current local(rh) branch to the tip of the updated msp430-int-pu +* Move the current local(rh) branch to the tip of the updated msp430-int and publish the result. # the simplest method assumes that all of the most current changes on the - # rh branch are getting pulled over into msp430-int-pu. We first rebase - # the rh branch onto the tip of the msp430-int-pu to clean up the history - # and then simply fast forward msp430-int-pu + # rh branch are getting pulled over into msp430-int. We first rebase + # the rh branch onto the tip of the msp430-int to clean up the history + # and then simply fast forward msp430-int - # first make sure msp430-int-pu is current + # first make sure msp430-int is current - git checkout msp430-int-pu + git checkout msp430-int git fetch up - git merge up/msp430-int-pu + git merge up/msp430-int git checkout rh - git rebase msp430-int-pu # move rh to tip of map430-int-pu - git checkout msp430-int-pu - git merge rh # advance msp430-int-pu to include rh + git rebase msp430-int # move rh to tip of map430-int + git checkout msp430-int + git merge rh # advance msp430-int to include rh # should be a fast-forward # if you have published rh at gh:roberthunter/prod(rh) then you will have # to override the remote branch when you push. This is because the SHAs of - # rh change when you rebase. It is rewriting the history of the change set - # to be based off the current version of msp430-int-pu. + # rh change when you rebase. The history of rh has completely changed (because + # of the rebase) and so the SHAs are competely different with a different + # history. The history has been rewritten to be based off the current version + # of msp430-int. # # If you don't publish your current working branch you don't need to do this # because the branch rh doesn't exist or isn't being moved. git push origin +rh # only if you publish. - git push origin msp430-int-pu # publish the new version of msp430-int-pu + git push origin msp430-int # publish the new version of msp430-int -* Complicated move of particular commits from working branch to local int-pu +* Complicated move of particular commits from working branch to local msp430-int # If the change set is complicated or if only pieces of the change set # needs to be brought over, then cherry-pick should be used. - git checkout msp430-int-pu + git checkout msp430-int # local msp430-int branch git fetch up - git merge up/msp430-int-pu + git merge up/msp430-int # make sure up to date with upstream - # for each commit on rh that needs to be included in msp430-int-pu + # for each commit on rh that needs to be included in msp430-int git cherry-pick * Looking at differences between working branch and integration branch # To see what changes you are bringing over use the following: - git log --oneline up/msp430-int-pu..msp430-int-pu + git log --oneline up/msp430-int..msp430-int # to see the changes you are bringing over - git diff up/msp430-int-pu msp430-int-pu + git diff up/msp430-int msp430-int * Publishing. -When the new msp430-int-pu is ready, push it back to your published fork on -github: ie. gh:roberthunter/prod(msp430-int-pu). +When the new msp430-int is ready, push it back to your published fork on +github: ie. gh:roberthunter/prod(msp430-int). - git push origin msp430-int-pu + git push origin msp430-int Robert then requests a pull from his repositories main page. - https://github.com/roberthunter/prod/pull/new/msp430-int-pu + https://github.com/roberthunter/prod/pull/new/msp430-int -This requests a pull from gh:roberthunter/prod(msp430-int-pu) to -gh:tp-freeforall/prod(msp430-int-pu). +This requests a pull from gh:roberthunter/prod(msp430-int) to +gh:tp-freeforall/prod(msp430-int). * Further Integration -The integration master for msp430-int-pu reviews the changes and when approved -will pull the changes into gh:tp-freeforall/prod(msp430-int-pu). +If a ProposedUpdates branch is being use, ie. msp430-int-pu, this branch +will be periodically be reviewed and changes will be brought into the main +feature branch, msp430-int. -After the upstream merge is complete, developers using msp430-int-pu should +After the upstream merge is complete, developers using msp430-int should refresh their local copies of the upstream branch. -After other changes from other developers comes in and msp430-int-pu has +After other changes from other developers comes in and msp430-int has sufficiently matured, msp430-int-pu is merged into tp-freeforall/prod(msp430-int). -Testing of the integration branches happens on tp-freeforall/prod(feature-int). +TESTING of the integration branches happens on tp-freeforall/prod(feature-int). Groups of features are combined on gh:tp-freeforall/prod(pu) [proposed updates], which migrates to the next branch as the branch matures and the changes are accepted. @@ -455,6 +462,9 @@ it is important to update the state of the local and working repos with the new integration branch data. This will effectively move the working branches onto the tip of the new integration branch (msp430-int-pu). +Replace msp430-int-pu with msp430-int if a PU branch is not being used for +the integration work. + cd ~/w/rh/tinyos-2.x git fetch up # get current upstream data git checkout msp430-int-pu # update local copy From 5c07f61e7693ac2b6fb8062c5f356cadb6969628 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Sat, 18 Feb 2012 16:28:20 +0200 Subject: [PATCH 243/411] rf1a: change include from "Rf1aConfigure.h" to so it can be overridden. Changed Rf1aConfigure.h include to system include - otherwise platforms cannot override it. From: GCC CPP Manual (http://gcc.gnu.org/onlinedocs/cpp/Include-Syntax.html) Section 2.1 Include Syntax #include This variant is used for system header files. It searches for a file named file in a standard list of system directories. You can prepend directories to this list with the -I option (see Invocation). #include "file" This variant is used for header files of your own program. It searches for a file named file first in the directory containing the current file, then in the quote directories and then the same directories used for . You can prepend directories to the list of quote directories with the -iquote option. The standard tinyos tools (nesc, ncc, etc) and Makerules mechanisms used to build TinyOS applications uses -I

 -I etc. to specify where to look for include files. This means we must use the form if we want to allow an override to work. The order of -I will still determine which file will be found first so care must be taken in constructing the search order. We could modify things to use -iquote but that seems like more work. --- tos/chips/msp430/rf1a/physical/Rf1aConfigure.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/chips/msp430/rf1a/physical/Rf1aConfigure.nc b/tos/chips/msp430/rf1a/physical/Rf1aConfigure.nc index 7511f03c42..cb35d4644c 100644 --- a/tos/chips/msp430/rf1a/physical/Rf1aConfigure.nc +++ b/tos/chips/msp430/rf1a/physical/Rf1aConfigure.nc @@ -34,7 +34,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "Rf1aConfigure.h" +#include /** Enable an RF1A client to control its radio configuration. * From f0ab69df54f51fbd03da0ab2e0642c5405689c9e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 4 May 2012 00:34:59 -0700 Subject: [PATCH 244/411] gdb: update gdb_x5, sfr 16 bits, ucs (clk), ports --- tos/chips/msp430/99_gdb/gdb_x5 | 143 +++++++++++++++++++++++++++++---- 1 file changed, 126 insertions(+), 17 deletions(-) diff --git a/tos/chips/msp430/99_gdb/gdb_x5 b/tos/chips/msp430/99_gdb/gdb_x5 index aaabbd9206..a044f06b1b 100644 --- a/tos/chips/msp430/99_gdb/gdb_x5 +++ b/tos/chips/msp430/99_gdb/gdb_x5 @@ -107,23 +107,94 @@ display msp430 usci hardware end define sfr -printf "ie1: %02x ie2: %02x ifg1: %02x ifg2: %02x rpcr: %02x%02x\n",\ - (*(uint8_t *)0x100), (*(uint8_t *)0x101), (*(uint8_t *)0x102), (*(uint8_t *)0x103), \ - (*(uint8_t *)0x105), (*(uint8_t *)0x104) +printf "sfr: ie1: %04x ifg1: %04x rpcr: %04x\n",\ + (*(uint16_t *)0x100), (*(uint16_t *)0x102), (*(uint16_t *)0x104) end document sfr display misc interrupt/fault registers end -define ucs +#display ucs registers +# p 100. MSP430 Family User's Guide +# mps430f5438, p26 has the UCS control 0-8 register addresses and offsets + +define ucss printf "ucsctl0: %04x %04x %04x\n", (*(uint16_t *)0x160),(*(uint16_t *)0x162),(*(uint16_t *)0x164) printf "ucsctl3: %04x %04x %04x\n", (*(uint16_t *)0x166),(*(uint16_t *)0x168),(*(uint16_t *)0x16a) printf "ucsctl6: %04x %04x %04x\n", (*(uint16_t *)0x16c),(*(uint16_t *)0x16e),(*(uint16_t *)0x170) +end +document ucss +display msp430 5xxx unified clock system hardware (concise, short) +end + +define ucs +set $_tmp = *(uint16_t *) 0x0160 +printf "ucsctl0: %04x\n", $_tmp +printf " dco: %x", ($_tmp & 0x1F00) >> 8 +printf " mod: %x\n", ($_tmp & 0x00f8) >> 3 + +set $_tmp = *(uint16_t *) 0x0162 +printf "ucsctl1: %04x\n", ($_tmp) +printf " dcorsel: %x", ($_tmp & 0x0070) >> 4 +printf " dismod: %x\n", ($_tmp & 0x0001) + +set $_tmp = *(uint16_t *) 0x0164 +printf "ucsctl2: %04x\n", ($_tmp) +printf " flld: %x", ($_tmp & 0x7000) >> 8 >> 4 +printf " flln: %x\n", ($_tmp & 0x03FF) + +set $_tmp = *(uint16_t *) 0x0166 +printf "ucsctl3: %04x\n", ($_tmp) +printf " selref: %x", ($_tmp & 0x0070) >> 4 +printf " fllrefdiv: %x\n", ($_tmp & 0x0007) + +set $_tmp = *(uint16_t *) 0x0168 +printf "ucsctl4: %04x\n", ($_tmp) +printf " sela: %x", ($_tmp & 0x0700) >> 8 +printf " sels: %x", ($_tmp & 0x0070) >> 4 +printf " selm: %x\n", ($_tmp & 0x0007) + +set $_tmp = *(uint16_t *) 0x016a +printf "ucsctl5: %04x\n", ($_tmp) +printf " divpa: %d", ($_tmp & 0x7000) >> 8 >> 4 +printf " diva: %d", ($_tmp & 0x0700) >> 8 +printf " divs: %d", ($_tmp & 0x0070) >> 4 +printf " divm: %d\n", ($_tmp & 0x0007) + +set $_tmp = *(uint16_t *) 0x016c +printf "ucsctl6: %04x\n", ($_tmp) +printf " xt2drive: %x", ($_tmp & 0xC000) >> 8 >> 6 +printf " xt2bypass: %x", ($_tmp & 0x1000) >> 8 >> 4 +printf " xt2off: %x\n", ($_tmp & 0x0100) >> 8 +printf " xt1drive: %x", ($_tmp & 0x00C0) >> 6 +printf " xts: %x", ($_tmp & 0x0020) >> 5 +printf " xt1bypass: %x", ($_tmp & 0x0010) >> 4 +printf " xcap: %x", ($_tmp & 0x000C) >> 2 +printf " smclkoff: %x", ($_tmp & 0x0002) >> 1 +printf " xt1off: %x\n", ($_tmp & 0x0001) + +set $_tmp = *(uint16_t *) 0x016e +printf "ucsctl7: %04x\n", ($_tmp) +printf " xt2flt: %x", ($_tmp & 0x0008) >> 3 +printf " xt1hfflt: %x", ($_tmp & 0x0004) >> 2 +printf " xt1lfflt: %x", ($_tmp & 0x0002) >> 1 +printf " dcoflt: %x", ($_tmp & 0x0001) +set $_tmp = *(uint16_t *) 0x102 +printf " oscflt: %x\n", ($_tmp & 0x0002) >> 1 + +set $_tmp = *(uint16_t *) 0x0170 +printf "ucsctl8: %04x\n", ($_tmp) +printf " modoscreqen: %x", ($_tmp & 0x0008) >> 3 +printf " smclkreqen: %x", ($_tmp & 0x0004) >> 2 +printf " mclkreqen: %x", ($_tmp & 0x0002) >> 1 +printf " aclkreqen: %x\n", ($_tmp & 0x0001) + end document ucs display msp430 5xxx unified clock system hardware end + define dp2 printf "p2 i: %02x o: %02x d: %02x f: %02x es: %02x ie: %02x sel: %02x ren: %02x ds: %02x\n",\ (*(uint8_t *)0x201), (*(uint8_t *)0x203), (*(uint8_t *)0x205), (*(uint8_t *)0x21d), \ @@ -135,24 +206,62 @@ display port 2 end define ports -printf " in p1: %02x %02x %02x p4: %02x %02x\n", \ - (*(uint8_t *)0x200),(*(uint8_t *)0x201),(*(uint8_t *)0x220),(*(uint8_t *)0x221),(*(uint8_t *)0x240) -printf "out p1: %02x %02x %02x p4: %02x %02x\n", \ - (*(uint8_t *)0x202),(*(uint8_t *)0x203),(*(uint8_t *)0x222),(*(uint8_t *)0x223),(*(uint8_t *)0x242) -printf "dir: p1: %02x %02x %02x p4: %02x %02x\n", \ - (*(uint8_t *)0x204),(*(uint8_t *)0x205),(*(uint8_t *)0x224),(*(uint8_t *)0x225),(*(uint8_t *)0x244) -printf "sel: p1: %02x %02x %02x p4: %02x %02x\n", \ - (*(uint8_t *)0x20a),(*(uint8_t *)0x20b),(*(uint8_t *)0x22a),(*(uint8_t *)0x22b),(*(uint8_t *)0x24a) -printf "ifg p1: %02x %02x\n", +printf " in p1: %02x %02x %02x %02x p5: %02x %02x %02x %02x p9: %02x %02x %02x\n", \ + (*(uint8_t *)0x200), (*(uint8_t *)0x201), \ + (*(uint8_t *)0x220), (*(uint8_t *)0x221), \ + (*(uint8_t *)0x240), (*(uint8_t *)0x241), \ + (*(uint8_t *)0x260), (*(uint8_t *)0x261), \ + (*(uint8_t *)0x280), (*(uint8_t *)0x281), \ + (*(uint8_t *)0x2a0) + +printf "out p1: %02x %02x %02x %02x p5: %02x %02x %02x %02x p9: %02x %02x %02x\n", \ + (*(uint8_t *)0x202), (*(uint8_t *)0x203), \ + (*(uint8_t *)0x222), (*(uint8_t *)0x223), \ + (*(uint8_t *)0x242), (*(uint8_t *)0x243), \ + (*(uint8_t *)0x262), (*(uint8_t *)0x263), \ + (*(uint8_t *)0x282), (*(uint8_t *)0x283), \ + (*(uint8_t *)0x2a2) + +printf "dir p1: %02x %02x %02x %02x p5: %02x %02x %02x %02x p9: %02x %02x %02x\n", \ + (*(uint8_t *)0x204), (*(uint8_t *)0x205), \ + (*(uint8_t *)0x224), (*(uint8_t *)0x225), \ + (*(uint8_t *)0x244), (*(uint8_t *)0x245), \ + (*(uint8_t *)0x264), (*(uint8_t *)0x265), \ + (*(uint8_t *)0x284), (*(uint8_t *)0x285), \ + (*(uint8_t *)0x2a4) + +printf "sel p1: %02x %02x %02x %02x p5: %02x %02x %02x %02x p9: %02x %02x %02x\n", \ + (*(uint8_t *)0x20a), (*(uint8_t *)0x20b), \ + (*(uint8_t *)0x22a), (*(uint8_t *)0x22b), \ + (*(uint8_t *)0x24a), (*(uint8_t *)0x24b), \ + (*(uint8_t *)0x26a), (*(uint8_t *)0x26b), \ + (*(uint8_t *)0x28a), (*(uint8_t *)0x28b), \ + (*(uint8_t *)0x2aa) + +printf "ren p1: %02x %02x %02x %02x p5: %02x %02x %02x %02x p9: %02x %02x %02x\n", \ + (*(uint8_t *)0x206), (*(uint8_t *)0x207), \ + (*(uint8_t *)0x226), (*(uint8_t *)0x227), \ + (*(uint8_t *)0x246), (*(uint8_t *)0x247), \ + (*(uint8_t *)0x266), (*(uint8_t *)0x267), \ + (*(uint8_t *)0x286), (*(uint8_t *)0x287), \ + (*(uint8_t *)0x2a6) + +printf " ds: p1: %02x %02x %02x %02x p5: %02x %02x %02x %02x p9: %02x %02x %02x\n", \ + (*(uint8_t *)0x208), (*(uint8_t *)0x209), \ + (*(uint8_t *)0x228), (*(uint8_t *)0x229), \ + (*(uint8_t *)0x248), (*(uint8_t *)0x249), \ + (*(uint8_t *)0x268), (*(uint8_t *)0x269), \ + (*(uint8_t *)0x288), (*(uint8_t *)0x289), \ + (*(uint8_t *)0x2a8) + +printf "ifg p1: %02x %02x\n", \ (*(uint8_t *)0x21c), (*(uint8_t *)0x21d) + printf "ie p1: %02x %02x iv: %04x %04x\n", \ (*(uint8_t *)0x21a), (*(uint8_t *)0x21b), (*(uint16_t *) 0x20e), (*(uint16_t *) 0x21e) + printf "ies p1: %02x %02x\n", \ (*(uint8_t *)0x218), (*(uint8_t *)0x219) -printf "ren: p1: %02x %02x %02x p4: %02x %02x\n", \ - (*(uint8_t *)0x206),(*(uint8_t *)0x207),(*(uint8_t *)0x226),(*(uint8_t *)0x227),(*(uint8_t *)0x246) -printf " ds: p1: %02x %02x %02x p4: %02x %02x\n", \ - (*(uint8_t *)0x208),(*(uint8_t *)0x209),(*(uint8_t *)0x228),(*(uint8_t *)0x229),(*(uint8_t *)0x248) end document ports display h/w ports From 6de1b8b678e999b4095ecf8fdb04f64bb18404a3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 13 Aug 2011 02:49:39 -0700 Subject: [PATCH 245/411] ignore TAGS files --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index e14fcec05f..642f7253dd 100644 --- a/.gitignore +++ b/.gitignore @@ -5,3 +5,4 @@ build #*# .#* .gdb* +TAGS From 67008c55a6a95067a0925fb460afd4c3ee115799 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 4 May 2012 11:23:27 -0700 Subject: [PATCH 246/411] mm5s: first cut at mm5s clocks from mm5s-int 194c7f2 Conflicts: tos/platforms/mm5s/hardware/clock/PlatformClockP.nc --- .../x5xxx/timer/Msp430XV2ClockControlP.nc | 81 ++++--------------- 1 file changed, 15 insertions(+), 66 deletions(-) diff --git a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc index 7ee7f82ff1..47f3338c2f 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430XV2ClockControlP.nc @@ -94,71 +94,17 @@ module Msp430XV2ClockControlP @safe() { * is closest to your desired DCO frequency. */ UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx - - switch (dco_config) { - /* If unrecognized, default to the CC430 power-up value */ - case MSP430XV2_DCO_2MHz_RSEL2: - default: - UCSCTL1 = DCORSEL_2; - UCSCTL2 = FLLD_1 + 31; - divs = DIVS__1; - break; - case MSP430XV2_DCO_4MHz_RSEL3: - UCSCTL1 = DCORSEL_3; - UCSCTL2 = FLLD_1 + 63; - divs = DIVS__2; - break; - case MSP430XV2_DCO_8MHz_RSEL3: - UCSCTL1 = DCORSEL_3; - UCSCTL2 = FLLD_1 + 127; - divs = DIVS__4; - break; - case MSP430XV2_DCO_8MHz_RSEL4: - UCSCTL1 = DCORSEL_4; - UCSCTL2 = FLLD_1 + 127; - divs = DIVS__4; - break; - case MSP430XV2_DCO_16MHz_RSEL4: - UCSCTL1 = DCORSEL_4; - UCSCTL2 = FLLD_1 + 255; - divs = DIVS__8; - break; - case MSP430XV2_DCO_16MHz_RSEL5: - UCSCTL1 = DCORSEL_5; - UCSCTL2 = FLLD_1 + 255; - divs = DIVS__8; - break; - case MSP430XV2_DCO_32MHz_RSEL5: - UCSCTL1 = DCORSEL_5; - UCSCTL2 = FLLD_1 + 511; - divs = DIVS__16; - break; - case MSP430XV2_DCO_32MHz_RSEL6: - UCSCTL1 = DCORSEL_6; - UCSCTL2 = FLLD_1 + 511; - divs = DIVS__16; - break; - case MSP430XV2_DCO_64MHz_RSEL6: - UCSCTL1 = DCORSEL_6; - UCSCTL2 = FLLD_1 + 1023; - divs = DIVS__32; - break; - case MSP430XV2_DCO_64MHz_RSEL7: - UCSCTL1 = DCORSEL_7; - UCSCTL2 = FLLD_1 + 1023; - divs = DIVS__32; - break; - } + UCSCTL1 = DCORSEL_3; + UCSCTL2 = FLLD_1 + 127; + divs = DIVS__1; __bic_SR_register(SR_SCG0); // Enable the FLL control loop -#ifdef notdef /* No __delay_cycles intrinsic on MSPGCC (yet) */ // Worst-case settling time for the DCO when the DCO range bits have been // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx // UG for optimization. - // 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle - __delay_cycles(250000); -#endif + // 32 x 32 x 8 MHz / 32,768 Hz = 256000 = MCLK cycles for DCO to settle + //__delay_cycles(256000); // Loop until DCO fault flag is cleared. Ignore OFIFG, since it // incorporates XT1 and XT2 fault detection. @@ -168,15 +114,18 @@ module Msp430XV2ClockControlP @safe() { SFRIFG1 &= ~OFIFG; // Clear fault flags } while (UCSCTL7 & DCOFFG); // Test DCO fault flag - /* Use REFOCLK for ACLK, and DCOCLKDIV for MCLK and SMCLK */ - UCSCTL4 = SELA__REFOCLK | SELS__DCOCLKDIV | SELM__DCOCLKDIV; + UCSCTL4 = SELA__XT1CLK | SELS__DCOCLK | SELM__DCOCLK; - /* DIVPA routes ACLK to external pin, undivided - * DIVA uses ACLK at 2^15 Hz, undivided - * DIVS (SMCLK) uses DCOCLKDIV / N to produce 2^20Hz + /* + * ACLK is XT1/1 = 32KiHz (32768 Hz) + * SMCLK is DCOCLK/1 = 8MiHz + * MCLK is DCOCLK/1 = 8MiHz + * + * FIX ME + * DIVS (SMCLK) uses DCOCLKDIV / N to produce 2^20Hz (1uis) * DIVM (MCLK) uses DCOCLKDIV to produce DCO/2, undivided */ - UCSCTL5 = DIVPA__1 | DIVA__1 | divs | DIVM__1; + UCSCTL5 = DIVA__1 | divs | DIVM__1; } } @@ -184,7 +133,7 @@ module Msp430XV2ClockControlP @safe() { atomic { TA0CTL = TASSEL__ACLK | TACLR | MC__STOP | TAIE; TA0R = 0; - TA1CTL = TASSEL__SMCLK | TACLR | MC__STOP | TAIE; + TA1CTL = TASSEL__SMCLK | ID__8 | TACLR | MC__STOP | TAIE; TA1R = 0; } } From b646e7b787d57b0f456ed73109e44a5d2475e4ab Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 4 May 2012 11:37:45 -0700 Subject: [PATCH 247/411] mm5s: first cut at collapsed 8MHz clocking, 5438, mm5s from mm5s-int 3df2f35 Conflicts: tos/platforms/mm5s/hardware/clock/PlatformClockP.nc --- tos/platforms/mm5s/hardware/clock/PlatformClockC.nc | 3 +++ tos/platforms/mm5s/hardware/clock/PlatformClockP.nc | 7 +++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc b/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc index 3cff253d46..30727f12ed 100644 --- a/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc +++ b/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc @@ -46,4 +46,7 @@ configuration PlatformClockC { } implementation { components PlatformClockP; Init = PlatformClockP; + +// components Msp430XV2ClockControlP; + PlatformClockP.Msp430XV2ClockControl -> Msp430XV2ClockC; } diff --git a/tos/platforms/mm5s/hardware/clock/PlatformClockP.nc b/tos/platforms/mm5s/hardware/clock/PlatformClockP.nc index d64b0c1d97..9217c90b1a 100644 --- a/tos/platforms/mm5s/hardware/clock/PlatformClockP.nc +++ b/tos/platforms/mm5s/hardware/clock/PlatformClockP.nc @@ -57,7 +57,9 @@ * * So for power performance reasons we want to configure for 8MHz and 1.8V. * (Yes the 5438 is different but we are using it to simulate set up for - * the 5438a which has the tasty power performance specs.) + * the 5438a which has the tasty power performance specs.) Note, we ignore + * the 5438. It is quite buggy and has a pin for pin replacement (the 5438a) + * that behaves mor better. So why bother supporting the 5438. * * The TMicro timer (TA1) is run off DCOCLK/8 which yields 1us (not 1uis) * ticks. However, TMilli is the long term timer that runs when the system @@ -68,7 +70,8 @@ * in terms of 1mis (essentially different units). This is not a good situation. * It is better to be consistent in terms of units for both TMilli and TMicro. * The constrant is on TMicro because of the 8MHz restriction forcing 1us. - * This argues for TMilli also being in decimal time (1ms). + * This argues for TMilli also being in decimal time (1ms). This is what + * we are doing. Both TMilli and TMicro decimal units. * * We want the following set up to be true when we are complete: * From d1463dbdfbed66905e4848f0d746472d1cadc598 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 4 May 2012 11:40:32 -0700 Subject: [PATCH 248/411] mm5s: tweak SerialDirect for X5, ugly. from mm5s ae6233a --- apps/bootstrap/msp430/SerialDirect/Makefile | 6 +-- apps/bootstrap/msp430/SerialDirect/README.txt | 7 ++- .../msp430/SerialDirect/SerialDirectC.nc | 17 +++++- .../msp430/SerialDirect/SerialDirectP.nc | 52 +++++++------------ .../msp430/SerialDirect/uart_x1_config.h | 22 ++++++++ .../msp430/SerialDirect/uart_x2_config.h | 18 +++++++ .../msp430/SerialDirect/uart_x5_config.h | 11 ++++ 7 files changed, 93 insertions(+), 40 deletions(-) create mode 100644 apps/bootstrap/msp430/SerialDirect/uart_x1_config.h create mode 100644 apps/bootstrap/msp430/SerialDirect/uart_x2_config.h create mode 100644 apps/bootstrap/msp430/SerialDirect/uart_x5_config.h diff --git a/apps/bootstrap/msp430/SerialDirect/Makefile b/apps/bootstrap/msp430/SerialDirect/Makefile index c5f8590cc6..ccf21195a6 100644 --- a/apps/bootstrap/msp430/SerialDirect/Makefile +++ b/apps/bootstrap/msp430/SerialDirect/Makefile @@ -1,7 +1,7 @@ COMPONENT=SerialDirectC # -# if building for a x1 cpu define USE_X1. -# otherwise we are assuming we are building for an x2 cpu. +# X1 for 1611 etc. X2 for z1 (2617) mm4 (2618) +# X5 for 5137 (surf), mm5 (5438) # -#PFLAGS+=-DUSE_X1 +PFLAGS+=-DUSE_X5 include $(MAKERULES) diff --git a/apps/bootstrap/msp430/SerialDirect/README.txt b/apps/bootstrap/msp430/SerialDirect/README.txt index 337acb9ceb..af56a4a2fa 100644 --- a/apps/bootstrap/msp430/SerialDirect/README.txt +++ b/apps/bootstrap/msp430/SerialDirect/README.txt @@ -3,8 +3,11 @@ Author/Contact: Eric B. Decker Description: -Simple test program using low level Hpl interface to msp430 x2 -serial port. Sends the sequence 00 through ff and repeats. +Simple test program using low level Hpl interface to msp430 +serial port. (handles different processors using defines, X1, +X2, X5). Unfortunately they are different at the HPL level. + +Sends the sequence 00 through ff and repeats. Used for platform bringup. See support/sdk/python/misc/serlook.py for a python program that diff --git a/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc b/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc index 5e0c0cdd1a..f1963c7b43 100644 --- a/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc +++ b/apps/bootstrap/msp430/SerialDirect/SerialDirectC.nc @@ -1,13 +1,26 @@ + +#include "msp430usci.h" + configuration SerialDirectC {} implementation { components SerialDirectP as App, MainC; App.Boot -> MainC.Boot; #ifdef USE_X1 +#warning USE_X1: building for x1 msp430 components HplMsp430Usart0C as Port; -#else +#elif USE_X2 +#warning USE_X2: building for x2 msp430 components HplMsp430UsciA0C as Port; +#elif USE_X5 +#warning USE_X5: building for x5 msp430 + components new HplMsp430UsciC(UCA1CTLW0_, MSP430_USCI_A1_RESOURCE) as Port; + components HplMsp430UsciInterruptsA1P as PortInt; +#else +#error USE_ not defined, X needs to be X1, X2, or X5 #endif + App.Port -> Port; - App.PortInt -> Port; + App.PortInt -> PortInt; + PortInt.Usci -> Port; } diff --git a/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc b/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc index 138c28d527..304c4c3834 100644 --- a/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc +++ b/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc @@ -17,37 +17,11 @@ #endif #ifdef USE_X1 -const msp430_uart_union_config_t uart_config = { { - ubr : UBR_4MIHZ_4800, - umctl : UMCTL_4MIHZ_4800, - ssel : 2, - pena : 0, - pev : 0, - spb : 0, - clen : 1, - listen : 0, - mm : 0, - ckpl : 0, - urxse : 0, - urxeie : 1, - urxwie : 0, - utxe : 1, - urxe : 1 - } }; +#include "uart_x1_config.h" +#elif USE_X2 +#include "uart_x2_config.h" #else -const msp430_uart_union_config_t uart_config = { { - ubr: UBR_8MIHZ_4800, - umctl: UMCTL_8MIHZ_4800, - ucmode: 0, // uart - ucspb: 0, // one stop - uc7bit: 0, // 8 bit - ucpar: 0, // odd parity (but no parity) - ucpen: 0, // parity disabled - ucrxeie: 0, // err int off - ucssel: 2, // smclk - utxe: 1, // enable tx - urxe: 1, // enable rx -} }; +#include "uart_x5_config.h" #endif uint16_t rx_ints, tx_ints; @@ -58,9 +32,12 @@ module SerialDirectP { #ifdef USE_X1 interface HplMsp430Usart as Port; interface HplMsp430UsartInterrupts as PortInt; -#else +#elif USE_X2 interface HplMsp430UsciA as Port; interface HplMsp430UsciInterrupts as PortInt; +#else + interface HplMsp430Usci as Port; + interface HplMsp430UsciInterrupts as PortInt; #endif interface Boot; } @@ -71,15 +48,20 @@ implementation { while (!start) nop(); +#if defined(USE_X1) || defined(USE_X2) call Port.setModeUart((msp430_uart_union_config_t *) &uart_config); +#else + call Port.configure(&uart_config, FALSE); +#endif b = 0; - call Port.tx(b++); + call Port.setTxbuf(b++); while(1) { if (call Port.isTxIntrPending()) - call Port.tx(b++); + call Port.setTxbuf(b++); } } +#ifdef notdef async event void PortInt.txDone() { tx_ints++; } @@ -90,4 +72,8 @@ implementation { rx_ints++; tmp = call Port.rx(); } +#endif + + async event void PortInt.interrupted(uint8_t iv) { + } } diff --git a/apps/bootstrap/msp430/SerialDirect/uart_x1_config.h b/apps/bootstrap/msp430/SerialDirect/uart_x1_config.h new file mode 100644 index 0000000000..c17d8e107d --- /dev/null +++ b/apps/bootstrap/msp430/SerialDirect/uart_x1_config.h @@ -0,0 +1,22 @@ +#ifndef __UART_X1_CONFIG_H__ +#define __UART_X1_CONFIG_H__ + +const msp430_uart_union_config_t uart_config = { { + ubr : UBR_4MIHZ_4800, + umctl : UMCTL_4MIHZ_4800, + ssel : 2, + pena : 0, + pev : 0, + spb : 0, + clen : 1, + listen : 0, + mm : 0, + ckpl : 0, + urxse : 0, + urxeie : 1, + urxwie : 0, + utxe : 1, + urxe : 1 + } }; + +#endif /* __UART_X1_CONFIG_H__ */ diff --git a/apps/bootstrap/msp430/SerialDirect/uart_x2_config.h b/apps/bootstrap/msp430/SerialDirect/uart_x2_config.h new file mode 100644 index 0000000000..a57c8c38a0 --- /dev/null +++ b/apps/bootstrap/msp430/SerialDirect/uart_x2_config.h @@ -0,0 +1,18 @@ +#ifndef __UART_X2_CONFIG_H__ +#define __UART_X2_CONFIG_H__ + +const msp430_uart_union_config_t uart_config = { { + ubr: UBR_8MIHZ_4800, + umctl: UMCTL_8MIHZ_4800, + ucmode: 0, // uart + ucspb: 0, // one stop + uc7bit: 0, // 8 bit + ucpar: 0, // odd parity (but no parity) + ucpen: 0, // parity disabled + ucrxeie: 0, // err int off + ucssel: 2, // smclk + utxe: 1, // enable tx + urxe: 1, // enable rx +} }; + +#endif /* __UART_X2_CONFIG_H__ */ diff --git a/apps/bootstrap/msp430/SerialDirect/uart_x5_config.h b/apps/bootstrap/msp430/SerialDirect/uart_x5_config.h new file mode 100644 index 0000000000..83165d02fb --- /dev/null +++ b/apps/bootstrap/msp430/SerialDirect/uart_x5_config.h @@ -0,0 +1,11 @@ +#ifndef __UART_X5_CONFIG_H__ +#define __UART_X5_CONFIG_H__ + +const msp430_usci_config_t uart_config = { + ctlw0 : (0 << 8) | UCSSEL__SMCLK, /* 8000000 SMCLK */ + brw : 52, /* 9600 */ + /* ucbrf ucbrs */ + mctl : (1 << 4) | (0 << 1) | UCOS16 +}; + +#endif /* __UART_X5_CONFIG_H__ */ From 90fc9e5da83aacc088300bdfe6a97378934443bf Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 31 Aug 2011 11:13:51 -0700 Subject: [PATCH 249/411] mm5s: x5, mm5s: additional platform Clock tweaks. Collapse timer initilization. from mm5s-int 1f9b92f o document rationale for mm5 clock initilization o put wait_for_32k in. make functional. o clock instrumentation o collapse timer initilization outcalls. Easier to understand. Conflicts: tos/platforms/mm5s/hardware/clock/PlatformClockP.nc --- tos/platforms/mm5s/hardware/clock/PlatformClockC.nc | 3 --- 1 file changed, 3 deletions(-) diff --git a/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc b/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc index 30727f12ed..3cff253d46 100644 --- a/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc +++ b/tos/platforms/mm5s/hardware/clock/PlatformClockC.nc @@ -46,7 +46,4 @@ configuration PlatformClockC { } implementation { components PlatformClockP; Init = PlatformClockP; - -// components Msp430XV2ClockControlP; - PlatformClockP.Msp430XV2ClockControl -> Msp430XV2ClockC; } From 241d28938476c3f4f7adcb19a8ddba2cb47c15b7 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 1 Sep 2011 01:51:34 -0700 Subject: [PATCH 250/411] add Clock test (apps/tests/msp430/x5xxx/clock) --- apps/tests/msp430/x5xxx/clock/ClockC.nc | 18 ++++++ apps/tests/msp430/x5xxx/clock/ClockP.nc | 70 ++++++++++++++++++++++++ apps/tests/msp430/x5xxx/clock/Makefile | 3 + apps/tests/msp430/x5xxx/clock/README.txt | 15 +++++ 4 files changed, 106 insertions(+) create mode 100644 apps/tests/msp430/x5xxx/clock/ClockC.nc create mode 100644 apps/tests/msp430/x5xxx/clock/ClockP.nc create mode 100644 apps/tests/msp430/x5xxx/clock/Makefile create mode 100644 apps/tests/msp430/x5xxx/clock/README.txt diff --git a/apps/tests/msp430/x5xxx/clock/ClockC.nc b/apps/tests/msp430/x5xxx/clock/ClockC.nc new file mode 100644 index 0000000000..f5e5b3c122 --- /dev/null +++ b/apps/tests/msp430/x5xxx/clock/ClockC.nc @@ -0,0 +1,18 @@ +/** + **/ + +configuration ClockC { +} +implementation { + components MainC, ClockP, LedsC; + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components new TimerMilliC() as Timer2; + + ClockP -> MainC.Boot; + + ClockP.Timer0 -> Timer0; + ClockP.Timer1 -> Timer1; + ClockP.Timer2 -> Timer2; + ClockP.Leds -> LedsC; +} diff --git a/apps/tests/msp430/x5xxx/clock/ClockP.nc b/apps/tests/msp430/x5xxx/clock/ClockP.nc new file mode 100644 index 0000000000..46c48e2bed --- /dev/null +++ b/apps/tests/msp430/x5xxx/clock/ClockP.nc @@ -0,0 +1,70 @@ +/** + **/ + +#include "Timer.h" + +uint16_t start_xt1; +uint16_t start_dco; +uint16_t upper; + +module ClockP @safe() { + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Timer as Timer2; + uses interface Leds; + uses interface Boot; +} +implementation { + event void Boot.booted() { + + dint(); + upper = 0; + TA0R = 0; + TA0CTL &= ~TAIFG; + +#ifdef notdef + while (1) { + if (TA0CTL & TAIFG) { + upper++; + if (upper >= 30) + break; + TA0CTL &= ~TAIFG; + } + } +#endif + + TA0CCR0 = 1024; + TA0CCTL0 = 0; + TA0R = 0; + TA1R = 0; + while (1) { + if (TA0CCTL0 & CCIFG) { + upper = TA1R; + nop(); + break; + } + } + + call Timer0.startPeriodic( 250 ); + call Timer1.startPeriodic( 500 ); + call Timer2.startPeriodic( 1000 ); + } + + event void Timer0.fired() { + dbg("BlinkC", "Timer 0 fired @ %s.\n", sim_time_string()); + call Leds.led0Toggle(); + nop(); + } + + event void Timer1.fired() { + dbg("BlinkC", "Timer 1 fired @ %s \n", sim_time_string()); + call Leds.led1Toggle(); + nop(); + } + + event void Timer2.fired() { + dbg("BlinkC", "Timer 2 fired @ %s.\n", sim_time_string()); + call Leds.led2Toggle(); + nop(); + } +} diff --git a/apps/tests/msp430/x5xxx/clock/Makefile b/apps/tests/msp430/x5xxx/clock/Makefile new file mode 100644 index 0000000000..db0a67c8bb --- /dev/null +++ b/apps/tests/msp430/x5xxx/clock/Makefile @@ -0,0 +1,3 @@ +COMPONENT=ClockC +include $(MAKERULES) + diff --git a/apps/tests/msp430/x5xxx/clock/README.txt b/apps/tests/msp430/x5xxx/clock/README.txt new file mode 100644 index 0000000000..c06dbb0606 --- /dev/null +++ b/apps/tests/msp430/x5xxx/clock/README.txt @@ -0,0 +1,15 @@ +README for Clock +Author/Contact: cire831@gmail.com + +Description: + +Clock is simple test code for checking the 1 mis (possibly ms) ticker +vs. the 1 uis (possibly us) ticker. + +The program is intended to be run using a JTAG and breakpoints put +in strategic places. This can easily be modified to output either +via a network stack or direct printf. + +Whether the tickers are binary or decimal units is determined by the +platform and its constraints. It is recommended that the same kind +of units be used, either both binary or both decimal units. From 639c2b3e83aa736033596fd023cb719bd053eb58 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 3 Sep 2011 17:31:23 -0700 Subject: [PATCH 251/411] attempt at 8MHz, 115200 baud UART comm --- apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc | 1 + apps/bootstrap/msp430/SerialDirect/uart_x5_config.h | 10 +++++++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc b/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc index 304c4c3834..9c2bc56c0c 100644 --- a/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc +++ b/apps/bootstrap/msp430/SerialDirect/SerialDirectP.nc @@ -51,6 +51,7 @@ implementation { #if defined(USE_X1) || defined(USE_X2) call Port.setModeUart((msp430_uart_union_config_t *) &uart_config); #else + P5SEL |= BIT7 | BIT6; call Port.configure(&uart_config, FALSE); #endif b = 0; diff --git a/apps/bootstrap/msp430/SerialDirect/uart_x5_config.h b/apps/bootstrap/msp430/SerialDirect/uart_x5_config.h index 83165d02fb..619cb2e34b 100644 --- a/apps/bootstrap/msp430/SerialDirect/uart_x5_config.h +++ b/apps/bootstrap/msp430/SerialDirect/uart_x5_config.h @@ -2,10 +2,14 @@ #define __UART_X5_CONFIG_H__ const msp430_usci_config_t uart_config = { - ctlw0 : (0 << 8) | UCSSEL__SMCLK, /* 8000000 SMCLK */ - brw : 52, /* 9600 */ + /* + * 8MHz (8,000,000 Hz), 115200 baud + * UCBR 69, UCBRS 4, UCBRF 0, UCOS16 0 + */ + ctlw0 : (0 << 8) | UCSSEL__SMCLK, /* SMCLK */ + brw : 69, /* ucbrf ucbrs */ - mctl : (1 << 4) | (0 << 1) | UCOS16 + mctl : (0 << 4) | (4 << 1) }; #endif /* __UART_X5_CONFIG_H__ */ From 372c52996275d39eca57e0a75424caf2d684bdf6 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 4 May 2012 17:18:24 -0700 Subject: [PATCH 252/411] msp430-x5: pins/GeneralIO: add ports {A,B}{2,3} from mm5s-int 446ae44 Conflicts: tos/chips/msp430/pins/HplMsp430GeneralIOC.nc --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 897e8eb25c..3baafce188 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -166,7 +166,7 @@ configuration HplMsp430GeneralIOC { #endif // provides special ports explicitly - // this section of HplMsp430GeneralIOC supports the F14x series + // this section of HplMsp430GeneralIOC supports the F14x and F16x series // x1 family: msp430f149 and msp430f1611 #if defined(__msp430x14x) || defined(__msp430x16x) @@ -275,8 +275,10 @@ configuration HplMsp430GeneralIOC { #endif /* __msp430x241x || __msp430x261x || __msp430x26x */ - // x5 family: cc430f5137, msp430x541x, msp430f5438{,a} - +/* + * x5 family: cc430f513{3,5,7} + * in particular cc4305135 and cc4305137 + */ #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) provides interface HplMsp430GeneralIO as CBOUT0; provides interface HplMsp430GeneralIO as TA0CLK; @@ -327,8 +329,12 @@ configuration HplMsp430GeneralIOC { #endif /* cc430x513x || cc430x612x || cc430x613x */ +/* + * x5 family: msp430f541{8,9}{,a}, 543{5,6,7,8}{,a} + * in particular 5418a and 5438a + * You should be using the A parts. Non-A are buggy. + */ #if defined(__msp430x54x) || defined(__msp430x54xA) - provides interface HplMsp430GeneralIO as TA0CCR0; provides interface HplMsp430GeneralIO as TA0CCR1; provides interface HplMsp430GeneralIO as TA0CCR2; @@ -437,7 +443,7 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as ADC14; provides interface HplMsp430GeneralIO as ADC15; -#endif +#endif /* msp430x54x || msp430x54xA */ } implementation { From 163e1b56c00d54efa3d26ed8a44332e0a59ad8c4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 4 May 2012 23:19:53 -0700 Subject: [PATCH 253/411] support/make: fix modes, no execute --- support/make/MoteISTx5.target | 0 support/make/mm5s.target | 0 support/make/mulle.target | 0 3 files changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 support/make/MoteISTx5.target mode change 100755 => 100644 support/make/mm5s.target mode change 100755 => 100644 support/make/mulle.target diff --git a/support/make/MoteISTx5.target b/support/make/MoteISTx5.target old mode 100755 new mode 100644 diff --git a/support/make/mm5s.target b/support/make/mm5s.target old mode 100755 new mode 100644 diff --git a/support/make/mulle.target b/support/make/mulle.target old mode 100755 new mode 100644 From b31fe2c6bc55d38639f4e8fc5f99f635ca364c2d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 May 2012 20:55:05 -0700 Subject: [PATCH 254/411] msp430 [breakfast], add drive strength for digital Ports, add Port J. --- tos/chips/msp430/msp430hardware.h | 7 + tos/chips/msp430/msp430regtypes.h | 1 + tos/chips/msp430/pins/HplMsp430GeneralIO.nc | 21 ++- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 22 +++ tos/chips/msp430/pins/HplMsp430GeneralIOP.nc | 8 +- .../msp430/pins/HplMsp430GeneralIORenDsP.nc | 145 ++++++++++++++++++ .../msp430/pins/HplMsp430GeneralIORenP.nc | 55 ++++--- 7 files changed, 235 insertions(+), 24 deletions(-) create mode 100644 tos/chips/msp430/pins/HplMsp430GeneralIORenDsP.nc diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 608ebf25b8..3c66082351 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -571,6 +571,13 @@ enum { MSP430_PORT_RESISTOR_PULLUP, /**< Pullup resistor enabled */ }; +/* support for chips with configurable drive strengths */ +enum { + MSP430_PORT_DRIVE_STRENGTH_INVALID, + MSP430_PORT_DRIVE_STRENGTH_REDUCED, + MSP430_PORT_DRIVE_STRENGTH_FULL, +}; + #ifndef STATIC_ARRAY_SIZE /* diff --git a/tos/chips/msp430/msp430regtypes.h b/tos/chips/msp430/msp430regtypes.h index a74841e873..d17033ddd4 100644 --- a/tos/chips/msp430/msp430regtypes.h +++ b/tos/chips/msp430/msp430regtypes.h @@ -278,6 +278,7 @@ #define TYPE_PORT_DIR uint8_t #define TYPE_PORT_SEL uint8_t #define TYPE_PORT_REN uint8_t +#define TYPE_PORT_DS uint8_t /* * Port 0? very odd. TI starts with P1 so where did P0 come from? diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIO.nc b/tos/chips/msp430/pins/HplMsp430GeneralIO.nc index d702b8ef82..98d3a4db2f 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIO.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIO.nc @@ -1,5 +1,6 @@ - -/* Copyright (c) 2000-2003 The Regents of the University of California. +/* + * Copyright (c) 2012, Eric B. Decker + * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -36,6 +37,7 @@ * * @author Cory Sharp * @author Peter Bigot + * @author Eric B. Decker */ #include "TinyError.h" @@ -116,4 +118,19 @@ interface HplMsp430GeneralIO */ async command uint8_t getResistor(); + /** + * Set port drive strength. + * @param mode: MSP430_PORT_DRIVE_STRENGTH_* + * @return EINVAL if invalid mode or pin doesn't support drive + * strength config. + * FAIL if pin is not an output + * SUCCESS if pin supports it, is an output, and mode is valid + */ + async command error_t setDriveStrength(uint8_t mode); + + /** + * Get drive strength. + * @return MSP430_PORT_DRIVE_STRENGTH_* + */ + async command uint8_t getDriveStrength(); } diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index 3baafce188..f756c6adb7 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -1,4 +1,5 @@ /** + * Copyright (c) 2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL @@ -165,6 +166,13 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as Port117; #endif +#if defined (__msp430_have_portj) || defined(__MSP430_HAS_PORTJ__) || defined(__MSP430_HAS_PORTJ_R__) + provides interface HplMsp430GeneralIO as PortJ0; + provides interface HplMsp430GeneralIO as PortJ1; + provides interface HplMsp430GeneralIO as PortJ2; + provides interface HplMsp430GeneralIO as PortJ3; +#endif + // provides special ports explicitly // this section of HplMsp430GeneralIOC supports the F14x and F16x series // x1 family: msp430f149 and msp430f1611 @@ -668,6 +676,13 @@ implementation { new HplMsp430GeneralIOP(P11IN_, P11OUT_, P11DIR_, P11SEL_, 7) as P117, #endif +#if defined(__MSP430_HAS_PORTJ_R__) + new HplMsp430GeneralIORenDsP(PJIN_, PJOUT_, PJDIR_, PJREN_, PJDS_, 0) as PJ0, + new HplMsp430GeneralIORenDsP(PJIN_, PJOUT_, PJDIR_, PJREN_, PJDS_, 1) as PJ1, + new HplMsp430GeneralIORenDsP(PJIN_, PJOUT_, PJDIR_, PJREN_, PJDS_, 2) as PJ2, + new HplMsp430GeneralIORenDsP(PJIN_, PJOUT_, PJDIR_, PJREN_, PJDS_, 3) as PJ3, +#endif + PlatformC; // dummy to end unknown sequence #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) @@ -791,6 +806,13 @@ implementation { Port117 = P117; #endif +#if defined(__msp430_have_portJ) || defined(__MSP430_HAS_PORTJ__) || defined(__MSP430_HAS_PORTJ_R__) + PortJ0 = PJ0; + PortJ1 = PJ1; + PortJ2 = PJ2; + PortJ3 = PJ3; +#endif + #ifdef __msp430x14x STE0 = P30; SIMO0 = P31; diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc index 8e4b331950..10f5c9180e 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc @@ -1,5 +1,6 @@ - -/* Copyright (c) 2000-2005 The Regents of the University of California. +/* + * Copyright (c) 2012, Eric B. Decker + * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -32,6 +33,7 @@ /** * @author Joe Polastre + * @author Eric B. Decker */ #include "msp430regtypes.h" @@ -68,4 +70,6 @@ implementation async command bool IO.isIOFunc() { return (PORTxSEL & (0x01< + * @author Doug Carlson + */ + +#include "msp430regtypes.h" + +generic module HplMsp430GeneralIORenDsP( + unsigned int port_in_addr, + unsigned int port_out_addr, + unsigned int port_dir_addr, + unsigned int port_ren_addr, + unsigned int port_ds_addr, + uint8_t pin + ) @safe() +{ + provides interface HplMsp430GeneralIO as IO; +} +implementation +{ + #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* ONE, port_in_addr)) + #define PORTx (*TCAST(volatile TYPE_PORT_OUT* ONE, port_out_addr)) + #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* ONE, port_dir_addr)) + #define PORTxREN (*TCAST(volatile TYPE_PORT_REN* ONE, port_ren_addr)) + #define PORTxDS (*TCAST(volatile TYPE_PORT_DS* ONE, port_ds_addr)) + + async command void IO.set() { atomic PORTx |= (0x01 << pin); } + async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); } + async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); } + async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); } + async command bool IO.get() { return (call IO.getRaw() != 0); } + async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); } + async command bool IO.isInput() { return (PORTxDIR & (0x01 << pin)) == 0; } + async command void IO.makeOutput() { atomic PORTxDIR |= (0x01 << pin); } + async command bool IO.isOutput() { return (PORTxDIR & (0x01 << pin)) != 0; } + async command void IO.selectModuleFunc() { } + async command bool IO.isModuleFunc() { } + async command void IO.selectIOFunc() { } + async command bool IO.isIOFunc() { } + + async command error_t IO.setResistor(uint8_t mode) { + error_t rc = FAIL; + atomic { + if (0 == (PORTxDIR & (0x01 << pin))) { + rc = SUCCESS; + if (MSP430_PORT_RESISTOR_OFF == mode) { + PORTxREN &= ~(0x01 << pin); + } else if (MSP430_PORT_RESISTOR_PULLDOWN == mode) { + PORTxREN |= (0x01 << pin); + PORTx &= ~(0x01 << pin); + } else if (MSP430_PORT_RESISTOR_PULLUP == mode) { + PORTxREN |= (0x01 << pin); + PORTx |= (0x01 << pin); + } else { + rc = EINVAL; + } + } + } + return rc; + } + + async command uint8_t IO.getResistor() { + uint8_t rc = MSP430_PORT_RESISTOR_INVALID; + atomic { + if (0 == (PORTxDIR & (0x01 << pin))) { + if (PORTxREN & (0x01 << pin)) { + if (PORTx & (0x01 << pin)) { + rc = MSP430_PORT_RESISTOR_PULLUP; + } else { + rc = MSP430_PORT_RESISTOR_PULLDOWN; + } + } else { + rc = MSP430_PORT_RESISTOR_OFF; + } + } + } + return rc; + } + + async command error_t IO.setDriveStrength(uint8_t mode) { + error_t rc = FAIL; + atomic { + if (PORTxDIR & (0x01 << pin)) { + rc = SUCCESS; + if (MSP430_PORT_DRIVE_STRENGTH_REDUCED == mode) { + PORTxDS &= ~(0x01 << pin); + } else if (MSP430_PORT_DRIVE_STRENGTH_FULL == mode) { + PORTxDS |= (0x01 << pin); + } else { + rc = EINVAL; + } + } + } + return rc; + } + + + async command uint8_t IO.getDriveStrength() { + uint8_t rc = MSP430_PORT_DRIVE_STRENGTH_INVALID; + atomic { + if (PORTxDIR & (0x01 << pin)) { + if (PORTxDS & (0x01 << pin)) { + rc = MSP430_PORT_DRIVE_STRENGTH_FULL; + } else { + rc = MSP430_PORT_DRIVE_STRENGTH_REDUCED; + } + } + } + return rc; + } +} diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIORenP.nc b/tos/chips/msp430/pins/HplMsp430GeneralIORenP.nc index f04311dd28..bfbcfda478 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIORenP.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIORenP.nc @@ -1,27 +1,40 @@ - -/* "Copyright (c) 2000-2005 The Regents of the University of California. +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement - * is hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY - * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." - */ - -/** + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * * @author Joe Polastre * @author Peter A. Bigot + * @author Eric B. Decker */ #include "msp430regtypes.h" @@ -98,4 +111,6 @@ implementation } return rc; } + async command error_t IO.setDriveStrength(uint8_t mode){ return EINVAL;} + async command uint8_t IO.getDriveStrength(){ return MSP430_PORT_DRIVE_STRENGTH_INVALID;} } From 8f66e69fbcaf5f7b7b2c1b5d5a0963189e280c09 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 May 2012 22:08:50 -0700 Subject: [PATCH 255/411] msp430 [breakfast] tweak ADC12CTL registers to start --- tos/chips/msp430/adc12/HplAdc12P.nc | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc index 2f6f3fda7f..d87681c4df 100644 --- a/tos/chips/msp430/adc12/HplAdc12P.nc +++ b/tos/chips/msp430/adc12/HplAdc12P.nc @@ -109,25 +109,30 @@ implementation ADC12IV = 0; ADC12IFG = 0; } - - async command void HplAdc12.startConversion(){ - ADC12CTL0 |= ADC12ON; - ADC12CTL0 |= (ADC12SC + ENC); + + async command void HplAdc12.startConversion() { + /* + * Breakfast (jhu) does the enable on a single line + * trunk does the following... does it matter? + * for now leave the trunk version. + */ + ADC12CTL0 |= ADC12ON; + ADC12CTL0 |= (ADC12SC | ADC12ENC); } - + async command void HplAdc12.stopConversion(){ // stop conversion mode immediately, conversion data is unreliable uint16_t ctl1 = ADC12CTL1; - ADC12CTL1 &= ~(CONSEQ0 | CONSEQ1); - ADC12CTL0 &= ~(ADC12SC + ENC); + ADC12CTL1 &= ~(ADC12CONSEQ0 | ADC12CONSEQ1); + ADC12CTL0 &= ~(ADC12SC + ADC12ENC); ADC12CTL0 &= ~(ADC12ON); - ADC12CTL1 |= (ctl1 & (CONSEQ0 | CONSEQ1)); + ADC12CTL1 |= (ctl1 & (ADC12CONSEQ0 | ADC12CONSEQ1)); } - + async command void HplAdc12.enableConversion(){ - ADC12CTL0 |= ENC; + ADC12CTL0 |= ADC12ENC; } - + async command bool HplAdc12.isBusy(){ return (ADC12CTL1 & ADC12BUSY); } TOSH_SIGNAL(ADC12_VECTOR) { From 9c7d09bde2b9c46467ce33f303155738c7f46d69 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 19 May 2012 22:09:27 -0700 Subject: [PATCH 256/411] msp430 [breakfast], add protection for adc, check inch --- tos/chips/msp430/adc12/Msp430Adc12ImplP.nc | 29 +++++++++++++--------- 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc index ae20dfd8a1..1315254c13 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc @@ -233,7 +233,7 @@ implementation { error_t result = ERESERVE; #ifdef ADC12_CHECK_ARGS - if (!config) + if (!config || config->inch == INPUT_CHANNEL_NONE) return EINVAL; #endif atomic { @@ -281,7 +281,7 @@ implementation if (jiffies>0) return EINVAL; #endif - if (!config || jiffies == 1 || jiffies == 2) + if (!config || config->inch == INPUT_CHANNEL_NONE || jiffies == 1 || jiffies == 2) return EINVAL; #endif atomic { @@ -325,15 +325,16 @@ implementation async command error_t SingleChannel.configureMultiple[uint8_t id]( const msp430adc12_channel_config_t *config, - uint16_t *buf, uint16_t length, uint16_t jiffies) - { + uint16_t *buf, uint16_t length, uint16_t jiffies) { + error_t result = ERESERVE; + #ifdef ADC12_CHECK_ARGS #ifndef ADC12_TIMERA_ENABLED if (jiffies>0) return EINVAL; #endif - if (!config || !buf || !length || jiffies == 1 || jiffies == 2) + if (!config || config->inch == INPUT_CHANNEL_NONE || !buf || !length || jiffies == 1 || jiffies == 2) return EINVAL; #endif atomic { @@ -386,15 +387,16 @@ implementation async command error_t SingleChannel.configureMultipleRepeat[uint8_t id]( const msp430adc12_channel_config_t *config, - uint16_t *buf, uint8_t length, uint16_t jiffies) - { + uint16_t *buf, uint8_t length, uint16_t jiffies) { + error_t result = ERESERVE; + #ifdef ADC12_CHECK_ARGS #ifndef ADC12_TIMERA_ENABLED if (jiffies>0) return EINVAL; #endif - if (!config || !buf || !length || length > 16 || jiffies == 1 || jiffies == 2) + if (!config || config->inch == INPUT_CHANNEL_NONE || !buf || !length || length > 16 || jiffies == 1 || jiffies == 2) return EINVAL; #endif atomic { @@ -427,7 +429,7 @@ implementation resultBufferLength = length; resultBufferStart = buf; resultBufferIndex = 0; - + call HplAdc12.setCtl0(ctl0); call HplAdc12.setCtl1(ctl1); for (i=0; i<(length-1) && i < 15; i++) @@ -469,15 +471,18 @@ implementation async command error_t MultiChannel.configure[uint8_t id]( const msp430adc12_channel_config_t *config, adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buf, - uint16_t numSamples, uint16_t jiffies) - { + uint16_t numSamples, uint16_t jiffies) { + error_t result = ERESERVE; + #ifdef ADC12_CHECK_ARGS #ifndef ADC12_TIMERA_ENABLED if (jiffies>0) return EINVAL; #endif - if (!config || !memctl || !numMemctl || numMemctl > 15 || !numSamples || + /* note: numSamples % (numMemctl+1) is expensive and should be reworked */ + if (!config || config->inch == INPUT_CHANNEL_NONE || !memctl || !numMemctl || + numMemctl > 15 || !numSamples || !buf || jiffies == 1 || jiffies == 2 || numSamples % (numMemctl+1) != 0) return EINVAL; #endif From 77f31b72c3b14ac3f759e0d15e54d732a04b2acc Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 20 May 2012 22:59:18 -0700 Subject: [PATCH 257/411] msp430 [breakfast] add msp430/usci_gen1 as msp430/x2xxx/usci-bf --- .../msp430/x2xxx/usci-bf/HplMsp430Usci.nc | 292 +++++++++ .../msp430/x2xxx/usci-bf/HplMsp430UsciA.nc | 8 + .../msp430/x2xxx/usci-bf/HplMsp430UsciAC.nc | 109 ++++ .../msp430/x2xxx/usci-bf/HplMsp430UsciAP.nc | 74 +++ .../msp430/x2xxx/usci-bf/HplMsp430UsciB.nc | 8 + .../msp430/x2xxx/usci-bf/HplMsp430UsciBC.nc | 112 ++++ .../msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc | 75 +++ .../x2xxx/usci-bf/HplMsp430UsciInterrupts.nc | 54 ++ .../usci-bf/HplMsp430UsciInterruptsAB0P.nc | 88 +++ .../msp430/x2xxx/usci-bf/HplMsp430UsciP.nc | 198 ++++++ tos/chips/msp430/x2xxx/usci-bf/I2C.h | 54 ++ tos/chips/msp430/x2xxx/usci-bf/I2CSlave.nc | 30 + .../msp430/x2xxx/usci-bf/Msp430UsciA0P.nc | 37 ++ .../msp430/x2xxx/usci-bf/Msp430UsciB0P.nc | 39 ++ .../x2xxx/usci-bf/Msp430UsciConfigure.nc | 48 ++ .../msp430/x2xxx/usci-bf/Msp430UsciError.nc | 48 ++ .../msp430/x2xxx/usci-bf/Msp430UsciI2CB0C.nc | 69 ++ .../msp430/x2xxx/usci-bf/Msp430UsciI2CB0P.nc | 38 ++ .../msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc | 591 ++++++++++++++++++ .../msp430/x2xxx/usci-bf/Msp430UsciUartA0C.nc | 64 ++ .../msp430/x2xxx/usci-bf/Msp430UsciUartA0P.nc | 38 ++ .../msp430/x2xxx/usci-bf/Msp430UsciUartP.nc | 440 +++++++++++++ tos/chips/msp430/x2xxx/usci-bf/README.txt | 110 ++++ tos/chips/msp430/x2xxx/usci-bf/msp430usci.h | 139 ++++ 24 files changed, 2763 insertions(+) create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430Usci.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciA.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciAC.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciAP.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciB.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBC.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciInterrupts.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciInterruptsAB0P.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciP.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/I2C.h create mode 100644 tos/chips/msp430/x2xxx/usci-bf/I2CSlave.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciA0P.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciB0P.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciConfigure.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CB0C.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CB0P.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartA0C.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartA0P.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartP.nc create mode 100644 tos/chips/msp430/x2xxx/usci-bf/README.txt create mode 100644 tos/chips/msp430/x2xxx/usci-bf/msp430usci.h diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430Usci.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430Usci.nc new file mode 100644 index 0000000000..671d883601 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430Usci.nc @@ -0,0 +1,292 @@ +/* + * Copyright (c) 2012 John Hopkins University + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Control of an MSP430 USCI module. + * + * This interface is completely agnostic of the modes supported by a + * particular USCI module. It supports the common module registers + * for all modules/modes. + * + * @author Peter A. Bigot + * @author Doug Carlson + */ + +#include "msp430usci.h" + +interface HplMsp430Usci { + + /* ---------------------------------------- + * Introspection to identify a module when given a reference to its + * component + */ + + /** + * Return a unique identifier for this module among all USCI modules on the chip. + * + * There is a one-to-one correspondence between the value returned + * by this function and the set of pairs of (module_type, + * module_instance). + */ + async command uint8_t getModuleIdentifier (); + + /* ---------------------------------------- + * Read and write the module registers. + */ + async command void setCtl0(uint8_t v); + async command uint8_t getCtl0(); + + async command void setCtl1(uint8_t v); + async command uint8_t getCtl1(); + + async command void setBr0(uint8_t v); + async command uint8_t getBr0(); + + async command void setBr1(uint8_t v); + async command uint8_t getBr1(); + +// /** +// * Reads the USCmxMCTL Modulation Control register. +// * This register is present on USCI A modules. +// */ +// async command uint8_t getMctl(); +// +// /** +// * Write the UCmxMCTL Modulation Control register. +// * This register is present on USCI A modules. +// */ +// async command void setMctl(uint8_t v); +// +// /** +// * Reads the UCmxI2CIE register. +// * This register is present on only USCI modules with I2C. +// */ +// async command uint8_t getI2cie(); +// +// /** +// * Write the UCmxI2CIE register. +// * This register is present on all USCI modules with I2C. +// */ +// async command void setI2cie(uint8_t v); +// + + /** + * Read the UCmxSTAT Status register. + * This register is present on all USCI modules. + */ + async command uint8_t getStat(); + + /** + * Write the UCmxSTAT Status register. + * This register is present on all USCI modules. + */ + async command void setStat(uint8_t v); + + /** + * Read the UCmxRXBUF Receive Buffer register. + * This register is present on all USCI modules. + */ + async command uint8_t getRxbuf(); + + /** + * Write the UCmxRX Receive Buffer register. + * This register is present on all USCI modules. + */ + async command void setRxbuf(uint8_t v); + + /** + * Read the UCmxTXBUF Transmit Buffer register. + * This register is present on all USCI modules. + */ + async command uint8_t getTxbuf(); + + /** + * Write the UCmxTX Transmit Buffer register. + * This register is present on all USCI modules. + */ + async command void setTxbuf(uint8_t v); + +// /** +// * Read the UCmxABCTL Auto Baud Rate Control register. +// * This register is present only on USCI_A modules in UART mode. +// */ +// async command uint8_t getAbctl(); +// +// /** +// * Write the UCmxABCTL Auto Baud Rate Control register. +// * This register is present only on USCI_A modules in UART mode. +// */ +// async command void setAbctl(uint8_t v); +// +// /** +// * Read the UCmxI2COA I2C Own Address register. +// * This register is present only on USCI_B modules in I2C mode. +// */ +// async command uint8_t getI2coa(); +// +// /** +// * Write the UCmxI2COA I2C Own Address register. +// * This register is present only on USCI_B modules in I2C mode. +// */ +// async command void setI2coa(uint8_t v); +// +// /** +// * Read the UCmxIRCTL IrDA Control register. +// * This register is present only on USCI_A modules in UART mode. +// */ +// async command uint8_t getIrctl(); +// +// /** +// * Write the UCmxIRCTL IrDA Control register. +// * This register is present only on USCI_A modules in UART mode. +// */ +// async command void setIrctl(uint8_t v); +// +// /** +// * Read the UCmxIRTCTL IrDA Transmit Control register. +// * This register is present only on USCI_A modules in UART mode. +// */ +// async command uint8_t getIrtctl(); +// +// /** +// * Write the UCmxIRTCTL IrDA Transmit Control register. +// * This register is present only on USCI_A modules in UART mode. +// */ +// async command void setIrtctl(uint8_t v); +// +// /** +// * Read the UCmxIRRCTL IrDA Receive Control register. +// * This register is present only on USCI_A modules in UART mode. +// */ +// async command uint8_t getIrrctl(); +// +// /** +// * Write the UCmxIRRCTL IrDA Receive Control register. +// * This register is present only on USCI_A modules in UART mode. +// */ +// async command void setIrrctl(uint8_t v); +// +// /** +// * Read the UCmxI2CSA I2C Slave Address register. +// * This register is present only on USCI_B modules in I2C mode. +// */ +// async command uint8_t getI2csa(); +// +// /** +// * Write the UCmxI2CSA I2C Slave Address register. +// * This register is present only on USCI_B modules in I2C mode. +// */ +// async command void setI2csa(uint8_t v); +// +// /** +// * Reads the UCmxICTL Interrupt Control register. +// * This register is present on all USCI modules, and is used in all modes. +// */ +// async command uint8_t getIctl(); +// +// /** +// * Writes the UCmxICTL Interrupt Control register. +// * This register is present on all USCI modules. +// */ +// async command uint8_t setIctl(uint8_t v); + + /** + * Reads the UCmxIE Interrupt Enable register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint8_t getIe(); + + /** + * Writes the UCmxIE Interrupt Enable register. + * This register is present on all USCI modules. + */ + async command void setIe(uint8_t v); + + /** + * Reads the UCmxIFG Interrupt Enable register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint8_t getIfg(); + + /** + * Writes the UCmxIFG Interrupt Flag register. + * This register is present on all USCI modules. + */ + async command void setIfg(uint8_t v); + +// /** +// * Reads the UCmxIV Interrupt Vector register. +// * This register is present on all USCI modules, and is used in all modes. +// * It is read-only. +// */ +// async command uint8_t getIv(); + + /* ---------------------------------------- + * Higher-level operations consistent across all modes. */ + + /** + * Set the USCI to the mode and speed specified in the given configuration. + * + * @param config The speed-relevant parameters for module + * configuration. Must be provided. + * + * @param leave_in_reset If TRUE, the module is left in software + * reset mode upon exit, allowing the caller to perform additional + * configuration steps such as configuring mode-specific ports. It + * is the caller's responsibility to invoke leaveResetMode_() upon + * completion. + */ + async command void configure (const msp430_usci_config_t* config, + bool leave_in_reset); + + /** + * Place the USCI into software reset mode. + * This command should only be invoked by modules that implement + * specific USCI modes, in their mode-specific configuration + * functions. */ + async command void enterResetMode_ (); + + /** + * Take the USCI out of software reset mode. + * This command should only be invoked by modules that implement + * specific USCI modes, in their mode-specific configuration + * functions. */ + async command void leaveResetMode_ (); + + /** Return an enumeration value indicating the currently configured USCI + * mode. Values are from the MSP430_USCI_Mode_e enumeration. */ + async command uint8_t currentMode (); +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciA.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciA.nc new file mode 100644 index 0000000000..5c4e20e187 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciA.nc @@ -0,0 +1,8 @@ +interface HplMsp430UsciA{ + async command uint8_t getAbctl(); + async command void setAbctl(uint8_t v); + async command uint8_t getIrtctl(); + async command void setIrtctl(uint8_t v); + async command uint8_t getIrrctl(); + async command void setIrrctl(uint8_t v); +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciAC.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciAC.nc new file mode 100644 index 0000000000..dae93c10b8 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciAC.nc @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2012 John Hopkins University + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Core configuration for any USCI A module present on an MSP430 + * chip. + * + * There should be exactly one instance of this configuration for each + * USCI A module; e.g., USCI_A0 or USCI_A1. Each instance provides + * access to the USCI registers for its module, and maintains the + * resource management information required to determine which of the + * module's modes is currently active. + * + * @author Peter A. Bigot + * @author Doug Carlson + */ + +#include "msp430usci.h" + +generic configuration HplMsp430UsciAC ( + /** Offset of UCmxCTL0_ register for m=module_type and x=module_instance */ + unsigned int UCmxCTL0_, + /** Offset of IE register for m=module_type and x=module_instance + * (e.g. IE2, UC1IE */ + unsigned int UCmxIE_, + /** Name of resource used to arbitrate modes of this USCI instance */ + char RESOURCE_NAME[] +) @safe() { + provides { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciA as UsciA; + interface HplMsp430UsciInterrupts as RXInterrupts[ uint8_t mode ]; + interface HplMsp430UsciInterrupts as TXInterrupts[ uint8_t mode ]; + interface HplMsp430UsciInterrupts as StateInterrupts[ uint8_t mode ]; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + } + uses { + interface HplMsp430UsciInterrupts as RawRXInterrupts; + interface HplMsp430UsciInterrupts as RawTXInterrupts; + interface HplMsp430UsciInterrupts as RawStateInterrupts; + interface ResourceConfigure[uint8_t client]; + } +} implementation { + + enum { + USCI_ID = unique(MSP430_USCI_RESOURCE), + }; + + //generic USCI commands + components new HplMsp430UsciP(USCI_ID, UCmxCTL0_, UCmxIE_) as HplUsciP; + Usci = HplUsciP; + RawRXInterrupts = HplUsciP.RawRXInterrupts; + RawTXInterrupts = HplUsciP.RawTXInterrupts; + RawStateInterrupts = HplUsciP.RawStateInterrupts; + RXInterrupts = HplUsciP.RXInterrupts; + TXInterrupts = HplUsciP.TXInterrupts; + StateInterrupts = HplUsciP.StateInterrupts; + + //USCI A-specific commands + components new HplMsp430UsciAP(UCmxCTL0_) as HplUsciAP; + UsciA = HplUsciAP; + + //resources + components new FcfsArbiterC( RESOURCE_NAME ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ResourceDefaultOwner = ArbiterC; + ArbiterInfo = ArbiterC; + + //used to determine where to dispatch interrupts + HplUsciP.ArbiterInfo -> ArbiterC; +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciAP.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciAP.nc new file mode 100644 index 0000000000..e4fd860842 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciAP.nc @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2012 John Hopkins University + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Core implementation for any USCI module present on an MSP430 chip. + * + * This module makes available the module-specific registers, along + * with a small number of higher-level functions like generic USCI + * chip configuration that are shared among the various modes of the + * module. + * + * @author Peter A. Bigot + * @author Doug Carlson + **/ + +#include "msp430usci.h" + +generic module HplMsp430UsciAP( + /** Offset of UCmxCTLW0_ register for m=module_type and x=module_instance */ + unsigned int UCmxCTL0_ +) @safe() { + provides { + interface HplMsp430UsciA as UsciA; + } +} +implementation { +#define UCmxABCTL (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ - 0x03)) +#define UCmxIRTCTL (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ - 0x02)) +#define UCmxIRRCTL (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ - 0x01)) + + async command uint8_t UsciA.getAbctl() { return UCmxABCTL; } + async command void UsciA.setAbctl(uint8_t v) { UCmxABCTL = v; } + async command uint8_t UsciA.getIrtctl() { return UCmxIRTCTL; } + async command void UsciA.setIrtctl(uint8_t v) { UCmxIRTCTL = v; } + async command uint8_t UsciA.getIrrctl() { return UCmxIRRCTL; } + async command void UsciA.setIrrctl(uint8_t v) { UCmxIRRCTL = v; } + +#undef UCmxIRRCTL +#undef UCmxIRTCTL +#undef UCmxABCTL +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciB.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciB.nc new file mode 100644 index 0000000000..6ac1cd8b77 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciB.nc @@ -0,0 +1,8 @@ +interface HplMsp430UsciB{ + async command uint8_t getI2cie(); + async command void setI2cie(uint8_t v); + async command uint16_t getI2coa(); + async command void setI2coa(uint16_t v); + async command uint16_t getI2csa(); + async command void setI2csa(uint16_t v); +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBC.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBC.nc new file mode 100644 index 0000000000..5bae59ed2a --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBC.nc @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2012 John Hopkins University + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Core configuration for any USCI B module present on an MSP430 + * chip. + * + * There should be exactly one instance of this configuration for each + * USCI B module; e.g., USCI_B0 or USCI_B1. Each instance provides + * access to the USCI registers for its module, and maintains the + * resource management information required to determine which of the + * module's modes is currently active. + * + * @author Peter A. Bigot + * @author Doug Carlson + */ + +#include "msp430usci.h" + +generic configuration HplMsp430UsciBC( + /** Offset of UCmxCTL0_ register for m=module_type and x=module_instance */ + unsigned int UCmxCTL0_, + /** Offset of IE register for m=module_type and x=module_instance + * (e.g. IE2, UC1IE */ + unsigned int UCmxIE_, + /** offset of I2COA register for m=module_type and + * x=module_instance*/ + unsigned int UCmxI2COA_, + /** Name of resource used to arbitrate modes of this USCI instance */ + char RESOURCE_NAME[] +) @safe() { + provides { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciB as UsciB; + interface HplMsp430UsciInterrupts as RXInterrupts[ uint8_t mode ]; + interface HplMsp430UsciInterrupts as TXInterrupts[ uint8_t mode ]; + interface HplMsp430UsciInterrupts as StateInterrupts[ uint8_t mode ]; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + } + uses { + interface HplMsp430UsciInterrupts as RawRXInterrupts; + interface HplMsp430UsciInterrupts as RawTXInterrupts; + interface HplMsp430UsciInterrupts as RawStateInterrupts; + interface ResourceConfigure[uint8_t client]; + } +} implementation { + + enum { + USCI_ID = unique(MSP430_USCI_RESOURCE), + }; + + //generic USCI commands + components new HplMsp430UsciP(USCI_ID, UCmxCTL0_, UCmxIE_) as HplUsciP; + Usci = HplUsciP; + RawRXInterrupts = HplUsciP.RawRXInterrupts; + RawTXInterrupts = HplUsciP.RawTXInterrupts; + RawStateInterrupts = HplUsciP.RawStateInterrupts; + RXInterrupts = HplUsciP.RXInterrupts; + TXInterrupts = HplUsciP.TXInterrupts; + StateInterrupts = HplUsciP.StateInterrupts; + + //USCI B-specific commands + components new HplMsp430UsciBP(UCmxCTL0_, UCmxI2COA_) as HplUsciBP; + UsciB = HplUsciBP; + + //resources + components new FcfsArbiterC( RESOURCE_NAME ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ResourceDefaultOwner = ArbiterC; + ArbiterInfo = ArbiterC; + + //used to determine where to dispatch interrupts + HplUsciP.ArbiterInfo -> ArbiterC; +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc new file mode 100644 index 0000000000..5b414f53b8 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2012 John Hopkins University + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Core implementation for any USCI module present on an MSP430 chip. + * + * This module makes available the module-specific registers, along + * with a small number of higher-level functions like generic USCI + * chip configuration that are shared among the various modes of the + * module. + * + * @author Peter A. Bigot + * @author Doug Carlson + **/ + +#include "msp430usci.h" + +generic module HplMsp430UsciBP( + /** Offset of UCmxCTL0_ register for m=module_type and x=module_instance */ + unsigned int UCmxCTL0_, + unsigned int UCmxI2COA_ +) @safe() { + provides { + interface HplMsp430UsciB as UsciB; + } +} +implementation { +#define UCmxI2CIE (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x04)) +#define UCmxI2COA (*TCAST(volatile uint16_t* ONE, UCmxI2COA_ + 0x00)) +#define UCmxI2CSA (*TCAST(volatile uint16_t* ONE, UCmxI2COA_ + 0x02)) + + async command uint16_t UsciB.getI2coa() { return UCmxI2COA; } + async command void UsciB.setI2coa(uint16_t v) { UCmxI2COA = v; } + async command uint16_t UsciB.getI2csa() { return UCmxI2CSA; } + async command void UsciB.setI2csa(uint16_t v) { UCmxI2CSA = v; } + async command uint8_t UsciB.getI2cie() { return UCmxI2CIE; } + async command void UsciB.setI2cie(uint8_t v) { UCmxI2CIE = v; } + +#undef UCmxI2CSA +#undef UCmxI2COA +#undef UCmxI2CIE +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciInterrupts.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciInterrupts.nc new file mode 100644 index 0000000000..2bd8e7a958 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciInterrupts.nc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Interrupt events for an MSP430 USCI module. + * + * @author Peter A. Bigot + */ + +interface HplMsp430UsciInterrupts { + /** + * The only event is the reception of the interrupt. Notification + * includes the value of the interrupt vector register. + * + * @note Do not attempt to distinguish tx and rx interrupts here; + * delegate it to the mode-specific handler. For example, a receive + * interrupt for UART and SPI modes is indicated by a UCmxIV value + * of 2 using constant USCI_UCRXIFG; in I2C mode, the value 2 means + * USCI_I2C_UCALIFG. USCI_I2C_UCRXIFG has a value of 10. + */ + async event void interrupted(uint8_t iv); +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciInterruptsAB0P.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciInterruptsAB0P.nc new file mode 100644 index 0000000000..b4715bc8e6 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciInterruptsAB0P.nc @@ -0,0 +1,88 @@ +/** + * Copyright (c) 2012 John Hopkins University + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Define the interrupt handlers for USCI module A0 and B0. + * First-gen USCI modules A0 and B0 share interrupt vectors, which is + * delightful (ie. stupid... a royal pain in the a**) + * + * @author Peter A. Bigot + * @author Marcus Chang + * @author Doug Carlson + */ + +module HplMsp430UsciInterruptsAB0P { + provides { + interface HplMsp430UsciInterrupts as InterruptsUCA0Rx; + interface HplMsp430UsciInterrupts as InterruptsUCA0Tx; + interface HplMsp430UsciInterrupts as InterruptsUCA0State; + interface HplMsp430UsciInterrupts as InterruptsUCB0Rx; + interface HplMsp430UsciInterrupts as InterruptsUCB0Tx; + interface HplMsp430UsciInterrupts as InterruptsUCB0State; + } +} implementation { + + TOSH_SIGNAL(USCIAB0RX_VECTOR) { + if ((IFG2 & UCA0RXIFG) && (IE2 & UCA0RXIE) ) { + signal InterruptsUCA0Rx.interrupted(IFG2); + } else if((IFG2 & UCB0RXIFG) && (IE2 & UCB0RXIE)) { + signal InterruptsUCB0Rx.interrupted(IFG2); + } else if(UCB0I2CIE & UCB0STAT ) { + signal InterruptsUCB0State.interrupted(UCB0STAT); + } else { + //should not happen + } + } + + TOSH_SIGNAL(USCIAB0TX_VECTOR) { + if ( (IFG2 & UCA0TXIFG) && (IE2 & UCA0TXIE) ) { + signal InterruptsUCA0Tx.interrupted(IFG2); + } else if ( (IFG2 & UCB0RXIFG) && (IE2 & UCB0RXIE) ) { + signal InterruptsUCB0Rx.interrupted(IFG2); + } else if ( (IFG2 & UCB0TXIFG) && (IE2 & UCB0TXIE) ) { + signal InterruptsUCB0Tx.interrupted(IFG2); + } else { + //should not happen + } + } + + default async event void InterruptsUCB0Rx.interrupted(uint8_t iv){} + default async event void InterruptsUCB0Tx.interrupted(uint8_t iv){ } + default async event void InterruptsUCB0State.interrupted(uint8_t iv){} + default async event void InterruptsUCA0Rx.interrupted(uint8_t iv){} + default async event void InterruptsUCA0Tx.interrupted(uint8_t iv){ } + default async event void InterruptsUCA0State.interrupted(uint8_t iv){} +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciP.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciP.nc new file mode 100644 index 0000000000..8f6b19dd2f --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciP.nc @@ -0,0 +1,198 @@ +/* + * Copyright (c) 2012 John Hopkins University + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Core implementation for any USCI module present on an MSP430 chip. + * + * This module makes available the module-specific registers, along + * with a small number of higher-level functions like generic USCI + * chip configuration that are shared among the various modes of the + * module. + * + * @author Peter A. Bigot + * @author Doug Carlson + */ + +#include "msp430usci.h" + +generic module HplMsp430UsciP( + /** Identifier for this USCI module, unique across (type, instance) pairs */ + uint8_t USCI_ID, + /** Offset of UCmxCTL0_ register for m=module_type and x=module_instance */ + unsigned int UCmxCTL0_, + /** offset of interrupt-enable register**/ + unsigned int IE_ +) @safe() { + provides { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as TXInterrupts[ uint8_t mode ]; + interface HplMsp430UsciInterrupts as RXInterrupts[ uint8_t mode ]; + interface HplMsp430UsciInterrupts as StateInterrupts[ uint8_t mode ]; + } + uses { + interface HplMsp430UsciInterrupts as RawTXInterrupts; + interface HplMsp430UsciInterrupts as RawRXInterrupts; + interface HplMsp430UsciInterrupts as RawStateInterrupts; + interface ArbiterInfo; + interface Leds; + } +} +implementation { +#define UCmxCTL0 (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x00)) +#define UCmxCTL1 (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x01)) +#define UCmxBR0 (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x02)) +#define UCmxBR1 (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x03)) +#define UCmxMCTL (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x04)) +#define UCmxSTAT (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x05)) +#define UCmxRXBUF (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x06)) +#define UCmxTXBUF (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x07)) + +#define UCmxIE (*TCAST(volatile uint8_t* ONE, IE_ + 0x00)) +#define UCmxIFG (*TCAST(volatile uint8_t* ONE, IE_ + 0x01)) + + async command uint8_t Usci.getModuleIdentifier() { return USCI_ID; } + + async command void Usci.setCtl0(uint8_t v) { UCmxCTL0 = v;} + async command uint8_t Usci.getCtl0() { return UCmxCTL0;} + + async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } + async command uint8_t Usci.getCtl1() { return UCmxCTL1; } + + async command uint8_t Usci.getBr0() {return UCmxBR0; } + async command void Usci.setBr0(uint8_t v) { UCmxBR0 = v; } + + async command uint8_t Usci.getBr1() {return UCmxBR1; } + async command void Usci.setBr1(uint8_t v) { UCmxBR1 = v; } + + async command uint8_t Usci.getStat() { return UCmxSTAT; } + async command void Usci.setStat(uint8_t v) { UCmxSTAT = v; } + async command uint8_t Usci.getRxbuf() { return UCmxRXBUF; } + async command void Usci.setRxbuf(uint8_t v) { UCmxRXBUF = v; } + async command uint8_t Usci.getTxbuf() { return UCmxTXBUF; } + async command void Usci.setTxbuf(uint8_t v) { UCmxTXBUF = v; } + async command uint8_t Usci.getIe() { return UCmxIE; } + async command void Usci.setIe(uint8_t v) { + + //This is the point where it fails. UCmxIE looks OK in app.c + //(0x001, which is IE2 in msp430f235.h) + // this succeeds the first time (when called by configure) not the + // second (when called by uartstream.send + //ok, looks like this is causing the interrupt to fire, but we're + //not clearing it. now we're getting somewhere. + UCmxIE = v; + } + async command uint8_t Usci.getIfg() { return UCmxIFG; } + async command void Usci.setIfg(uint8_t v) { UCmxIFG = v; } + + async command void Usci.enterResetMode_ () { + __asm__ __volatile__("bis %0, %1" : : "i" UCSWRST, "m" UCmxCTL1); + //UCmxCTL1 |= UCSWRST; + } + + async command void Usci.leaveResetMode_ () { + __asm__ __volatile__("bic %0, %1" : : "i" UCSWRST, "m" UCmxCTL1); + //UCmxCTL1 &= ~UCSWRST; + } + + async command void Usci.configure (const msp430_usci_config_t* config, + bool leave_in_reset) + { + if (! config) { + return; + } + call Usci.enterResetMode_(); + call Usci.setCtl0(config->ctl0); + call Usci.setCtl1(config->ctl1 | UCSWRST); + //UCmxCTLW0 = config->ctlw0 + UCSWRST; + call Usci.setBr0(config->br0); + call Usci.setBr1(config->br1); + //UCmxBRW = config->brw; + UCmxMCTL = config->mctl; + if (! leave_in_reset) { + call Usci.leaveResetMode_(); + } + } + + async command uint8_t Usci.currentMode () + { + atomic { + if (! (UCmxCTL0 & UCSYNC)) { + return MSP430_USCI_UART; + } + if (UCMODE_3 == (UCmxCTL0 & (UCMODE0 | UCMODE1))) { + return MSP430_USCI_I2C; + } + return MSP430_USCI_SPI; + } + } + + /* + * Upon receipt of an interrupt, if the USCI is active then demux + * the interrupt to the handler for the appropriate USCI mode. + */ + async event void RawTXInterrupts.interrupted (uint8_t iv) { + if (call ArbiterInfo.inUse()) { + signal TXInterrupts.interrupted[ call Usci.currentMode() ](iv); + } + } + + async event void RawRXInterrupts.interrupted (uint8_t iv) { + if (call ArbiterInfo.inUse()) { + signal RXInterrupts.interrupted[ call Usci.currentMode() ](iv); + } + } + + async event void RawStateInterrupts.interrupted (uint8_t iv) { + if (call ArbiterInfo.inUse()) { + signal StateInterrupts.interrupted[ call Usci.currentMode() ](iv); + } + } + + default async event void RXInterrupts.interrupted[uint8_t mode] (uint8_t iv) { } + default async event void TXInterrupts.interrupted[uint8_t mode] (uint8_t iv) { } + default async event void StateInterrupts.interrupted[uint8_t mode] (uint8_t iv) { } + +#undef UCmxIFG +#undef UCmxIE +#undef UCmxTXBUF +#undef UCmxRXBUF +#undef UCmxSTAT +#undef UCmxMCTL +#undef UCmxBR1 +#undef UCmxBR0 +#undef UCmxCTL1 +#undef UCmxCTL0 +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/I2C.h b/tos/chips/msp430/x2xxx/usci-bf/I2C.h new file mode 100644 index 0000000000..94840a2296 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/I2C.h @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Phil Buonadonna + * @author Philip Levis + */ + +#ifndef _I2C_H +#define _I2C_H + +typedef struct { } TI2CExtdAddr; +typedef struct { } TI2CBasicAddr; + +typedef uint8_t i2c_flags_t; + +enum { + I2C_START = 0x01, + I2C_STOP = 0x02, + I2C_ACK_END = 0x04, + I2C_RESTART = 0x08, +}; + + +#endif /* _I2C_H */ diff --git a/tos/chips/msp430/x2xxx/usci-bf/I2CSlave.nc b/tos/chips/msp430/x2xxx/usci-bf/I2CSlave.nc new file mode 100644 index 0000000000..d00601b909 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/I2CSlave.nc @@ -0,0 +1,30 @@ +interface I2CSlave { + command error_t setOwnAddress(uint16_t addr); + command error_t enableGeneralCall(); + command error_t disableGeneralCall(); + + //signalled when a byte is sitting in the RXBUF + //returns TRUE: The signalled code called slaveReceive to read from + // the RXBUF already. + //returns FALSE: The signalled code is not ready to read from the + // RXBUF yet. If false is returned, the signalled code MUST call + // slaveReceive to read the byte from the buffer. Until this + // occurs, the bus will be stalled. + async event bool slaveReceiveRequested(); + + //retrieve the byte from the RXBUF. Should be called only once + // for each time that slaveReceiveRequested() is signalled + async command uint8_t slaveReceive(); + + //signalled when a byte is expected in TXBUF. + // return TRUE if you plan to write to it, FALSE otherwise + async event bool slaveTransmitRequested(); + async command void slaveTransmit(uint8_t data); + + //should these return error so we can say "no, I'm not going to be a + //slave right now"? + async event void slaveStart(bool isGeneralCall); + //or maybe we should pass an error to slaveStop so that the top + //level can know that it ended abnormally + async event void slaveStop(); +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciA0P.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciA0P.nc new file mode 100644 index 0000000000..7f60dbe569 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciA0P.nc @@ -0,0 +1,37 @@ +/** A non-generic instance of Msp430UsciC for USCI_A0. */ +configuration Msp430UsciA0P { + provides { + interface HplMsp430Usci as USCI; + interface HplMsp430UsciA as USCIA; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as RXInterrupts[uint8_t mode]; + interface HplMsp430UsciInterrupts as TXInterrupts[uint8_t mode]; + interface HplMsp430UsciInterrupts as StateInterrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + components new HplMsp430UsciAC(UCA0CTL0_, + IE2_, + MSP430_USCI_A0_RESOURCE) as UsciC; + USCI = UsciC; + USCIA = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + RXInterrupts = UsciC.RXInterrupts; + TXInterrupts = UsciC.TXInterrupts; + StateInterrupts = UsciC.StateInterrupts; + + components HplMsp430UsciInterruptsAB0P as IsrC; + UsciC.RawRXInterrupts -> IsrC.InterruptsUCA0Rx; + UsciC.RawTXInterrupts -> IsrC.InterruptsUCA0Tx; + UsciC.RawStateInterrupts -> IsrC.InterruptsUCA0State; +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciB0P.nc new file mode 100644 index 0000000000..c3547b116a --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciB0P.nc @@ -0,0 +1,39 @@ +/** A non-generic instance of Msp430UsciC for USCI_A0. */ +configuration Msp430UsciB0P { + provides { + interface HplMsp430Usci as USCI; + interface HplMsp430UsciB as USCIB; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as RXInterrupts[uint8_t mode]; + interface HplMsp430UsciInterrupts as TXInterrupts[uint8_t mode]; + interface HplMsp430UsciInterrupts as StateInterrupts[uint8_t mode]; + } + uses { + interface ResourceConfigure[uint8_t client]; + } + +} implementation { + components new HplMsp430UsciBC(UCB0CTL0_, + IE2_, + UCB0I2COA_, + MSP430_USCI_B0_RESOURCE) as UsciC; + USCI = UsciC; + USCIB = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + RXInterrupts = UsciC.RXInterrupts; + TXInterrupts = UsciC.TXInterrupts; + StateInterrupts = UsciC.StateInterrupts; + + components HplMsp430UsciInterruptsAB0P as IsrC; + UsciC.RawRXInterrupts -> IsrC.InterruptsUCB0Rx; + UsciC.RawTXInterrupts -> IsrC.InterruptsUCB0Tx; + UsciC.RawStateInterrupts -> IsrC.InterruptsUCB0State; +} + diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciConfigure.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciConfigure.nc new file mode 100644 index 0000000000..2987b8de15 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciConfigure.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Obtain access to a client-specific USCI configuration. + */ + +#include "msp430usci.h" + +interface Msp430UsciConfigure { + /** + * Return a pointer to the configuration that should be used for a + * particular USCI client. + */ + async command const msp430_usci_config_t* getConfiguration (); +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc new file mode 100644 index 0000000000..438443c307 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** Support notification of errors detected in MSP430 USCI modules. */ +interface Msp430UsciError { + /** + * Signalled when the USCI infrastructure detects a hardware error. + * + * The passed parameter is a bit set comprising values defined in + * msp430usci.h; these generally map to bits in the USCI UCxySTAT + * register. Note that this event is usually signalled from within + * an interrupt handler. + */ + async event void condition (unsigned int errors); +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CB0C.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CB0C.nc new file mode 100644 index 0000000000..fbcaa760d0 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CB0C.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * @author Jonathan Hui + */ + +#include +#include "msp430usci.h" + +generic configuration Msp430UsciI2CB0C() { + + provides interface Resource; + provides interface ResourceRequested; + provides interface I2CPacket; + provides interface I2CSlave; + + uses interface Msp430UsciConfigure; +} + +implementation { + + enum { + CLIENT_ID = unique( MSP430_USCI_B0_RESOURCE ), + }; + + components Msp430UsciB0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; + + components Msp430UsciI2CB0P as I2CP; + I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CSlave = I2CP.I2CSlave[CLIENT_ID]; + Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; + + UsciC.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; + //TODO: wire resource to I2CP: this way, it can check for whether + //the client actually has control and return EOFF appropriately +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CB0P.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CB0P.nc new file mode 100644 index 0000000000..8f0a77d71c --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CB0P.nc @@ -0,0 +1,38 @@ +configuration Msp430UsciI2CB0P { + provides { + interface I2CPacket[uint8_t client]; + interface I2CSlave[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as USCL; + interface HplMsp430GeneralIO as USDA; + } +} implementation { + + components Msp430UsciB0P as UsciC; + //masks are module-specific so they need to be passed in. + //alternately, the masks could be retrieved from the UsciA interface + components new Msp430UsciI2CP(UCB0TXIE, UCB0RXIE, UCB0TXIFG, UCB0RXIFG) as I2CC; + + I2CC.Usci -> UsciC; + I2CC.UsciB -> UsciC; + + I2CC.RXInterrupts -> UsciC.RXInterrupts[MSP430_USCI_I2C]; + I2CC.TXInterrupts -> UsciC.TXInterrupts[MSP430_USCI_I2C]; + I2CC.StateInterrupts -> UsciC.StateInterrupts[MSP430_USCI_I2C]; + I2CC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = I2CC; + ResourceConfigure = I2CC; + I2CPacket = I2CC.I2CBasicAddr; + I2CSlave = I2CC.I2CSlave; + Msp430UsciError = I2CC; + USCL = I2CC.SCL; + USDA = I2CC.SDA; + + components LocalTimeMilliC; + I2CC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc new file mode 100644 index 0000000000..0af2074c7b --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc @@ -0,0 +1,591 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + * @author Jonathan Hui + * @author Marcus Chang + * @author Doug Carlson + * @version $Revision$ $Date$ + */ + +#include +#include + +generic module Msp430UsciI2CP(uint8_t TXIE_MASK, uint8_t RXIE_MASK, uint8_t TXIFG_MASK, uint8_t RXIFG_MASK) { + + provides interface ResourceConfigure[ uint8_t client ]; + provides interface I2CPacket as I2CBasicAddr[uint8_t client]; + provides interface I2CSlave[uint8_t client]; + provides interface Msp430UsciError[uint8_t client]; + + uses interface HplMsp430UsciInterrupts as StateInterrupts; + uses interface HplMsp430UsciInterrupts as RXInterrupts; + uses interface HplMsp430UsciInterrupts as TXInterrupts; + + uses interface HplMsp430GeneralIO as SDA; + uses interface HplMsp430GeneralIO as SCL; + + uses interface HplMsp430Usci as Usci; + uses interface HplMsp430UsciB as UsciB; + uses interface Msp430UsciConfigure[ uint8_t client ]; + uses interface ArbiterInfo; + uses interface LocalTime as LocalTime_bms; +} + +implementation { + + enum{ + SLAVE = 0, + MASTER_READ = 1, + MASTER_WRITE = 2, + }; + + norace uint8_t* m_buf; + norace uint8_t m_len; + norace uint8_t m_pos; + norace uint8_t m_action; + norace i2c_flags_t m_flags; + void showRegisters(); + void nextRead(); + void nextWrite(); + void signalDone( error_t error ); + + + void pdbg(uint8_t v){ + atomic{ + P6OUT = 0x00; + P6OUT = v; + } + } + + + error_t configure_(const msp430_usci_config_t* config){ + if(! config){ + return FAIL; + } + //basic config (leave in reset) + call Usci.configure(config, TRUE); + //direction is don't-care in datasheet + call SCL.selectModuleFunc(); + call SDA.selectModuleFunc(); + + //i2c-specific config + call UsciB.setI2coa(config->i2coa); + call Usci.leaveResetMode_(); + + //enable slave-start interrupt + call UsciB.setI2cie(UCSTTIE); + return SUCCESS; + } + + + error_t slaveIdle(){ + //only reset if we are master: if we are already slave we don't + //want to clear any state flags by accident. + if (call Usci.getCtl0() & UCMST){ + call Usci.enterResetMode_(); + call Usci.setCtl0(call Usci.getCtl0() & ~UCMST); + call Usci.leaveResetMode_(); + } + call UsciB.setI2cie(UCSTTIE); + m_action = SLAVE; + return SUCCESS; + } + + + error_t unconfigure_(){ + call Usci.enterResetMode_(); + call SCL.selectIOFunc(); + call SDA.selectIOFunc(); + return SUCCESS; + } + + + async command void ResourceConfigure.configure[ uint8_t client ]() { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + + async command void ResourceConfigure.unconfigure[ uint8_t client ]() { + unconfigure_(); + } + + + /*************************************************************************/ + async command error_t I2CBasicAddr.read[uint8_t client]( i2c_flags_t flags, + uint16_t addr, uint8_t len, + uint8_t* buf ) { + uint16_t counter; + //TODO: should be address length-dependent + if (addr & 0xff80){ + return EINVAL; + } + + //TODO: check for resource ownership and fail if it's not valid! + //According to TI, we can just poll until the start condition + //clears. But we're nervous and want to bail out if it doesn't + //clear fast enough. This is how many times we loop before we + //bail out. + counter = I2C_ONE_BYTE_READ_COUNTER; + m_buf = buf; + m_len = len; + m_flags = flags; + m_pos = 0; + m_action = MASTER_READ; + + /* check if this is a new connection or a continuation */ + if (m_flags & I2C_START) { + //TODO: if reset can be removed, can we consolidate this with + //the repeated-start? + call Usci.enterResetMode_(); + call Usci.setCtl0(call Usci.getCtl0() | UCMST); + call Usci.leaveResetMode_(); + // set slave address + call UsciB.setI2csa(addr); + //check bus status at the latest point possible. + if ( call Usci.getStat() & UCBBUSY ){ + //if the bus is busy, bail out real quick + slaveIdle(); + return EBUSY; + } + //clear TR bit, set start condition + call Usci.setCtl1( (call Usci.getCtl1()&(~UCTR)) | UCTXSTT); + + //enable i2c arbitration interrupts, rx + call UsciB.setI2cie((call UsciB.getI2cie() & 0xf0) | UCNACKIE | UCALIE); + call Usci.setIe( call Usci.getIe() | RXIE_MASK ); + + /* if only reading 1 byte, STOP bit must be set right after + * START condition is triggered */ + if ( (m_len == 1) && (m_flags & I2C_STOP) ) { + //this logic seems to work fine + /* wait until START bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ + counter--; + } + /* set stop bit */ + //UCB0CTL1 |= UCTXSTP; + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + } else if (m_flags & I2C_RESTART) { + /* set slave address */ + //UCB0I2CSA = addr; + call UsciB.setI2csa(addr); + + //clear TR bit, start + /* UCTXSTT - generate START condition */ + //UCB0CTL1 |= UCTXSTT; + call Usci.setCtl1((call Usci.getCtl1() & ~UCTR) | UCTXSTT); + + //enable i2c arbitration interrupts, rx + call UsciB.setI2cie((call UsciB.getI2cie() & 0xf0) | UCNACKIE | UCALIE); + call Usci.setIe( call Usci.getIe() | RXIE_MASK ); + + /* if only reading 1 byte, STOP bit must be set right after START bit */ + if ( (m_len == 1) && (m_flags & I2C_STOP) ) { + /* wait until START bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ + counter--; + } + /* set stop bit */ + //UCB0CTL1 |= UCTXSTP; + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + } else { + //TODO: test + nextRead(); + } + if (counter > 0x01){ + return SUCCESS; + } else { + return FAIL; + } + } + + + void nextRead() { + uint16_t counter = 0xFFFF; + + if ((m_pos == (m_len - 2)) && m_len > 1) { + //we want to send NACK + STOP in response to the last byte. + //if m_pos == m_len-2 and we get the RX interrupt, that means + // that the slave has already written the next-to-last byte + // and we have acknowledged it--BUT we have not yet read it. + //By setting the stop condition here, we say "send STOP after + //the next byte," which will actually be the last byte. + // + //it is more intuitive to say "read the next-to-last byte and + //set the STOP condition real quick before the last byte gets + //sent so that we can NACK+STOP it". Maybe this would work if + //you slowed down the I2C clock enough? + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + /* read byte from RX buffer */ + m_buf[ m_pos++ ] = call Usci.getRxbuf(); + + //TODO: this should check m_flags: if RESTART flag is present, we + //should not send stop condition + if (m_pos == m_len) { + + //when we receive the last byte, wait until STP condition is + //cleared, then return. + while( (call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)){ + counter --; + } + //switch back to slave mode, we're done + slaveIdle(); + + //disable the rx interrupt + call Usci.setIe(call Usci.getIe() & ~RXIE_MASK); + if (counter > 0x01){ + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call UsciB.getI2csa(), m_pos, m_buf ); + } else { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call UsciB.getI2csa() , m_pos, m_buf ); + } + } + } + + + async command error_t I2CBasicAddr.write[uint8_t client]( i2c_flags_t flags, + uint16_t addr, uint8_t len, + uint8_t* buf ) { + //TODO: should be address length-dependent + if (addr & 0xff80){ + return EINVAL; + } + + //TODO: check for resource ownership and fail if it's not valid! + m_buf = buf; + m_len = len; + m_flags = flags; + m_pos = 0; + m_action = MASTER_WRITE; + + /* check if this is a new connection or a continuation */ + if (m_flags & I2C_START) { + //sequence as described in 17.3.4.2.1 of slau144h is: + // - set sa + // - set UCTR + // - set UCTXSTT + // (start/address written, then we get an interrupt) + // no reset should be necessary for this process. however, when + // I did it in a different sequence, the first write worked OK + // but the second one began with the UCSTPIFG set, and the first + // character was dropped. I have no explanation for why this + // would be the case. + + //need to enter master mode + call Usci.enterResetMode_(); + call Usci.setCtl0(call Usci.getCtl0() | UCMST); + call Usci.leaveResetMode_(); + + // set slave address + call UsciB.setI2csa(addr); + + //check bus status at the latest point possible. + if ( call Usci.getStat() & UCBBUSY ){ + //if the bus is busy, bail out real quick + slaveIdle(); + return EBUSY; + } + // UCTXSTT - generate START condition + call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); + //enable relevant state interrupts + call UsciB.setI2cie((call UsciB.getI2cie() & 0xf0) | UCNACKIE | UCALIE); + //enable tx interrupts + call Usci.setIe( call Usci.getIe() | TXIE_MASK); + } + /* is this a restart or a direct continuation */ + else if (m_flags & I2C_RESTART) { + // set slave address + call UsciB.setI2csa(addr); + + /* UCTR - set transmit */ + /* UCTXSTT - generate START condition */ + call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); + //do we not need to enable any interrupts here? + } else { + // continue writing next byte + nextWrite(); + } + return SUCCESS; + } + + + void nextWrite() { + uint16_t counter = 0xFFFF; + + //Hey, now here's a fun thing to do: + // It seems like if two masters set START at almost the same + // time, they both get the TX interrupt, so both write their 0th + // byte into the TX buffer. However, only one of them actually + // writes it out, and no arbitration-loss interrupt is raised for + // the "slow" one. When the "fast" one finishes its transaction, + // the slow one gets a second TX interrupt, which would cause us + // to skip over the first byte by accident. This checks for the + // issue and rewinds the buffer position to 0 if it applies. I + // make no guarantees about how stable this behavior is. + if ( call Usci.getCtl1() & UCTXSTT){ + m_pos = 0; + } + /* all bytes sent */ + if ( m_pos == m_len ) { + /* not setting STOP bit allows restarting transfer */ + if ( m_flags & I2C_STOP ) { + /* set stop bit */ + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + + /* wait until STOP bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)){ + counter--; + } + //STOPping and just finished last send, so we should go back + //to slave mode. + slaveIdle(); + } else { + //so, we just don't send the STOP bit. + } + + //disable tx interrupt, we're DONE + call Usci.setIe(call Usci.getIe() & ~TXIE_MASK ); + /* fail gracefully */ + if (counter > 0x01){ + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( SUCCESS, call UsciB.getI2csa(), m_len, m_buf ); + } else{ + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( FAIL, call UsciB.getI2csa(), m_len, m_buf ); + } + } else { + //send the next char + call Usci.setTxbuf(m_buf[ m_pos++ ]); + } + } + + + /***************************************************************************/ + + async event void TXInterrupts.interrupted(uint8_t iv) { + /* if master mode */ + if (call Usci.getCtl0() & UCMST){ + nextWrite(); + } else { + if(signal I2CSlave.slaveTransmitRequested[call ArbiterInfo.userId()]()){ + //true= "I'm responding RIGHT NOW" + // note that when this interrupt context ends, txinterrupt + // will be raised again. + } else { + //false= "I need to pause for a second" + //disable TX interrupt. + call Usci.setIe(call Usci.getIe() & ~TXIE_MASK); + } + } + } + + + async command void I2CSlave.slaveTransmit[uint8_t clientId](uint8_t data) { + //TODO: safety + //write it, reenable interrupt (if it was disabled) + call Usci.setTxbuf(data); + call Usci.setIe(call Usci.getIe() | TXIE_MASK); + } + + + async event void RXInterrupts.interrupted(uint8_t iv) { + /* if master mode */ + if (call Usci.getCtl0() & UCMST) { + nextRead(); + } else { + if (signal I2CSlave.slaveReceiveRequested[call ArbiterInfo.userId()]()) { + //TRUE: they're responding immediately (should have actually + //already responded at this point). + } else { + //FALSE: disable the RX interrupt, since the client needs to + //do some work + call Usci.setIe(call Usci.getIe() & ~RXIE_MASK); + } + } + } + + + async command uint8_t I2CSlave.slaveReceive[uint8_t client]() { + //re-enable rx interrupt, read the byte + call Usci.setIe(call Usci.getIe() | RXIE_MASK); + return call Usci.getRxbuf(); + } + + + async event void StateInterrupts.interrupted(uint8_t iv) { + uint8_t counter = 0xFF; +// if(call Usci.getStat() & UCALIFG) { +// printf("AL!"); +// } + if (call Usci.getCtl0() & UCMST) { + /* no acknowledgement */ + if (call Usci.getStat() & UCNACKIFG) { + //This occurs during write and read when no ack is received. + /* set stop bit */ + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + + /* wait until STOP bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + counter--; + } + call Usci.enterResetMode_(); + call Usci.leaveResetMode_(); + //back to slave idle mode + slaveIdle(); + + //signal appropriate event depending on whether we were + //transmitting or receiving + //Note that TR will be cleared if we lost MM arbitration because + //another master addressed us as a slave. However, this should + //manifest as an AL interrupt, not a NACK interrupt. + if (call Usci.getCtl1() & UCTR) { + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call UsciB.getI2csa(), m_len, m_buf ); + } else { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call UsciB.getI2csa(), m_len, m_buf ); + } + } + } else { + //slave-specific + /* arbitration lost (we USED TO be master)*/ + if (call Usci.getStat() & UCALIFG) { + uint8_t lastAction = m_action; + + slaveIdle(); + //clear AL flag + call Usci.setStat(call Usci.getStat() & ~(UCALIFG)); + //TODO: more descriptive error? I guess EBUSY is fair. + if(lastAction == MASTER_WRITE) { + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( EBUSY, call UsciB.getI2csa(), m_len, m_buf ); + } else if(lastAction == MASTER_READ) { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( EBUSY, call UsciB.getI2csa(), m_len, m_buf); + } + //once this returns, we should get another interrupt for STT + //if we are addressed. Otherwise, we're just chillin' in idle + //slave mode as per usual. + } + /* STOP condition */ + else if (call Usci.getStat() & UCSTPIFG) { + /* disable STOP interrupt, enable START interrupt */ + call UsciB.setI2cie((call UsciB.getI2cie() | UCSTTIE) & ~UCSTPIE); + signal I2CSlave.slaveStop[call ArbiterInfo.userId()](); + //TODO: should this not just call slaveIdle? + } + /* START condition */ + else if (call Usci.getStat() & UCSTTIFG) { + + //clear start flag, but leave enabled (repeated start) + //enable stop interrupt + call Usci.setStat(call Usci.getStat() &~ UCSTTIFG); + call UsciB.setI2cie(call UsciB.getI2cie() | UCSTPIE); + //enable RX/TX interrupts + call Usci.setIe(call Usci.getIe() | RXIE_MASK | TXIE_MASK); + signal I2CSlave.slaveStart[call ArbiterInfo.userId()]( call Usci.getStat() & UCGC); + } + } + } + + //defaults + default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data){} + default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data){} + default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client]() { + return &msp430_usci_i2c_default_config; + } + + + /***** Slave-mode functions ***/ + command error_t I2CSlave.setOwnAddress[uint8_t client](uint16_t addr) { + //TODO: check addr length for this mask + if (addr & 0xff80) { + return EINVAL; + } else { + //retain UCGCEN bit + call UsciB.setI2coa( (call UsciB.getI2coa() & UCGCEN) | addr); + return SUCCESS; + } + } + + command error_t I2CSlave.enableGeneralCall[uint8_t client]() { + if (UCGCEN & (call UsciB.getI2coa())){ + return EALREADY; + } else { + call UsciB.setI2coa(UCGCEN | (call UsciB.getI2coa())); + return SUCCESS; + } + } + + command error_t I2CSlave.disableGeneralCall[uint8_t client]() { + if (UCGCEN & ~(call UsciB.getI2coa())) { + return EALREADY; + } else { + call UsciB.setI2coa(~UCGCEN & (call UsciB.getI2coa())); + return SUCCESS; + } + } + + + default async event bool I2CSlave.slaveReceiveRequested[uint8_t client]() { return FALSE; } + default async event bool I2CSlave.slaveTransmitRequested[uint8_t client]() { return FALSE; } + + default async event void I2CSlave.slaveStart[uint8_t client](bool isGeneralCall) { ; } + default async event void I2CSlave.slaveStop[uint8_t client]() { ; } + +#ifdef notdef + void showRegisters() { + atomic{ + P6OUT = 0x00; + P6OUT = 0xff; + P6OUT = UCB0CTL0; + P6OUT = 0xff; + P6OUT = UCB0CTL1; + P6OUT = 0xff; + P6OUT = UCB0BR0; + P6OUT = 0xff; + P6OUT = UCB0BR1; + P6OUT = 0xff; + P6OUT = UCB0I2CIE; + P6OUT = 0xff; + P6OUT = UCB0STAT; + P6OUT = 0xff; + P6OUT = UCB0I2COA >> 8; + P6OUT = 0xff; + P6OUT = UCB0I2COA & 0xff; + P6OUT = 0xff; + P6OUT = UCB0I2CSA >> 8; + P6OUT = 0xff; + P6OUT = UCB0I2CSA & 0xff; + P6OUT = 0xff; + P6OUT = IE2; + P6OUT = 0xff; + P6OUT = 0x00; + } + } +#endif + +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartA0C.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartA0C.nc new file mode 100644 index 0000000000..5e9a7bd0cf --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartA0C.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Generic configuration for a client that shares USCI_A0 in UART mode. + */ + +#include "msp430usci.h" + +generic configuration Msp430UsciUartA0C() { + provides interface Resource; + provides interface UartStream; + provides interface UartByte; + provides interface Msp430UsciError; + + uses interface Msp430UsciConfigure; +} implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), + }; + + components Msp430UsciA0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA0P as UartP; + UartStream = UartP.UartStream[CLIENT_ID]; + UartByte = UartP.UartByte[CLIENT_ID]; + Msp430UsciError = UartP.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartP.Msp430UsciConfigure[CLIENT_ID]; + //not so sure about this one + UsciC.ResourceConfigure[CLIENT_ID] -> UartP.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartA0P.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartA0P.nc new file mode 100644 index 0000000000..a0e66143a0 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartA0P.nc @@ -0,0 +1,38 @@ +configuration Msp430UsciUartA0P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} implementation { + + components Msp430UsciA0P as UsciC; + //masks are module-specific so they need to be passed in. + //alternately, the masks could be retrieved from the UsciA interface + components new Msp430UsciUartP(UCA0TXIE, UCA0RXIE, UCA0TXIFG, UCA0RXIFG) as UartC; + + UartC.Usci -> UsciC; + UartC.UsciA -> UsciC; + UartC.RXInterrupts -> UsciC.RXInterrupts[MSP430_USCI_UART]; + UartC.TXInterrupts -> UsciC.TXInterrupts[MSP430_USCI_UART]; + UartC.StateInterrupts -> UsciC.StateInterrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; + +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartP.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartP.nc new file mode 100644 index 0000000000..ef0a290be6 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartP.nc @@ -0,0 +1,440 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Implement the UART-related interfaces for a MSP430 USCI module + * instance. + * + * + * Interrupt Management + * -------------------- + * + * Upon grant of the USCI in UART mode to a client, interrupts are + * turned off. + * + * On the MSP430, when the TX interrupt is raised the MCU + * automatically clears the UCTXIFG bit that indicates that the TXBUF + * is available for writing characters. Rather than maintain local + * state managed by cooperation between the TX interrupt handler and + * the send code, we leave the TX interrupt disabled and rely on the + * UCTXIFG flag to indicate that single-byte transmission is + * permitted. + * + * An exception to this is in support of the UartSerial.send() + * function. The transmit interrupt is enabled when the outgoing + * message is provided; subsequent sends are interrupt-driven, and the + * interrupt is disabled just prior to transmitting the last character + * of the packet. This leaves the UCTXIFG flag set upon completion of + * the transfer. + * + * The receive interrupt is enabled upon configuration. It is + * controlled using the UartStream functions. While a buffered + * receive operation is active, received characters will be stored and + * no notification provided until the full packet has been received. + * If no buffered receive operation is active, the receivedByte() + * event will be signaled for each received character. + * + * As with the transmit interrupt, MCU execution of the receive + * interrupt clears the UCRXIFG flag, making interrupt-driven + * reception fundamentally incompatible with the busy-waiting + * UartByte.receive() method. + * + * @author Peter A. Bigot + */ + +#include "msp430usci.h" + +generic module Msp430UsciUartP (uint8_t TXIE_MASK, uint8_t RXIE_MASK, uint8_t TXIFG_MASK, uint8_t RXIFG_MASK) @safe() { + provides { + interface UartStream[ uint8_t client ]; + interface UartByte[ uint8_t client ]; + interface ResourceConfigure[ uint8_t client ]; + interface Msp430UsciError[ uint8_t client ]; + } + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciA as UsciA; + interface HplMsp430UsciInterrupts as RXInterrupts; + interface HplMsp430UsciInterrupts as TXInterrupts; + interface HplMsp430UsciInterrupts as StateInterrupts; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + + interface Msp430UsciConfigure[ uint8_t client ]; + + interface ArbiterInfo; + + interface LocalTime as LocalTime_bms; + } + +} implementation { + + norace uint16_t m_tx_len, m_rx_len; + norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; + norace uint16_t m_tx_pos, m_rx_pos; + + /** The UART is busy if it's actively transmitting/receiving, or if + * there is an active buffered I/O operation. */ + bool isBusy () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + return (0 != m_tx_buf) || (0 != m_rx_buf); + } + + /** The given client is the owner if the USCI is in UART mode and + * the client is the user stored in the UART arbiter. */ + error_t checkIsOwner (uint8_t client) { + /* Ensure the USCI is in UART mode and we're the owning client */ + const uint8_t current_client = call ArbiterInfo.userId(); + if (0xFF == current_client) { + return EOFF; + } + if (current_client != client) { + return EBUSY; + } + return SUCCESS; + } + + + /** Take the USCI out of UART mode. + * + * Assumes the USCI is currently in UART mode. This will busy-wait + * until any characters being actively transmitted or received are + * out of their shift register. It disables the interrupts, puts + * the USCI into software resent, and returns the UART-related pins + * to their IO rather than module role. + * + * The USCI is left in software reset mode to avoid power drain per + * CC430 errata UCS6. */ + + void unconfigure_ () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + call Usci.setIe(call Usci.getIe() & ~ (TXIE_MASK | RXIE_MASK)); + call Usci.enterResetMode_(); + call URXD.makeOutput(); + call URXD.selectIOFunc(); + call UTXD.makeOutput(); + call UTXD.selectIOFunc(); + } + + /** Configure the USCI for UART mode. + * + * Invoke the USCI configuration to set up the serial speed, but + * leaves USCI in reset mode on completion. This function then + * follows up by setting the UART-related pins to their module role + * prior to taking the USCI out of reset mode. The RX interrupt is + * enabled, and TX is disabled.. + */ + + error_t configure_ (const msp430_usci_config_t* config) { + if (! config) { + return FAIL; + } + + /* Do basic configuration, leaving USCI in reset mode. Configure + * the UART pins, enable the USCI, and turn on the interrupts. */ + call Usci.configure(config, TRUE); + call URXD.makeInput(); + call URXD.selectModuleFunc(); + call UTXD.makeOutput(); + call UTXD.selectModuleFunc(); + call Usci.leaveResetMode_(); + call Usci.setIe((RXIE_MASK | call Usci.getIe()) & (~ TXIE_MASK)); + m_tx_buf = m_rx_buf = 0; + + return SUCCESS; + } + + /** Transmit the next character in the outgoing message. + * + * Assumes the USCI is in UART mode and the owning client has + * supplied a transmission buffer using UartStream. This method is + * only invoked by the transmit interrupt handler when TXBUF is + * ready to receive a new character. */ + + void nextStreamTransmit (uint8_t client) { + atomic { + uint8_t ch = m_tx_buf[m_tx_pos++]; + bool last_char = (m_tx_pos == m_tx_len); + if (last_char) { + /* Disable interrupts and release hold on UART before we + * transmit the character; this ensures that UCTXIFG remains + * set for subsequent byte transfers */ + call Usci.setIe(call Usci.getIe() & (~ TXIE_MASK)); + } + call Usci.setTxbuf(ch); + + /* On completion, disable the transmit infrastructure prior to + * signaling completion. */ + if (last_char) { + uint8_t* tx_buf = m_tx_buf; + uint16_t tx_len = m_tx_len; + m_tx_buf = 0; + signal UartStream.sendDone[client](tx_buf, tx_len, SUCCESS); + } + } + } + + async command error_t UartStream.send[uint8_t client]( uint8_t* buf, uint16_t len ) { + error_t rv; + rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (isBusy()) { + return EBUSY; + } + if ((0 == len) || (0 == buf)) { + return FAIL; + } + m_tx_buf = buf; + m_tx_len = len; + m_tx_pos = 0; + /* Enabling the interrupt causes the ISR to be invoked which + * transmits the first character. */ + call Usci.setIe((call Usci.getIe()) | TXIE_MASK); + + return SUCCESS; + } + + + default async event void UartStream.sendDone[uint8_t client]( uint8_t* buf, uint16_t len, error_t error ) { } + + /* The behavior of UartStream during reception is not well defined. + * In the original Msp430UartP implementation, both transmit and + * receive interrupts were enabled upon UART configuration. As + * noted earlier, we keep the transmit interrupt disabled to + * simplify control flow, but we do enable the receive interrupt for + * backwards compatibility. + * + * If receive(uint8_t*,uint16_t) is called, then subsequent received + * characters will be stored into the buffer until completion, and + * the receivedByte(uint8_t) event will not be signaled. If no + * buffered receive is active, then receivedByte(uint8_t) will be + * signaled. + * + * There is no coordination with UartByte, for which the receive + * operation simply busy-waits until the interrupt register + * indicates data is available. If UartStream's + * enableReceiveInterrupt() is in force, it is probable that the + * loop will timeout as the interrupt will clear the flag + * register. + * + * When the UART client releases control (unconfigures the UART), + * all interrupts are disabled. + */ + + async command error_t UartStream.enableReceiveInterrupt[uint8_t client]() { + error_t rv = checkIsOwner(client); + if (SUCCESS == rv) { + call Usci.setIe((call Usci.getIe()) | RXIE_MASK); + } + return rv; + } + + + async command error_t UartStream.disableReceiveInterrupt[uint8_t client]() { + error_t rv = checkIsOwner(client); + if (SUCCESS == rv) { + call Usci.setIe((call Usci.getIe()) & (~ RXIE_MASK)); + } + return rv; + } + + default async event void UartStream.receivedByte[uint8_t client]( uint8_t byte ) { } + + async command error_t UartStream.receive[uint8_t client]( uint8_t* buf, uint16_t len ) { + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if ((0 == len) || (0 == buf)) { + return FAIL; + } + atomic { + if (m_rx_buf) { + return EBUSY; + } + m_rx_buf = buf; + m_rx_len = len; + m_rx_pos = 0; + } + return SUCCESS; + } + + default async event void UartStream.receiveDone[uint8_t client]( uint8_t* buf, uint16_t len, error_t error ) { } + + async command error_t UartByte.send[uint8_t client]( uint8_t byte ) { + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (m_tx_buf) { + return EBUSY; + } + +// //From x2xx impl: clear/disable tx interrupt +// call Usci.setIfg(call Usci.getIfg() & ~TXIFG_MASK); +// call Usci.setIe(call Usci.getIe() & ~TXIE_MASK); +// call Usci.setTxbuf(byte); +// while(! (TXIFG_MASK & call Usci.getIfg())){ +// } +// call Usci.setIfg(call Usci.getIfg() & ~TXIFG_MASK); +// call Usci.setIe(call Usci.getIe() | TXIE_MASK); + +// This works, but it's odd that we have to spin on UCBUSY. plus, +// when this completes, we haven't sent yet. +// Not sure why this is necessary +// +// It is waiting for the last transmited byte to go out. On the x1 this was +// TXEPT in UxTCCTL and was checked. The x2 cpu and later uscis changed this +// to UCBUSY and frankly is pretty worthless because if either the TX or RX +// channels are busy UCBUSY will be asserted. TI sucks. + + while(call Usci.getStat() & UCBUSY){ + } + + /* Wait for TXBUF to become available */ + while (! (TXIFG_MASK & call Usci.getIfg())) { + } + /* Transmit the character. Note that it hasn't actually gone out + * over the wire until UCBUSY on UCmxSTAT is cleared. */ + call Usci.setTxbuf(byte); + return SUCCESS; + } + + + enum { + /** The timeout for UartByte.receive is specified in "byte times", + * which we can't know without reverse engineering the clock + * subsystem. Assuming a 57600 baud system, one byte takes + * roughly 170usec to transmit (ten bits per byte), or about five + * byte times per (binary) millisecond. */ + ByteTimesPerMillisecond = 5, + + /** Using an 8-bit value to represent a count of events with + * sub-millisecond duration is a horrible interface for humans: + * gives us at most 52msec to react. For testing purposes, scale + * that by some value (e.g., 100 will increase the maximum delay + * to 5 seconds). */ + ByteTimeScaleFactor = 1, + }; + + async command error_t UartByte.receive[uint8_t client]( uint8_t* byte, uint8_t timeout_bt ) { + uint32_t startTime_bms; + uint32_t timeout_bms = ByteTimeScaleFactor * ((ByteTimesPerMillisecond + timeout_bt - 1) / ByteTimesPerMillisecond); + + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (! byte) { + return FAIL; + } + if (m_rx_buf) { + return EBUSY; + } + + startTime_bms = call LocalTime_bms.get(); + while (! (RXIFG_MASK & (call Usci.getIfg()))) { + if((call LocalTime_bms.get() - startTime_bms) > timeout_bms) { + return FAIL; + } + } + + *byte = call Usci.getRxbuf(); + return SUCCESS; + } + + async event void RXInterrupts.interrupted(uint8_t iv) { + uint8_t current_client = call ArbiterInfo.userId(); + uint8_t stat; + uint8_t data; + if (0xFF == current_client) { + return; + } + stat = call Usci.getStat(); + data = call Usci.getRxbuf(); + //TODO: verify + /* SLAU259 16.3.6: Errors are cleared by reading UCAxRXD. Grab + * the old errors, read the incoming data, then read the errors + * again in case an overrun occurred between reading STATx and + * RXD. Mask off the bits we don't care about, and if there are + * any left on notify somebody. */ + stat = MSP430_USCI_ERR_UCxySTAT & (stat | (call Usci.getStat())); + if (stat) { + signal Msp430UsciError.condition[current_client](stat); + } + if (m_rx_buf) { + m_rx_buf[m_rx_pos++] = data; + if (m_rx_len == m_rx_pos) { + uint8_t* rx_buf = m_rx_buf; + uint16_t rx_len = m_rx_len; + m_rx_buf = 0; + signal UartStream.receiveDone[current_client](rx_buf, rx_len, SUCCESS); + } + } else { + signal UartStream.receivedByte[current_client](data); + } + } + + async event void TXInterrupts.interrupted(uint8_t iv) { + uint8_t current_client = call ArbiterInfo.userId(); + if (0xFF == current_client) { + return; + } + nextStreamTransmit(current_client); + } + + async event void StateInterrupts.interrupted(uint8_t iv) { + //NA + } + + default async command const msp430_usci_config_t* + Msp430UsciConfigure.getConfiguration[uint8_t client] () { + return &msp430_usci_uart_default_config; + } + + async command void ResourceConfigure.configure[uint8_t client] () { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[uint8_t client] () { + unconfigure_(); + } + + default async event void Msp430UsciError.condition[uint8_t client] (unsigned int errors) { } +} diff --git a/tos/chips/msp430/x2xxx/usci-bf/README.txt b/tos/chips/msp430/x2xxx/usci-bf/README.txt new file mode 100644 index 0000000000..5ec7d3ed33 --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/README.txt @@ -0,0 +1,110 @@ +This directory contains the USCI implementation for the first +generation USCI module (from Peter Bigot/People Power's explanation): + +There are at least three USCI implementations supported over the +MSP430 family. The implementations are distinguished by the functional +presence preproprocessor macro as defined in the TI standard headers from +Code Composer Studio distribution: + +*__MSP430_HAS_USCI__ -- indicates the original USCI implementation on chips: + msp430x21x2 msp430x22x2 msp430x22x4 msp430x23x msp430x23x0 msp430x241x + msp430x24x msp430x24x1 msp430x26x msp430x41x2 msp430x471x6 msp430x471x7 + msp430x47x msp430x47x3 msp430x47x4 msp430xG46x msp430xG47x + + __MSP430_HAS_USCI_AB0__ -- second generation USCI implementation on chips: + msp430x241x msp430x24x msp430x24x1 msp430x26x msp430x471x6 msp430x471x7 + msp430x47x3 msp430x47x4 msp430x241x msp430x24x msp430x24x1 msp430x26x + msp430x471x6 msp430x471x7 msp430x47x3 msp430x47x4 + + __MSP430_HAS_USCI_A0__, __MSP430_HAS_USCI_B0__ -- third generation USCI + implementation on chips: + cc430x513x cc430x612x cc430x613x msp430x54x msp430x54xA msp430x551x + msp430x552x + +Some characteristics of note: + +USCI A0/A1 offsets (UART/SPI) +============================= +Control registers +----------------- +-0x03 UCA0ABCTL +-0x02 UCA0IRTCTL +-0x01 UCAxIRRCTL + 0x00 UCAxCTL0 + 0x01 UCAxCTL1 + 0x02 UCAxBR0 + 0x03 UCAxBR1 + 0x04 UCAxMCTL + 0x05 UCAxSTAT + 0x06 UCAxRXBUF + 0x07 UCAxTXBUF + +Interrupt Registers +------------------- + 0x00 IE (A0: IE2, A1: UC1IE) + 0x01 IFG (A0: IFG2, A1: UC1IFG) + + +USCI B0/B1 offsets (SPI/I2C) +=========================== +Control registers +----------------- + 0x00 UCB0CTL0 + 0x01 UCB0CTL1 + 0x02 UCB0BR0 + 0x03 UCB0BR1 + 0x04 UCB0I2CIE + 0x05 UCB0STAT + 0x06 UCB0RXBUF + 0x07 UCB0TXBUF + +Interrupt Registers +------------------- + 0x00 IE (B0: IE2, B1: UC1IE) + 0x01 IFG (B0: IFG2, B1: UC1IFG) + +I2C address registers +--------------------- + 0x00 UCB0I2COA + 0x02 UCB0I2CSA + +Notes: +---- +@marcus: maybe you got the info about handling the RX interrupt +clearing the RX flag from peter's notes in the cc430's implementation. +I don't see where he got that info from, but he's normally right about +this sort of thing... + +tinyos core impl pushes checks for interrupt-pending all the way down +(osian = apply mask to Usci.getIfg). This is totally generic on +osian because only a single set of masks is defined in the headers +(and used across the modules). e.g. UCTXIFG vs. UCA0TXIFG + UCA1TXIFG. +If we follow the core impl, then the bottom-level usci component can't +be totally generic (c.f. HplMsp430UsciA0P.Usci.isTxIntrPending +HplMsp430UsciA1P.Usci.isTxIntrPending). This will double the ROM +consumption at the bottom for devices with 2 usci A modules, for +instance. +We can't exactly follow the osian approach using JUST the TI headers +(even though they are the same value, we probably shouldn't assume +that you can use UCA0TXIFG and UCA1TXIFG interchangeably). +Encapsulating the differences by using parameters to the generic +module is the way to address this, I think. The non-generic +Msp430UsciUartA0P configuration would instantiate a generic +Msp430UsciUartP module, giving it the set of USCI A0-specific flags +that it needs. The tradeoff is that masking operations couldn't be +inlined (e.g. would have to look up instance-specific mask to apply) + +0 x2xxx compatibility + - msp430usci.h: switch to mode-union types + - Top-level "alias" configs + - Msp430Uart0C -> Msp430UsciUartA0C + - Msp430Uart1C -> Msp430UsciUartA1C + - Msp430I2C1C -> Msp430UsciI2CB0C (?) + - Msp430I2C2C -> Msp430UsciI2CB1C (new) + - Msp430SpiB0C -> Msp430UsciSpiB0C + - Msp430SpiB1C -> Msp430UsciSpiB1C (new) + - To match mode-specific config interfaces, change the type + of interface declared and return the mode-specific member of the + usci union type. e.g. instead of + Msp430UsciConfigure.getConfiguration(){ return &cfg;} + Msp430UartConfigure.getConfiguration(){ return &(cfg.uartConfig);} diff --git a/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h new file mode 100644 index 0000000000..c9045571cd --- /dev/null +++ b/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h @@ -0,0 +1,139 @@ +#ifndef _H_Msp430Usci_h +#define _H_Msp430Usci_h + +#include "msp430hardware.h" + +#define MSP430_USCI_RESOURCE "Msp430Usci.Resource" + +#define MSP430_USCI_A0_RESOURCE "Msp430Usci.A0.Resource" +#define MSP430_USCI_B0_RESOURCE "Msp430Usci.B0.Resource" +#define MSP430_USCI_A1_RESOURCE "Msp430Usci.A1.Resource" +#define MSP430_USCI_B1_RESOURCE "Msp430Usci.B1.Resource" +#define MSP430_USCI_A2_RESOURCE "Msp430Usci.A2.Resource" +#define MSP430_USCI_B2_RESOURCE "Msp430Usci.B2.Resource" +#define MSP430_USCI_A3_RESOURCE "Msp430Usci.A3.Resource" +#define MSP430_USCI_B3_RESOURCE "Msp430Usci.B3.Resource" + +enum { + MSP430_USCI_Inactive, + MSP430_USCI_UART, + MSP430_USCI_SPI, + MSP430_USCI_I2C, +}; + +/** + * Aggregates basic configuration registers for an MSP430 USCI. + * These are specifically the registers common to all configurations. + * Mode-specific configuration data should be provided elsewise. + */ +typedef struct msp430_usci_config_t { + uint8_t ctl0; + uint8_t ctl1; + uint8_t br0; + uint8_t br1; + uint8_t mctl; + uint16_t i2coa; +} msp430_usci_config_t; + +//see note in Msp430UsciI2CP.nc I2CBasicAddr.read +#define I2C_ONE_BYTE_READ_COUNTER 0xE00 + +#ifndef TOS_DEFAULT_BAUDRATE +#define TOS_DEFAULT_BAUDRATE 115200 +#endif /* TOS_DEFAULT_BAUDRATE */ + +msp430_usci_config_t msp430_usci_uart_default_config = { + /* N81 UART mode driven by SMCLK */ + ctl0 : 0, + ctl1 : UCSSEL_SMCLK, + + /* SLAU259 Table 16-4 2^20Hz 115200: UBR=9, BRS=1, BRF=0 */ + br0 : 9, // 115200 + br1 : 0, + mctl : UCBRF_0 + UCBRS_1 +}; + +msp430_usci_config_t msp430_usci_spi_default_config = { + /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ + ctl0 : UCSSEL_SMCLK, + ctl1 : UCCKPL | UCMSB | UCMST | UCSYNC, + /* 2x Prescale */ + br0 : 2, + br1 : 0, + mctl : 0 /* Always 0 in SPI mode */ +}; + +msp430_usci_config_t msp430_usci_i2c_default_config = { + ctl0: UCSYNC|UCMODE_3|UCMM, + ctl1: UCSSEL_2, + br0: 0x08, + br1: 0x00, + mctl: 0x00, + i2coa: 'A', +}; + +enum { + /** Bit set in Msp430UsciError.condition parameter when a framing + * error (UART) or bus conflict (SPI) has been detected. Applies in + * UART mode, and SPI 4-wire master mode. */ + MSP430_USCI_ERR_Framing = UCFE, + /** Bit set in Msp430UsciError.condition parameter when an overrun + * error (lost character on input) has been detected. Applies in + * UART and SPI modes. */ + MSP430_USCI_ERR_Overrun = UCOE, + /** Bit set in Msp430UsciError.condition parameter when a parity + * error has been detected. Applies in UART mode. */ + MSP430_USCI_ERR_Parity = UCPE, + /** Mask for all UCxySTAT bits that represent reportable errors. */ + MSP430_USCI_ERR_UCxySTAT = MSP430_USCI_ERR_Framing | MSP430_USCI_ERR_Overrun | MSP430_USCI_ERR_Parity, +}; + +/** + * TODO: unify with x2xxx usci top level. + * These typedefs should make it such that switching to the x2xxx + * config interfaces (Msp430UartConfiguration, Msp430I2CConfiguration, + * Msp430SpiConfiguration) can be done by simply dereferencing the + * relevant portion of the unified usci_config_t. + * + * This wastes a little space, since UART requires 8 bytes for all its + * registers, while SPI only requires 4 and I2C only requires 6. + */ + +#ifdef notdef + typedef struct { + uint8_t uctl0; + uint8_t uctl1; + uint16_t ubr; + uint8_t mctl; + uint8_t irtctl; + uint8_t irrctl; + uint8_t abctl; + } msp430_uart_registers_t; + //reorder/expand msp430_uart_config_t accordingly + + typedef struct { + uint8_t uctl0; + uint8_t uctl1; + uint16_t ubr; + uint8_t unused[4]; + } msp430_spi_registers_t; + //reorder msp430_spi_config_t accordingly + + typedef struct { + uint8_t uctl0; + uint8_t uctl1; + uint16_t ubr; + uint16_t i2coa; + uint8_t unused[2]; + } msp430_i2c_registers_t; + //reorder/expand msp430_i2c_config_t accordingly + + typedef union{ + msp430_uart_union_config_t uartConfig; + msp430_spi_union_config_t spiConfig; + msp430_i2c_union_config_t i2cConfig; + } msp430_usci_config_t; + +#endif /* notdef */ + +#endif // _H_Msp430Usci_h From b1b1b89868eddf9d680208e20f980ef46241f74a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 20 May 2012 23:46:03 -0700 Subject: [PATCH 258/411] msp430 [breakfast] add breakfast tos/lib/onewire --- tos/lib/onewire/BasicOneWireBusC.nc | 58 ++++ tos/lib/onewire/OneWire.h | 73 +++++ tos/lib/onewire/OneWireBusC.nc | 70 +++++ tos/lib/onewire/OneWireBusClientC.nc | 71 +++++ tos/lib/onewire/OneWireCrcC.nc | 49 +++ tos/lib/onewire/OneWireCrcP.nc | 84 +++++ .../onewire/OneWireDeviceInstanceManagerC.nc | 61 ++++ .../onewire/OneWireDeviceInstanceManagerP.nc | 110 +++++++ tos/lib/onewire/OneWireDeviceMapperC.nc | 69 ++++ tos/lib/onewire/OneWireDeviceMapperP.nc | 294 ++++++++++++++++++ tos/lib/onewire/OneWireMasterC.nc | 61 ++++ tos/lib/onewire/OneWireMasterP.nc | 222 +++++++++++++ tos/lib/onewire/README.txt | 61 ++++ tos/lib/onewire/SingleOneWireDeviceMapperP.nc | 129 ++++++++ tos/lib/onewire/interfaces/OneWireCrc.nc | 48 +++ .../OneWireDeviceInstanceManager.nc | 110 +++++++ .../onewire/interfaces/OneWireDeviceMapper.nc | 81 +++++ .../onewire/interfaces/OneWireDeviceType.nc | 48 +++ tos/lib/onewire/interfaces/OneWireMaster.nc | 102 ++++++ 19 files changed, 1801 insertions(+) create mode 100644 tos/lib/onewire/BasicOneWireBusC.nc create mode 100644 tos/lib/onewire/OneWire.h create mode 100644 tos/lib/onewire/OneWireBusC.nc create mode 100644 tos/lib/onewire/OneWireBusClientC.nc create mode 100644 tos/lib/onewire/OneWireCrcC.nc create mode 100644 tos/lib/onewire/OneWireCrcP.nc create mode 100644 tos/lib/onewire/OneWireDeviceInstanceManagerC.nc create mode 100644 tos/lib/onewire/OneWireDeviceInstanceManagerP.nc create mode 100644 tos/lib/onewire/OneWireDeviceMapperC.nc create mode 100644 tos/lib/onewire/OneWireDeviceMapperP.nc create mode 100644 tos/lib/onewire/OneWireMasterC.nc create mode 100644 tos/lib/onewire/OneWireMasterP.nc create mode 100644 tos/lib/onewire/README.txt create mode 100644 tos/lib/onewire/SingleOneWireDeviceMapperP.nc create mode 100644 tos/lib/onewire/interfaces/OneWireCrc.nc create mode 100644 tos/lib/onewire/interfaces/OneWireDeviceInstanceManager.nc create mode 100644 tos/lib/onewire/interfaces/OneWireDeviceMapper.nc create mode 100644 tos/lib/onewire/interfaces/OneWireDeviceType.nc create mode 100644 tos/lib/onewire/interfaces/OneWireMaster.nc diff --git a/tos/lib/onewire/BasicOneWireBusC.nc b/tos/lib/onewire/BasicOneWireBusC.nc new file mode 100644 index 0000000000..0cd6d41172 --- /dev/null +++ b/tos/lib/onewire/BasicOneWireBusC.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Basic OneWire Bus component. + * + * Clients SHOULD obtain the resource before issuing any commands to OneWireDeviceComm. + * This exposes the basic onewire communication commands and a shared resource representing the bus. + * For most purposes, new device types should not wire directly to this component. + * + * @author Doug Carlson + * @modified 6/16/10 initial revision + */ + +configuration BasicOneWireBusC { + provides { + interface OneWireMaster; + interface Resource[uint8_t clientId]; + } +} +implementation { + components PlatformOneWireC, + new SimpleFcfsArbiterC(ONEWIRE_CLIENT); + + OneWireMaster = PlatformOneWireC.OneWireMaster; + + Resource = SimpleFcfsArbiterC.Resource; +} diff --git a/tos/lib/onewire/OneWire.h b/tos/lib/onewire/OneWire.h new file mode 100644 index 0000000000..9ef6844f6a --- /dev/null +++ b/tos/lib/onewire/OneWire.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * @author Janos Sallai + * @author David Moss + * @author Doug Carlson + * @modified 6/16/10 added definitions for general multi-type multi-device onewire bus. + */ + +#ifndef ONEWIRE_H +#define ONEWIRE_H + +#ifndef MAX_ONEWIRE_DEVICES_PER_TYPE +#define MAX_ONEWIRE_DEVICES_PER_TYPE 8 +#endif + +#ifndef MAX_ONEWIRE_DEVICES +#define MAX_ONEWIRE_DEVICES 16 +#endif + +enum { + ONEWIRE_SERIAL_LENGTH = 6, + ONEWIRE_DATA_LENGTH = 8, + ONEWIRE_WORDS_LENGTH = 2, +}; + +typedef union onewire_t { + uint8_t data[ONEWIRE_DATA_LENGTH]; + + struct { + uint8_t familyCode; + uint8_t serial[ONEWIRE_SERIAL_LENGTH]; + uint8_t crc; + }; + uint32_t words[ONEWIRE_WORDS_LENGTH]; + uint64_t id; +} onewire_t; + +#define ONEWIRE_NULL_ADDR 0LL +#define ONEWIRE_CLIENT "OneWire Client" +#endif // ONEWIRE_H diff --git a/tos/lib/onewire/OneWireBusC.nc b/tos/lib/onewire/OneWireBusC.nc new file mode 100644 index 0000000000..e95047a045 --- /dev/null +++ b/tos/lib/onewire/OneWireBusC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Exposes onewire communication primitives, resource for locking bus, + * and device discovery. + * + * Components using this SHOULD observe the same usage rules specified + * in BasicOneWireBusC. This wires the device-mapper into the Resource + * and OneWireMaster interfaces necessary for proper locking of the bus + * when discovery and device-specific operations both occur. + * + * @author Doug Carlson + * @modified 6/16/10 + */ + +configuration OneWireBusC { + provides { + interface OneWireMaster; + interface Resource[uint8_t clientId]; + interface OneWireDeviceMapper; + } +} implementation { + enum { + MAPPER_CLIENT_ID = unique(ONEWIRE_CLIENT), + }; + + components OneWireDeviceMapperC, + BasicOneWireBusC; + + OneWireMaster = BasicOneWireBusC.OneWireMaster; + Resource = BasicOneWireBusC.Resource; + + OneWireDeviceMapper = OneWireDeviceMapperC; + + OneWireDeviceMapperC.OneWireMaster -> BasicOneWireBusC.OneWireMaster; + OneWireDeviceMapperC.Resource -> + BasicOneWireBusC.Resource[MAPPER_CLIENT_ID]; +} diff --git a/tos/lib/onewire/OneWireBusClientC.nc b/tos/lib/onewire/OneWireBusClientC.nc new file mode 100644 index 0000000000..3312b95800 --- /dev/null +++ b/tos/lib/onewire/OneWireBusClientC.nc @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Generic configuration for shared resource/shared interfaces. + * + * The usage is roughly similar to the AMSenderC. Device-type drivers SHOULD + * use a new instance of OneWireBusClientC for all interactions with the bus. + * They SHOULD associate a OneWireDeviceType with their OneWireBusClientC, + * which will allow them to be notified when new device instances are present. + * The parameter indicates the maximum number of onewire devices of this type + * which will ever be attached to the bus. Setting this to a low value will + * save some RAM space, but will cause some devices to be unaddressable if this + * limit is exceeded. + * + * @author Doug Carlson + * @modified 6/16/10 + */ + +generic configuration OneWireBusClientC(uint8_t maxDevices) { + provides { + interface OneWireMaster; + interface Resource; + interface OneWireDeviceInstanceManager; + } + uses { + interface OneWireDeviceType; + } +} +implementation{ + components OneWireBusC, + new OneWireDeviceInstanceManagerC(maxDevices); + + Resource = OneWireBusC.Resource[unique(ONEWIRE_CLIENT)]; + OneWireMaster = OneWireBusC.OneWireMaster; + OneWireDeviceInstanceManager = OneWireDeviceInstanceManagerC; + + OneWireDeviceInstanceManagerC.OneWireDeviceType = OneWireDeviceType; + OneWireDeviceInstanceManagerC.OneWireDeviceMapper -> OneWireBusC.OneWireDeviceMapper; +} diff --git a/tos/lib/onewire/OneWireCrcC.nc b/tos/lib/onewire/OneWireCrcC.nc new file mode 100644 index 0000000000..1478ca1590 --- /dev/null +++ b/tos/lib/onewire/OneWireCrcC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +configuration OneWireCrcC { + provides { + interface OneWireCrc; + } +} + +implementation { + + components OneWireCrcP; + OneWireCrc = OneWireCrcP; + +} diff --git a/tos/lib/onewire/OneWireCrcP.nc b/tos/lib/onewire/OneWireCrcP.nc new file mode 100644 index 0000000000..9048cf65f5 --- /dev/null +++ b/tos/lib/onewire/OneWireCrcP.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "OneWire.h" + +/** + * POLYNOMIAL = x^8 + x^5 + x^4 + 1 + * @author Cory Sharp + * @author David Moss + */ + +module OneWireCrcP { + provides { + interface OneWireCrc; + } +} + +implementation { + + /***************** Functions ****************/ + uint8_t crc8( uint8_t crc, uint8_t newByte ) { + int i; + crc ^= newByte; + + for(i = 0; i < 8; i++) { + if( crc & 1 ) { + crc = (crc >> 1) ^ 0x8c; + } else { + crc >>= 1; + } + } + return crc; + } + + + /***************** OneWireCrc Commands ****************/ + async command uint8_t OneWireCrc.crc(onewire_t *rom) { + int i; + uint8_t crc = 0; + + for(i = 0; i < 7; i++) { + crc = crc8(crc, rom->data[i]); + } + return crc; + } + + + async command bool OneWireCrc.isValid(onewire_t *rom) { + return (rom->crc == call OneWireCrc.crc(rom)) && (rom->crc != 0); + } +} diff --git a/tos/lib/onewire/OneWireDeviceInstanceManagerC.nc b/tos/lib/onewire/OneWireDeviceInstanceManagerC.nc new file mode 100644 index 0000000000..ee364e967d --- /dev/null +++ b/tos/lib/onewire/OneWireDeviceInstanceManagerC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Basic device instance manager component, intended for use with a single + * device-type. This will be wired automatically if the driver uses the + * OneWireBusClientC component. maxDevices determines the maximum number + * of onewire devices which can be managed by this component. If this number + * is exceeded, some devices may no longer be addressable. + * + * @author Doug Carlson + * @modified 6/16/10 first revision + */ + +generic configuration OneWireDeviceInstanceManagerC(uint8_t maxDevices) { + provides { + interface OneWireDeviceInstanceManager; + } + uses { + interface OneWireDeviceMapper; + interface OneWireDeviceType; + } +} +implementation { + components new OneWireDeviceInstanceManagerP(maxDevices); + OneWireDeviceInstanceManager = OneWireDeviceInstanceManagerP; + + OneWireDeviceInstanceManagerP.OneWireDeviceMapper = OneWireDeviceMapper; + OneWireDeviceInstanceManagerP.OneWireDeviceType = OneWireDeviceType; +} diff --git a/tos/lib/onewire/OneWireDeviceInstanceManagerP.nc b/tos/lib/onewire/OneWireDeviceInstanceManagerP.nc new file mode 100644 index 0000000000..d65f8d90ef --- /dev/null +++ b/tos/lib/onewire/OneWireDeviceInstanceManagerP.nc @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of basic onewire device-type specific device instance + * manager. Up to maxDevices can be supported at once. If more are attached + * to the bus, they will not be addressable. + * + * @author Doug Carlson + * @modified 6/16/10 + */ + +generic module OneWireDeviceInstanceManagerP(uint8_t maxDevices) { + provides { + interface OneWireDeviceInstanceManager; + } + uses { + interface OneWireDeviceType; + interface OneWireDeviceMapper; + } +} +implementation { + uint8_t numDevices; + onewire_t devices[maxDevices]; + onewire_t curDevice; + + command uint8_t OneWireDeviceInstanceManager.numDevices() { + return numDevices; + } + + command onewire_t OneWireDeviceInstanceManager.getDevice(uint8_t index) { + return devices[index]; + } + + command error_t OneWireDeviceInstanceManager.setDevice(onewire_t id) { + curDevice = id; + return SUCCESS; + } + + command onewire_t OneWireDeviceInstanceManager.currentDevice() { + return curDevice; + } + + command error_t OneWireDeviceInstanceManager.refresh() { + return call OneWireDeviceMapper.refresh(); + } + + task void checkDevicesTask() { + int k; + onewire_t cur; + bool devicesChanged = FALSE; + uint8_t lastNumDevices = numDevices; + + numDevices = 0; + + for (k=0; k < call OneWireDeviceMapper.numDevices() && numDevices < MAX_ONEWIRE_DEVICES_PER_TYPE; k++) { + cur = call OneWireDeviceMapper.getDevice(k); + //printf("Checking %llx: %x\n\r", cur.id, call OneWireDeviceType.isOfType(cur)); + if (call OneWireDeviceType.isOfType(cur)) { + if (devices[numDevices].id != cur.id) { + devicesChanged = TRUE; + } + devices[numDevices++] = cur; + } + } + devicesChanged = devicesChanged || (numDevices != lastNumDevices); + + signal OneWireDeviceInstanceManager.refreshDone(SUCCESS, devicesChanged); + } + + event void OneWireDeviceMapper.refreshDone(error_t result, bool devicesChanged) { + if (devicesChanged && result == SUCCESS) { + post checkDevicesTask(); + } + else { + signal OneWireDeviceInstanceManager.refreshDone(result, FALSE); + } + } +} diff --git a/tos/lib/onewire/OneWireDeviceMapperC.nc b/tos/lib/onewire/OneWireDeviceMapperC.nc new file mode 100644 index 0000000000..6c429a5155 --- /dev/null +++ b/tos/lib/onewire/OneWireDeviceMapperC.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Wiring for standard one-wire discovery and identification protocol. + * + * If the MAX_ONEWIRE_DEVICES compile flag is set to 1, then the generic + * multi-device mapper will be replaced by the specialized single-device + * mapper (which takes up less ROM/RAM). + * + * @author Doug Carlson + * @modified 6/16/10 + */ + +configuration OneWireDeviceMapperC { + provides { + interface OneWireDeviceMapper; + } + uses { + interface Resource; + interface OneWireMaster; + } +} implementation { + #if MAX_ONEWIRE_DEVICES == 1 + #warning "using single-onewire device setup" + components SingleOneWireDeviceMapperP as Mapper; + #else + components OneWireDeviceMapperP as Mapper; + #endif + + components OneWireCrcC; + + OneWireDeviceMapper = Mapper; + + Mapper.OneWireMaster = OneWireMaster; + Mapper.Resource = Resource; + Mapper.OneWireCrc -> OneWireCrcC; +} diff --git a/tos/lib/onewire/OneWireDeviceMapperP.nc b/tos/lib/onewire/OneWireDeviceMapperP.nc new file mode 100644 index 0000000000..9882393cdb --- /dev/null +++ b/tos/lib/onewire/OneWireDeviceMapperP.nc @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of standard Onewire device discovery process. + * Adapted from Maxim AN-187: 1-Wire Search Algorithm + * http://pdfserv.maxim-ic.com/en/an/AN187.pdf + * + * @author Doug Carlson + * @modified 6/16/10 initial revision + */ + +module OneWireDeviceMapperP { + uses { + interface Resource; + interface OneWireCrc; + interface OneWireMaster; + } + provides { + interface OneWireDeviceMapper; + } +} implementation { + uint8_t numDevices; + onewire_t devices[MAX_ONEWIRE_DEVICES]; + bool devChanged; + + enum { + S_IDLE = 0x0, + S_BUSY = 0x1, + }; + + uint8_t state = S_IDLE; + + command uint8_t OneWireDeviceMapper.numDevices() { + return numDevices; + } + + command onewire_t OneWireDeviceMapper.getDevice(uint8_t index) { + return devices[index]; + } + + command error_t OneWireDeviceMapper.refresh() { + error_t err; + if (state == S_IDLE) { + err = call Resource.request(); + if (err == SUCCESS) { + state = S_BUSY; + return SUCCESS; + } + else { + state = S_IDLE; + return err; + } + } else { + return EALREADY; + } + } + + // method declarations + bool OWFirst(); + bool OWNext(); + bool OWSearch(); + + // global search state + onewire_t rom; + + int LastDiscrepancy; + int LastFamilyDiscrepancy; + int LastDeviceFlag; + + //-------------------------------------------------------------------------- + // Find the 'first' devices on the 1-Wire bus + // Return TRUE : device found, ROM number in rom buffer + // FALSE : no device present + // + bool OWFirst() { + // reset the search state + LastDiscrepancy = 0; + LastDeviceFlag = FALSE; + LastFamilyDiscrepancy = 0; + return OWSearch(); + } + + //-------------------------------------------------------------------------- + // Find the 'next' devices on the 1-Wire bus + // Return TRUE : device found, ROM number in rom buffer + // FALSE : device not found, end of search + // + bool OWNext() { + // leave the search state alone + return OWSearch(); + } + + //-------------------------------------------------------------------------- + // Perform the 1-Wire Search Algorithm on the 1-Wire bus using the existing + // search state. + // Return TRUE : device found, ROM number in rom buffer + // FALSE : device not found, end of search + // + // NOTE this was cut-n-pasted from the application note specified above. + // the only changes made have been to make it comply with TEP 3 and to directly call OneWireMaster and OneWireCrc. + bool OWSearch() { + uint8_t id_bit_number; + uint8_t last_zero, rom_byte_number, search_result; + uint8_t id_bit, cmp_id_bit; + uint8_t rom_byte_mask, search_direction; + + // initialize for search + id_bit_number = 1; + last_zero = 0; + rom_byte_number = 0; + rom_byte_mask = 1; + search_result = 0; + + // if the last call was not the last one + if (!LastDeviceFlag) { + // 1-Wire reset + if ( call OneWireMaster.reset() != SUCCESS) { + // reset the search + LastDiscrepancy = 0; + LastDeviceFlag = FALSE; + LastFamilyDiscrepancy = 0; + return FALSE; + } + + // issue the search command + call OneWireMaster.writeByte(0xF0); + + // loop to do the search + do { + // read a bit and its complement + id_bit = call OneWireMaster.readBit(); + cmp_id_bit = call OneWireMaster.readBit(); + + // check for no devices on 1-wire + if ( (id_bit == 1) && (cmp_id_bit == 1) ) { + break; + } + else { + // all devices coupled have 0 or 1 + if (id_bit != cmp_id_bit) { + search_direction = id_bit; // bit write value for search + } + else { + // if this discrepancy if before the Last Discrepancy + // on a previous next then pick the same as last time + if (id_bit_number < LastDiscrepancy){ + search_direction = ((rom.data[rom_byte_number] & rom_byte_mask) > 0); + } + else { + // if equal to last pick 1, if not then pick 0 + search_direction = (id_bit_number == LastDiscrepancy); + } + + // if 0 was picked then record its position in LastZero + if (search_direction == 0) { + last_zero = id_bit_number; + + // check for Last discrepancy in family + if (last_zero < 9) { + LastFamilyDiscrepancy = last_zero; + } + } + } + + // set or clear the bit in the ROM byte rom_byte_number + // with mask rom_byte_mask + if (search_direction == 1) { + rom.data[rom_byte_number] |= rom_byte_mask; + } else { + rom.data[rom_byte_number] &= ~rom_byte_mask; + } + + // serial number search direction write bit + call OneWireMaster.writeBit(search_direction); + + // increment the byte counter id_bit_number + // and shift the mask rom_byte_mask + id_bit_number++; + rom_byte_mask <<= 1; + + // if the mask is 0 then go to new SerialNum byte rom_byte_number and reset mask + if (rom_byte_mask == 0) { + rom_byte_number++; + rom_byte_mask = 1; + } + } + } while(rom_byte_number < 8); // loop until through all ROM bytes 0-7 + + // if the search was successful then + if (!((id_bit_number < 65) || !(call OneWireCrc.isValid(&rom)))) { + // search successful so set LastDiscrepancy,LastDeviceFlag,search_result + LastDiscrepancy = last_zero; + // check for last device + if (LastDiscrepancy == 0) { + LastDeviceFlag = TRUE; + } + search_result = TRUE; + } + } + + // if no device found then reset counters so next 'search' will be like a first + if (!search_result || !rom.data[0]) { + LastDiscrepancy = 0; + LastDeviceFlag = FALSE; + LastFamilyDiscrepancy = 0; + search_result = FALSE; + } + return search_result; + } + //------------------- + // end of copied code + + task void doFirstTask(); + task void doNextTask(); + + //if a device was found, continue searching. if not, release the bus and signal completion. + void checkAndContinue(bool devFound) { + uint8_t i; + + if (devFound) { + if(devices[numDevices].id != rom.id) { + devChanged = TRUE; + } + devices[numDevices++] = rom; + post doNextTask(); + } + else { + call OneWireMaster.reset(); + call Resource.release(); + for(i = numDevices; i < MAX_ONEWIRE_DEVICES; i++) { + devices[i].id = ONEWIRE_NULL_ADDR; + } + state = S_IDLE; + signal OneWireDeviceMapper.refreshDone(SUCCESS, devChanged); + } + } + + task void doFirstTask() { + bool devFound = FALSE; + devChanged = FALSE; + numDevices = 0; + + atomic { + devFound = OWFirst(); + checkAndContinue(devFound); + } + } + + task void doNextTask() { + bool devFound = FALSE; + + atomic { + devFound = OWNext(); + checkAndContinue(devFound); + } + } + + //begin search + event void Resource.granted() { + post doFirstTask(); + } +} diff --git a/tos/lib/onewire/OneWireMasterC.nc b/tos/lib/onewire/OneWireMasterC.nc new file mode 100644 index 0000000000..a398fbf88b --- /dev/null +++ b/tos/lib/onewire/OneWireMasterC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * @author David Moss + * @author Peter A. Bigot + */ + +generic configuration OneWireMasterC () { + provides { + interface OneWireMaster; + } + uses { + interface GeneralIO as Pin; + } +} + +implementation { + + components new OneWireMasterP(); + OneWireMaster = OneWireMasterP; + Pin = OneWireMasterP; + + components BusyWaitMicroC; + OneWireMasterP.BusyWait -> BusyWaitMicroC; + + //components LedC; + //OneWireMasterP.MultiLed -> LedC; +} diff --git a/tos/lib/onewire/OneWireMasterP.nc b/tos/lib/onewire/OneWireMasterP.nc new file mode 100644 index 0000000000..ec4acba1d3 --- /dev/null +++ b/tos/lib/onewire/OneWireMasterP.nc @@ -0,0 +1,222 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * This module is the implementation of an 1-wire bus master. + * @author Janos Sallai + * @author David Moss + * @author Doug Carlson + * + * @modified 6/16/10 Added addressDevice command per 1-wire standards. + */ + +generic module OneWireMasterP () { + provides { + interface OneWireMaster; + } + + uses { + interface GeneralIO as Pin; + interface BusyWait; + //interface MultiLed; + } +} + +implementation { + + /** Timing values, in binary microseconds, required for the protocol + * to work. Note that time ranges in comments are decimal + * microseconds, which are rougly 5% longer. + */ + + enum { + /** Time to wait after resetting device */ + t_RSTL = 504, // 480 <= t_RSTL + /** Maximum time following reset before device generates valid + * presence signal */ + t_PDHIGH = 63, // 15 <= t_PDHIGH <= 60 + /** Maximum time that presence pulse is valid */ + t_PDLOW = 252, // 60 <= t_PDLOW <= 240 + /** Duration to hold bus low when writing a zero */ + t_LOW0 = 63, // 60 <= t_LOW0 <= 120 + /** Duration to hold bus low when writing a one */ + t_LOW1 = 1, // 1 <= t_LOW1 <= 15 + /** Duration to hold bus low prior to reading a bit */ + t_RDV = 1, // t_RDV <= 15 + /** Recovery time between slots */ + t_REC = 1, // 1 <= t_REC + /** Duration of a read or write slot */ + t_SLOT = 63, // 60 <= t_SLOT <= 120 + }; + + /** + * standard onewire commands needed by this component. If there's only one device, we don't need the MATCH_ROM command. + */ + #if MAX_ONEWIRE_DEVICES == 1 + enum { + CMD_SKIP_ROM = 0xCC, + }; + #else + enum { + CMD_MATCH_ROM = 0x55, + }; + #endif + + async command error_t OneWireMaster.addressDevice(onewire_t id) { + #if MAX_ONEWIRE_DEVICES == 1 + call OneWireMaster.init(); + if(call OneWireMaster.reset() == SUCCESS) { + call OneWireMaster.writeByte(CMD_SKIP_ROM); + return SUCCESS; + } + else { + return EOFF; + } + #else + uint8_t i; + call OneWireMaster.init(); + if (call OneWireMaster.reset() == SUCCESS) { + call OneWireMaster.writeByte(CMD_MATCH_ROM); + for (i=0; i < ONEWIRE_DATA_LENGTH; i++) { + call OneWireMaster.writeByte(id.data[i]); + } + return SUCCESS; + } + else { + return EOFF; + } + #endif + } + + async command void OneWireMaster.idle() { + call Pin.makeInput(); + } + + async command void OneWireMaster.init() { + call Pin.makeInput(); + } + + async command void OneWireMaster.release() { + call Pin.makeInput(); + } + + async command error_t OneWireMaster.reset() { + bool present; + + atomic { + // it is assumed that the bus is in idle state here + + // transmit reset pulse + call Pin.clr(); + call Pin.makeOutput(); // output low + call BusyWait.wait(t_RSTL); // must be at least 480us + call Pin.makeInput(); // input with pullup set + + /* Wait for device to generate valid presence signal; sample it; + * then wait for it to clear before moving on. There is a + * device present if the signal is low. */ + call BusyWait.wait(t_PDHIGH); + present = (0 == call Pin.get()); + call BusyWait.wait(t_PDLOW); + } + return present ? SUCCESS : FAIL; + } + + async command void OneWireMaster.writeOne() { + atomic { + call Pin.makeOutput(); // output low + call Pin.clr(); + call BusyWait.wait(t_LOW1); + call Pin.makeInput(); // input with pullup set + call BusyWait.wait(t_REC + t_SLOT - t_LOW1); + } + } + + async command void OneWireMaster.writeZero() { + atomic { + call Pin.makeOutput(); // output low + call Pin.clr(); + call BusyWait.wait(t_LOW0); + call Pin.makeInput(); // input with pullup set + call BusyWait.wait(t_REC + t_SLOT - t_LOW0); + } + } + + async command void OneWireMaster.writeByte(uint8_t b) { + uint8_t i; + // send out bits, LSB first + for(i = 0; i < 8; i++) { + if(b & 0x01) { + call OneWireMaster.writeOne(); + } else { + call OneWireMaster.writeZero(); + } + b >>= 1; + } + } + + async command bool OneWireMaster.readBit() { + bool b; + + atomic { + call Pin.makeOutput(); // output low + call Pin.clr(); + call BusyWait.wait(t_RDV); + call Pin.makeInput(); // input with pullup set + b = !! call Pin.get(); // read pin + call BusyWait.wait(t_REC + t_SLOT - t_RDV); + } + return b; + } + + async command void OneWireMaster.writeBit(uint8_t b){ + if (b){ + call OneWireMaster.writeOne(); + }else{ + call OneWireMaster.writeZero(); + } + } + + async command uint8_t OneWireMaster.readByte() { + uint8_t i = 0; + uint8_t b = 0; + + // read bits, LSB first + for(i = 0; i < 8; i++) { + b >>= 1; + b |= call OneWireMaster.readBit() << 7; + } + return b; + } +} diff --git a/tos/lib/onewire/README.txt b/tos/lib/onewire/README.txt new file mode 100644 index 0000000000..5a7f8b02ee --- /dev/null +++ b/tos/lib/onewire/README.txt @@ -0,0 +1,61 @@ +This directory contains the interfaces and implementation of a low-level +driver implementation of the one-wire protocol, as well as interfaces and +implementations of reusable onewire components that streamline the +development of user code and promote safe use of the bus. + +From the perspective of a developer implementing a driver for a one-wire +device, one should create a new instance of OneWireBusClientC and use the +Resource, OneWireMaster, and OneWireDeviceInstanceManager that this exposes +to deal with the details of using the bus and maintaining the list of +currently-attached devices. The driver implementer should provide a component +which provides the OneWireDeviceType interface, this lets the discovery +process properly associate device instances with the correct bus clients. +Only when a component has obtained the resource from its OneWireBusClientC +should it use the OneWireMaster. + +There is one important compiler flag to know about: + +* MAX_ONEWIRE_DEVICES specifies how many physical one-wire devices, total, + may exist on the bus at one time. If this is set to 1, then the generic + multi-device discovery and addressing protocols will be replaced with + specialized single-device discovery and addressing protocols. If more + physical devices are attached at run-time than this flag specifies, then + the last devices to be discovered will be ignored. Devices are discovered + in ascending order by ID, LSB first. + +Both of these flags indicate how much space to set aside for caches of device +IDs at the OneWireDeviceMapper (8 bytes x MAX_ONEWIRE_DEVICES) and at each +OneWireDeviceInstanceManager instance (8 bytes x MAX_ONEWIRE_DEVICES_PER_TYPE + x number of DeviceInstanceManager instances) + +On a side note, if only official devices manufactured by dallas +semiconductors/maxim(?) are in use, they are supposed to follow a standard +numbering scheme: + +* The 7 least-significant bits of the ID is the family code, which indicates + the specific type of device on the bus. + +* If the most-significant bit of the least-significant byte is a 1, this + indicates that the device is a customer-specific subtype of the type + indicated by the family code. If this is the case, then the 12 + most-significant bits of the serial number identify the customer code. + +* the implementation provided leaves this logic entirely generic. some + optimizations would definitely be possible if all devices in use follow + the standards to a T, but in a research setting (where developers may be + building their own peripherals, for instance), it's not really appropriate. + +TODOs +* "strict" implementation + +** DeviceType is specified by family code and customer code. + +** If there are no customer codes in use, or there are no two device types + with the same family code and different customer codes, then + instanceManagers have fixed overhead (just store the first device index + and the number of devices for the type) + +* ID comparison C function in OneWireMasterP, declaration in OneWireMaster.h + (since comparing 64-bit ints in tinyos is not straightforward) + +* port original TestDs1825 code to use generic onewire code diff --git a/tos/lib/onewire/SingleOneWireDeviceMapperP.nc b/tos/lib/onewire/SingleOneWireDeviceMapperP.nc new file mode 100644 index 0000000000..1e6a77f7a2 --- /dev/null +++ b/tos/lib/onewire/SingleOneWireDeviceMapperP.nc @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Implementation of Onewire device discovery process for the case where + * at most one device is ever connected to the bus. If more than one device + * is present, the behavior of this component is undefined. In this situation, + * it will most likely indicate that no devices are present (unless it so + * happens that the bitwise AND of all the device IDs on the bus turns out + * to have a valid CRC byte...). + * + * Adapted from Ds1825OneWireImplementationP by David Moss / People Power. + * + * @author David Moss + * @author Doug Carlson + * @modified 6/16/10 first revision, from Ds1825OneWireImplementationP + */ + +module SingleOneWireDeviceMapperP { + uses { + interface OneWireMaster; + interface OneWireCrc; + interface Resource; + } + provides { + interface OneWireDeviceMapper; + } +} +implementation { + uint8_t numDevices; + onewire_t device; + error_t refreshResult; + bool devChanged; + + enum{ + CMD_GET_ID=0x33, + }; + + command uint8_t OneWireDeviceMapper.numDevices() { + return numDevices; + } + + command onewire_t OneWireDeviceMapper.getDevice(uint8_t index) { + return device; + } + + command error_t OneWireDeviceMapper.refresh() { + return call Resource.request(); + } + + task void signalDoneTask() { + call Resource.release(); + signal OneWireDeviceMapper.refreshDone(refreshResult, devChanged); + } + + event void Resource.granted() { + int max_checks = 10; + uint8_t i; + bool valid_rom = FALSE; + onewire_t rom; + refreshResult = SUCCESS; + + while ((0 < max_checks--) && (! valid_rom)) { + call OneWireMaster.init(); + + if(call OneWireMaster.reset() != SUCCESS) { + call OneWireMaster.release(); + refreshResult = FAIL; + return; + } + + call OneWireMaster.writeByte(CMD_GET_ID); + + for(i = 0; i < ONEWIRE_DATA_LENGTH; i++) { + rom.data[i] = call OneWireMaster.readByte(); + } + + call OneWireMaster.release(); + valid_rom = call OneWireCrc.isValid(&rom); + } + refreshResult = (valid_rom) ? SUCCESS : FAIL; + if (rom.id != device.id) { + devChanged = TRUE; + } + if (valid_rom) { + device = rom; + numDevices = 1; + } + else { + device.id = ONEWIRE_NULL_ADDR; + numDevices = 0; + } + post signalDoneTask(); + } +} diff --git a/tos/lib/onewire/interfaces/OneWireCrc.nc b/tos/lib/onewire/interfaces/OneWireCrc.nc new file mode 100644 index 0000000000..a59f6d6efa --- /dev/null +++ b/tos/lib/onewire/interfaces/OneWireCrc.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * @author David Moss + */ + +#include "OneWire.h" + +interface OneWireCrc { + + async command uint8_t crc(onewire_t *rom); + + async command bool isValid(onewire_t *rom); + +} diff --git a/tos/lib/onewire/interfaces/OneWireDeviceInstanceManager.nc b/tos/lib/onewire/interfaces/OneWireDeviceInstanceManager.nc new file mode 100644 index 0000000000..81cb48f006 --- /dev/null +++ b/tos/lib/onewire/interfaces/OneWireDeviceInstanceManager.nc @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Provides commands/events for identifying which onewire devices are + * present for a specific device type. + * + * It is assumed that each device type in use will have a single + * OneWireDeviceInstanceManager, and all of these will share a single general + * OneWireDeviceMapper. This is the primary means of hiding device discovery + * and type identification from the user application. Additionally, the + * OneWireDeviceInstanceManager maintains the state of which specific instance + * for this type is intended for use. + * + * @author Doug Carlson + * @modified 6/16/10 initial revision + */ + +interface OneWireDeviceInstanceManager { + /** + * Request the manager to refresh its list of attached devices. + * + * @return SUCCESS if the request will be accepted, + * EBUSY if a refresh is already pending. + * + * If SUCCESS is returned, refreshDone will be signalled at + * some point in the future. + */ + command error_t refresh(); + + /** + * Indicate completion of a device-list refresh. Note that this may be + * signalled without an explicit call to the refresh command (i.e. if the + * device mapper periodically checks the bus, if another user of the + * deviceMapper calls refresh, etc). + * + * @param result SUCCESS if the refresh completed normally, otherwise FAIL. + * @param devicesChanged TRUE if the list of attached devices FOR THIS + * MANAGER is different from the list of attached devices at the + * last time that refreshDone was signalled. + */ + event void refreshDone(error_t result, bool devicesChanged); + + /** + * Return the number of currently-present devices covered by this manager. + * + * @return the number of currently-present devices covered by this manager. + */ + command uint8_t numDevices(); + + /** + * Get the hardware ID of a currently-present device. + * @param index The index of the device to retrieve. + * @return The hardware ID of the device at index. This will be equal to + * NULL_ONEWIRE_ADDR if an index outside of [0, numDevices()] is + * provided. + */ + command onewire_t getDevice(uint8_t); + + /** + * Set the "selected" device instance for this manager. + * + * Note that this updates the internal state of this manager, but does not + * cause any activity on the bus or resource-locking. For instance, the + * user might set the thermometer to be read through this interface, but + * the bus won't be locked and the device won't be addressed until the + * user calls Read (on the public thermometer component). + * + * @param id The hardware ID of the device to be set. + * @return SUCCESS always. Future implementations may want to validate + * that the ID indicated is of the correct type etc. + */ + command error_t setDevice(onewire_t id); + + /** + * Get the last hardware ID passed as parameter to setDevice. + * @return Last hardware ID passed to setDevice. + */ + command onewire_t currentDevice(); +} diff --git a/tos/lib/onewire/interfaces/OneWireDeviceMapper.nc b/tos/lib/onewire/interfaces/OneWireDeviceMapper.nc new file mode 100644 index 0000000000..3d140a28e2 --- /dev/null +++ b/tos/lib/onewire/interfaces/OneWireDeviceMapper.nc @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Provides commands/events for identifying which onewire devices are present. + * + * @author Doug Carlson + * @modified 6/16/10 initial revision + */ + +interface OneWireDeviceMapper { + /** + * Request the mapper to refresh its list of attached devices. + * + * @return SUCCESS if the request will be accepted, + * EBUSY if a refresh is already pending. + * + * If SUCCESS is returned, refreshDone will be signalled at + * some point in the future. + */ + command error_t refresh(); + + /** + * Indicate completion of a device-list refresh. Note that this may be + * signalled without an explicit call to the refresh command (i.e. if + * the device mapper periodically checks the bus, if another user of the + * deviceMapper calls refresh, etc). + * + * @param result SUCCESS if the refresh completed normally, otherwise FAIL. + * @param devicesChanged TRUE if the list of attached devices is + * different from the list of attached devices at the last time + * that refreshDone was signalled. + */ + event void refreshDone(error_t result, bool devicesChanged); + + /** + * Return the number of currently-present devices. + * + * @return the number of currently-present devices. + */ + command uint8_t numDevices(); + + /** + * Get the hardware ID of a currently-present device. + * + * @param index The index of the device to retrieve. + * @return The hardware ID of the device at index. This will be equal to NULL_ONEWIRE_ADDR if an index outside of [0, numDevices()] is provided. + */ + command onewire_t getDevice(uint8_t index); +} diff --git a/tos/lib/onewire/interfaces/OneWireDeviceType.nc b/tos/lib/onewire/interfaces/OneWireDeviceType.nc new file mode 100644 index 0000000000..6707cdde49 --- /dev/null +++ b/tos/lib/onewire/interfaces/OneWireDeviceType.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * One wire device type identification interface. + * + * This interface allows one-wire device drivers to specify any predicate + * they wish to test whether a device with a given ROM id is associated + * with its device type. + * + * @author Doug Carlson + * @modified 6/16/10 initial revision + */ + +interface OneWireDeviceType { + command bool isOfType(onewire_t id); +} diff --git a/tos/lib/onewire/interfaces/OneWireMaster.nc b/tos/lib/onewire/interfaces/OneWireMaster.nc new file mode 100644 index 0000000000..5968600055 --- /dev/null +++ b/tos/lib/onewire/interfaces/OneWireMaster.nc @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2010 Johns Hopkins University. + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Interface to interact with 1-wire bus devices, as a master on the 1-wire + * + * @author Janos Sallai + * @author Doug Carlson + */ + +interface OneWireMaster { + /** + * address a specific onewire device + * @return EOFF if no devices are present on the bus, otherwise SUCCESS. + */ + async command error_t addressDevice(onewire_t id); + + /** + * Initialize bus (pin is input with pullup). + */ + async command void idle(); + + /** + * Initialize bus, start sourcing current (pin is input with pullup). + */ + async command void init(); + + /** + * Release bus, stop sourcing current (pin is three-stated input). + */ + async command void release(); + + /** + * Generate reset signal. + * @returns SUCCESS if a client is present, an error_t error value otherwise. + */ + async command error_t reset(); + + /** + * Write bit 1 to the bus. + */ + async command void writeOne(); + + /** + * Write bit 0 to the bus. + */ + async command void writeZero(); + + /** + * Write 8 bits to the bus, LSB first. + * @param b the byte to write. + */ + async command void writeByte(uint8_t b); + + /** + * Read a bit from the bus. + */ + async command bool readBit(); + + /** + * Write a bit to the bus. + * @param b the bit to write. + */ + async command void writeBit(uint8_t b); + + /** + * Read 8 bits from the bus, LSB first. + * @returns the byte read. + */ + async command uint8_t readByte(); +} From cb3ed90ee1234284aaeaea95a354be9ff82a34fe Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 21 May 2012 16:07:40 -0700 Subject: [PATCH 259/411] msp430 [breakfast], change I2C calls from I2c -> I2C --- .../msp430/x2xxx/usci-bf/HplMsp430Usci.nc | 12 ++-- .../msp430/x2xxx/usci-bf/HplMsp430UsciB.nc | 14 ++--- .../msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc | 14 ++--- .../msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc | 60 ++++++++++--------- .../msp430/x2xxx/usci/HplMsp430UsciB0P.nc | 2 +- .../msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 2 +- 6 files changed, 53 insertions(+), 51 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430Usci.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430Usci.nc index 671d883601..d4240a9362 100644 --- a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430Usci.nc +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430Usci.nc @@ -94,13 +94,13 @@ interface HplMsp430Usci { // * Reads the UCmxI2CIE register. // * This register is present on only USCI modules with I2C. // */ -// async command uint8_t getI2cie(); +// async command uint8_t getI2Cie(); // // /** // * Write the UCmxI2CIE register. // * This register is present on all USCI modules with I2C. // */ -// async command void setI2cie(uint8_t v); +// async command void setI2Cie(uint8_t v); // /** @@ -155,13 +155,13 @@ interface HplMsp430Usci { // * Read the UCmxI2COA I2C Own Address register. // * This register is present only on USCI_B modules in I2C mode. // */ -// async command uint8_t getI2coa(); +// async command uint8_t getI2Coa(); // // /** // * Write the UCmxI2COA I2C Own Address register. // * This register is present only on USCI_B modules in I2C mode. // */ -// async command void setI2coa(uint8_t v); +// async command void setI2Coa(uint8_t v); // // /** // * Read the UCmxIRCTL IrDA Control register. @@ -203,13 +203,13 @@ interface HplMsp430Usci { // * Read the UCmxI2CSA I2C Slave Address register. // * This register is present only on USCI_B modules in I2C mode. // */ -// async command uint8_t getI2csa(); +// async command uint8_t getI2Csa(); // // /** // * Write the UCmxI2CSA I2C Slave Address register. // * This register is present only on USCI_B modules in I2C mode. // */ -// async command void setI2csa(uint8_t v); +// async command void setI2Csa(uint8_t v); // // /** // * Reads the UCmxICTL Interrupt Control register. diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciB.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciB.nc index 6ac1cd8b77..ac28d3e7b0 100644 --- a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciB.nc +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciB.nc @@ -1,8 +1,8 @@ -interface HplMsp430UsciB{ - async command uint8_t getI2cie(); - async command void setI2cie(uint8_t v); - async command uint16_t getI2coa(); - async command void setI2coa(uint16_t v); - async command uint16_t getI2csa(); - async command void setI2csa(uint16_t v); +interface HplMsp430UsciB { + async command uint8_t getI2Cie(); + async command void setI2Cie(uint8_t v); + async command uint16_t getI2Coa(); + async command void setI2Coa(uint16_t v); + async command uint16_t getI2Csa(); + async command void setI2Csa(uint16_t v); } diff --git a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc index 5b414f53b8..6868bc678d 100644 --- a/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc +++ b/tos/chips/msp430/x2xxx/usci-bf/HplMsp430UsciBP.nc @@ -58,16 +58,16 @@ generic module HplMsp430UsciBP( } } implementation { -#define UCmxI2CIE (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x04)) +#define UCmxI2CIE (*TCAST(volatile uint8_t* ONE, UCmxCTL0_ + 0x04)) #define UCmxI2COA (*TCAST(volatile uint16_t* ONE, UCmxI2COA_ + 0x00)) #define UCmxI2CSA (*TCAST(volatile uint16_t* ONE, UCmxI2COA_ + 0x02)) - async command uint16_t UsciB.getI2coa() { return UCmxI2COA; } - async command void UsciB.setI2coa(uint16_t v) { UCmxI2COA = v; } - async command uint16_t UsciB.getI2csa() { return UCmxI2CSA; } - async command void UsciB.setI2csa(uint16_t v) { UCmxI2CSA = v; } - async command uint8_t UsciB.getI2cie() { return UCmxI2CIE; } - async command void UsciB.setI2cie(uint8_t v) { UCmxI2CIE = v; } + async command uint16_t UsciB.getI2Coa() { return UCmxI2COA; } + async command void UsciB.setI2Coa(uint16_t v) { UCmxI2COA = v; } + async command uint16_t UsciB.getI2Csa() { return UCmxI2CSA; } + async command void UsciB.setI2Csa(uint16_t v) { UCmxI2CSA = v; } + async command uint8_t UsciB.getI2Cie() { return UCmxI2CIE; } + async command void UsciB.setI2Cie(uint8_t v) { UCmxI2CIE = v; } #undef UCmxI2CSA #undef UCmxI2COA diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc index 0af2074c7b..61f4a0cae8 100644 --- a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciI2CP.nc @@ -89,18 +89,22 @@ implementation { if(! config){ return FAIL; } - //basic config (leave in reset) + // basic config (leave in reset) call Usci.configure(config, TRUE); - //direction is don't-care in datasheet + + /* + * direction is don't-care in datasheet + * That is because the pins are assigned to the Module + */ call SCL.selectModuleFunc(); call SDA.selectModuleFunc(); //i2c-specific config - call UsciB.setI2coa(config->i2coa); + call UsciB.setI2Coa(config->i2coa); call Usci.leaveResetMode_(); //enable slave-start interrupt - call UsciB.setI2cie(UCSTTIE); + call UsciB.setI2Cie(UCSTTIE); return SUCCESS; } @@ -113,7 +117,7 @@ implementation { call Usci.setCtl0(call Usci.getCtl0() & ~UCMST); call Usci.leaveResetMode_(); } - call UsciB.setI2cie(UCSTTIE); + call UsciB.setI2Cie(UCSTTIE); m_action = SLAVE; return SUCCESS; } @@ -167,7 +171,7 @@ implementation { call Usci.setCtl0(call Usci.getCtl0() | UCMST); call Usci.leaveResetMode_(); // set slave address - call UsciB.setI2csa(addr); + call UsciB.setI2Csa(addr); //check bus status at the latest point possible. if ( call Usci.getStat() & UCBBUSY ){ //if the bus is busy, bail out real quick @@ -178,7 +182,7 @@ implementation { call Usci.setCtl1( (call Usci.getCtl1()&(~UCTR)) | UCTXSTT); //enable i2c arbitration interrupts, rx - call UsciB.setI2cie((call UsciB.getI2cie() & 0xf0) | UCNACKIE | UCALIE); + call UsciB.setI2Cie((call UsciB.getI2Cie() & 0xf0) | UCNACKIE | UCALIE); call Usci.setIe( call Usci.getIe() | RXIE_MASK ); /* if only reading 1 byte, STOP bit must be set right after @@ -195,8 +199,7 @@ implementation { } } else if (m_flags & I2C_RESTART) { /* set slave address */ - //UCB0I2CSA = addr; - call UsciB.setI2csa(addr); + call UsciB.setI2Csa(addr); //clear TR bit, start /* UCTXSTT - generate START condition */ @@ -204,7 +207,7 @@ implementation { call Usci.setCtl1((call Usci.getCtl1() & ~UCTR) | UCTXSTT); //enable i2c arbitration interrupts, rx - call UsciB.setI2cie((call UsciB.getI2cie() & 0xf0) | UCNACKIE | UCALIE); + call UsciB.setI2Cie((call UsciB.getI2Cie() & 0xf0) | UCNACKIE | UCALIE); call Usci.setIe( call Usci.getIe() | RXIE_MASK ); /* if only reading 1 byte, STOP bit must be set right after START bit */ @@ -214,7 +217,6 @@ implementation { counter--; } /* set stop bit */ - //UCB0CTL1 |= UCTXSTP; call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); } } else { @@ -264,9 +266,9 @@ implementation { //disable the rx interrupt call Usci.setIe(call Usci.getIe() & ~RXIE_MASK); if (counter > 0x01){ - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call UsciB.getI2csa(), m_pos, m_buf ); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call UsciB.getI2Csa(), m_pos, m_buf ); } else { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call UsciB.getI2csa() , m_pos, m_buf ); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call UsciB.getI2Csa() , m_pos, m_buf ); } } } @@ -306,7 +308,7 @@ implementation { call Usci.leaveResetMode_(); // set slave address - call UsciB.setI2csa(addr); + call UsciB.setI2Csa(addr); //check bus status at the latest point possible. if ( call Usci.getStat() & UCBBUSY ){ @@ -317,14 +319,14 @@ implementation { // UCTXSTT - generate START condition call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); //enable relevant state interrupts - call UsciB.setI2cie((call UsciB.getI2cie() & 0xf0) | UCNACKIE | UCALIE); + call UsciB.setI2Cie((call UsciB.getI2Cie() & 0xf0) | UCNACKIE | UCALIE); //enable tx interrupts call Usci.setIe( call Usci.getIe() | TXIE_MASK); } /* is this a restart or a direct continuation */ else if (m_flags & I2C_RESTART) { // set slave address - call UsciB.setI2csa(addr); + call UsciB.setI2Csa(addr); /* UCTR - set transmit */ /* UCTXSTT - generate START condition */ @@ -376,9 +378,9 @@ implementation { call Usci.setIe(call Usci.getIe() & ~TXIE_MASK ); /* fail gracefully */ if (counter > 0x01){ - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( SUCCESS, call UsciB.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( SUCCESS, call UsciB.getI2Csa(), m_len, m_buf ); } else{ - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( FAIL, call UsciB.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( FAIL, call UsciB.getI2Csa(), m_len, m_buf ); } } else { //send the next char @@ -466,9 +468,9 @@ implementation { //another master addressed us as a slave. However, this should //manifest as an AL interrupt, not a NACK interrupt. if (call Usci.getCtl1() & UCTR) { - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call UsciB.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call UsciB.getI2Csa(), m_len, m_buf ); } else { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call UsciB.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call UsciB.getI2Csa(), m_len, m_buf ); } } } else { @@ -482,9 +484,9 @@ implementation { call Usci.setStat(call Usci.getStat() & ~(UCALIFG)); //TODO: more descriptive error? I guess EBUSY is fair. if(lastAction == MASTER_WRITE) { - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( EBUSY, call UsciB.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( EBUSY, call UsciB.getI2Csa(), m_len, m_buf ); } else if(lastAction == MASTER_READ) { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( EBUSY, call UsciB.getI2csa(), m_len, m_buf); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( EBUSY, call UsciB.getI2Csa(), m_len, m_buf); } //once this returns, we should get another interrupt for STT //if we are addressed. Otherwise, we're just chillin' in idle @@ -493,7 +495,7 @@ implementation { /* STOP condition */ else if (call Usci.getStat() & UCSTPIFG) { /* disable STOP interrupt, enable START interrupt */ - call UsciB.setI2cie((call UsciB.getI2cie() | UCSTTIE) & ~UCSTPIE); + call UsciB.setI2Cie((call UsciB.getI2Cie() | UCSTTIE) & ~UCSTPIE); signal I2CSlave.slaveStop[call ArbiterInfo.userId()](); //TODO: should this not just call slaveIdle? } @@ -503,7 +505,7 @@ implementation { //clear start flag, but leave enabled (repeated start) //enable stop interrupt call Usci.setStat(call Usci.getStat() &~ UCSTTIFG); - call UsciB.setI2cie(call UsciB.getI2cie() | UCSTPIE); + call UsciB.setI2Cie(call UsciB.getI2Cie() | UCSTPIE); //enable RX/TX interrupts call Usci.setIe(call Usci.getIe() | RXIE_MASK | TXIE_MASK); signal I2CSlave.slaveStart[call ArbiterInfo.userId()]( call Usci.getStat() & UCGC); @@ -526,25 +528,25 @@ implementation { return EINVAL; } else { //retain UCGCEN bit - call UsciB.setI2coa( (call UsciB.getI2coa() & UCGCEN) | addr); + call UsciB.setI2Coa( (call UsciB.getI2Coa() & UCGCEN) | addr); return SUCCESS; } } command error_t I2CSlave.enableGeneralCall[uint8_t client]() { - if (UCGCEN & (call UsciB.getI2coa())){ + if (UCGCEN & (call UsciB.getI2Coa())){ return EALREADY; } else { - call UsciB.setI2coa(UCGCEN | (call UsciB.getI2coa())); + call UsciB.setI2Coa(UCGCEN | (call UsciB.getI2Coa())); return SUCCESS; } } command error_t I2CSlave.disableGeneralCall[uint8_t client]() { - if (UCGCEN & ~(call UsciB.getI2coa())) { + if (UCGCEN & ~(call UsciB.getI2Coa())) { return EALREADY; } else { - call UsciB.setI2coa(~UCGCEN & (call UsciB.getI2coa())); + call UsciB.setI2Coa(~UCGCEN & (call UsciB.getI2Coa())); return SUCCESS; } } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc index 676e67379f..d698014450 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc @@ -423,7 +423,7 @@ implementation { async command void Usci.clearGeneralCall() { UCB0I2COA &= ~UCGCEN; } async command void Usci.setGeneralCall() { UCB0I2COA |= UCGCEN; } - /* get/set Slave Address, i2cSA */ + /* get/set Slave Address, I2Csa */ async command uint16_t Usci.getSlaveAddress() { return UCB0I2CSA; } async command void Usci.setSlaveAddress( uint16_t addr ) { UCB0I2CSA = addr; } diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index 02921c1c02..d480061f7b 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -429,7 +429,7 @@ implementation { async command void Usci.clearGeneralCall() { UCB1I2COA &= ~UCGCEN; } async command void Usci.setGeneralCall() { UCB1I2COA |= UCGCEN; } - /* get/set Slave Address, i2cSA */ + /* get/set Slave Address, I2Csa */ async command uint16_t Usci.getSlaveAddress() { return UCB1I2CSA; } async command void Usci.setSlaveAddress( uint16_t addr ) { UCB1I2CSA = addr; } From 4332a46ba42011e528071c4744339599b1fa1ee4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 22 May 2012 00:51:04 -0700 Subject: [PATCH 260/411] msp430 [breakfast], bring in jhu i2c implementation (x5). breakfast i2c for x5 processor (tos/chips/msp430/msp430xv2/usci. Inserted into tp-freeforall/prod(msp430-int) as tos/chips/msp430/ x5xxx/usci-bf. --- .../msp430/x5xxx/usci-bf/HplMsp430Usci.nc | 417 ++++++++++++ .../msp430/x5xxx/usci-bf/HplMsp430UsciC.nc | 98 +++ .../x5xxx/usci-bf/HplMsp430UsciInterrupts.nc | 53 ++ .../usci-bf/HplMsp430UsciInterruptsA0P.nc | 18 + .../usci-bf/HplMsp430UsciInterruptsA1P.nc | 20 + .../usci-bf/HplMsp430UsciInterruptsA2P.nc | 20 + .../usci-bf/HplMsp430UsciInterruptsA3P.nc | 20 + .../usci-bf/HplMsp430UsciInterruptsB0P.nc | 20 + .../usci-bf/HplMsp430UsciInterruptsB1P.nc | 20 + .../usci-bf/HplMsp430UsciInterruptsB2P.nc | 20 + .../usci-bf/HplMsp430UsciInterruptsB3P.nc | 20 + .../msp430/x5xxx/usci-bf/HplMsp430UsciP.nc | 257 ++++++++ tos/chips/msp430/x5xxx/usci-bf/I2C.h | 55 ++ tos/chips/msp430/x5xxx/usci-bf/I2CSlave.nc | 31 + .../msp430/x5xxx/usci-bf/Msp430UsciA0P.nc | 27 + .../msp430/x5xxx/usci-bf/Msp430UsciA1P.nc | 29 + .../msp430/x5xxx/usci-bf/Msp430UsciA2P.nc | 29 + .../msp430/x5xxx/usci-bf/Msp430UsciA3P.nc | 29 + .../msp430/x5xxx/usci-bf/Msp430UsciB0P.nc | 29 + .../msp430/x5xxx/usci-bf/Msp430UsciB1P.nc | 29 + .../msp430/x5xxx/usci-bf/Msp430UsciB2P.nc | 29 + .../msp430/x5xxx/usci-bf/Msp430UsciB3P.nc | 29 + .../x5xxx/usci-bf/Msp430UsciConfigure.nc | 48 ++ .../msp430/x5xxx/usci-bf/Msp430UsciError.nc | 50 ++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc | 77 +++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc | 78 +++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc | 79 +++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc | 80 +++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc | 79 +++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc | 80 +++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc | 79 +++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc | 80 +++ .../msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc | 613 ++++++++++++++++++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc | 71 ++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc | 36 + .../msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc | 71 ++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc | 36 + .../msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc | 71 ++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc | 36 + .../msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc | 71 ++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc | 36 + .../msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc | 69 ++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc | 34 + .../msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc | 71 ++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc | 36 + .../msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc | 71 ++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc | 36 + .../msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc | 71 ++ .../msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc | 36 + .../msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc | 227 +++++++ .../msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc | 64 ++ .../msp430/x5xxx/usci-bf/Msp430UsciUartA0P.nc | 33 + .../msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc | 66 ++ .../msp430/x5xxx/usci-bf/Msp430UsciUartA1P.nc | 35 + .../msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc | 66 ++ .../msp430/x5xxx/usci-bf/Msp430UsciUartA2P.nc | 35 + .../msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc | 66 ++ .../msp430/x5xxx/usci-bf/Msp430UsciUartA3P.nc | 35 + .../msp430/x5xxx/usci-bf/Msp430UsciUartP.nc | 429 ++++++++++++ tos/chips/msp430/x5xxx/usci-bf/README.txt | 136 ++++ tos/chips/msp430/x5xxx/usci-bf/generate.sh | 76 +++ tos/chips/msp430/x5xxx/usci-bf/generated.lst | 40 ++ tos/chips/msp430/x5xxx/usci-bf/msp430usci.h | 134 ++++ tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc | 1 - tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc | 1 - tos/chips/msp430/x5xxx/usci/msp430usci.h | 2 +- 66 files changed, 4937 insertions(+), 3 deletions(-) create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430Usci.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciC.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterrupts.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA3P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB3P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/I2C.h create mode 100644 tos/chips/msp430/x5xxx/usci-bf/I2CSlave.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA3P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB3P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciConfigure.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3P.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartP.nc create mode 100644 tos/chips/msp430/x5xxx/usci-bf/README.txt create mode 100755 tos/chips/msp430/x5xxx/usci-bf/generate.sh create mode 100644 tos/chips/msp430/x5xxx/usci-bf/generated.lst create mode 100644 tos/chips/msp430/x5xxx/usci-bf/msp430usci.h diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430Usci.nc new file mode 100644 index 0000000000..a918765a84 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430Usci.nc @@ -0,0 +1,417 @@ +/** + * Copyright (c) 2011-2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Control of an MSP430 USCI module. + * + * This interface is completely agnostic of the modes supported by a + * particular USCI module. It supports the union of the module + * registers across all modes. + * + * Where the same memory location reflects different registers + * depending on USCI mode, independent functions are provided. + * + * Access to UCmxCTLW0 and UCmxBRW is available as both 16 bits as well + * 8 bits. Originally, only 16 bit access was supported and this is + * reflected in the initial x5 implementations. Doug and Marcus started + * from the same original place that the tinyprod fork started from. + * However, they changed the low level interface to expose the byte + * interfaces to the 16 bit registers. This was to make the code between + * the x2 usci and the x5 usci more similar. + * + * So we expose both 16 bit and 8 bit interfaces. + * + * @author Peter A. Bigot + * @author Derek Baker + * @author Doug Carlson + * @author Marcus Chang + * @author Eric B. Decker + */ + +#include "msp430usci.h" + +interface HplMsp430Usci { + + /* ---------------------------------------- + * Introspection to identify a module when given a reference to its + * component + */ + + /** + * Return a unique identifier for this module among all USCI modules on the chip. + * + * There is a one-to-one correspondence between the value returned + * by this function and the set of pairs of (module_type, + * module_instance). + */ + async command uint8_t getModuleIdentifier (); + + /* ---------------------------------------- + * Read and write the module registers. + */ + + /** + * Reads the UCmxCTLW0 Control register. + * This register is present on all USCI modules, and is used in all modes. + * + * CTLW0 is the 16 bit concatenation of CTL0 and CTL1. Note on the x5 + * CTL1 is at offset 0 (x5 is base register based) and CTL0 is the msb. + * + * This is swapped with respect to where CTL0 and CTL1 live on the x2 processors, + * CTL0 is at 0 and CTL1 is at 1 (not base register but relative to where the + * registers are defined). This makes config block platform/cpu dependent (which + * they are anyway because of clocking issues). + * + * {get,set}Ctlw0: gets or sets the 16 bit version of the control register. + * {get,set}Ctl{0,1}: gets or sets the 8 bit version of the 0 or 1 register. + */ + async command uint16_t getCtlw0(); + async command uint8_t getCtl0(); + async command uint8_t getCtl1(); + + /** + * Writes the UCmxCTLW0 Control register. + * This register is present on all USCI modules. + */ + async command void setCtlw0(uint16_t v); + async command void setCtl0(uint8_t v); + async command void setCtl1(uint8_t v); + + /** + * Reads the UCmxBRW Baud Rate Control registers. + * This register is present on all USCI modules. + */ + async command uint16_t getBrw(); + async command uint8_t getBr0(); + async command uint8_t getBr1(); + + /** + * Writes the UCmxBRW Baud Rate Control registers. + * This register is present on all USCI modules. + */ + async command void setBrw(uint16_t v); + async command void setBr0(uint8_t v); + async command void setBr1(uint8_t v); + + /** + * Reads the USCmBxMCTL Modulation Control register. + * This register is present on all USCI modules except I2C. + */ + async command uint8_t getMctl(); + + /** + * Write the UCmxMCTL Modulation Control register. + * This register is present on all USCI modules except I2C. + */ + async command void setMctl(uint8_t v); + + /** + * Read the UCmxSTAT Status register. + * This register is present on all USCI modules. + */ + async command uint8_t getStat(); + + /** + * Write the UCmxSTAT Status register. + * This register is present on all USCI modules. + */ + async command void setStat(uint8_t v); + + /** + * Read the UCmxRXBUF Receive Buffer register. + * This register is present on all USCI modules. + */ + async command uint8_t getRxbuf(); + + /** + * Write the UCmxRX Receive Buffer register. + * This register is present on all USCI modules. + */ + async command void setRxbuf(uint8_t v); + + /** + * Read the UCmxTXBUF Transmit Buffer register. + * This register is present on all USCI modules. + */ + async command uint8_t getTxbuf(); + + /** + * Write the UCmxTX Transmit Buffer register. + * This register is present on all USCI modules. + */ + async command void setTxbuf(uint8_t v); + + /** + * Read the UCmxABCTL Auto Baud Rate Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command uint8_t getAbctl(); + + /** + * Write the UCmxABCTL Auto Baud Rate Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command void setAbctl(uint8_t v); + + /** + * Read the UCmxIRCTL IrDA Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command uint16_t getIrctl(); + + /** + * Write the UCmxIRCTL IrDA Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command void setIrctl(uint16_t v); + + /** + * Read the UCmxIRTCTL IrDA Transmit Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command uint8_t getIrtctl(); + + /** + * Write the UCmxIRTCTL IrDA Transmit Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command void setIrtctl(uint8_t v); + + /** + * Read the UCmxIRRCTL IrDA Receive Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command uint8_t getIrrctl(); + + /** + * Write the UCmxIRRCTL IrDA Receive Control register. + * This register is present only on USCI_A modules in UART mode. + */ + async command void setIrrctl(uint8_t v); + + /** + * Read the UCmxI2COA I2C Own Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command uint16_t getI2Coa(); + + /** + * Write the UCmxI2COA I2C Own Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command void setI2Coa(uint16_t v); + + /** + * Read the UCmxI2CSA I2C Slave Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command uint16_t getI2Csa(); + + /** + * Write the UCmxI2CSA I2C Slave Address register. + * This register is present only on USCI_B modules in I2C mode. + */ + async command void setI2Csa(uint16_t v); + + /** + * Reads the UCmxICTL Interrupt Control register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint16_t getIctl(); + + /** + * Writes the UCmxICTL Interrupt Control register. + * This register is present on all USCI modules. + * + * ICTL is the 16 bit concatenation of IE (interrupt enable) and IFG + * (interrupt flag). WARNING: Using this to set or clear interrupt + * enables and/or IFGs is not recommended. There are potential + * h/w race conditions. It is much better to use the byte accessors + * get/setIe, get/setIfg. + */ + async command uint16_t setIctl(uint16_t v); + + /** + * Reads the UCmxIE Interrupt Enable register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint8_t getIe(); + + /** + * Writes the UCmxIE Interrupt Enable register. + * This register is present on all USCI modules. + */ + async command void setIe(uint8_t v); + + /** + * Reads the UCmxIFG Interrupt Enable register. + * This register is present on all USCI modules, and is used in all modes. + */ + async command uint8_t getIfg(); + + /** + * Writes the UCmxIFG Interrupt Flag register. + * This register is present on all USCI modules. + */ + async command void setIfg(uint8_t v); + + /* + * using setIfg and setIe to control interrupt state requires something like + * + * setIe(getIe() & ~UCTXIE) // turn of TX ie. + * + * The following provide a more optimized interface that directly references + * the bit in question. Generates better code. Also some drivers have been + * written using these interface specs while others with the direct register + * access specs. + */ + + async command bool isRxIntrPending(); + async command void clrRxIntr(); + async command void disableRxIntr(); + async command void enableRxIntr(); + + async command bool isTxIntrPending(); + async command void clrTxIntr(); + async command void disableTxIntr(); + async command void enableTxIntr(); + + /* + * The following are being deprecated. They existed in the x1 USART + * definitions and also the original x2 definitions. They are broken + * because the semantic is unclear. + * + * async command void disableIntr(); + * async command void enableIntr(); + * async command void clrIntr(); + * + * As the USCI modules became more sophisticated what interrupt is being + * enabled or disabled. This then warped into being simply a set/get + * on the appropriate register. So why have the sugar? + */ + + + /* + * TI h/w provides a busy bit. return tx or rx is doing something + * + * This isn't really that useful. This used to be called txEmpty on the x1 + * USART (where it really did represent that the tx path was empty) but that + * isn't true on USCI modules. Rather it indicates that tx, rx, or both are + * active. These paths are double buffered. + * + * For TX state machines (packet based etc), we want to know that all the bytes + * went out, typically when switching resources. For RX, we will have received + * all the bytes we are interested in, so don't really care that the RX buffers in + * the h/w are empty. + * + * In other words TI exchanged the txEmpty which worked for the isBusy which + * doesn't really work. Thanks, but no thanks, TI! + */ + async command bool isBusy(); + + + /** + * Reads the UCmxIV Interrupt Vector register. + * This register is present on all USCI modules, and is used in all modes. + * It is read-only. + */ + async command uint8_t getIv(); + + /* I2C bits + * + * set direction of the bus + */ + async command void setTransmitMode(); + async command void setReceiveMode(); + + /* Various I2C bits */ + async command bool getStopBit(); + async command bool getStartBit(); + async command bool getNackBit(); + async command bool getTransmitReceiveMode(); + + /* transmit NACK, Stop, or Start condition, automatically cleared */ + async command void setTXNACK(); + async command void setTXStop(); + async command void setTXStart(); + + async command bool isNackIntrPending(); + async command void clrNackIntr(); + + /* ---------------------------------------- + * Higher-level operations consistent across all modes. + */ + + /** + * Set the USCI to the mode and speed specified in the given configuration. + * + * @param config The speed-relevant parameters for module + * configuration. Must be provided. + * + * @param leave_in_reset If TRUE, the module is left in software + * reset mode upon exit, allowing the caller to perform additional + * configuration steps such as configuring mode-specific ports. It + * is the caller's responsibility to invoke leaveResetMode_() upon + * completion. + */ + async command void configure (const msp430_usci_config_t* config, + bool leave_in_reset); + + /** + * Place the USCI into software reset mode. + * This command should only be invoked by modules that implement + * specific USCI modes, in their mode-specific configuration + * functions. + */ + async command void enterResetMode_ (); + + /** + * Take the USCI out of software reset mode. + * This command should only be invoked by modules that implement + * specific USCI modes, in their mode-specific configuration + * functions. + */ + async command void leaveResetMode_ (); + + /** + * Return an enumeration value indicating the currently configured USCI + * mode. Values are from the MSP430_USCI_Mode_e enumeration. + */ + async command uint8_t currentMode (); +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciC.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciC.nc new file mode 100644 index 0000000000..76fa9d6167 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciC.nc @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Core configuration for any USCI module present on an MSP430 chip. + * + * There should be exactly one instance of this configuration for each + * USCI module; e.g., USCI_A0 or USCI_B3. Each instance provides + * access to the USCI registers for its module, and maintains the + * resource management information required to determine which of the + * module's modes is currently active. + * + * @author Peter A. Bigot + */ + +generic configuration HplMsp430UsciC( + + /** + * Offset of UCmxCTLW0_ register for m=module_type and x=module_instance + * + * UCmxCTLW0 is the base address for the module. + */ + unsigned int UCmxCTLW0_, + + /** Name of resource used to arbitrate modes of this USCI instance */ + char RESOURCE_NAME[] + +) @safe() { + provides { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts[ uint8_t mode ]; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + } + uses { + interface HplMsp430UsciInterrupts as RawInterrupts; + interface ResourceConfigure[uint8_t client]; + } +} +implementation { + + enum { + USCI_ID = unique(MSP430_USCI_RESOURCE), + }; + + components new HplMsp430UsciP(USCI_ID, UCmxCTLW0_) as HplUsciP; + Usci = HplUsciP; + RawInterrupts = HplUsciP; + Interrupts = HplUsciP; + + components new FcfsArbiterC( RESOURCE_NAME ) as ArbiterC; + Resource = ArbiterC; + ResourceRequested = ArbiterC; + ResourceConfigure = ArbiterC; + ResourceDefaultOwner = ArbiterC; + ArbiterInfo = ArbiterC; + HplUsciP.ArbiterInfo -> ArbiterC; + + components LedsC; + HplUsciP.Leds -> LedsC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterrupts.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterrupts.nc new file mode 100644 index 0000000000..568a50298c --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterrupts.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Interrupt events for an MSP430 USCI module. + * + * @author Peter A. Bigot + */ + +interface HplMsp430UsciInterrupts { + /** The only event is the reception of the interrupt. Notification + * includes the value of the interrupt vector register. + * + * @note Do not attempt to distinguish tx and rx interrupts here; + * delegate it to the mode-specific handler. For example, a receive + * interrupt for UART and SPI modes is indicated by a UCmxIV value + * of 2 using constant USCI_UCRXIFG; in I2C mode, the value 2 means + * USCI_I2C_UCALIFG. USCI_I2C_UCRXIFG has a value of 10. */ + async event void interrupted(uint8_t iv); +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA0P.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA0P.nc new file mode 100644 index 0000000000..0237bfa061 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA0P.nc @@ -0,0 +1,18 @@ +/** + * Define the interrupt handlers for USCI module A0. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsA0P { + provides interface HplMsp430UsciInterrupts as Interrupts; + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} +implementation { + TOSH_SIGNAL(USCI_A0_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA1P.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA1P.nc new file mode 100644 index 0000000000..b3d8d1f260 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA1P.nc @@ -0,0 +1,20 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for A1 */ +/** + * Define the interrupt handlers for USCI module A1. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsA1P { + provides interface HplMsp430UsciInterrupts as Interrupts; + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} +implementation { + TOSH_SIGNAL(USCI_A1_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA2P.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA2P.nc new file mode 100644 index 0000000000..3886d50c1a --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA2P.nc @@ -0,0 +1,20 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for A2 */ +/** + * Define the interrupt handlers for USCI module A2. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsA2P { + provides interface HplMsp430UsciInterrupts as Interrupts; + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} +implementation { + TOSH_SIGNAL(USCI_A2_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA3P.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA3P.nc new file mode 100644 index 0000000000..5805845422 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsA3P.nc @@ -0,0 +1,20 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for A3 */ +/** + * Define the interrupt handlers for USCI module A3. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsA3P { + provides interface HplMsp430UsciInterrupts as Interrupts; + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} +implementation { + TOSH_SIGNAL(USCI_A3_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB0P.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB0P.nc new file mode 100644 index 0000000000..1533944079 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB0P.nc @@ -0,0 +1,20 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for B0 */ +/** + * Define the interrupt handlers for USCI module B0. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsB0P { + provides interface HplMsp430UsciInterrupts as Interrupts; + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} +implementation { + TOSH_SIGNAL(USCI_B0_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB1P.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB1P.nc new file mode 100644 index 0000000000..cd20aa06d3 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB1P.nc @@ -0,0 +1,20 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for B1 */ +/** + * Define the interrupt handlers for USCI module B1. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsB1P { + provides interface HplMsp430UsciInterrupts as Interrupts; + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} +implementation { + TOSH_SIGNAL(USCI_B1_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB2P.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB2P.nc new file mode 100644 index 0000000000..8b993a119f --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB2P.nc @@ -0,0 +1,20 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for B2 */ +/** + * Define the interrupt handlers for USCI module B2. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsB2P { + provides interface HplMsp430UsciInterrupts as Interrupts; + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} +implementation { + TOSH_SIGNAL(USCI_B2_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB3P.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB3P.nc new file mode 100644 index 0000000000..290dd909e4 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciInterruptsB3P.nc @@ -0,0 +1,20 @@ +/* DO NOT MODIFY + * This file cloned from HplMsp430UsciInterruptsA0P.nc for B3 */ +/** + * Define the interrupt handlers for USCI module B3. + * + * @author Peter A. Bigot + */ + +module HplMsp430UsciInterruptsB3P { + provides interface HplMsp430UsciInterrupts as Interrupts; + uses { + interface HplMsp430Usci as Usci; + interface Leds; + } +} +implementation { + TOSH_SIGNAL(USCI_B3_VECTOR) { + signal Interrupts.interrupted((call Usci.getIv())); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc new file mode 100644 index 0000000000..a9fbf29e16 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc @@ -0,0 +1,257 @@ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Core implementation for any USCI module present on an MSP430 chip. + * + * This module makes available the module-specific registers, along + * with a small number of higher-level functions like generic USCI + * chip configuration that are shared among the various modes of the + * module. + * + * @author Peter A. Bigot + * @author Derek Baker + * @author Doug Carlson + * @author Marcus Chang + * @author Eric B. Decker + */ + +generic module HplMsp430UsciP( + /** Identifier for this USCI module, unique across (type, instance) pairs */ + uint8_t USCI_ID, + /** Offset of UCmxCTLW0_ register for m=module_type and x=module_instance */ + unsigned int UCmxCTLW0_ +) @safe() { + provides { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts[ uint8_t mode ]; + } + uses { + interface HplMsp430UsciInterrupts as RawInterrupts; + interface ArbiterInfo; + interface Leds; + } +} +implementation { + +#define UCmxCTLW0 (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_)) +#define UCmxCTL1 (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x00)) // yes, ctl1 is at offset zero +#define UCmxCTL0 (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x01)) // and, ctl0 is at offset one +#define UCmxBRW (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x06)) +#define UCmxBR0 (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x06)) +#define UCmxBR1 (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x07)) +#define UCmxMCTL (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x08)) +#define UCmxSTAT (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x0a)) +#define UCmxRXBUF (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x0c)) +#define UCmxTXBUF (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x0e)) +#define UCmxABCTL (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x10)) +#define UCmxI2COA (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x10)) +#define UCmxIRCTL (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x12)) +#define UCmxIRTCTL (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x12)) +#define UCmxIRRCTL (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x13)) +#define UCmxI2CSA (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x12)) +#define UCmxICTL (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x1c)) +#define UCmxIE (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x1c)) +#define UCmxIFG (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x1d)) +#define UCmxIV (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x1e)) + + async command uint8_t Usci.getModuleIdentifier() { return USCI_ID; } + + async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } + async command uint8_t Usci.getCtl0() { return UCmxCTL0; } + async command uint8_t Usci.getCtl1() { return UCmxCTL1; } + + async command void Usci.setCtlw0(uint16_t v) { UCmxCTLW0 = v; } + async command void Usci.setCtl0(uint8_t v) { UCmxCTL0 = v; } + async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } + + async command uint16_t Usci.getBrw() { return UCmxBRW; } + async command uint8_t Usci.getBR0() { return UCmxBR0; } + async command uint8_t Usci.getBR1() { return UCmxBR1; } + + async command void Usci.setBrw(uint16_t v) { UCmxBRW = v; } + async command void Usci.setBr0(uint8_t v) { UCmxBR0 = v; } + async command void Usci.setBr1(uint8_t v) { UCmxBR1 = v; } + + async command uint8_t Usci.getMctl() { return UCmxMCTL; } + async command void Usci.setMctl(uint8_t v) { UCmxMCTL = v; } + async command uint8_t Usci.getStat() { return UCmxSTAT; } + async command void Usci.setStat(uint8_t v) { UCmxSTAT = v; } + async command uint8_t Usci.getRxbuf() { return UCmxRXBUF; } + async command void Usci.setRxbuf(uint8_t v) { UCmxRXBUF = v; } + async command uint8_t Usci.getTxbuf() { return UCmxTXBUF; } + async command void Usci.setTxbuf(uint8_t v) { UCmxTXBUF = v; } + async command uint8_t Usci.getAbctl() { return UCmxABCTL; } + async command void Usci.setAbctl(uint8_t v) { UCmxABCTL = v; } + async command uint16_t Usci.getIrctl() { return UCmxIRCTL; } + async command void Usci.setIrctl(uint16_t v) { UCmxIRCTL = v; } + async command uint8_t Usci.getIrtctl() { return UCmxIRTCTL; } + async command void Usci.setIrtctl(uint8_t v) { UCmxIRTCTL = v; } + async command uint8_t Usci.getIrrctl() { return UCmxIRRCTL; } + async command void Usci.setIrrctl(uint8_t v) { UCmxIRRCTL = v; } + + async command uint16_t Usci.getI2Coa() { return UCmxI2COA; } + async command void Usci.setI2Coa(uint16_t v) { UCmxI2COA = v; } + + async command uint16_t Usci.getI2Csa() { return UCmxI2CSA; } + async command void Usci.setI2Csa(uint16_t v) { UCmxI2CSA = v; } + + async command uint16_t Usci.getIctl() { return UCmxICTL; } + async command uint16_t Usci.setIctl(uint16_t v) { UCmxICTL = v; } + async command uint8_t Usci.getIe() { return UCmxIE; } + async command void Usci.setIe(uint8_t v) { UCmxIE = v; } + async command uint8_t Usci.getIfg() { return UCmxIFG; } + async command void Usci.setIfg(uint8_t v) { UCmxIFG = v; } + + async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } + async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } + async command void Usci.disableRxIntr() { UCmxIE &= ~UCRXIE; } + async command void Usci.enableRxIntr() { UCmxIE |= UCRXIE; } + + async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } + async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } + async command void Usci.disableTxIntr() { UCmxIE &= ~UCTXIE; } + async command void Usci.enableTxIntr() { UCmxIE |= UCTXIE; } + + async command bool Usci.isBusy() { return (UCmxSTAT & UCBUSY); } + + async command uint8_t Usci.getIv() { return UCmxIV; } + + /* I2C bits + * + * set direction of the bus + */ + async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } + async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } + + /* Various i2c bits */ + async command bool Usci.getStopBit() { return (UCmxCTL1 & UCTXSTP); } + async command bool Usci.getStartBit() { return (UCmxCTL1 & UCTXSTT); } + async command bool Usci.getNackBit() { return (UCmxCTL1 & UCTXNACK); } + async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } + + /* set NACK, Stop condition, or Start condition, automatically cleared */ + async command void Usci.setTXNACK() { UCmxCTL1 |= UCTXNACK; } + async command void Usci.setTXStop() { UCmxCTL1 |= UCTXSTP; } + async command void Usci.setTXStart() { UCmxCTL1 |= UCTXSTT; } + + async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } + async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } + + async command void Usci.configure (const msp430_usci_config_t* config, + bool leave_in_reset) { + if (! config) { + return; + } + UCMxCTL1 = config->ctl1 | UCSWRST; + UCMxCTL0 = config->ctl0; + UCMxBR1 = config->br1; + UCMxBR0 = config->br0; + UCmxMCTL = config->mctl; + UCmxI2COA = config->i2coa; + if (!leave_in_reset) { + call Usci.leaveResetMode_(); + } + } + + async command void Usci.enterResetMode_ () { +#if defined(WITH_IAR) + UCmxCTL1 |= UCSWRST; +#else + __asm__ __volatile__("bis %0, %1" : : "i" UCSWRST, "m" UCmxCTL1); +#endif + } + + async command void Usci.leaveResetMode_ () { +#if defined(WITH_IAR) + UCmxCTL1 &= ~UCSWRST; +#else + __asm__ __volatile__("bic %0, %1" : : "i" UCSWRST, "m" UCmxCTL1); +#endif + } + + + async command uint8_t Usci.currentMode () { + atomic { + if (! (UCmxCTL0 & UCSYNC)) { + return MSP430_USCI_UART; + } + if (UCMODE_3 == (UCmxCTL0 & (UCMODE0 | UCMODE1))) { + return MSP430_USCI_I2C; + } + return MSP430_USCI_SPI; + } + } + + + /* + * Upon receipt of an interrupt, if the USCI is active then demux + * the interrupt to the handler for the appropriate USCI mode. + */ + + async event void RawInterrupts.interrupted (uint8_t iv) { + if (call ArbiterInfo.inUse()) { + signal Interrupts.interrupted[ call Usci.currentMode() ](iv); + } + } + + default async event void Interrupts.interrupted[uint8_t mode] (uint8_t iv) { } + +#undef UCmxIV +#undef UCmxIFG +#undef UCmxIE +#undef UCmxICTL +#undef UCmxI2CSA +#undef UCmxIRRCTL +#undef UCmxIRTCTL +#undef UCmxIRCTL +#undef UCmxI2COA +#undef UCmxABCTL +#undef UCmxTXBUF +#undef UCmxRXBUF +#undef UCmxSTAT +#undef UCmxMCTL +#undef UCmxBRW +#undef UCmxCTL0 +#undef UCmxCTL1 +#undef UCmxCTLW0 + +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/I2C.h b/tos/chips/msp430/x5xxx/usci-bf/I2C.h new file mode 100644 index 0000000000..fd3f9a889a --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/I2C.h @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Phil Buonadonna + * @author Philip Levis + */ + +#ifndef _I2C_H +#define _I2C_H + +typedef struct { } TI2CExtdAddr; +typedef struct { } TI2CBasicAddr; + +typedef uint8_t i2c_flags_t; + +enum { + I2C_START = 0x01, + I2C_STOP = 0x02, + I2C_ACK_END = 0x04, + I2C_RESTART = 0x08, +}; + +#endif /* _I2C_H */ diff --git a/tos/chips/msp430/x5xxx/usci-bf/I2CSlave.nc b/tos/chips/msp430/x5xxx/usci-bf/I2CSlave.nc new file mode 100644 index 0000000000..a4e780478b --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/I2CSlave.nc @@ -0,0 +1,31 @@ +interface I2CSlave { + command error_t setOwnAddress(uint16_t addr); + command error_t enableGeneralCall(); + command error_t disableGeneralCall(); + + //signalled when a byte is sitting in the RXBUF + //returns TRUE: The signalled code called slaveReceive to read from + // the RXBUF already. + //returns FALSE: The signalled code is not ready to read from the + // RXBUF yet. If false is returned, the signalled code MUST call + // slaveReceive to read the byte from the buffer. Until this + // occurs, the bus will be stalled. + async event bool slaveReceiveRequested(); + + //retrieve the byte from the RXBUF. Should be called only once + // for each time that slaveReceiveRequested() is signalled + async command uint8_t slaveReceive(); + + //signalled when a byte is expected in TXBUF. + // return TRUE if you plan to write to it, FALSE otherwise + async event bool slaveTransmitRequested(); + async command void slaveTransmit(uint8_t data); + + //should these return error so we can say "no, I'm not going to be a + //slave right now"? + async event void slaveStart(bool isGeneralCall); + + //or maybe we should pass an error to slaveStop so that the top + //level can know that it ended abnormally + async event void slaveStop(); +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA0P.nc new file mode 100644 index 0000000000..e418cbb2a6 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA0P.nc @@ -0,0 +1,27 @@ +/** A non-generic instance of Msp430UsciC for USCI_A0. */ +configuration Msp430UsciA0P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses interface ResourceConfigure[uint8_t client]; +} +implementation { + + components new HplMsp430UsciC(UCA0CTLW0_, MSP430_USCI_A0_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsA0P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA1P.nc new file mode 100644 index 0000000000..13f42c8d52 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA1P.nc @@ -0,0 +1,29 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for A1 */ +/** A non-generic instance of Msp430UsciC for USCI_A1. */ +configuration Msp430UsciA1P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses interface ResourceConfigure[uint8_t client]; +} +implementation { + + components new HplMsp430UsciC(UCA1CTLW0_, MSP430_USCI_A1_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsA1P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA2P.nc new file mode 100644 index 0000000000..da0beb2e5e --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA2P.nc @@ -0,0 +1,29 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for A2 */ +/** A non-generic instance of Msp430UsciC for USCI_A2. */ +configuration Msp430UsciA2P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses interface ResourceConfigure[uint8_t client]; +} +implementation { + + components new HplMsp430UsciC(UCA2CTLW0_, MSP430_USCI_A2_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsA2P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA3P.nc new file mode 100644 index 0000000000..5e04f1bf19 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciA3P.nc @@ -0,0 +1,29 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for A3 */ +/** A non-generic instance of Msp430UsciC for USCI_A3. */ +configuration Msp430UsciA3P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses interface ResourceConfigure[uint8_t client]; +} +implementation { + + components new HplMsp430UsciC(UCA3CTLW0_, MSP430_USCI_A3_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsA3P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB0P.nc new file mode 100644 index 0000000000..e69dbd8ac2 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB0P.nc @@ -0,0 +1,29 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for B0 */ +/** A non-generic instance of Msp430UsciC for USCI_B0. */ +configuration Msp430UsciB0P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses interface ResourceConfigure[uint8_t client]; +} +implementation { + + components new HplMsp430UsciC(UCB0CTLW0_, MSP430_USCI_B0_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsB0P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB1P.nc new file mode 100644 index 0000000000..ca55336468 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB1P.nc @@ -0,0 +1,29 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for B1 */ +/** A non-generic instance of Msp430UsciC for USCI_B1. */ +configuration Msp430UsciB1P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses interface ResourceConfigure[uint8_t client]; +} +implementation { + + components new HplMsp430UsciC(UCB1CTLW0_, MSP430_USCI_B1_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsB1P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB2P.nc new file mode 100644 index 0000000000..8339572132 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB2P.nc @@ -0,0 +1,29 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for B2 */ +/** A non-generic instance of Msp430UsciC for USCI_B2. */ +configuration Msp430UsciB2P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses interface ResourceConfigure[uint8_t client]; +} +implementation { + + components new HplMsp430UsciC(UCB2CTLW0_, MSP430_USCI_B2_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsB2P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB3P.nc new file mode 100644 index 0000000000..4c6b77dac7 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciB3P.nc @@ -0,0 +1,29 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciA0P.nc for B3 */ +/** A non-generic instance of Msp430UsciC for USCI_B3. */ +configuration Msp430UsciB3P { + provides { + interface HplMsp430Usci as USCI; + interface Resource[uint8_t client]; + interface ResourceRequested[uint8_t client]; + interface ResourceDefaultOwner; + interface ArbiterInfo; + interface HplMsp430UsciInterrupts as Interrupts[uint8_t mode]; + } + uses interface ResourceConfigure[uint8_t client]; +} +implementation { + + components new HplMsp430UsciC(UCB3CTLW0_, MSP430_USCI_B3_RESOURCE) as UsciC; + USCI = UsciC; + Resource = UsciC; + ResourceRequested = UsciC; + ResourceDefaultOwner = UsciC; + ArbiterInfo = UsciC; + ResourceConfigure = UsciC; + Interrupts = UsciC; + + components HplMsp430UsciInterruptsB3P as IsrC; + UsciC.RawInterrupts -> IsrC; + IsrC.Usci -> UsciC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciConfigure.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciConfigure.nc new file mode 100644 index 0000000000..ef6488244f --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciConfigure.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Obtain access to a client-specific USCI configuration. + */ + +#include "msp430usci.h" + +interface Msp430UsciConfigure { + /** + * Return a pointer to the configuration that should be used for a + * particular USCI client. */ + async command const msp430_usci_config_t* getConfiguration (); +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc new file mode 100644 index 0000000000..6b9c1b6037 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Support notification of errors detected in MSP430 USCI modules. + */ + +interface Msp430UsciError { + /** Signalled when the USCI infrastructure detects a hardware error. + * + * The passed parameter is a bit set comprising values defined in + * msp430usci.h; these generally map to bits in the USCI UCxySTAT + * register. Note that this event is usually signalled from within + * an interrupt handler. + */ + async event void condition (unsigned int errors); +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc new file mode 100644 index 0000000000..250f2050a8 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B0 in I2C mode. + * + * @author Peter Bigot + * @author Doug Carlson + * @author Derek Baker + * @author Eric B. Decker + */ + +generic configuration Msp430UsciI2CB0C() { + provides { + interface Resource; + interface ResourceRequested; + interface I2CPacket; + interface I2CSlave; + interface Msp430UsciError; + } + uses interface Msp430UsciConfigure; +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), + }; + + components Msp430UsciB0P as UsciP; + Resource = UsciP.Resource[CLIENT_ID]; + ResourceRequested = UsciP.ResourceRequested[CLIENT_ID]; + + components Msp430UsciI2CB0P as I2CP; + I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CSlave = I2CP.I2CSlave[CLIENT_ID]; + Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; + Msp430UsciError = I2CP.Msp430UsciError[CLIENT_ID]; + + UsciP.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc new file mode 100644 index 0000000000..d0434548fb --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Peter Bigot + * @author Doug Carlson + * @author Derek Baker + * @author Eric B. Decker + */ + +configuration Msp430UsciI2CB0P { + provides { + interface I2CPacket[uint8_t client]; + interface I2CSlave[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SCL; + interface HplMsp430GeneralIO as SDA; + } +} +implementation { + components Msp430UsciB0P as UsciP; + components new Msp430UsciI2CP() as I2CP; + + I2CP.Usci -> UsciP; + I2CP.Interrupts -> UsciP.Interrupts[MSP430_USCI_I2C]; + I2CP.ArbiterInfo -> UsciP; + + Msp430UsciConfigure = I2CP; + ResourceConfigure = I2CP; + I2CPacket = I2CP; + I2CSlave = I2CP; + Msp430UsciError = I2CP; + SCL = I2CP.SCL; + SDA = I2CP.SDA; + + components LocalTimeMilliC; + I2CP.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc new file mode 100644 index 0000000000..cfca1f3408 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc @@ -0,0 +1,79 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B1 */ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B1 in I2C mode. + * + * @author Peter Bigot + * @author Doug Carlson + * @author Derek Baker + * @author Eric B. Decker + */ + +generic configuration Msp430UsciI2CB1C() { + provides { + interface Resource; + interface ResourceRequested; + interface I2CPacket; + interface I2CSlave; + interface Msp430UsciError; + } + uses interface Msp430UsciConfigure; +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B1_RESOURCE), + }; + + components Msp430UsciB1P as UsciP; + Resource = UsciP.Resource[CLIENT_ID]; + ResourceRequested = UsciP.ResourceRequested[CLIENT_ID]; + + components Msp430UsciI2CB1P as I2CP; + I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CSlave = I2CP.I2CSlave[CLIENT_ID]; + Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; + Msp430UsciError = I2CP.Msp430UsciError[CLIENT_ID]; + + UsciP.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc new file mode 100644 index 0000000000..40458a9161 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc @@ -0,0 +1,80 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B1 */ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Peter Bigot + * @author Doug Carlson + * @author Derek Baker + * @author Eric B. Decker + */ + +configuration Msp430UsciI2CB1P { + provides { + interface I2CPacket[uint8_t client]; + interface I2CSlave[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SCL; + interface HplMsp430GeneralIO as SDA; + } +} +implementation { + components Msp430UsciB1P as UsciP; + components new Msp430UsciI2CP() as I2CP; + + I2CP.Usci -> UsciP; + I2CP.Interrupts -> UsciP.Interrupts[MSP430_USCI_I2C]; + I2CP.ArbiterInfo -> UsciP; + + Msp430UsciConfigure = I2CP; + ResourceConfigure = I2CP; + I2CPacket = I2CP; + I2CSlave = I2CP; + Msp430UsciError = I2CP; + SCL = I2CP.SCL; + SDA = I2CP.SDA; + + components LocalTimeMilliC; + I2CP.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc new file mode 100644 index 0000000000..e563b8a7a7 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc @@ -0,0 +1,79 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B2 */ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B2 in I2C mode. + * + * @author Peter Bigot + * @author Doug Carlson + * @author Derek Baker + * @author Eric B. Decker + */ + +generic configuration Msp430UsciI2CB2C() { + provides { + interface Resource; + interface ResourceRequested; + interface I2CPacket; + interface I2CSlave; + interface Msp430UsciError; + } + uses interface Msp430UsciConfigure; +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B2_RESOURCE), + }; + + components Msp430UsciB2P as UsciP; + Resource = UsciP.Resource[CLIENT_ID]; + ResourceRequested = UsciP.ResourceRequested[CLIENT_ID]; + + components Msp430UsciI2CB2P as I2CP; + I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CSlave = I2CP.I2CSlave[CLIENT_ID]; + Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; + Msp430UsciError = I2CP.Msp430UsciError[CLIENT_ID]; + + UsciP.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc new file mode 100644 index 0000000000..397860c0df --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc @@ -0,0 +1,80 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B2 */ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Peter Bigot + * @author Doug Carlson + * @author Derek Baker + * @author Eric B. Decker + */ + +configuration Msp430UsciI2CB2P { + provides { + interface I2CPacket[uint8_t client]; + interface I2CSlave[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SCL; + interface HplMsp430GeneralIO as SDA; + } +} +implementation { + components Msp430UsciB2P as UsciP; + components new Msp430UsciI2CP() as I2CP; + + I2CP.Usci -> UsciP; + I2CP.Interrupts -> UsciP.Interrupts[MSP430_USCI_I2C]; + I2CP.ArbiterInfo -> UsciP; + + Msp430UsciConfigure = I2CP; + ResourceConfigure = I2CP; + I2CPacket = I2CP; + I2CSlave = I2CP; + Msp430UsciError = I2CP; + SCL = I2CP.SCL; + SDA = I2CP.SDA; + + components LocalTimeMilliC; + I2CP.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc new file mode 100644 index 0000000000..618f89159b --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc @@ -0,0 +1,79 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0C.nc for B3 */ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B3 in I2C mode. + * + * @author Peter Bigot + * @author Doug Carlson + * @author Derek Baker + * @author Eric B. Decker + */ + +generic configuration Msp430UsciI2CB3C() { + provides { + interface Resource; + interface ResourceRequested; + interface I2CPacket; + interface I2CSlave; + interface Msp430UsciError; + } + uses interface Msp430UsciConfigure; +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B3_RESOURCE), + }; + + components Msp430UsciB3P as UsciP; + Resource = UsciP.Resource[CLIENT_ID]; + ResourceRequested = UsciP.ResourceRequested[CLIENT_ID]; + + components Msp430UsciI2CB3P as I2CP; + I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CSlave = I2CP.I2CSlave[CLIENT_ID]; + Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; + Msp430UsciError = I2CP.Msp430UsciError[CLIENT_ID]; + + UsciP.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc new file mode 100644 index 0000000000..01e8bd0e20 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc @@ -0,0 +1,80 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciI2CB0P.nc for B3 */ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author Peter Bigot + * @author Doug Carlson + * @author Derek Baker + * @author Eric B. Decker + */ + +configuration Msp430UsciI2CB3P { + provides { + interface I2CPacket[uint8_t client]; + interface I2CSlave[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SCL; + interface HplMsp430GeneralIO as SDA; + } +} +implementation { + components Msp430UsciB3P as UsciP; + components new Msp430UsciI2CP() as I2CP; + + I2CP.Usci -> UsciP; + I2CP.Interrupts -> UsciP.Interrupts[MSP430_USCI_I2C]; + I2CP.ArbiterInfo -> UsciP; + + Msp430UsciConfigure = I2CP; + ResourceConfigure = I2CP; + I2CPacket = I2CP; + I2CSlave = I2CP; + Msp430UsciError = I2CP; + SCL = I2CP.SCL; + SDA = I2CP.SDA; + + components LocalTimeMilliC; + I2CP.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc new file mode 100644 index 0000000000..9921d79d22 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc @@ -0,0 +1,613 @@ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Implement the I2C-related interfaces for a MSP430 USCI module + * instance. + * + * port of usci gen 1 (john hopkins) implementation of i2c + * + * @author Doug Carlson + * @author Marcus Chang + * @author Peter A. Bigot + * @author Derek Baker + * @author Eric B. Decker + */ + +#include +#include "msp430usci.h" +#include + +generic module Msp430UsciI2CP () @safe() { + provides { + interface I2CPacket as I2CBasicAddr[uint8_t client]; + interface I2CSlave[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + interface Msp430UsciConfigure[uint8_t client]; + interface ArbiterInfo; + interface LocalTime as LocalTime_bms; + } +} + +implementation { + enum{ + SLAVE = 0, + MASTER_READ = 1, + MASTER_WRITE = 2, + }; + + norace uint8_t* m_buf; + norace uint8_t m_len; + norace uint8_t m_pos; + norace uint8_t m_action; + norace i2c_flags_t m_flags; + + void showRegisters(); + void nextRead(); + void nextWrite(); + void signalDone( error_t error ); + + void printRegisters(){ + printf("---\n\r"); + printf(" CTL0: %x\n\r", call Usci.getCtl0()); + printf(" CTL1: %x\n\r", call Usci.getCtl1()); + + //printf(" CTLW: %x\n\r", call Usci.getCtlw0()); + //printf(" BRw: %x\n\r", call Usci.getBrw()); + + printf(" OA: %x\n\r", call Usci.getI2coa()); + printf(" SA: %x\n\r", call Usci.getI2csa()); + printf(" IE: %x\n\r", call Usci.getIe()); + printf(" IFG: %x\n\r", call Usci.getIfg()); + printf("---\n\r"); + } + + error_t configure_(const msp430_usci_config_t* config){ + if(! config){ + return FAIL; + } + + //basic config (leave in reset) + call Usci.configure(config, TRUE); + + //direction is don't-care in datasheet + call SCL.selectModuleFunc(); + call SDA.selectModuleFunc(); + + //i2c-specific config + call Usci.setI2coa(config->i2coa); + call Usci.leaveResetMode_(); + + //enable slave-start interrupt, clear the rest + call Usci.setIe((call Usci.getIe() & (BIT7|BIT6)) | UCSTTIE); + return SUCCESS; + } + + + error_t slaveIdle(){ + + //only reset if we are master: if we are already slave we don't + //want to clear any state flags by accident. + if (call Usci.getCtl0() & UCMST){ + call Usci.enterResetMode_(); + call Usci.setCtl0(call Usci.getCtl0() & ~UCMST); + call Usci.leaveResetMode_(); + } + + //enable slave-start, clear the rest + call Usci.setIe((call Usci.getIe() & (BIT7|BIT6)) | UCSTTIE); + m_action = SLAVE; + return SUCCESS; + } + + error_t unconfigure_(){ + call Usci.enterResetMode_(); + call SCL.selectIOFunc(); + call SDA.selectIOFunc(); + return SUCCESS; + } + + async command void ResourceConfigure.configure[ uint8_t client ]() { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[ uint8_t client ]() { + unconfigure_(); + } + + /*************************************************************************/ + + async command error_t I2CBasicAddr.read[uint8_t client]( i2c_flags_t flags, + uint16_t addr, uint8_t len, + uint8_t* buf ) { + + //According to TI, we can just poll until the start condition + //clears. But we're nervous and want to bail out if it doesn't + //clear fast enough. This is how many times we loop before we + //bail out. + + uint16_t counter = I2C_ONE_BYTE_READ_COUNTER; + + m_buf = buf; + m_len = len; + m_flags = flags; + m_pos = 0; + m_action = MASTER_READ; + + /* check if this is a new connection or a continuation */ + if (m_flags & I2C_START) { + //TODO: if reset can be removed, can we consolidate this with + //the repeated-start? + call Usci.enterResetMode_(); + call Usci.setCtl0(call Usci.getCtl0() | UCMST); + call Usci.leaveResetMode_(); + + // set slave address + call Usci.setI2csa(addr); + + //check bus status at the latest point possible. + if ( call Usci.getStat() & UCBBUSY ){ + //if the bus is busy, bail out real quick + slaveIdle(); + return EBUSY; + } + //clear TR bit, set start condition + call Usci.setCtl1( (call Usci.getCtl1()&(~UCTR)) | UCTXSTT); + + //enable i2c arbitration interrupts, rx, clear the rest + call Usci.setIe( (call Usci.getIe() & (BIT7|BIT6)) | UCNACKIE |UCALIE |UCRXIE); + + /* + * if only reading 1 byte, STOP bit must be set right after + * START condition is triggered + */ + if ( (m_len == 1) && (m_flags & I2C_STOP) ) { + //this logic seems to work fine + /* wait until START bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ + counter--; + } + /* set stop bit */ + //UCB0CTL1 |= UCTXSTP; + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + } else if (m_flags & I2C_RESTART) { + /* set slave address */ + call Usci.setI2Csa(addr); + + //clear TR bit, start + /* UCTXSTT - generate START condition */ + //UCB0CTL1 |= UCTXSTT; + call Usci.setCtl1((call Usci.getCtl1() & ~UCTR) | UCTXSTT); + + //enable i2c arbitration interrupts, rx, clear the rest + call Usci.setIe( (call Usci.getIe() & (BIT7|BIT6)) | UCNACKIE |UCALIE |UCRXIE); + + /* if only reading 1 byte, STOP bit must be set right after START bit */ + if ( (m_len == 1) && (m_flags & I2C_STOP) ) { + /* wait until START bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ + counter--; + } + /* set stop bit */ + //UCB0CTL1 |= UCTXSTP; + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + } else { + //TODO: test + nextRead(); + } + if (counter > 0x01){ + return SUCCESS; + } else { + return FAIL; + } + } + + void nextRead() { + uint16_t counter = 0xFFFF; + + if ((m_pos == (m_len - 2)) && m_len > 1) { + //we want to send NACK + STOP in response to the last byte. + //if m_pos == m_len-2 and we get the RX interrupt, that means + // that the slave has already written the next-to-last byte + // and we have acknowledged it--BUT we have not yet read it. + //By setting the stop condition here, we say "send STOP after + //the next byte," which will actually be the last byte. + // + //it is more intuitive to say "read the next-to-last byte and + //set the STOP condition real quick before the last byte gets + //sent so that we can NACK+STOP it". Maybe this would work if + //you slowed down the I2C clock enough? + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + /* read byte from RX buffer */ + m_buf[ m_pos++ ] = call Usci.getRxbuf(); + + //TODO: this should check m_flags: if RESTART flag is present, we + //should not send stop condition + if (m_pos == m_len) { + + //when we receive the last byte, wait until STP condition is + //cleared, then return. + while( (call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + counter --; + } + //switch back to slave mode, we're done + slaveIdle(); + + //disable the rx interrupt + call Usci.setIe(call Usci.getIe() & ~UCRXIE); + if (counter > 0x01) { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2csa(), m_pos, m_buf ); + } else { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2csa() , m_pos, m_buf ); + } + } + } + + async command error_t I2CBasicAddr.write[uint8_t client]( i2c_flags_t flags, + uint16_t addr, uint8_t len, + uint8_t* buf ) { + m_buf = buf; + m_len = len; + m_flags = flags; + m_pos = 0; + m_action = MASTER_WRITE; + + /* check if this is a new connection or a continuation */ + if (m_flags & I2C_START) { + //sequence as described in 17.3.4.2.1 of slau144h is: + // - set sa + // - set UCTR + // - set UCTXSTT + // (start/address written, then we get an interrupt) + // no reset should be necessary for this process. however, when + // I did it in a different sequence, the first write worked OK + // but the second one began with the UCSTPIFG set, and the first + // character was dropped. I have no explanation for why this + // would be the case. + + //need to enter master mode + call Usci.enterResetMode_(); + call Usci.setCtl0(call Usci.getCtl0() | UCMST); + call Usci.leaveResetMode_(); + + // set slave address + call Usci.setI2csa(addr); + + //check bus status at the latest point possible. + if ( call Usci.getStat() & UCBBUSY ){ + //if the bus is busy, bail out real quick + slaveIdle(); + return EBUSY; + } + + // UCTXSTT - generate START condition + call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); + + //enable relevant state interrupts and TX, clear the rest + //while ( call Usci.getCtl1() & UCTXSTT){} + call Usci.setIe((call Usci.getIe() & (BIT7|BIT6)) | UCNACKIE | UCALIE | UCTXIE); + } + /* is this a restart or a direct continuation */ + else if (m_flags & I2C_RESTART) { + // set slave address + call Usci.setI2csa(addr); + + /* UCTR - set transmit */ + /* UCTXSTT - generate START condition */ + call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); + //do we not need to enable any interrupts here? + } else { + // continue writing next byte + nextWrite(); + } + return SUCCESS; + } + + void nextWrite() { + uint16_t counter = 0xFFFF; + + //Hey, now here's a fun thing to do: + // It seems like if two masters set START at almost the same + // time, they both get the TX interrupt, so both write their 0th + // byte into the TX buffer. However, only one of them actually + // writes it out, and no arbitration-loss interrupt is raised for + // the "slow" one. When the "fast" one finishes its transaction, + // the slow one gets a second TX interrupt, which would cause us + // to skip over the first byte by accident. This checks for the + // issue and rewinds the buffer position to 0 if it applies. I + // make no guarantees about how stable this behavior is. + + if ( call Usci.getCtl1() & UCTXSTT) { + m_pos = 0; + } + + /* all bytes sent */ + if ( m_pos == m_len ) { + /* not setting STOP bit allows restarting transfer */ + if ( m_flags & I2C_STOP ) { + /* set stop bit */ + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + + /* wait until STOP bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + counter--; + } + + //STOPping and just finished last send, so we should go back + //to slave mode. + + slaveIdle(); + } else { + //so, we just don't send the STOP bit. + } + + //disable tx interrupt, we're DONE + call Usci.setIe(call Usci.getIe() & ~UCTXIE ); + /* fail gracefully */ + if (counter > 0x01) { + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2csa(), m_len, m_buf ); + } else{ + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2csa(), m_len, m_buf ); + } + } else { + //send the next char + call Usci.setTxbuf(m_buf[ m_pos++ ]); + } + } + + + async command void I2CSlave.slaveTransmit[uint8_t clientId](uint8_t data) { + //TODO: safety + //write it, reenable interrupt (if it was disabled) + call Usci.setTxbuf(data); + call Usci.setIe(call Usci.getIe() | UCTXIE); + } + + + async command uint8_t I2CSlave.slaveReceive[uint8_t client]() { + //re-enable rx interrupt, read the byte + call Usci.setIe(call Usci.getIe() | UCRXIE); + return call Usci.getRxbuf(); + } + + + //defaults + default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} + default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} + default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client]() { + return &msp430_usci_i2c_default_config; + } + + /***** Slave-mode functions ***/ + command error_t I2CSlave.setOwnAddress[uint8_t client](uint16_t addr) { + //retain UCGCEN bit + call Usci.setI2coa( (call Usci.getI2coa() & UCGCEN) | addr); + return SUCCESS; + } + + command error_t I2CSlave.enableGeneralCall[uint8_t client]() { + if (UCGCEN & (call Usci.getI2coa())) { + return EALREADY; + } else { + call Usci.setI2coa(UCGCEN | (call Usci.getI2coa())); + return SUCCESS; + } + } + + command error_t I2CSlave.disableGeneralCall[uint8_t client]() { + if (UCGCEN & ~(call Usci.getI2coa())) { + return EALREADY; + } else { + call Usci.setI2coa(~UCGCEN & (call Usci.getI2coa())); + return SUCCESS; + } + } + + //END USCI_GEN1 PORTED CODE + default async event bool I2CSlave.slaveReceiveRequested[uint8_t client]() { return FALSE; } + default async event bool I2CSlave.slaveTransmitRequested[uint8_t client]() { return FALSE; } + + default async event void I2CSlave.slaveStart[uint8_t client](bool isGeneralCall) { ; } + default async event void I2CSlave.slaveStop[uint8_t client]() { ; } + + /***************************************************************************/ + + void TXInterrupts_interrupted(uint8_t iv); + void RXInterrupts_interrupted(uint8_t iv); + void StateInterrupts_interrupted(uint8_t iv); + void NACK_interrupt(); + void AL_interrupt(); + void STP_interrupt(); + void STT_interrupt(); + + async event void Interrupts.interrupted(uint8_t iv) { + switch(iv) { + case USCI_I2C_UCALIFG: + AL_interrupt(); + break; + case USCI_I2C_UCNACKIFG: + NACK_interrupt(); + break; + case USCI_I2C_UCSTTIFG: + STT_interrupt(); + break; + case USCI_I2C_UCSTPIFG: + STP_interrupt(); + break; + case USCI_I2C_UCRXIFG: + RXInterrupts_interrupted(call Usci.getIfg()); + break; + case USCI_I2C_UCTXIFG: + TXInterrupts_interrupted(call Usci.getIfg()); + break; + default: + //error + break; + } + } + + void TXInterrupts_interrupted(uint8_t iv) { + /* if master mode */ + if (call Usci.getCtl0() & UCMST) { + nextWrite(); + } else { + if (signal I2CSlave.slaveTransmitRequested[call ArbiterInfo.userId()]()) { + //true= "I'm responding RIGHT NOW" + // note that when this interrupt context ends, txinterrupt + // will be raised again. + } else { + //false= "I need to pause for a second" + //disable TX interrupt. + call Usci.setIe(call Usci.getIe() & ~UCTXIE); + } + } + } + + void RXInterrupts_interrupted(uint8_t iv) { + /* if master mode */ + if (call Usci.getCtl0() & UCMST) { + nextRead(); + } else { + if (signal I2CSlave.slaveReceiveRequested[call ArbiterInfo.userId()]()) { + //TRUE: they're responding immediately (should have actually + //already responded at this point). + } else { + //FALSE: disable the RX interrupt, since the client needs to + //do some work + call Usci.setIe(call Usci.getIe() & ~UCRXIE); + } + } + } + + + void NACK_interrupt() { + uint8_t counter = 0xff; + + //This occurs during write and read when no ack is received. + /* set stop bit */ + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + + /* wait until STOP bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + counter--; + } + call Usci.enterResetMode_(); + call Usci.leaveResetMode_(); + //back to slave idle mode + slaveIdle(); + + //signal appropriate event depending on whether we were + //transmitting or receiving + //Note that TR will be cleared if we lost MM arbitration because + //another master addressed us as a slave. However, this should + //manifest as an AL interrupt, not a NACK interrupt. + if (call Usci.getCtl1() & UCTR) { + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2csa(), m_len, m_buf ); + } else { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2csa(), m_len, m_buf ); + } + } + + void AL_interrupt() { + uint8_t lastAction = m_action; + + slaveIdle(); + + //clear AL flag + call Usci.setStat(call Usci.getStat() & ~(UCALIFG)); + + //TODO: more descriptive error? I guess EBUSY is fair. + if(lastAction == MASTER_WRITE) { + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2csa(), m_len, m_buf ); + } else if(lastAction == MASTER_READ) { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2csa(), m_len, m_buf); + } + + //once this returns, we should get another interrupt for STT + //if we are addressed. Otherwise, we're just chillin' in idle + //slave mode as per usual. + } + + void STP_interrupt() { + + /* disable STOP interrupt, enable START interrupt */ + call Usci.setIe((call Usci.getIe() | UCSTTIE) & ~UCSTPIE); + + //this is ugly: the stop interrupt has higher priority than RX. + //It appears to be the case that since we get the RX interrupt as + //soon as the byte is received, and the STP interrupt as soon as + //the stop condition is received, there is a very short window + //where we have the RX but not the STP, and we tend to see the + //stop interrupt first. This will surely confound upper-level + //logic (it would see a stop, then another byte), so we reverse + //the priority for this case in software. + + if (call Usci.getIfg() & UCRXIFG & call Usci.getIe()) { + RXInterrupts_interrupted(call Usci.getIfg()); + } + signal I2CSlave.slaveStop[call ArbiterInfo.userId()](); + } + + void STT_interrupt() { + + //clear start flag, but leave enabled (repeated start) + //enable stop interrupt + //enable RX/TX interrupts + + call Usci.setStat(call Usci.getStat() &~ UCSTTIFG); + + //This is the same issue as noted in the STP_interrupt above, but + //applied to repeated start conditions. + + if (call Usci.getIfg() & UCRXIFG & call Usci.getIe() ) { + RXInterrupts_interrupted(call Usci.getIfg()); + } + call Usci.setIe(call Usci.getIe() | UCSTPIE | UCRXIE | UCTXIE); + signal I2CSlave.slaveStart[call ArbiterInfo.userId()]( call Usci.getStat() & UCGC); + } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc new file mode 100644 index 0000000000..ea79874157 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc @@ -0,0 +1,71 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for A0 */ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A0 in SPI mode. + */ + +generic configuration Msp430UsciSpiA0C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), + }; + + components Msp430UsciA0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiA0P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc new file mode 100644 index 0000000000..59d3abbd04 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc @@ -0,0 +1,36 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for A0 */ +configuration Msp430UsciSpiA0P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} +implementation { + + components Msp430UsciA0P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc new file mode 100644 index 0000000000..a8bfcf8b2f --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc @@ -0,0 +1,71 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for A1 */ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A1 in SPI mode. + */ + +generic configuration Msp430UsciSpiA1C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A1_RESOURCE), + }; + + components Msp430UsciA1P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiA1P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc new file mode 100644 index 0000000000..9f4b0d7d18 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc @@ -0,0 +1,36 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for A1 */ +configuration Msp430UsciSpiA1P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} +implementation { + + components Msp430UsciA1P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc new file mode 100644 index 0000000000..7d874a8c68 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc @@ -0,0 +1,71 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for A2 */ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A2 in SPI mode. + */ + +generic configuration Msp430UsciSpiA2C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A2_RESOURCE), + }; + + components Msp430UsciA2P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiA2P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc new file mode 100644 index 0000000000..0115bc5f63 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc @@ -0,0 +1,36 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for A2 */ +configuration Msp430UsciSpiA2P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} +implementation { + + components Msp430UsciA2P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc new file mode 100644 index 0000000000..1c6b5455cb --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc @@ -0,0 +1,71 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for A3 */ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A3 in SPI mode. + */ + +generic configuration Msp430UsciSpiA3C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A3_RESOURCE), + }; + + components Msp430UsciA3P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiA3P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc new file mode 100644 index 0000000000..03eb70da2d --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc @@ -0,0 +1,36 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for A3 */ +configuration Msp430UsciSpiA3P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} +implementation { + + components Msp430UsciA3P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc new file mode 100644 index 0000000000..8874d04da8 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B0 in SPI mode. + */ + +generic configuration Msp430UsciSpiB0C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B0_RESOURCE), + }; + + components Msp430UsciB0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiB0P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc new file mode 100644 index 0000000000..296a1f827e --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc @@ -0,0 +1,34 @@ +configuration Msp430UsciSpiB0P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} +implementation { + + components Msp430UsciB0P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc new file mode 100644 index 0000000000..1d7ec346e0 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc @@ -0,0 +1,71 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for B1 */ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B1 in SPI mode. + */ + +generic configuration Msp430UsciSpiB1C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B1_RESOURCE), + }; + + components Msp430UsciB1P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiB1P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc new file mode 100644 index 0000000000..23a00b80f0 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc @@ -0,0 +1,36 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for B1 */ +configuration Msp430UsciSpiB1P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} +implementation { + + components Msp430UsciB1P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc new file mode 100644 index 0000000000..aa767c9cab --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc @@ -0,0 +1,71 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for B2 */ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B2 in SPI mode. + */ + +generic configuration Msp430UsciSpiB2C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B2_RESOURCE), + }; + + components Msp430UsciB2P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiB2P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc new file mode 100644 index 0000000000..93fc7b3549 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc @@ -0,0 +1,36 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for B2 */ +configuration Msp430UsciSpiB2P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} +implementation { + + components Msp430UsciB2P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc new file mode 100644 index 0000000000..49da8f3f0b --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc @@ -0,0 +1,71 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0C.nc for B3 */ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_B3 in SPI mode. + */ + +generic configuration Msp430UsciSpiB3C() { + provides { + interface Resource; + interface SpiPacket; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_B3_RESOURCE), + }; + + components Msp430UsciB3P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciSpiB3P as SpiC; + SpiPacket = SpiC.SpiPacket[CLIENT_ID]; + SpiBlock = SpiC.SpiBlock; + SpiByte = SpiC.SpiByte; + Msp430UsciError = SpiC.Msp430UsciError; + + UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc new file mode 100644 index 0000000000..911e43d54b --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc @@ -0,0 +1,36 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciSpiB0P.nc for B3 */ +configuration Msp430UsciSpiB3P { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + } +} +implementation { + + components Msp430UsciB3P as UsciC; + + components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; + SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; + SpiC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = SpiC; + ResourceConfigure = SpiC; + SpiPacket = SpiC; + SpiBlock = SpiC; + SpiByte = SpiC; + Msp430UsciError = SpiC; + SIMO = SpiC.SIMO; + SOMI = SpiC.SOMI; + CLK = SpiC.CLK; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc new file mode 100644 index 0000000000..dd3b08b7b8 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc @@ -0,0 +1,227 @@ +/* + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Implement the SPI-related interfaces for a MSP430 USCI module + * instance. + * + * @author Peter A. Bigot + * @author João Gonçalves + */ + +generic module Msp430UsciSpiP () @safe() { + provides { + interface SpiPacket[ uint8_t client ]; + interface SpiBlock; + interface SpiByte; + interface Msp430UsciError; + interface ResourceConfigure[ uint8_t client ]; + } + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + interface HplMsp430GeneralIO as SIMO; + interface HplMsp430GeneralIO as SOMI; + interface HplMsp430GeneralIO as CLK; + + interface Msp430UsciConfigure[ uint8_t client ]; + interface ArbiterInfo; + } +} +implementation { + + /** The SPI is busy if it's actively transmitting/receiving, or if + * there is an active buffered I/O operation. + */ + bool isBusy () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + return 0; + } + + /** The given client is the owner if the USCI is in SPI mode and + * the client is the user stored in the SPI arbiter. + */ + error_t checkIsOwner (uint8_t client) { + /* Ensure the USCI is in SPI mode and we're the owning client */ + if (! (call ArbiterInfo.inUse())) { + return EOFF; + } + if ((call ArbiterInfo.userId() != client)) { + return EBUSY; + } + return SUCCESS; + } + + /** Take the USCI out of SPI mode. + * + * Assumes the USCI is currently in SPI mode. This will busy-wait + * until any characters being actively transmitted or received are + * out of their shift register. The USCI is reset (which also + * disables interrupts) and returns the SPI-related pins to their + * IO function rather than module role. + * + * The USCI is left in software reset mode to avoid power drain. + * Errata UCS6 doesn't apply. + */ + void unconfigure_ () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + + call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); + call Usci.enterResetMode_(); + call SIMO.makeOutput(); + call SIMO.selectIOFunc(); + call SOMI.makeOutput(); + call SOMI.selectIOFunc(); + call CLK.makeOutput(); + call CLK.selectIOFunc(); + } + + /** Configure the USCI for SPI mode. + * + * Invoke the USCI configuration to set up the serial speed, but + * leaves USCI in reset mode on completion. This function then + * follows up by setting the SPI-related pins to their module role + * prior to taking the USCI out of reset mode. All interrupts are + * left off. + */ + error_t configure_ (const msp430_usci_config_t* config) { + if (! config) { + return FAIL; + } + + /* + * Do basic configuration, leaving USCI in reset mode. Configure + * the SPI pins, enable the USCI, and leave interrupts off. Note + * reseting the USCI will kill the IEs so no need to do so explicitly. + */ + call Usci.configure(config, TRUE); + call SIMO.makeOutput(); + call SIMO.selectModuleFunc(); + call SOMI.makeInput(); + call SOMI.selectModuleFunc(); + call CLK.makeOutput(); + call CLK.selectModuleFunc(); + + call Usci.leaveResetMode_(); + call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); + + return SUCCESS; + } + + async command uint8_t SpiByte.write (uint8_t data) { + uint8_t stat; + + while (! (UCTXIFG & call Usci.getIfg())) { + ; /* busywait */ + } + call Usci.setTxbuf(data); + + while (! (UCRXIFG & call Usci.getIfg())) { + ; /* busywait */ + } + stat = call Usci.getStat(); + data = call Usci.getRxbuf(); + stat = MSP430_USCI_ERR_UCxySTAT & (stat | (call Usci.getStat())); + if (stat) { + signal Msp430UsciError.condition(stat); + } + return data; + } + + + async command void SpiBlock.transfer(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { + uint8_t byt; + + while (len) { + while (!call Usci.isTxIntrPending()) + ; /* busy wait */ + byt = 0; + if (txBuf) + byt = *txBuf++; + call Usci.setTxbuf(byt); + while (!call Usci.isRxIntrPending()) + ; /* busy wait */ + byt = call Usci.getRxbuf(); + if (rxBuf) + *rxBuf++ = byt; + len--; + } + } + + + /* + * SpiPacket.send is improperly implemented. It should be split phase. Other msp430 families + * implement it using interrupts and/or dma. + * + * For the time being, the functionality implemented originally by the x5 SpiPacket, is now + * available in SpiBlock.transfer. This routine now returns FAIL. + */ + async command error_t SpiPacket.send[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { + return FAIL; + } + + default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, + uint8_t* rxBuf, uint16_t len, error_t error ) { } + + async event void Interrupts.interrupted (uint8_t iv) { + if (! call ArbiterInfo.inUse()) { + return; + } + if (USCI_UCRXIFG == iv) { + } else if (USCI_UCTXIFG == iv) { + } + } + + default async command const msp430_usci_config_t* + Msp430UsciConfigure.getConfiguration[uint8_t client] () { + return &msp430_usci_spi_default_config; + } + + async command void ResourceConfigure.configure[uint8_t client] () { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[uint8_t client] () { + unconfigure_(); + } + + default async event void Msp430UsciError.condition (unsigned int errors) { } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc new file mode 100644 index 0000000000..1fed90eaa6 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A0 in UART mode. + */ +generic configuration Msp430UsciUartA0C() { + provides { + interface Resource; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A0_RESOURCE), + }; + + components Msp430UsciA0P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA0P as UartC; + UartStream = UartC.UartStream[CLIENT_ID]; + UartByte = UartC.UartByte[CLIENT_ID]; + Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + + UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0P.nc new file mode 100644 index 0000000000..67351a479e --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0P.nc @@ -0,0 +1,33 @@ +configuration Msp430UsciUartA0P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} +implementation { + + components Msp430UsciA0P as UsciC; + components new Msp430UsciUartP() as UartC; + + UartC.Usci -> UsciC; + UartC.Interrupts -> UsciC.Interrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc new file mode 100644 index 0000000000..b28d5aef09 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc @@ -0,0 +1,66 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0C.nc for A1 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A1 in UART mode. + */ +generic configuration Msp430UsciUartA1C() { + provides { + interface Resource; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A1_RESOURCE), + }; + + components Msp430UsciA1P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA1P as UartC; + UartStream = UartC.UartStream[CLIENT_ID]; + UartByte = UartC.UartByte[CLIENT_ID]; + Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + + UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1P.nc new file mode 100644 index 0000000000..881aed4b50 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1P.nc @@ -0,0 +1,35 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0P.nc for A1 */ +configuration Msp430UsciUartA1P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} +implementation { + + components Msp430UsciA1P as UsciC; + components new Msp430UsciUartP() as UartC; + + UartC.Usci -> UsciC; + UartC.Interrupts -> UsciC.Interrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc new file mode 100644 index 0000000000..8b42664b74 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc @@ -0,0 +1,66 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0C.nc for A2 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A2 in UART mode. + */ +generic configuration Msp430UsciUartA2C() { + provides { + interface Resource; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A2_RESOURCE), + }; + + components Msp430UsciA2P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA2P as UartC; + UartStream = UartC.UartStream[CLIENT_ID]; + UartByte = UartC.UartByte[CLIENT_ID]; + Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + + UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2P.nc new file mode 100644 index 0000000000..5291687075 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2P.nc @@ -0,0 +1,35 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0P.nc for A2 */ +configuration Msp430UsciUartA2P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} +implementation { + + components Msp430UsciA2P as UsciC; + components new Msp430UsciUartP() as UartC; + + UartC.Usci -> UsciC; + UartC.Interrupts -> UsciC.Interrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc new file mode 100644 index 0000000000..f20d33fbe7 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc @@ -0,0 +1,66 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0C.nc for A3 */ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Generic configuration for a client that shares USCI_A3 in UART mode. + */ +generic configuration Msp430UsciUartA3C() { + provides { + interface Resource; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} +implementation { + enum { + CLIENT_ID = unique(MSP430_USCI_A3_RESOURCE), + }; + + components Msp430UsciA3P as UsciC; + Resource = UsciC.Resource[CLIENT_ID]; + + components Msp430UsciUartA3P as UartC; + UartStream = UartC.UartStream[CLIENT_ID]; + UartByte = UartC.UartByte[CLIENT_ID]; + Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + + UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3P.nc new file mode 100644 index 0000000000..be1a26fd60 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3P.nc @@ -0,0 +1,35 @@ +/* DO NOT MODIFY + * This file cloned from Msp430UsciUartA0P.nc for A3 */ +configuration Msp430UsciUartA3P { + provides { + interface UartStream[uint8_t client]; + interface UartByte[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface Msp430UsciConfigure[ uint8_t client ]; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + } +} +implementation { + + components Msp430UsciA3P as UsciC; + components new Msp430UsciUartP() as UartC; + + UartC.Usci -> UsciC; + UartC.Interrupts -> UsciC.Interrupts[MSP430_USCI_UART]; + UartC.ArbiterInfo -> UsciC; + + Msp430UsciConfigure = UartC; + ResourceConfigure = UartC; + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + URXD = UartC.URXD; + UTXD = UartC.UTXD; + + components LocalTimeMilliC; + UartC.LocalTime_bms -> LocalTimeMilliC; +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartP.nc new file mode 100644 index 0000000000..6a0d02d8ba --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartP.nc @@ -0,0 +1,429 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Implement the UART-related interfaces for a MSP430 USCI module + * instance. + * + * Interrupt Management + * -------------------- + * + * Upon grant of the USCI in UART mode to a client, interrupts are + * turned off. + * + * On the MSP430, when the TX interrupt is raised the MCU + * automatically clears the UCTXIFG bit that indicates that the TXBUF + * is available for writing characters. Rather than maintain local + * state managed by cooperation between the TX interrupt handler and + * the send code, we leave the TX interrupt disabled and rely on the + * UCTXIFG flag to indicate that single-byte transmission is + * permitted. + * + * An exception to this is in support of the UartSerial.send() + * function. The transmit interrupt is enabled when the outgoing + * message is provided; subsequent sends are interrupt-driven, and the + * interrupt is disabled just prior to transmitting the last character + * of the packet. This leaves the UCTXIFG flag set upon completion of + * the transfer. + * + * The receive interrupt is enabled upon configuration. It is + * controlled using the UartStream functions. While a buffered + * receive operation is active, received characters will be stored and + * no notification provided until the full packet has been received. + * If no buffered receive operation is active, the receivedByte() + * event will be signaled for each received character. + * + * As with the transmit interrupt, MCU execution of the receive + * interrupt clears the UCRXIFG flag, making interrupt-driven + * reception fundamentally incompatible with the busy-waiting + * UartByte.receive() method. + * + * @author Peter A. Bigot + */ + +generic module Msp430UsciUartP () @safe() { + provides { + interface UartStream[ uint8_t client ]; + interface UartByte[ uint8_t client ]; + interface ResourceConfigure[ uint8_t client ]; + interface Msp430UsciError[ uint8_t client ]; + } + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + interface HplMsp430GeneralIO as URXD; + interface HplMsp430GeneralIO as UTXD; + + interface Msp430UsciConfigure[ uint8_t client ]; + interface ArbiterInfo; + interface LocalTime as LocalTime_bms; + } +} +implementation { + + norace uint16_t m_tx_len, m_rx_len; + norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; + norace uint16_t m_tx_pos, m_rx_pos; + + /** + * The UART is busy if it's actively transmitting/receiving, or if + * there is an active buffered I/O operation. + */ + bool isBusy () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + return (0 != m_tx_buf) || (0 != m_rx_buf); + } + + /** + * The given client is the owner if the USCI is in UART mode and + * the client is the user stored in the UART arbiter. + */ + error_t checkIsOwner (uint8_t client) { + /* Ensure the USCI is in UART mode and we're the owning client */ + const uint8_t current_client = call ArbiterInfo.userId(); + + if (0xFF == current_client) { + return EOFF; + } + if (current_client != client) { + return EBUSY; + } + return SUCCESS; + } + + /** + * Take the USCI out of UART mode. + * + * Assumes the USCI is currently in UART mode. This will busy-wait + * until any characters being actively transmitted or received are + * out of their shift register. It disables the interrupts, puts + * the USCI into software resent, and returns the UART-related pins + * to their IO rather than module role. + * + * The USCI is left in software reset mode to avoid power drain per + * CC430 errata UCS6. + */ + void unconfigure_ () { + while (UCBUSY & (call Usci.getStat())) { + ;/* busy-wait */ + } + call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); + call Usci.enterResetMode_(); + call URXD.makeOutput(); + call URXD.selectIOFunc(); + call UTXD.makeOutput(); + call UTXD.selectIOFunc(); + } + + /** + * Configure the USCI for UART mode. + * + * Invoke the USCI configuration to set up the serial speed, but + * leaves USCI in reset mode on completion. This function then + * follows up by setting the UART-related pins to their module role + * prior to taking the USCI out of reset mode. The RX interrupt is + * enabled, and TX is disabled.. + */ + error_t configure_ (const msp430_usci_config_t* config) { + if (! config) { + return FAIL; + } + + /* + * Do basic configuration, leaving USCI in reset mode. Configure + * the UART pins, enable the USCI, and turn on the interrupts. + */ + call Usci.configure(config, TRUE); + call URXD.makeInput(); + call URXD.selectModuleFunc(); + call UTXD.makeOutput(); + call UTXD.selectModuleFunc(); + call Usci.leaveResetMode_(); + call Usci.setIe((UCRXIE | call Usci.getIe()) & (~ UCTXIE)); + m_tx_buf = m_rx_buf = 0; + + return SUCCESS; + } + + /** + * Transmit the next character in the outgoing message. + * + * Assumes the USCI is in UART mode and the owning client has + * supplied a transmission buffer using UartStream. This method is + * only invoked by the transmit interrupt handler when TXBUF is + * ready to receive a new character. + */ + void nextStreamTransmit (uint8_t client) { + atomic { + uint8_t ch = m_tx_buf[m_tx_pos++]; + bool last_char = (m_tx_pos == m_tx_len); + + if (last_char) { + /* + * Disable interrupts and release hold on UART before we + * transmit the character; this ensures that UCTXIFG remains + * set for subsequent byte transfers + */ + call Usci.setIe(call Usci.getIe() & (~ UCTXIE)); + } + call Usci.setTxbuf(ch); + + /* + * On completion, disable the transmit infrastructure prior to + * signaling completion. + */ + if (last_char) { + uint8_t* tx_buf = m_tx_buf; + uint16_t tx_len = m_tx_len; + m_tx_buf = 0; + signal UartStream.sendDone[client](tx_buf, tx_len, SUCCESS); + } + } + } + + async command error_t UartStream.send[uint8_t client]( uint8_t* buf, uint16_t len ) { + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (isBusy()) { + return EBUSY; + } + if ((0 == len) || (0 == buf)) { + return FAIL; + } + m_tx_buf = buf; + m_tx_len = len; + m_tx_pos = 0; + /* + * Enabling the interrupt causes the ISR to be invoked which + * transmits the first character. + */ + call Usci.setIe((call Usci.getIe()) | UCTXIE); + return SUCCESS; + } + + default async event void UartStream.sendDone[uint8_t client] + (uint8_t* buf, uint16_t len, error_t error ) { } + + /* + * The behavior of UartStream during reception is not well defined. + * In the original Msp430UartP implementation, both transmit and + * receive interrupts were enabled upon UART configuration. As + * noted earlier, we keep the transmit interrupt disabled to + * simplify control flow, but we do enable the receive interrupt for + * backwards compatibility. + * + * If receive(uint8_t*,uint16_t) is called, then subsequent received + * characters will be stored into the buffer until completion, and + * the receivedByte(uint8_t) event will not be signaled. If no + * buffered receive is active, then receivedByte(uint8_t) will be + * signaled. + * + * There is no coordination with UartByte, for which the receive + * operation simply busy-waits until the interrupt register + * indicates data is available. If UartStream's + * enableReceiveInterrupt() is in force, it is probable that the + * loop will timeout as the interrupt will clear the flag + * register. + * + * When the UART client releases control (unconfigures the UART), + * all interrupts are disabled. + */ + + async command error_t UartStream.enableReceiveInterrupt[uint8_t client]() { + error_t rv = checkIsOwner(client); + if (SUCCESS == rv) { + call Usci.setIe((call Usci.getIe()) | UCRXIE); + } + return rv; + } + + async command error_t UartStream.disableReceiveInterrupt[uint8_t client]() { + error_t rv = checkIsOwner(client); + if (SUCCESS == rv) { + call Usci.setIe((call Usci.getIe()) & (~ UCRXIE)); + } + return rv; + } + + default async event void UartStream.receivedByte[uint8_t client]( uint8_t byte ) { } + + async command error_t UartStream.receive[uint8_t client]( uint8_t* buf, uint16_t len ) { + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if ((0 == len) || (0 == buf)) { + return FAIL; + } + atomic { + if (m_rx_buf) { + return EBUSY; + } + m_rx_buf = buf; + m_rx_len = len; + m_rx_pos = 0; + } + return SUCCESS; + } + + default async event void UartStream.receiveDone[uint8_t client] + (uint8_t* buf, uint16_t len, error_t error) { } + + async command error_t UartByte.send[uint8_t client]( uint8_t byte ) { + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (m_tx_buf) { + return EBUSY; + } + + /* Wait for TXBUF to become available */ + while (! (UCTXIFG & call Usci.getIfg())) { + } + /* Transmit the character. Note that it hasn't actually gone out + * over the wire until UCBUSY on UCmxSTAT is cleared. */ + call Usci.setTxbuf(byte); + + // wait until it's actually sent. This kills the pipeline and sucks + // performancewise. + while(call Usci.getStat() & UCBUSY){ + } + return SUCCESS; + } + + + enum { + /** + * The timeout for UartByte.receive is specified in "byte times", + * which we can't know without reverse engineering the clock + * subsystem. Assuming a 57600 baud system, one byte takes + * roughly 170usec to transmit (ten bits per byte), or about five + * byte times per (binary) millisecond. + */ + ByteTimesPerMillisecond = 5, + + /** + * Using an 8-bit value to represent a count of events with + * sub-millisecond duration is a horrible interface for humans: + * gives us at most 52msec to react. For testing purposes, scale + * that by some value (e.g., 100 will increase the maximum delay + * to 5 seconds). + */ + ByteTimeScaleFactor = 1, + }; + + async command error_t UartByte.receive[uint8_t client]( uint8_t* byte, uint8_t timeout_bt ) { + uint32_t startTime_bms; + uint32_t timeout_bms = ByteTimeScaleFactor * ((ByteTimesPerMillisecond + timeout_bt - 1) / ByteTimesPerMillisecond); + + error_t rv = checkIsOwner(client); + if (SUCCESS != rv) { + return rv; + } + if (! byte) { + return FAIL; + } + if (m_rx_buf) { + return EBUSY; + } + + startTime_bms = call LocalTime_bms.get(); + while (! (UCRXIFG & (call Usci.getIfg()))) { + if((call LocalTime_bms.get() - startTime_bms) > timeout_bms) { + return FAIL; + } + } + + *byte = call Usci.getRxbuf(); + return SUCCESS; + } + + async event void Interrupts.interrupted (uint8_t iv) { + uint8_t current_client = call ArbiterInfo.userId(); + if (0xFF == current_client) { + return; + } + if (USCI_UCRXIFG == iv) { + uint8_t stat = call Usci.getStat(); + uint8_t data = call Usci.getRxbuf(); + + /* + * SLAU259 16.3.6: Errors are cleared by reading UCAxRXD. Grab + * the old errors, read the incoming data, then read the errors + * again in case an overrun occurred between reading STATx and + * RXD. Mask off the bits we don't care about, and if there are + * any left on notify somebody. + */ + stat = MSP430_USCI_ERR_UCxySTAT & (stat | (call Usci.getStat())); + if (stat) { + signal Msp430UsciError.condition[current_client](stat); + } + if (m_rx_buf) { + m_rx_buf[m_rx_pos++] = data; + if (m_rx_len == m_rx_pos) { + uint8_t* rx_buf = m_rx_buf; + uint16_t rx_len = m_rx_len; + m_rx_buf = 0; + signal UartStream.receiveDone[current_client](rx_buf, rx_len, SUCCESS); + } + } else { + signal UartStream.receivedByte[current_client](data); + } + } else if (USCI_UCTXIFG == iv) { + nextStreamTransmit(current_client); + } + } + + default async command const msp430_usci_config_t* + Msp430UsciConfigure.getConfiguration[uint8_t client] () { + return &msp430_usci_uart_default_config; + } + + async command void ResourceConfigure.configure[uint8_t client] () { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[uint8_t client] () { + unconfigure_(); + } + + default async event void Msp430UsciError.condition[uint8_t client] (unsigned int errors) { } +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/README.txt b/tos/chips/msp430/x5xxx/usci-bf/README.txt new file mode 100644 index 0000000000..db6a345fab --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/README.txt @@ -0,0 +1,136 @@ +This directory contains support for the Universal Serial Controller +Interface as implemented on MSP430 chips in families 4xx, 5xx, and some +chips in the 2xx family. + +============================== + +@TODO@ There are at least three USCI implementations supported over the +MSP430 family. The implementations are distinguished by the functional +presence preproprocessor macro as defined in the TI standard headers from +Code Composer Studio distribution: + + __MSP430_HAS_USCI__ -- indicates the original USCI implementation on chips: + msp430x21x2 msp430x22x2 msp430x22x4 msp430x23x msp430x23x0 msp430x241x + msp430x24x msp430x24x1 msp430x26x msp430x41x2 msp430x471x6 msp430x471x7 + msp430x47x msp430x47x3 msp430x47x4 msp430xG46x msp430xG47x + + __MSP430_HAS_USCI_AB0__ -- second generation USCI implementation on chips: + msp430x241x msp430x24x msp430x24x1 msp430x26x msp430x471x6 msp430x471x7 + msp430x47x3 msp430x47x4 msp430x241x msp430x24x msp430x24x1 msp430x26x + msp430x471x6 msp430x471x7 msp430x47x3 msp430x47x4 + + The interrupt structure on these chips is significantly more complicated + than on the x5 chips. The various vectors are shared and don't really + make a whole lot of sense. The x5 is significantly cleaner. + + __MSP430_HAS_USCI_A0__, __MSP430_HAS_USCI_B0__ -- third generation USCI + implementation on chips: + cc430x513x cc430x612x cc430x613x msp430x54x msp430x54xA msp430x551x + msp430x552x + +It was once hypothesized that all USCI implementations could be supported by +this module by creating alternative HplMSP430UsciInterrupts*P components. A +second look implies this is not the case, but the appropriate abstractions +and architecture have not been identified. + +See tos/chips/msp430/00_Chip_Notes for more information. + +============================== + +There is a generic concept of a USCI module. Different chip families +support different types of module; these are denoted by a suffix letter +(e.g., USCI_Ax or USCI_Bx). The types of module differ by the functional +modes they support: USCI_Ax supports UART and SPI, while USCI_Bx supports +SPI and I2C. There can be any number of instances of a given module type on +a given chip; the MSP430x54xx chips support up to four each of USCI_Ax and +USCI_Bx. + +The legacy of the earliest MSP430 chips, and the need to support arbitrary +numbers of different modules, had made the original USART module a +maintenance nightmare, and the USCI module has been reworked from the ground +up. + +The 2nd gen of TI chips, MSP430X, implemented a USCI but didn't get it quite +right. Register access is non-uniform and the interrupt interface is +quite cumbersome. This is denoted by __MSP430_USCI_AB0__. It is problematic +to have one usci driver that supports both the x2 and x5 parts. + +The driver for the refactoring was elimination of duplicated code. +Since NesC does not support the level of genericity required to do this +within the language, one characteristic instance of each capability is +maintained, and the others are generated from it using the generate.sh +script. + +The list of files that are derived are maintained in the file generated.lst, +which itself is generated as a side effect of running generate.sh. When +attempting to understand the system and do basic maintainance, it may be +worth running: + + cat generated.lst | xargs rm + +to clear the clutter out of the way. + +Common USCI Support +------------------- + +The interface HplMsp430Usci supports the common control registers present +in both A and B modules. A corresponding HplMsp430UsciP provides a +generic implementation that is derived from the module base register +address. HplMsp430UsciC bundles this with TEP108-style resource +management, which is done on a whole-module basis rather than the per-mode +approach used in the original implementation. + +HplMsp430UsciInterrupts.nc specifies the USCI interrupts interface for +the MSP430XV2. Because interrupt handlers cannot be defined in generic +modules, HplMsp430UsciA0P.nc is a maintained non-generic module that +defines the interrupt vector. + +Msp430UsciA0P.nc is the maintained configuration implementation for +top-level USCI instances, linking the instantiated generic USCI +implementation with proper the non-generic interrupt implementation. + +Uart Mode Support +----------------- + +Msp430UsciP.nc is a maintained generic module that supports parameterized +versions of the standard UART interfaces, relative to an externally provided +USCI interface. + +Msp430UsciUartA0P.nc is the maintained non-generic configuration for the UART +capability on a specific module instance. Platform-specific configurations +should wire up the appropriate chip pins for URXD and UTXD. + +Msp430UsciUartA0C.nc is the maintained generic configuration that is used +by applications that need a UART client. + +SPI Mode Support +---------------- + +Msp430UsciSpiP.nc is a maintained generic module that supports +parameterized versions of the standard SPI interfaces, relative to an +externally provided USCI interface. + +For historical reasons, the maintained implementation for SPI is in files +Msp430UsciSpiB0P.nc and Msp430UsciSpiB0C.nc. Platform-specific +configurations should wire the appropriate chip pins to Msp430UsciSpiB0P. + +I2C Mode Support +---------------- + +I2C support added by Derek Baker (derek@red-slate.com) + +Added support for I2C master 7 bit addressing ~100khz/~400khz NONE interrupt driven, +tested on cc430F5137 with microchip 24lc1025 and Melexis MLX90614 thermometer. +I2CPacket.read, I2CPacket.write, I2CPacketreadDone, I2CPacketwriteDone +Bits taken from both PeoplePower and Z1 authors with thanks also to Eric Decker. + +Note / Gotcha + +When setting the address of the slave device remember you only need the 7 bits, most +devices datasheets show the address in a 8bit format, e.g 24lc1025 address is 0xA0, +this turns into 0x50, the 7 msb's right shifted one, the read/right bit is added by +the UART when you select the read/write function of the UART in I2C mode. + +When writing to a device multiple time, check the data sheet for write times, you +need to give the device time to commit before you write again else the I2CPacket.write +will FAIL. diff --git a/tos/chips/msp430/x5xxx/usci-bf/generate.sh b/tos/chips/msp430/x5xxx/usci-bf/generate.sh new file mode 100755 index 0000000000..bfd4377b30 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/generate.sh @@ -0,0 +1,76 @@ +#!/bin/sh +# +# Given implementations for USCI_A0 and USCI_B0, generate equivalent +# configurations for the higher-numbered module instances. +# +# Much of the USCI implementation is identical except for varying +# based on the instance number of the module to which a component +# belongs. To avoid implementation divergence, we maintain and evolve +# only one of each type of component, and generate the remainder from +# that template. +# +# @author Peter A. Bigot +# @author Eric B. Decker +# +# UART is implemented in USCI_A modules +# I2C is implemented in USCI_B modules +# SPI is implemented in USCI_A and USCI_B modules + +# List of tags for USCI_Ax modules. A0 is the master for A +# modules and Uart. + +A_MODULES='A0 A1 A2 A3' + +# List of tags for USCI_Ax modules. B0 is the master for B +# modules and Spi (B and A) and I2C modules. + +B_MODULES='B0 B1 B2 B3' + +# Initialize a file that will contain a list of all generated files, +# so we can remove them during basic maintenance. Their presence +# clutters the directory and makes it difficult to see what's really +# important. + +rm -f generated.lst + +clone_module () { + source="$1" ; shift + target="$1" ; shift + basis="$1" ; shift + clone="$1" ; shift + ( cat< ${target} + echo ${target} >> generated.lst +} + +# The base USCI module capability is independent of module type; +# we use A0 as the template. +for m in ${A_MODULES} ${B_MODULES} ; do + if [ A0 = "${m}" ] ; then + continue + fi + clone_module HplMsp430UsciInterruptsA0P.nc "HplMsp430UsciInterrupts${m}P.nc" A0 "${m}" + clone_module Msp430UsciA0P.nc "Msp430Usci${m}P.nc" A0 "${m}" +done + +# Clone the mode-specific configurations for a given module type +clone_mode_modules () { + mode="${1}" ; shift + basis="${1}" ; shift + for source in Msp430Usci${mode}${basis}?.nc ; do + for clone in "${@}" ; do + target=`echo ${source} | sed -e "s@${basis}@${clone}@g"` + clone_module ${source} ${target} ${basis} ${clone} + done + done +} + +# Clone the mode-specific configurations +clone_mode_modules Uart ${A_MODULES} +clone_mode_modules Spi ${B_MODULES} ${A_MODULES} +clone_mode_modules I2C ${B_MODULES} diff --git a/tos/chips/msp430/x5xxx/usci-bf/generated.lst b/tos/chips/msp430/x5xxx/usci-bf/generated.lst new file mode 100644 index 0000000000..0ac13716b1 --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/generated.lst @@ -0,0 +1,40 @@ +HplMsp430UsciInterruptsA1P.nc +Msp430UsciA1P.nc +HplMsp430UsciInterruptsA2P.nc +Msp430UsciA2P.nc +HplMsp430UsciInterruptsA3P.nc +Msp430UsciA3P.nc +HplMsp430UsciInterruptsB0P.nc +Msp430UsciB0P.nc +HplMsp430UsciInterruptsB1P.nc +Msp430UsciB1P.nc +HplMsp430UsciInterruptsB2P.nc +Msp430UsciB2P.nc +HplMsp430UsciInterruptsB3P.nc +Msp430UsciB3P.nc +Msp430UsciUartA1C.nc +Msp430UsciUartA2C.nc +Msp430UsciUartA3C.nc +Msp430UsciUartA1P.nc +Msp430UsciUartA2P.nc +Msp430UsciUartA3P.nc +Msp430UsciSpiB1C.nc +Msp430UsciSpiB2C.nc +Msp430UsciSpiB3C.nc +Msp430UsciSpiA0C.nc +Msp430UsciSpiA1C.nc +Msp430UsciSpiA2C.nc +Msp430UsciSpiA3C.nc +Msp430UsciSpiB1P.nc +Msp430UsciSpiB2P.nc +Msp430UsciSpiB3P.nc +Msp430UsciSpiA0P.nc +Msp430UsciSpiA1P.nc +Msp430UsciSpiA2P.nc +Msp430UsciSpiA3P.nc +Msp430UsciI2CB1C.nc +Msp430UsciI2CB2C.nc +Msp430UsciI2CB3C.nc +Msp430UsciI2CB1P.nc +Msp430UsciI2CB2P.nc +Msp430UsciI2CB3P.nc diff --git a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h new file mode 100644 index 0000000000..3e49eeae9f --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h @@ -0,0 +1,134 @@ +#ifndef _H_Msp430Usci_h +#define _H_Msp430Usci_h + +#include "msp430hardware.h" + +/* MSP430_USCI_RESOURCE is used for USCI_IDs */ +#define MSP430_USCI_RESOURCE "Msp430Usci.Resource" + +#define MSP430_USCI_A0_RESOURCE "Msp430Usci.A0.Resource" +#define MSP430_USCI_B0_RESOURCE "Msp430Usci.B0.Resource" +#define MSP430_USCI_A1_RESOURCE "Msp430Usci.A1.Resource" +#define MSP430_USCI_B1_RESOURCE "Msp430Usci.B1.Resource" +#define MSP430_USCI_A2_RESOURCE "Msp430Usci.A2.Resource" +#define MSP430_USCI_B2_RESOURCE "Msp430Usci.B2.Resource" +#define MSP430_USCI_A3_RESOURCE "Msp430Usci.A3.Resource" +#define MSP430_USCI_B3_RESOURCE "Msp430Usci.B3.Resource" + +enum { + MSP430_USCI_Inactive, + MSP430_USCI_UART, + MSP430_USCI_SPI, + MSP430_USCI_I2C, +}; + +/** + * Aggregates basic configuration registers for an MSP430 USCI. + * These are specifically the registers common to all configurations. + * Mode-specific configuration data should be provided elsewise. + */ +typedef struct msp430_usci_config_t { + uint8_t ctl0; /* most significant, order swapped */ + uint8_t ctl1; + uint8_t br1; /* most significant */ + uint8_t br0; + uint8_t mctl; + uint16_t i2coa; +} msp430_usci_config_t; + + +//see note in Msp430UsciI2CP.nc I2CBasicAddr.read +#define I2C_ONE_BYTE_READ_COUNTER 0x500 + + +#ifndef TOS_DEFAULT_BAUDRATE +#define TOS_DEFAULT_BAUDRATE 115200 +#endif /* TOS_DEFAULT_BAUDRATE */ + + +/* + * This table assumes UART clock input (SMCLK) is 1MiHz (2^20Hz). + */ + +msp430_usci_config_t msp430_usci_uart_default_config = { + /* N81 UART mode driven by SMCLK */ + ctl0 : 0, /* note order flipped */ + ctl1 : UCSSEL_SMCLK, + +#if 9600 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 9600: UBR=109, BRS=2, BRF=0 */ + br1 : 0, + br0 : 109, // 9600 + mctl : UCBRF_0 + UCBRS_2, +#elif 19200 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 19200: UBR=54, BRS=2, BRF=0 */ + br1 : 0, + br0 : 54, // 19200 + mctl : UCBRF_0 + UCBRS_2, +#elif 38400 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 38400: UBR=27, BRS=2, BRF=0 */ + br1 : 0, + br0 : 27, // 38400 + mctl : UCBRF_0 + UCBRS_2, +#elif 57600 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 57600: UBR=18, BRS=1, BRF=0 */ + br1 : 0, + br0 : 18, // 57600 + mctl : UCBRF_0 + UCBRS_1, +#elif 115200 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 115200: UBR=9, BRS=1, BRF=0 */ + br1 : 0, + br0 : 9, // 115200 + mctl : UCBRF_0 + UCBRS_1, +#else +#warning Unrecognized value for TOS_DEFAULT_BAUDRATE, using 115200 + br1 : 0, + br0 : 9, // 115200 + mctl : UCBRF_0 + UCBRS_1, +#endif + i2c0a : 0 +}; + +msp430_usci_config_t msp430_usci_spi_default_config = { + /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ + ctl0 : (UCCKPL + UCMSB + UCMST + UCSYNC), + ctl1 : UCSSEL__SMCLK, + /* 2x Prescale */ + br1 : 0, + br0 : 2, + mctl : 0, /* Always 0 in SPI mode */ + i2coa : 0 +}; + +enum { + /** Bit set in Msp430UsciError.condition parameter when a framing + * error (UART) or bus conflict (SPI) has been detected. Applies in + * UART mode, and SPI 4-wire master mode. */ + MSP430_USCI_ERR_Framing = UCFE, + /** Bit set in Msp430UsciError.condition parameter when an overrun + * error (lost character on input) has been detected. Applies in + * UART and SPI modes. */ + MSP430_USCI_ERR_Overrun = UCOE, + /** Bit set in Msp430UsciError.condition parameter when a parity + * error has been detected. Applies in UART mode. */ + MSP430_USCI_ERR_Parity = UCPE, + /** Mask for all UCxySTAT bits that represent reportable errors. */ + MSP430_USCI_ERR_UCxySTAT = MSP430_USCI_ERR_Framing | MSP430_USCI_ERR_Overrun | MSP430_USCI_ERR_Parity, +}; + + +/* + * I2C default config, added by Derek Baker (derek@red-slate.com) + */ + +msp430_usci_config_t msp430_usci_i2c_default_config = { + /* 7 bit addressing single I2C master driven by SMCLK */ + ctl0 : (UCMST | UCMODE_3 | UCSYNC), + ctl1 : UCSSEL__SMCLK, + br1 : 0, + br0 : 10, /* gives us 103680 hz, slow speed but will work with all devices.*/ + mctl : 0, /* Not used in I2C mode*/ + i2coa : 'a' +}; + +#endif // _H_Msp430Usci_h diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc index 4f32650887..3b28467487 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430Usci.nc @@ -54,7 +54,6 @@ * * @author Peter A. Bigot * @author Derek Baker - * I2C support * @author Eric B. Decker */ diff --git a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc index 3dc476ce87..4d64809af8 100644 --- a/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci/HplMsp430UsciP.nc @@ -47,7 +47,6 @@ * * @author Peter A. Bigot * @author Derek Baker - * I2C support */ generic module HplMsp430UsciP( diff --git a/tos/chips/msp430/x5xxx/usci/msp430usci.h b/tos/chips/msp430/x5xxx/usci/msp430usci.h index 6c667b0aad..bc81b3d92d 100644 --- a/tos/chips/msp430/x5xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci/msp430usci.h @@ -3,7 +3,7 @@ #include "msp430hardware.h" -/* when would this ever get used? */ +/* MSP430_USCI_RESOURCE is used for USCI_IDs */ #define MSP430_USCI_RESOURCE "Msp430Usci.Resource" #define MSP430_USCI_A0_RESOURCE "Msp430Usci.A0.Resource" From f8a20b388652bd7797d0ebab8326218e3a937696 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 22 May 2012 20:57:15 -0700 Subject: [PATCH 261/411] msp430 [bf]: regularize msp430usci.h between x5 and x2 make x2xxx/usci-bf/msp430usci.h and x5xxx version reasonably similar. We want to try to keep them the same. --- tos/chips/msp430/x2xxx/usci-bf/msp430usci.h | 70 ++++++++----- tos/chips/msp430/x5xxx/usci-bf/msp430usci.h | 104 +++++++++++--------- 2 files changed, 105 insertions(+), 69 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h index c9045571cd..0a281f83b7 100644 --- a/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h +++ b/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h @@ -3,6 +3,20 @@ #include "msp430hardware.h" +#ifndef UCSSEL__SMCLK +/* + * Both the x2 and x5 families have UCSIs and need a clock source. + * The x5 cpu header files define UCSSEL__SMCLK but the x2 headers + * don't (please TI, can you be more consistent?... nah. that's + * fine, we'll deal) + * + * Note: this is x2xxx/usci/msp430usci.h and is inherently a + * x2 file. + */ +#define UCSSEL__SMCLK (0x80) /* USCI 0 Clock Source: SMCLK */ +#endif + +/* MSP430_USCI_RESOURCE is used for USCI_IDs */ #define MSP430_USCI_RESOURCE "Msp430Usci.Resource" #define MSP430_USCI_A0_RESOURCE "Msp430Usci.A0.Resource" @@ -27,49 +41,61 @@ enum { * Mode-specific configuration data should be provided elsewise. */ typedef struct msp430_usci_config_t { - uint8_t ctl0; - uint8_t ctl1; - uint8_t br0; - uint8_t br1; + uint8_t ctl0; /* various control bits, msb */ + uint8_t ctl1; /* clock select and swreset, lsb */ + uint8_t br0; /* lsb divider */ + uint8_t br1; /* msb divider */ uint8_t mctl; uint16_t i2coa; } msp430_usci_config_t; -//see note in Msp430UsciI2CP.nc I2CBasicAddr.read -#define I2C_ONE_BYTE_READ_COUNTER 0xE00 +// see note in Msp430UsciI2CP.nc I2CBasicAddr.read +// x5 uses 0x500, x2 uses 0xe00 can they be the same? +#define I2C_ONE_BYTE_READ_COUNTER 0x0E00 #ifndef TOS_DEFAULT_BAUDRATE #define TOS_DEFAULT_BAUDRATE 115200 #endif /* TOS_DEFAULT_BAUDRATE */ + +/* + * The following default configurations assume SMCLK clock is 1MiHz (2^20Hz). + */ + msp430_usci_config_t msp430_usci_uart_default_config = { /* N81 UART mode driven by SMCLK */ ctl0 : 0, - ctl1 : UCSSEL_SMCLK, + ctl1 : UCSSEL__SMCLK, /* SLAU259 Table 16-4 2^20Hz 115200: UBR=9, BRS=1, BRF=0 */ - br0 : 9, // 115200 - br1 : 0, - mctl : UCBRF_0 + UCBRS_1 + br0 : 9, + br1 : 0, + mctl : UCBRF_0 | UCBRS_1, + i2coa: 0 }; msp430_usci_config_t msp430_usci_spi_default_config = { /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ - ctl0 : UCSSEL_SMCLK, - ctl1 : UCCKPL | UCMSB | UCMST | UCSYNC, - /* 2x Prescale */ - br0 : 2, - br1 : 0, - mctl : 0 /* Always 0 in SPI mode */ + ctl0 : UCCKPL | UCMSB | UCMST | UCSYNC, + ctl1 : UCSSEL__SMCLK, + br0 : 2, /* 2x Prescale */ + br1 : 0, + mctl : 0, + i2coa: 0 }; +// Should the default be the following? MM (multi-master) seems +// like it should be a platform specific thing. +// ctl0 : (UCMST | UCMODE_3 | UCSYNC), + msp430_usci_config_t msp430_usci_i2c_default_config = { - ctl0: UCSYNC|UCMODE_3|UCMM, - ctl1: UCSSEL_2, - br0: 0x08, - br1: 0x00, - mctl: 0x00, - i2coa: 'A', + /* 7 bit addressing single I2C master driven by SMCLK */ + ctl0 : UCSYNC | UCMODE_3 | UCMM, + ctl1 : UCSSEL__SMCLK, + br0 : 10, /* 104857 hz, slow for slow devices. */ + br1 : 0, + mctl : 0, + i2coa: 0x41, }; enum { diff --git a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h index 3e49eeae9f..482dde05ab 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h @@ -3,6 +3,19 @@ #include "msp430hardware.h" +#ifndef UCSSEL__SMCLK +/* + * Both the x2 and x5 families have UCSIs and need a clock source. + * The x5 cpu header files define UCSSEL__SMCLK but the x2 headers + * don't (please TI, can you be more consistent?... nah. that's + * fine, we'll deal) + * + * Note: this is x2xxx/usci/msp430usci.h and is inherently a + * x2 file. + */ +#define UCSSEL__SMCLK (0x80) /* USCI 0 Clock Source: SMCLK */ +#endif + /* MSP430_USCI_RESOURCE is used for USCI_IDs */ #define MSP430_USCI_RESOURCE "Msp430Usci.Resource" @@ -28,18 +41,17 @@ enum { * Mode-specific configuration data should be provided elsewise. */ typedef struct msp430_usci_config_t { - uint8_t ctl0; /* most significant, order swapped */ - uint8_t ctl1; - uint8_t br1; /* most significant */ - uint8_t br0; - uint8_t mctl; + uint8_t ctl0; /* various control bits, msb */ + uint8_t ctl1; /* clock select and swreset, lsb */ + uint8_t br0; /* lsb divider */ + uint8_t br1; /* msb divider */ + uint8_t mctl; uint16_t i2coa; } msp430_usci_config_t; - -//see note in Msp430UsciI2CP.nc I2CBasicAddr.read -#define I2C_ONE_BYTE_READ_COUNTER 0x500 - +// see note in Msp430UsciI2CP.nc I2CBasicAddr.read +// x5 uses 0x500, x2 uses 0xe00 can they be the same? +#define I2C_ONE_BYTE_READ_COUNTER 0x0500 #ifndef TOS_DEFAULT_BAUDRATE #define TOS_DEFAULT_BAUDRATE 115200 @@ -47,57 +59,70 @@ typedef struct msp430_usci_config_t { /* - * This table assumes UART clock input (SMCLK) is 1MiHz (2^20Hz). + * The following default configurations assume SMCLK clock is 1MiHz (2^20Hz). */ msp430_usci_config_t msp430_usci_uart_default_config = { /* N81 UART mode driven by SMCLK */ - ctl0 : 0, /* note order flipped */ - ctl1 : UCSSEL_SMCLK, + ctl0 : 0, + ctl1 : UCSSEL__SMCLK, #if 9600 == TOS_DEFAULT_BAUDRATE /* SLAU259 Table 16-4 2^20Hz 9600: UBR=109, BRS=2, BRF=0 */ + br0 : 109, br1 : 0, - br0 : 109, // 9600 - mctl : UCBRF_0 + UCBRS_2, + mctl : UCBRF_0 | UCBRS_2, #elif 19200 == TOS_DEFAULT_BAUDRATE /* SLAU259 Table 16-4 2^20Hz 19200: UBR=54, BRS=2, BRF=0 */ + br0 : 54, br1 : 0, - br0 : 54, // 19200 - mctl : UCBRF_0 + UCBRS_2, + mctl : UCBRF_0 | UCBRS_2, #elif 38400 == TOS_DEFAULT_BAUDRATE /* SLAU259 Table 16-4 2^20Hz 38400: UBR=27, BRS=2, BRF=0 */ + br0 : 27, br1 : 0, - br0 : 27, // 38400 - mctl : UCBRF_0 + UCBRS_2, + mctl : UCBRF_0 | UCBRS_2, #elif 57600 == TOS_DEFAULT_BAUDRATE /* SLAU259 Table 16-4 2^20Hz 57600: UBR=18, BRS=1, BRF=0 */ + br0 : 18, br1 : 0, - br0 : 18, // 57600 - mctl : UCBRF_0 + UCBRS_1, + mctl : UCBRF_0 | UCBRS_1, #elif 115200 == TOS_DEFAULT_BAUDRATE /* SLAU259 Table 16-4 2^20Hz 115200: UBR=9, BRS=1, BRF=0 */ + br0 : 9, br1 : 0, - br0 : 9, // 115200 - mctl : UCBRF_0 + UCBRS_1, + mctl : UCBRF_0 | UCBRS_1, #else #warning Unrecognized value for TOS_DEFAULT_BAUDRATE, using 115200 + br0 : 9, br1 : 0, - br0 : 9, // 115200 - mctl : UCBRF_0 + UCBRS_1, + mctl : UCBRF_0 | UCBRS_1, #endif - i2c0a : 0 + i2coa: 0 }; msp430_usci_config_t msp430_usci_spi_default_config = { /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ - ctl0 : (UCCKPL + UCMSB + UCMST + UCSYNC), - ctl1 : UCSSEL__SMCLK, - /* 2x Prescale */ - br1 : 0, - br0 : 2, - mctl : 0, /* Always 0 in SPI mode */ - i2coa : 0 + ctl0 : UCCKPL | UCMSB | UCMST | UCSYNC, + ctl1 : UCSSEL__SMCLK, + br0 : 2, /* 2x Prescale */ + br1 : 0, + mctl : 0, + i2coa: 0 +}; + +// Should the default be the following? MM (multi-master) seems +// like it should be a platform specific thing. +// ctl0 : (UCMST | UCMODE_3 | UCSYNC), + +msp430_usci_config_t msp430_usci_i2c_default_config = { + /* 7 bit addressing single I2C master driven by SMCLK */ + ctl0 : UCSYNC | UCMODE_3 | UCMM, + ctl1 : UCSSEL__SMCLK, + br0 : 10, /* 104857 hz, slow for slow devices. */ + br1 : 0, + mctl : 0, + i2coa: 0x41, }; enum { @@ -116,19 +141,4 @@ enum { MSP430_USCI_ERR_UCxySTAT = MSP430_USCI_ERR_Framing | MSP430_USCI_ERR_Overrun | MSP430_USCI_ERR_Parity, }; - -/* - * I2C default config, added by Derek Baker (derek@red-slate.com) - */ - -msp430_usci_config_t msp430_usci_i2c_default_config = { - /* 7 bit addressing single I2C master driven by SMCLK */ - ctl0 : (UCMST | UCMODE_3 | UCSYNC), - ctl1 : UCSSEL__SMCLK, - br1 : 0, - br0 : 10, /* gives us 103680 hz, slow speed but will work with all devices.*/ - mctl : 0, /* Not used in I2C mode*/ - i2coa : 'a' -}; - #endif // _H_Msp430Usci_h From 5b5d314b7948e878069bd3192d8a369214d46337 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 25 May 2012 23:18:55 -0700 Subject: [PATCH 262/411] msp430 [bf]: fix typos in USCI (usci-bf) --- tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc index a9fbf29e16..47c56310f8 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc @@ -104,8 +104,8 @@ implementation { async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } async command uint16_t Usci.getBrw() { return UCmxBRW; } - async command uint8_t Usci.getBR0() { return UCmxBR0; } - async command uint8_t Usci.getBR1() { return UCmxBR1; } + async command uint8_t Usci.getBr0() { return UCmxBR0; } + async command uint8_t Usci.getBr1() { return UCmxBR1; } async command void Usci.setBrw(uint16_t v) { UCmxBRW = v; } async command void Usci.setBr0(uint8_t v) { UCmxBR0 = v; } @@ -181,10 +181,10 @@ implementation { if (! config) { return; } - UCMxCTL1 = config->ctl1 | UCSWRST; - UCMxCTL0 = config->ctl0; - UCMxBR1 = config->br1; - UCMxBR0 = config->br0; + UCmxCTL1 = config->ctl1 | UCSWRST; + UCmxCTL0 = config->ctl0; + UCmxBR1 = config->br1; + UCmxBR0 = config->br0; UCmxMCTL = config->mctl; UCmxI2COA = config->i2coa; if (!leave_in_reset) { From b8061c5553b5cbc5cc8505ce94afe56b16fb35c4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 26 May 2012 19:54:09 -0700 Subject: [PATCH 263/411] msp430 [bf]: I2c{sa,oa} should be I2C{sa,oa}, fix --- .../msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc | 38 +++++++++---------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc index 9921d79d22..1df3ad182d 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc @@ -97,8 +97,8 @@ implementation { //printf(" CTLW: %x\n\r", call Usci.getCtlw0()); //printf(" BRw: %x\n\r", call Usci.getBrw()); - printf(" OA: %x\n\r", call Usci.getI2coa()); - printf(" SA: %x\n\r", call Usci.getI2csa()); + printf(" OA: %x\n\r", call Usci.getI2Coa()); + printf(" SA: %x\n\r", call Usci.getI2Csa()); printf(" IE: %x\n\r", call Usci.getIe()); printf(" IFG: %x\n\r", call Usci.getIfg()); printf("---\n\r"); @@ -117,7 +117,7 @@ implementation { call SDA.selectModuleFunc(); //i2c-specific config - call Usci.setI2coa(config->i2coa); + call Usci.setI2Coa(config->i2coa); call Usci.leaveResetMode_(); //enable slave-start interrupt, clear the rest @@ -185,7 +185,7 @@ implementation { call Usci.leaveResetMode_(); // set slave address - call Usci.setI2csa(addr); + call Usci.setI2Csa(addr); //check bus status at the latest point possible. if ( call Usci.getStat() & UCBBUSY ){ @@ -281,9 +281,9 @@ implementation { //disable the rx interrupt call Usci.setIe(call Usci.getIe() & ~UCRXIE); if (counter > 0x01) { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2csa(), m_pos, m_buf ); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2Csa(), m_pos, m_buf ); } else { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2csa() , m_pos, m_buf ); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2Csa() , m_pos, m_buf ); } } } @@ -316,7 +316,7 @@ implementation { call Usci.leaveResetMode_(); // set slave address - call Usci.setI2csa(addr); + call Usci.setI2Csa(addr); //check bus status at the latest point possible. if ( call Usci.getStat() & UCBBUSY ){ @@ -335,7 +335,7 @@ implementation { /* is this a restart or a direct continuation */ else if (m_flags & I2C_RESTART) { // set slave address - call Usci.setI2csa(addr); + call Usci.setI2Csa(addr); /* UCTR - set transmit */ /* UCTXSTT - generate START condition */ @@ -390,9 +390,9 @@ implementation { call Usci.setIe(call Usci.getIe() & ~UCTXIE ); /* fail gracefully */ if (counter > 0x01) { - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2Csa(), m_len, m_buf ); } else{ - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2Csa(), m_len, m_buf ); } } else { //send the next char @@ -426,24 +426,24 @@ implementation { /***** Slave-mode functions ***/ command error_t I2CSlave.setOwnAddress[uint8_t client](uint16_t addr) { //retain UCGCEN bit - call Usci.setI2coa( (call Usci.getI2coa() & UCGCEN) | addr); + call Usci.setI2Coa( (call Usci.getI2Coa() & UCGCEN) | addr); return SUCCESS; } command error_t I2CSlave.enableGeneralCall[uint8_t client]() { - if (UCGCEN & (call Usci.getI2coa())) { + if (UCGCEN & (call Usci.getI2Coa())) { return EALREADY; } else { - call Usci.setI2coa(UCGCEN | (call Usci.getI2coa())); + call Usci.setI2Coa(UCGCEN | (call Usci.getI2Coa())); return SUCCESS; } } command error_t I2CSlave.disableGeneralCall[uint8_t client]() { - if (UCGCEN & ~(call Usci.getI2coa())) { + if (UCGCEN & ~(call Usci.getI2Coa())) { return EALREADY; } else { - call Usci.setI2coa(~UCGCEN & (call Usci.getI2coa())); + call Usci.setI2Coa(~UCGCEN & (call Usci.getI2Coa())); return SUCCESS; } } @@ -547,9 +547,9 @@ implementation { //another master addressed us as a slave. However, this should //manifest as an AL interrupt, not a NACK interrupt. if (call Usci.getCtl1() & UCTR) { - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); } else { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); } } @@ -563,9 +563,9 @@ implementation { //TODO: more descriptive error? I guess EBUSY is fair. if(lastAction == MASTER_WRITE) { - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2csa(), m_len, m_buf ); + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2Csa(), m_len, m_buf ); } else if(lastAction == MASTER_READ) { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2csa(), m_len, m_buf); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2Csa(), m_len, m_buf); } //once this returns, we should get another interrupt for STT From 37b8f01e530ee26577fdbe85f039af3059067b65 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 26 May 2012 19:55:17 -0700 Subject: [PATCH 264/411] msp430 [bf]: x5, UsciSpi/Uart, add ResourceRequested and UsciConfigure --- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc | 6 +++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc | 2 +- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc | 6 +++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc | 2 +- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc | 6 +++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc | 2 +- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc | 6 +++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc | 2 +- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc | 6 +++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc | 2 +- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc | 6 +++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc | 2 +- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc | 6 +++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc | 2 +- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc | 6 +++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc | 2 +- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc | 4 ++++ tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc | 4 ++++ tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc | 4 ++++ tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc | 4 ++++ 20 files changed, 64 insertions(+), 16 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc index ea79874157..1bc3cb7a59 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0C.nc @@ -1,7 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A0 */ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011-2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -47,11 +47,13 @@ generic configuration Msp430UsciSpiA0C() { provides { interface Resource; + interface ResourceRequested; interface SpiPacket; interface SpiBlock; interface SpiByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -60,12 +62,14 @@ implementation { components Msp430UsciA0P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciSpiA0P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; SpiBlock = SpiC.SpiBlock; SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; + Msp430UsciConfigure = SpiC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc index 59d3abbd04..b10e51f286 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA0P.nc @@ -18,8 +18,8 @@ configuration Msp430UsciSpiA0P { implementation { components Msp430UsciA0P as UsciC; - components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; SpiC.ArbiterInfo -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc index a8bfcf8b2f..3e19487674 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1C.nc @@ -1,7 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A1 */ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011-2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -47,11 +47,13 @@ generic configuration Msp430UsciSpiA1C() { provides { interface Resource; + interface ResourceRequested; interface SpiPacket; interface SpiBlock; interface SpiByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -60,12 +62,14 @@ implementation { components Msp430UsciA1P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciSpiA1P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; SpiBlock = SpiC.SpiBlock; SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; + Msp430UsciConfigure = SpiC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc index 9f4b0d7d18..d09d3a0e2f 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA1P.nc @@ -18,8 +18,8 @@ configuration Msp430UsciSpiA1P { implementation { components Msp430UsciA1P as UsciC; - components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; SpiC.ArbiterInfo -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc index 7d874a8c68..b9001590e3 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2C.nc @@ -1,7 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A2 */ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011-2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -47,11 +47,13 @@ generic configuration Msp430UsciSpiA2C() { provides { interface Resource; + interface ResourceRequested; interface SpiPacket; interface SpiBlock; interface SpiByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -60,12 +62,14 @@ implementation { components Msp430UsciA2P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciSpiA2P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; SpiBlock = SpiC.SpiBlock; SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; + Msp430UsciConfigure = SpiC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc index 0115bc5f63..8c4a8e47ab 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA2P.nc @@ -18,8 +18,8 @@ configuration Msp430UsciSpiA2P { implementation { components Msp430UsciA2P as UsciC; - components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; SpiC.ArbiterInfo -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc index 1c6b5455cb..c7e1b75b6d 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3C.nc @@ -1,7 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for A3 */ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011-2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -47,11 +47,13 @@ generic configuration Msp430UsciSpiA3C() { provides { interface Resource; + interface ResourceRequested; interface SpiPacket; interface SpiBlock; interface SpiByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -60,12 +62,14 @@ implementation { components Msp430UsciA3P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciSpiA3P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; SpiBlock = SpiC.SpiBlock; SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; + Msp430UsciConfigure = SpiC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc index 03eb70da2d..78cd92db62 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiA3P.nc @@ -18,8 +18,8 @@ configuration Msp430UsciSpiA3P { implementation { components Msp430UsciA3P as UsciC; - components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; SpiC.ArbiterInfo -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc index 8874d04da8..88263ae49f 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0C.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011-2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -45,11 +45,13 @@ generic configuration Msp430UsciSpiB0C() { provides { interface Resource; + interface ResourceRequested; interface SpiPacket; interface SpiBlock; interface SpiByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -58,12 +60,14 @@ implementation { components Msp430UsciB0P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciSpiB0P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; SpiBlock = SpiC.SpiBlock; SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; + Msp430UsciConfigure = SpiC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc index 296a1f827e..5054e11331 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB0P.nc @@ -16,8 +16,8 @@ configuration Msp430UsciSpiB0P { implementation { components Msp430UsciB0P as UsciC; - components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; SpiC.ArbiterInfo -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc index 1d7ec346e0..49aa621b60 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1C.nc @@ -1,7 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B1 */ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011-2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -47,11 +47,13 @@ generic configuration Msp430UsciSpiB1C() { provides { interface Resource; + interface ResourceRequested; interface SpiPacket; interface SpiBlock; interface SpiByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -60,12 +62,14 @@ implementation { components Msp430UsciB1P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciSpiB1P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; SpiBlock = SpiC.SpiBlock; SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; + Msp430UsciConfigure = SpiC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc index 23a00b80f0..f1e08e8b74 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB1P.nc @@ -18,8 +18,8 @@ configuration Msp430UsciSpiB1P { implementation { components Msp430UsciB1P as UsciC; - components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; SpiC.ArbiterInfo -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc index aa767c9cab..0a997a5482 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2C.nc @@ -1,7 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B2 */ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011-2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -47,11 +47,13 @@ generic configuration Msp430UsciSpiB2C() { provides { interface Resource; + interface ResourceRequested; interface SpiPacket; interface SpiBlock; interface SpiByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -60,12 +62,14 @@ implementation { components Msp430UsciB2P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciSpiB2P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; SpiBlock = SpiC.SpiBlock; SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; + Msp430UsciConfigure = SpiC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc index 93fc7b3549..9fa361ab6e 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB2P.nc @@ -18,8 +18,8 @@ configuration Msp430UsciSpiB2P { implementation { components Msp430UsciB2P as UsciC; - components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; SpiC.ArbiterInfo -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc index 49da8f3f0b..fab7f04d9a 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3C.nc @@ -1,7 +1,7 @@ /* DO NOT MODIFY * This file cloned from Msp430UsciSpiB0C.nc for B3 */ /* - * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2011-2012 Eric B. Decker * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -47,11 +47,13 @@ generic configuration Msp430UsciSpiB3C() { provides { interface Resource; + interface ResourceRequested; interface SpiPacket; interface SpiBlock; interface SpiByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -60,12 +62,14 @@ implementation { components Msp430UsciB3P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciSpiB3P as SpiC; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; SpiBlock = SpiC.SpiBlock; SpiByte = SpiC.SpiByte; Msp430UsciError = SpiC.Msp430UsciError; + Msp430UsciConfigure = SpiC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> SpiC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc index 911e43d54b..f043e01257 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiB3P.nc @@ -18,8 +18,8 @@ configuration Msp430UsciSpiB3P { implementation { components Msp430UsciB3P as UsciC; - components new Msp430UsciSpiP() as SpiC; + SpiC.Usci -> UsciC; SpiC.Interrupts -> UsciC.Interrupts[MSP430_USCI_SPI]; SpiC.ArbiterInfo -> UsciC; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc index 1fed90eaa6..612fb4ed54 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA0C.nc @@ -42,10 +42,12 @@ generic configuration Msp430UsciUartA0C() { provides { interface Resource; + interface ResourceRequested; interface UartStream; interface UartByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -54,11 +56,13 @@ implementation { components Msp430UsciA0P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciUartA0P as UartC; UartStream = UartC.UartStream[CLIENT_ID]; UartByte = UartC.UartByte[CLIENT_ID]; Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc index b28d5aef09..4009066c38 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA1C.nc @@ -44,10 +44,12 @@ generic configuration Msp430UsciUartA1C() { provides { interface Resource; + interface ResourceRequested; interface UartStream; interface UartByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -56,11 +58,13 @@ implementation { components Msp430UsciA1P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciUartA1P as UartC; UartStream = UartC.UartStream[CLIENT_ID]; UartByte = UartC.UartByte[CLIENT_ID]; Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc index 8b42664b74..b7fd656bf7 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA2C.nc @@ -44,10 +44,12 @@ generic configuration Msp430UsciUartA2C() { provides { interface Resource; + interface ResourceRequested; interface UartStream; interface UartByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -56,11 +58,13 @@ implementation { components Msp430UsciA2P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciUartA2P as UartC; UartStream = UartC.UartStream[CLIENT_ID]; UartByte = UartC.UartByte[CLIENT_ID]; Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc index f20d33fbe7..4866b9547f 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciUartA3C.nc @@ -44,10 +44,12 @@ generic configuration Msp430UsciUartA3C() { provides { interface Resource; + interface ResourceRequested; interface UartStream; interface UartByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure; } implementation { enum { @@ -56,11 +58,13 @@ implementation { components Msp430UsciA3P as UsciC; Resource = UsciC.Resource[CLIENT_ID]; + ResourceRequested = UsciC.ResourceRequested[CLIENT_ID]; components Msp430UsciUartA3P as UartC; UartStream = UartC.UartStream[CLIENT_ID]; UartByte = UartC.UartByte[CLIENT_ID]; Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartC.Msp430UsciConfigure[CLIENT_ID]; UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; } From 84d5f77621f785c25015b1a1542c8c518eb57234 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Mon, 25 Jun 2012 22:51:29 +0300 Subject: [PATCH 265/411] Added drive strength to gnode's dummy IO. --- tos/platforms/gnode/DummyGeneralIOC.nc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tos/platforms/gnode/DummyGeneralIOC.nc b/tos/platforms/gnode/DummyGeneralIOC.nc index d5abc79fd8..fdcf45de44 100644 --- a/tos/platforms/gnode/DummyGeneralIOC.nc +++ b/tos/platforms/gnode/DummyGeneralIOC.nc @@ -26,6 +26,9 @@ /** * Do-nothing GeneralIO/GpioInterrupt implementation. */ + +#include "msp430regtypes.h" + generic module DummyGeneralIOC(bool high) { provides { interface GeneralIO; @@ -112,5 +115,8 @@ implementation { async command error_t HplMsp430GeneralIO.setResistor(uint8_t mode) { return SUCCESS; } async command uint8_t HplMsp430GeneralIO.getResistor() { return MSP430_PORT_RESISTOR_OFF; } + + async command error_t HplMsp430GeneralIO.setDriveStrength(uint8_t mode){ return EINVAL;} + async command uint8_t HplMsp430GeneralIO.getDriveStrength(){ return MSP430_PORT_DRIVE_STRENGTH_INVALID;} } From 2916524fbdf76d8799a82fa16a65cded02dc978f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Wed, 1 Feb 2012 22:02:58 +0000 Subject: [PATCH 266/411] Update hardware.h and add msp430usci.h to platform code msp430usci.h in platform code contains platform specific ifdef switches for the UART baudrate --- tos/platforms/MoteISTx5/hardware.h | 50 +++---- .../MoteISTx5/hardware/usci/msp430usci.h | 126 ++++++++++++++++++ 2 files changed, 151 insertions(+), 25 deletions(-) create mode 100644 tos/platforms/MoteISTx5/hardware/usci/msp430usci.h diff --git a/tos/platforms/MoteISTx5/hardware.h b/tos/platforms/MoteISTx5/hardware.h index d825affaad..334c0d4e77 100755 --- a/tos/platforms/MoteISTx5/hardware.h +++ b/tos/platforms/MoteISTx5/hardware.h @@ -1,4 +1,5 @@ /* + * Copyright (c) 2011 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -32,6 +33,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Peter Bigot + * @author João Gonçalves */ #ifndef _H_hardware_h @@ -45,37 +47,35 @@ enum { TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, }; +//#define TOS_DEFAULT_BAUDRATE 9600 +#define TOS_DEFAULT_BAUDRATE 115200 + +/* uart is sourced by SMCLK that has 4MHz XTAL reference + * only works with 9600 and 115200 baudrates + * for other baudrates edit msp430usci.h + */ + +//#define UART_SMCLK_XTAL_4MHz +#define UART_SMCLK_XTAL_16MHz +//#define UART_SOURCE_REFOCLK +/* Use the 32kHz crystal or REFOCLK */ + +//Unlock for Special funcionality of PINS such as SPI + /* Use the PlatformAdcC component, and enable 8 pins */ -//#define ADC12_USE_PLATFORM_ADC 1 -//#define ADC12_PIN_AUTO_CONFIGURE 1 -//#define ADC12_PINS_AVAILABLE 8 +#define ADC12_USE_PLATFORM_ADC 1 +#define ADC12_PIN_AUTO_CONFIGURE 1 +#define ADC12_PINS_AVAILABLE 8 -/* @TODO@ Disable probe for XT1 support until the anomaly observed in - * apps/bootstrap/LocalTime is resolved. */ #ifndef PLATFORM_MSP430_HAS_XT1 #define PLATFORM_MSP430_HAS_XT1 1 #endif /* PLATFORM_MSP430_HAS_XT1 */ -// LEDs -TOSH_ASSIGN_PIN(RED_LED, 4, 7); -TOSH_ASSIGN_PIN(GREEN_LED, 4, 5); -TOSH_ASSIGN_PIN(YELLOW_LED, 4, 6); - -// CC2420 RADIO #defines -TOSH_ASSIGN_PIN(RADIO_CSN, 3, 0); -TOSH_ASSIGN_PIN(RADIO_VREF, 2, 6); -TOSH_ASSIGN_PIN(RADIO_RESET, 2, 5); -TOSH_ASSIGN_PIN(RADIO_FIFOP, 2, 3); -TOSH_ASSIGN_PIN(RADIO_SFD, 2, 1); -TOSH_ASSIGN_PIN(RADIO_GIO0, 5, 0); -TOSH_ASSIGN_PIN(RADIO_FIFO, 2, 2); -TOSH_ASSIGN_PIN(RADIO_GIO1, 5, 1); -TOSH_ASSIGN_PIN(RADIO_CCA, 2, 4); +#ifndef PLATFORM_MSP430_HAS_XT2 +#define PLATFORM_MSP430_HAS_XT2 1 +#endif /* PLATFORM_MSP430_HAS_XT2 */ -TOSH_ASSIGN_PIN(CC_FIFOP, 2, 3); -TOSH_ASSIGN_PIN(CC_FIFO, 2, 2); -TOSH_ASSIGN_PIN(CC_SFD, 2, 1); -TOSH_ASSIGN_PIN(CC_VREN, 2, 6); -TOSH_ASSIGN_PIN(CC_RSTN, 2, 5); +/* default DCO configuration */ +#define MSP430XV2_DCO_CONFIG MSP430XV2_DCO_2MHz_RSEL2 #endif // _H_hardware_h diff --git a/tos/platforms/MoteISTx5/hardware/usci/msp430usci.h b/tos/platforms/MoteISTx5/hardware/usci/msp430usci.h new file mode 100644 index 0000000000..6911e7ed30 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/usci/msp430usci.h @@ -0,0 +1,126 @@ +#ifndef _H_Msp430Usci_h +#define _H_Msp430Usci_h + +#include "msp430hardware.h" + +#define MSP430_USCI_RESOURCE "Msp430Usci.Resource" + +#define MSP430_USCI_A0_RESOURCE "Msp430Usci.A0.Resource" +#define MSP430_USCI_B0_RESOURCE "Msp430Usci.B0.Resource" +#define MSP430_USCI_A1_RESOURCE "Msp430Usci.A1.Resource" +#define MSP430_USCI_B1_RESOURCE "Msp430Usci.B1.Resource" +#define MSP430_USCI_A2_RESOURCE "Msp430Usci.A2.Resource" +#define MSP430_USCI_B2_RESOURCE "Msp430Usci.B2.Resource" +#define MSP430_USCI_A3_RESOURCE "Msp430Usci.A3.Resource" +#define MSP430_USCI_B3_RESOURCE "Msp430Usci.B3.Resource" + +enum { + MSP430_USCI_Inactive, + MSP430_USCI_UART, + MSP430_USCI_SPI, + MSP430_USCI_I2C, +}; + +/** + * Aggregates basic configuration registers for an MSP430 USCI. + * These are specifically the registers common to all configurations. + * Mode-specific configuration data should be provided elsewise. + */ +typedef struct msp430_usci_config_t { + uint16_t ctlw0; + uint16_t brw; + uint8_t mctl; +} msp430_usci_config_t; + +#ifndef TOS_DEFAULT_BAUDRATE +#define TOS_DEFAULT_BAUDRATE 115200 +#endif /* TOS_DEFAULT_BAUDRATE */ + +msp430_usci_config_t msp430_usci_uart_default_config = { + /* N81 UART mode driven by SMCLK */ + +#ifdef UART_SOURCE_REFOCLK + ctlw0 : (0 << 8) | UCSSEL__ACLK, +#else + ctlw0 : (0 << 8) | UCSSEL__SMCLK, +#endif + +#ifdef UART_SOURCE_REFOCLK +#if 9600 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 9600: UBR=3, BRS=3, BRF=0 */ + brw : 3, // 9600 + mctl : UCBRF_0 + UCBRS_3 +#endif +#elif 9600 == TOS_DEFAULT_BAUDRATE +#if defined (UART_SMCLK_XTAL_4MHz) || defined(UART_SMCLK_XTAL_16MHz) + brw : 104, // 9600 + mctl : UCBRF_0 + UCBRS_1 +#else + /* SLAU259 Table 16-4 2^20Hz 9600: UBR=109, BRS=2, BRF=0 */ + brw : 109, // 9600 + mctl : UCBRF_0 + UCBRS_2 +#endif +#elif 19200 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 19200: UBR=54, BRS=2, BRF=0 */ + brw : 54, // 19200 + mctl : UCBRF_0 + UCBRS_2 +#elif 38400 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 38400: UBR=27, BRS=2, BRF=0 */ + brw : 27, // 38400 + mctl : UCBRF_0 + UCBRS_2 +#elif 57600 == TOS_DEFAULT_BAUDRATE + /* SLAU259 Table 16-4 2^20Hz 57600: UBR=18, BRS=1, BRF=0 */ + brw : 18, // 57600 + mctl : UCBRF_0 + UCBRS_1 +#elif 115200 == TOS_DEFAULT_BAUDRATE +#if defined (UART_SMCLK_XTAL_4MHz) || defined(UART_SMCLK_XTAL_16MHz) + brw : 8, // 115200 + mctl : UCBRF_0 + UCBRS_6 +#else + /* SLAU259 Table 16-4 2^20Hz 115200: UBR=9, BRS=1, BRF=0 */ + brw : 9, // 115200 + mctl : UCBRF_0 + UCBRS_1 +#endif +#else +#warning Unrecognized value for TOS_DEFAULT_BAUDRATE, using 115200 + brw : 9, // 115200 + mctl : UCBRF_0 + UCBRS_1 +#endif +}; + +msp430_usci_config_t msp430_usci_spi_default_config = { + /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ + ctlw0 : ((UCCKPH + UCMSB + UCMST + UCSYNC) << 8) | UCSSEL__SMCLK, + /* 2x Prescale */ + brw : 2, + mctl : 0 /* Always 0 in SPI mode */ +}; + +enum { + /** Bit set in Msp430UsciError.condition parameter when a framing + * error (UART) or bus conflict (SPI) has been detected. Applies in + * UART mode, and SPI 4-wire master mode. */ + MSP430_USCI_ERR_Framing = UCFE, + /** Bit set in Msp430UsciError.condition parameter when an overrun + * error (lost character on input) has been detected. Applies in + * UART and SPI modes. */ + MSP430_USCI_ERR_Overrun = UCOE, + /** Bit set in Msp430UsciError.condition parameter when a parity + * error has been detected. Applies in UART mode. */ + MSP430_USCI_ERR_Parity = UCPE, + /** Mask for all UCxySTAT bits that represent reportable errors. */ + MSP430_USCI_ERR_UCxySTAT = MSP430_USCI_ERR_Framing | MSP430_USCI_ERR_Overrun | MSP430_USCI_ERR_Parity, +}; + +/* + * I2C default config, added by Derek Baker (derek@red-slate.com) + */ + +msp430_usci_config_t msp430_usci_i2c_default_config = { + /* 7 bit addressing single I2C master driven by SMCLK */ + ctlw0 : ((UCMST + UCMODE_3 + UCSYNC) << 8) | UCSSEL__SMCLK, + brw : 10, /* gives us 103680 hz, slow speed but will work with all devices.*/ + mctl : 0 /* Not used in I2C mode*/ +}; + +#endif // _H_Msp430Usci_h From caf5b2bcd814c6cccc784974e1579ca247f4e30a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Wed, 1 Feb 2012 22:07:06 +0000 Subject: [PATCH 267/411] Bring in timer changes from jg_old Add the Frequency Control Component The Msp430XV2ClockControlP overrides the one msp430/x5xxx/timer This needs a work around and the alternative initialization should be platform specific --- .../hardware/clock/Msp430FreqControlC.nc | 50 +++ .../hardware/clock/Msp430FreqControlP.nc | 283 ++++++++++++++++ .../hardware/clock/Msp430XV2ClockControlP.nc | 306 ++++++++++++++++++ .../hardware/clock/freq_control_const.h | 43 +++ 4 files changed, 682 insertions(+) create mode 100644 tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlC.nc create mode 100644 tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlP.nc create mode 100644 tos/platforms/MoteISTx5/hardware/clock/Msp430XV2ClockControlP.nc create mode 100644 tos/platforms/MoteISTx5/hardware/clock/freq_control_const.h diff --git a/tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlC.nc b/tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlC.nc new file mode 100644 index 0000000000..c7d4c587e0 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlC.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2011, João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +configuration Msp430FreqControlC { + provides{ + interface FreqControl; + } +} +implementation { + + components LedsC; + Msp430FreqControlP.Leds -> LedsC; + + components Msp430FreqControlP; + FreqControl = Msp430FreqControlP; + + components Msp430PmmC; + Msp430FreqControlP.Pmm -> Msp430PmmC; + +} diff --git a/tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlP.nc b/tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlP.nc new file mode 100644 index 0000000000..1cd892dae7 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlP.nc @@ -0,0 +1,283 @@ +/* + * Copyright (c) 2011, João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "freq_control_const.h" + +module Msp430FreqControlP @safe() { + provides { + interface FreqControl; + } + uses{ + interface Leds; + interface Pmm; + } +} implementation { + +const uint8_t FLLD_val [] = {1, 2, 4, 8, 16}; +const uint8_t FLLREFDIV_val [] = {1, 2, 4, 6, 8, 12}; + +const float dco0_max [] = {0.2, 0.36, 0.75, 1.51, 3.2, 6.0, 10.7, 19.6}; +const float dco31_min [] = {0.7, 1.47, 3.17, 6.07, 12.3, 23.7, 39.0, 60.0}; + + command uint8_t FreqControl.getFLLD(void){ + uint8_t flld; + atomic flld = ((UCSCTL2 & FLLD_BITS) >> 12); + if(flld > 4) + return 32; + return FLLD_val[flld]; + } + + command uint16_t FreqControl.getFLLN(void){ + atomic return (UCSCTL2 & FLLN_BITS); + } + + command uint8_t FreqControl.getFLLREFDIV(void){ + uint8_t fllrefdiv; + atomic fllrefdiv = (UCSCTL3 & FLLREFDIV); + if (fllrefdiv > 5) + return 16; + return FLLREFDIV_val[fllrefdiv]; + } + + command uint8_t FreqControl.getMCLKSource(){ + atomic return (UCSCTL4 & 0x0007); //mclk source bits + } + + command uint32_t FreqControl.getMCLKFreq(uint8_t source){ + /* + * The purpose is to return the freq value of whatever sources MCLK. + * Frequency value in kHz. + * Only DCOCLK and DCOCLKDIV is implemented. + */ + switch(source){ + case SELM__XT1CLK: + case SELM__VLOCLK: + case SELM__REFOCLK: + case SELM__DCOCLK: + return call FreqControl.getDCOFreq(FALSE); + case SELM__DCOCLKDIV:{ + return call FreqControl.getDCOFreq(TRUE); + } + case SELM__XT2CLK: + default:{ + printf("err: Can't Find MCLK source.\r\n"); + return 0; + } + } + return 0; + } + + command error_t FreqControl.setMCLKFreq(uint32_t value){ + uint32_t freq; + uint8_t source; + error_t result; + /* + * Before changing the frequency call setMinRequiredVCore(freq) + * and verify if we need to change the core voltage + */ + source = call FreqControl.getMCLKSource(); + freq = call FreqControl.getMCLKFreq(source); + + if(freq == value){ + //printf("#error: MCLK frequency is already: %d Hz.\r\n", (uint8_t)(freq/1000000)); + return FAIL; + } + + if(value > freq) + if(call Pmm.setMinRequiredVCore(value)!=SUCCESS) + return FAIL; + + switch (source) { + case SELM__XT1CLK: + printf("err: MCLK is sourced by XT1.\r\n"); + break; + case SELM__VLOCLK: + printf("err: MCLK is sourced by VLOCLK.\r\n"); + break; + case SELM__REFOCLK: + printf("err: MCLK is sourced by REFOCLK.\r\n"); + break; + case SELM__DCOCLK: + //printf("MCLK is sourced by DCOCLK.\r\n"); + result = call FreqControl.setDCOFreq(value, FALSE); + break; + case SELM__DCOCLKDIV: + //printf("MCLK is sourced by DCOCLKDIV.\r\n"); + result = call FreqControl.setDCOFreq(value, TRUE); + break; + case SELM__XT2CLK: + printf("err:MCLK is sourced by XT2CLK.\r\n"); + break; + default: + printf("err: Can't Find MCLK source.\r\n"); + return FAIL; + } + + if(value < freq){ + if(call Pmm.setMinRequiredVCore(value)!=SUCCESS) + { /* Do nothing, wont break anything besides waisting more energy */} + + } + return result; + } + + command uint32_t FreqControl.getDCOFreq(bool isdcoclkdiv){ + uint8_t fllrefdiv, flld; + uint16_t flln; + uint32_t freq, fllref; + flln = call FreqControl.getFLLN(); + flld = call FreqControl.getFLLD(); + fllrefdiv = call FreqControl.getFLLREFDIV(); + /* + * I'm assuming the FLL in enabled, so let's find what's it's source. + * Knowing the FLL reference one can calculate the DCO frequency: + * fDCOCLK = FLLD*(FLLN+1)*fFLLREF/FLLREFDIV + * fDCOCLKDIV = (FLLN+1)*fFLLREF/FLLREFDIV + * Only XT1 is implemented. + */ + switch(call FreqControl.getFLLsource()){ + case SELREF_0: + fllref=(uint32_t) XT1_FREQ; // 000 XT1CLK + break; + case SELREF_1: //001 Reserved for future use. Defaults to XT1CLK. + case SELREF_2: //010 REFOCLK + case SELREF_3: //011 Reserved for future use. Defaults to REFOCLK. + case SELREF_4: //100 Reserved for future use. Defaults to REFOCLK. + case SELREF_5: //101 XT2CLK when available, otherwise REFOCLK. + case SELREF_6: //110 Reserved for future use. XT2CLK when available, otherwise REFOCLK. + case SELREF_7: //111 No selection. For the 'F543x and 'F541x non-A versions only, this defaults to XT2CLK. + } + + if(isdcoclkdiv){ + freq = (flln+1)*fllref/fllrefdiv; + // printf("Actual DCO configuration:\nFLLN = %d\nFLLD = %d\nFLLREF frequency = %lu Hz\nFLLREFDIV = %d.\r\n", flln, flld, fllref, fllrefdiv); + // printf("\nActual DCOCLKDIV frequency is: %lu Hz.\r\n", freq); + return (freq); + } + + freq = flld*(flln+1)*fllref/fllrefdiv; + //printf("Actual DCO Configuration:\nFLLN = %d\nFLLD = %d\nFLLREF frequency = %lu Hz\nFLLREFDIV = %d.\r\n",flln, flld, fllref, fllrefdiv); + //printf("\nActual DCOCLK frequency is: %lu Hz.\r\n", freq); + return (freq); + } + + command error_t FreqControl.setDCORange(uint32_t value){ + bool rangefound = FALSE; + float ratio = 1.12; + uint8_t RSELx = 0; + uint8_t flld; + + flld = call FreqControl.getFLLD(); + + //printf("Actual RSELx is: %x.\n", UCSCTL1); + //printf("Searching RSELx for the frequency of %d MHz.\n", (uint8_t)(value/MHZ)); + + while(!rangefound){ + if((value >= (uint32_t)((dco0_max[RSELx]*ratio)*MHZ)) && (value < (uint32_t)((dco31_min[RSELx]/ratio)*MHZ))){ + rangefound = TRUE; + //printf("RSELx found. Use RSELx = %d!\n", RSELx); + } + else{ + RSELx++; + //printf("Try RSELx = %d...\n", RSELx); + } + } + UCSCTL1 &= 0xFF8E; //Clean DCORSEL bits and enable modulation + //printf("Cleaned UCSCTL1. It is now: %x.\n", UCSCTL1); + UCSCTL1 |= (RSELx<<4); // Set RSELx bits + + //printf("UCSCTL1 RSELx bits changed to: %x . \r\n", UCSCTL1); + //printf("For the desired DCOCLK frequency of: %d MHz. \r\n", (uint8_t)(value/MHZ)); + //printf("DCOCLKDIV is at: %d MHz. \r\n", (uint8_t)(value/(flld*MHZ))); + return SUCCESS; + } + + command error_t FreqControl.setDCOFreq(uint32_t value, bool isdcoclkdiv){ + uint8_t flld, fllrefdiv; + uint8_t count = 0; + /* + * Only XT1 as FLL reference is implemented. + * To find DCO config values do: (fFLLREFDIV*fDCO/fFFLLREF) - 1 + * Make a call to setDCORange to ajust the DCO range to the desired frequency + * Just going to find the FLLN value, use fFLLFREFDIV = 1 + */ + flld = call FreqControl.getFLLD(); + fllrefdiv = call FreqControl.getFLLREFDIV(); + if(isdcoclkdiv) + value = value * flld; // the DCOCLK is flld times bigger than DCOCLKDIV + switch(call FreqControl.getFLLsource()){ + uint32_t fllref; + case SELREF_0: + fllref = (uint32_t) XT1_FREQ; + atomic{ + __bis_SR_register(SR_SCG0); // Disable FLL control + if(call FreqControl.setDCORange(value) != SUCCESS){ + printf("err: Could not set new DCO range. \r\n"); + return FAIL; + } + //printf("\n\nSetting DCO Frequency to %d MHz.\nThe reference frequency is %lu Hz.\nFLLD is %d.\nFLLREFDIV is %d.\n\n", (uint16_t)(value/1000000), fllref, flld, fllrefdiv); + //printf("Going to change the FLLN to %d.\r\n\n", (uint16_t) (((value)*fllrefdiv/(fllref*flld)) - 1)); + + UCSCTL2 &= (~FLLN_BITS); + UCSCTL2 |= (uint16_t) (((value)*fllrefdiv/(fllref*flld)) - 1); + //printf("Wrote: %x to UCSCTL2.\r\n", UCSCTL2); + + __bic_SR_register(SR_SCG0); // Enable the FLL control loop + + // Loop until DCO fault flag is cleared. Ignore OFIFG, since it + // incorporates XT1 and XT2 fault detection. + do { + if(count == 5) + printf("err: Wait for DCO to settle...\r\n"); + else if(count == 10) + count = 0; + count++; + UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); + // Clear XT2,XT1,DCO fault flags + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while (UCSCTL7 & DCOFFG); // Test DCO fault flag + //printf("DCO OK!\r\n"); + } + + return SUCCESS; + default: + printf("err: cant find FLL source. \r\n"); + return FAIL; + } + return SUCCESS; + } + + command uint8_t FreqControl.getFLLsource(){ + atomic return (UCSCTL3 & FLLREF); + } +} diff --git a/tos/platforms/MoteISTx5/hardware/clock/Msp430XV2ClockControlP.nc b/tos/platforms/MoteISTx5/hardware/clock/Msp430XV2ClockControlP.nc new file mode 100644 index 0000000000..3013999748 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/clock/Msp430XV2ClockControlP.nc @@ -0,0 +1,306 @@ +/* + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Configuration for MSP430 Unified Clock System and Timer A modules. + * + * X5 (cc430f5137, msp430f5438, MSP430XV2 and friends). Assumed that + * T0A5 and T1A3 timers are available. T0A is used for 32KiHz and + * T1A is used for 1MiHz. + * + * @author Peter A. Bigot + * @author João Gonçalves + */ + +#include "hardware.h" +#include "Msp430XV2Dco.h" + +#if !defined(__MSP430_HAS_UCS__) && !defined(__MSP430_HAS_UCS_RF__) +#error "Msp430XV2ClockControlP: requires Unified Clock System" +#endif + +module Msp430XV2ClockControlP @safe() { + uses interface McuSleepEvents; + provides { + interface Msp430XV2ClockControl; + interface McuPowerOverride; + interface StdControl as InhibitUcs7WorkaroundControl; + } +} implementation { + + async command void Msp430XV2ClockControl.configureUnifiedClockSystem (int dco_config) { + uint16_t divs; + + atomic { + /* + * ACLK is to be set to XT1CLK, assumed to be 32KiHz (2^15Hz), + * falls back to REFOCLK if absent. + * + * DCO is to be set as configured. The clock divider is the + * minimum value of 2. + * + * MCLK is set to DCOCLKDIV, or half the DCO rate. + * + * SMLCK is set to DCOCLKDIV / N such that it has a value of ~ 1MiHz (2^20 Hz) + * + * The technique used here is cribbed from the TI Example programs + * for the CC430, cc430x613x_UCS_2.c. + */ + + /* Disable FLL control */ + __bis_SR_register(SR_SCG0); + + /* + * Use XT1CLK as the FLL input: if it isn't valid, the module + * will fall back to REFOCLK. Use FLLREFDIV value 1 (selected + * by bits 000) + */ + UCSCTL3 = SELREF__XT1CLK; + + /* + * The appropriate value for DCORSEL is obtained from the DCO + * Frequency table of the device datasheet. Find the DCORSEL + * value from that table where the minimum frequency with DCOx=31 + * is closest to your desired DCO frequency. + */ + UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx + + switch (dco_config) { + /* If unrecognized, default to the CC430 power-up value */ + case MSP430XV2_DCO_2MHz_RSEL2: + default: + UCSCTL1 = DCORSEL_2; + UCSCTL2 = FLLD_1 + 31; + divs = DIVS__1; + break; + case MSP430XV2_DCO_4MHz_RSEL3: + UCSCTL1 = DCORSEL_3; + UCSCTL2 = FLLD_1 + 63; + divs = DIVS__2; + break; + case MSP430XV2_DCO_8MHz_RSEL3: + UCSCTL1 = DCORSEL_3; + UCSCTL2 = FLLD_1 + 127; + divs = DIVS__4; + break; + case MSP430XV2_DCO_8MHz_RSEL4: + UCSCTL1 = DCORSEL_4; + UCSCTL2 = FLLD_1 + 127; + divs = DIVS__4; + break; + case MSP430XV2_DCO_16MHz_RSEL4: + UCSCTL1 = DCORSEL_4; + UCSCTL2 = FLLD_1 + 255; + divs = DIVS__8; + break; + case MSP430XV2_DCO_16MHz_RSEL5: + UCSCTL1 = DCORSEL_5; + UCSCTL2 = FLLD_1 + 255; + divs = DIVS__8; + break; + case MSP430XV2_DCO_32MHz_RSEL5: + UCSCTL1 = DCORSEL_5; + UCSCTL2 = FLLD_1 + 511; + divs = DIVS__16; + break; + case MSP430XV2_DCO_32MHz_RSEL6: + UCSCTL1 = DCORSEL_6; + UCSCTL2 = FLLD_1 + 511; + divs = DIVS__16; + break; + case MSP430XV2_DCO_64MHz_RSEL6: + UCSCTL1 = DCORSEL_6; + UCSCTL2 = FLLD_1 + 1023; + divs = DIVS__32; + break; + case MSP430XV2_DCO_64MHz_RSEL7: + UCSCTL1 = DCORSEL_7; + UCSCTL2 = FLLD_1 + 1023; + divs = DIVS__32; + break; + } + __bic_SR_register(SR_SCG0); // Enable the FLL control loop + +#ifdef notdef + /* No __delay_cycles intrinsic on MSPGCC (yet) */ + // Worst-case settling time for the DCO when the DCO range bits have been + // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx + // UG for optimization. + // 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle + __delay_cycles(250000); +#endif + + // Loop until DCO fault flag is cleared. Ignore OFIFG, since it + // incorporates XT1 and XT2 fault detection. + do { + UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); + // Clear XT2,XT1,DCO fault flags + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while (UCSCTL7 & DCOFFG); // Test DCO fault flag + + + #if defined(PLATFORM_MSP430_HAS_XT2) && (1 == PLATFORM_MSP430_HAS_XT2) + UCSCTL4 = SELA__REFOCLK | SELS__XT2CLK | SELM__DCOCLKDIV; + /* + * MoteISTx5 has 16MHz XTAL + * Divide 4MHz XTAL by 4 to get 1 MHz + */ + divs = DIVS_4; //1MHz + #else + /* Use REFOCLK for ACLK, and DCOCLKDIV for MCLK and SMCLK*/ + UCSCTL4 = SELA__REFOCLK | SELS__DCOCLKDIV | SELM__DCOCLKDIV; + #endif + + /* DIVPA routes ACLK to external pin, undivided + * DIVA uses ACLK at 2^15 Hz, undivided + * Default divs uses SMCLK at 2^20 Hz + * If there is XT2 of 32 MHz, divs = 5, divide by 32 to get 2^20 Hz + * DIVM (MCLK) uses DCOCLKDIV to produce DCO/2, undivided + */ + + + UCSCTL5 = DIVPA__1 | DIVA__1 | divs | DIVM__1; + } + } + + command void Msp430XV2ClockControl.configureTimers () { + atomic { + TA0CTL = TASSEL__ACLK | TACLR | MC__STOP | TAIE; + TA0R = 0; + TA1CTL = TASSEL__SMCLK | TACLR | MC__STOP | TAIE; + TA1R = 0; + } + } + + async command void Msp430XV2ClockControl.start32khzTimer () { + atomic TA0CTL = MC__CONTINOUS | (TA0CTL & ~(MC0|MC1)); + } + + async command void Msp430XV2ClockControl.stop32khzTimer () { + atomic TA0CTL = MC__STOP | (TA0CTL & ~(MC0|MC1)); + } + + async command bool Msp430XV2ClockControl.is32khzTimerRunning () { + atomic return (MC_STOP != (TA0CTL & ~(MC0|MC1))); + } + + async command void Msp430XV2ClockControl.startMicroTimer () { + atomic TA1CTL = MC__CONTINOUS | (TA1CTL & ~(MC0|MC1)); + } + + async command void Msp430XV2ClockControl.stopMicroTimer () { + atomic TA1CTL = MC__STOP | (TA1CTL & ~(MC0|MC1)); + } + + async command bool Msp430XV2ClockControl.isMicroTimerRunning () { + atomic return (MC_STOP != (TA1CTL & ~(MC0|MC1))); + } + + /* + * Support for UCS7 workaround. This chip erratum causes DCO + * drift if the MCU is not active for at least three reference + * count periods when coming out of LPM2 or higher. What we'll do + * is, if the last time we came out of sleep in such a mode isn't + * at least that long ago, go to sleep in LPM0 instead. This + * relies on TA0 being active and at the same rate as REFCLK, + * which it is. + * + * Validate the need for this using the LocalTime bootstrap program. + * Errors-per-thousand should remain zero if the workaround is + * effective, and is generally greater than 10 if not effective and + * the erratum is present in the chip. Alternatively, verify with + * SerialEcho and large incoming packets. (Disable the workaround + * by setting the minimum active duration value below to zero.) + * + * NB: The current implementation means that at most 50% of the time + * will be in a true low power mode; when the inter-wakeup duration + * is long, a whole period will be spent in LPM0 while it would be + * sufficient to wake up after three reference clock periods and + * re-enter sleep at a deeper level. To do so would require + * configuring a timer here, which is a bit too deep in the + * implementation. Applications that are particularly concerned + * about power may implement their own workaround, disabling this + * one through the InhibitUcs7WorkaroundControl interface. + */ + + enum { + /** UCS7 suggests waiting at least 3 reference clock periods + * before disabling FLL. */ + MinimumFLLActiveDuration_refclk = 3 + }; + + /** Set to TRUE to inhibit the UCS7 workaround code. */ + bool inhibitUCS7_; + + command error_t InhibitUcs7WorkaroundControl.start() { + atomic inhibitUCS7_ = TRUE; + return SUCCESS; + } + + command error_t InhibitUcs7WorkaroundControl.stop() { + atomic inhibitUCS7_ = FALSE; + return SUCCESS; + } + + /** TA0R value at the last wake-up which re-enabled FLL */ + uint16_t fllRestart_refclk; + + async command mcu_power_t McuPowerOverride.lowestState() { + mcu_power_t rv = MSP430_POWER_LPM4; + + if (! inhibitUCS7_) { + uint16_t now_refclk; + uint16_t fll_active_refclk; + atomic now_refclk = TA0R; + if (now_refclk >= fllRestart_refclk) { + fll_active_refclk = now_refclk - fllRestart_refclk; + } else { + fll_active_refclk = fllRestart_refclk - now_refclk; + } + if (MinimumFLLActiveDuration_refclk > fll_active_refclk) { + rv = MSP430_POWER_LPM0; + } + } + return rv; + } + + async event void McuSleepEvents.preSleep(mcu_power_t sleep_mode) { } + + async event void McuSleepEvents.postSleep(mcu_power_t sleep_mode) { + if (sleep_mode >= MSP430_POWER_LPM1) { + atomic fllRestart_refclk = TA0R; + } + } +} diff --git a/tos/platforms/MoteISTx5/hardware/clock/freq_control_const.h b/tos/platforms/MoteISTx5/hardware/clock/freq_control_const.h new file mode 100644 index 0000000000..354f67fe70 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/clock/freq_control_const.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +enum{ + FLLD_BITS = 0x7000, + FLLN_BITS = 0x03FF, + FLLREFDIV = 0x0007, + FLLREF = 0x0070, + XT1_FREQ = 32768UL, + MHZ = 1000000, +}; + From 259e677531844bff1e0df71793de8ce2a87ca821 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Wed, 1 Feb 2012 22:13:57 +0000 Subject: [PATCH 268/411] Bring in the pmm changes from jg_old Keep it in the platform code until better code comes into msp430/pmm to replace this Note: this is "attached" to the Frequency Control Component --- .../MoteISTx5/hardware/pmm/Msp430PmmC.nc | 51 +++ .../MoteISTx5/hardware/pmm/Msp430PmmP.nc | 299 ++++++++++++++++++ tos/platforms/MoteISTx5/hardware/pmm/Pmm.nc | 72 +++++ 3 files changed, 422 insertions(+) create mode 100644 tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmC.nc create mode 100644 tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmP.nc create mode 100644 tos/platforms/MoteISTx5/hardware/pmm/Pmm.nc diff --git a/tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmC.nc b/tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmC.nc new file mode 100644 index 0000000000..25790c8e4d --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmC.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Power Management Module + * + * @author David Moss + * @author Eric B. Decker + */ + +configuration Msp430PmmC { + provides interface Pmm; +} + +implementation { + components Msp430PmmP; + Pmm = Msp430PmmP; +} diff --git a/tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmP.nc b/tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmP.nc new file mode 100644 index 0000000000..6ea9acc3a3 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmP.nc @@ -0,0 +1,299 @@ +/* + * Copyright (c) 2011 João Gonçalves + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* *********************************************************** +* THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR +* REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY, +* INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS +* FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR +* COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE. +* TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET +* POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY +* INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR +* YOUR USE OF THE PROGRAM. +* +* IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL, +* CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY +* THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED +* OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT +* OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM. +* EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF +* REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS +* OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF +* USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S +* AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF +* YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS +* (U.S.$500). +* +* Unless otherwise stated, the Program written and copyrighted +* by Texas Instruments is distributed as "freeware". You may, +* only under TI's copyright in the Program, use and modify the +* Program without any charge or restriction. You may +* distribute to third parties, provided that you transfer a +* copy of this license to the third party and the third party +* agrees to these terms by its first use of the Program. You +* must reproduce the copyright notice and any other legend of +* ownership on each copy or partial copy, of the Program. +* +* You acknowledge and agree that the Program contains +* copyrighted material, trade secrets and other TI proprietary +* information and is protected by copyright laws, +* international copyright treaties, and trade secret laws, as +* well as other intellectual property laws. To protect TI's +* rights in the Program, you agree not to decompile, reverse +* engineer, disassemble or otherwise translate any object code +* versions of the Program to a human-readable form. You agree +* that in no event will you alter, remove or destroy any +* copyright notice included in the Program. TI reserves all +* rights not specifically granted under this license. Except +* as specifically provided herein, nothing in this agreement +* shall be construed as conferring by implication, estoppel, +* or otherwise, upon you, any license or other right under any +* TI patents, copyrights or trade secrets. +* +* You may not use the Program in non-TI devices. +* ********************************************************* */ + +#include + +#if !defined(__MSP430_HAS_PMM__) +#error "Msp430PmmP: processor not supported, need PMM" +#endif + +#define _HAL_PMM_DISABLE_SVML_ +#define _HAL_PMM_DISABLE_SVSL_ +#define _HAL_PMM_DISABLE_FULL_PERFORMANCE_ + +#define PMM_STATUS_OK SUCCESS +#define PMM_STATUS_ERROR FAIL + +//****************************************************************************// +#ifdef _HAL_PMM_DISABLE_SVML_ +#define _HAL_PMM_SVMLE SVMLE +#else +#define _HAL_PMM_SVMLE 0 +#endif +#ifdef _HAL_PMM_DISABLE_SVSL_ +#define _HAL_PMM_SVSLE SVSLE +#else +#define _HAL_PMM_SVSLE 0 +#endif +#ifdef _HAL_PMM_DISABLE_FULL_PERFORMANCE_ +#define _HAL_PMM_SVSFP SVSLFP +#else +#define _HAL_PMM_SVSFP 0 +#endif + +module Msp430PmmP { + provides interface Pmm; +} +implementation { + + +//****************************************************************************// +// Set VCore +//****************************************************************************// + + command error_t Pmm.setMinRequiredVCore(uint32_t freq){ + error_t err; + if(freq <= (8000000)){ + err=call Pmm.SetVCore(0); + } + + else if(((8000000) < freq) && (freq<= (12000000))){ + //printf("increasing PMM to 1 for the freq of %lu\n", freq); + err=call Pmm.SetVCore(1); + } + + else if(((12000) < freq) && (freq <= (20000000))){ + err=call Pmm.SetVCore(2); + } + + else if((20000000 < freq)){ + err=call Pmm.SetVCore(3); + } + + else + return FAIL; + + return err; + } + +//****************************************************************************// +// Set VCore +//****************************************************************************// +command error_t Pmm.SetVCore (uint8_t level){ + uint8_t actlevel; + error_t status = 0; + level &= PMMCOREV_3; // Set Mask for Max. level + actlevel = (PMMCTL0 & PMMCOREV_3); // Get actual VCore + + //printf("Actual VCore is %d. Changing to %d...\r\n", actlevel, level); + + while (((level != actlevel) && (status == 0)) || (level < actlevel)) // step by step increase or decrease + { + if (level > actlevel) + status = call Pmm.SetVCoreUp(++actlevel); + //printf("Vcore set up to %d, status is %d\n", actlevel, status); + if (level < actlevel) + status = call Pmm.SetVCoreDown(--actlevel); + } + + /*if (status == SUCCESS) + printf("%d, ", level); + else + printf("Could not change VCore to %d. Actual VCore remains %d. \r\n", level, actlevel);*/ + return status; +} + +//****************************************************************************// +// Set VCore Up +//****************************************************************************// +command error_t Pmm.SetVCoreUp (uint8_t level) +{ + uint8_t PMMRIE_backup,SVSMHCTL_backup; + + // Open PMM registers for write access + PMMCTL0_H = 0xA5; + + // Disable dedicated Interrupts to prevent that needed flags will be cleared + PMMRIE_backup = PMMRIE; + PMMRIE &= ~(SVSMHDLYIE | SVSMLDLYIE | SVMLVLRIE | SVMHVLRIE | SVMHVLRPE); + // Set SVM highside to new level and check if a VCore increase is possible + SVSMHCTL_backup = SVSMHCTL; + PMMIFG &= ~(SVMHIFG | SVSMHDLYIFG); + SVSMHCTL = SVMHE | SVMHFP | (SVSMHRRL0 * level); + // Wait until SVM highside is settled + while ((PMMIFG & SVSMHDLYIFG) == 0); + // Disable full-performance mode to save energy + SVSMHCTL &= ~_HAL_PMM_SVSFP ; + // Check if a VCore increase is possible + if ((PMMIFG & SVMHIFG) == SVMHIFG){ //-> Vcc is to low for a Vcore increase + printf("err: Vcc is to low for a Vcore increase\n"); + + // recover the previous settings + PMMIFG &= ~SVSMHDLYIFG; + SVSMHCTL = SVSMHCTL_backup; + // Wait until SVM highside is settled + while ((PMMIFG & SVSMHDLYIFG) == 0); + // Clear all Flags + PMMIFG &= ~(SVMHVLRIFG | SVMHIFG | SVSMHDLYIFG | SVMLVLRIFG | SVMLIFG | SVSMLDLYIFG); + // backup PMM-Interrupt-Register + PMMRIE = PMMRIE_backup; + + // Lock PMM registers for write access + PMMCTL0_H = 0x00; + return PMM_STATUS_ERROR; // return: voltage not set + } + // Set also SVS highside to new level //-> Vcc is high enough for a Vcore increase + SVSMHCTL |= SVSHE | (SVSHRVL0 * level); + // Set SVM low side to new level + SVSMLCTL = SVMLE | SVMLFP | (SVSMLRRL0 * level); + // Wait until SVM low side is settled + while ((PMMIFG & SVSMLDLYIFG) == 0); + // Clear already set flags + PMMIFG &= ~(SVMLVLRIFG | SVMLIFG); + // Set VCore to new level + PMMCTL0_L = PMMCOREV0 * level; + // Wait until new level reached + if (PMMIFG & SVMLIFG) + while ((PMMIFG & SVMLVLRIFG) == 0); + // Set also SVS/SVM low side to new level + PMMIFG &= ~SVSMLDLYIFG; + SVSMLCTL |= SVSLE | (SVSLRVL0 * level); + // wait for lowside delay flags + while ((PMMIFG & SVSMLDLYIFG) == 0); + +// Disable SVS/SVM Low +// Disable full-performance mode to save energy + SVSMLCTL &= ~(_HAL_PMM_DISABLE_SVSL_+_HAL_PMM_DISABLE_SVML_+_HAL_PMM_SVSFP ); + + // Clear all Flags + PMMIFG &= ~(SVMHVLRIFG | SVMHIFG | SVSMHDLYIFG | SVMLVLRIFG | SVMLIFG | SVSMLDLYIFG); + // backup PMM-Interrupt-Register + PMMRIE = PMMRIE_backup; + + // Lock PMM registers for write access + PMMCTL0_H = 0x00; + return PMM_STATUS_OK; // return: OK +} + +//****************************************************************************// +// Set VCore down (Independent from the enabled Interrupts in PMMRIE) +//****************************************************************************/ +command error_t Pmm.SetVCoreDown (uint8_t level) +{ + unsigned int PMMRIE_backup; + + // Open PMM registers for write access + PMMCTL0_H = 0xA5; + + // Disable dedicated Interrupts to prevent that needed flags will be cleared + PMMRIE_backup = PMMRIE; + PMMRIE &= ~(SVSMHDLYIE | SVSMLDLYIE | SVMLVLRIE | SVMHVLRIE | SVMHVLRPE); + + // Set SVM high side and SVM low side to new level + PMMIFG &= ~(SVMHIFG | SVSMHDLYIFG | SVMLIFG | SVSMLDLYIFG); + SVSMHCTL = SVMHE | SVMHFP | (SVSMHRRL0 * level); + SVSMLCTL = SVMLE | SVMLFP | (SVSMLRRL0 * level); + // Wait until SVM high side and SVM low side is settled + while ((PMMIFG & SVSMHDLYIFG) == 0 || (PMMIFG & SVSMLDLYIFG) == 0); + + // Set VCore to new level + PMMCTL0_L = PMMCOREV0 * level; + + // Set also SVS highside and SVS low side to new level + PMMIFG &= ~(SVSHIFG | SVSMHDLYIFG | SVSLIFG | SVSMLDLYIFG); + SVSMHCTL |= SVSHE | SVSHFP | (SVSHRVL0 * level); + SVSMLCTL |= SVSLE | SVSLFP | (SVSLRVL0 * level); + // Wait until SVS high side and SVS low side is settled + while ((PMMIFG & SVSMHDLYIFG) == 0 || (PMMIFG & SVSMLDLYIFG) == 0); + // Disable full-performance mode to save energy + SVSMHCTL &= ~_HAL_PMM_SVSFP; +// Disable SVS/SVM Low +// Disable full-performance mode to save energy + SVSMLCTL &= ~(_HAL_PMM_DISABLE_SVSL_+_HAL_PMM_DISABLE_SVML_+_HAL_PMM_SVSFP ); + + // Clear all Flags + PMMIFG &= ~(SVMHVLRIFG | SVMHIFG | SVSMHDLYIFG | SVMLVLRIFG | SVMLIFG | SVSMLDLYIFG); + // backup PMM-Interrupt-Register + PMMRIE = PMMRIE_backup; + // Lock PMM registers for write access + PMMCTL0_H = 0x00; + + if ((PMMIFG & SVMHIFG) == SVMHIFG) + return PMM_STATUS_ERROR; // Highside is still to low for the adjusted VCore Level + else return PMM_STATUS_OK; // Return: OK +} +} + diff --git a/tos/platforms/MoteISTx5/hardware/pmm/Pmm.nc b/tos/platforms/MoteISTx5/hardware/pmm/Pmm.nc new file mode 100644 index 0000000000..620d8b8b83 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/pmm/Pmm.nc @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2011 João Gonçalves + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +interface Pmm { + /** + * Set the voltage level of the MSP430x core + * 0x0 => DVcc > 1.8V + * 0x1 => DVcc > 2.0V + * 0x2 => DVcc > 2.2V + * 0x3 => DVcc > 2.4V + */ + +//==================================================================== +/** + * Set the minimum Vcore level for the desired frequency*/ + command error_t setMinRequiredVCore(uint32_t freq); + + +//==================================================================== +/** + * Set the VCore to a new level if it is possible*/ + + command error_t SetVCore (uint8_t level); + +//==================================================================== +/** + * Set the VCore to a higher level, if it is possible. + * Return a 1 if voltage at highside (Vcc) is to low + * for the selected Level (level).*/ + + command error_t SetVCoreUp (uint8_t level); + +//==================================================================== +/** + * Set the VCore to a lower level. + * Return a 1 if voltage at highside (Vcc) is still to low + * for the selected Level (level).*/ + + command error_t SetVCoreDown (uint8_t level); +} + + From 27c4048cd6b15afccfb59a1871dd66c37bff78ae Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Wed, 1 Feb 2012 23:13:32 +0000 Subject: [PATCH 269/411] Added Frequency Control interface --- .../MoteISTx5/hardware/clock/FreqControl.nc | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 tos/platforms/MoteISTx5/hardware/clock/FreqControl.nc diff --git a/tos/platforms/MoteISTx5/hardware/clock/FreqControl.nc b/tos/platforms/MoteISTx5/hardware/clock/FreqControl.nc new file mode 100644 index 0000000000..6a97ab7dfd --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/clock/FreqControl.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2011, João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +interface FreqControl{ + + command uint8_t getFLLD(void); + + command uint16_t getFLLN(void); + + command uint8_t getFLLREFDIV(void); + + command uint8_t getMCLKSource(void); + + command uint32_t getMCLKFreq(uint8_t source); + + command error_t setMCLKFreq(uint32_t value); + + command uint32_t getDCOFreq(uint8_t isdcoclkdiv); + + command error_t setDCORange(uint32_t value); + + command error_t setDCOFreq(uint32_t value, bool isdcoclkdiv); + + command uint8_t getFLLsource(void); + +} From 29b1b6573b20f46a84be0db25635b00f38f578d2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Wed, 1 Feb 2012 23:14:21 +0000 Subject: [PATCH 270/411] Fix the .platform and HplCC2420Pins --- tos/platforms/MoteISTx5/.platform | 5 ++++- tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/tos/platforms/MoteISTx5/.platform b/tos/platforms/MoteISTx5/.platform index 288d5501dc..680686b2d0 100755 --- a/tos/platforms/MoteISTx5/.platform +++ b/tos/platforms/MoteISTx5/.platform @@ -11,7 +11,10 @@ for (split(/\n/, <<'EOText' %P/hardware/usci %P/hardware/adc %P/hardware/clock - + %P/hardware/pmm + %P/tests/DVSTest/Tasks + %P/tests/DVSTest + %T/chips/msp430/x5xxx %T/chips/msp430/x5xxx/lpm %T/chips/msp430/x5xxx/timer diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc index 410e60133c..f932fd0980 100755 --- a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc +++ b/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc @@ -59,7 +59,7 @@ configuration HplCC2420PinsC { interface GeneralIO as SFD; interface GeneralIO as VREN; } - +} implementation { components HplMsp430GeneralIOC as GeneralIOC; components new Msp430GpioC() as CCAM; From 0c7c3131a4293cd521cca17a2c2dea533d9a3e1d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Wed, 1 Feb 2012 23:15:02 +0000 Subject: [PATCH 271/411] Bring over the MoteISTx5/Tests from jg_old --- .../MultipleNoRepeat-mean/FastADCAppC.nc | 60 ++++ .../MultipleNoRepeat-mean/FastADCC.nc | 204 ++++++++++++ .../MultipleNoRepeat-mean/Makefile | 2 + .../MultipleNoRepeat/ConfigureAdc.nc | 47 +++ .../MultipleNoRepeat/FastADCAppC.nc | 59 ++++ .../MultiChannel/MultipleNoRepeat/FastADCC.nc | 219 +++++++++++++ .../MultiChannel/MultipleNoRepeat/Makefile | 7 + .../MultipleNoRepeat/adc_configuration.h | 2 + .../MultipleRepeat/FastADCAppC.nc | 60 ++++ .../SingleChannel/MultipleRepeat/FastADCC.nc | 178 ++++++++++ .../SingleChannel/MultipleRepeat/Makefile | 7 + .../MultipleRepeat-mean/AdcTestSamplesOutput | 244 ++++++++++++++ .../MultipleRepeat-mean/FastADCAppC.nc | 60 ++++ .../MultipleRepeat-mean/FastADCC.nc | 223 +++++++++++++ .../MultipleRepeat-mean/Makefile | 7 + .../readings/adcCurrent1MHz.csv | Bin 0 -> 6801 bytes .../readings/adcCurrent1MHzVREFneg.csv | Bin 0 -> 6801 bytes .../readings/adcErrorBAT.csv | Bin 0 -> 6166 bytes .../readings/adcErrorFET-VREFneg.csv | Bin 0 -> 1 bytes .../readings/adcErrorFET.csv | Bin 0 -> 6164 bytes .../readings/adcErrorVREFneg.csv | Bin 0 -> 6164 bytes .../SingleChannel/SingleRepeat/FastADCAppC.nc | 60 ++++ .../SingleChannel/SingleRepeat/FastADCC.nc | 153 +++++++++ .../SingleChannel/SingleRepeat/Makefile | 7 + .../MoteISTx5/tests/DVSTest/Micaz/Makefile | 2 + .../tests/DVSTest/Micaz/MicaTaskC.nc | 26 ++ .../tests/DVSTest/Micaz/MicaTaskP.nc | 156 +++++++++ .../MoteISTx5/tests/DVSTest/RadioAdc/Makefile | 2 + .../MoteISTx5/tests/DVSTest/RadioAdc/Radio.h | 43 +++ .../tests/DVSTest/RadioAdc/RadioAdcC.nc | 44 +++ .../tests/DVSTest/RadioAdc/RadioAdcP.nc | 308 ++++++++++++++++++ .../RadioConstFrequencyNoAdc/DVSTestAppC.nc | 35 ++ .../RadioConstFrequencyNoAdc/DVSTestP.nc | 140 ++++++++ .../DVSTest/RadioConstFrequencyNoAdc/Makefile | 2 + .../RadioConstFrequencyNoAdc/Micaz/Makefile | 2 + .../Micaz/MicaTaskC.nc | 26 ++ .../Micaz/MicaTaskP.nc | 127 ++++++++ .../DVSTest/RadioConstFrequencyNoAdc/Radio.h | 42 +++ .../RadioConstFrequencyNoAdc/Tasks/Tasks.nc | 24 ++ .../RadioConstFrequencyNoAdc/Tasks/TasksC.nc | 11 + .../RadioConstFrequencyNoAdc/Tasks/TasksP.nc | 75 +++++ .../Tasks/fibonacci/fib | Bin 0 -> 7253 bytes .../Tasks/fibonacci/fibonacci.c | 69 ++++ .../RadioConstFrequencyNoAdc/Tasks/pi/pi | Bin 0 -> 7272 bytes .../RadioConstFrequencyNoAdc/Tasks/pi/pi.c | 9 + .../tests/DVSTest/RadioNoAdc/DVSTestAppC.nc | 39 +++ .../tests/DVSTest/RadioNoAdc/DVSTestP.nc | 180 ++++++++++ .../tests/DVSTest/RadioNoAdc/Makefile | 2 + .../MoteISTx5/tests/DVSTest/Tasks/Tasks.nc | 24 ++ .../MoteISTx5/tests/DVSTest/Tasks/TasksC.nc | 11 + .../MoteISTx5/tests/DVSTest/Tasks/TasksP.nc | 81 +++++ .../tests/DVSTest/Tasks/fibonacci/fib | Bin 0 -> 7253 bytes .../tests/DVSTest/Tasks/fibonacci/fibonacci.c | 69 ++++ .../MoteISTx5/tests/DVSTest/Tasks/pi/pi | Bin 0 -> 7272 bytes .../MoteISTx5/tests/DVSTest/Tasks/pi/pi.c | 9 + .../DVSTest/noRadio/2Channels/DVSnoRadioC.nc | 32 ++ .../DVSTest/noRadio/2Channels/DVSnoRadioP.nc | 203 ++++++++++++ .../tests/DVSTest/noRadio/2Channels/Makefile | 2 + .../tests/DVSTest/noRadio/2Channels/test.txt | 165 ++++++++++ .../DVSTest/noRadio/3Channels/DVSnoRadioC.nc | 37 +++ .../DVSTest/noRadio/3Channels/DVSnoRadioP.nc | 257 +++++++++++++++ .../tests/DVSTest/noRadio/3Channels/Makefile | 2 + .../noRadio/FibonacciTest/DVSnoRadioC.nc | 32 ++ .../noRadio/FibonacciTest/DVSnoRadioP.nc | 237 ++++++++++++++ .../DVSTest/noRadio/FibonacciTest/Makefile | 2 + .../noRadio/FibonacciTest/messagetypes.h | 11 + .../tests/DVSTest/noRadio/old/ConfigureAdc.nc | 47 +++ .../tests/DVSTest/noRadio/old/DVSnoRadioP2.nc | 238 ++++++++++++++ .../tests/DVSTest/noRadio/old/messagetypes.h | 11 + .../MoteISTx5/tests/FlashTest/ClientC.nc | 12 + .../MoteISTx5/tests/FlashTest/ClientP.nc | 50 +++ .../tests/FlashTest/FlashTestAppC.nc | 29 ++ .../MoteISTx5/tests/FlashTest/FlashTestP.nc | 86 +++++ .../MoteISTx5/tests/FlashTest/Makefile | 3 + .../tests/FrequencyTest/ClockTestAppC.nc | 25 ++ .../tests/FrequencyTest/ClockTestP.nc | 69 ++++ .../MoteISTx5/tests/FrequencyTest/Makefile | 3 + .../tests/RadioTest/MoteISTx5/BlinkToRadio.h | 22 ++ .../RadioTest/MoteISTx5/BlinkToRadioAppC.nc | 72 ++++ .../RadioTest/MoteISTx5/BlinkToRadioC.nc | 134 ++++++++ .../tests/RadioTest/MoteISTx5/Makefile | 3 + .../tests/RadioTest/micaz/BlinkToRadio.h | 22 ++ .../tests/RadioTest/micaz/BlinkToRadioAppC.nc | 72 ++++ .../tests/RadioTest/micaz/BlinkToRadioC.nc | 131 ++++++++ .../MoteISTx5/tests/RadioTest/micaz/Makefile | 3 + .../MoteISTx5/tests/TimerTest/Makefile | 3 + .../MoteISTx5/tests/TimerTest/TimerTestC.nc | 17 + .../MoteISTx5/tests/TimerTest/TimerTestP.nc | 39 +++ .../adc-error/1.188V-error.csv | Bin 0 -> 6091 bytes .../adc-error/2.137V-error.csv | Bin 0 -> 7365 bytes .../adc-error/2.435V-error.csv | Bin 0 -> 7183 bytes .../adc-error/297.7mV-error.csv | Bin 0 -> 9969 bytes .../current-readings/adc-error/gnd-error.csv | Bin 0 -> 7001 bytes .../AutoPMM/autopmm-1MHz_25MHz-5000it-2.csv | Bin 0 -> 1326 bytes ...autopmm-1MHz_25MHz-5000it-2_7V-ref1_5V.csv | Bin 0 -> 1329 bytes .../autopmm-1MHz_25MHz-5000it-2_7V.csv | Bin 0 -> 1327 bytes .../AutoPMM/autopmm-1MHz_25MHz-5000it.csv | Bin 0 -> 1327 bytes .../AutoPMM/autopmm-25MHz_1MHz-5000it-2.csv | Bin 0 -> 1304 bytes .../AutoPMM/autopmm-25MHz_1MHz-5000it.csv | Bin 0 -> 1304 bytes .../PMM_1_9V/pmm1.9-25MHz_1MHz-1800it-2.csv | Bin 0 -> 1277 bytes .../PMM_1_9V/pmm1.9-25MHz_1MHz-1800it.csv | Bin 0 -> 1278 bytes .../PMM_1_9V/pmm1.9-25MHz_1MHz-5000it-2.csv | Bin 0 -> 1457 bytes .../PMM_1_9V/pmm1.9-25MHz_1MHz-5000it.csv | Bin 0 -> 1304 bytes .../tests/current-readings/radio/radioON1.csv | Bin 0 -> 9012 bytes .../MoteISTx5/tests/printf-test/Makefile | 3 + .../MoteISTx5/tests/printf-test/PrintfAppC.nc | 19 ++ .../MoteISTx5/tests/printf-test/PrintfP.nc | 67 ++++ .../MultipleNoRepeat-mean/FastADCAppC.nc | 60 ++++ .../MultipleNoRepeat-mean/FastADCC.nc | 204 ++++++++++++ .../MultipleNoRepeat-mean/Makefile | 2 + .../MultipleNoRepeat/ConfigureAdc.nc | 47 +++ .../MultipleNoRepeat/FastADCAppC.nc | 59 ++++ .../MultiChannel/MultipleNoRepeat/FastADCC.nc | 219 +++++++++++++ .../MultiChannel/MultipleNoRepeat/Makefile | 7 + .../MultipleNoRepeat/adc_configuration.h | 2 + .../MultipleRepeat/FastADCAppC.nc | 60 ++++ .../SingleChannel/MultipleRepeat/FastADCC.nc | 178 ++++++++++ .../SingleChannel/MultipleRepeat/Makefile | 7 + .../MultipleRepeat-mean/AdcTestSamplesOutput | 244 ++++++++++++++ .../MultipleRepeat-mean/FastADCAppC.nc | 60 ++++ .../MultipleRepeat-mean/FastADCC.nc | 223 +++++++++++++ .../MultipleRepeat-mean/Makefile | 7 + .../readings/adcCurrent1MHz.csv | Bin 0 -> 6801 bytes .../readings/adcCurrent1MHzVREFneg.csv | Bin 0 -> 6801 bytes .../readings/adcErrorBAT.csv | Bin 0 -> 6166 bytes .../readings/adcErrorFET-VREFneg.csv | Bin 0 -> 1 bytes .../readings/adcErrorFET.csv | Bin 0 -> 6164 bytes .../readings/adcErrorVREFneg.csv | Bin 0 -> 6164 bytes .../SingleChannel/SingleRepeat/FastADCAppC.nc | 60 ++++ .../SingleChannel/SingleRepeat/FastADCC.nc | 153 +++++++++ .../SingleChannel/SingleRepeat/Makefile | 7 + .../tests/tests/DVSTest/Micaz/Makefile | 2 + .../tests/tests/DVSTest/Micaz/MicaTaskC.nc | 26 ++ .../tests/tests/DVSTest/Micaz/MicaTaskP.nc | 156 +++++++++ .../tests/tests/DVSTest/RadioAdc/Makefile | 2 + .../tests/tests/DVSTest/RadioAdc/Radio.h | 43 +++ .../tests/tests/DVSTest/RadioAdc/RadioAdcC.nc | 44 +++ .../tests/tests/DVSTest/RadioAdc/RadioAdcP.nc | 308 ++++++++++++++++++ .../RadioConstFrequencyNoAdc/DVSTestAppC.nc | 35 ++ .../RadioConstFrequencyNoAdc/DVSTestP.nc | 140 ++++++++ .../DVSTest/RadioConstFrequencyNoAdc/Makefile | 2 + .../RadioConstFrequencyNoAdc/Micaz/Makefile | 2 + .../Micaz/MicaTaskC.nc | 26 ++ .../Micaz/MicaTaskP.nc | 127 ++++++++ .../DVSTest/RadioConstFrequencyNoAdc/Radio.h | 42 +++ .../RadioConstFrequencyNoAdc/Tasks/Tasks.nc | 24 ++ .../RadioConstFrequencyNoAdc/Tasks/TasksC.nc | 11 + .../RadioConstFrequencyNoAdc/Tasks/TasksP.nc | 75 +++++ .../Tasks/fibonacci/fib | Bin 0 -> 7253 bytes .../Tasks/fibonacci/fibonacci.c | 69 ++++ .../RadioConstFrequencyNoAdc/Tasks/pi/pi | Bin 0 -> 7272 bytes .../RadioConstFrequencyNoAdc/Tasks/pi/pi.c | 9 + .../tests/DVSTest/RadioNoAdc/DVSTestAppC.nc | 39 +++ .../tests/DVSTest/RadioNoAdc/DVSTestP.nc | 180 ++++++++++ .../tests/tests/DVSTest/RadioNoAdc/Makefile | 2 + .../tests/tests/DVSTest/Tasks/Tasks.nc | 24 ++ .../tests/tests/DVSTest/Tasks/TasksC.nc | 11 + .../tests/tests/DVSTest/Tasks/TasksP.nc | 81 +++++ .../tests/tests/DVSTest/Tasks/fibonacci/fib | Bin 0 -> 7253 bytes .../tests/DVSTest/Tasks/fibonacci/fibonacci.c | 69 ++++ .../MoteISTx5/tests/tests/DVSTest/Tasks/pi/pi | Bin 0 -> 7272 bytes .../tests/tests/DVSTest/Tasks/pi/pi.c | 9 + .../DVSTest/noRadio/2Channels/DVSnoRadioC.nc | 32 ++ .../DVSTest/noRadio/2Channels/DVSnoRadioP.nc | 203 ++++++++++++ .../tests/DVSTest/noRadio/2Channels/Makefile | 2 + .../tests/DVSTest/noRadio/2Channels/test.txt | 165 ++++++++++ .../DVSTest/noRadio/3Channels/DVSnoRadioC.nc | 37 +++ .../DVSTest/noRadio/3Channels/DVSnoRadioP.nc | 257 +++++++++++++++ .../tests/DVSTest/noRadio/3Channels/Makefile | 2 + .../noRadio/FibonacciTest/DVSnoRadioC.nc | 32 ++ .../noRadio/FibonacciTest/DVSnoRadioP.nc | 237 ++++++++++++++ .../DVSTest/noRadio/FibonacciTest/Makefile | 2 + .../noRadio/FibonacciTest/messagetypes.h | 11 + .../tests/DVSTest/noRadio/old/ConfigureAdc.nc | 47 +++ .../tests/DVSTest/noRadio/old/DVSnoRadioP2.nc | 238 ++++++++++++++ .../tests/DVSTest/noRadio/old/messagetypes.h | 11 + .../tests/tests/FlashTest/ClientC.nc | 12 + .../tests/tests/FlashTest/ClientP.nc | 50 +++ .../tests/tests/FlashTest/FlashTestAppC.nc | 29 ++ .../tests/tests/FlashTest/FlashTestP.nc | 86 +++++ .../MoteISTx5/tests/tests/FlashTest/Makefile | 3 + .../tests/FrequencyTest/ClockTestAppC.nc | 25 ++ .../tests/tests/FrequencyTest/ClockTestP.nc | 69 ++++ .../tests/tests/FrequencyTest/Makefile | 3 + .../tests/RadioTest/MoteISTx5/BlinkToRadio.h | 22 ++ .../RadioTest/MoteISTx5/BlinkToRadioAppC.nc | 72 ++++ .../RadioTest/MoteISTx5/BlinkToRadioC.nc | 134 ++++++++ .../tests/tests/RadioTest/MoteISTx5/Makefile | 3 + .../tests/RadioTest/micaz/BlinkToRadio.h | 22 ++ .../tests/RadioTest/micaz/BlinkToRadioAppC.nc | 72 ++++ .../tests/RadioTest/micaz/BlinkToRadioC.nc | 131 ++++++++ .../tests/tests/RadioTest/micaz/Makefile | 3 + .../MoteISTx5/tests/tests/TimerTest/Makefile | 3 + .../tests/tests/TimerTest/TimerTestC.nc | 17 + .../tests/tests/TimerTest/TimerTestP.nc | 39 +++ .../adc-error/1.188V-error.csv | Bin 0 -> 6091 bytes .../adc-error/2.137V-error.csv | Bin 0 -> 7365 bytes .../adc-error/2.435V-error.csv | Bin 0 -> 7183 bytes .../adc-error/297.7mV-error.csv | Bin 0 -> 9969 bytes .../current-readings/adc-error/gnd-error.csv | Bin 0 -> 7001 bytes .../AutoPMM/autopmm-1MHz_25MHz-5000it-2.csv | Bin 0 -> 1326 bytes ...autopmm-1MHz_25MHz-5000it-2_7V-ref1_5V.csv | Bin 0 -> 1329 bytes .../autopmm-1MHz_25MHz-5000it-2_7V.csv | Bin 0 -> 1327 bytes .../AutoPMM/autopmm-1MHz_25MHz-5000it.csv | Bin 0 -> 1327 bytes .../AutoPMM/autopmm-25MHz_1MHz-5000it-2.csv | Bin 0 -> 1304 bytes .../AutoPMM/autopmm-25MHz_1MHz-5000it.csv | Bin 0 -> 1304 bytes .../PMM_1_9V/pmm1.9-25MHz_1MHz-1800it-2.csv | Bin 0 -> 1277 bytes .../PMM_1_9V/pmm1.9-25MHz_1MHz-1800it.csv | Bin 0 -> 1278 bytes .../PMM_1_9V/pmm1.9-25MHz_1MHz-5000it-2.csv | Bin 0 -> 1457 bytes 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tos/platforms/MoteISTx5/tests/tests/current-readings/noradio/PMM_1_9V/pmm1.9-25MHz_1MHz-5000it.csv create mode 100644 tos/platforms/MoteISTx5/tests/tests/current-readings/radio/radioON1.csv create mode 100644 tos/platforms/MoteISTx5/tests/tests/printf-test/Makefile create mode 100644 tos/platforms/MoteISTx5/tests/tests/printf-test/PrintfAppC.nc create mode 100644 tos/platforms/MoteISTx5/tests/tests/printf-test/PrintfP.nc diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc new file mode 100644 index 0000000000..84806b6bb5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc new file mode 100644 index 0000000000..7ea1a1ef36 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define SAMPLES 16 + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + +} + +implementation{ + + uint16_t adb[SAMPLES]; + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureMultiple(); + + event void Boot.booted(){ + call Resource.request(); + } + + event void Resource.granted(){ + uint8_t i; + error_t e = FAIL; + while(e != SUCCESS){ + e = configureMultiple(); + } + + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + + for(i=0; i<5; i++){ + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + } + + + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + printadb(); + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + return FAIL; + } +//functions + + void printadb(){ + uint8_t i; + float mean = 0; + float Gain = 37.461; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Vout = 0; + float Current = 0; + float Vsense = 0; + float Rsense = 1.01; + + for(i = 0; i < SAMPLES; i++){ + mean += (float) adb[i]; + //printf("Sample %d =", i); + //printfFloat((float) adb[i]); + //printf("\n"); + } + mean = mean/SAMPLES; + printf("Sample mean ="); + printfFloat(mean); + printf("\n"); + + printf("Vout mean (into ADC) ="); + Vout = mean*refVolt/Nmax; + printfFloat(Vout); + printf(" V\n"); + + Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV + printf("Vsense ="); + printfFloat(Vsense); + printf(" mV\n"); + + Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm + printf("Current ="); + printfFloat(Current); + printf(" mA\n"); + + Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + printf("Current ="); + printfFloat(Current); + printf(" mA\n"); + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureMultiple(){ + error_t e; + printf("Configure multipleRepeat\n"); + e = call adc.configureMultiple(&adcconfig, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile new file mode 100644 index 0000000000..d0904ef732 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile @@ -0,0 +1,2 @@ +COMPONENT=FastADCAppC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc new file mode 100644 index 0000000000..28f536c255 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "Msp430Adc12.h" + +interface Msp430UsciConfigure { + /** + * Return a pointer to the configuration that should be used for the ADC + */ + async command const msp430adc12_channel_config_t* getConfiguration (); + + async command const adc12memctl_t* getAdditionalChannels (); +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc new file mode 100644 index 0000000000..790561e6b0 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc new file mode 100644 index 0000000000..100ac4cc9e --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc @@ -0,0 +1,219 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * 2 Channels convertion + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define SAMPLES 15 + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource; +} + +implementation{ + + uint16_t adb[SAMPLES]; + + msp430adc12_channel_config_t adcconfig = { + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_1024_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + /*adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + };*/ + adc12memctl_t channelconfig [] = { + {INPUT_CHANNEL_A2, REFVOLT_LEVEL_2_5, 0}, + {INPUT_CHANNEL_A3, REFVOLT_LEVEL_2_5, 1} + }; + adc12memctl_t * adcchannelconfig = (adc12memctl_t *) channelconfig; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configure(); + + event void Boot.booted(){ + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + printf("Booting...\n"); + call Resource.request(); + } + + event void Resource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configure(); + } + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + /** + * Conversion results are ready. Results are stored in the buffer in the + * order the channels where specified in the configure() + * command, i.e. every (numMemctl+1)-th entry maps to the same channel. + * + * @param buffer Conversion results (lower 12 bit are valid, respectively). + * @param numSamples Number of results stored in buffer + */ + printadb(); + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + //functions + + void printadb(){ + uint8_t i; + uint32_t VCurrentMean = 0; + uint32_t VCoreMean = 0; + uint32_t VbatMean = 0; + + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Rsense = 1.01; + float curr=0; + float bat =0; + float core=0; + + for(i = 0; i < SAMPLES; i++){ + printf("adb[%d] = %d ->", i, adb[i]); + core = (float)adb[i]*2.5/4095; + printfFloat(core); + } + uwait(1024*6); + /* + for(i = 0; i < SAMPLES; i+=3){ + VCurrentMean += adb[i]; + VbatMean += adb[i+1]; + VCoreMean += adb[i+2]; + } + VCurrentMean /= (SAMPLES/3); //bits + VCoreMean /= (SAMPLES/3); // bits + VbatMean /= (SAMPLES/3); // bits + curr = ((float)VCurrentMean)*2.5/Nmax); + curr /= (Gain*Rsense); + curr = curr *1000;//value in mA + + bat = (((float)VCoreMean)*2.5/Nmax)*2; //value in V + + core = ((float)VCoreMean)*1.5/Nmax; // in V + //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //voltageMean *= 2; // multiply by 2 to get total battery voltage + printf("Current,Supply,Vcore\n"); + printfFloat(curr); + printf(","); + printfFloat(bat); + printf(","); + printfFloat(core); + printf("\n"); + //printf("%d,%lu,%lu,%lu,%lu,%lu\n", Number, ActFreq, Time, VCurrentMean, VbatMean, VCoreMean); + */ + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configure(){ + error_t e; + e = call adc.configure(&adcconfig, adcchannelconfig, 2, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile new file mode 100644 index 0000000000..535593717b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile @@ -0,0 +1,7 @@ +COMPONENT=FastADCAppC +#CFLAGS += -DPRINTFUART_ENABLED +#CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED + +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h new file mode 100644 index 0000000000..94c62756ea --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h @@ -0,0 +1,2 @@ +#include "Msp430Adc12.h" + diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc new file mode 100644 index 0000000000..84806b6bb5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc new file mode 100644 index 0000000000..10c452b52d --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc @@ -0,0 +1,178 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define SAMPLES 16 + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + +} + +implementation{ + + uint16_t adb[SAMPLES]; + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_8_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureMultiple(); + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + event void Boot.booted(){ + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + printf("Booting...\n"); + call Resource.request(); + } + + event void Resource.granted(){ + error_t e = FAIL; + printf("Resource Granted\n"); + while(e != SUCCESS){ + e = configureMultiple(); + } + printf("Starting 1st conversion\n"); + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + printf("Samples ready\n"); + printadb(); + uwait(4096); + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + return FAIL; + } +//functions + + void printadb(){ + uint16_t i; + float voltage = 0; + printf("Printing buffer\n"); + for(i = 0; i < SAMPLES; i++){ + printf("adb[%d] = %d ->", i, adb[i]); + voltage = adb[i]*2.5/4095; + printfFloat(voltage); + } + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d Volt\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureMultiple(){ + error_t e; + printf("Configure multipleRepeat\n"); + e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile new file mode 100644 index 0000000000..535593717b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile @@ -0,0 +1,7 @@ +COMPONENT=FastADCAppC +#CFLAGS += -DPRINTFUART_ENABLED +#CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED + +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput new file mode 100644 index 0000000000..741e490853 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput @@ -0,0 +1,244 @@ +Configure multipleRepeat +Starting the ADC... + +Printing ADC set of samples Nº0. +Sample 0 = 3830.000 +Sample 1 = 2989.000 +Sample 2 = 2546.000 +Sample 3 = 2283.000 +Sample 4 = 2114.000 +Sample 5 = 2010.000 +Sample 6 = 1929.000 +Sample 7 = 1875.000 +Sample 8 = 1839.000 +Sample 9 = 1812.000 +Sample 10 = 1805.000 +Sample 11 = 1786.000 +Sample 12 = 1781.000 +Sample 13 = 1769.000 +Sample 14 = 1776.000 +Sample 15 = 1761.000 +Sample mean = 2119.062 +Vout mean (into ADC) = 1.293 V +Vsense = 34.534 mV +Current = 34.192 mA + +Printing ADC set of samples Nº1. +Sample 0 = 1695.000 +Sample 1 = 1721.000 +Sample 2 = 1695.000 +Sample 3 = 1692.000 +Sample 4 = 1697.000 +Sample 5 = 1702.000 +Sample 6 = 1692.000 +Sample 7 = 1697.000 +Sample 8 = 1698.000 +Sample 9 = 1688.000 +Sample 10 = 1695.000 +Sample 11 = 1740.000 +Sample 12 = 1701.000 +Sample 13 = 1690.000 +Sample 14 = 1703.000 +Sample 15 = 1691.000 +Sample mean = 1699.812 +Vout mean (into ADC) = 1.037 V +Vsense = 27.701 mV +Current = 27.427 mA + +Printing ADC set of samples Nº2. +Sample 0 = 1836.000 +Sample 1 = 1832.000 +Sample 2 = 1836.000 +Sample 3 = 1835.000 +Sample 4 = 1830.000 +Sample 5 = 1834.000 +Sample 6 = 1836.000 +Sample 7 = 1826.000 +Sample 8 = 1834.000 +Sample 9 = 1836.000 +Sample 10 = 1839.000 +Sample 11 = 1849.000 +Sample 12 = 1834.000 +Sample 13 = 1850.000 +Sample 14 = 1832.000 +Sample 15 = 1835.000 +Sample mean = 1835.875 +Vout mean (into ADC) = 1.120 V +Vsense = 29.919 mV +Current = 29.622 mA + +Printing ADC set of samples Nº3. +Sample 0 = 1876.000 +Sample 1 = 1882.000 +Sample 2 = 1875.000 +Sample 3 = 1890.000 +Sample 4 = 1873.000 +Sample 5 = 1887.000 +Sample 6 = 1873.000 +Sample 7 = 1873.000 +Sample 8 = 1878.000 +Sample 9 = 1872.000 +Sample 10 = 1874.000 +Sample 11 = 1888.000 +Sample 12 = 1883.000 +Sample 13 = 1877.000 +Sample 14 = 1879.000 +Sample 15 = 1880.000 +Sample mean = 1878.750 +Vout mean (into ADC) = 1.146 V +Vsense = 30.617 mV +Current = 30.314 mA + +Printing ADC set of samples Nº4. +Sample 0 = 1909.000 +Sample 1 = 1904.000 +Sample 2 = 1907.000 +Sample 3 = 1905.000 +Sample 4 = 1906.000 +Sample 5 = 1900.000 +Sample 6 = 1909.000 +Sample 7 = 1898.000 +Sample 8 = 1910.000 +Sample 9 = 1909.000 +Sample 10 = 1911.000 +Sample 11 = 1910.000 +Sample 12 = 1908.000 +Sample 13 = 1905.000 +Sample 14 = 1908.000 +Sample 15 = 1910.000 +Sample mean = 1906.812 +Vout mean (into ADC) = 1.164 V +Vsense = 31.075 mV +Current = 30.767 mA + +Printing ADC set of samples Nº5. +Sample 0 = 1907.000 +Sample 1 = 1922.000 +Sample 2 = 1907.000 +Sample 3 = 1913.000 +Sample 4 = 1911.000 +Sample 5 = 1909.000 +Sample 6 = 1911.000 +Sample 7 = 1909.000 +Sample 8 = 1907.000 +Sample 9 = 1954.000 +Sample 10 = 1912.000 +Sample 11 = 1898.000 +Sample 12 = 1907.000 +Sample 13 = 1899.000 +Sample 14 = 1908.000 +Sample 15 = 1925.000 +Sample mean = 1912.437 +Vout mean (into ADC) = 1.167 V +Vsense = 31.166 mV +Current = 30.858 mA + +Printing ADC set of samples Nº6. +Sample 0 = 1903.000 +Sample 1 = 1905.000 +Sample 2 = 1908.000 +Sample 3 = 1906.000 +Sample 4 = 1903.000 +Sample 5 = 1906.000 +Sample 6 = 1909.000 +Sample 7 = 1904.000 +Sample 8 = 1903.000 +Sample 9 = 1902.000 +Sample 10 = 1905.000 +Sample 11 = 1896.000 +Sample 12 = 1914.000 +Sample 13 = 1894.000 +Sample 14 = 1905.000 +Sample 15 = 1900.000 +Sample mean = 1903.937 +Vout mean (into ADC) = 1.162 V +Vsense = 31.028 mV +Current = 30.721 mA + +Printing ADC set of samples Nº7. +Sample 0 = 1895.000 +Sample 1 = 1903.000 +Sample 2 = 1894.000 +Sample 3 = 1890.000 +Sample 4 = 1891.000 +Sample 5 = 1898.000 +Sample 6 = 1896.000 +Sample 7 = 1901.000 +Sample 8 = 1891.000 +Sample 9 = 1888.000 +Sample 10 = 1899.000 +Sample 11 = 1916.000 +Sample 12 = 1897.000 +Sample 13 = 1896.000 +Sample 14 = 1890.000 +Sample 15 = 1899.000 +Sample mean = 1896.500 +Vout mean (into ADC) = 1.157 V +Vsense = 30.907 mV +Current = 30.601 mA + +Printing ADC set of samples Nº8. +Sample 0 = 1887.000 +Sample 1 = 1886.000 +Sample 2 = 1885.000 +Sample 3 = 1881.000 +Sample 4 = 1885.000 +Sample 5 = 1892.000 +Sample 6 = 1886.000 +Sample 7 = 1907.000 +Sample 8 = 1889.000 +Sample 9 = 1898.000 +Sample 10 = 1889.000 +Sample 11 = 1886.000 +Sample 12 = 1889.000 +Sample 13 = 1898.000 +Sample 14 = 1880.000 +Sample 15 = 1883.000 +Sample mean = 1888.812 +Vout mean (into ADC) = 1.153 V +Vsense = 30.781 mV +Current = 30.477 mA + +Printing ADC set of samples Nº9. +Sample 0 = 1867.000 +Sample 1 = 1860.000 +Sample 2 = 1869.000 +Sample 3 = 1866.000 +Sample 4 = 1863.000 +Sample 5 = 1869.000 +Sample 6 = 1870.000 +Sample 7 = 1870.000 +Sample 8 = 1871.000 +Sample 9 = 1869.000 +Sample 10 = 1868.000 +Sample 11 = 1880.000 +Sample 12 = 1871.000 +Sample 13 = 1867.000 +Sample 14 = 1870.000 +Sample 15 = 1862.000 +Sample mean = 1868.250 +Vout mean (into ADC) = 1.140 V +Vsense = 30.446 mV +Current = 30.145 mA + +Printing ADC set of samples Nº9. +Sample 0 = 1867.000 +Sample 1 = 1860.000 +Sample 2 = 1869.000 +Sample 3 = 1866.000 +Sample 4 = 1863.000 +Sample 5 = 1869.000 +Sample 6 = 1870.000 +Sample 7 = 1870.000 +Sample 8 = 1871.000 +Sample 9 = 1869.000 +Sample 10 = 1868.000 +Sample 11 = 1880.000 +Sample 12 = 1871.000 +Sample 13 = 1867.000 +Sample 14 = 1870.000 +Sample 15 = 1862.000 +Sample mean = 1868.250 +Vout mean (into ADC) = 1.140 V +Vsense = 30.446 mV +Current = 30.145 mA diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc new file mode 100644 index 0000000000..84806b6bb5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc new file mode 100644 index 0000000000..e2217331f6 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define SAMPLES 16 + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + +} + +implementation{ + + uint16_t adb[SAMPLES]; + uint8_t count = 0; + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A2, + //sref: REFERENCE_VREFplus_VREFnegterm, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_8_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void uwait(uint32_t u); + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureMultipleRepeat(); + + event void Boot.booted(){ + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2Off(); + call Resource.request(); + } + + event void Resource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureMultipleRepeat(); + } + //printf("Starting the ADC...\n"); + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + //if(count<20){ + printadb(); + // count++; + // } + // else + // return NULL; + // uwait(1024*6); + call Leds.led2Toggle(); + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + return FAIL; + } +//functions + + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + void printadb(){ + uint8_t i; + float mean = 0; + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Vout = 0; + float Current = 0; + float Vsense = 0; + float Rsense = 1.01; + //printf("Sample,Vin(V)\n"); + for(i = 0; i < SAMPLES; i++){ + mean += (float) adb[i]; + //printfFloat((float) adb[i]); + //printf(","); + Vout = adb[i]*refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //printfFloat(Vout); + //printf("\n"); + } + mean = mean/SAMPLES; + //printf("Sample mean ="); + //printfFloat(mean); + //printf("\n"); + // printf("Mean(V),Vsense(mV),Current(mA),Current(mA)\n"); + //printf("Vout corrected with \" ((float)((uint8_t)(Vout*100)))/100 \" = "); + Vout = mean*refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //printf("Mean Voltage: "); + printfFloat(Vout); + printf("\n"); + /* + Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV + //printf("Vsense ="); + printfFloat(Vsense); + printf(","); + + Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm + //printf("Current ="); + printfFloat(Current); + printf(","); + + Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //printf("Current ="); + printfFloat(Current); + //printf(" mA\n"); + //printf("\n"); + printf("\n");*/ + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2, f3; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + f3 = f*10000;f3 %= 10; + printf("%ld.%d%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2, (uint8_t) f3); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureMultipleRepeat(){ + error_t e; + //printf("Configure multipleRepeat\n"); + e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile new file mode 100644 index 0000000000..535593717b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile @@ -0,0 +1,7 @@ +COMPONENT=FastADCAppC +#CFLAGS += -DPRINTFUART_ENABLED +#CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED + +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcCurrent1MHz.csv b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcCurrent1MHz.csv new file mode 100644 index 0000000000000000000000000000000000000000..add09c2b9852a8eee9f5b4caca5bd7f0fc189b37 GIT binary patch literal 6801 zcmbuEOOM<*41{y;Uy=ZgfgY4BAA>#Tw7}eR=)(e=!6J|UA5z?L*~JFD#^$0S)Rv{v zrxNLW`19+xfBt^lU;ldh`1 z_cVUrJ-@bF?mCh8`7Ab{fwCz z)ZeSd>!v|gy*0+1^N?Ff=r2XbU$;Hd@l=Dc?U6oTwSU`_tbd2NBs^bg)$uXkqI(|W zh~{JDgof#y$2_ z>>LO*l%Zb0{bjelRW+~2@viu37BNkStP@xDMvJr|O(SQ=eT{yJIZgjOTjc{Jm+r+NJscUNsl)5z(L1Ir(o%d>l$^Mv51M@}MF z+z(Bj=bzBj^8$XJ`*-(+-q@Ek6|p30xTZr(7>lfuIjf^EC(l=zGiYvgQp_80wyh3g z|6=Z9KaEeE#e4sZb2=9T8Yj)IE@`TV+Bj`88%@hB(uOpR_de#}eu_E!z0du-eSelG zoN@~9@O+cT<9nR$?dYdqVAgHHkB|MAG=29|aX;-|HJd(!u*c?jQuXwRmbPK|D1E2yZ>KD{YOrjBhC*47tnC}TlhWtz0QIr zp1)Ge9G>NyR0nZg6!YODm;C!{oI0RgCZMIya!MQKl(`DuiE!5ao`xoV&l0!HJ=IO@ zr;$7OvDM?TPQsp9eb4>OZH(d9R<~W!^u6A%UhfxoSIyv#XFvKWG;^*nhxr{Ta0{<+ zKitLk-70Vg&1U`2oQJ#ud+K!;bGMtH<*Ol2!P&Qbv=q#*F7=wG;u-0(_;;z9`j5JX zI_lIPF(=Oh5Su>*?uc{#o*DfUYn*i&&xh-{6&m}wfyS0U$NculHP7cFr<2TOc)h>O zNc1Z(a|(@SeIDwb9S6_y)xa&*;Q1uRpPYp6SkQEG9yo<&evi|5!H?lZGV3lr7r1jp z^OQ@PN}KuVSiIhMP9<_mT!nj|zXvc!;k!T9nz)e(>1oB` za7gKwFJHg?_2=XM{Kw0u=g+s0!_%UF_vLA+F{qtk%c}MYJ4dw>>?CRnY*_~DH_Ydv z^Spn-{A&AE*qiOg^KA2avR8HN&A-k3InV$8_-Z)ZpMN}Femv~I-+q4o{&@NO)3;ww z|KALtyx!we&P%Z&x~0R7Fs(bLA*}k%8sE+k!loG3{Y*j6GnnV~Z10$dP!zLn|2;-TOSwr7vpwgdj?Z;;GUi|%*lqhEw2M%8fE8A zkeY8%a7HOi5!~2SJqQF#$u-Jc$W0kyr-n59ims>DM3p ziBadz>!&c4yeW#Mti=X}=XD@VLxB%LH1`X5pn0xw2L{elwt<=R9Q!%1fLW-P2W(%h z$9WnrnWr7EndfYu_nX30!7yfSvf3aiybgqE6!?@ESjkjzc;@)@+jPhbUW~U;|-#$xG&O1;!dSnUQ;cv^sANO@4#fmuwZ|A>j}FXpX}i3{=~=5U+BG?Yfr)ysd{nx5)FnD+V! zA6y@ChSnD(oVoExXnm)b#LJGy_`UOv?Zfw5UB8;=^@!1^kC?*rqjjJAQ|9TFU7=Ur zU&1HXTVOD*`@9|)xSk>=<9_x1{o?{{QvN7U!CT|?6sDmzW^S9;{Z_Gp7OqR4;tZ~j zq@TD~=@miXaFep8srY8`1^Vk`e^YIR=+!nD&< z=3N2CA*x;#@Fs}eTY&la9>%<58yI|~|BMUz<7jv3PCw84F)w-j6sDoJ3sec#`iH!D z-PhaQ`EJ_xr{Kv@PcQpd_&mNRAtqk;*#_pWf52$i2MA)`@~YEw#9V^i)6Vu3rf)oL z&3;+Mc`6-GxvqBoD9-HtCvwO25`@0nU znXdclkP=j{YF_>u!ePst`z?^KY-7!uh0tDNAPs0uY9k&Xzx-wbUcO6{_cdhdL3t;A;h&XdX+I@!}kl2Jacz@cMrTr^m#bK!syLeWX#{T-- zb$9o2IKIF2+x_clv%jzC!3>|R8I7-k`Swh9_m}>3>BnzR zpXYOb`q&&F;X7Z&1`?jwFbQueWQMVn@X`rV7g3Pei72E%eY}dPeWir98)@0bu?g&K zLkei==}I}^TDnAVU%H1;E1CTfp`~YA;+INh*Txiz^V+o5FU}GqP)pJYSrv z;r*j#I&epd1C`Kt*l;{-I36~fJZzLND@2iAWVjDKDQYD%ZfK767R{oerJs(!yp4Ao zW>PF!%xY#9jmS(o9oM9Li@!|w76qu-IE%)&i$|G`8V?w@w{@AZwnUZD456omd}eD#{zE|tEhvm^P#D=zrGr^PXeAIL zrRj~{xK8A$WLA&TBGw!6`_o`nU?vp{=AP@NpP*#M{htM9q7j*;$C8^Z?yIN4i)6jv zKFPy(IVH28Gt+Tj>zH7dud@>Q;s0GFYFf#R`xymh#E;Rzh&q$*AFi#f$XuREX1{)L UrgK5PAYI8zKVceuZgxW}^od2Tf{+Nr`h8s1Lh>7VdA2ERLBsor5*9 z;GTpQu567A%=*_K(d@ts%tVA$Px literal 0 HcmV?d00001 diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcErrorVREFneg.csv b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcErrorVREFneg.csv new file mode 100644 index 0000000000000000000000000000000000000000..cba180b4056262c846eb6e9706bde2e87fa8593f GIT binary patch literal 6164 zcmb`LJ8#@D5QJ0fm)O7|;7hMENbM@X^)6Hdh!26C{QpQ?0lJSyCZytPc#B=`&W?r; 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IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc new file mode 100644 index 0000000000..a897ef06f5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + +} + +implementation{ + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void showerror(); + error_t configureSingleRepeat(); + void printfFloat(float toBePrinted); + + + event void Boot.booted(){ + printf("Booting...\n"); + call Resource.request(); + } + + event void Resource.granted(){ + error_t e = FAIL; + printf("Resource Granted\n"); + while(e != SUCCESS){ + e = configureSingleRepeat(); + } + printf("Starting 1st conversion\n"); + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + + async event error_t adc.singleDataReady(uint16_t data){ + float voltage = 0; + printf("Sample: %d\nVoltage: ", data); + voltage = data*2.5/4095; + printfFloat(voltage); + return SUCCESS; + } + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + } + +//functions + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureSingleRepeat(){ + error_t e; + printf("Configure singleRepeat\n"); + e = call adc.configureSingleRepeat(&adcconfig, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/Makefile new file mode 100644 index 0000000000..535593717b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/Makefile @@ -0,0 +1,7 @@ +COMPONENT=FastADCAppC +#CFLAGS += -DPRINTFUART_ENABLED +#CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED + +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/Makefile new file mode 100644 index 0000000000..95184a0aae --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/Makefile @@ -0,0 +1,2 @@ +COMPONENT=MicaTaskC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskC.nc new file mode 100644 index 0000000000..da1aeb47d6 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskC.nc @@ -0,0 +1,26 @@ +configuration MicaTaskC { +} +implementation { + components MainC; + components LedsC; + components MicaTaskP as App; + + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //for Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskP.nc new file mode 100644 index 0000000000..e28f400ccd --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskP.nc @@ -0,0 +1,156 @@ +#include +#include "../RadioAdc/Radio.h" + +module MicaTaskP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + message_t pkt; + bool busy = FALSE; + bool up = TRUE; + uint16_t missedDeadlines = 0; + uint16_t metDeadlines = 0; + uint16_t deadline = 100; //now using this one instead of the one in radio.h + uint16_t iterations = 100; //now using this one instead of the one in radio.h + uint16_t numRequest = 0; //serves as a counter for rasing or lowering the iteration number + uint16_t requestNum = 0;//count the number of requests so far + //prototypes + error_t MicaSendMsg(uint8_t state); + + event void Boot.booted() { + call AMControl.start(); //start radio + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer1.startPeriodic(PERIOD); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MoteISTMsg)) { + mist_m = (MoteISTMsg*)payload; + if(mist_m->nodeid == MOTEIST_NODE_ID){ + if (!busy) { //check if radio is busy + micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); + if (micaz_m == NULL){ + return 0; + } + micaz_m->nodeid = MICA_NODE_ID; //assign Micaz ID + micaz_m->task_i = iterations; + micaz_m->deadline = deadline; + micaz_m->missed = missedDeadlines; + micaz_m->met = metDeadlines; + + switch (mist_m->state){ + case REQUEST: // MoteIST ready for start + micaz_m->state = START; + break; + case STARTED: // MoteIST has started + call Timer0.startOneShot(deadline); + return msg; // At this point don't need to send msg to MoteIST, return + case DEADLINE_MET: + call Timer0.stop(); //stop timer, deadline is met + call Leds.led1Toggle(); + micaz_m->met = ++metDeadlines; + micaz_m->state = DEADLINE_MET; + break; + case DEADLINE_MISS: // MoteIST missed the deadline, too bad.. but nothing to do here + return msg; + default: + } + if(call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + + + event void Timer0.fired(){ //deadline Reached + missedDeadlines++; + call Leds.led0Toggle(); + MicaSendMsg(DEADLINE_MISS); + } + + event void Timer1.fired(){ //make new request + requestNum++; + MicaSendMsg(REQUEST); + numRequest++; + + if(numRequest>3){ + switch(up){ + case TRUE: + if(iterations < ITERATIONS) + iterations += 200; + else{ + up = FALSE; + return; + } + break; + case FALSE: + if(iterations > 200) + iterations -= 200; + else{ + call Timer1.stop(); + return; + } + break; + default: + } + numRequest=0; + } + } + + //functions + error_t MicaSendMsg(uint8_t state){ + + MicaMsg* micaz_m; + if (!busy) { //check if radio is busy + micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); + if (micaz_m == NULL){ + return FAIL; + } + micaz_m->nodeid = MICA_NODE_ID; + micaz_m->request = requestNum; + micaz_m->task_i = iterations; // 0 for deadline miss + micaz_m->deadline = deadline; + micaz_m->missed = missedDeadlines; + micaz_m->met = metDeadlines; + micaz_m->state = state; + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { + busy = TRUE; + } + } + return SUCCESS; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Makefile new file mode 100644 index 0000000000..ac59737e3b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Makefile @@ -0,0 +1,2 @@ +COMPONENT=RadioAdcC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Radio.h b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Radio.h new file mode 100644 index 0000000000..67f949c958 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Radio.h @@ -0,0 +1,43 @@ +#define MOTEIST_NODE_ID 1 //for MoteIST +#define MICA_NODE_ID 2 +#define ITERATIONS 5000 +#define DEADLINE 100 +#define PERIOD 200 + + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 1000, + DEADLINE_MISS = 4, + DEADLINE_MET = 3, + STARTED = 2, + START = 1, + REQUEST = 0 +}; + +typedef nx_struct MicaMsg { + nx_uint16_t nodeid; //node id + nx_uint16_t request; + nx_uint8_t state; // state of operation + nx_uint16_t task_i; //number of iterations to perform the task: passing 0 means deadline missed + nx_uint16_t deadline; //deadline for the task: passing 0 means this is a request to start + nx_uint16_t missed; //number of missed deadlines so far + nx_uint16_t met; + +} MicaMsg; + +typedef nx_struct MoteISTMsg { + nx_uint16_t nodeid; //node id + nx_uint16_t state; +} MoteISTMsg; + + +/* + * The MicaMsg struct + * + * parameter @state has the state of mica's operation such as: + * 0 - requesting + * 1 - start order + * 2 - deadline met + * 3 - deadline missed + */ diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcC.nc new file mode 100644 index 0000000000..375839c82b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcC.nc @@ -0,0 +1,44 @@ +#include + +configuration RadioAdcC { +} +implementation { + components MainC; + components LedsC; + components RadioAdcP as App; + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components SerialPrintfC; + + App.Boot -> MainC; + App.Leds -> LedsC; + + //timers + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //tasks (fibonacci) + components TasksC; + App.Tasks -> TasksC; + + //ADC + components new Msp430Adc12ClientAutoRVGC() as adc; + App.adc -> adc; + App.AdcResource -> adc; + adc.AdcConfigure -> App.AdcConfigure; + + //Frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; + + //Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcP.nc new file mode 100644 index 0000000000..94190a0139 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcP.nc @@ -0,0 +1,308 @@ +#include +#include +#include "Radio.h" +#include "Msp430Adc12.h" + + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif +#define MAX_FREQUENCY_INCREASE 5000000 +#define MAX_FREQUENCY 25000000 +#define START_FREQUENCY 25000000 +#define SAMPLES 16 + +module RadioAdcP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Tasks; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; + uses interface FreqControl; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource as AdcResource; +} +implementation { + + message_t pkt; + bool busy = FALSE; + uint16_t state; + uint32_t ActFrequency = 0; + uint16_t deadline; + uint16_t requestNum; + + uint16_t adb[SAMPLES]; + bool AdcDone = FALSE; + + //prototypes + void print(uint16_t iterations, uint32_t elapsedTime, error_t status); + void showerror(); + error_t configureAdc(); + + error_t SendMsgTaskDone(); + error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus); + void uwait(uint32_t u); + void printfFloat(float toBePrinted); + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ADC12OSC, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_16_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + + event void Boot.booted() { + printf("Iterations,Deadline,Frequency,ElapsedTime,Current,Voltage,Status\n"); + + if(call FreqControl.setMCLKFreq(START_FREQUENCY) == SUCCESS){ + ActFrequency = START_FREQUENCY; + //printf("Frequency at %lu Hz\n", ActFrequency); + //request the adc + call AdcResource.request(); + } + else + printf("err: Could not set Start Frequency\n"); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureAdc(); + } + call adc.getData(); + uwait(1024*5); + atomic if(AdcDone){ + print(0, 0, 0); + AdcDone=FALSE; + } + call AMControl.start(); //start radio + } + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + AdcDone = TRUE; + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { /*printf("Radio started\n");*/} + else + call AMControl.start(); + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) + busy = FALSE; + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MicaMsg)) { + micaz_m = (MicaMsg*)payload; + /* + * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) + */ + if(micaz_m->nodeid == MICA_NODE_ID){ + //printf("Incoming msg from mica\n"); + if (!busy) { //check if radio is busy + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + return 0; + } + mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID + state = micaz_m->state; + switch(micaz_m->state){ + + case REQUEST: + //printf("Mica: REQUEST\n\n"); + mist_m->state = REQUEST; + state = REQUEST; + break; + case START: + //printf("Mica: START.\niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); + mist_m->state = STARTED; + call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); + requestNum = micaz_m->request; + deadline = micaz_m->deadline; + break; + case DEADLINE_MET: + call Leds.led2Toggle(); + //printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + case DEADLINE_MISS: + call Leds.led1Toggle(); + //printf("Mica: DEADLINE_MISS:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + default: + break; + } + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + call adc.getData(); + + if(status == SUCCESS) + if(SendMsgTaskDone()!=SUCCESS) + call Timer0.startPeriodic(1); + + AdaptFrequency(elapsedTime, status); + + atomic if(AdcDone){ + print(iterations, elapsedTime, status); + AdcDone=FALSE; + } + } + event void Tasks.FibonacciIterationDone(){ } + + event void Timer0.fired() { + if(SendMsgTaskDone()==SUCCESS) + call Timer0.stop(); + } + + event void Timer1.fired() {} + + + //functions + error_t SendMsgTaskDone(){ + MoteISTMsg* mist_m; + if (!busy) {//check if radio is busy + /*build the packet*/ + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + printf("App: null pointer\n"); + return FAIL; + } + mist_m->state = DEADLINE_MET; // task done in time + state = DEADLINE_MET; + /*send the packet*/ + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ + busy = TRUE; + } + return SUCCESS; + } //if(!busy) + return FAIL; + } + + error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus){ + uint32_t newFreq; + float deadlineWindow; + deadlineWindow = deadline - deadline * 0.5; + //printf("Task done! Elapsed: %lu, status: %d\n", elapsedTime, taskStatus); + //printf("Act Freq is %lu Hz\n", ActFrequency); + + if(taskStatus!=SUCCESS) + newFreq = ActFrequency + MAX_FREQUENCY_INCREASE; + else{ + //ajust to finish in 20% less time of deadline + newFreq = (uint32_t) ( (((float) elapsedTime) / deadlineWindow) * ((float) ActFrequency) ); + newFreq = (newFreq/100000)*100000; //round frequency to hundreads of kHz + } + if(newFreq == ActFrequency || newFreq < 700000) + return FAIL; + + if(newFreq > MAX_FREQUENCY) + newFreq = MAX_FREQUENCY; + + if(call FreqControl.setMCLKFreq(newFreq)==SUCCESS) + ActFrequency = newFreq; + //set new frequency to the one needed in order to meet the deadline in half its time with a 20% window + //printf("New Freq is %lu Hz\n", ActFrequency); + return SUCCESS; + } + + void print(uint16_t iterations, uint32_t elapsedTime, error_t status){ + uint8_t i; + float currentMean = 0; + float voltageMean = 0; + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Rsense = 1.01; + + for(i = 0; i < SAMPLES; i+=2){ + currentMean += (float) adb[i]; + voltageMean += (float) adb[i+1]; + } + currentMean /= SAMPLES/2; //bits + voltageMean /= SAMPLES/2; // bits + currentMean *= refVolt/Nmax; //value in Volts + voltageMean *= refVolt/Nmax; //value in Volts + + currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //voltageMean *= 2; // multiply by 2.92 to get total battery voltage + + printf("%d,%d,%d,%lu,%lu,%d,", requestNum, iterations, deadline, ActFrequency, elapsedTime, status); + printfFloat(currentMean); + printf(","); + printfFloat(voltageMean); + printf("\n"); + } + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + float f = toBePrinted; + + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc new file mode 100644 index 0000000000..5684c8d960 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc @@ -0,0 +1,35 @@ + +#include + +configuration DVSTestAppC { +} +implementation { + components MainC; + components LedsC; + components DVSTestP as App; + + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components SerialPrintfC; + + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //For tasks + components TasksC; + App.Tasks -> TasksC; + + //for Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc new file mode 100644 index 0000000000..9d962687af --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc @@ -0,0 +1,140 @@ +#include +#include +#include "Radio.h" + +#define ADC_SAMPLE_TIME 10 //miliseconds + +module DVSTestP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Tasks; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + message_t pkt; + bool busy = FALSE; + uint16_t state; + + // prototypes + error_t SendMsgTaskDone(); + + + event void Boot.booted() { + //call Timer0.startPeriodic(ADC_SAMPLE_TIME); + printf("Booted\n"); + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2Off(); + call AMControl.start(); //start radio + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) {} + else + call AMControl.start(); + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) + busy = FALSE; + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MicaMsg)) { + micaz_m = (MicaMsg*)payload; + /* + * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) + */ + if(micaz_m->nodeid == MICA_NODE_ID){ + //printf("Incoming msg from mica\n"); + if (!busy) { //check if radio is busy + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + return 0; + } + mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID + state = micaz_m->state; + switch(micaz_m->state){ + + case REQUEST: + printf("Mica: REQUEST\n\n"); + mist_m->state = REQUEST; + state = REQUEST; + break; + case START: + printf("Mica: START. \niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); + mist_m->state = STARTED; + call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); + state = STARTED; + break; + case DEADLINE_MET: + call Leds.led2Toggle(); + printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + case DEADLINE_MISS: + call Leds.led1Toggle(); + printf("Mica: DEADLINE_MISS\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + default: + break; + } + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + if(SendMsgTaskDone()!=SUCCESS) + call Timer0.startPeriodic(1); + } + event void Tasks.FibonacciIterationDone(){ } + + event void Timer0.fired() { + if(SendMsgTaskDone()==SUCCESS) + call Timer0.stop(); + } + + event void Timer1.fired() {} + + + //functions + error_t SendMsgTaskDone(){ + MoteISTMsg* mist_m; + if (!busy) {//check if radio is busy + /*build the packet*/ + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + printf("App: null pointer\n"); + return FAIL; + } + mist_m->state = DEADLINE_MET; // task done in time + state = DEADLINE_MET; + /*send the packet*/ + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ + busy = TRUE; + } + return SUCCESS; + } //if(!busy) + return FAIL; + } +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile new file mode 100644 index 0000000000..aabeeeb4e5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSTestAppC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile new file mode 100644 index 0000000000..95184a0aae --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile @@ -0,0 +1,2 @@ +COMPONENT=MicaTaskC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc new file mode 100644 index 0000000000..da1aeb47d6 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc @@ -0,0 +1,26 @@ +configuration MicaTaskC { +} +implementation { + components MainC; + components LedsC; + components MicaTaskP as App; + + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //for Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc new file mode 100644 index 0000000000..dabe3d3528 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc @@ -0,0 +1,127 @@ +#include +#include "../Radio.h" + +module MicaTaskP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + message_t pkt; + bool busy = FALSE; + uint16_t missedDeadlines = 0; + uint16_t metDeadlines = 0; + uint8_t deadline = 100; //now using this one instead of the one in radio.h + + //prototypes + error_t MicaSendMsg(uint8_t state); + + event void Boot.booted() { + call AMControl.start(); //start radio + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer1.startPeriodic(PERIOD); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MoteISTMsg)) { + mist_m = (MoteISTMsg*)payload; + if(mist_m->nodeid == MOTEIST_NODE_ID){ + if (!busy) { //check if radio is busy + micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); + if (micaz_m == NULL){ + return 0; + } + micaz_m->nodeid = MICA_NODE_ID; //assign Micaz ID + micaz_m->task_i = ITERATIONS; + micaz_m->deadline = deadline; + micaz_m->missed = missedDeadlines; + micaz_m->met = metDeadlines; + + switch (mist_m->state){ + case REQUEST: // MoteIST ready for start + micaz_m->state = START; + break; + case STARTED: // MoteIST has started + call Timer0.startOneShot(deadline); + return msg; // At this point don't need to send msg to MoteIST, return + case DEADLINE_MET: + call Timer0.stop(); //stop timer, deadline is met + call Leds.led1Toggle(); + micaz_m->met = ++metDeadlines; + micaz_m->state = DEADLINE_MET; + break; + case DEADLINE_MISS: // MoteIST missed the deadline, too bad.. but nothing to do here + call Leds.led0Toggle(); + return msg; + default: + } + if(call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + + + event void Timer0.fired(){ //deadline Reached + missedDeadlines++; + MicaSendMsg(DEADLINE_MISS); + } + + event void Timer1.fired() { //make new request + MicaSendMsg(REQUEST); + } + + //functions + error_t MicaSendMsg(uint8_t state){ + + MicaMsg* micaz_m; + if (!busy) { //check if radio is busy + micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); + if (micaz_m == NULL){ + return FAIL; + } + micaz_m->nodeid = MICA_NODE_ID; + micaz_m->task_i = ITERATIONS; // 0 for deadline miss + micaz_m->deadline = deadline; + micaz_m->missed = missedDeadlines; + micaz_m->met = metDeadlines; + micaz_m->state = state; + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { + busy = TRUE; + } + } + return SUCCESS; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h new file mode 100644 index 0000000000..8d77f02ae2 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h @@ -0,0 +1,42 @@ +#define MOTEIST_NODE_ID 1 //for MoteIST +#define MICA_NODE_ID 2 +#define ITERATIONS 200 +#define DEADLINE 500 //0.1 sec +#define PERIOD 1000 //1 sec + + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 1000, + DEADLINE_MISS = 4, + DEADLINE_MET = 3, + STARTED = 2, + START = 1, + REQUEST = 0 +}; + +typedef nx_struct MicaMsg { + nx_uint16_t nodeid; //node id + nx_uint8_t state; // state of operation + nx_uint8_t task_i; //number of iterations to perform the task: passing 0 means deadline missed + nx_uint16_t deadline; //deadline for the task: passing 0 means this is a request to start + nx_uint16_t missed; //number of missed deadlines so far + nx_uint16_t met; + +} MicaMsg; + +typedef nx_struct MoteISTMsg { + nx_uint16_t nodeid; //node id + nx_uint16_t state; +} MoteISTMsg; + + +/* + * The MicaMsg struct + * + * parameter @state has the state of mica's operation such as: + * 0 - requesting + * 1 - start order + * 2 - deadline met + * 3 - deadline missed + */ diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc new file mode 100644 index 0000000000..e456e577bf --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc @@ -0,0 +1,24 @@ +interface Tasks{ + + /* + * Calculates the fibonacci sequence numbers to the number of the parameter iterations. + * The param deadline is the deadline in miliseconds. + */ + + error_t command getFibonacci(uint16_t iterations, uint32_t deadline); + + /* + *this event is used for each iteration done in TasksP + */ + + event void FibonacciIterationDone(void); + /* + *This signals the stop of the interations for the fibonacci sequence numbers + * returns + * num_iterations: the remanining iterations at the time the event was signaled, if any. + * actualTime: the actual time the event was signaled + * status: FAIL if it missed the deadline + * SUCCESS if it has finished before deadline + */ + event void FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status); +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc new file mode 100644 index 0000000000..3e6dfa33b9 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc @@ -0,0 +1,11 @@ +configuration TasksC { + provides interface Tasks; +} +implementation { + + components TasksP, SerialPrintfC; + Tasks = TasksP.Tasks; + + components new TimerMilliC() as Timer0; + TasksP.Timer0 -> Timer0; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc new file mode 100644 index 0000000000..b717945247 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc @@ -0,0 +1,75 @@ + +#define FIBONACCI_A 0 +#define FIBONACCI_B 1 + +module TasksP { + uses interface Timer as Timer0; + provides interface Tasks; + uses interface Tasks as TaskDone; +} +implementation { + + uint32_t a = FIBONACCI_A; + uint32_t b = FIBONACCI_B; + uint32_t i = 0; + uint32_t sum = 0; + uint16_t num_iterations; + uint32_t time_deadline; + bool deadline_miss=0; + //tasks + task void fibonacci(void){ + /** + * Here is the single iteration. + * On each iteration it performs the parameter @iterations is decremented. + * + */ + // printf("N=%d, %lu\n", num_iterations, a); + sum = a + b; + a = b; + b = sum; + //signal iteration done + num_iterations--; + signal TaskDone.FibonacciIterationDone(); + } + + //commands + command error_t Tasks.getFibonacci(uint16_t iterations, uint32_t deadline){ + num_iterations = iterations; + time_deadline = deadline; + + call Timer0.startOneShot(deadline); + + //printf("Posted fibonacci\nIterations:%d, deadline: %lu\n",num_iterations, time_deadline); + post fibonacci(); + + return SUCCESS; + } + + //events + event void TaskDone.FibonacciIterationDone(){ + uint32_t t0, now; + if(num_iterations && !deadline_miss) + post fibonacci(); + else{ + if(!deadline_miss){ + call Timer0.stop(); + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + signal Tasks.FibonacciDone(num_iterations, now-t0, SUCCESS); + } + } + } + + event void Timer0.fired() { + //deadline missed! + uint32_t now,t0; + deadline_miss = 1; + call Timer0.stop(); + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + signal Tasks.FibonacciDone(num_iterations, now-t0, FAIL); + } + + event void TaskDone.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ } + +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fib b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fib new file mode 100755 index 0000000000000000000000000000000000000000..27f8df5405ecbc675bdb1da328523abe0191556c GIT binary patch literal 7253 zcmeHMZ){sv6~A_z&D%n8(?G)-swd_^3e-)yv|WIyO%pfGmNskZ7Did$9Q!49>p#JM zUXvn0g9#|O5f$UZ1QM*E@c|8K(?qG%f-)sqT4_RoeVNceMYNKu1Z1SpO(OL1``zp7 zIO!(AXL79Ldw=(wd(OS*{(1M^_l;oR0hh}qG`U5MAezp5yzNL^H!4ZHFoajMh^=Ca zxDQ2?wV#6ySXMx#T9kRfHIxCjk3$aL1Wcxkw#kxM7wm&UGV2SUlGlA$h`OJ6yks9L zG=k}uayJqKasx8*JTRGZ`XC>K{z3RAcLS5P?8q%U3V09c`U8+x`(J`4nf2NB9f|nh zjzn~OBA&{P2D0hEP9;Orq`c?wG2~P`X%kJAbsLZ}Hk2=ZCQu50?a=SGzV=dg;>e91 zp_(2qW%rkL84KcSqAmJo|4B@BnT(ww43@L(mrwq6n)zyCT}=iujESatWFFT5De<;7 z_^~zkVc<6>JYL3SBL~Jbhm+})nYF_i+cX8j6k&LF3$wQ$rO|lG%w?@8^y1lcq@%;k zM#8BfF_N>hVk8q!*+USqR@p={98Za!zTW*^=FY&LO0HG5!;SvefL-{x>0L5Ko8$2h zF?z?#Wj=}B;#mqoCCr)o7>pM^-usbym?D^7rU-f+Q*_G56oEZ9dFyC?(NkpI6XP?p zO+pl&Uv?a4;tzIhaVtuTwJ=j`g^e$rxIW|TdJi6)=4Je|j?+v}F=lVyKsBeC9%Gc< zo|l-OW9-81X^Gi_SR?T(60;>SgZM>Yq!nuW+sVnlk&Jzaz(E_P0FV z;`2~my0D7MeL44d6HJQS-irp(D~)LB_(B8zU;mdozu@Y4JG*u25}o9yT|c9W(=b7? zRPT5@Q+%VA23+}B&xvPdrtD9OsjHu&KJ4cg8!t9NcVgPEzsxdZ9+>m^S?0`NpSeJt zo2C4sfx>w-x3~rEyzKtA$2%4BH%*58o=K0tc;~L;6uNh_FW16I;n1KlYd6~$Dz$^$4s-U_Aos5m=AFdIbK@B7ifR zJX`CO-RJR=2lG0xAMeC?u@Eog%*uD3^LV%X=Upd#6)E4p`o4+x3Z(A<^Eh=1{1BM+ zKLRH4oVJ7$9^c(sz+tO@P3F#$ZWdCR4 zJF~8I3Vk{Y{x0~3;9r2Xtf#B%b4JUt!CcDD8SR1gz@yvSa}w>^rmzr!>{!wc41fyvi+~j~hce-$B?1vUoyo$1N=`*! z2u8xmcmxj8sEEISw5DnfW}zKPCzDpn)^Yi7(k)QpIB}fiJqQ5DQWIsQN5Fi$p`N_2 zfWSar6XzMJ4XpKIm|rpI`K3htX}yDhoQt%_`FS3Ct;lm;lBh@S2H(LPq8{h()w18U zdWRwB9Ht)U^*hiTL7r_vR@&nH=DRlMHubm;`jFxL*F;^?NigRy^*DboA+rH_?U&`` z(_qed<~i?Ykzqfo{Q`=!;0M6ewhXW zzdtVPvA@@#cMW=76)okH@aJIKqh1|eitErJZ39J>{42;)56x2dZMdvryfo=Lzea)9 z<3&Kj2k8B_N{=u6P0-UeXjA8BkY|kPSKi}6ZytG$FNu0=$D3g7m-jZM_pwLa-&g5z ze_eu}fig|hA^#Dq?KR*AqX7f(e*L`xJ(jb5yyM7>8;R{m2)=Dto_ zn)X8P?;0Sb4v8tpOw$cKIQF68A4kDI@*PFszxkBDmE6kllJ)afEBmi-pD9p&I^`J0EMa_GK`P9WT8S_VBwPSN0 zE6k_0kn>ex^;GA)RQRJzX5qN@5@MepU06Tjv;*tcZEnW z?>3-ph3KCTJztgoabWHz)N)}~e-CN3{~rOLE61DmUZrB0Xzw@3bA7VN<=!mbLaO^G z-1Xw-8vHJ>KCigkh&LLj<7tRS@enZYJvkHW;cp8t_gO%RKLM=CK&EXC4gzz2Fdn?a z?gQrj%R2SAxgV&~=j`C&tNPCS>%h7_KD4I*+*ls(jqXPA0&%&&8{M14OTfIMi=nt{=2~bvOnrCuaVbbNmtw31bkNa&%Hr>8kl#* zy!)s99l(6uRL%7{H&F)p`iLNS9G;Izi(u3iI zDNkBvI5#SAiW*5+wiONRY2Dc-C@|yEQKCnMJf4}+TrxSP{R9tpOE(7wIu8X+jp#<_ zSG>q$o%AvkA55phkw}~k?&<5_-`QvOA2@I{7&1eh`}=}yI1h?uIFkvFnN~`Ej#w#> zA1{R2{q*6^L%m&sr$F^J0`=sliAXkQ%F|_~c-2P_^NHuo0c$v(#o@Or5zc0RZYxyCx2@A>KqkRNMgXvKd3bftG@ literal 0 HcmV?d00001 diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c new file mode 100644 index 0000000000..50c793c7fa --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c @@ -0,0 +1,69 @@ +/** + * You'll notice that we need to include a header file that + * contains functions we need to use. Being a compiled language, + * it's inefficient to include functions that aren't needed. + * stdio.h contains functions for reading from and writing to the console + */ + +#include + +/** + * In C, the program executes the main function. You should also take note + * that we must declare a return type for the function. In this case, it's + * an integer, and we return 0 to indicate successful completion of the + * program. + */ + +int fibonacci(unsigned long int n); + +int main () +{ + /* Notice that we need to declare our variables, and their type */ + + unsigned long int n; + + /* printf prints a formated string to the stdout */ + + printf("\nHow many numbers of the sequence would you like?\n"); + + /* scanf reads a formated string from the stdin. We are expecting an integer here. */ + + scanf("%d",&n); + + /* Here we call the fibonacci function */ + + fibonacci(n); + + /* Finally, return 0 */ + + return 0; +} + +/** + * This is the simple fibonacci sequence generator. Notice also, we + * declare the type of variable we expect to be passed to the function. + */ + +int fibonacci(unsigned long int n) +{ + /** + * Here we declare and set our variables. + */ + long unsigned int a = 0; + long unsigned int b = 1; + long unsigned int sum; + int i; + + /** + * Here is the standard for loop. This will step through, performing the code + * inside the braces until i is equal to n. + */ + for (i=0;ib~zjlp_5aT2%`F|%iYMlTxlAGPq;;m*dW%4 zm8hbw@gz79*#M1Jpw0y;p$@ol7<$MWUC^> zymdm_rQQje4|*STlqp~e{h|%Z9<%x4lgm?VYF%#}Y;+9SMtpR4ifkf=-4_?+?Zj zVs}S-bBnPhpe#Fa2lUB-AIFTsR2GYs^6r`y6myu{l_Y-O<-QNOi#cxI%^ZVsD0kyv zcGguO{mAfS?Rp{d-}u0?tdTd&6@?9`EnMa07TSF7$g7jq)?4V&+VlagY-4R=&rud{ zUPCi$6D>rkyE!E>Ek)_x%?V%<8~$=E_lNBDxhK23q5~t)p2X$A;pla&m%>?)=1(t5 zwvQ)2?L${0^Z1w_`PpiCFg#O<>-js*?2Kc_bb7<+&)I)=!ZA*YRXIYnr0qvprN=(&%RkN&f>)ni_8M<&dQS6GL_{g+*S)>%`pPM#*``W%L;cBUa; zx(EH_*H_~D%f8;;-rV$iZ@>P2Zu1ejFYMk!d_UKTq z+wWCIPOvc6iaN)ISLzY;P`Pq0f5G|(n$zigsca!#x}BREC-?FSYB<)?f@4DYL1$?C z%3aHnGm*Vmdn7k|bn;$EU@n%<-)9dWEOer);mH_QUUt@7*a+LBXRC1oqgh@zUp{X+ zM=aCd@NT}XEZ6FH=i5BUT=_OPe6_y$Q?jy`96Ro&exJSQJ#x%AI+^$SVb_koF+NAL zw=8qbS(bWFXJ=g2RK5gNnRyjd3)}+l3+w61TCAPN;L1~2JA4*7ur@aZ8pG5tr{xh? z9)aZ%SRR4p5m+99N@;oI`>cdg{h z$oU=Sho0YiZvuY^c?aaf5Vo&^FmWF>j~y7l;i@70Cgdmf1CTRl&+-e%`CY~hCcm4R zV@H`hfqM9sq)&6m2Y^xhpA)~Cbt5OfTPh$Qh3L96d|Axl26nf!e9BjIs3(&!Grq<^ zW8jgx#*9Q;H!CbeAU)J?278d3DV0Zc3EzT|)PM*il4c~()ZAWY2K#K(m&gQqGBJEZ z$HF2&6b+`MA`l)*pg)zHDW!Qfl1j&tiABJGE)|KBuL=WkQv_m(7_Mey5Z7J+sFLBJ z85Ds?)aXqG`y(O{GLxw^45;ks5IRC9!TwkX29juqOF;IfTK1&D4ki2hBMDQF&wrDz z1Bvs*d6wrO0GvymsAJj)xer2~Jg+f)C|lyMW@0kozIzaoxOt0s~q1$9pBt zLNt%->p7QCHQ*oi#K*CCq6GqrjQ z(iL!Z;@B~L8=`r9zIfn(S8CKn+x@Q1V;42x)qqF;b<(^aqJsUAw;jCg;AtJXy8IH# zb<(SzI|?hye7-2GEbuv^uo@jcFBImJMm-l4=8UTK zudtd;{hlhZBa7=<>A51+x>cA@0`(qLm`@(H4i)xD%=MZJZ*}xBs`9OgMJBe4SZDuH!8 z5U(q`As;xOSb{$T%=qAV@T|KHSjSHVPVV;t^Q=$l*NS~b?HMgk1J@R{A7XpkzcTpu zJTOlTb^EUX^E^@EYVlRzGMiuStQOw_=IJoH7Uj-0;tVj4m^p8}AHJt`qWw$2-UWN_ zSZ@IHELPj&`??0ll5A6k@&7IGap*68lJ~n-{BBA6KLWpH&tHXemADPeV@=)P9bley zKZl(D@L|RGB>S(xE_o#|4_o#9iBQT+o0;C;KnVW}v~+iN86E8hyYVlAVYDtnPqY-N z!bzhqp6m(64Y^Y@f|)^qUD!Z8Vn)J&N9(sV2r7(Nc#!B3A-8u%IMd%hr0ulrZ + +int a=10000,b,c=2800,d,e,f[2801],g; +int main(void){ + for(;b-c;)f[b++]=a/5; + for(;d=0,g=c*2;c-=14, printf("%.4d",e+d/a),e=d%a) + for(b=c;d+=f[b]*a,f[b]=d%--g,d/=g--,--b;d*=b); + return 0; + } diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc new file mode 100644 index 0000000000..0e8bc5212f --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc @@ -0,0 +1,39 @@ + +#include + +configuration DVSTestAppC { +} +implementation { + components MainC; + components LedsC; + components DVSTestP as App; + + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components SerialPrintfC; + + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //For tasks + components TasksC; + App.Tasks -> TasksC; + + //for Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; + + //for frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestP.nc new file mode 100644 index 0000000000..3e300862ec --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestP.nc @@ -0,0 +1,180 @@ +#include +#include +#include "Radio.h" + +#define MAX_FREQUENCY_INCREASE 5000000 +#define MAX_FREQUENCY 25000000 +#define START_FREQUENCY 25000000 + +module DVSTestP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Tasks; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; + uses interface FreqControl; +} +implementation { + + message_t pkt; + bool busy = FALSE; + uint16_t state; + uint32_t ActFrequency = 0; + uint16_t deadline; + // prototypes + error_t SendMsgTaskDone(); + error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus); + + event void Boot.booted() { + printf("Booted\n"); + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + if(call FreqControl.setMCLKFreq(START_FREQUENCY) == SUCCESS){ + ActFrequency = START_FREQUENCY; + printf("Frequency at %lu Hz\n", ActFrequency); + call AMControl.start(); //start radio + } + else + printf("err: Could not set Start Frequency\n"); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { printf("Radio started\n");} + else + call AMControl.start(); + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) + busy = FALSE; + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MicaMsg)) { + micaz_m = (MicaMsg*)payload; + /* + * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) + */ + if(micaz_m->nodeid == MICA_NODE_ID){ + //printf("Incoming msg from mica\n"); + if (!busy) { //check if radio is busy + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + return 0; + } + mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID + state = micaz_m->state; + switch(micaz_m->state){ + + case REQUEST: + printf("Mica: REQUEST\n\n"); + mist_m->state = REQUEST; + state = REQUEST; + break; + case START: + printf("Mica: START.\niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); + mist_m->state = STARTED; + call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); + state = STARTED; + deadline = micaz_m->deadline; + break; + case DEADLINE_MET: + call Leds.led2Toggle(); + printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + case DEADLINE_MISS: + call Leds.led1Toggle(); + printf("Mica: DEADLINE_MISS:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + default: + break; + } + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + if(status == SUCCESS) + if(SendMsgTaskDone()!=SUCCESS) + call Timer0.startPeriodic(1); + AdaptFrequency(elapsedTime, status); + } + event void Tasks.FibonacciIterationDone(){ } + + event void Timer0.fired() { + if(SendMsgTaskDone()==SUCCESS) + call Timer0.stop(); + } + + event void Timer1.fired() {} + + + //functions + error_t SendMsgTaskDone(){ + MoteISTMsg* mist_m; + if (!busy) {//check if radio is busy + /*build the packet*/ + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + printf("App: null pointer\n"); + return FAIL; + } + mist_m->state = DEADLINE_MET; // task done in time + state = DEADLINE_MET; + /*send the packet*/ + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ + busy = TRUE; + } + return SUCCESS; + } //if(!busy) + return FAIL; + } + + error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus){ + uint32_t newFreq; + float deadlineWindow; + deadlineWindow = deadline - deadline * 0.5; + printf("Task done! Elapsed: %lu, status: %d\n", elapsedTime, taskStatus); + printf("Act Freq is %lu Hz\n", ActFrequency); + + if(taskStatus!=SUCCESS) + newFreq = ActFrequency + MAX_FREQUENCY_INCREASE; + else{ + //ajust to finish in 20% less time of deadline + newFreq = (uint32_t) ( (((float) elapsedTime) / deadlineWindow) * ((float) ActFrequency) ); + newFreq = (newFreq/100000)*100000; //round frequency to hundreads of kHz + } + if(newFreq == ActFrequency || newFreq < 700000) + return FAIL; + + if(newFreq > MAX_FREQUENCY) + newFreq = MAX_FREQUENCY; + + if(call FreqControl.setMCLKFreq(newFreq)==SUCCESS) + ActFrequency = newFreq; + //set new frequency to the one needed in order to meet the deadline in half its time with a 20% window + printf("New Freq is %lu Hz\n", ActFrequency); + return SUCCESS; + } +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/Makefile new file mode 100644 index 0000000000..aabeeeb4e5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSTestAppC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/Tasks.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/Tasks.nc new file mode 100644 index 0000000000..2e33e2092b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/Tasks.nc @@ -0,0 +1,24 @@ +interface Tasks{ + + /* + * Calculates the fibonacci sequence numbers to the number of the parameter iterations. + * The param deadline is the deadline in miliseconds. + */ + + error_t command getFibonacci(uint16_t iterations, uint32_t deadline); + + /* + *this event is used for each iteration done in TasksP + */ + + event void FibonacciIterationDone(void); + /* + *This signals the stop of the interations for the fibonacci sequence numbers + * returns + * num_iterations: the remanining iterations at the time the event was signaled, if any. + * actualTime: the actual time the event was signaled + * status: FAIL if it missed the deadline + * SUCCESS if it has finished before deadline + */ + event void FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status); +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksC.nc new file mode 100644 index 0000000000..3e6dfa33b9 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksC.nc @@ -0,0 +1,11 @@ +configuration TasksC { + provides interface Tasks; +} +implementation { + + components TasksP, SerialPrintfC; + Tasks = TasksP.Tasks; + + components new TimerMilliC() as Timer0; + TasksP.Timer0 -> Timer0; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksP.nc new file mode 100644 index 0000000000..dcbc13cac1 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksP.nc @@ -0,0 +1,81 @@ + +#define FIBONACCI_A 0 +#define FIBONACCI_B 1 + +module TasksP { + uses interface Timer as Timer0; + provides interface Tasks; + uses interface Tasks as TaskDone; +} +implementation { + + uint32_t a = FIBONACCI_A; + uint32_t b = FIBONACCI_B; + uint32_t i = 0; + uint32_t sum = 0; + uint16_t num_iterations; + uint16_t totalIterations; + uint32_t time_deadline; + bool deadline_miss=FALSE; + + //tasks + task void fibonacci(void){ + /** + * Here is the single iteration. + * On each iteration it performs the parameter @iterations is decremented. + * + */ + // printf("N=%d, %lu\n", num_iterations, a); + sum = a + b; + a = b; + b = sum; + //signal iteration done + num_iterations--; + signal TaskDone.FibonacciIterationDone(); + } + + //commands + command error_t Tasks.getFibonacci(uint16_t iterations, uint32_t deadline){ + deadline_miss = FALSE; + num_iterations = iterations; + totalIterations = iterations; + time_deadline = deadline; + + call Timer0.startOneShot(deadline); + + //printf("Posted fibonacci\nIterations:%d, deadline: %lu, deadline miss: %d\n",num_iterations, time_deadline, deadline_miss); + post fibonacci(); + + return SUCCESS; + } + + //events + event void TaskDone.FibonacciIterationDone(){ + uint32_t t0, now; + if(num_iterations && !deadline_miss) + post fibonacci(); + else{ + if(!deadline_miss){ + call Timer0.stop(); + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + //printf("fibonacci is done in: %lu\n", now-t0); + signal Tasks.FibonacciDone(totalIterations, t0, now, SUCCESS); + } + } + } + + event void Timer0.fired() { + //deadline missed! + uint32_t now,t0; + deadline_miss = TRUE; + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + + // printf("timer fired in fibonacci: %lu\n", now-t0); + signal Tasks.FibonacciDone(num_iterations, now, t0, FAIL); + } + + event void TaskDone.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ } + +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/fibonacci/fib b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/fibonacci/fib new file mode 100755 index 0000000000000000000000000000000000000000..27f8df5405ecbc675bdb1da328523abe0191556c GIT binary patch literal 7253 zcmeHMZ){sv6~A_z&D%n8(?G)-swd_^3e-)yv|WIyO%pfGmNskZ7Did$9Q!49>p#JM zUXvn0g9#|O5f$UZ1QM*E@c|8K(?qG%f-)sqT4_RoeVNceMYNKu1Z1SpO(OL1``zp7 zIO!(AXL79Ldw=(wd(OS*{(1M^_l;oR0hh}qG`U5MAezp5yzNL^H!4ZHFoajMh^=Ca zxDQ2?wV#6ySXMx#T9kRfHIxCjk3$aL1Wcxkw#kxM7wm&UGV2SUlGlA$h`OJ6yks9L zG=k}uayJqKasx8*JTRGZ`XC>K{z3RAcLS5P?8q%U3V09c`U8+x`(J`4nf2NB9f|nh zjzn~OBA&{P2D0hEP9;Orq`c?wG2~P`X%kJAbsLZ}Hk2=ZCQu50?a=SGzV=dg;>e91 zp_(2qW%rkL84KcSqAmJo|4B@BnT(ww43@L(mrwq6n)zyCT}=iujESatWFFT5De<;7 z_^~zkVc<6>JYL3SBL~Jbhm+})nYF_i+cX8j6k&LF3$wQ$rO|lG%w?@8^y1lcq@%;k zM#8BfF_N>hVk8q!*+USqR@p={98Za!zTW*^=FY&LO0HG5!;SvefL-{x>0L5Ko8$2h zF?z?#Wj=}B;#mqoCCr)o7>pM^-usbym?D^7rU-f+Q*_G56oEZ9dFyC?(NkpI6XP?p zO+pl&Uv?a4;tzIhaVtuTwJ=j`g^e$rxIW|TdJi6)=4Je|j?+v}F=lVyKsBeC9%Gc< zo|l-OW9-81X^Gi_SR?T(60;>SgZM>Yq!nuW+sVnlk&Jzaz(E_P0FV z;`2~my0D7MeL44d6HJQS-irp(D~)LB_(B8zU;mdozu@Y4JG*u25}o9yT|c9W(=b7? zRPT5@Q+%VA23+}B&xvPdrtD9OsjHu&KJ4cg8!t9NcVgPEzsxdZ9+>m^S?0`NpSeJt zo2C4sfx>w-x3~rEyzKtA$2%4BH%*58o=K0tc;~L;6uNh_FW16I;n1KlYd6~$Dz$^$4s-U_Aos5m=AFdIbK@B7ifR zJX`CO-RJR=2lG0xAMeC?u@Eog%*uD3^LV%X=Upd#6)E4p`o4+x3Z(A<^Eh=1{1BM+ zKLRH4oVJ7$9^c(sz+tO@P3F#$ZWdCR4 zJF~8I3Vk{Y{x0~3;9r2Xtf#B%b4JUt!CcDD8SR1gz@yvSa}w>^rmzr!>{!wc41fyvi+~j~hce-$B?1vUoyo$1N=`*! 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Being a compiled language, + * it's inefficient to include functions that aren't needed. + * stdio.h contains functions for reading from and writing to the console + */ + +#include + +/** + * In C, the program executes the main function. You should also take note + * that we must declare a return type for the function. In this case, it's + * an integer, and we return 0 to indicate successful completion of the + * program. + */ + +int fibonacci(unsigned long int n); + +int main () +{ + /* Notice that we need to declare our variables, and their type */ + + unsigned long int n; + + /* printf prints a formated string to the stdout */ + + printf("\nHow many numbers of the sequence would you like?\n"); + + /* scanf reads a formated string from the stdin. We are expecting an integer here. */ + + scanf("%d",&n); + + /* Here we call the fibonacci function */ + + fibonacci(n); + + /* Finally, return 0 */ + + return 0; +} + +/** + * This is the simple fibonacci sequence generator. Notice also, we + * declare the type of variable we expect to be passed to the function. + */ + +int fibonacci(unsigned long int n) +{ + /** + * Here we declare and set our variables. + */ + long unsigned int a = 0; + long unsigned int b = 1; + long unsigned int sum; + int i; + + /** + * Here is the standard for loop. This will step through, performing the code + * inside the braces until i is equal to n. + */ + for (i=0;ib~zjlp_5aT2%`F|%iYMlTxlAGPq;;m*dW%4 zm8hbw@gz79*#M1Jpw0y;p$@ol7<$MWUC^> zymdm_rQQje4|*STlqp~e{h|%Z9<%x4lgm?VYF%#}Y;+9SMtpR4ifkf=-4_?+?Zj zVs}S-bBnPhpe#Fa2lUB-AIFTsR2GYs^6r`y6myu{l_Y-O<-QNOi#cxI%^ZVsD0kyv zcGguO{mAfS?Rp{d-}u0?tdTd&6@?9`EnMa07TSF7$g7jq)?4V&+VlagY-4R=&rud{ zUPCi$6D>rkyE!E>Ek)_x%?V%<8~$=E_lNBDxhK23q5~t)p2X$A;pla&m%>?)=1(t5 zwvQ)2?L${0^Z1w_`PpiCFg#O<>-js*?2Kc_bb7<+&)I)=!ZA*YRXIYnr0qvprN=(&%RkN&f>)ni_8M<&dQS6GL_{g+*S)>%`pPM#*``W%L;cBUa; zx(EH_*H_~D%f8;;-rV$iZ@>P2Zu1ejFYMk!d_UKTq z+wWCIPOvc6iaN)ISLzY;P`Pq0f5G|(n$zigsca!#x}BREC-?FSYB<)?f@4DYL1$?C z%3aHnGm*Vmdn7k|bn;$EU@n%<-)9dWEOer);mH_QUUt@7*a+LBXRC1oqgh@zUp{X+ zM=aCd@NT}XEZ6FH=i5BUT=_OPe6_y$Q?jy`96Ro&exJSQJ#x%AI+^$SVb_koF+NAL zw=8qbS(bWFXJ=g2RK5gNnRyjd3)}+l3+w61TCAPN;L1~2JA4*7ur@aZ8pG5tr{xh? z9)aZ%SRR4p5m+99N@;oI`>cdg{h z$oU=Sho0YiZvuY^c?aaf5Vo&^FmWF>j~y7l;i@70Cgdmf1CTRl&+-e%`CY~hCcm4R zV@H`hfqM9sq)&6m2Y^xhpA)~Cbt5OfTPh$Qh3L96d|Axl26nf!e9BjIs3(&!Grq<^ zW8jgx#*9Q;H!CbeAU)J?278d3DV0Zc3EzT|)PM*il4c~()ZAWY2K#K(m&gQqGBJEZ z$HF2&6b+`MA`l)*pg)zHDW!Qfl1j&tiABJGE)|KBuL=WkQv_m(7_Mey5Z7J+sFLBJ z85Ds?)aXqG`y(O{GLxw^45;ks5IRC9!TwkX29juqOF;IfTK1&D4ki2hBMDQF&wrDz z1Bvs*d6wrO0GvymsAJj)xer2~Jg+f)C|lyMW@0kozIzaoxOt0s~q1$9pBt zLNt%->p7QCHQ*oi#K*CCq6GqrjQ z(iL!Z;@B~L8=`r9zIfn(S8CKn+x@Q1V;42x)qqF;b<(^aqJsUAw;jCg;AtJXy8IH# zb<(SzI|?hye7-2GEbuv^uo@jcFBImJMm-l4=8UTK zudtd;{hlhZBa7=<>A51+x>cA@0`(qLm`@(H4i)xD%=MZJZ*}xBs`9OgMJBe4SZDuH!8 z5U(q`As;xOSb{$T%=qAV@T|KHSjSHVPVV;t^Q=$l*NS~b?HMgk1J@R{A7XpkzcTpu zJTOlTb^EUX^E^@EYVlRzGMiuStQOw_=IJoH7Uj-0;tVj4m^p8}AHJt`qWw$2-UWN_ zSZ@IHELPj&`??0ll5A6k@&7IGap*68lJ~n-{BBA6KLWpH&tHXemADPeV@=)P9bley zKZl(D@L|RGB>S(xE_o#|4_o#9iBQT+o0;C;KnVW}v~+iN86E8hyYVlAVYDtnPqY-N z!bzhqp6m(64Y^Y@f|)^qUD!Z8Vn)J&N9(sV2r7(Nc#!B3A-8u%IMd%hr0ulrZ + +int a=10000,b,c=2800,d,e,f[2801],g; +int main(void){ + for(;b-c;)f[b++]=a/5; + for(;d=0,g=c*2;c-=14, printf("%.4d",e+d/a),e=d%a) + for(b=c;d+=f[b]*a,f[b]=d%--g,d/=g--,--b;d*=b); + return 0; + } diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc new file mode 100644 index 0000000000..c1a27ad206 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc @@ -0,0 +1,32 @@ + +#include + +configuration DVSnoRadioC { +} +implementation { + components MainC; + components LedsC; + components DVSnoRadioP as App; + components SerialPrintfC; + + App.Boot -> MainC; + App.Leds -> LedsC; + + //For tasks (fibonacci) + components TasksC; + App.Tasks -> TasksC; + + //For ADC + components new Msp430Adc12ClientAutoRVGC() as adc; + App.adc -> adc; + App.AdcResource -> adc; + adc.AdcConfigure -> App.AdcConfigure; + + //For frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; + + //For UART + //components PlatformSerialC; + //App.UartStream -> PlatformSerialC; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc new file mode 100644 index 0000000000..da2b479107 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc @@ -0,0 +1,203 @@ +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define ADC_SAMPLE_TIME 10 //miliseconds +#define ITERATIONS 900 +#define DEADLINE 5000 +#define SAMPLES 16 + +module DVSnoRadioP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Tasks; + uses interface FreqControl; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource as AdcResource; +} +implementation { + + uint16_t adb[SAMPLES]; + //uint8_t count = 0; + uint32_t Freq = 1000000; + uint32_t ActFreq = 0; + uint32_t EndFreq = 25000000; + uint32_t Step = 500000; + uint32_t timeStart = 0; + uint32_t timeEnd = 0; + uint16_t Number = 0; + bool AdcDone = FALSE; + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureAdc(); + void frequency_sweep(); + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ADC12OSC, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_16_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + event void Boot.booted() { + //request the adc + call AdcResource.request(); + + } + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureAdc(); + } + /* + * Adc is configured, now init the system + */ + printf("Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit)\n"); + if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) + printf("Could not change the frequency to: %lu Hz. \r\n", Freq); + else + atomic ActFreq = Freq; + + call adc.getData(); + + uwait(1024*5); + atomic if(AdcDone){ + printadb(); + AdcDone=FALSE; + } + call Tasks.getFibonacci(ITERATIONS, DEADLINE); + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ + atomic timeEnd = startTime; + atomic timeStart = endTime; + + if(Freq=EndFreq){ + call Leds.led2On(); + return; + } + } + + event void Tasks.FibonacciIterationDone(){ + } + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + AdcDone = TRUE; + + } + + +//functions + void printadb(){ + uint8_t i; + uint32_t currentMean = 0; + uint32_t voltageMean = 0; + //float Gain = 37.5; //(Gm*Rout) + //float refVolt = 2.5; + //float Nmax = 4095; + //float Rsense = 1.01; + + for(i = 0; i < SAMPLES; i+=2){ + currentMean += adb[i]; + voltageMean += adb[i+1]; + } + currentMean /= SAMPLES/2; //bits + voltageMean /= SAMPLES/2; // bits + //currentMean *= refVolt/Nmax; //value in Volts + //voltageMean *= refVolt/Nmax; //value in Volts + + //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //voltageMean *= 2; // multiply by 2 to get total battery voltage + + printf("%d,%lu,%lu,%lu,%lu\n", Number, ActFreq, timeEnd, currentMean, voltageMean); + } + + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + float f = toBePrinted; + + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/Makefile new file mode 100644 index 0000000000..1e65e3cde8 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSnoRadioC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/test.txt b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/test.txt new file mode 100644 index 0000000000..98d693eacb --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/test.txt @@ -0,0 +1,165 @@ +Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) +0,25000000,0,80,1137 +2,24000000,580,462,1263 +3,23500000,594,613,1467 +4,23000000,608,597,1438 +5,22500000,623,593,1414 +6,22000000,638,589,1402 +7,21500000,653,585,1392 +8,21000000,668,564,1322 +9,20500000,684,561,1308 +10,20000000,700,553,1312 +11,19500000,717,542,1258 +12,19000000,734,538,1256 +13,18500000,752,515,1179 +14,18000000,770,516,1161 +15,17500000,788,512,1186 +16,17000000,807,434,1284 +18,16000000,843,446,1245 +19,15500000,863,440,1235 +20,15000000,884,439,1228 +21,14500000,905,441,1245 +22,14000000,927,433,1239 +23,13500000,950,423,1181 +24,13000000,973,410,1171 +25,12500000,998,385,1299 +26,12000000,1023,372,1392 +27,11500000,1049,369,1329 +28,11000000,1077,356,1313 +29,10500000,1106,334,1280 +30,10000000,1136,343,1280 +31,9500000,1167,338,1287 +32,9000000,1199,327,1251 +33,8500000,1233,319,1218 +34,8000000,1268,312,1196 +35,7500000,1306,300,1156 +36,7000000,1346,294,1178 +37,6500000,1389,292,1154 +38,6000000,1435,284,1100 +39,5500000,1485,274,1079 +40,5000000,1539,249,1335 +41,4500000,1599,482,1228 +42,4000000,1663,246,1266 +43,3500000,1735,238,1207 +44,3000000,1817,236,1355 +45,2500000,1912,214,1148 +46,2000000,2026,213,1297 +47,1500000,2162,211,1138 +48,1000000,2344,198,1099 +49,1000000,2617,199,1347 +Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) +0,1000000,0,59,1029 +1,1500000,774,61,1021 +2,2000000,969,60,1037 +3,2500000,1111,65,1040 +4,3000000,1227,75,1190 +5,3500000,1324,76,1164 +6,4000000,1409,83,1103 +7,4500000,1483,88,1255 +8,5000000,1548,100,1264 +9,5500000,1608,113,1235 +10,6000000,1662,104,1211 +11,6500000,1713,120,1257 +12,7000000,1760,124,1168 +13,7500000,1804,126,1088 +14,8000000,1845,129,1029 +15,8500000,1884,155,1027 +16,9000000,1920,160,1042 +17,9500000,1955,171,1090 +18,10000000,1987,180,1137 +19,10500000,2018,183,1137 +21,11500000,2072,198,1172 +22,12000000,2100,209,1202 +23,12500000,2127,224,1244 +24,13000000,2153,225,1236 +26,14000000,2198,244,1275 +27,14500000,2222,265,1141 +28,15000000,2244,269,1105 +29,15500000,2266,300,1131 +30,16000000,2287,301,1147 +31,16500000,2307,307,1166 +32,17000000,2327,318,1202 +33,17500000,2346,337,1272 +34,18000000,2365,371,1098 +35,18500000,2384,351,1317 +36,19000000,2402,351,1319 +37,19500000,2420,399,1392 +38,20000000,2437,377,1118 +39,20500000,2454,380,1073 +40,21000000,2471,419,1221 +41,21500000,2487,417,1239 +42,22000000,2503,434,1247 +43,22500000,2519,440,1274 +44,23000000,2534,453,1318 +45,23500000,2549,463,1342 +46,24000000,2564,472,1371 +47,24500000,2578,475,1384 +Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) +0,1000000,0,58,1018 +1,1500000,775,62,1018 +2,2000000,969,65,1036 +3,2500000,1112,67,1173 +4,3000000,1227,83,1199 +5,3500000,1325,80,1217 +6,4000000,1410,84,1092 +7,4500000,1484,88,1239 +8,5000000,1549,97,1269 +9,5500000,1608,109,1252 +10,6000000,1663,109,1195 +11,6500000,1713,115,1260 +12,7000000,1761,128,1173 +13,7500000,1805,128,1070 +14,8000000,1846,134,1002 +15,8500000,1884,158,1031 +16,9000000,1921,163,1059 +17,9500000,1955,169,1110 +18,10000000,1988,179,1122 +19,10500000,2019,189,1161 +21,11500000,2073,199,1173 +22,12000000,2101,205,1189 +23,12500000,2128,218,1224 +24,13000000,2154,233,1270 +26,14000000,2199,240,1284 +27,14500000,2222,269,1200 +28,15000000,2245,279,1136 +29,15500000,2267,288,1125 +30,16000000,2288,304,1154 +31,16500000,2308,306,1165 +32,17000000,2328,314,1189 +33,17500000,2347,335,1266 +34,18000000,2366,374,1096 +35,18500000,2385,344,1295 +36,19000000,2403,354,1323 +37,19500000,2421,376,1253 +38,20000000,2438,371,1098 +39,20500000,2455,389,1110 +40,21000000,2472,415,1211 +41,21500000,2488,426,1250 +42,22000000,2504,425,1219 +43,22500000,2520,444,1293 +44,23000000,2535,454,1315 +45,23500000,2550,453,1315 +Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) +0,1000000,0,62,1010 +1,1500000,774,60,1020 +2,2000000,969,57,1013 +3,2500000,1111,70,1058 +4,3000000,1227,77,1196 +5,3500000,1324,78,1069 +6,4000000,1409,87,1101 +7,4500000,1483,89,1179 +8,5000000,1549,95,1265 +9,5500000,1608,107,1241 +10,6000000,1662,109,1174 +11,6500000,1713,119,1304 +12,7000000,1760,124,1188 +13,7500000,1804,129,1089 +14,8000000,1845,128,987 +15,8500000,1884,157,1031 +16,9000000,1920,164,1065 +17,9500000,1954,168,1083 +18,10000000,1987,176,1114 +19,10500000,2018,191,1152 +21,11500000,2072,203,1228 +22,12000000,2100,209,1196 + diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc new file mode 100644 index 0000000000..c7b5a3fc53 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc @@ -0,0 +1,37 @@ + +#include + +configuration DVSnoRadioC { +} +implementation { + components MainC; + components LedsC; + components DVSnoRadioP as App; + components SerialPrintfC; + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components new TimerMilliC() as Timer2; + App.Boot -> MainC; + App.Leds -> LedsC; + + //For tasks (fibonacci) + components TasksC; + App.Tasks -> TasksC; + + //For ADC + components new Msp430Adc12ClientAutoRVGC() as adc; + App.adc -> adc; + App.AdcResource -> adc; + adc.AdcConfigure -> App.AdcConfigure; + + //For frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; + //timers + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + App.Timer2 -> Timer2; + //For UART + //components PlatformSerialC; + //App.UartStream -> PlatformSerialC; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc new file mode 100644 index 0000000000..ce54c33d12 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc @@ -0,0 +1,257 @@ +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define ADC_SAMPLE_TIME 10 //miliseconds +#define ITERATIONS 5000 +#define DEADLINE 9000 +#define SAMPLES 15 +#define FREQ_25MHz 25000000 +#define FREQ_1MHz 1000000 +#define FREQ_STEP FREQ_1MHz +#define SWEEP_REPOST_DELAY 50 +#define UP + +module DVSnoRadioP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Tasks; + uses interface FreqControl; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource as AdcResource; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Timer as Timer2; +} +implementation { + + uint16_t adb[SAMPLES]; + //uint8_t count = 0; + #ifdef UP + uint32_t Freq = FREQ_1MHz; + uint32_t EndFreq = FREQ_25MHz; + uint32_t ActFreq = FREQ_1MHz; + #else + uint32_t Freq = FREQ_25MHz; + uint32_t EndFreq = FREQ_1MHz; + uint32_t ActFreq = FREQ_25MHz; + #endif + uint32_t timeStart = 0; + uint32_t timeEnd = 0; + uint16_t Number = 0; + uint32_t adcStartTime, adcEndTime; + bool fibDone = FALSE; +//prototypes + //void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureAdc(); + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_1_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_64_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + /*adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + };*/ + + adc12memctl_t channelconfig [] = { + {INPUT_CHANNEL_A2, REFVOLT_LEVEL_1_5, 0}, + {INPUT_CHANNEL_A3, REFVOLT_LEVEL_1_5, 1} + }; + adc12memctl_t * adcchannelconfig = (adc12memctl_t *) channelconfig; + + task void delaySweep(){ + call Timer1.startOneShot(SWEEP_REPOST_DELAY); + } + + task void sweep(){ + uint32_t t0 = 0; + uint32_t now = 0; + + #ifdef UP + if(Freq<=EndFreq){ + #else + if(Freq>=EndFreq){ + #endif + atomic call Timer2.startOneShot(600); + atomic adcStartTime=call Timer2.gett0(); + //atomic adcStartTime=call Timer0.getdt(); + call adc.getData(); + if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) + printf("Could not change the frequency to: %lu Hz. \r\n", Freq); + else{ + ActFreq = Freq; + Number++; // increment the number of sequences calculated + } + //printf("adc.getdata; "); + //printf("tasks.getfib\n "); + atomic fibDone = FALSE; + call Tasks.getFibonacci(ITERATIONS, DEADLINE); + } + else{ + call Leds.led2On(); + call Timer0.stop(); + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + //printf("sweep: "); + printf("app end time: %lu\n", now-t0); + } + #ifdef UP + Freq+=FREQ_STEP; + #else + Freq-=FREQ_STEP; + #endif + } + + task void printadb(){ + uint8_t i; + uint32_t currentMean = 0; + uint32_t voltageMean = 0; + uint32_t vcoreMean = 0; + //float Gain = 37.5; //(Gm*Rout) + //float refVolt = 2.5; + //float Nmax = 4095; + //float Rsense = 1.01; + //printf("print adb: "); + for(i = 0; i < SAMPLES; i+=3){ + currentMean += adb[i]; + voltageMean += adb[i+1]; + vcoreMean += adb[i+2]; + } + currentMean /= SAMPLES/3; //bits + voltageMean /= SAMPLES/3; // bits + vcoreMean /= SAMPLES/3; // bits + //currentMean *= refVolt/Nmax; //value in Volts + //voltageMean *= refVolt/Nmax; //value in Volts + + //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //voltageMean *= 2; // multiply by 2 to get total battery voltage + + atomic printf("%d,%lu,%lu,%lu,%lu,%lu,%lu,%lu,%lu\n", Number, ActFreq, timeStart, timeEnd, currentMean, voltageMean, vcoreMean, adcStartTime, adcEndTime); + } + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + event void Boot.booted() { + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + //request the adc + call AdcResource.request(); + + } + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + uint32_t maxTime = 9000; + while(e != SUCCESS){ + e = configureAdc(); + } + atomic TA1R = 0; //reset timer A + call Timer0.startOneShot(maxTime); + printf("Fib Iteration Num,ActualFrequency(Hz),Fib-startTime(ms),Fib-endTime(ms),currentMean(12bit),supplyMean(12bit),vcoreMean(12bit),adcStartTime(ms),adcEndTime(ms),app startTime(ms): %lu\n", call Timer0.gett0()); + post sweep(); + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ + timeStart = startTime; + timeEnd = endTime; + atomic fibDone = TRUE; + /*if(status ==SUCCESS) + printf("tasks.fibDone; %lu\n", endTime-startTime); + else + printf("fib fail..\n");*/ + } + + event void Tasks.FibonacciIterationDone(){ } + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + //printf("data ready: post\n"); + adcEndTime=call Timer2.getNow(); + //adcEndTime=call Timer0.getdt(); + call Timer2.stop(); + + if(fibDone){ + post printadb(); + post sweep(); + } + else + post delaySweep(); + } + + event void Timer0.fired() { + //printf("Timer0 fired! end time of program not valid! \n"); + } + event void Timer1.fired() { + bool ready; + //printf("Timer1 Fired. Repost Sweep!\n"); + atomic ready = fibDone; + if(ready){ + post printadb(); + post sweep(); + } + else + call Timer1.startOneShot(SWEEP_REPOST_DELAY); + } + event void Timer2.fired() { + //printf("Timer2 fired! AdcConvertion endTime not valid!\n"); + } + //functions + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + float f = toBePrinted; + + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + e = call adc.configure(&adcconfig, adcchannelconfig, 2, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/Makefile new file mode 100644 index 0000000000..1e65e3cde8 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSnoRadioC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc new file mode 100644 index 0000000000..c1a27ad206 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc @@ -0,0 +1,32 @@ + +#include + +configuration DVSnoRadioC { +} +implementation { + components MainC; + components LedsC; + components DVSnoRadioP as App; + components SerialPrintfC; + + App.Boot -> MainC; + App.Leds -> LedsC; + + //For tasks (fibonacci) + components TasksC; + App.Tasks -> TasksC; + + //For ADC + components new Msp430Adc12ClientAutoRVGC() as adc; + App.adc -> adc; + App.AdcResource -> adc; + adc.AdcConfigure -> App.AdcConfigure; + + //For frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; + + //For UART + //components PlatformSerialC; + //App.UartStream -> PlatformSerialC; +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc new file mode 100644 index 0000000000..13bea3ef2f --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc @@ -0,0 +1,237 @@ +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define ADC_SAMPLE_TIME 10 //miliseconds +#define ITERATIONS 900 +#define DEADLINE 5000 +#define SAMPLES 16 + +module DVSnoRadioP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Tasks; + uses interface FreqControl; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource as AdcResource; +} +implementation { + + uint16_t adb[SAMPLES]; + //uint8_t count = 0; + uint32_t Freq = 1000000; + uint32_t ActFreq = 0; + uint32_t EndFreq = 25000000; + uint32_t Step = 500000; + uint32_t Time = 0; + uint16_t Number = 0; + bool AdcDone = FALSE; + bool flag = 1; + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureAdc(); + void frequency_sweep(); + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ADC12OSC, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_16_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + event void Boot.booted() { + //printf("Booted\n"); + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2Off(); + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + //request the adc + call AdcResource.request(); + + } + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureAdc(); + } + /* + * Adc is configured, now init the system + */ + printf("Number#,Frequency(Hz),Time(ms),Vin(V),I(mA)\n"); + if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) + printf("Could not change the frequency to: %lu Hz. \r\n", Freq); + else + atomic ActFreq = Freq; + + call adc.getData(); + //printf("Conversion didn't start!\n"); + + uwait(1024*5); + atomic if(AdcDone){ + printadb(); + AdcDone=FALSE; + } + call Tasks.getFibonacci(ITERATIONS, DEADLINE); + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + printf("Task done in %lu ms\n",elapsedTime); + atomic Time = elapsedTime; + if(flag){ + flag=0; + Freq=EndFreq; + if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) + printf("Could not change the frequency to: %lu Hz. \r\n", Freq); + else{ + //printf("MCLK frequency is now %lu Hz. \r\n\n", Freq); + atomic ActFreq = Freq; + atomic Number++; // increment the number of sequences calculated + } + call adc.getData(); + + call Tasks.getFibonacci(ITERATIONS+100, DEADLINE); + atomic if(AdcDone){ + printadb(); + AdcDone = FALSE; + } + } + + if(Freq==EndFreq){ + call Leds.led2On(); + return; + } + } + + event void Tasks.FibonacciIterationDone(){ + } + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + AdcDone = TRUE; + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + return FAIL; + } + +//functions + void printadb(){ + uint8_t i; + float mean = 0; + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Vout = 0; + float Current = 0; + //float Vsense = 0; + float Rsense = 1.01; + + for(i = 0; i < SAMPLES; i++){ + mean += (float) adb[i]; + //printf("Sample %d =", i); + //printfFloat((float) adb[i]); + //printf("\n"); + //printf("Vout ="); + //Vout = adb[i]*refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //printfFloat(Vout); + //printf(" V\n"); + } + mean = mean/SAMPLES; + //printf("Sample mean ="); + //printfFloat(mean); + //printf("\n"); + + //printf("Vout mean (into ADC) ="); + Vout = mean*refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //printfFloat(Vout); + //printf(" V\n"); + + //Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV + // printf("Vsense ="); + // printfFloat(Vsense); + // printf(" mV\n"); + + //Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm + //printf("Current ="); + //printfFloat(Current); + //printf(" mA\n"); + + Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + printf("%d,%lu,%lu,", Number, ActFreq, Time); + printfFloat(Vout); + printf(","); + printfFloat(Current); + //printf(" mA\n"); + //printf("\n"); + printf("\n"); + } + + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + //e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); + e = call adc.configureMultiple(&adcconfig, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/Makefile new file mode 100644 index 0000000000..1e65e3cde8 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSnoRadioC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h new file mode 100644 index 0000000000..381b58face --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h @@ -0,0 +1,11 @@ + +typedef struct uartMessage{ + uint32_t freq; //actual frequency + uint32_t time; //time elapsed + uint16_t iter; //iteration number + uint16_t num; //number of the fib sequence + float current; //current being consumed + float voltage; //battery voltage + bool lock; +} uartMessage; + diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/ConfigureAdc.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/ConfigureAdc.nc new file mode 100644 index 0000000000..28f536c255 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/ConfigureAdc.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "Msp430Adc12.h" + +interface Msp430UsciConfigure { + /** + * Return a pointer to the configuration that should be used for the ADC + */ + async command const msp430adc12_channel_config_t* getConfiguration (); + + async command const adc12memctl_t* getAdditionalChannels (); +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc new file mode 100644 index 0000000000..f5eb9ae5a8 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc @@ -0,0 +1,238 @@ +#include +#include "Msp430Adc12.h" +#include "messagetypes.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define ITERATIONS 900 +#define DEADLINE 5000 // 5sec +#define SAMPLES 16 +#define START_FREQUENCY 1000000 // 1MHz +#define STOP_FREQUENCY 25000000 // 25MHz +#define STEP_FREQUENCY 500000 // 500kHz + +module DVSnoRadioP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Tasks; + uses interface FreqControl; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource as AdcResource; + uses interface UartStream; +} +implementation { + + uint16_t adb[SAMPLES]; + uint32_t actualFreq = START_FREQUENCY; + + uartMessage message = { + freq: START_FREQUENCY, + time: 0, + iter: 0, + num: 0, + current: 0, + voltage: 0, + lock: FALSE + }; + +//prototypes + void printfFloat(float toBePrinted); + void showerror(); + error_t configureAdc(); + error_t readAdc(); + void uwait(uint32_t u); + + msp430adc12_channel_config_t adcconfig = { + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + task void sendMessage(){ + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Vout = 0; + float Rsense = 1.01; + + atomic{ + Vout = message.current * refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV + + message.current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //printf("%d,%lu,%lu,", Number, ActFreq, Time); + message.voltage *= (refVolt*2)/Nmax; //multiply by 2 to get the real batery value + + printf("%lu,%lu,%d,%d,", message.freq, message.time, message.iter, message.num); + printfFloat(message.current); + printf(","); + printfFloat(message.voltage); + printf("\n"); + message.lock=FALSE; + } + } + + event void Boot.booted() { + printf("Booted\n"); + // P1DIR |= 0x40; // P1.6 to output direction + // P2DIR |= 0x01; // P2.0 to output direction + // P1SEL |= 0x40; // P1.6 Output SMCLK + // P2SEL |= 0x01; // 2.0 Output MCLK + //request the adc + call AdcResource.request(); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureAdc(); + } + /* + * Set start frequency + */ + if(call FreqControl.setMCLKFreq(START_FREQUENCY) != SUCCESS){ + printf("error: set start frequency\n"); + showerror(); + return; + } + /* + * Read first data + */ + readAdc(); + + //Start the First Fibonacci running at START_FREQUENCY + if(call Tasks.getFibonacci(ITERATIONS,DEADLINE) != SUCCESS){ + printf("error: first fib\n"); + showerror(); + return; + } + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + bool lock; + printf("fib done: elapsed %lu\n", elapsedTime); + if(status!=SUCCESS){ + printf("error: did not finish fib\nelapsed %lu\n", elapsedTime); + showerror(); + return; + } + printf("wait adc 1\n"); + while(lock){ atomic lock = message.lock; } //wait for any adc convertion to finish + + atomic message.time = elapsedTime; + readAdc(); + + if(actualFreq==STOP_FREQUENCY){ + /* + * Finished, light green led + */ + call Leds.led2On(); + return; + } + if(START_FREQUENCY < STOP_FREQUENCY) + actualFreq += STEP_FREQUENCY; + else + actualFreq -= STEP_FREQUENCY; + + printf("wait adc 2\n"); + while(lock){ atomic lock = message.lock; } //wait for any adc convertion to finish + atomic message.num++; + atomic message.freq = actualFreq; + + if(call FreqControl.setMCLKFreq(actualFreq) != SUCCESS){ + showerror(); + atomic printf("error: in fibDone %d\n", message.num); + return; + } + + if(call Tasks.getFibonacci(ITERATIONS,DEADLINE) != SUCCESS){ + showerror(); + return; + } + + } + + event void Tasks.FibonacciIterationDone(uint16_t iter){ } + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + uint8_t i; + uint32_t current, voltage; + for(i = 0; i<(numSamples/2); i++){ + current += buffer[i]; + voltage += buffer[i+1]; + } + message.current = (float) current/(numSamples/2); + message.voltage = (float) voltage/(numSamples/2); + post sendMessage(); + } + + async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t err){ } + async event void UartStream.receivedByte (uint8_t byte) { } + async event void UartStream.receiveDone (uint8_t* buf, uint16_t len, error_t err) { } + +//functions + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + + error_t readAdc(){ + atomic message.lock=TRUE; + return call adc.getData(); + } + + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } +} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/messagetypes.h b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/messagetypes.h new file mode 100644 index 0000000000..381b58face --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/messagetypes.h @@ -0,0 +1,11 @@ + +typedef struct uartMessage{ + uint32_t freq; //actual frequency + uint32_t time; //time elapsed + uint16_t iter; //iteration number + uint16_t num; //number of the fib sequence + float current; //current being consumed + float voltage; //battery voltage + bool lock; +} uartMessage; + diff --git a/tos/platforms/MoteISTx5/tests/FlashTest/ClientC.nc b/tos/platforms/MoteISTx5/tests/FlashTest/ClientC.nc new file mode 100644 index 0000000000..3302da1492 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/FlashTest/ClientC.nc @@ -0,0 +1,12 @@ + +configuration ClientC{ + +} + +implementation +{ + components new SettingsC(); + components ClientP; + + ClientP.FlashSettings -> SettingsC; +} diff --git a/tos/platforms/MoteISTx5/tests/FlashTest/ClientP.nc b/tos/platforms/MoteISTx5/tests/FlashTest/ClientP.nc new file mode 100644 index 0000000000..839aa93791 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/FlashTest/ClientP.nc @@ -0,0 +1,50 @@ +#include + +module ClientP @safe(){ + uses interface Settings as FlashSettings; +} + +implementation +{ + uint8_t data[] = {9,33,3,2,5,6,9,25}; + + event void FlashSettings.requestLogin(){ + error_t status; + uint8_t i; + + printf("Second Client: "); + printf("Request login.\n"); + + status = call FlashSettings.login((void*) data, sizeof(data)*sizeof(uint8_t)); + switch (status){ + case EINVAL:{ + printf("Second Client Request Login -> EINVAL.\n"); + break; + } + case SUCCESS:{ + /*printf("Second Client storing to flash: "); + for(i=0; i MainC.Boot; + FlashTestP.Leds -> LedsC; + + components new SettingsC(); + FlashTestP.Settings -> SettingsC; + + components SettingsP; + FlashTestP.Init -> SettingsP; + + components Msp430FlashC; + FlashTestP.Msp430Flash -> Msp430FlashC.Msp430Flash; + + components ClientC; + } diff --git a/tos/platforms/MoteISTx5/tests/FlashTest/FlashTestP.nc b/tos/platforms/MoteISTx5/tests/FlashTest/FlashTestP.nc new file mode 100644 index 0000000000..75fe3e61e7 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/FlashTest/FlashTestP.nc @@ -0,0 +1,86 @@ + +/** + * + **/ + +#include "Timer.h" +#include + +module FlashTestP @safe() +{ + //uses interface Timer as Timer0; + uses interface Leds; + uses interface Boot; + uses interface Settings; + uses interface Init; + uses interface Msp430Flash; + } +implementation +{ + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + //prototypes + void test(void); + + uint8_t data[] = {9,33,3,2,5,6,9,25}; + event void Boot.booted(){ + printf("Booted.\n"); + + if(call Msp430Flash.isFirstBoot() == TRUE); + printf("It's First boot\n"); + + call Init.init(); // this is the first client + //if(call Client.FlashTestClient() == SUCCESS) // this is the second client + // printf("First Client: Second Client as called init"); + + } + + event void Settings.requestLogin(){ + error_t status; + uint8_t i; + + printf("First Client: "); + printf("Request login.\n"); + + status = call Settings.login((void*) data, sizeof(data)*sizeof(uint8_t)); + switch (status){ + case EINVAL:{ + printf("This is the first boot, nothing in flash memory.\n"); + + printf("Storing "); + for(i=0; i + **/ + +configuration ClockTestAppC{ +} +implementation +{ + + components MainC, ClockTestP, LedsC; + //components new TimerMilliC() as Timer0; + components SerialPrintfC; + //components PlatformSerialC; + //ClockTestP.UartByte -> PlatformSerialC; + + components Msp430FreqControlC; + ClockTestP.FreqControl -> Msp430FreqControlC; + + ClockTestP -> MainC.Boot; + //ClockTestP.Timer0 -> Timer0; + ClockTestP.Leds -> LedsC; +} + diff --git a/tos/platforms/MoteISTx5/tests/FrequencyTest/ClockTestP.nc b/tos/platforms/MoteISTx5/tests/FrequencyTest/ClockTestP.nc new file mode 100644 index 0000000000..51630f88e4 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/FrequencyTest/ClockTestP.nc @@ -0,0 +1,69 @@ + +/** + * Output MCLK and SMCLK on Boot. + * Toggle One Led to know the OS is alive + **/ + +#include "Timer.h" +#include +#include "../../../../chips/msp430/x5xxx/usci/msp430usci.h" + + +module ClockTestP @safe() +{ + //uses interface Timer as Timer0; + uses interface Leds; + uses interface Boot; + uses interface FreqControl; + + //uses interface UartByte; + } +implementation +{ + uint32_t wait = 7536640; + + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + void frequency_swype(uint32_t start_freq, uint32_t end_freq, uint32_t step){ + while(start_freq <= end_freq){ + printf("Setting MCLK frequency to %lu Hz.\n", start_freq); + if(call FreqControl.setMCLKFreq(start_freq) == FAIL ) + printf("Could not change the frequency to: %lu Hz. \r\n", start_freq); + else + printf("MCLK frequency is now %lu Hz. \r\n\n", start_freq); + start_freq = start_freq + step; + uwait(wait*5); + } + } + + event void Boot.booted(){ + uint32_t start_freq = 500000; + uint32_t end_freq = 25000000; + uint32_t step = 500000; + uint8_t source; + uint32_t freq; + + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + + printf("#\n\n|************* Starting frequency swype *************|\n\n"); + + if(call FreqControl.getMCLKSource() != SELM__DCOCLKDIV){ + printf("#MCLK is not sourced by DCOCLKDIV.\n\n"); + return; + } + printf("#MCLK is sourced by DCOCLKDIV.\n\n"); + //printf("#VCore will be ajusted to the frequency of MCLK.\n"); + printf("#Start swype at %lu Hz and end at %lu Hz. Use %lu Hz of step.\n", start_freq, end_freq, step); + + frequency_swype(start_freq, end_freq, step); + printf("#\n\n|************* Frequency swype finished *************|\n\n"); + + } +} + diff --git a/tos/platforms/MoteISTx5/tests/FrequencyTest/Makefile b/tos/platforms/MoteISTx5/tests/FrequencyTest/Makefile new file mode 100644 index 0000000000..5c7e922b29 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/FrequencyTest/Makefile @@ -0,0 +1,3 @@ +COMPONENT=ClockTestAppC +include $(MAKERULES) + diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadio.h b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadio.h new file mode 100644 index 0000000000..e0cdf181ac --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadio.h @@ -0,0 +1,22 @@ +// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ + +#ifndef BLINKTORADIO_H +#define BLINKTORADIO_H + +#ifdef TOS_NODE_ID +#undef TOS_NODE_ID +#define TOS_NODE_ID 1 +#endif + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 1500 +}; + +typedef nx_struct BlinkToRadioMsg { + nx_uint16_t nodeid; + nx_uint16_t counter; + nx_uint16_t teste; +} BlinkToRadioMsg; + +#endif diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc new file mode 100644 index 0000000000..fc7ea5dd8a --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc @@ -0,0 +1,72 @@ +// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ + +/* + * Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * Application file for the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +configuration BlinkToRadioAppC { +} +implementation { + components MainC; + components LedsC; + components BlinkToRadioC as App; + components new TimerMilliC() as Timer0; + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + components SerialPrinfC; + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc new file mode 100644 index 0000000000..c57a7d9144 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc @@ -0,0 +1,134 @@ +// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ + +/* + * Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * Implementation of the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +module BlinkToRadioC { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + uint16_t counter; + message_t pkt; + bool busy = FALSE; + + void setLeds(uint16_t val) { + if (val & 0x01) + call Leds.led0On(); + else + call Leds.led0Off(); + if (val & 0x02) + call Leds.led1On(); + else + call Leds.led1Off(); + if (val & 0x04) + call Leds.led2On(); + else + call Leds.led2Off(); + } + + event void Boot.booted() { + call AMControl.start(); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer0.startPeriodic(TIMER_PERIOD_MILLI); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void Timer0.fired() { + counter++; + if (!busy) { + BlinkToRadioMsg* btrpkt = + (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); + if (btrpkt == NULL) { + return; + } + btrpkt->nodeid = TOS_NODE_ID; + btrpkt->counter = counter; + btrpkt->teste = 23; + if (call AMSend.send(AM_BROADCAST_ADDR, + &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { + busy = TRUE; + printf("Sent a packt\n"); + } + } + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + + if (len == sizeof(BlinkToRadioMsg)) { + BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; + setLeds(btrpkt->counter); + printf("Received \nnodeid: %d\ncounter:%d\ntest:%d\n", btrpkt->nodeid, btrpkt->counter, btrpkt->test); + } + return msg; + } +} diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/Makefile b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/Makefile new file mode 100644 index 0000000000..b713521214 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/Makefile @@ -0,0 +1,3 @@ +COMPONENT=BlinkToRadioAppC +include $(MAKERULES) + diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadio.h b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadio.h new file mode 100644 index 0000000000..a81d7be699 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadio.h @@ -0,0 +1,22 @@ +// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ + +#ifndef BLINKTORADIO_H +#define BLINKTORADIO_H + +#ifdef TOS_NODE_ID +#undef TOS_NODE_ID +#define TOS_NODE_ID 1 +#endif + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 2000 +}; + +typedef nx_struct BlinkToRadioMsg { + nx_uint16_t nodeid; + nx_uint16_t counter; + nx_uint16_t teste; +} BlinkToRadioMsg; + +#endif diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioAppC.nc b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioAppC.nc new file mode 100644 index 0000000000..cfc8a87442 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioAppC.nc @@ -0,0 +1,72 @@ +// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ + +/* + * Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * Application file for the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +configuration BlinkToRadioAppC { +} +implementation { + components MainC; + components LedsC; + components BlinkToRadioC as App; + components new TimerMilliC() as Timer0; + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioC.nc b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioC.nc new file mode 100644 index 0000000000..65d7d40e4e --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioC.nc @@ -0,0 +1,131 @@ +// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ + +/* + * Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * Implementation of the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +module BlinkToRadioC { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + uint16_t counter; + message_t pkt; + bool busy = FALSE; + + void setLeds(uint16_t val) { + if (val & 0x01) + call Leds.led0On(); + else + call Leds.led0Off(); + if (val & 0x02) + call Leds.led1On(); + else + call Leds.led1Off(); + if (val & 0x04) + call Leds.led2On(); + else + call Leds.led2Off(); + } + + event void Boot.booted() { + call AMControl.start(); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer0.startPeriodic(TIMER_PERIOD_MILLI); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void Timer0.fired() { + counter++; + if (!busy) { + BlinkToRadioMsg* btrpkt = + (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); + if (btrpkt == NULL) { + return; + } + btrpkt->nodeid = TOS_NODE_ID; + btrpkt->counter = counter; + btrpkt->teste = 23; + if (call AMSend.send(AM_BROADCAST_ADDR, + &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { + busy = TRUE; + } + } + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + if (len == sizeof(BlinkToRadioMsg)) { + BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; + setLeds(btrpkt->counter); + } + return msg; + } +} diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/Makefile b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/Makefile new file mode 100644 index 0000000000..b713521214 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/Makefile @@ -0,0 +1,3 @@ +COMPONENT=BlinkToRadioAppC +include $(MAKERULES) + diff --git a/tos/platforms/MoteISTx5/tests/TimerTest/Makefile b/tos/platforms/MoteISTx5/tests/TimerTest/Makefile new file mode 100644 index 0000000000..d6c413dae3 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/TimerTest/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TimerTestC +include $(MAKERULES) + diff --git a/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestC.nc b/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestC.nc new file mode 100644 index 0000000000..b7b5f2c29f --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestC.nc @@ -0,0 +1,17 @@ + +#include + +configuration TimerTestC { +} +implementation { + components MainC; + components LedsC; + components TimerTestP as App; + components new TimerMilliC() as Timer0; + components SerialPrintfC; + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + +} diff --git a/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestP.nc b/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestP.nc new file mode 100644 index 0000000000..f62bcab261 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestP.nc @@ -0,0 +1,39 @@ + +#include +#include +#define DEADLINE 100 + +module TimerTestP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; +} +implementation { + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + + event void Boot.booted() { + P6SEL &= 0xFB; //ADC2 sel GIO func + P6DIR |= 0x04; //ADC2 sel output func + P6OUT &= 0xFB; //ADC output 0 + uwait(1000); + P6OUT |= 0x04; //ADC output 1 //start pulse + uwait(1000); + P6OUT &= 0xFB; //ADC output 0 + uwait(1000); + P6OUT |= 0x04; //ADC output 1 //start pulse + call Timer0.startPeriodic(DEADLINE); + } + + event void Timer0.fired() { + uint32_t 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+configuration PrintfAppC{ +} +implementation +{ + components MainC, PrintfP, LedsC; + components SerialPrintfC; + //components PlatformSerialC; + //ClockTestP.UartByte -> PlatformSerialC; + + PrintfP -> MainC.Boot; + PrintfP.Leds -> LedsC; +} + diff --git a/tos/platforms/MoteISTx5/tests/printf-test/PrintfP.nc b/tos/platforms/MoteISTx5/tests/printf-test/PrintfP.nc new file mode 100644 index 0000000000..587114c503 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/printf-test/PrintfP.nc @@ -0,0 +1,67 @@ + +/** + * Testing types and variables in tinyos + * Use UART to prinft + **/ + +#include + +module PrintfP @safe() +{ + uses interface Leds; + uses interface Boot; + } +implementation +{ + #define MHZ 1000000 + + uint32_t frequency = 12000000; //1 MHz + float dco0_max [] = {0.2, 0.36, 0.75, 1.51, 3.2, 6.0, 10.7, 19.6}; + float dco31_min [] = {0.7, 1.47, 3.17, 6.07, 12.3, 23.7, 39.0, 60.0}; + bool rangefound = FALSE; + float ratio = 1.12; + uint8_t RSELx = 0; + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("\n\n%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + event void Boot.booted(){ + + printf("Searching RSELx for the frequency of %d MHz.\n", (uint8_t)(frequency/MHZ)); + while(!rangefound){ + if((frequency >= (uint32_t)((dco0_max[RSELx]*ratio)*MHZ)) && (frequency < (uint32_t)((dco31_min[RSELx]/ratio)*MHZ))){ + rangefound = TRUE; + printf("RSELx found. Use RSELx = %d!\n", RSELx); + } + else{ + RSELx++; + printf("Try RSELx = %d...\n", RSELx); + } + } + } +} + diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc new file mode 100644 index 0000000000..84806b6bb5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc new file mode 100644 index 0000000000..7ea1a1ef36 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define SAMPLES 16 + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + +} + +implementation{ + + uint16_t adb[SAMPLES]; + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureMultiple(); + + event void Boot.booted(){ + call Resource.request(); + } + + event void Resource.granted(){ + uint8_t i; + error_t e = FAIL; + while(e != SUCCESS){ + e = configureMultiple(); + } + + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + + for(i=0; i<5; i++){ + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + } + + + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + printadb(); + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + return FAIL; + } +//functions + + void printadb(){ + uint8_t i; + float mean = 0; + float Gain = 37.461; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Vout = 0; + float Current = 0; + float Vsense = 0; + float Rsense = 1.01; + + for(i = 0; i < SAMPLES; i++){ + mean += (float) adb[i]; + //printf("Sample %d =", i); + //printfFloat((float) adb[i]); + //printf("\n"); + } + mean = mean/SAMPLES; + printf("Sample mean ="); + printfFloat(mean); + printf("\n"); + + printf("Vout mean (into ADC) ="); + Vout = mean*refVolt/Nmax; + printfFloat(Vout); + printf(" V\n"); + + Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV + printf("Vsense ="); + printfFloat(Vsense); + printf(" mV\n"); + + Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm + printf("Current ="); + printfFloat(Current); + printf(" mA\n"); + + Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + printf("Current ="); + printfFloat(Current); + printf(" mA\n"); + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureMultiple(){ + error_t e; + printf("Configure multipleRepeat\n"); + e = call adc.configureMultiple(&adcconfig, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile new file mode 100644 index 0000000000..d0904ef732 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile @@ -0,0 +1,2 @@ +COMPONENT=FastADCAppC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc new file mode 100644 index 0000000000..28f536c255 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "Msp430Adc12.h" + +interface Msp430UsciConfigure { + /** + * Return a pointer to the configuration that should be used for the ADC + */ + async command const msp430adc12_channel_config_t* getConfiguration (); + + async command const adc12memctl_t* getAdditionalChannels (); +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc new file mode 100644 index 0000000000..790561e6b0 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc new file mode 100644 index 0000000000..100ac4cc9e --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc @@ -0,0 +1,219 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * 2 Channels convertion + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define SAMPLES 15 + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource; +} + +implementation{ + + uint16_t adb[SAMPLES]; + + msp430adc12_channel_config_t adcconfig = { + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_1024_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + /*adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + };*/ + adc12memctl_t channelconfig [] = { + {INPUT_CHANNEL_A2, REFVOLT_LEVEL_2_5, 0}, + {INPUT_CHANNEL_A3, REFVOLT_LEVEL_2_5, 1} + }; + adc12memctl_t * adcchannelconfig = (adc12memctl_t *) channelconfig; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configure(); + + event void Boot.booted(){ + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + printf("Booting...\n"); + call Resource.request(); + } + + event void Resource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configure(); + } + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + /** + * Conversion results are ready. Results are stored in the buffer in the + * order the channels where specified in the configure() + * command, i.e. every (numMemctl+1)-th entry maps to the same channel. + * + * @param buffer Conversion results (lower 12 bit are valid, respectively). + * @param numSamples Number of results stored in buffer + */ + printadb(); + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + //functions + + void printadb(){ + uint8_t i; + uint32_t VCurrentMean = 0; + uint32_t VCoreMean = 0; + uint32_t VbatMean = 0; + + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Rsense = 1.01; + float curr=0; + float bat =0; + float core=0; + + for(i = 0; i < SAMPLES; i++){ + printf("adb[%d] = %d ->", i, adb[i]); + core = (float)adb[i]*2.5/4095; + printfFloat(core); + } + uwait(1024*6); + /* + for(i = 0; i < SAMPLES; i+=3){ + VCurrentMean += adb[i]; + VbatMean += adb[i+1]; + VCoreMean += adb[i+2]; + } + VCurrentMean /= (SAMPLES/3); //bits + VCoreMean /= (SAMPLES/3); // bits + VbatMean /= (SAMPLES/3); // bits + curr = ((float)VCurrentMean)*2.5/Nmax); + curr /= (Gain*Rsense); + curr = curr *1000;//value in mA + + bat = (((float)VCoreMean)*2.5/Nmax)*2; //value in V + + core = ((float)VCoreMean)*1.5/Nmax; // in V + //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //voltageMean *= 2; // multiply by 2 to get total battery voltage + printf("Current,Supply,Vcore\n"); + printfFloat(curr); + printf(","); + printfFloat(bat); + printf(","); + printfFloat(core); + printf("\n"); + //printf("%d,%lu,%lu,%lu,%lu,%lu\n", Number, ActFreq, Time, VCurrentMean, VbatMean, VCoreMean); + */ + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configure(){ + error_t e; + e = call adc.configure(&adcconfig, adcchannelconfig, 2, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile new file mode 100644 index 0000000000..535593717b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile @@ -0,0 +1,7 @@ +COMPONENT=FastADCAppC +#CFLAGS += -DPRINTFUART_ENABLED +#CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED + +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h new file mode 100644 index 0000000000..94c62756ea --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h @@ -0,0 +1,2 @@ +#include "Msp430Adc12.h" + diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc new file mode 100644 index 0000000000..84806b6bb5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc new file mode 100644 index 0000000000..10c452b52d --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc @@ -0,0 +1,178 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define SAMPLES 16 + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + +} + +implementation{ + + uint16_t adb[SAMPLES]; + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_8_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureMultiple(); + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + event void Boot.booted(){ + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + printf("Booting...\n"); + call Resource.request(); + } + + event void Resource.granted(){ + error_t e = FAIL; + printf("Resource Granted\n"); + while(e != SUCCESS){ + e = configureMultiple(); + } + printf("Starting 1st conversion\n"); + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + printf("Samples ready\n"); + printadb(); + uwait(4096); + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + return FAIL; + } +//functions + + void printadb(){ + uint16_t i; + float voltage = 0; + printf("Printing buffer\n"); + for(i = 0; i < SAMPLES; i++){ + printf("adb[%d] = %d ->", i, adb[i]); + voltage = adb[i]*2.5/4095; + printfFloat(voltage); + } + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d Volt\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureMultiple(){ + error_t e; + printf("Configure multipleRepeat\n"); + e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile new file mode 100644 index 0000000000..535593717b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile @@ -0,0 +1,7 @@ +COMPONENT=FastADCAppC +#CFLAGS += -DPRINTFUART_ENABLED +#CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED + +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput new file mode 100644 index 0000000000..741e490853 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput @@ -0,0 +1,244 @@ +Configure multipleRepeat +Starting the ADC... + +Printing ADC set of samples Nº0. +Sample 0 = 3830.000 +Sample 1 = 2989.000 +Sample 2 = 2546.000 +Sample 3 = 2283.000 +Sample 4 = 2114.000 +Sample 5 = 2010.000 +Sample 6 = 1929.000 +Sample 7 = 1875.000 +Sample 8 = 1839.000 +Sample 9 = 1812.000 +Sample 10 = 1805.000 +Sample 11 = 1786.000 +Sample 12 = 1781.000 +Sample 13 = 1769.000 +Sample 14 = 1776.000 +Sample 15 = 1761.000 +Sample mean = 2119.062 +Vout mean (into ADC) = 1.293 V +Vsense = 34.534 mV +Current = 34.192 mA + +Printing ADC set of samples Nº1. +Sample 0 = 1695.000 +Sample 1 = 1721.000 +Sample 2 = 1695.000 +Sample 3 = 1692.000 +Sample 4 = 1697.000 +Sample 5 = 1702.000 +Sample 6 = 1692.000 +Sample 7 = 1697.000 +Sample 8 = 1698.000 +Sample 9 = 1688.000 +Sample 10 = 1695.000 +Sample 11 = 1740.000 +Sample 12 = 1701.000 +Sample 13 = 1690.000 +Sample 14 = 1703.000 +Sample 15 = 1691.000 +Sample mean = 1699.812 +Vout mean (into ADC) = 1.037 V +Vsense = 27.701 mV +Current = 27.427 mA + +Printing ADC set of samples Nº2. +Sample 0 = 1836.000 +Sample 1 = 1832.000 +Sample 2 = 1836.000 +Sample 3 = 1835.000 +Sample 4 = 1830.000 +Sample 5 = 1834.000 +Sample 6 = 1836.000 +Sample 7 = 1826.000 +Sample 8 = 1834.000 +Sample 9 = 1836.000 +Sample 10 = 1839.000 +Sample 11 = 1849.000 +Sample 12 = 1834.000 +Sample 13 = 1850.000 +Sample 14 = 1832.000 +Sample 15 = 1835.000 +Sample mean = 1835.875 +Vout mean (into ADC) = 1.120 V +Vsense = 29.919 mV +Current = 29.622 mA + +Printing ADC set of samples Nº3. +Sample 0 = 1876.000 +Sample 1 = 1882.000 +Sample 2 = 1875.000 +Sample 3 = 1890.000 +Sample 4 = 1873.000 +Sample 5 = 1887.000 +Sample 6 = 1873.000 +Sample 7 = 1873.000 +Sample 8 = 1878.000 +Sample 9 = 1872.000 +Sample 10 = 1874.000 +Sample 11 = 1888.000 +Sample 12 = 1883.000 +Sample 13 = 1877.000 +Sample 14 = 1879.000 +Sample 15 = 1880.000 +Sample mean = 1878.750 +Vout mean (into ADC) = 1.146 V +Vsense = 30.617 mV +Current = 30.314 mA + +Printing ADC set of samples Nº4. +Sample 0 = 1909.000 +Sample 1 = 1904.000 +Sample 2 = 1907.000 +Sample 3 = 1905.000 +Sample 4 = 1906.000 +Sample 5 = 1900.000 +Sample 6 = 1909.000 +Sample 7 = 1898.000 +Sample 8 = 1910.000 +Sample 9 = 1909.000 +Sample 10 = 1911.000 +Sample 11 = 1910.000 +Sample 12 = 1908.000 +Sample 13 = 1905.000 +Sample 14 = 1908.000 +Sample 15 = 1910.000 +Sample mean = 1906.812 +Vout mean (into ADC) = 1.164 V +Vsense = 31.075 mV +Current = 30.767 mA + +Printing ADC set of samples Nº5. +Sample 0 = 1907.000 +Sample 1 = 1922.000 +Sample 2 = 1907.000 +Sample 3 = 1913.000 +Sample 4 = 1911.000 +Sample 5 = 1909.000 +Sample 6 = 1911.000 +Sample 7 = 1909.000 +Sample 8 = 1907.000 +Sample 9 = 1954.000 +Sample 10 = 1912.000 +Sample 11 = 1898.000 +Sample 12 = 1907.000 +Sample 13 = 1899.000 +Sample 14 = 1908.000 +Sample 15 = 1925.000 +Sample mean = 1912.437 +Vout mean (into ADC) = 1.167 V +Vsense = 31.166 mV +Current = 30.858 mA + +Printing ADC set of samples Nº6. +Sample 0 = 1903.000 +Sample 1 = 1905.000 +Sample 2 = 1908.000 +Sample 3 = 1906.000 +Sample 4 = 1903.000 +Sample 5 = 1906.000 +Sample 6 = 1909.000 +Sample 7 = 1904.000 +Sample 8 = 1903.000 +Sample 9 = 1902.000 +Sample 10 = 1905.000 +Sample 11 = 1896.000 +Sample 12 = 1914.000 +Sample 13 = 1894.000 +Sample 14 = 1905.000 +Sample 15 = 1900.000 +Sample mean = 1903.937 +Vout mean (into ADC) = 1.162 V +Vsense = 31.028 mV +Current = 30.721 mA + +Printing ADC set of samples Nº7. +Sample 0 = 1895.000 +Sample 1 = 1903.000 +Sample 2 = 1894.000 +Sample 3 = 1890.000 +Sample 4 = 1891.000 +Sample 5 = 1898.000 +Sample 6 = 1896.000 +Sample 7 = 1901.000 +Sample 8 = 1891.000 +Sample 9 = 1888.000 +Sample 10 = 1899.000 +Sample 11 = 1916.000 +Sample 12 = 1897.000 +Sample 13 = 1896.000 +Sample 14 = 1890.000 +Sample 15 = 1899.000 +Sample mean = 1896.500 +Vout mean (into ADC) = 1.157 V +Vsense = 30.907 mV +Current = 30.601 mA + +Printing ADC set of samples Nº8. +Sample 0 = 1887.000 +Sample 1 = 1886.000 +Sample 2 = 1885.000 +Sample 3 = 1881.000 +Sample 4 = 1885.000 +Sample 5 = 1892.000 +Sample 6 = 1886.000 +Sample 7 = 1907.000 +Sample 8 = 1889.000 +Sample 9 = 1898.000 +Sample 10 = 1889.000 +Sample 11 = 1886.000 +Sample 12 = 1889.000 +Sample 13 = 1898.000 +Sample 14 = 1880.000 +Sample 15 = 1883.000 +Sample mean = 1888.812 +Vout mean (into ADC) = 1.153 V +Vsense = 30.781 mV +Current = 30.477 mA + +Printing ADC set of samples Nº9. +Sample 0 = 1867.000 +Sample 1 = 1860.000 +Sample 2 = 1869.000 +Sample 3 = 1866.000 +Sample 4 = 1863.000 +Sample 5 = 1869.000 +Sample 6 = 1870.000 +Sample 7 = 1870.000 +Sample 8 = 1871.000 +Sample 9 = 1869.000 +Sample 10 = 1868.000 +Sample 11 = 1880.000 +Sample 12 = 1871.000 +Sample 13 = 1867.000 +Sample 14 = 1870.000 +Sample 15 = 1862.000 +Sample mean = 1868.250 +Vout mean (into ADC) = 1.140 V +Vsense = 30.446 mV +Current = 30.145 mA + +Printing ADC set of samples Nº9. +Sample 0 = 1867.000 +Sample 1 = 1860.000 +Sample 2 = 1869.000 +Sample 3 = 1866.000 +Sample 4 = 1863.000 +Sample 5 = 1869.000 +Sample 6 = 1870.000 +Sample 7 = 1870.000 +Sample 8 = 1871.000 +Sample 9 = 1869.000 +Sample 10 = 1868.000 +Sample 11 = 1880.000 +Sample 12 = 1871.000 +Sample 13 = 1867.000 +Sample 14 = 1870.000 +Sample 15 = 1862.000 +Sample mean = 1868.250 +Vout mean (into ADC) = 1.140 V +Vsense = 30.446 mV +Current = 30.145 mA diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc new file mode 100644 index 0000000000..84806b6bb5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc new file mode 100644 index 0000000000..e2217331f6 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define SAMPLES 16 + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + +} + +implementation{ + + uint16_t adb[SAMPLES]; + uint8_t count = 0; + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A2, + //sref: REFERENCE_VREFplus_VREFnegterm, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_8_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void uwait(uint32_t u); + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureMultipleRepeat(); + + event void Boot.booted(){ + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2Off(); + call Resource.request(); + } + + event void Resource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureMultipleRepeat(); + } + //printf("Starting the ADC...\n"); + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + //if(count<20){ + printadb(); + // count++; + // } + // else + // return NULL; + // uwait(1024*6); + call Leds.led2Toggle(); + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + return FAIL; + } +//functions + + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + void printadb(){ + uint8_t i; + float mean = 0; + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Vout = 0; + float Current = 0; + float Vsense = 0; + float Rsense = 1.01; + //printf("Sample,Vin(V)\n"); + for(i = 0; i < SAMPLES; i++){ + mean += (float) adb[i]; + //printfFloat((float) adb[i]); + //printf(","); + Vout = adb[i]*refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //printfFloat(Vout); + //printf("\n"); + } + mean = mean/SAMPLES; + //printf("Sample mean ="); + //printfFloat(mean); + //printf("\n"); + // printf("Mean(V),Vsense(mV),Current(mA),Current(mA)\n"); + //printf("Vout corrected with \" ((float)((uint8_t)(Vout*100)))/100 \" = "); + Vout = mean*refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //printf("Mean Voltage: "); + printfFloat(Vout); + printf("\n"); + /* + Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV + //printf("Vsense ="); + printfFloat(Vsense); + printf(","); + + Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm + //printf("Current ="); + printfFloat(Current); + printf(","); + + Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //printf("Current ="); + printfFloat(Current); + //printf(" mA\n"); + //printf("\n"); + printf("\n");*/ + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2, f3; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + f3 = f*10000;f3 %= 10; + printf("%ld.%d%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2, (uint8_t) f3); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureMultipleRepeat(){ + error_t e; + //printf("Configure multipleRepeat\n"); + e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile new file mode 100644 index 0000000000..535593717b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile @@ -0,0 +1,7 @@ +COMPONENT=FastADCAppC +#CFLAGS += -DPRINTFUART_ENABLED +#CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED + +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcCurrent1MHz.csv b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcCurrent1MHz.csv new file mode 100644 index 0000000000000000000000000000000000000000..add09c2b9852a8eee9f5b4caca5bd7f0fc189b37 GIT binary patch literal 6801 zcmbuEOOM<*41{y;Uy=ZgfgY4BAA>#Tw7}eR=)(e=!6J|UA5z?L*~JFD#^$0S)Rv{v zrxNLW`19+xfBt^lU;ldh`1 z_cVUrJ-@bF?mCh8`7Ab{fwCz z)ZeSd>!v|gy*0+1^N?Ff=r2XbU$;Hd@l=Dc?U6oTwSU`_tbd2NBs^bg)$uXkqI(|W zh~{JDgof#y$2_ z>>LO*l%Zb0{bjelRW+~2@viu37BNkStP@xDMvJr|O(SQ=eT{yJIZgjOTjc{Jm+r+NJscUNsl)5z(L1Ir(o%d>l$^Mv51M@}MF z+z(Bj=bzBj^8$XJ`*-(+-q@Ek6|p30xTZr(7>lfuIjf^EC(l=zGiYvgQp_80wyh3g z|6=Z9KaEeE#e4sZb2=9T8Yj)IE@`TV+Bj`88%@hB(uOpR_de#}eu_E!z0du-eSelG zoN@~9@O+cT<9nR$?dYdqVAgHHkB|MAG=29|aX;-|HJd(!u*c?jQuXwRmbPK|D1E2yZ>KD{YOrjBhC*47tnC}TlhWtz0QIr zp1)Ge9G>NyR0nZg6!YODm;C!{oI0RgCZMIya!MQKl(`DuiE!5ao`xoV&l0!HJ=IO@ zr;$7OvDM?TPQsp9eb4>OZH(d9R<~W!^u6A%UhfxoSIyv#XFvKWG;^*nhxr{Ta0{<+ zKitLk-70Vg&1U`2oQJ#ud+K!;bGMtH<*Ol2!P&Qbv=q#*F7=wG;u-0(_;;z9`j5JX zI_lIPF(=Oh5Su>*?uc{#o*DfUYn*i&&xh-{6&m}wfyS0U$NculHP7cFr<2TOc)h>O zNc1Z(a|(@SeIDwb9S6_y)xa&*;Q1uRpPYp6SkQEG9yo<&evi|5!H?lZGV3lr7r1jp z^OQ@PN}KuVSiIhMP9<_mT!nj|zXvc!;k!T9nz)e(>1oB` za7gKwFJHg?_2=XM{Kw0u=g+s0!_%UF_vLA+F{qtk%c}MYJ4dw>>?CRnY*_~DH_Ydv z^Spn-{A&AE*qiOg^KA2avR8HN&A-k3InV$8_-Z)ZpMN}Femv~I-+q4o{&@NO)3;ww z|KALtyx!we&P%Z&x~0R7Fs(bLA*}k%8sE+k!loG3{Y*j6GnnV~Z10$dP!zLn|2;-TOSwr7vpwgdj?Z;;GUi|%*lqhEw2M%8fE8A zkeY8%a7HOi5!~2SJqQF#$u-Jc$W0kyr-n59ims>DM3p ziBadz>!&c4yeW#Mti=X}=XD@VLxB%LH1`X5pn0xw2L{elwt<=R9Q!%1fLW-P2W(%h z$9WnrnWr7EndfYu_nX30!7yfSvf3aiybgqE6!?@ESjkjzc;@)@+jPhbUW~U;|-#$xG&O1;!dSnUQ;cv^sANO@4#fmuwZ|A>j}FXpX}i3{=~=5U+BG?Yfr)ysd{nx5)FnD+V! zA6y@ChSnD(oVoExXnm)b#LJGy_`UOv?Zfw5UB8;=^@!1^kC?*rqjjJAQ|9TFU7=Ur zU&1HXTVOD*`@9|)xSk>=<9_x1{o?{{QvN7U!CT|?6sDmzW^S9;{Z_Gp7OqR4;tZ~j zq@TD~=@miXaFep8srY8`1^Vk`e^YIR=+!nD&< z=3N2CA*x;#@Fs}eTY&la9>%<58yI|~|BMUz<7jv3PCw84F)w-j6sDoJ3sec#`iH!D z-PhaQ`EJ_xr{Kv@PcQpd_&mNRAtqk;*#_pWf52$i2MA)`@~YEw#9V^i)6Vu3rf)oL z&3;+Mc`6-GxvqBoD9-HtCvwO25`@0nU znXdclkP=j{YF_>u!ePst`z?^KY-7!uh0tDNAPs0uY9k&Xzx-wbUcO6{_cdhdL3t;A;h&XdX+I@!}kl2Jacz@cMrTr^m#bK!syLeWX#{T-- zb$9o2IKIF2+x_clv%jzC!3>|R8I7-k`Swh9_m}>3>BnzR zpXYOb`q&&F;X7Z&1`?jwFbQueWQMVn@X`rV7g3Pei72E%eY}dPeWir98)@0bu?g&K zLkei==}I}^TDnAVU%H1;E1CTfp`~YA;+INh*Txiz^V+o5FU}GqP)pJYSrv z;r*j#I&epd1C`Kt*l;{-I36~fJZzLND@2iAWVjDKDQYD%ZfK767R{oerJs(!yp4Ao zW>PF!%xY#9jmS(o9oM9Li@!|w76qu-IE%)&i$|G`8V?w@w{@AZwnUZD456omd}eD#{zE|tEhvm^P#D=zrGr^PXeAIL zrRj~{xK8A$WLA&TBGw!6`_o`nU?vp{=AP@NpP*#M{htM9q7j*;$C8^Z?yIN4i)6jv zKFPy(IVH28Gt+Tj>zH7dud@>Q;s0GFYFf#R`xymh#E;Rzh&q$*AFi#f$XuREX1{)L UrgK5PAYI8zKVceuZgxW}^od2Tf{+Nr`h8s1Lh>7VdA2ERLBsor5*9 z;GTpQu567A%=*_K(d@ts%tVA$Px literal 0 HcmV?d00001 diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcErrorVREFneg.csv b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcErrorVREFneg.csv new file mode 100644 index 0000000000000000000000000000000000000000..cba180b4056262c846eb6e9706bde2e87fa8593f GIT binary patch literal 6164 zcmb`LJ8#@D5QJ0fm)O7|;7hMENbM@X^)6Hdh!26C{QpQ?0lJSyCZytPc#B=`&W?r; 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IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + + +configuration FastADCAppC { } + +implementation { + + components MainC, FastADCC as App; + App -> MainC.Boot; + + components LedsC; + App.Leds -> LedsC; + + components new Msp430Adc12ClientAutoRVGC() as Fadc; + App.overflow -> Fadc; + App.adc -> Fadc; + App.Resource -> Fadc; + Fadc.AdcConfigure -> App.AdcConfigure; + components SerialPrintfC; + + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc new file mode 100644 index 0000000000..a897ef06f5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Simple test application to test ADC + * Single ADC channel doing repeated conversions + * @author: João Gonçalves + */ + +#include "Timer.h" +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +module FastADCC{ + provides { + interface AdcConfigure as AdcConfigure; + } + uses interface Boot; + uses interface Leds; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource; + +} + +implementation{ + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + +//prototypes + void showerror(); + error_t configureSingleRepeat(); + void printfFloat(float toBePrinted); + + + event void Boot.booted(){ + printf("Booting...\n"); + call Resource.request(); + } + + event void Resource.granted(){ + error_t e = FAIL; + printf("Resource Granted\n"); + while(e != SUCCESS){ + e = configureSingleRepeat(); + } + printf("Starting 1st conversion\n"); + if(call adc.getData() != SUCCESS) + printf("Conversion didn't start!\n"); + } + + async event error_t adc.singleDataReady(uint16_t data){ + float voltage = 0; + printf("Sample: %d\nVoltage: ", data); + voltage = data*2.5/4095; + printfFloat(voltage); + return SUCCESS; + } + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + } + +//functions + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureSingleRepeat(){ + error_t e; + printf("Configure singleRepeat\n"); + e = call adc.configureSingleRepeat(&adcconfig, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/Makefile new file mode 100644 index 0000000000..535593717b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/Makefile @@ -0,0 +1,7 @@ +COMPONENT=FastADCAppC +#CFLAGS += -DPRINTFUART_ENABLED +#CFLAGS += -DADC12_ONLY_WITH_DMA +# already defined in msp430/adc12/Msp430Adc12.h +#CFLAGS += -DADC12_TIMERA_ENABLED + +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/Makefile new file mode 100644 index 0000000000..95184a0aae --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/Makefile @@ -0,0 +1,2 @@ +COMPONENT=MicaTaskC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskC.nc new file mode 100644 index 0000000000..da1aeb47d6 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskC.nc @@ -0,0 +1,26 @@ +configuration MicaTaskC { +} +implementation { + components MainC; + components LedsC; + components MicaTaskP as App; + + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //for Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskP.nc new file mode 100644 index 0000000000..e28f400ccd --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskP.nc @@ -0,0 +1,156 @@ +#include +#include "../RadioAdc/Radio.h" + +module MicaTaskP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + message_t pkt; + bool busy = FALSE; + bool up = TRUE; + uint16_t missedDeadlines = 0; + uint16_t metDeadlines = 0; + uint16_t deadline = 100; //now using this one instead of the one in radio.h + uint16_t iterations = 100; //now using this one instead of the one in radio.h + uint16_t numRequest = 0; //serves as a counter for rasing or lowering the iteration number + uint16_t requestNum = 0;//count the number of requests so far + //prototypes + error_t MicaSendMsg(uint8_t state); + + event void Boot.booted() { + call AMControl.start(); //start radio + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer1.startPeriodic(PERIOD); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MoteISTMsg)) { + mist_m = (MoteISTMsg*)payload; + if(mist_m->nodeid == MOTEIST_NODE_ID){ + if (!busy) { //check if radio is busy + micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); + if (micaz_m == NULL){ + return 0; + } + micaz_m->nodeid = MICA_NODE_ID; //assign Micaz ID + micaz_m->task_i = iterations; + micaz_m->deadline = deadline; + micaz_m->missed = missedDeadlines; + micaz_m->met = metDeadlines; + + switch (mist_m->state){ + case REQUEST: // MoteIST ready for start + micaz_m->state = START; + break; + case STARTED: // MoteIST has started + call Timer0.startOneShot(deadline); + return msg; // At this point don't need to send msg to MoteIST, return + case DEADLINE_MET: + call Timer0.stop(); //stop timer, deadline is met + call Leds.led1Toggle(); + micaz_m->met = ++metDeadlines; + micaz_m->state = DEADLINE_MET; + break; + case DEADLINE_MISS: // MoteIST missed the deadline, too bad.. but nothing to do here + return msg; + default: + } + if(call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + + + event void Timer0.fired(){ //deadline Reached + missedDeadlines++; + call Leds.led0Toggle(); + MicaSendMsg(DEADLINE_MISS); + } + + event void Timer1.fired(){ //make new request + requestNum++; + MicaSendMsg(REQUEST); + numRequest++; + + if(numRequest>3){ + switch(up){ + case TRUE: + if(iterations < ITERATIONS) + iterations += 200; + else{ + up = FALSE; + return; + } + break; + case FALSE: + if(iterations > 200) + iterations -= 200; + else{ + call Timer1.stop(); + return; + } + break; + default: + } + numRequest=0; + } + } + + //functions + error_t MicaSendMsg(uint8_t state){ + + MicaMsg* micaz_m; + if (!busy) { //check if radio is busy + micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); + if (micaz_m == NULL){ + return FAIL; + } + micaz_m->nodeid = MICA_NODE_ID; + micaz_m->request = requestNum; + micaz_m->task_i = iterations; // 0 for deadline miss + micaz_m->deadline = deadline; + micaz_m->missed = missedDeadlines; + micaz_m->met = metDeadlines; + micaz_m->state = state; + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { + busy = TRUE; + } + } + return SUCCESS; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Makefile new file mode 100644 index 0000000000..ac59737e3b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Makefile @@ -0,0 +1,2 @@ +COMPONENT=RadioAdcC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Radio.h b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Radio.h new file mode 100644 index 0000000000..67f949c958 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Radio.h @@ -0,0 +1,43 @@ +#define MOTEIST_NODE_ID 1 //for MoteIST +#define MICA_NODE_ID 2 +#define ITERATIONS 5000 +#define DEADLINE 100 +#define PERIOD 200 + + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 1000, + DEADLINE_MISS = 4, + DEADLINE_MET = 3, + STARTED = 2, + START = 1, + REQUEST = 0 +}; + +typedef nx_struct MicaMsg { + nx_uint16_t nodeid; //node id + nx_uint16_t request; + nx_uint8_t state; // state of operation + nx_uint16_t task_i; //number of iterations to perform the task: passing 0 means deadline missed + nx_uint16_t deadline; //deadline for the task: passing 0 means this is a request to start + nx_uint16_t missed; //number of missed deadlines so far + nx_uint16_t met; + +} MicaMsg; + +typedef nx_struct MoteISTMsg { + nx_uint16_t nodeid; //node id + nx_uint16_t state; +} MoteISTMsg; + + +/* + * The MicaMsg struct + * + * parameter @state has the state of mica's operation such as: + * 0 - requesting + * 1 - start order + * 2 - deadline met + * 3 - deadline missed + */ diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcC.nc new file mode 100644 index 0000000000..375839c82b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcC.nc @@ -0,0 +1,44 @@ +#include + +configuration RadioAdcC { +} +implementation { + components MainC; + components LedsC; + components RadioAdcP as App; + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components SerialPrintfC; + + App.Boot -> MainC; + App.Leds -> LedsC; + + //timers + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //tasks (fibonacci) + components TasksC; + App.Tasks -> TasksC; + + //ADC + components new Msp430Adc12ClientAutoRVGC() as adc; + App.adc -> adc; + App.AdcResource -> adc; + adc.AdcConfigure -> App.AdcConfigure; + + //Frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; + + //Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcP.nc new file mode 100644 index 0000000000..94190a0139 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcP.nc @@ -0,0 +1,308 @@ +#include +#include +#include "Radio.h" +#include "Msp430Adc12.h" + + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif +#define MAX_FREQUENCY_INCREASE 5000000 +#define MAX_FREQUENCY 25000000 +#define START_FREQUENCY 25000000 +#define SAMPLES 16 + +module RadioAdcP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Tasks; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; + uses interface FreqControl; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource as AdcResource; +} +implementation { + + message_t pkt; + bool busy = FALSE; + uint16_t state; + uint32_t ActFrequency = 0; + uint16_t deadline; + uint16_t requestNum; + + uint16_t adb[SAMPLES]; + bool AdcDone = FALSE; + + //prototypes + void print(uint16_t iterations, uint32_t elapsedTime, error_t status); + void showerror(); + error_t configureAdc(); + + error_t SendMsgTaskDone(); + error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus); + void uwait(uint32_t u); + void printfFloat(float toBePrinted); + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ADC12OSC, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_16_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + + event void Boot.booted() { + printf("Iterations,Deadline,Frequency,ElapsedTime,Current,Voltage,Status\n"); + + if(call FreqControl.setMCLKFreq(START_FREQUENCY) == SUCCESS){ + ActFrequency = START_FREQUENCY; + //printf("Frequency at %lu Hz\n", ActFrequency); + //request the adc + call AdcResource.request(); + } + else + printf("err: Could not set Start Frequency\n"); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureAdc(); + } + call adc.getData(); + uwait(1024*5); + atomic if(AdcDone){ + print(0, 0, 0); + AdcDone=FALSE; + } + call AMControl.start(); //start radio + } + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + AdcDone = TRUE; + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { /*printf("Radio started\n");*/} + else + call AMControl.start(); + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) + busy = FALSE; + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MicaMsg)) { + micaz_m = (MicaMsg*)payload; + /* + * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) + */ + if(micaz_m->nodeid == MICA_NODE_ID){ + //printf("Incoming msg from mica\n"); + if (!busy) { //check if radio is busy + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + return 0; + } + mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID + state = micaz_m->state; + switch(micaz_m->state){ + + case REQUEST: + //printf("Mica: REQUEST\n\n"); + mist_m->state = REQUEST; + state = REQUEST; + break; + case START: + //printf("Mica: START.\niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); + mist_m->state = STARTED; + call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); + requestNum = micaz_m->request; + deadline = micaz_m->deadline; + break; + case DEADLINE_MET: + call Leds.led2Toggle(); + //printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + case DEADLINE_MISS: + call Leds.led1Toggle(); + //printf("Mica: DEADLINE_MISS:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + default: + break; + } + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + call adc.getData(); + + if(status == SUCCESS) + if(SendMsgTaskDone()!=SUCCESS) + call Timer0.startPeriodic(1); + + AdaptFrequency(elapsedTime, status); + + atomic if(AdcDone){ + print(iterations, elapsedTime, status); + AdcDone=FALSE; + } + } + event void Tasks.FibonacciIterationDone(){ } + + event void Timer0.fired() { + if(SendMsgTaskDone()==SUCCESS) + call Timer0.stop(); + } + + event void Timer1.fired() {} + + + //functions + error_t SendMsgTaskDone(){ + MoteISTMsg* mist_m; + if (!busy) {//check if radio is busy + /*build the packet*/ + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + printf("App: null pointer\n"); + return FAIL; + } + mist_m->state = DEADLINE_MET; // task done in time + state = DEADLINE_MET; + /*send the packet*/ + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ + busy = TRUE; + } + return SUCCESS; + } //if(!busy) + return FAIL; + } + + error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus){ + uint32_t newFreq; + float deadlineWindow; + deadlineWindow = deadline - deadline * 0.5; + //printf("Task done! Elapsed: %lu, status: %d\n", elapsedTime, taskStatus); + //printf("Act Freq is %lu Hz\n", ActFrequency); + + if(taskStatus!=SUCCESS) + newFreq = ActFrequency + MAX_FREQUENCY_INCREASE; + else{ + //ajust to finish in 20% less time of deadline + newFreq = (uint32_t) ( (((float) elapsedTime) / deadlineWindow) * ((float) ActFrequency) ); + newFreq = (newFreq/100000)*100000; //round frequency to hundreads of kHz + } + if(newFreq == ActFrequency || newFreq < 700000) + return FAIL; + + if(newFreq > MAX_FREQUENCY) + newFreq = MAX_FREQUENCY; + + if(call FreqControl.setMCLKFreq(newFreq)==SUCCESS) + ActFrequency = newFreq; + //set new frequency to the one needed in order to meet the deadline in half its time with a 20% window + //printf("New Freq is %lu Hz\n", ActFrequency); + return SUCCESS; + } + + void print(uint16_t iterations, uint32_t elapsedTime, error_t status){ + uint8_t i; + float currentMean = 0; + float voltageMean = 0; + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Rsense = 1.01; + + for(i = 0; i < SAMPLES; i+=2){ + currentMean += (float) adb[i]; + voltageMean += (float) adb[i+1]; + } + currentMean /= SAMPLES/2; //bits + voltageMean /= SAMPLES/2; // bits + currentMean *= refVolt/Nmax; //value in Volts + voltageMean *= refVolt/Nmax; //value in Volts + + currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //voltageMean *= 2; // multiply by 2.92 to get total battery voltage + + printf("%d,%d,%d,%lu,%lu,%d,", requestNum, iterations, deadline, ActFrequency, elapsedTime, status); + printfFloat(currentMean); + printf(","); + printfFloat(voltageMean); + printf("\n"); + } + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + float f = toBePrinted; + + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc new file mode 100644 index 0000000000..5684c8d960 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc @@ -0,0 +1,35 @@ + +#include + +configuration DVSTestAppC { +} +implementation { + components MainC; + components LedsC; + components DVSTestP as App; + + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components SerialPrintfC; + + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //For tasks + components TasksC; + App.Tasks -> TasksC; + + //for Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc new file mode 100644 index 0000000000..9d962687af --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc @@ -0,0 +1,140 @@ +#include +#include +#include "Radio.h" + +#define ADC_SAMPLE_TIME 10 //miliseconds + +module DVSTestP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Tasks; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + message_t pkt; + bool busy = FALSE; + uint16_t state; + + // prototypes + error_t SendMsgTaskDone(); + + + event void Boot.booted() { + //call Timer0.startPeriodic(ADC_SAMPLE_TIME); + printf("Booted\n"); + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2Off(); + call AMControl.start(); //start radio + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) {} + else + call AMControl.start(); + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) + busy = FALSE; + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MicaMsg)) { + micaz_m = (MicaMsg*)payload; + /* + * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) + */ + if(micaz_m->nodeid == MICA_NODE_ID){ + //printf("Incoming msg from mica\n"); + if (!busy) { //check if radio is busy + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + return 0; + } + mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID + state = micaz_m->state; + switch(micaz_m->state){ + + case REQUEST: + printf("Mica: REQUEST\n\n"); + mist_m->state = REQUEST; + state = REQUEST; + break; + case START: + printf("Mica: START. \niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); + mist_m->state = STARTED; + call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); + state = STARTED; + break; + case DEADLINE_MET: + call Leds.led2Toggle(); + printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + case DEADLINE_MISS: + call Leds.led1Toggle(); + printf("Mica: DEADLINE_MISS\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + default: + break; + } + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + if(SendMsgTaskDone()!=SUCCESS) + call Timer0.startPeriodic(1); + } + event void Tasks.FibonacciIterationDone(){ } + + event void Timer0.fired() { + if(SendMsgTaskDone()==SUCCESS) + call Timer0.stop(); + } + + event void Timer1.fired() {} + + + //functions + error_t SendMsgTaskDone(){ + MoteISTMsg* mist_m; + if (!busy) {//check if radio is busy + /*build the packet*/ + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + printf("App: null pointer\n"); + return FAIL; + } + mist_m->state = DEADLINE_MET; // task done in time + state = DEADLINE_MET; + /*send the packet*/ + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ + busy = TRUE; + } + return SUCCESS; + } //if(!busy) + return FAIL; + } +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile new file mode 100644 index 0000000000..aabeeeb4e5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSTestAppC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile new file mode 100644 index 0000000000..95184a0aae --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile @@ -0,0 +1,2 @@ +COMPONENT=MicaTaskC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc new file mode 100644 index 0000000000..da1aeb47d6 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc @@ -0,0 +1,26 @@ +configuration MicaTaskC { +} +implementation { + components MainC; + components LedsC; + components MicaTaskP as App; + + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //for Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc new file mode 100644 index 0000000000..dabe3d3528 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc @@ -0,0 +1,127 @@ +#include +#include "../Radio.h" + +module MicaTaskP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + message_t pkt; + bool busy = FALSE; + uint16_t missedDeadlines = 0; + uint16_t metDeadlines = 0; + uint8_t deadline = 100; //now using this one instead of the one in radio.h + + //prototypes + error_t MicaSendMsg(uint8_t state); + + event void Boot.booted() { + call AMControl.start(); //start radio + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer1.startPeriodic(PERIOD); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MoteISTMsg)) { + mist_m = (MoteISTMsg*)payload; + if(mist_m->nodeid == MOTEIST_NODE_ID){ + if (!busy) { //check if radio is busy + micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); + if (micaz_m == NULL){ + return 0; + } + micaz_m->nodeid = MICA_NODE_ID; //assign Micaz ID + micaz_m->task_i = ITERATIONS; + micaz_m->deadline = deadline; + micaz_m->missed = missedDeadlines; + micaz_m->met = metDeadlines; + + switch (mist_m->state){ + case REQUEST: // MoteIST ready for start + micaz_m->state = START; + break; + case STARTED: // MoteIST has started + call Timer0.startOneShot(deadline); + return msg; // At this point don't need to send msg to MoteIST, return + case DEADLINE_MET: + call Timer0.stop(); //stop timer, deadline is met + call Leds.led1Toggle(); + micaz_m->met = ++metDeadlines; + micaz_m->state = DEADLINE_MET; + break; + case DEADLINE_MISS: // MoteIST missed the deadline, too bad.. but nothing to do here + call Leds.led0Toggle(); + return msg; + default: + } + if(call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + + + event void Timer0.fired(){ //deadline Reached + missedDeadlines++; + MicaSendMsg(DEADLINE_MISS); + } + + event void Timer1.fired() { //make new request + MicaSendMsg(REQUEST); + } + + //functions + error_t MicaSendMsg(uint8_t state){ + + MicaMsg* micaz_m; + if (!busy) { //check if radio is busy + micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); + if (micaz_m == NULL){ + return FAIL; + } + micaz_m->nodeid = MICA_NODE_ID; + micaz_m->task_i = ITERATIONS; // 0 for deadline miss + micaz_m->deadline = deadline; + micaz_m->missed = missedDeadlines; + micaz_m->met = metDeadlines; + micaz_m->state = state; + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { + busy = TRUE; + } + } + return SUCCESS; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h new file mode 100644 index 0000000000..8d77f02ae2 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h @@ -0,0 +1,42 @@ +#define MOTEIST_NODE_ID 1 //for MoteIST +#define MICA_NODE_ID 2 +#define ITERATIONS 200 +#define DEADLINE 500 //0.1 sec +#define PERIOD 1000 //1 sec + + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 1000, + DEADLINE_MISS = 4, + DEADLINE_MET = 3, + STARTED = 2, + START = 1, + REQUEST = 0 +}; + +typedef nx_struct MicaMsg { + nx_uint16_t nodeid; //node id + nx_uint8_t state; // state of operation + nx_uint8_t task_i; //number of iterations to perform the task: passing 0 means deadline missed + nx_uint16_t deadline; //deadline for the task: passing 0 means this is a request to start + nx_uint16_t missed; //number of missed deadlines so far + nx_uint16_t met; + +} MicaMsg; + +typedef nx_struct MoteISTMsg { + nx_uint16_t nodeid; //node id + nx_uint16_t state; +} MoteISTMsg; + + +/* + * The MicaMsg struct + * + * parameter @state has the state of mica's operation such as: + * 0 - requesting + * 1 - start order + * 2 - deadline met + * 3 - deadline missed + */ diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc new file mode 100644 index 0000000000..e456e577bf --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc @@ -0,0 +1,24 @@ +interface Tasks{ + + /* + * Calculates the fibonacci sequence numbers to the number of the parameter iterations. + * The param deadline is the deadline in miliseconds. + */ + + error_t command getFibonacci(uint16_t iterations, uint32_t deadline); + + /* + *this event is used for each iteration done in TasksP + */ + + event void FibonacciIterationDone(void); + /* + *This signals the stop of the interations for the fibonacci sequence numbers + * returns + * num_iterations: the remanining iterations at the time the event was signaled, if any. + * actualTime: the actual time the event was signaled + * status: FAIL if it missed the deadline + * SUCCESS if it has finished before deadline + */ + event void FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status); +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc new file mode 100644 index 0000000000..3e6dfa33b9 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc @@ -0,0 +1,11 @@ +configuration TasksC { + provides interface Tasks; +} +implementation { + + components TasksP, SerialPrintfC; + Tasks = TasksP.Tasks; + + components new TimerMilliC() as Timer0; + TasksP.Timer0 -> Timer0; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc new file mode 100644 index 0000000000..b717945247 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc @@ -0,0 +1,75 @@ + +#define FIBONACCI_A 0 +#define FIBONACCI_B 1 + +module TasksP { + uses interface Timer as Timer0; + provides interface Tasks; + uses interface Tasks as TaskDone; +} +implementation { + + uint32_t a = FIBONACCI_A; + uint32_t b = FIBONACCI_B; + uint32_t i = 0; + uint32_t sum = 0; + uint16_t num_iterations; + uint32_t time_deadline; + bool deadline_miss=0; + //tasks + task void fibonacci(void){ + /** + * Here is the single iteration. + * On each iteration it performs the parameter @iterations is decremented. + * + */ + // printf("N=%d, %lu\n", num_iterations, a); + sum = a + b; + a = b; + b = sum; + //signal iteration done + num_iterations--; + signal TaskDone.FibonacciIterationDone(); + } + + //commands + command error_t Tasks.getFibonacci(uint16_t iterations, uint32_t deadline){ + num_iterations = iterations; + time_deadline = deadline; + + call Timer0.startOneShot(deadline); + + //printf("Posted fibonacci\nIterations:%d, deadline: %lu\n",num_iterations, time_deadline); + post fibonacci(); + + return SUCCESS; + } + + //events + event void TaskDone.FibonacciIterationDone(){ + uint32_t t0, now; + if(num_iterations && !deadline_miss) + post fibonacci(); + else{ + if(!deadline_miss){ + call Timer0.stop(); + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + signal Tasks.FibonacciDone(num_iterations, now-t0, SUCCESS); + } + } + } + + event void Timer0.fired() { + //deadline missed! + uint32_t now,t0; + deadline_miss = 1; + call Timer0.stop(); + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + signal Tasks.FibonacciDone(num_iterations, now-t0, FAIL); + } + + event void TaskDone.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fib b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fib new file mode 100755 index 0000000000000000000000000000000000000000..27f8df5405ecbc675bdb1da328523abe0191556c GIT binary patch literal 7253 zcmeHMZ){sv6~A_z&D%n8(?G)-swd_^3e-)yv|WIyO%pfGmNskZ7Did$9Q!49>p#JM zUXvn0g9#|O5f$UZ1QM*E@c|8K(?qG%f-)sqT4_RoeVNceMYNKu1Z1SpO(OL1``zp7 zIO!(AXL79Ldw=(wd(OS*{(1M^_l;oR0hh}qG`U5MAezp5yzNL^H!4ZHFoajMh^=Ca zxDQ2?wV#6ySXMx#T9kRfHIxCjk3$aL1Wcxkw#kxM7wm&UGV2SUlGlA$h`OJ6yks9L zG=k}uayJqKasx8*JTRGZ`XC>K{z3RAcLS5P?8q%U3V09c`U8+x`(J`4nf2NB9f|nh zjzn~OBA&{P2D0hEP9;Orq`c?wG2~P`X%kJAbsLZ}Hk2=ZCQu50?a=SGzV=dg;>e91 zp_(2qW%rkL84KcSqAmJo|4B@BnT(ww43@L(mrwq6n)zyCT}=iujESatWFFT5De<;7 z_^~zkVc<6>JYL3SBL~Jbhm+})nYF_i+cX8j6k&LF3$wQ$rO|lG%w?@8^y1lcq@%;k zM#8BfF_N>hVk8q!*+USqR@p={98Za!zTW*^=FY&LO0HG5!;SvefL-{x>0L5Ko8$2h zF?z?#Wj=}B;#mqoCCr)o7>pM^-usbym?D^7rU-f+Q*_G56oEZ9dFyC?(NkpI6XP?p zO+pl&Uv?a4;tzIhaVtuTwJ=j`g^e$rxIW|TdJi6)=4Je|j?+v}F=lVyKsBeC9%Gc< zo|l-OW9-81X^Gi_SR?T(60;>SgZM>Yq!nuW+sVnlk&Jzaz(E_P0FV z;`2~my0D7MeL44d6HJQS-irp(D~)LB_(B8zU;mdozu@Y4JG*u25}o9yT|c9W(=b7? zRPT5@Q+%VA23+}B&xvPdrtD9OsjHu&KJ4cg8!t9NcVgPEzsxdZ9+>m^S?0`NpSeJt zo2C4sfx>w-x3~rEyzKtA$2%4BH%*58o=K0tc;~L;6uNh_FW16I;n1KlYd6~$Dz$^$4s-U_Aos5m=AFdIbK@B7ifR zJX`CO-RJR=2lG0xAMeC?u@Eog%*uD3^LV%X=Upd#6)E4p`o4+x3Z(A<^Eh=1{1BM+ zKLRH4oVJ7$9^c(sz+tO@P3F#$ZWdCR4 zJF~8I3Vk{Y{x0~3;9r2Xtf#B%b4JUt!CcDD8SR1gz@yvSa}w>^rmzr!>{!wc41fyvi+~j~hce-$B?1vUoyo$1N=`*! z2u8xmcmxj8sEEISw5DnfW}zKPCzDpn)^Yi7(k)QpIB}fiJqQ5DQWIsQN5Fi$p`N_2 zfWSar6XzMJ4XpKIm|rpI`K3htX}yDhoQt%_`FS3Ct;lm;lBh@S2H(LPq8{h()w18U zdWRwB9Ht)U^*hiTL7r_vR@&nH=DRlMHubm;`jFxL*F;^?NigRy^*DboA+rH_?U&`` z(_qed<~i?Ykzqfo{Q`=!;0M6ewhXW zzdtVPvA@@#cMW=76)okH@aJIKqh1|eitErJZ39J>{42;)56x2dZMdvryfo=Lzea)9 z<3&Kj2k8B_N{=u6P0-UeXjA8BkY|kPSKi}6ZytG$FNu0=$D3g7m-jZM_pwLa-&g5z ze_eu}fig|hA^#Dq?KR*AqX7f(e*L`xJ(jb5yyM7>8;R{m2)=Dto_ zn)X8P?;0Sb4v8tpOw$cKIQF68A4kDI@*PFszxkBDmE6kllJ)afEBmi-pD9p&I^`J0EMa_GK`P9WT8S_VBwPSN0 zE6k_0kn>ex^;GA)RQRJzX5qN@5@MepU06Tjv;*tcZEnW z?>3-ph3KCTJztgoabWHz)N)}~e-CN3{~rOLE61DmUZrB0Xzw@3bA7VN<=!mbLaO^G z-1Xw-8vHJ>KCigkh&LLj<7tRS@enZYJvkHW;cp8t_gO%RKLM=CK&EXC4gzz2Fdn?a z?gQrj%R2SAxgV&~=j`C&tNPCS>%h7_KD4I*+*ls(jqXPA0&%&&8{M14OTfIMi=nt{=2~bvOnrCuaVbbNmtw31bkNa&%Hr>8kl#* zy!)s99l(6uRL%7{H&F)p`iLNS9G;Izi(u3iI zDNkBvI5#SAiW*5+wiONRY2Dc-C@|yEQKCnMJf4}+TrxSP{R9tpOE(7wIu8X+jp#<_ zSG>q$o%AvkA55phkw}~k?&<5_-`QvOA2@I{7&1eh`}=}yI1h?uIFkvFnN~`Ej#w#> zA1{R2{q*6^L%m&sr$F^J0`=sliAXkQ%F|_~c-2P_^NHuo0c$v(#o@Or5zc0RZYxyCx2@A>KqkRNMgXvKd3bftG@ literal 0 HcmV?d00001 diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c new file mode 100644 index 0000000000..50c793c7fa --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c @@ -0,0 +1,69 @@ +/** + * You'll notice that we need to include a header file that + * contains functions we need to use. Being a compiled language, + * it's inefficient to include functions that aren't needed. + * stdio.h contains functions for reading from and writing to the console + */ + +#include + +/** + * In C, the program executes the main function. You should also take note + * that we must declare a return type for the function. In this case, it's + * an integer, and we return 0 to indicate successful completion of the + * program. + */ + +int fibonacci(unsigned long int n); + +int main () +{ + /* Notice that we need to declare our variables, and their type */ + + unsigned long int n; + + /* printf prints a formated string to the stdout */ + + printf("\nHow many numbers of the sequence would you like?\n"); + + /* scanf reads a formated string from the stdin. We are expecting an integer here. */ + + scanf("%d",&n); + + /* Here we call the fibonacci function */ + + fibonacci(n); + + /* Finally, return 0 */ + + return 0; +} + +/** + * This is the simple fibonacci sequence generator. Notice also, we + * declare the type of variable we expect to be passed to the function. + */ + +int fibonacci(unsigned long int n) +{ + /** + * Here we declare and set our variables. + */ + long unsigned int a = 0; + long unsigned int b = 1; + long unsigned int sum; + int i; + + /** + * Here is the standard for loop. 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+int main(void){ + for(;b-c;)f[b++]=a/5; + for(;d=0,g=c*2;c-=14, printf("%.4d",e+d/a),e=d%a) + for(b=c;d+=f[b]*a,f[b]=d%--g,d/=g--,--b;d*=b); + return 0; + } diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc new file mode 100644 index 0000000000..0e8bc5212f --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc @@ -0,0 +1,39 @@ + +#include + +configuration DVSTestAppC { +} +implementation { + components MainC; + components LedsC; + components DVSTestP as App; + + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components SerialPrintfC; + + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + + //For tasks + components TasksC; + App.Tasks -> TasksC; + + //for Radio + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; + + //for frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestP.nc new file mode 100644 index 0000000000..3e300862ec --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestP.nc @@ -0,0 +1,180 @@ +#include +#include +#include "Radio.h" + +#define MAX_FREQUENCY_INCREASE 5000000 +#define MAX_FREQUENCY 25000000 +#define START_FREQUENCY 25000000 + +module DVSTestP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Tasks; + + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; + uses interface FreqControl; +} +implementation { + + message_t pkt; + bool busy = FALSE; + uint16_t state; + uint32_t ActFrequency = 0; + uint16_t deadline; + // prototypes + error_t SendMsgTaskDone(); + error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus); + + event void Boot.booted() { + printf("Booted\n"); + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + if(call FreqControl.setMCLKFreq(START_FREQUENCY) == SUCCESS){ + ActFrequency = START_FREQUENCY; + printf("Frequency at %lu Hz\n", ActFrequency); + call AMControl.start(); //start radio + } + else + printf("err: Could not set Start Frequency\n"); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { printf("Radio started\n");} + else + call AMControl.start(); + } + + event void AMControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) + busy = FALSE; + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + MoteISTMsg* mist_m; + MicaMsg* micaz_m; + + if (len == sizeof(MicaMsg)) { + micaz_m = (MicaMsg*)payload; + /* + * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) + */ + if(micaz_m->nodeid == MICA_NODE_ID){ + //printf("Incoming msg from mica\n"); + if (!busy) { //check if radio is busy + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + return 0; + } + mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID + state = micaz_m->state; + switch(micaz_m->state){ + + case REQUEST: + printf("Mica: REQUEST\n\n"); + mist_m->state = REQUEST; + state = REQUEST; + break; + case START: + printf("Mica: START.\niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); + mist_m->state = STARTED; + call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); + state = STARTED; + deadline = micaz_m->deadline; + break; + case DEADLINE_MET: + call Leds.led2Toggle(); + printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + case DEADLINE_MISS: + call Leds.led1Toggle(); + printf("Mica: DEADLINE_MISS:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); + return msg; + break; + default: + break; + } + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { + busy = TRUE; + } + }//if !busy + }// if == MICA_NODE_ID + }// if len = len MicaMsg + return msg; + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + if(status == SUCCESS) + if(SendMsgTaskDone()!=SUCCESS) + call Timer0.startPeriodic(1); + AdaptFrequency(elapsedTime, status); + } + event void Tasks.FibonacciIterationDone(){ } + + event void Timer0.fired() { + if(SendMsgTaskDone()==SUCCESS) + call Timer0.stop(); + } + + event void Timer1.fired() {} + + + //functions + error_t SendMsgTaskDone(){ + MoteISTMsg* mist_m; + if (!busy) {//check if radio is busy + /*build the packet*/ + mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); + if (mist_m == NULL){ + printf("App: null pointer\n"); + return FAIL; + } + mist_m->state = DEADLINE_MET; // task done in time + state = DEADLINE_MET; + /*send the packet*/ + if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ + busy = TRUE; + } + return SUCCESS; + } //if(!busy) + return FAIL; + } + + error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus){ + uint32_t newFreq; + float deadlineWindow; + deadlineWindow = deadline - deadline * 0.5; + printf("Task done! Elapsed: %lu, status: %d\n", elapsedTime, taskStatus); + printf("Act Freq is %lu Hz\n", ActFrequency); + + if(taskStatus!=SUCCESS) + newFreq = ActFrequency + MAX_FREQUENCY_INCREASE; + else{ + //ajust to finish in 20% less time of deadline + newFreq = (uint32_t) ( (((float) elapsedTime) / deadlineWindow) * ((float) ActFrequency) ); + newFreq = (newFreq/100000)*100000; //round frequency to hundreads of kHz + } + if(newFreq == ActFrequency || newFreq < 700000) + return FAIL; + + if(newFreq > MAX_FREQUENCY) + newFreq = MAX_FREQUENCY; + + if(call FreqControl.setMCLKFreq(newFreq)==SUCCESS) + ActFrequency = newFreq; + //set new frequency to the one needed in order to meet the deadline in half its time with a 20% window + printf("New Freq is %lu Hz\n", ActFrequency); + return SUCCESS; + } +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/Makefile new file mode 100644 index 0000000000..aabeeeb4e5 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSTestAppC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/Tasks.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/Tasks.nc new file mode 100644 index 0000000000..2e33e2092b --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/Tasks.nc @@ -0,0 +1,24 @@ +interface Tasks{ + + /* + * Calculates the fibonacci sequence numbers to the number of the parameter iterations. + * The param deadline is the deadline in miliseconds. + */ + + error_t command getFibonacci(uint16_t iterations, uint32_t deadline); + + /* + *this event is used for each iteration done in TasksP + */ + + event void FibonacciIterationDone(void); + /* + *This signals the stop of the interations for the fibonacci sequence numbers + * returns + * num_iterations: the remanining iterations at the time the event was signaled, if any. + * actualTime: the actual time the event was signaled + * status: FAIL if it missed the deadline + * SUCCESS if it has finished before deadline + */ + event void FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status); +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksC.nc new file mode 100644 index 0000000000..3e6dfa33b9 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksC.nc @@ -0,0 +1,11 @@ +configuration TasksC { + provides interface Tasks; +} +implementation { + + components TasksP, SerialPrintfC; + Tasks = TasksP.Tasks; + + components new TimerMilliC() as Timer0; + TasksP.Timer0 -> Timer0; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksP.nc new file mode 100644 index 0000000000..dcbc13cac1 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksP.nc @@ -0,0 +1,81 @@ + +#define FIBONACCI_A 0 +#define FIBONACCI_B 1 + +module TasksP { + uses interface Timer as Timer0; + provides interface Tasks; + uses interface Tasks as TaskDone; +} +implementation { + + uint32_t a = FIBONACCI_A; + uint32_t b = FIBONACCI_B; + uint32_t i = 0; + uint32_t sum = 0; + uint16_t num_iterations; + uint16_t totalIterations; + uint32_t time_deadline; + bool deadline_miss=FALSE; + + //tasks + task void fibonacci(void){ + /** + * Here is the single iteration. + * On each iteration it performs the parameter @iterations is decremented. + * + */ + // printf("N=%d, %lu\n", num_iterations, a); + sum = a + b; + a = b; + b = sum; + //signal iteration done + num_iterations--; + signal TaskDone.FibonacciIterationDone(); + } + + //commands + command error_t Tasks.getFibonacci(uint16_t iterations, uint32_t deadline){ + deadline_miss = FALSE; + num_iterations = iterations; + totalIterations = iterations; + time_deadline = deadline; + + call Timer0.startOneShot(deadline); + + //printf("Posted fibonacci\nIterations:%d, deadline: %lu, deadline miss: %d\n",num_iterations, time_deadline, deadline_miss); + post fibonacci(); + + return SUCCESS; + } + + //events + event void TaskDone.FibonacciIterationDone(){ + uint32_t t0, now; + if(num_iterations && !deadline_miss) + post fibonacci(); + else{ + if(!deadline_miss){ + call Timer0.stop(); + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + //printf("fibonacci is done in: %lu\n", now-t0); + signal Tasks.FibonacciDone(totalIterations, t0, now, SUCCESS); + } + } + } + + event void Timer0.fired() { + //deadline missed! + uint32_t now,t0; + deadline_miss = TRUE; + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + + // printf("timer fired in fibonacci: %lu\n", now-t0); + signal Tasks.FibonacciDone(num_iterations, now, t0, FAIL); + } + + event void TaskDone.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/fibonacci/fib b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/fibonacci/fib new file mode 100755 index 0000000000000000000000000000000000000000..27f8df5405ecbc675bdb1da328523abe0191556c GIT binary patch literal 7253 zcmeHMZ){sv6~A_z&D%n8(?G)-swd_^3e-)yv|WIyO%pfGmNskZ7Did$9Q!49>p#JM zUXvn0g9#|O5f$UZ1QM*E@c|8K(?qG%f-)sqT4_RoeVNceMYNKu1Z1SpO(OL1``zp7 zIO!(AXL79Ldw=(wd(OS*{(1M^_l;oR0hh}qG`U5MAezp5yzNL^H!4ZHFoajMh^=Ca zxDQ2?wV#6ySXMx#T9kRfHIxCjk3$aL1Wcxkw#kxM7wm&UGV2SUlGlA$h`OJ6yks9L zG=k}uayJqKasx8*JTRGZ`XC>K{z3RAcLS5P?8q%U3V09c`U8+x`(J`4nf2NB9f|nh zjzn~OBA&{P2D0hEP9;Orq`c?wG2~P`X%kJAbsLZ}Hk2=ZCQu50?a=SGzV=dg;>e91 zp_(2qW%rkL84KcSqAmJo|4B@BnT(ww43@L(mrwq6n)zyCT}=iujESatWFFT5De<;7 z_^~zkVc<6>JYL3SBL~Jbhm+})nYF_i+cX8j6k&LF3$wQ$rO|lG%w?@8^y1lcq@%;k zM#8BfF_N>hVk8q!*+USqR@p={98Za!zTW*^=FY&LO0HG5!;SvefL-{x>0L5Ko8$2h zF?z?#Wj=}B;#mqoCCr)o7>pM^-usbym?D^7rU-f+Q*_G56oEZ9dFyC?(NkpI6XP?p zO+pl&Uv?a4;tzIhaVtuTwJ=j`g^e$rxIW|TdJi6)=4Je|j?+v}F=lVyKsBeC9%Gc< zo|l-OW9-81X^Gi_SR?T(60;>SgZM>Yq!nuW+sVnlk&Jzaz(E_P0FV z;`2~my0D7MeL44d6HJQS-irp(D~)LB_(B8zU;mdozu@Y4JG*u25}o9yT|c9W(=b7? zRPT5@Q+%VA23+}B&xvPdrtD9OsjHu&KJ4cg8!t9NcVgPEzsxdZ9+>m^S?0`NpSeJt zo2C4sfx>w-x3~rEyzKtA$2%4BH%*58o=K0tc;~L;6uNh_FW16I;n1KlYd6~$Dz$^$4s-U_Aos5m=AFdIbK@B7ifR zJX`CO-RJR=2lG0xAMeC?u@Eog%*uD3^LV%X=Upd#6)E4p`o4+x3Z(A<^Eh=1{1BM+ zKLRH4oVJ7$9^c(sz+tO@P3F#$ZWdCR4 zJF~8I3Vk{Y{x0~3;9r2Xtf#B%b4JUt!CcDD8SR1gz@yvSa}w>^rmzr!>{!wc41fyvi+~j~hce-$B?1vUoyo$1N=`*! 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Being a compiled language, + * it's inefficient to include functions that aren't needed. + * stdio.h contains functions for reading from and writing to the console + */ + +#include + +/** + * In C, the program executes the main function. You should also take note + * that we must declare a return type for the function. In this case, it's + * an integer, and we return 0 to indicate successful completion of the + * program. + */ + +int fibonacci(unsigned long int n); + +int main () +{ + /* Notice that we need to declare our variables, and their type */ + + unsigned long int n; + + /* printf prints a formated string to the stdout */ + + printf("\nHow many numbers of the sequence would you like?\n"); + + /* scanf reads a formated string from the stdin. We are expecting an integer here. */ + + scanf("%d",&n); + + /* Here we call the fibonacci function */ + + fibonacci(n); + + /* Finally, return 0 */ + + return 0; +} + +/** + * This is the simple fibonacci sequence generator. Notice also, we + * declare the type of variable we expect to be passed to the function. + */ + +int fibonacci(unsigned long int n) +{ + /** + * Here we declare and set our variables. + */ + long unsigned int a = 0; + long unsigned int b = 1; + long unsigned int sum; + int i; + + /** + * Here is the standard for loop. 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for(b=c;d+=f[b]*a,f[b]=d%--g,d/=g--,--b;d*=b); + return 0; + } diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc new file mode 100644 index 0000000000..c1a27ad206 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc @@ -0,0 +1,32 @@ + +#include + +configuration DVSnoRadioC { +} +implementation { + components MainC; + components LedsC; + components DVSnoRadioP as App; + components SerialPrintfC; + + App.Boot -> MainC; + App.Leds -> LedsC; + + //For tasks (fibonacci) + components TasksC; + App.Tasks -> TasksC; + + //For ADC + components new Msp430Adc12ClientAutoRVGC() as adc; + App.adc -> adc; + App.AdcResource -> adc; + adc.AdcConfigure -> App.AdcConfigure; + + //For frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; + + //For UART + //components PlatformSerialC; + //App.UartStream -> PlatformSerialC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc new file mode 100644 index 0000000000..da2b479107 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc @@ -0,0 +1,203 @@ +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define ADC_SAMPLE_TIME 10 //miliseconds +#define ITERATIONS 900 +#define DEADLINE 5000 +#define SAMPLES 16 + +module DVSnoRadioP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Tasks; + uses interface FreqControl; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource as AdcResource; +} +implementation { + + uint16_t adb[SAMPLES]; + //uint8_t count = 0; + uint32_t Freq = 1000000; + uint32_t ActFreq = 0; + uint32_t EndFreq = 25000000; + uint32_t Step = 500000; + uint32_t timeStart = 0; + uint32_t timeEnd = 0; + uint16_t Number = 0; + bool AdcDone = FALSE; + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureAdc(); + void frequency_sweep(); + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ADC12OSC, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_16_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + event void Boot.booted() { + //request the adc + call AdcResource.request(); + + } + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureAdc(); + } + /* + * Adc is configured, now init the system + */ + printf("Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit)\n"); + if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) + printf("Could not change the frequency to: %lu Hz. \r\n", Freq); + else + atomic ActFreq = Freq; + + call adc.getData(); + + uwait(1024*5); + atomic if(AdcDone){ + printadb(); + AdcDone=FALSE; + } + call Tasks.getFibonacci(ITERATIONS, DEADLINE); + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ + atomic timeEnd = startTime; + atomic timeStart = endTime; + + if(Freq=EndFreq){ + call Leds.led2On(); + return; + } + } + + event void Tasks.FibonacciIterationDone(){ + } + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + AdcDone = TRUE; + + } + + +//functions + void printadb(){ + uint8_t i; + uint32_t currentMean = 0; + uint32_t voltageMean = 0; + //float Gain = 37.5; //(Gm*Rout) + //float refVolt = 2.5; + //float Nmax = 4095; + //float Rsense = 1.01; + + for(i = 0; i < SAMPLES; i+=2){ + currentMean += adb[i]; + voltageMean += adb[i+1]; + } + currentMean /= SAMPLES/2; //bits + voltageMean /= SAMPLES/2; // bits + //currentMean *= refVolt/Nmax; //value in Volts + //voltageMean *= refVolt/Nmax; //value in Volts + + //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //voltageMean *= 2; // multiply by 2 to get total battery voltage + + printf("%d,%lu,%lu,%lu,%lu\n", Number, ActFreq, timeEnd, currentMean, voltageMean); + } + + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + float f = toBePrinted; + + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/Makefile new file mode 100644 index 0000000000..1e65e3cde8 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSnoRadioC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/test.txt b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/test.txt new file mode 100644 index 0000000000..98d693eacb --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/test.txt @@ -0,0 +1,165 @@ +Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) +0,25000000,0,80,1137 +2,24000000,580,462,1263 +3,23500000,594,613,1467 +4,23000000,608,597,1438 +5,22500000,623,593,1414 +6,22000000,638,589,1402 +7,21500000,653,585,1392 +8,21000000,668,564,1322 +9,20500000,684,561,1308 +10,20000000,700,553,1312 +11,19500000,717,542,1258 +12,19000000,734,538,1256 +13,18500000,752,515,1179 +14,18000000,770,516,1161 +15,17500000,788,512,1186 +16,17000000,807,434,1284 +18,16000000,843,446,1245 +19,15500000,863,440,1235 +20,15000000,884,439,1228 +21,14500000,905,441,1245 +22,14000000,927,433,1239 +23,13500000,950,423,1181 +24,13000000,973,410,1171 +25,12500000,998,385,1299 +26,12000000,1023,372,1392 +27,11500000,1049,369,1329 +28,11000000,1077,356,1313 +29,10500000,1106,334,1280 +30,10000000,1136,343,1280 +31,9500000,1167,338,1287 +32,9000000,1199,327,1251 +33,8500000,1233,319,1218 +34,8000000,1268,312,1196 +35,7500000,1306,300,1156 +36,7000000,1346,294,1178 +37,6500000,1389,292,1154 +38,6000000,1435,284,1100 +39,5500000,1485,274,1079 +40,5000000,1539,249,1335 +41,4500000,1599,482,1228 +42,4000000,1663,246,1266 +43,3500000,1735,238,1207 +44,3000000,1817,236,1355 +45,2500000,1912,214,1148 +46,2000000,2026,213,1297 +47,1500000,2162,211,1138 +48,1000000,2344,198,1099 +49,1000000,2617,199,1347 +Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) +0,1000000,0,59,1029 +1,1500000,774,61,1021 +2,2000000,969,60,1037 +3,2500000,1111,65,1040 +4,3000000,1227,75,1190 +5,3500000,1324,76,1164 +6,4000000,1409,83,1103 +7,4500000,1483,88,1255 +8,5000000,1548,100,1264 +9,5500000,1608,113,1235 +10,6000000,1662,104,1211 +11,6500000,1713,120,1257 +12,7000000,1760,124,1168 +13,7500000,1804,126,1088 +14,8000000,1845,129,1029 +15,8500000,1884,155,1027 +16,9000000,1920,160,1042 +17,9500000,1955,171,1090 +18,10000000,1987,180,1137 +19,10500000,2018,183,1137 +21,11500000,2072,198,1172 +22,12000000,2100,209,1202 +23,12500000,2127,224,1244 +24,13000000,2153,225,1236 +26,14000000,2198,244,1275 +27,14500000,2222,265,1141 +28,15000000,2244,269,1105 +29,15500000,2266,300,1131 +30,16000000,2287,301,1147 +31,16500000,2307,307,1166 +32,17000000,2327,318,1202 +33,17500000,2346,337,1272 +34,18000000,2365,371,1098 +35,18500000,2384,351,1317 +36,19000000,2402,351,1319 +37,19500000,2420,399,1392 +38,20000000,2437,377,1118 +39,20500000,2454,380,1073 +40,21000000,2471,419,1221 +41,21500000,2487,417,1239 +42,22000000,2503,434,1247 +43,22500000,2519,440,1274 +44,23000000,2534,453,1318 +45,23500000,2549,463,1342 +46,24000000,2564,472,1371 +47,24500000,2578,475,1384 +Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) +0,1000000,0,58,1018 +1,1500000,775,62,1018 +2,2000000,969,65,1036 +3,2500000,1112,67,1173 +4,3000000,1227,83,1199 +5,3500000,1325,80,1217 +6,4000000,1410,84,1092 +7,4500000,1484,88,1239 +8,5000000,1549,97,1269 +9,5500000,1608,109,1252 +10,6000000,1663,109,1195 +11,6500000,1713,115,1260 +12,7000000,1761,128,1173 +13,7500000,1805,128,1070 +14,8000000,1846,134,1002 +15,8500000,1884,158,1031 +16,9000000,1921,163,1059 +17,9500000,1955,169,1110 +18,10000000,1988,179,1122 +19,10500000,2019,189,1161 +21,11500000,2073,199,1173 +22,12000000,2101,205,1189 +23,12500000,2128,218,1224 +24,13000000,2154,233,1270 +26,14000000,2199,240,1284 +27,14500000,2222,269,1200 +28,15000000,2245,279,1136 +29,15500000,2267,288,1125 +30,16000000,2288,304,1154 +31,16500000,2308,306,1165 +32,17000000,2328,314,1189 +33,17500000,2347,335,1266 +34,18000000,2366,374,1096 +35,18500000,2385,344,1295 +36,19000000,2403,354,1323 +37,19500000,2421,376,1253 +38,20000000,2438,371,1098 +39,20500000,2455,389,1110 +40,21000000,2472,415,1211 +41,21500000,2488,426,1250 +42,22000000,2504,425,1219 +43,22500000,2520,444,1293 +44,23000000,2535,454,1315 +45,23500000,2550,453,1315 +Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) +0,1000000,0,62,1010 +1,1500000,774,60,1020 +2,2000000,969,57,1013 +3,2500000,1111,70,1058 +4,3000000,1227,77,1196 +5,3500000,1324,78,1069 +6,4000000,1409,87,1101 +7,4500000,1483,89,1179 +8,5000000,1549,95,1265 +9,5500000,1608,107,1241 +10,6000000,1662,109,1174 +11,6500000,1713,119,1304 +12,7000000,1760,124,1188 +13,7500000,1804,129,1089 +14,8000000,1845,128,987 +15,8500000,1884,157,1031 +16,9000000,1920,164,1065 +17,9500000,1954,168,1083 +18,10000000,1987,176,1114 +19,10500000,2018,191,1152 +21,11500000,2072,203,1228 +22,12000000,2100,209,1196 + diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc new file mode 100644 index 0000000000..c7b5a3fc53 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc @@ -0,0 +1,37 @@ + +#include + +configuration DVSnoRadioC { +} +implementation { + components MainC; + components LedsC; + components DVSnoRadioP as App; + components SerialPrintfC; + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components new TimerMilliC() as Timer2; + App.Boot -> MainC; + App.Leds -> LedsC; + + //For tasks (fibonacci) + components TasksC; + App.Tasks -> TasksC; + + //For ADC + components new Msp430Adc12ClientAutoRVGC() as adc; + App.adc -> adc; + App.AdcResource -> adc; + adc.AdcConfigure -> App.AdcConfigure; + + //For frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; + //timers + App.Timer0 -> Timer0; + App.Timer1 -> Timer1; + App.Timer2 -> Timer2; + //For UART + //components PlatformSerialC; + //App.UartStream -> PlatformSerialC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc new file mode 100644 index 0000000000..ce54c33d12 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc @@ -0,0 +1,257 @@ +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define ADC_SAMPLE_TIME 10 //miliseconds +#define ITERATIONS 5000 +#define DEADLINE 9000 +#define SAMPLES 15 +#define FREQ_25MHz 25000000 +#define FREQ_1MHz 1000000 +#define FREQ_STEP FREQ_1MHz +#define SWEEP_REPOST_DELAY 50 +#define UP + +module DVSnoRadioP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Tasks; + uses interface FreqControl; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource as AdcResource; + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Timer as Timer2; +} +implementation { + + uint16_t adb[SAMPLES]; + //uint8_t count = 0; + #ifdef UP + uint32_t Freq = FREQ_1MHz; + uint32_t EndFreq = FREQ_25MHz; + uint32_t ActFreq = FREQ_1MHz; + #else + uint32_t Freq = FREQ_25MHz; + uint32_t EndFreq = FREQ_1MHz; + uint32_t ActFreq = FREQ_25MHz; + #endif + uint32_t timeStart = 0; + uint32_t timeEnd = 0; + uint16_t Number = 0; + uint32_t adcStartTime, adcEndTime; + bool fibDone = FALSE; +//prototypes + //void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureAdc(); + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_1_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_64_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + /*adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + };*/ + + adc12memctl_t channelconfig [] = { + {INPUT_CHANNEL_A2, REFVOLT_LEVEL_1_5, 0}, + {INPUT_CHANNEL_A3, REFVOLT_LEVEL_1_5, 1} + }; + adc12memctl_t * adcchannelconfig = (adc12memctl_t *) channelconfig; + + task void delaySweep(){ + call Timer1.startOneShot(SWEEP_REPOST_DELAY); + } + + task void sweep(){ + uint32_t t0 = 0; + uint32_t now = 0; + + #ifdef UP + if(Freq<=EndFreq){ + #else + if(Freq>=EndFreq){ + #endif + atomic call Timer2.startOneShot(600); + atomic adcStartTime=call Timer2.gett0(); + //atomic adcStartTime=call Timer0.getdt(); + call adc.getData(); + if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) + printf("Could not change the frequency to: %lu Hz. \r\n", Freq); + else{ + ActFreq = Freq; + Number++; // increment the number of sequences calculated + } + //printf("adc.getdata; "); + //printf("tasks.getfib\n "); + atomic fibDone = FALSE; + call Tasks.getFibonacci(ITERATIONS, DEADLINE); + } + else{ + call Leds.led2On(); + call Timer0.stop(); + t0=call Timer0.gett0(); + now=call Timer0.getNow(); + //printf("sweep: "); + printf("app end time: %lu\n", now-t0); + } + #ifdef UP + Freq+=FREQ_STEP; + #else + Freq-=FREQ_STEP; + #endif + } + + task void printadb(){ + uint8_t i; + uint32_t currentMean = 0; + uint32_t voltageMean = 0; + uint32_t vcoreMean = 0; + //float Gain = 37.5; //(Gm*Rout) + //float refVolt = 2.5; + //float Nmax = 4095; + //float Rsense = 1.01; + //printf("print adb: "); + for(i = 0; i < SAMPLES; i+=3){ + currentMean += adb[i]; + voltageMean += adb[i+1]; + vcoreMean += adb[i+2]; + } + currentMean /= SAMPLES/3; //bits + voltageMean /= SAMPLES/3; // bits + vcoreMean /= SAMPLES/3; // bits + //currentMean *= refVolt/Nmax; //value in Volts + //voltageMean *= refVolt/Nmax; //value in Volts + + //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //voltageMean *= 2; // multiply by 2 to get total battery voltage + + atomic printf("%d,%lu,%lu,%lu,%lu,%lu,%lu,%lu,%lu\n", Number, ActFreq, timeStart, timeEnd, currentMean, voltageMean, vcoreMean, adcStartTime, adcEndTime); + } + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + event void Boot.booted() { + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + //request the adc + call AdcResource.request(); + + } + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + uint32_t maxTime = 9000; + while(e != SUCCESS){ + e = configureAdc(); + } + atomic TA1R = 0; //reset timer A + call Timer0.startOneShot(maxTime); + printf("Fib Iteration Num,ActualFrequency(Hz),Fib-startTime(ms),Fib-endTime(ms),currentMean(12bit),supplyMean(12bit),vcoreMean(12bit),adcStartTime(ms),adcEndTime(ms),app startTime(ms): %lu\n", call Timer0.gett0()); + post sweep(); + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ + timeStart = startTime; + timeEnd = endTime; + atomic fibDone = TRUE; + /*if(status ==SUCCESS) + printf("tasks.fibDone; %lu\n", endTime-startTime); + else + printf("fib fail..\n");*/ + } + + event void Tasks.FibonacciIterationDone(){ } + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + //printf("data ready: post\n"); + adcEndTime=call Timer2.getNow(); + //adcEndTime=call Timer0.getdt(); + call Timer2.stop(); + + if(fibDone){ + post printadb(); + post sweep(); + } + else + post delaySweep(); + } + + event void Timer0.fired() { + //printf("Timer0 fired! end time of program not valid! \n"); + } + event void Timer1.fired() { + bool ready; + //printf("Timer1 Fired. Repost Sweep!\n"); + atomic ready = fibDone; + if(ready){ + post printadb(); + post sweep(); + } + else + call Timer1.startOneShot(SWEEP_REPOST_DELAY); + } + event void Timer2.fired() { + //printf("Timer2 fired! AdcConvertion endTime not valid!\n"); + } + //functions + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + float f = toBePrinted; + + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + e = call adc.configure(&adcconfig, adcchannelconfig, 2, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/Makefile new file mode 100644 index 0000000000..1e65e3cde8 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSnoRadioC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc new file mode 100644 index 0000000000..c1a27ad206 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc @@ -0,0 +1,32 @@ + +#include + +configuration DVSnoRadioC { +} +implementation { + components MainC; + components LedsC; + components DVSnoRadioP as App; + components SerialPrintfC; + + App.Boot -> MainC; + App.Leds -> LedsC; + + //For tasks (fibonacci) + components TasksC; + App.Tasks -> TasksC; + + //For ADC + components new Msp430Adc12ClientAutoRVGC() as adc; + App.adc -> adc; + App.AdcResource -> adc; + adc.AdcConfigure -> App.AdcConfigure; + + //For frequency control + components Msp430FreqControlC; + App.FreqControl -> Msp430FreqControlC; + + //For UART + //components PlatformSerialC; + //App.UartStream -> PlatformSerialC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc new file mode 100644 index 0000000000..13bea3ef2f --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc @@ -0,0 +1,237 @@ +#include +#include "Msp430Adc12.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define ADC_SAMPLE_TIME 10 //miliseconds +#define ITERATIONS 900 +#define DEADLINE 5000 +#define SAMPLES 16 + +module DVSnoRadioP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Tasks; + uses interface FreqControl; + uses interface Msp430Adc12Overflow as overflow; + uses interface Msp430Adc12SingleChannel as adc; + uses interface Resource as AdcResource; +} +implementation { + + uint16_t adb[SAMPLES]; + //uint8_t count = 0; + uint32_t Freq = 1000000; + uint32_t ActFreq = 0; + uint32_t EndFreq = 25000000; + uint32_t Step = 500000; + uint32_t Time = 0; + uint16_t Number = 0; + bool AdcDone = FALSE; + bool flag = 1; + +//prototypes + void printadb(); + void printfFloat(float toBePrinted); + void showerror(); + error_t configureAdc(); + void frequency_sweep(); + + msp430adc12_channel_config_t adcconfig = { + + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ADC12OSC, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_16_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_ACLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + event void Boot.booted() { + //printf("Booted\n"); + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2Off(); + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + //request the adc + call AdcResource.request(); + + } + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureAdc(); + } + /* + * Adc is configured, now init the system + */ + printf("Number#,Frequency(Hz),Time(ms),Vin(V),I(mA)\n"); + if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) + printf("Could not change the frequency to: %lu Hz. \r\n", Freq); + else + atomic ActFreq = Freq; + + call adc.getData(); + //printf("Conversion didn't start!\n"); + + uwait(1024*5); + atomic if(AdcDone){ + printadb(); + AdcDone=FALSE; + } + call Tasks.getFibonacci(ITERATIONS, DEADLINE); + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + printf("Task done in %lu ms\n",elapsedTime); + atomic Time = elapsedTime; + if(flag){ + flag=0; + Freq=EndFreq; + if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) + printf("Could not change the frequency to: %lu Hz. \r\n", Freq); + else{ + //printf("MCLK frequency is now %lu Hz. \r\n\n", Freq); + atomic ActFreq = Freq; + atomic Number++; // increment the number of sequences calculated + } + call adc.getData(); + + call Tasks.getFibonacci(ITERATIONS+100, DEADLINE); + atomic if(AdcDone){ + printadb(); + AdcDone = FALSE; + } + } + + if(Freq==EndFreq){ + call Leds.led2On(); + return; + } + } + + event void Tasks.FibonacciIterationDone(){ + } + + async event void overflow.conversionTimeOverflow(){ } + + async event void overflow.memOverflow(){ } + + async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ + AdcDone = TRUE; + return buffer; + } + + async event error_t adc.singleDataReady(uint16_t data){ + return FAIL; + } + +//functions + void printadb(){ + uint8_t i; + float mean = 0; + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Vout = 0; + float Current = 0; + //float Vsense = 0; + float Rsense = 1.01; + + for(i = 0; i < SAMPLES; i++){ + mean += (float) adb[i]; + //printf("Sample %d =", i); + //printfFloat((float) adb[i]); + //printf("\n"); + //printf("Vout ="); + //Vout = adb[i]*refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //printfFloat(Vout); + //printf(" V\n"); + } + mean = mean/SAMPLES; + //printf("Sample mean ="); + //printfFloat(mean); + //printf("\n"); + + //printf("Vout mean (into ADC) ="); + Vout = mean*refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //printfFloat(Vout); + //printf(" V\n"); + + //Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV + // printf("Vsense ="); + // printfFloat(Vsense); + // printf(" mV\n"); + + //Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm + //printf("Current ="); + //printfFloat(Current); + //printf(" mA\n"); + + Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + printf("%d,%lu,%lu,", Number, ActFreq, Time); + printfFloat(Vout); + printf(","); + printfFloat(Current); + //printf(" mA\n"); + //printf("\n"); + printf("\n"); + } + + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + //e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); + e = call adc.configureMultiple(&adcconfig, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/Makefile new file mode 100644 index 0000000000..1e65e3cde8 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/Makefile @@ -0,0 +1,2 @@ +COMPONENT=DVSnoRadioC +include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h new file mode 100644 index 0000000000..381b58face --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h @@ -0,0 +1,11 @@ + +typedef struct uartMessage{ + uint32_t freq; //actual frequency + uint32_t time; //time elapsed + uint16_t iter; //iteration number + uint16_t num; //number of the fib sequence + float current; //current being consumed + float voltage; //battery voltage + bool lock; +} uartMessage; + diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/ConfigureAdc.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/ConfigureAdc.nc new file mode 100644 index 0000000000..28f536c255 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/ConfigureAdc.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2011 João Gonçalves + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "Msp430Adc12.h" + +interface Msp430UsciConfigure { + /** + * Return a pointer to the configuration that should be used for the ADC + */ + async command const msp430adc12_channel_config_t* getConfiguration (); + + async command const adc12memctl_t* getAdditionalChannels (); +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc new file mode 100644 index 0000000000..f5eb9ae5a8 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc @@ -0,0 +1,238 @@ +#include +#include "Msp430Adc12.h" +#include "messagetypes.h" + +#ifdef ADC12_TIMERA_ENABLED +#undef ADC12_TIMERA_ENABLED +#endif + +#define ITERATIONS 900 +#define DEADLINE 5000 // 5sec +#define SAMPLES 16 +#define START_FREQUENCY 1000000 // 1MHz +#define STOP_FREQUENCY 25000000 // 25MHz +#define STEP_FREQUENCY 500000 // 500kHz + +module DVSnoRadioP { + provides interface AdcConfigure as AdcConfigure; + uses interface Boot; + uses interface Leds; + uses interface Tasks; + uses interface FreqControl; + uses interface Msp430Adc12MultiChannel as adc; + uses interface Resource as AdcResource; + uses interface UartStream; +} +implementation { + + uint16_t adb[SAMPLES]; + uint32_t actualFreq = START_FREQUENCY; + + uartMessage message = { + freq: START_FREQUENCY, + time: 0, + iter: 0, + num: 0, + current: 0, + voltage: 0, + lock: FALSE + }; + +//prototypes + void printfFloat(float toBePrinted); + void showerror(); + error_t configureAdc(); + error_t readAdc(); + void uwait(uint32_t u); + + msp430adc12_channel_config_t adcconfig = { + inch: INPUT_CHANNEL_A1, + sref: REFERENCE_VREFplus_AVss, + ref2_5v: REFVOLT_LEVEL_2_5, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + + adc12memctl_t channelconfig = { + inch: INPUT_CHANNEL_A2, + sref: REFVOLT_LEVEL_2_5, + eos: 1 + }; + + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &adcconfig; // must not be changed + } + + task void sendMessage(){ + float Gain = 37.5; //(Gm*Rout) + float refVolt = 2.5; + float Nmax = 4095; + float Vout = 0; + float Rsense = 1.01; + + atomic{ + Vout = message.current * refVolt/Nmax; + //Vout = ((float)((uint8_t)(Vout*100)))/100; + //Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV + + message.current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm + //printf("%d,%lu,%lu,", Number, ActFreq, Time); + message.voltage *= (refVolt*2)/Nmax; //multiply by 2 to get the real batery value + + printf("%lu,%lu,%d,%d,", message.freq, message.time, message.iter, message.num); + printfFloat(message.current); + printf(","); + printfFloat(message.voltage); + printf("\n"); + message.lock=FALSE; + } + } + + event void Boot.booted() { + printf("Booted\n"); + // P1DIR |= 0x40; // P1.6 to output direction + // P2DIR |= 0x01; // P2.0 to output direction + // P1SEL |= 0x40; // P1.6 Output SMCLK + // P2SEL |= 0x01; // 2.0 Output MCLK + //request the adc + call AdcResource.request(); + } + + event void AdcResource.granted(){ + error_t e = FAIL; + while(e != SUCCESS){ + e = configureAdc(); + } + /* + * Set start frequency + */ + if(call FreqControl.setMCLKFreq(START_FREQUENCY) != SUCCESS){ + printf("error: set start frequency\n"); + showerror(); + return; + } + /* + * Read first data + */ + readAdc(); + + //Start the First Fibonacci running at START_FREQUENCY + if(call Tasks.getFibonacci(ITERATIONS,DEADLINE) != SUCCESS){ + printf("error: first fib\n"); + showerror(); + return; + } + } + + event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ + bool lock; + printf("fib done: elapsed %lu\n", elapsedTime); + if(status!=SUCCESS){ + printf("error: did not finish fib\nelapsed %lu\n", elapsedTime); + showerror(); + return; + } + printf("wait adc 1\n"); + while(lock){ atomic lock = message.lock; } //wait for any adc convertion to finish + + atomic message.time = elapsedTime; + readAdc(); + + if(actualFreq==STOP_FREQUENCY){ + /* + * Finished, light green led + */ + call Leds.led2On(); + return; + } + if(START_FREQUENCY < STOP_FREQUENCY) + actualFreq += STEP_FREQUENCY; + else + actualFreq -= STEP_FREQUENCY; + + printf("wait adc 2\n"); + while(lock){ atomic lock = message.lock; } //wait for any adc convertion to finish + atomic message.num++; + atomic message.freq = actualFreq; + + if(call FreqControl.setMCLKFreq(actualFreq) != SUCCESS){ + showerror(); + atomic printf("error: in fibDone %d\n", message.num); + return; + } + + if(call Tasks.getFibonacci(ITERATIONS,DEADLINE) != SUCCESS){ + showerror(); + return; + } + + } + + event void Tasks.FibonacciIterationDone(uint16_t iter){ } + + async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ + uint8_t i; + uint32_t current, voltage; + for(i = 0; i<(numSamples/2); i++){ + current += buffer[i]; + voltage += buffer[i+1]; + } + message.current = (float) current/(numSamples/2); + message.voltage = (float) voltage/(numSamples/2); + post sendMessage(); + } + + async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t err){ } + async event void UartStream.receivedByte (uint8_t byte) { } + async event void UartStream.receiveDone (uint8_t* buf, uint16_t len, error_t err) { } + +//functions + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + void showerror(){ + call Leds.led0On(); + } + + error_t configureAdc(){ + error_t e; + e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); + if(e != SUCCESS){ + showerror(); + printf("error %d\n", e); + } + return e; + } + + error_t readAdc(){ + atomic message.lock=TRUE; + return call adc.getData(); + } + + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } +} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/messagetypes.h b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/messagetypes.h new file mode 100644 index 0000000000..381b58face --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/messagetypes.h @@ -0,0 +1,11 @@ + +typedef struct uartMessage{ + uint32_t freq; //actual frequency + uint32_t time; //time elapsed + uint16_t iter; //iteration number + uint16_t num; //number of the fib sequence + float current; //current being consumed + float voltage; //battery voltage + bool lock; +} uartMessage; + diff --git a/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientC.nc b/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientC.nc new file mode 100644 index 0000000000..3302da1492 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientC.nc @@ -0,0 +1,12 @@ + +configuration ClientC{ + +} + +implementation +{ + components new SettingsC(); + components ClientP; + + ClientP.FlashSettings -> SettingsC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientP.nc b/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientP.nc new file mode 100644 index 0000000000..839aa93791 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientP.nc @@ -0,0 +1,50 @@ +#include + +module ClientP @safe(){ + uses interface Settings as FlashSettings; +} + +implementation +{ + uint8_t data[] = {9,33,3,2,5,6,9,25}; + + event void FlashSettings.requestLogin(){ + error_t status; + uint8_t i; + + printf("Second Client: "); + printf("Request login.\n"); + + status = call FlashSettings.login((void*) data, sizeof(data)*sizeof(uint8_t)); + switch (status){ + case EINVAL:{ + printf("Second Client Request Login -> EINVAL.\n"); + break; + } + case SUCCESS:{ + /*printf("Second Client storing to flash: "); + for(i=0; i MainC.Boot; + FlashTestP.Leds -> LedsC; + + components new SettingsC(); + FlashTestP.Settings -> SettingsC; + + components SettingsP; + FlashTestP.Init -> SettingsP; + + components Msp430FlashC; + FlashTestP.Msp430Flash -> Msp430FlashC.Msp430Flash; + + components ClientC; + } diff --git a/tos/platforms/MoteISTx5/tests/tests/FlashTest/FlashTestP.nc b/tos/platforms/MoteISTx5/tests/tests/FlashTest/FlashTestP.nc new file mode 100644 index 0000000000..75fe3e61e7 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/FlashTest/FlashTestP.nc @@ -0,0 +1,86 @@ + +/** + * + **/ + +#include "Timer.h" +#include + +module FlashTestP @safe() +{ + //uses interface Timer as Timer0; + uses interface Leds; + uses interface Boot; + uses interface Settings; + uses interface Init; + uses interface Msp430Flash; + } +implementation +{ + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + //prototypes + void test(void); + + uint8_t data[] = {9,33,3,2,5,6,9,25}; + event void Boot.booted(){ + printf("Booted.\n"); + + if(call Msp430Flash.isFirstBoot() == TRUE); + printf("It's First boot\n"); + + call Init.init(); // this is the first client + //if(call Client.FlashTestClient() == SUCCESS) // this is the second client + // printf("First Client: Second Client as called init"); + + } + + event void Settings.requestLogin(){ + error_t status; + uint8_t i; + + printf("First Client: "); + printf("Request login.\n"); + + status = call Settings.login((void*) data, sizeof(data)*sizeof(uint8_t)); + switch (status){ + case EINVAL:{ + printf("This is the first boot, nothing in flash memory.\n"); + + printf("Storing "); + for(i=0; i + **/ + +configuration ClockTestAppC{ +} +implementation +{ + + components MainC, ClockTestP, LedsC; + //components new TimerMilliC() as Timer0; + components SerialPrintfC; + //components PlatformSerialC; + //ClockTestP.UartByte -> PlatformSerialC; + + components Msp430FreqControlC; + ClockTestP.FreqControl -> Msp430FreqControlC; + + ClockTestP -> MainC.Boot; + //ClockTestP.Timer0 -> Timer0; + ClockTestP.Leds -> LedsC; +} + diff --git a/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/ClockTestP.nc b/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/ClockTestP.nc new file mode 100644 index 0000000000..51630f88e4 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/ClockTestP.nc @@ -0,0 +1,69 @@ + +/** + * Output MCLK and SMCLK on Boot. + * Toggle One Led to know the OS is alive + **/ + +#include "Timer.h" +#include +#include "../../../../chips/msp430/x5xxx/usci/msp430usci.h" + + +module ClockTestP @safe() +{ + //uses interface Timer as Timer0; + uses interface Leds; + uses interface Boot; + uses interface FreqControl; + + //uses interface UartByte; + } +implementation +{ + uint32_t wait = 7536640; + + void uwait(uint32_t u) { + uint32_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + void frequency_swype(uint32_t start_freq, uint32_t end_freq, uint32_t step){ + while(start_freq <= end_freq){ + printf("Setting MCLK frequency to %lu Hz.\n", start_freq); + if(call FreqControl.setMCLKFreq(start_freq) == FAIL ) + printf("Could not change the frequency to: %lu Hz. \r\n", start_freq); + else + printf("MCLK frequency is now %lu Hz. \r\n\n", start_freq); + start_freq = start_freq + step; + uwait(wait*5); + } + } + + event void Boot.booted(){ + uint32_t start_freq = 500000; + uint32_t end_freq = 25000000; + uint32_t step = 500000; + uint8_t source; + uint32_t freq; + + P1DIR |= 0x40; // P1.6 to output direction + P2DIR |= 0x01; // P2.0 to output direction + P1SEL |= 0x40; // P1.6 Output SMCLK + P2SEL |= 0x01; // 2.0 Output MCLK + + printf("#\n\n|************* Starting frequency swype *************|\n\n"); + + if(call FreqControl.getMCLKSource() != SELM__DCOCLKDIV){ + printf("#MCLK is not sourced by DCOCLKDIV.\n\n"); + return; + } + printf("#MCLK is sourced by DCOCLKDIV.\n\n"); + //printf("#VCore will be ajusted to the frequency of MCLK.\n"); + printf("#Start swype at %lu Hz and end at %lu Hz. Use %lu Hz of step.\n", start_freq, end_freq, step); + + frequency_swype(start_freq, end_freq, step); + printf("#\n\n|************* Frequency swype finished *************|\n\n"); + + } +} + diff --git a/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/Makefile b/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/Makefile new file mode 100644 index 0000000000..5c7e922b29 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/Makefile @@ -0,0 +1,3 @@ +COMPONENT=ClockTestAppC +include $(MAKERULES) + diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadio.h b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadio.h new file mode 100644 index 0000000000..e0cdf181ac --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadio.h @@ -0,0 +1,22 @@ +// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ + +#ifndef BLINKTORADIO_H +#define BLINKTORADIO_H + +#ifdef TOS_NODE_ID +#undef TOS_NODE_ID +#define TOS_NODE_ID 1 +#endif + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 1500 +}; + +typedef nx_struct BlinkToRadioMsg { + nx_uint16_t nodeid; + nx_uint16_t counter; + nx_uint16_t teste; +} BlinkToRadioMsg; + +#endif diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc new file mode 100644 index 0000000000..fc7ea5dd8a --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc @@ -0,0 +1,72 @@ +// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ + +/* + * Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * Application file for the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +configuration BlinkToRadioAppC { +} +implementation { + components MainC; + components LedsC; + components BlinkToRadioC as App; + components new TimerMilliC() as Timer0; + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + components SerialPrinfC; + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc new file mode 100644 index 0000000000..c57a7d9144 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc @@ -0,0 +1,134 @@ +// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ + +/* + * Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * Implementation of the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +module BlinkToRadioC { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + uint16_t counter; + message_t pkt; + bool busy = FALSE; + + void setLeds(uint16_t val) { + if (val & 0x01) + call Leds.led0On(); + else + call Leds.led0Off(); + if (val & 0x02) + call Leds.led1On(); + else + call Leds.led1Off(); + if (val & 0x04) + call Leds.led2On(); + else + call Leds.led2Off(); + } + + event void Boot.booted() { + call AMControl.start(); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer0.startPeriodic(TIMER_PERIOD_MILLI); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void Timer0.fired() { + counter++; + if (!busy) { + BlinkToRadioMsg* btrpkt = + (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); + if (btrpkt == NULL) { + return; + } + btrpkt->nodeid = TOS_NODE_ID; + btrpkt->counter = counter; + btrpkt->teste = 23; + if (call AMSend.send(AM_BROADCAST_ADDR, + &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { + busy = TRUE; + printf("Sent a packt\n"); + } + } + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + + if (len == sizeof(BlinkToRadioMsg)) { + BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; + setLeds(btrpkt->counter); + printf("Received \nnodeid: %d\ncounter:%d\ntest:%d\n", btrpkt->nodeid, btrpkt->counter, btrpkt->test); + } + return msg; + } +} diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/Makefile b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/Makefile new file mode 100644 index 0000000000..b713521214 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/Makefile @@ -0,0 +1,3 @@ +COMPONENT=BlinkToRadioAppC +include $(MAKERULES) + diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadio.h b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadio.h new file mode 100644 index 0000000000..a81d7be699 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadio.h @@ -0,0 +1,22 @@ +// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ + +#ifndef BLINKTORADIO_H +#define BLINKTORADIO_H + +#ifdef TOS_NODE_ID +#undef TOS_NODE_ID +#define TOS_NODE_ID 1 +#endif + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 2000 +}; + +typedef nx_struct BlinkToRadioMsg { + nx_uint16_t nodeid; + nx_uint16_t counter; + nx_uint16_t teste; +} BlinkToRadioMsg; + +#endif diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioAppC.nc b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioAppC.nc new file mode 100644 index 0000000000..cfc8a87442 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioAppC.nc @@ -0,0 +1,72 @@ +// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ + +/* + * Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * Application file for the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +configuration BlinkToRadioAppC { +} +implementation { + components MainC; + components LedsC; + components BlinkToRadioC as App; + components new TimerMilliC() as Timer0; + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioC.nc new file mode 100644 index 0000000000..65d7d40e4e --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioC.nc @@ -0,0 +1,131 @@ +// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ + +/* + * Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * Implementation of the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +module BlinkToRadioC { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + uint16_t counter; + message_t pkt; + bool busy = FALSE; + + void setLeds(uint16_t val) { + if (val & 0x01) + call Leds.led0On(); + else + call Leds.led0Off(); + if (val & 0x02) + call Leds.led1On(); + else + call Leds.led1Off(); + if (val & 0x04) + call Leds.led2On(); + else + call Leds.led2Off(); + } + + event void Boot.booted() { + call AMControl.start(); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer0.startPeriodic(TIMER_PERIOD_MILLI); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void Timer0.fired() { + counter++; + if (!busy) { + BlinkToRadioMsg* btrpkt = + (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); + if (btrpkt == NULL) { + return; + } + btrpkt->nodeid = TOS_NODE_ID; + btrpkt->counter = counter; + btrpkt->teste = 23; + if (call AMSend.send(AM_BROADCAST_ADDR, + &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { + busy = TRUE; + } + } + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + if (len == sizeof(BlinkToRadioMsg)) { + BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; + setLeds(btrpkt->counter); + } + return msg; + } +} diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/Makefile b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/Makefile new file mode 100644 index 0000000000..b713521214 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/Makefile @@ -0,0 +1,3 @@ +COMPONENT=BlinkToRadioAppC +include $(MAKERULES) + diff --git a/tos/platforms/MoteISTx5/tests/tests/TimerTest/Makefile b/tos/platforms/MoteISTx5/tests/tests/TimerTest/Makefile new file mode 100644 index 0000000000..d6c413dae3 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/TimerTest/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TimerTestC +include $(MAKERULES) + diff --git a/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestC.nc b/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestC.nc new file mode 100644 index 0000000000..b7b5f2c29f --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestC.nc @@ -0,0 +1,17 @@ + +#include + +configuration TimerTestC { +} +implementation { + components MainC; + components LedsC; + components TimerTestP as App; + components new TimerMilliC() as Timer0; + components SerialPrintfC; + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + +} diff --git a/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestP.nc b/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestP.nc new file mode 100644 index 0000000000..f62bcab261 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestP.nc @@ -0,0 +1,39 @@ + +#include +#include +#define DEADLINE 100 + +module TimerTestP { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; +} +implementation { + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + + event void Boot.booted() { + P6SEL &= 0xFB; //ADC2 sel GIO func + P6DIR |= 0x04; //ADC2 sel output func + P6OUT &= 0xFB; //ADC output 0 + uwait(1000); + P6OUT |= 0x04; //ADC output 1 //start pulse + uwait(1000); + P6OUT &= 0xFB; //ADC output 0 + uwait(1000); + P6OUT |= 0x04; //ADC output 1 //start pulse + call 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zyBBQAxau|aX9aA*(&!Q8QBde2(7qxIqpT?BquwzxW$I>GQ8#bqj&eHExrocj`HeBT z>*bY!gU}0E+IeawVyJjTxxJDO`1<}%#(a+AEN&)WQh*lBPAkfTu3IAM&ORp?OBb`I z@Qxy>s9sg+FJDv$Joi4LD2i&;q|=MZqF?HF^y*^EL9wR + **/ + +configuration PrintfAppC{ +} +implementation +{ + components MainC, PrintfP, LedsC; + components SerialPrintfC; + //components PlatformSerialC; + //ClockTestP.UartByte -> PlatformSerialC; + + PrintfP -> MainC.Boot; + PrintfP.Leds -> LedsC; +} + diff --git a/tos/platforms/MoteISTx5/tests/tests/printf-test/PrintfP.nc b/tos/platforms/MoteISTx5/tests/tests/printf-test/PrintfP.nc new file mode 100644 index 0000000000..587114c503 --- /dev/null +++ b/tos/platforms/MoteISTx5/tests/tests/printf-test/PrintfP.nc @@ -0,0 +1,67 @@ + +/** + * Testing types and variables in tinyos + * Use UART to prinft + **/ + +#include + +module PrintfP @safe() +{ + uses interface Leds; + uses interface Boot; + } +implementation +{ + #define MHZ 1000000 + + uint32_t frequency = 12000000; //1 MHz + float dco0_max [] = {0.2, 0.36, 0.75, 1.51, 3.2, 6.0, 10.7, 19.6}; + float dco31_min [] = {0.7, 1.47, 3.17, 6.07, 12.3, 23.7, 39.0, 60.0}; + bool rangefound = FALSE; + float ratio = 1.12; + uint8_t RSELx = 0; + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + void printfFloat(float toBePrinted) { + uint32_t fi, f0, f1, f2; + char c; + float f = toBePrinted; + + if (f<0){ + c = '-'; f = -f; + } else { + c = ' '; + } + + // integer portion. + fi = (uint32_t) f; + + // decimal portion...get index for up to 3 decimal places. + f = f - ((float) fi); + f0 = f*10; f0 %= 10; + f1 = f*100; f1 %= 10; + f2 = f*1000; f2 %= 10; + printf("\n\n%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); + } + + event void Boot.booted(){ + + printf("Searching RSELx for the frequency of %d MHz.\n", (uint8_t)(frequency/MHZ)); + while(!rangefound){ + if((frequency >= (uint32_t)((dco0_max[RSELx]*ratio)*MHZ)) && (frequency < (uint32_t)((dco31_min[RSELx]/ratio)*MHZ))){ + rangefound = TRUE; + printf("RSELx found. Use RSELx = %d!\n", RSELx); + } + else{ + RSELx++; + printf("Try RSELx = %d...\n", RSELx); + } + } + } +} + From a619498ad3c2d2cb7d3bde4de375f451306d4b10 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Sun, 19 Feb 2012 19:17:25 +0000 Subject: [PATCH 272/411] Added primitive support for the ADG715 chip present in the platform Only default intinialization (all used switches ON) is implemented --- .../MoteISTx5/chips/adg715/ADG715C.nc | 13 +++++++++ .../MoteISTx5/chips/adg715/ADG715P.nc | 27 +++++++++++++++++++ tos/platforms/MoteISTx5/hardware.h | 15 +++++------ .../MoteISTx5/hardware/usci/PlatformI2CC.nc | 17 ++++++++++++ .../MoteISTx5/hardware/usci/PlatformI2CP.nc | 16 +++++++++++ .../hardware/usci/PlatformUsciMapC.nc | 18 ++++++++----- 6 files changed, 92 insertions(+), 14 deletions(-) create mode 100644 tos/platforms/MoteISTx5/chips/adg715/ADG715C.nc create mode 100644 tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc create mode 100644 tos/platforms/MoteISTx5/hardware/usci/PlatformI2CC.nc create mode 100644 tos/platforms/MoteISTx5/hardware/usci/PlatformI2CP.nc diff --git a/tos/platforms/MoteISTx5/chips/adg715/ADG715C.nc b/tos/platforms/MoteISTx5/chips/adg715/ADG715C.nc new file mode 100644 index 0000000000..6f6c42e5fe --- /dev/null +++ b/tos/platforms/MoteISTx5/chips/adg715/ADG715C.nc @@ -0,0 +1,13 @@ +configuration ADG715C { + provides interface Init as DefaultInit; +} +implementation{ + + components ADG715P; + DefaultInit = ADG715P; + + components PlatformI2CC as I2C; + + ADG715P.StdControl -> I2C; + ADG715P.I2CPacket -> I2C; +} diff --git a/tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc b/tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc new file mode 100644 index 0000000000..de771fb877 --- /dev/null +++ b/tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc @@ -0,0 +1,27 @@ +module ADG715P { + provides interface Init as DefaultInit; + uses { + interface StdControl; + interface I2CPacket; + //interface Msp430UsciError; + } +} +implementation{ + + command error_t DefaultInit.init() { + uint8_t data = 0x7E; + + call StdControl.start(); //request I2C module + + //0x48 - 10010 0 0 + // MSBs A1 A0 + //0x7E - all switches on (from D2 to D7) + return call I2CPacket.write(I2C_START | I2C_STOP, 0x0048, 1, &data); //Turn all switches on + } + + async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){ + call StdControl.stop(); + } + + async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){} +} diff --git a/tos/platforms/MoteISTx5/hardware.h b/tos/platforms/MoteISTx5/hardware.h index 334c0d4e77..86223bfd54 100755 --- a/tos/platforms/MoteISTx5/hardware.h +++ b/tos/platforms/MoteISTx5/hardware.h @@ -46,19 +46,18 @@ enum { TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, }; +#define TOS_DEFAULT_BAUDRATE 9600 +//#define TOS_DEFAULT_BAUDRATE 115200 +//#define UART_SMCLK_XTAL_4MHz +//#define UART_SMCLK_XTAL_16MHz -//#define TOS_DEFAULT_BAUDRATE 9600 -#define TOS_DEFAULT_BAUDRATE 115200 - -/* uart is sourced by SMCLK that has 4MHz XTAL reference +/* uart is sourced by SMCLK that has 4MHz or 16MHz XTAL reference * only works with 9600 and 115200 baudrates * for other baudrates edit msp430usci.h */ -//#define UART_SMCLK_XTAL_4MHz -#define UART_SMCLK_XTAL_16MHz -//#define UART_SOURCE_REFOCLK -/* Use the 32kHz crystal or REFOCLK */ +#define UART_SOURCE_REFOCLK +/* Use the 32kHz crystal or REFOCLK instead of SMCLK*/ //Unlock for Special funcionality of PINS such as SPI diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformI2CC.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformI2CC.nc new file mode 100644 index 0000000000..a98808ec0b --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformI2CC.nc @@ -0,0 +1,17 @@ +configuration PlatformI2CC { + provides { + interface StdControl; + interface I2CPacket; + interface Msp430UsciError; + } +} +implementation { + components PlatformI2CP; + StdControl = PlatformI2CP; + + components new Msp430UsciI2CB1C() as I2CC; + + I2CPacket = I2CC; + Msp430UsciError = I2CC; + PlatformI2CP.Resource -> I2CC.Resource; +} diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformI2CP.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformI2CP.nc new file mode 100644 index 0000000000..6ba12fcae3 --- /dev/null +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformI2CP.nc @@ -0,0 +1,16 @@ +module PlatformI2CP { + provides interface StdControl; + uses interface Resource; +} +implementation { + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop(){ + return call Resource.release(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc index cdeee335a0..f629b292f5 100755 --- a/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2012 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -44,12 +45,17 @@ configuration PlatformUsciMapC { } implementation { components HplMsp430GeneralIOC as GIO; - // components Msp430UsciUartA0P as UartA0C; -// UartA0C.URXD -> GIO.UCA0RXD; -// UartA0C.UTXD -> GIO.UCA0TXD; + components Msp430UsciUartA0P as UartA0C; + UartA0C.URXD -> GIO.UCA0RXD; + UartA0C.UTXD -> GIO.UCA0TXD; components Msp430UsciSpiB0P as SpiB0C; - SpiB0C.SIMO -> GIO.UCB0SIMO; - SpiB0C.SOMI -> GIO.UCB0SOMI; - SpiB0C.CLK -> GIO.UCB0CLK; + SpiB0C.SIMO -> GIO.UCB0SIMO; + SpiB0C.SOMI -> GIO.UCB0SOMI; + SpiB0C.CLK -> GIO.UCB0CLK; + + components Msp430UsciI2CB1P as I2CB1C; + I2CB1C.SDA -> GIO.UCB1SDA; + I2CB1C.SCL -> GIO.UCB1SCL; + } From b5d3a33b0f2521170df69dc4511904f48dad1289 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Sun, 19 Feb 2012 19:19:43 +0000 Subject: [PATCH 273/411] Update PlatformC and PlatformP to initialize ADG715 Update .platfom Update PlatformClock to init XT2 if defined in hardware.h Update PlatformPins to init as output and set low Clean PlatformSpi --- tos/platforms/MoteISTx5/.platform | 2 ++ tos/platforms/MoteISTx5/PlatformC.nc | 4 +++ tos/platforms/MoteISTx5/PlatformP.nc | 3 +- .../hardware/clock/PlatformClockP.nc | 27 +++++++++++++++++- .../MoteISTx5/hardware/pins/PlatformPinsP.nc | 28 +++++++++++-------- .../MoteISTx5/hardware/usci/PlatformSpiC.nc | 6 ---- .../MoteISTx5/hardware/usci/PlatformSpiP.nc | 3 +- 7 files changed, 51 insertions(+), 22 deletions(-) diff --git a/tos/platforms/MoteISTx5/.platform b/tos/platforms/MoteISTx5/.platform index 680686b2d0..ff47780c97 100755 --- a/tos/platforms/MoteISTx5/.platform +++ b/tos/platforms/MoteISTx5/.platform @@ -12,6 +12,8 @@ for (split(/\n/, <<'EOText' %P/hardware/adc %P/hardware/clock %P/hardware/pmm + %P/chips/adg715 + %P/tests/DVSTest/Tasks %P/tests/DVSTest diff --git a/tos/platforms/MoteISTx5/PlatformC.nc b/tos/platforms/MoteISTx5/PlatformC.nc index 0ba4edbb5a..12f8e46ff3 100755 --- a/tos/platforms/MoteISTx5/PlatformC.nc +++ b/tos/platforms/MoteISTx5/PlatformC.nc @@ -63,4 +63,8 @@ implementation { components PlatformClockC; PlatformP.PlatformClock -> PlatformClockC; + + components ADG715C; + PlatformP.AnalogSwitches -> ADG715C; + } diff --git a/tos/platforms/MoteISTx5/PlatformP.nc b/tos/platforms/MoteISTx5/PlatformP.nc index 05a068454b..5177030720 100755 --- a/tos/platforms/MoteISTx5/PlatformP.nc +++ b/tos/platforms/MoteISTx5/PlatformP.nc @@ -41,6 +41,7 @@ module PlatformP { interface Init as PlatformClock; interface Init as MoteInit; interface Init as PeripheralInit; + interface Init as AnalogSwitches; } } @@ -58,7 +59,7 @@ implementation { call PlatformLeds.init(); // Initializes the Leds call PlatformClock.init(); // Initializes UCS call PeripheralInit.init(); - + call AnalogSwitches.init(); // Wait an arbitrary 10 milliseconds for the FLL to calibrate the DCO // before letting the system continue on into a low power mode. uwait(1024*10); diff --git a/tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc b/tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc index cf3b9554e8..7dc9fab119 100755 --- a/tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc +++ b/tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc @@ -1,4 +1,4 @@ -/* +/* copyright (c) 2012 João Gonçalves * Copyright (c) 2010 People Power Co. * All rights reserved. * @@ -142,6 +142,31 @@ module PlatformClockP { #endif /* PLATFORM_MSP430_HAS_XT1 */ +#if defined(PLATFORM_MSP430_HAS_XT2) && (0 == PLATFORM_MSP430_HAS_XT2) + /* Specifically told that there is no crystal. Do nothing. */ +#else /* PLATFORM_MSP430_HAS_XT2 */ + + //set P5SEL.2 (in) and P5SEL.3(out) to cristal mode (XT2IN and XT2OUT bits = 1) + P5SEL |= (BIT2 | BIT3); + // XT2 on, sourced internally + UCSCTL6 &= ~(XT2BYPASS | XT2OFF); + //From TI example code msp430x54x_UCS_2.c + do { + // Clear XT2,XT1,DCO fault flags + UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while (SFRIFG1&OFIFG); // Test oscillator fault flag + + if (UCSCTL7 & XT2OFFG) { + //P7DIR |= (BIT0 | BIT1); + P7SEL &= ~(BIT0| BIT1); + UCSCTL6 |= XT2OFF; + } else { + UCSCTL6 &= ~(XT2DRIVE_3); // Xtal is now stable, reduce drive + } + +#endif /* PLATFORM_MSP430_HAS_XT2 */ + return call SubInit.init(); } } diff --git a/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc b/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc index 4a685a7711..a30eb8f6f7 100755 --- a/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc +++ b/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2012 João Gonçalves * Copyright (c) 2009-2010 People Power Company * All rights reserved. * @@ -37,6 +38,9 @@ /** * @author David Moss * @author Peter A. Bigot + * + * @author João Gonçalves + * Initialize all pins to output and set them low */ module PlatformPinsP { @@ -51,63 +55,63 @@ implementation { #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) P1DIR = 0xFF; - P1OUT = 0xFF; + P1OUT = 0x00; #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) P2DIR = 0xFF; - P2OUT = 0xFF; + P2OUT = 0x00; #endif #if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) P3DIR = 0xFF; - P3OUT = 0xFF; + P3OUT = 0x00; #endif #if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__) P4DIR = 0xFF; - P4OUT = 0x7F; + P4OUT = 0x00; #endif #if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) P5DIR = 0xFF; - P5OUT = 0xFF; + P5OUT = 0x00; #endif #if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__) P6DIR = 0xFF; - P6OUT = 0xFF; + P6OUT = 0x00; #endif #if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) P7DIR = 0xFF; - P7OUT = 0xFF; + P7OUT = 0x00; #endif #if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) P8DIR = 0xFF; - P8OUT = 0xFF; + P8OUT = 0x00; #endif #if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) P9DIR = 0xFF; - P9OUT = 0xFF; + P9OUT = 0x00; #endif #if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) P10DIR = 0xFF; - P10OUT = 0xFF; + P10OUT = 0x00; #endif #if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) P11DIR = 0xFF; - P11OUT = 0xFF; + P11OUT = 0x00; #endif #if defined(__msp430_have_portJ) || defined(__MSP430_HAS_PORTJ__) || defined(__MSP430_HAS_PORTJ_R__) PJDIR = 0xFF; - PJOUT = 0xFF; + PJOUT = 0x00; #endif #if 0 /* Disabled: these specific setting sare defaults, but others might not be */ diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc index 6e24437008..7d49beb06d 100644 --- a/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc @@ -11,9 +11,6 @@ configuration PlatformSpiC { implementation { components PlatformSpiP; - - //components MainC; - // MainC.SoftwareInit -> PlatformSpiP; components new Msp430UsciSpiB0C() as SpiC; @@ -23,8 +20,5 @@ implementation { Msp430UsciError = SpiC; PlatformSpiP.Resource -> SpiC.Resource; - - components PlatformLedsC; - PlatformSpiP.Leds -> PlatformLedsC; } diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc b/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc index 852e3aa4a0..dbf70cf4a8 100644 --- a/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc +++ b/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc @@ -2,8 +2,7 @@ module PlatformSpiP { provides interface Init; uses { - interface Resource; - interface Leds; + interface Resource; } } From 35846bcbaef6c8c900670797938ab45ee633d577 Mon Sep 17 00:00:00 2001 From: GEMS-IST Date: Mon, 5 Mar 2012 23:38:14 +0000 Subject: [PATCH 274/411] Change default pins initialization to input pull-down resistor enabled. --- .../MoteISTx5/hardware/pins/PlatformPinsP.nc | 46 ++++++++++--------- 1 file changed, 25 insertions(+), 21 deletions(-) diff --git a/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc b/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc index a30eb8f6f7..7e44d40d6c 100755 --- a/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc +++ b/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc @@ -54,73 +54,77 @@ implementation { atomic { #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) - P1DIR = 0xFF; + P1DIR = 0x00; P1OUT = 0x00; + P1REN = 0xFF; #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) - P2DIR = 0xFF; + P2DIR = 0x00; P2OUT = 0x00; + P2REN = 0xFF; #endif #if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) - P3DIR = 0xFF; + P3DIR = 0x00; P3OUT = 0x00; + P3REN = 0xFF; #endif #if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__) - P4DIR = 0xFF; + P4DIR = 0x00; P4OUT = 0x00; - + P4REN = 0xFF; #endif #if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) - P5DIR = 0xFF; + P5DIR = 0x00; P5OUT = 0x00; + P5REN = 0xFF; #endif #if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__) - P6DIR = 0xFF; + P6DIR = 0x00; P6OUT = 0x00; + P6REN = 0xFF; #endif #if defined(__msp430_have_port7) || defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__) - P7DIR = 0xFF; + P7DIR = 0x00; P7OUT = 0x00; + P7REN = 0xFF; #endif #if defined(__msp430_have_port8) || defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__) - P8DIR = 0xFF; + P8DIR = 0x00; P8OUT = 0x00; + P8REN = 0xFF; #endif #if defined(__msp430_have_port9) || defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__) - P9DIR = 0xFF; + P9DIR = 0x00; P9OUT = 0x00; + P9REN = 0xFF; #endif #if defined(__msp430_have_port10) || defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__) - P10DIR = 0xFF; + P10DIR = 0x00; P10OUT = 0x00; + P10REN = 0xFF; #endif #if defined(__msp430_have_port11) || defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__) - P11DIR = 0xFF; + P11DIR = 0x00; P11OUT = 0x00; + P11REN = 0XFF; #endif #if defined(__msp430_have_portJ) || defined(__MSP430_HAS_PORTJ__) || defined(__MSP430_HAS_PORTJ_R__) - PJDIR = 0xFF; - PJOUT = 0x00; + //PJDIR = 0x00; + //PJOUT = 0x00; + //PJREN = 0xFF; #endif -#if 0 /* Disabled: these specific setting sare defaults, but others might not be */ - PMAPPWD = PMAPPW; // Get write-access to port mapping regs - P1MAP5 = PM_UCA0RXD; // Map UCA0RXD output to P1.5 - P1MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6 - PMAPPWD = 0; // Lock port mapping registers -#endif // - } return SUCCESS; } From c790fdc018e21ea1f268b1c087c6aa6a0f032106 Mon Sep 17 00:00:00 2001 From: GEMS-IST Date: Mon, 5 Mar 2012 23:39:49 +0000 Subject: [PATCH 275/411] Fixed call to StdControl.stop() in ADG715P --- tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc b/tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc index de771fb877..87e3f0d8c3 100644 --- a/tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc +++ b/tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc @@ -7,20 +7,25 @@ module ADG715P { } } implementation{ + + task void stop(){ + call StdControl.stop(); + } + command error_t DefaultInit.init() { - uint8_t data = 0x7E; + uint8_t data = 0xFF; call StdControl.start(); //request I2C module //0x48 - 10010 0 0 // MSBs A1 A0 //0x7E - all switches on (from D2 to D7) - return call I2CPacket.write(I2C_START | I2C_STOP, 0x0048, 1, &data); //Turn all switches on + return call I2CPacket.write(I2C_START | I2C_STOP, 0x48, 1, &data); //Turn all switches on } async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){ - call StdControl.stop(); + post stop(); } async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){} From 503bae9cb956e7f7362011fb9f19742a24c382d7 Mon Sep 17 00:00:00 2001 From: GEMS-IST Date: Mon, 5 Mar 2012 23:40:50 +0000 Subject: [PATCH 276/411] Changed default XT2ON to OFF. --- tos/platforms/MoteISTx5/hardware.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/platforms/MoteISTx5/hardware.h b/tos/platforms/MoteISTx5/hardware.h index 86223bfd54..51a763794c 100755 --- a/tos/platforms/MoteISTx5/hardware.h +++ b/tos/platforms/MoteISTx5/hardware.h @@ -71,7 +71,7 @@ enum { #endif /* PLATFORM_MSP430_HAS_XT1 */ #ifndef PLATFORM_MSP430_HAS_XT2 -#define PLATFORM_MSP430_HAS_XT2 1 +#define PLATFORM_MSP430_HAS_XT2 0 #endif /* PLATFORM_MSP430_HAS_XT2 */ /* default DCO configuration */ From e952f93bbaa9a3a3c0fa494302e99b012639b3cd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Mon, 18 Jun 2012 11:19:26 +0100 Subject: [PATCH 277/411] Renamed platform to moteist5 Remove tests directory --- .../{MoteISTx5.target => moteist5.target} | 4 +- .../MultipleNoRepeat-mean/FastADCAppC.nc | 60 ---- .../MultipleNoRepeat-mean/FastADCC.nc | 204 ------------ .../MultipleNoRepeat-mean/Makefile | 2 - .../MultipleNoRepeat/ConfigureAdc.nc | 47 --- .../MultipleNoRepeat/FastADCAppC.nc | 59 ---- .../MultiChannel/MultipleNoRepeat/FastADCC.nc | 219 ------------- .../MultiChannel/MultipleNoRepeat/Makefile | 7 - .../MultipleNoRepeat/adc_configuration.h | 2 - .../MultipleRepeat/FastADCAppC.nc | 60 ---- .../SingleChannel/MultipleRepeat/FastADCC.nc | 178 ---------- .../SingleChannel/MultipleRepeat/Makefile | 7 - .../MultipleRepeat-mean/AdcTestSamplesOutput | 244 -------------- .../MultipleRepeat-mean/FastADCAppC.nc | 60 ---- .../MultipleRepeat-mean/FastADCC.nc | 223 ------------- .../MultipleRepeat-mean/Makefile | 7 - .../readings/adcCurrent1MHz.csv | Bin 6801 -> 0 bytes .../readings/adcCurrent1MHzVREFneg.csv | Bin 6801 -> 0 bytes .../readings/adcErrorBAT.csv | Bin 6166 -> 0 bytes .../readings/adcErrorFET-VREFneg.csv | Bin 1 -> 0 bytes .../readings/adcErrorFET.csv | Bin 6164 -> 0 bytes .../readings/adcErrorVREFneg.csv | Bin 6164 -> 0 bytes .../SingleChannel/SingleRepeat/FastADCAppC.nc | 60 ---- .../SingleChannel/SingleRepeat/FastADCC.nc | 153 --------- .../SingleChannel/SingleRepeat/Makefile | 7 - .../MoteISTx5/tests/DVSTest/Micaz/Makefile | 2 - .../tests/DVSTest/Micaz/MicaTaskC.nc | 26 -- .../tests/DVSTest/Micaz/MicaTaskP.nc | 156 --------- .../MoteISTx5/tests/DVSTest/RadioAdc/Makefile | 2 - .../MoteISTx5/tests/DVSTest/RadioAdc/Radio.h | 43 --- .../tests/DVSTest/RadioAdc/RadioAdcC.nc | 44 --- .../tests/DVSTest/RadioAdc/RadioAdcP.nc | 308 ------------------ .../RadioConstFrequencyNoAdc/DVSTestAppC.nc | 35 -- .../RadioConstFrequencyNoAdc/DVSTestP.nc | 140 -------- .../DVSTest/RadioConstFrequencyNoAdc/Makefile | 2 - .../RadioConstFrequencyNoAdc/Micaz/Makefile | 2 - .../Micaz/MicaTaskC.nc | 26 -- .../Micaz/MicaTaskP.nc | 127 -------- .../DVSTest/RadioConstFrequencyNoAdc/Radio.h | 42 --- .../RadioConstFrequencyNoAdc/Tasks/Tasks.nc | 24 -- .../RadioConstFrequencyNoAdc/Tasks/TasksC.nc | 11 - .../RadioConstFrequencyNoAdc/Tasks/TasksP.nc | 75 ----- .../Tasks/fibonacci/fib | Bin 7253 -> 0 bytes .../Tasks/fibonacci/fibonacci.c | 69 ---- .../RadioConstFrequencyNoAdc/Tasks/pi/pi | Bin 7272 -> 0 bytes .../RadioConstFrequencyNoAdc/Tasks/pi/pi.c | 9 - .../tests/DVSTest/RadioNoAdc/DVSTestAppC.nc | 39 --- .../tests/DVSTest/RadioNoAdc/DVSTestP.nc | 180 ---------- .../tests/DVSTest/RadioNoAdc/Makefile | 2 - .../MoteISTx5/tests/DVSTest/Tasks/Tasks.nc | 24 -- .../MoteISTx5/tests/DVSTest/Tasks/TasksC.nc | 11 - .../MoteISTx5/tests/DVSTest/Tasks/TasksP.nc | 81 ----- .../tests/DVSTest/Tasks/fibonacci/fib | Bin 7253 -> 0 bytes .../tests/DVSTest/Tasks/fibonacci/fibonacci.c | 69 ---- .../MoteISTx5/tests/DVSTest/Tasks/pi/pi | Bin 7272 -> 0 bytes .../MoteISTx5/tests/DVSTest/Tasks/pi/pi.c | 9 - .../DVSTest/noRadio/2Channels/DVSnoRadioC.nc | 32 -- .../DVSTest/noRadio/2Channels/DVSnoRadioP.nc | 203 ------------ .../tests/DVSTest/noRadio/2Channels/Makefile | 2 - .../tests/DVSTest/noRadio/2Channels/test.txt | 165 ---------- .../DVSTest/noRadio/3Channels/DVSnoRadioC.nc | 37 --- .../DVSTest/noRadio/3Channels/DVSnoRadioP.nc | 257 --------------- .../tests/DVSTest/noRadio/3Channels/Makefile | 2 - .../noRadio/FibonacciTest/DVSnoRadioC.nc | 32 -- .../noRadio/FibonacciTest/DVSnoRadioP.nc | 237 -------------- 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tos/platforms/{MoteISTx5 => moteist5}/hardware/usci/PlatformSpiP.nc (100%) rename tos/platforms/{MoteISTx5 => moteist5}/hardware/usci/PlatformUsciMapC.nc (100%) rename tos/platforms/{MoteISTx5 => moteist5}/hardware/usci/msp430usci.h (100%) rename tos/platforms/{MoteISTx5 => moteist5}/platform.h (100%) rename tos/platforms/{MoteISTx5 => moteist5}/platform_message.h (100%) diff --git a/support/make/MoteISTx5.target b/support/make/moteist5.target similarity index 69% rename from support/make/MoteISTx5.target rename to support/make/moteist5.target index 2e58dabeac..71ccc885ed 100644 --- a/support/make/MoteISTx5.target +++ b/support/make/moteist5.target @@ -1,9 +1,9 @@ #-*-Makefile-*- vim:syntax=make -PLATFORM = MoteISTx5 +PLATFORM = moteist5 MSP_MCU = msp430f5438a $(call TOSMake_include_platform,msp) -MoteISTx5: $(BUILD_DEPS) +moteist5: $(BUILD_DEPS) @: diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc deleted file mode 100644 index 84806b6bb5..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.overflow -> Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc deleted file mode 100644 index 7ea1a1ef36..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc +++ /dev/null @@ -1,204 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define SAMPLES 16 - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource; - -} - -implementation{ - - uint16_t adb[SAMPLES]; - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureMultiple(); - - event void Boot.booted(){ - call Resource.request(); - } - - event void Resource.granted(){ - uint8_t i; - error_t e = FAIL; - while(e != SUCCESS){ - e = configureMultiple(); - } - - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - - for(i=0; i<5; i++){ - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - } - - - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - printadb(); - return buffer; - } - - async event error_t adc.singleDataReady(uint16_t data){ - return FAIL; - } -//functions - - void printadb(){ - uint8_t i; - float mean = 0; - float Gain = 37.461; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Vout = 0; - float Current = 0; - float Vsense = 0; - float Rsense = 1.01; - - for(i = 0; i < SAMPLES; i++){ - mean += (float) adb[i]; - //printf("Sample %d =", i); - //printfFloat((float) adb[i]); - //printf("\n"); - } - mean = mean/SAMPLES; - printf("Sample mean ="); - printfFloat(mean); - printf("\n"); - - printf("Vout mean (into ADC) ="); - Vout = mean*refVolt/Nmax; - printfFloat(Vout); - printf(" V\n"); - - Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV - printf("Vsense ="); - printfFloat(Vsense); - printf(" mV\n"); - - Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm - printf("Current ="); - printfFloat(Current); - printf(" mA\n"); - - Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - printf("Current ="); - printfFloat(Current); - printf(" mA\n"); - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureMultiple(){ - error_t e; - printf("Configure multipleRepeat\n"); - e = call adc.configureMultiple(&adcconfig, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile deleted file mode 100644 index d0904ef732..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=FastADCAppC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc deleted file mode 100644 index 28f536c255..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * This open source code was developed with funding from People Power Company - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -#include "Msp430Adc12.h" - -interface Msp430UsciConfigure { - /** - * Return a pointer to the configuration that should be used for the ADC - */ - async command const msp430adc12_channel_config_t* getConfiguration (); - - async command const adc12memctl_t* getAdditionalChannels (); -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc deleted file mode 100644 index 790561e6b0..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc deleted file mode 100644 index 100ac4cc9e..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc +++ /dev/null @@ -1,219 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * 2 Channels convertion - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define SAMPLES 15 - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource; -} - -implementation{ - - uint16_t adb[SAMPLES]; - - msp430adc12_channel_config_t adcconfig = { - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_1024_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - /*adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - };*/ - adc12memctl_t channelconfig [] = { - {INPUT_CHANNEL_A2, REFVOLT_LEVEL_2_5, 0}, - {INPUT_CHANNEL_A3, REFVOLT_LEVEL_2_5, 1} - }; - adc12memctl_t * adcchannelconfig = (adc12memctl_t *) channelconfig; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configure(); - - event void Boot.booted(){ - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - printf("Booting...\n"); - call Resource.request(); - } - - event void Resource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configure(); - } - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - /** - * Conversion results are ready. Results are stored in the buffer in the - * order the channels where specified in the configure() - * command, i.e. every (numMemctl+1)-th entry maps to the same channel. - * - * @param buffer Conversion results (lower 12 bit are valid, respectively). - * @param numSamples Number of results stored in buffer - */ - printadb(); - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - //functions - - void printadb(){ - uint8_t i; - uint32_t VCurrentMean = 0; - uint32_t VCoreMean = 0; - uint32_t VbatMean = 0; - - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Rsense = 1.01; - float curr=0; - float bat =0; - float core=0; - - for(i = 0; i < SAMPLES; i++){ - printf("adb[%d] = %d ->", i, adb[i]); - core = (float)adb[i]*2.5/4095; - printfFloat(core); - } - uwait(1024*6); - /* - for(i = 0; i < SAMPLES; i+=3){ - VCurrentMean += adb[i]; - VbatMean += adb[i+1]; - VCoreMean += adb[i+2]; - } - VCurrentMean /= (SAMPLES/3); //bits - VCoreMean /= (SAMPLES/3); // bits - VbatMean /= (SAMPLES/3); // bits - curr = ((float)VCurrentMean)*2.5/Nmax); - curr /= (Gain*Rsense); - curr = curr *1000;//value in mA - - bat = (((float)VCoreMean)*2.5/Nmax)*2; //value in V - - core = ((float)VCoreMean)*1.5/Nmax; // in V - //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //voltageMean *= 2; // multiply by 2 to get total battery voltage - printf("Current,Supply,Vcore\n"); - printfFloat(curr); - printf(","); - printfFloat(bat); - printf(","); - printfFloat(core); - printf("\n"); - //printf("%d,%lu,%lu,%lu,%lu,%lu\n", Number, ActFreq, Time, VCurrentMean, VbatMean, VCoreMean); - */ - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configure(){ - error_t e; - e = call adc.configure(&adcconfig, adcchannelconfig, 2, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile deleted file mode 100644 index 535593717b..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -COMPONENT=FastADCAppC -#CFLAGS += -DPRINTFUART_ENABLED -#CFLAGS += -DADC12_ONLY_WITH_DMA -# already defined in msp430/adc12/Msp430Adc12.h -#CFLAGS += -DADC12_TIMERA_ENABLED - -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h b/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h deleted file mode 100644 index 94c62756ea..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h +++ /dev/null @@ -1,2 +0,0 @@ -#include "Msp430Adc12.h" - diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc deleted file mode 100644 index 84806b6bb5..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.overflow -> Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc deleted file mode 100644 index 10c452b52d..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define SAMPLES 16 - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource; - -} - -implementation{ - - uint16_t adb[SAMPLES]; - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_8_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureMultiple(); - - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - event void Boot.booted(){ - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - printf("Booting...\n"); - call Resource.request(); - } - - event void Resource.granted(){ - error_t e = FAIL; - printf("Resource Granted\n"); - while(e != SUCCESS){ - e = configureMultiple(); - } - printf("Starting 1st conversion\n"); - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - printf("Samples ready\n"); - printadb(); - uwait(4096); - return buffer; - } - - async event error_t adc.singleDataReady(uint16_t data){ - return FAIL; - } -//functions - - void printadb(){ - uint16_t i; - float voltage = 0; - printf("Printing buffer\n"); - for(i = 0; i < SAMPLES; i++){ - printf("adb[%d] = %d ->", i, adb[i]); - voltage = adb[i]*2.5/4095; - printfFloat(voltage); - } - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d Volt\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureMultiple(){ - error_t e; - printf("Configure multipleRepeat\n"); - e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile deleted file mode 100644 index 535593717b..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -COMPONENT=FastADCAppC -#CFLAGS += -DPRINTFUART_ENABLED -#CFLAGS += -DADC12_ONLY_WITH_DMA -# already defined in msp430/adc12/Msp430Adc12.h -#CFLAGS += -DADC12_TIMERA_ENABLED - -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput deleted file mode 100644 index 741e490853..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput +++ /dev/null @@ -1,244 +0,0 @@ -Configure multipleRepeat -Starting the ADC... - -Printing ADC set of samples Nº0. -Sample 0 = 3830.000 -Sample 1 = 2989.000 -Sample 2 = 2546.000 -Sample 3 = 2283.000 -Sample 4 = 2114.000 -Sample 5 = 2010.000 -Sample 6 = 1929.000 -Sample 7 = 1875.000 -Sample 8 = 1839.000 -Sample 9 = 1812.000 -Sample 10 = 1805.000 -Sample 11 = 1786.000 -Sample 12 = 1781.000 -Sample 13 = 1769.000 -Sample 14 = 1776.000 -Sample 15 = 1761.000 -Sample mean = 2119.062 -Vout mean (into ADC) = 1.293 V -Vsense = 34.534 mV -Current = 34.192 mA - -Printing ADC set of samples Nº1. -Sample 0 = 1695.000 -Sample 1 = 1721.000 -Sample 2 = 1695.000 -Sample 3 = 1692.000 -Sample 4 = 1697.000 -Sample 5 = 1702.000 -Sample 6 = 1692.000 -Sample 7 = 1697.000 -Sample 8 = 1698.000 -Sample 9 = 1688.000 -Sample 10 = 1695.000 -Sample 11 = 1740.000 -Sample 12 = 1701.000 -Sample 13 = 1690.000 -Sample 14 = 1703.000 -Sample 15 = 1691.000 -Sample mean = 1699.812 -Vout mean (into ADC) = 1.037 V -Vsense = 27.701 mV -Current = 27.427 mA - -Printing ADC set of samples Nº2. -Sample 0 = 1836.000 -Sample 1 = 1832.000 -Sample 2 = 1836.000 -Sample 3 = 1835.000 -Sample 4 = 1830.000 -Sample 5 = 1834.000 -Sample 6 = 1836.000 -Sample 7 = 1826.000 -Sample 8 = 1834.000 -Sample 9 = 1836.000 -Sample 10 = 1839.000 -Sample 11 = 1849.000 -Sample 12 = 1834.000 -Sample 13 = 1850.000 -Sample 14 = 1832.000 -Sample 15 = 1835.000 -Sample mean = 1835.875 -Vout mean (into ADC) = 1.120 V -Vsense = 29.919 mV -Current = 29.622 mA - -Printing ADC set of samples Nº3. -Sample 0 = 1876.000 -Sample 1 = 1882.000 -Sample 2 = 1875.000 -Sample 3 = 1890.000 -Sample 4 = 1873.000 -Sample 5 = 1887.000 -Sample 6 = 1873.000 -Sample 7 = 1873.000 -Sample 8 = 1878.000 -Sample 9 = 1872.000 -Sample 10 = 1874.000 -Sample 11 = 1888.000 -Sample 12 = 1883.000 -Sample 13 = 1877.000 -Sample 14 = 1879.000 -Sample 15 = 1880.000 -Sample mean = 1878.750 -Vout mean (into ADC) = 1.146 V -Vsense = 30.617 mV -Current = 30.314 mA - -Printing ADC set of samples Nº4. -Sample 0 = 1909.000 -Sample 1 = 1904.000 -Sample 2 = 1907.000 -Sample 3 = 1905.000 -Sample 4 = 1906.000 -Sample 5 = 1900.000 -Sample 6 = 1909.000 -Sample 7 = 1898.000 -Sample 8 = 1910.000 -Sample 9 = 1909.000 -Sample 10 = 1911.000 -Sample 11 = 1910.000 -Sample 12 = 1908.000 -Sample 13 = 1905.000 -Sample 14 = 1908.000 -Sample 15 = 1910.000 -Sample mean = 1906.812 -Vout mean (into ADC) = 1.164 V -Vsense = 31.075 mV -Current = 30.767 mA - -Printing ADC set of samples Nº5. -Sample 0 = 1907.000 -Sample 1 = 1922.000 -Sample 2 = 1907.000 -Sample 3 = 1913.000 -Sample 4 = 1911.000 -Sample 5 = 1909.000 -Sample 6 = 1911.000 -Sample 7 = 1909.000 -Sample 8 = 1907.000 -Sample 9 = 1954.000 -Sample 10 = 1912.000 -Sample 11 = 1898.000 -Sample 12 = 1907.000 -Sample 13 = 1899.000 -Sample 14 = 1908.000 -Sample 15 = 1925.000 -Sample mean = 1912.437 -Vout mean (into ADC) = 1.167 V -Vsense = 31.166 mV -Current = 30.858 mA - -Printing ADC set of samples Nº6. -Sample 0 = 1903.000 -Sample 1 = 1905.000 -Sample 2 = 1908.000 -Sample 3 = 1906.000 -Sample 4 = 1903.000 -Sample 5 = 1906.000 -Sample 6 = 1909.000 -Sample 7 = 1904.000 -Sample 8 = 1903.000 -Sample 9 = 1902.000 -Sample 10 = 1905.000 -Sample 11 = 1896.000 -Sample 12 = 1914.000 -Sample 13 = 1894.000 -Sample 14 = 1905.000 -Sample 15 = 1900.000 -Sample mean = 1903.937 -Vout mean (into ADC) = 1.162 V -Vsense = 31.028 mV -Current = 30.721 mA - -Printing ADC set of samples Nº7. -Sample 0 = 1895.000 -Sample 1 = 1903.000 -Sample 2 = 1894.000 -Sample 3 = 1890.000 -Sample 4 = 1891.000 -Sample 5 = 1898.000 -Sample 6 = 1896.000 -Sample 7 = 1901.000 -Sample 8 = 1891.000 -Sample 9 = 1888.000 -Sample 10 = 1899.000 -Sample 11 = 1916.000 -Sample 12 = 1897.000 -Sample 13 = 1896.000 -Sample 14 = 1890.000 -Sample 15 = 1899.000 -Sample mean = 1896.500 -Vout mean (into ADC) = 1.157 V -Vsense = 30.907 mV -Current = 30.601 mA - -Printing ADC set of samples Nº8. -Sample 0 = 1887.000 -Sample 1 = 1886.000 -Sample 2 = 1885.000 -Sample 3 = 1881.000 -Sample 4 = 1885.000 -Sample 5 = 1892.000 -Sample 6 = 1886.000 -Sample 7 = 1907.000 -Sample 8 = 1889.000 -Sample 9 = 1898.000 -Sample 10 = 1889.000 -Sample 11 = 1886.000 -Sample 12 = 1889.000 -Sample 13 = 1898.000 -Sample 14 = 1880.000 -Sample 15 = 1883.000 -Sample mean = 1888.812 -Vout mean (into ADC) = 1.153 V -Vsense = 30.781 mV -Current = 30.477 mA - -Printing ADC set of samples Nº9. -Sample 0 = 1867.000 -Sample 1 = 1860.000 -Sample 2 = 1869.000 -Sample 3 = 1866.000 -Sample 4 = 1863.000 -Sample 5 = 1869.000 -Sample 6 = 1870.000 -Sample 7 = 1870.000 -Sample 8 = 1871.000 -Sample 9 = 1869.000 -Sample 10 = 1868.000 -Sample 11 = 1880.000 -Sample 12 = 1871.000 -Sample 13 = 1867.000 -Sample 14 = 1870.000 -Sample 15 = 1862.000 -Sample mean = 1868.250 -Vout mean (into ADC) = 1.140 V -Vsense = 30.446 mV -Current = 30.145 mA - -Printing ADC set of samples Nº9. -Sample 0 = 1867.000 -Sample 1 = 1860.000 -Sample 2 = 1869.000 -Sample 3 = 1866.000 -Sample 4 = 1863.000 -Sample 5 = 1869.000 -Sample 6 = 1870.000 -Sample 7 = 1870.000 -Sample 8 = 1871.000 -Sample 9 = 1869.000 -Sample 10 = 1868.000 -Sample 11 = 1880.000 -Sample 12 = 1871.000 -Sample 13 = 1867.000 -Sample 14 = 1870.000 -Sample 15 = 1862.000 -Sample mean = 1868.250 -Vout mean (into ADC) = 1.140 V -Vsense = 30.446 mV -Current = 30.145 mA diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc deleted file mode 100644 index 84806b6bb5..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.overflow -> Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc deleted file mode 100644 index e2217331f6..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define SAMPLES 16 - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource; - -} - -implementation{ - - uint16_t adb[SAMPLES]; - uint8_t count = 0; - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A2, - //sref: REFERENCE_VREFplus_VREFnegterm, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_8_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void uwait(uint32_t u); - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureMultipleRepeat(); - - event void Boot.booted(){ - call Leds.led0Off(); - call Leds.led1Off(); - call Leds.led2Off(); - call Resource.request(); - } - - event void Resource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureMultipleRepeat(); - } - //printf("Starting the ADC...\n"); - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - //if(count<20){ - printadb(); - // count++; - // } - // else - // return NULL; - // uwait(1024*6); - call Leds.led2Toggle(); - return buffer; - } - - async event error_t adc.singleDataReady(uint16_t data){ - return FAIL; - } -//functions - - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - void printadb(){ - uint8_t i; - float mean = 0; - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Vout = 0; - float Current = 0; - float Vsense = 0; - float Rsense = 1.01; - //printf("Sample,Vin(V)\n"); - for(i = 0; i < SAMPLES; i++){ - mean += (float) adb[i]; - //printfFloat((float) adb[i]); - //printf(","); - Vout = adb[i]*refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //printfFloat(Vout); - //printf("\n"); - } - mean = mean/SAMPLES; - //printf("Sample mean ="); - //printfFloat(mean); - //printf("\n"); - // printf("Mean(V),Vsense(mV),Current(mA),Current(mA)\n"); - //printf("Vout corrected with \" ((float)((uint8_t)(Vout*100)))/100 \" = "); - Vout = mean*refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //printf("Mean Voltage: "); - printfFloat(Vout); - printf("\n"); - /* - Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV - //printf("Vsense ="); - printfFloat(Vsense); - printf(","); - - Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm - //printf("Current ="); - printfFloat(Current); - printf(","); - - Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //printf("Current ="); - printfFloat(Current); - //printf(" mA\n"); - //printf("\n"); - printf("\n");*/ - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2, f3; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - f3 = f*10000;f3 %= 10; - printf("%ld.%d%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2, (uint8_t) f3); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureMultipleRepeat(){ - error_t e; - //printf("Configure multipleRepeat\n"); - e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile deleted file mode 100644 index 535593717b..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -COMPONENT=FastADCAppC -#CFLAGS += -DPRINTFUART_ENABLED -#CFLAGS += -DADC12_ONLY_WITH_DMA -# already defined in msp430/adc12/Msp430Adc12.h -#CFLAGS += -DADC12_TIMERA_ENABLED - -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcCurrent1MHz.csv b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcCurrent1MHz.csv deleted file mode 100644 index add09c2b9852a8eee9f5b4caca5bd7f0fc189b37..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 6801 zcmbuEOOM<*41{y;Uy=ZgfgY4BAA>#Tw7}eR=)(e=!6J|UA5z?L*~JFD#^$0S)Rv{v zrxNLW`19+xfBt^lU;ldh`1 z_cVUrJ-@bF?mCh8`7Ab{fwCz z)ZeSd>!v|gy*0+1^N?Ff=r2XbU$;Hd@l=Dc?U6oTwSU`_tbd2NBs^bg)$uXkqI(|W zh~{JDgof#y$2_ z>>LO*l%Zb0{bjelRW+~2@viu37BNkStP@xDMvJr|O(SQ=eT{yJIZgjOTjc{Jm+r+NJscUNsl)5z(L1Ir(o%d>l$^Mv51M@}MF z+z(Bj=bzBj^8$XJ`*-(+-q@Ek6|p30xTZr(7>lfuIjf^EC(l=zGiYvgQp_80wyh3g z|6=Z9KaEeE#e4sZb2=9T8Yj)IE@`TV+Bj`88%@hB(uOpR_de#}eu_E!z0du-eSelG zoN@~9@O+cT<9nR$?dYdqVAgHHkB|MAG=29|aX;-|HJd(!u*c?jQuXwRmbPK|D1E2yZ>KD{YOrjBhC*47tnC}TlhWtz0QIr zp1)Ge9G>NyR0nZg6!YODm;C!{oI0RgCZMIya!MQKl(`DuiE!5ao`xoV&l0!HJ=IO@ zr;$7OvDM?TPQsp9eb4>OZH(d9R<~W!^u6A%UhfxoSIyv#XFvKWG;^*nhxr{Ta0{<+ zKitLk-70Vg&1U`2oQJ#ud+K!;bGMtH<*Ol2!P&Qbv=q#*F7=wG;u-0(_;;z9`j5JX zI_lIPF(=Oh5Su>*?uc{#o*DfUYn*i&&xh-{6&m}wfyS0U$NculHP7cFr<2TOc)h>O zNc1Z(a|(@SeIDwb9S6_y)xa&*;Q1uRpPYp6SkQEG9yo<&evi|5!H?lZGV3lr7r1jp z^OQ@PN}KuVSiIhMP9<_mT!nj|zXvc!;k!T9nz)e(>1oB` za7gKwFJHg?_2=XM{Kw0u=g+s0!_%UF_vLA+F{qtk%c}MYJ4dw>>?CRnY*_~DH_Ydv z^Spn-{A&AE*qiOg^KA2avR8HN&A-k3InV$8_-Z)ZpMN}Femv~I-+q4o{&@NO)3;ww z|KALtyx!we&P%Z&x~0R7Fs(bLA*}k%8sE+k!loG3{Y*j6GnnV~Z10$dP!zLn|2;-TOSwr7vpwgdj?Z;;GUi|%*lqhEw2M%8fE8A zkeY8%a7HOi5!~2SJqQF#$u-Jc$W0kyr-n59ims>DM3p ziBadz>!&c4yeW#Mti=X}=XD@VLxB%LH1`X5pn0xw2L{elwt<=R9Q!%1fLW-P2W(%h z$9WnrnWr7EndfYu_nX30!7yfSvf3aiybgqE6!?@ESjkjzc;@)@+jPhbUW~U;|-#$xG&O1;!dSnUQ;cv^sANO@4#fmuwZ|A>j}FXpX}i3{=~=5U+BG?Yfr)ysd{nx5)FnD+V! zA6y@ChSnD(oVoExXnm)b#LJGy_`UOv?Zfw5UB8;=^@!1^kC?*rqjjJAQ|9TFU7=Ur zU&1HXTVOD*`@9|)xSk>=<9_x1{o?{{QvN7U!CT|?6sDmzW^S9;{Z_Gp7OqR4;tZ~j zq@TD~=@miXaFep8srY8`1^Vk`e^YIR=+!nD&< z=3N2CA*x;#@Fs}eTY&la9>%<58yI|~|BMUz<7jv3PCw84F)w-j6sDoJ3sec#`iH!D z-PhaQ`EJ_xr{Kv@PcQpd_&mNRAtqk;*#_pWf52$i2MA)`@~YEw#9V^i)6Vu3rf)oL z&3;+Mc`6-GxvqBoD9-HtCvwO25`@0nU znXdclkP=j{YF_>u!ePst`z?^KY-7!uh0tDNAPs0uY9k&Xzx-wbUcO6{_cdhdL3t;A;h&XdX+I@!}kl2Jacz@cMrTr^m#bK!syLeWX#{T-- zb$9o2IKIF2+x_clv%jzC!3>|R8I7-k`Swh9_m}>3>BnzR zpXYOb`q&&F;X7Z&1`?jwFbQueWQMVn@X`rV7g3Pei72E%eY}dPeWir98)@0bu?g&K zLkei==}I}^TDnAVU%H1;E1CTfp`~YA;+INh*Txiz^V+o5FU}GqP)pJYSrv z;r*j#I&epd1C`Kt*l;{-I36~fJZzLND@2iAWVjDKDQYD%ZfK767R{oerJs(!yp4Ao zW>PF!%xY#9jmS(o9oM9Li@!|w76qu-IE%)&i$|G`8V?w@w{@AZwnUZD456omd}eD#{zE|tEhvm^P#D=zrGr^PXeAIL zrRj~{xK8A$WLA&TBGw!6`_o`nU?vp{=AP@NpP*#M{htM9q7j*;$C8^Z?yIN4i)6jv zKFPy(IVH28Gt+Tj>zH7dud@>Q;s0GFYFf#R`xymh#E;Rzh&q$*AFi#f$XuREX1{)L UrgK5PAYI8zKVceuZgxW}^od2Tf{+Nr`h8s1Lh>7VdA2ERLBsor5*9 z;GTpQu567A%=*_K(d@ts%tVA$Px diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcErrorVREFneg.csv b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcErrorVREFneg.csv deleted file mode 100644 index cba180b4056262c846eb6e9706bde2e87fa8593f..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 6164 zcmb`LJ8#@D5QJ0fm)O7|;7hMENbM@X^)6Hdh!26C{QpQ?0lJSyCZytPc#B=`&W?r; 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IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.overflow -> Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc deleted file mode 100644 index a897ef06f5..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc +++ /dev/null @@ -1,153 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource; - -} - -implementation{ - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void showerror(); - error_t configureSingleRepeat(); - void printfFloat(float toBePrinted); - - - event void Boot.booted(){ - printf("Booting...\n"); - call Resource.request(); - } - - event void Resource.granted(){ - error_t e = FAIL; - printf("Resource Granted\n"); - while(e != SUCCESS){ - e = configureSingleRepeat(); - } - printf("Starting 1st conversion\n"); - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - - async event error_t adc.singleDataReady(uint16_t data){ - float voltage = 0; - printf("Sample: %d\nVoltage: ", data); - voltage = data*2.5/4095; - printfFloat(voltage); - return SUCCESS; - } - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - } - -//functions - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureSingleRepeat(){ - error_t e; - printf("Configure singleRepeat\n"); - e = call adc.configureSingleRepeat(&adcconfig, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/Makefile b/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/Makefile deleted file mode 100644 index 535593717b..0000000000 --- a/tos/platforms/MoteISTx5/tests/AdcTest/SingleChannel/SingleRepeat/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -COMPONENT=FastADCAppC -#CFLAGS += -DPRINTFUART_ENABLED -#CFLAGS += -DADC12_ONLY_WITH_DMA -# already defined in msp430/adc12/Msp430Adc12.h -#CFLAGS += -DADC12_TIMERA_ENABLED - -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/Makefile deleted file mode 100644 index 95184a0aae..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=MicaTaskC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskC.nc deleted file mode 100644 index da1aeb47d6..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskC.nc +++ /dev/null @@ -1,26 +0,0 @@ -configuration MicaTaskC { -} -implementation { - components MainC; - components LedsC; - components MicaTaskP as App; - - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //for Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskP.nc deleted file mode 100644 index e28f400ccd..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/Micaz/MicaTaskP.nc +++ /dev/null @@ -1,156 +0,0 @@ -#include -#include "../RadioAdc/Radio.h" - -module MicaTaskP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - message_t pkt; - bool busy = FALSE; - bool up = TRUE; - uint16_t missedDeadlines = 0; - uint16_t metDeadlines = 0; - uint16_t deadline = 100; //now using this one instead of the one in radio.h - uint16_t iterations = 100; //now using this one instead of the one in radio.h - uint16_t numRequest = 0; //serves as a counter for rasing or lowering the iteration number - uint16_t requestNum = 0;//count the number of requests so far - //prototypes - error_t MicaSendMsg(uint8_t state); - - event void Boot.booted() { - call AMControl.start(); //start radio - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call Timer1.startPeriodic(PERIOD); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) { - busy = FALSE; - } - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MoteISTMsg)) { - mist_m = (MoteISTMsg*)payload; - if(mist_m->nodeid == MOTEIST_NODE_ID){ - if (!busy) { //check if radio is busy - micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); - if (micaz_m == NULL){ - return 0; - } - micaz_m->nodeid = MICA_NODE_ID; //assign Micaz ID - micaz_m->task_i = iterations; - micaz_m->deadline = deadline; - micaz_m->missed = missedDeadlines; - micaz_m->met = metDeadlines; - - switch (mist_m->state){ - case REQUEST: // MoteIST ready for start - micaz_m->state = START; - break; - case STARTED: // MoteIST has started - call Timer0.startOneShot(deadline); - return msg; // At this point don't need to send msg to MoteIST, return - case DEADLINE_MET: - call Timer0.stop(); //stop timer, deadline is met - call Leds.led1Toggle(); - micaz_m->met = ++metDeadlines; - micaz_m->state = DEADLINE_MET; - break; - case DEADLINE_MISS: // MoteIST missed the deadline, too bad.. but nothing to do here - return msg; - default: - } - if(call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - - - event void Timer0.fired(){ //deadline Reached - missedDeadlines++; - call Leds.led0Toggle(); - MicaSendMsg(DEADLINE_MISS); - } - - event void Timer1.fired(){ //make new request - requestNum++; - MicaSendMsg(REQUEST); - numRequest++; - - if(numRequest>3){ - switch(up){ - case TRUE: - if(iterations < ITERATIONS) - iterations += 200; - else{ - up = FALSE; - return; - } - break; - case FALSE: - if(iterations > 200) - iterations -= 200; - else{ - call Timer1.stop(); - return; - } - break; - default: - } - numRequest=0; - } - } - - //functions - error_t MicaSendMsg(uint8_t state){ - - MicaMsg* micaz_m; - if (!busy) { //check if radio is busy - micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); - if (micaz_m == NULL){ - return FAIL; - } - micaz_m->nodeid = MICA_NODE_ID; - micaz_m->request = requestNum; - micaz_m->task_i = iterations; // 0 for deadline miss - micaz_m->deadline = deadline; - micaz_m->missed = missedDeadlines; - micaz_m->met = metDeadlines; - micaz_m->state = state; - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { - busy = TRUE; - } - } - return SUCCESS; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Makefile deleted file mode 100644 index ac59737e3b..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=RadioAdcC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Radio.h b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Radio.h deleted file mode 100644 index 67f949c958..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/Radio.h +++ /dev/null @@ -1,43 +0,0 @@ -#define MOTEIST_NODE_ID 1 //for MoteIST -#define MICA_NODE_ID 2 -#define ITERATIONS 5000 -#define DEADLINE 100 -#define PERIOD 200 - - -enum { - AM_BLINKTORADIO = 6, - TIMER_PERIOD_MILLI = 1000, - DEADLINE_MISS = 4, - DEADLINE_MET = 3, - STARTED = 2, - START = 1, - REQUEST = 0 -}; - -typedef nx_struct MicaMsg { - nx_uint16_t nodeid; //node id - nx_uint16_t request; - nx_uint8_t state; // state of operation - nx_uint16_t task_i; //number of iterations to perform the task: passing 0 means deadline missed - nx_uint16_t deadline; //deadline for the task: passing 0 means this is a request to start - nx_uint16_t missed; //number of missed deadlines so far - nx_uint16_t met; - -} MicaMsg; - -typedef nx_struct MoteISTMsg { - nx_uint16_t nodeid; //node id - nx_uint16_t state; -} MoteISTMsg; - - -/* - * The MicaMsg struct - * - * parameter @state has the state of mica's operation such as: - * 0 - requesting - * 1 - start order - * 2 - deadline met - * 3 - deadline missed - */ diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcC.nc deleted file mode 100644 index 375839c82b..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcC.nc +++ /dev/null @@ -1,44 +0,0 @@ -#include - -configuration RadioAdcC { -} -implementation { - components MainC; - components LedsC; - components RadioAdcP as App; - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - components SerialPrintfC; - - App.Boot -> MainC; - App.Leds -> LedsC; - - //timers - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //tasks (fibonacci) - components TasksC; - App.Tasks -> TasksC; - - //ADC - components new Msp430Adc12ClientAutoRVGC() as adc; - App.adc -> adc; - App.AdcResource -> adc; - adc.AdcConfigure -> App.AdcConfigure; - - //Frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; - - //Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcP.nc deleted file mode 100644 index 94190a0139..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioAdc/RadioAdcP.nc +++ /dev/null @@ -1,308 +0,0 @@ -#include -#include -#include "Radio.h" -#include "Msp430Adc12.h" - - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif -#define MAX_FREQUENCY_INCREASE 5000000 -#define MAX_FREQUENCY 25000000 -#define START_FREQUENCY 25000000 -#define SAMPLES 16 - -module RadioAdcP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - uses interface Tasks; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; - uses interface FreqControl; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource as AdcResource; -} -implementation { - - message_t pkt; - bool busy = FALSE; - uint16_t state; - uint32_t ActFrequency = 0; - uint16_t deadline; - uint16_t requestNum; - - uint16_t adb[SAMPLES]; - bool AdcDone = FALSE; - - //prototypes - void print(uint16_t iterations, uint32_t elapsedTime, error_t status); - void showerror(); - error_t configureAdc(); - - error_t SendMsgTaskDone(); - error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus); - void uwait(uint32_t u); - void printfFloat(float toBePrinted); - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ADC12OSC, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_16_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - - event void Boot.booted() { - printf("Iterations,Deadline,Frequency,ElapsedTime,Current,Voltage,Status\n"); - - if(call FreqControl.setMCLKFreq(START_FREQUENCY) == SUCCESS){ - ActFrequency = START_FREQUENCY; - //printf("Frequency at %lu Hz\n", ActFrequency); - //request the adc - call AdcResource.request(); - } - else - printf("err: Could not set Start Frequency\n"); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureAdc(); - } - call adc.getData(); - uwait(1024*5); - atomic if(AdcDone){ - print(0, 0, 0); - AdcDone=FALSE; - } - call AMControl.start(); //start radio - } - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - AdcDone = TRUE; - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { /*printf("Radio started\n");*/} - else - call AMControl.start(); - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) - busy = FALSE; - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MicaMsg)) { - micaz_m = (MicaMsg*)payload; - /* - * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) - */ - if(micaz_m->nodeid == MICA_NODE_ID){ - //printf("Incoming msg from mica\n"); - if (!busy) { //check if radio is busy - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - return 0; - } - mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID - state = micaz_m->state; - switch(micaz_m->state){ - - case REQUEST: - //printf("Mica: REQUEST\n\n"); - mist_m->state = REQUEST; - state = REQUEST; - break; - case START: - //printf("Mica: START.\niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); - mist_m->state = STARTED; - call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); - requestNum = micaz_m->request; - deadline = micaz_m->deadline; - break; - case DEADLINE_MET: - call Leds.led2Toggle(); - //printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - case DEADLINE_MISS: - call Leds.led1Toggle(); - //printf("Mica: DEADLINE_MISS:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - default: - break; - } - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - call adc.getData(); - - if(status == SUCCESS) - if(SendMsgTaskDone()!=SUCCESS) - call Timer0.startPeriodic(1); - - AdaptFrequency(elapsedTime, status); - - atomic if(AdcDone){ - print(iterations, elapsedTime, status); - AdcDone=FALSE; - } - } - event void Tasks.FibonacciIterationDone(){ } - - event void Timer0.fired() { - if(SendMsgTaskDone()==SUCCESS) - call Timer0.stop(); - } - - event void Timer1.fired() {} - - - //functions - error_t SendMsgTaskDone(){ - MoteISTMsg* mist_m; - if (!busy) {//check if radio is busy - /*build the packet*/ - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - printf("App: null pointer\n"); - return FAIL; - } - mist_m->state = DEADLINE_MET; // task done in time - state = DEADLINE_MET; - /*send the packet*/ - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ - busy = TRUE; - } - return SUCCESS; - } //if(!busy) - return FAIL; - } - - error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus){ - uint32_t newFreq; - float deadlineWindow; - deadlineWindow = deadline - deadline * 0.5; - //printf("Task done! Elapsed: %lu, status: %d\n", elapsedTime, taskStatus); - //printf("Act Freq is %lu Hz\n", ActFrequency); - - if(taskStatus!=SUCCESS) - newFreq = ActFrequency + MAX_FREQUENCY_INCREASE; - else{ - //ajust to finish in 20% less time of deadline - newFreq = (uint32_t) ( (((float) elapsedTime) / deadlineWindow) * ((float) ActFrequency) ); - newFreq = (newFreq/100000)*100000; //round frequency to hundreads of kHz - } - if(newFreq == ActFrequency || newFreq < 700000) - return FAIL; - - if(newFreq > MAX_FREQUENCY) - newFreq = MAX_FREQUENCY; - - if(call FreqControl.setMCLKFreq(newFreq)==SUCCESS) - ActFrequency = newFreq; - //set new frequency to the one needed in order to meet the deadline in half its time with a 20% window - //printf("New Freq is %lu Hz\n", ActFrequency); - return SUCCESS; - } - - void print(uint16_t iterations, uint32_t elapsedTime, error_t status){ - uint8_t i; - float currentMean = 0; - float voltageMean = 0; - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Rsense = 1.01; - - for(i = 0; i < SAMPLES; i+=2){ - currentMean += (float) adb[i]; - voltageMean += (float) adb[i+1]; - } - currentMean /= SAMPLES/2; //bits - voltageMean /= SAMPLES/2; // bits - currentMean *= refVolt/Nmax; //value in Volts - voltageMean *= refVolt/Nmax; //value in Volts - - currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //voltageMean *= 2; // multiply by 2.92 to get total battery voltage - - printf("%d,%d,%d,%lu,%lu,%d,", requestNum, iterations, deadline, ActFrequency, elapsedTime, status); - printfFloat(currentMean); - printf(","); - printfFloat(voltageMean); - printf("\n"); - } - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - float f = toBePrinted; - - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc deleted file mode 100644 index 5684c8d960..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc +++ /dev/null @@ -1,35 +0,0 @@ - -#include - -configuration DVSTestAppC { -} -implementation { - components MainC; - components LedsC; - components DVSTestP as App; - - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - components SerialPrintfC; - - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //For tasks - components TasksC; - App.Tasks -> TasksC; - - //for Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc deleted file mode 100644 index 9d962687af..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc +++ /dev/null @@ -1,140 +0,0 @@ -#include -#include -#include "Radio.h" - -#define ADC_SAMPLE_TIME 10 //miliseconds - -module DVSTestP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - uses interface Tasks; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - message_t pkt; - bool busy = FALSE; - uint16_t state; - - // prototypes - error_t SendMsgTaskDone(); - - - event void Boot.booted() { - //call Timer0.startPeriodic(ADC_SAMPLE_TIME); - printf("Booted\n"); - call Leds.led0Off(); - call Leds.led1Off(); - call Leds.led2Off(); - call AMControl.start(); //start radio - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) {} - else - call AMControl.start(); - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) - busy = FALSE; - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MicaMsg)) { - micaz_m = (MicaMsg*)payload; - /* - * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) - */ - if(micaz_m->nodeid == MICA_NODE_ID){ - //printf("Incoming msg from mica\n"); - if (!busy) { //check if radio is busy - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - return 0; - } - mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID - state = micaz_m->state; - switch(micaz_m->state){ - - case REQUEST: - printf("Mica: REQUEST\n\n"); - mist_m->state = REQUEST; - state = REQUEST; - break; - case START: - printf("Mica: START. \niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); - mist_m->state = STARTED; - call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); - state = STARTED; - break; - case DEADLINE_MET: - call Leds.led2Toggle(); - printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - case DEADLINE_MISS: - call Leds.led1Toggle(); - printf("Mica: DEADLINE_MISS\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - default: - break; - } - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - if(SendMsgTaskDone()!=SUCCESS) - call Timer0.startPeriodic(1); - } - event void Tasks.FibonacciIterationDone(){ } - - event void Timer0.fired() { - if(SendMsgTaskDone()==SUCCESS) - call Timer0.stop(); - } - - event void Timer1.fired() {} - - - //functions - error_t SendMsgTaskDone(){ - MoteISTMsg* mist_m; - if (!busy) {//check if radio is busy - /*build the packet*/ - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - printf("App: null pointer\n"); - return FAIL; - } - mist_m->state = DEADLINE_MET; // task done in time - state = DEADLINE_MET; - /*send the packet*/ - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ - busy = TRUE; - } - return SUCCESS; - } //if(!busy) - return FAIL; - } -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile deleted file mode 100644 index aabeeeb4e5..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSTestAppC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile deleted file mode 100644 index 95184a0aae..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=MicaTaskC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc deleted file mode 100644 index da1aeb47d6..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc +++ /dev/null @@ -1,26 +0,0 @@ -configuration MicaTaskC { -} -implementation { - components MainC; - components LedsC; - components MicaTaskP as App; - - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //for Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc deleted file mode 100644 index dabe3d3528..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc +++ /dev/null @@ -1,127 +0,0 @@ -#include -#include "../Radio.h" - -module MicaTaskP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - message_t pkt; - bool busy = FALSE; - uint16_t missedDeadlines = 0; - uint16_t metDeadlines = 0; - uint8_t deadline = 100; //now using this one instead of the one in radio.h - - //prototypes - error_t MicaSendMsg(uint8_t state); - - event void Boot.booted() { - call AMControl.start(); //start radio - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call Timer1.startPeriodic(PERIOD); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) { - busy = FALSE; - } - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MoteISTMsg)) { - mist_m = (MoteISTMsg*)payload; - if(mist_m->nodeid == MOTEIST_NODE_ID){ - if (!busy) { //check if radio is busy - micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); - if (micaz_m == NULL){ - return 0; - } - micaz_m->nodeid = MICA_NODE_ID; //assign Micaz ID - micaz_m->task_i = ITERATIONS; - micaz_m->deadline = deadline; - micaz_m->missed = missedDeadlines; - micaz_m->met = metDeadlines; - - switch (mist_m->state){ - case REQUEST: // MoteIST ready for start - micaz_m->state = START; - break; - case STARTED: // MoteIST has started - call Timer0.startOneShot(deadline); - return msg; // At this point don't need to send msg to MoteIST, return - case DEADLINE_MET: - call Timer0.stop(); //stop timer, deadline is met - call Leds.led1Toggle(); - micaz_m->met = ++metDeadlines; - micaz_m->state = DEADLINE_MET; - break; - case DEADLINE_MISS: // MoteIST missed the deadline, too bad.. but nothing to do here - call Leds.led0Toggle(); - return msg; - default: - } - if(call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - - - event void Timer0.fired(){ //deadline Reached - missedDeadlines++; - MicaSendMsg(DEADLINE_MISS); - } - - event void Timer1.fired() { //make new request - MicaSendMsg(REQUEST); - } - - //functions - error_t MicaSendMsg(uint8_t state){ - - MicaMsg* micaz_m; - if (!busy) { //check if radio is busy - micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); - if (micaz_m == NULL){ - return FAIL; - } - micaz_m->nodeid = MICA_NODE_ID; - micaz_m->task_i = ITERATIONS; // 0 for deadline miss - micaz_m->deadline = deadline; - micaz_m->missed = missedDeadlines; - micaz_m->met = metDeadlines; - micaz_m->state = state; - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { - busy = TRUE; - } - } - return SUCCESS; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h deleted file mode 100644 index 8d77f02ae2..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h +++ /dev/null @@ -1,42 +0,0 @@ -#define MOTEIST_NODE_ID 1 //for MoteIST -#define MICA_NODE_ID 2 -#define ITERATIONS 200 -#define DEADLINE 500 //0.1 sec -#define PERIOD 1000 //1 sec - - -enum { - AM_BLINKTORADIO = 6, - TIMER_PERIOD_MILLI = 1000, - DEADLINE_MISS = 4, - DEADLINE_MET = 3, - STARTED = 2, - START = 1, - REQUEST = 0 -}; - -typedef nx_struct MicaMsg { - nx_uint16_t nodeid; //node id - nx_uint8_t state; // state of operation - nx_uint8_t task_i; //number of iterations to perform the task: passing 0 means deadline missed - nx_uint16_t deadline; //deadline for the task: passing 0 means this is a request to start - nx_uint16_t missed; //number of missed deadlines so far - nx_uint16_t met; - -} MicaMsg; - -typedef nx_struct MoteISTMsg { - nx_uint16_t nodeid; //node id - nx_uint16_t state; -} MoteISTMsg; - - -/* - * The MicaMsg struct - * - * parameter @state has the state of mica's operation such as: - * 0 - requesting - * 1 - start order - * 2 - deadline met - * 3 - deadline missed - */ diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc deleted file mode 100644 index e456e577bf..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc +++ /dev/null @@ -1,24 +0,0 @@ -interface Tasks{ - - /* - * Calculates the fibonacci sequence numbers to the number of the parameter iterations. - * The param deadline is the deadline in miliseconds. - */ - - error_t command getFibonacci(uint16_t iterations, uint32_t deadline); - - /* - *this event is used for each iteration done in TasksP - */ - - event void FibonacciIterationDone(void); - /* - *This signals the stop of the interations for the fibonacci sequence numbers - * returns - * num_iterations: the remanining iterations at the time the event was signaled, if any. - * actualTime: the actual time the event was signaled - * status: FAIL if it missed the deadline - * SUCCESS if it has finished before deadline - */ - event void FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status); -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc deleted file mode 100644 index 3e6dfa33b9..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc +++ /dev/null @@ -1,11 +0,0 @@ -configuration TasksC { - provides interface Tasks; -} -implementation { - - components TasksP, SerialPrintfC; - Tasks = TasksP.Tasks; - - components new TimerMilliC() as Timer0; - TasksP.Timer0 -> Timer0; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc deleted file mode 100644 index b717945247..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc +++ /dev/null @@ -1,75 +0,0 @@ - -#define FIBONACCI_A 0 -#define FIBONACCI_B 1 - -module TasksP { - uses interface Timer as Timer0; - provides interface Tasks; - uses interface Tasks as TaskDone; -} -implementation { - - uint32_t a = FIBONACCI_A; - uint32_t b = FIBONACCI_B; - uint32_t i = 0; - uint32_t sum = 0; - uint16_t num_iterations; - uint32_t time_deadline; - bool deadline_miss=0; - //tasks - task void fibonacci(void){ - /** - * Here is the single iteration. - * On each iteration it performs the parameter @iterations is decremented. - * - */ - // printf("N=%d, %lu\n", num_iterations, a); - sum = a + b; - a = b; - b = sum; - //signal iteration done - num_iterations--; - signal TaskDone.FibonacciIterationDone(); - } - - //commands - command error_t Tasks.getFibonacci(uint16_t iterations, uint32_t deadline){ - num_iterations = iterations; - time_deadline = deadline; - - call Timer0.startOneShot(deadline); - - //printf("Posted fibonacci\nIterations:%d, deadline: %lu\n",num_iterations, time_deadline); - post fibonacci(); - - return SUCCESS; - } - - //events - event void TaskDone.FibonacciIterationDone(){ - uint32_t t0, now; - if(num_iterations && !deadline_miss) - post fibonacci(); - else{ - if(!deadline_miss){ - call Timer0.stop(); - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - signal Tasks.FibonacciDone(num_iterations, now-t0, SUCCESS); - } - } - } - - event void Timer0.fired() { - //deadline missed! - uint32_t now,t0; - deadline_miss = 1; - call Timer0.stop(); - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - signal Tasks.FibonacciDone(num_iterations, now-t0, FAIL); - } - - event void TaskDone.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ } - -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fib b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fib deleted file mode 100755 index 27f8df5405ecbc675bdb1da328523abe0191556c..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7253 zcmeHMZ){sv6~A_z&D%n8(?G)-swd_^3e-)yv|WIyO%pfGmNskZ7Did$9Q!49>p#JM zUXvn0g9#|O5f$UZ1QM*E@c|8K(?qG%f-)sqT4_RoeVNceMYNKu1Z1SpO(OL1``zp7 zIO!(AXL79Ldw=(wd(OS*{(1M^_l;oR0hh}qG`U5MAezp5yzNL^H!4ZHFoajMh^=Ca zxDQ2?wV#6ySXMx#T9kRfHIxCjk3$aL1Wcxkw#kxM7wm&UGV2SUlGlA$h`OJ6yks9L zG=k}uayJqKasx8*JTRGZ`XC>K{z3RAcLS5P?8q%U3V09c`U8+x`(J`4nf2NB9f|nh zjzn~OBA&{P2D0hEP9;Orq`c?wG2~P`X%kJAbsLZ}Hk2=ZCQu50?a=SGzV=dg;>e91 zp_(2qW%rkL84KcSqAmJo|4B@BnT(ww43@L(mrwq6n)zyCT}=iujESatWFFT5De<;7 z_^~zkVc<6>JYL3SBL~Jbhm+})nYF_i+cX8j6k&LF3$wQ$rO|lG%w?@8^y1lcq@%;k zM#8BfF_N>hVk8q!*+USqR@p={98Za!zTW*^=FY&LO0HG5!;SvefL-{x>0L5Ko8$2h zF?z?#Wj=}B;#mqoCCr)o7>pM^-usbym?D^7rU-f+Q*_G56oEZ9dFyC?(NkpI6XP?p zO+pl&Uv?a4;tzIhaVtuTwJ=j`g^e$rxIW|TdJi6)=4Je|j?+v}F=lVyKsBeC9%Gc< zo|l-OW9-81X^Gi_SR?T(60;>SgZM>Yq!nuW+sVnlk&Jzaz(E_P0FV z;`2~my0D7MeL44d6HJQS-irp(D~)LB_(B8zU;mdozu@Y4JG*u25}o9yT|c9W(=b7? zRPT5@Q+%VA23+}B&xvPdrtD9OsjHu&KJ4cg8!t9NcVgPEzsxdZ9+>m^S?0`NpSeJt zo2C4sfx>w-x3~rEyzKtA$2%4BH%*58o=K0tc;~L;6uNh_FW16I;n1KlYd6~$Dz$^$4s-U_Aos5m=AFdIbK@B7ifR zJX`CO-RJR=2lG0xAMeC?u@Eog%*uD3^LV%X=Upd#6)E4p`o4+x3Z(A<^Eh=1{1BM+ zKLRH4oVJ7$9^c(sz+tO@P3F#$ZWdCR4 zJF~8I3Vk{Y{x0~3;9r2Xtf#B%b4JUt!CcDD8SR1gz@yvSa}w>^rmzr!>{!wc41fyvi+~j~hce-$B?1vUoyo$1N=`*! z2u8xmcmxj8sEEISw5DnfW}zKPCzDpn)^Yi7(k)QpIB}fiJqQ5DQWIsQN5Fi$p`N_2 zfWSar6XzMJ4XpKIm|rpI`K3htX}yDhoQt%_`FS3Ct;lm;lBh@S2H(LPq8{h()w18U zdWRwB9Ht)U^*hiTL7r_vR@&nH=DRlMHubm;`jFxL*F;^?NigRy^*DboA+rH_?U&`` z(_qed<~i?Ykzqfo{Q`=!;0M6ewhXW zzdtVPvA@@#cMW=76)okH@aJIKqh1|eitErJZ39J>{42;)56x2dZMdvryfo=Lzea)9 z<3&Kj2k8B_N{=u6P0-UeXjA8BkY|kPSKi}6ZytG$FNu0=$D3g7m-jZM_pwLa-&g5z ze_eu}fig|hA^#Dq?KR*AqX7f(e*L`xJ(jb5yyM7>8;R{m2)=Dto_ zn)X8P?;0Sb4v8tpOw$cKIQF68A4kDI@*PFszxkBDmE6kllJ)afEBmi-pD9p&I^`J0EMa_GK`P9WT8S_VBwPSN0 zE6k_0kn>ex^;GA)RQRJzX5qN@5@MepU06Tjv;*tcZEnW z?>3-ph3KCTJztgoabWHz)N)}~e-CN3{~rOLE61DmUZrB0Xzw@3bA7VN<=!mbLaO^G z-1Xw-8vHJ>KCigkh&LLj<7tRS@enZYJvkHW;cp8t_gO%RKLM=CK&EXC4gzz2Fdn?a z?gQrj%R2SAxgV&~=j`C&tNPCS>%h7_KD4I*+*ls(jqXPA0&%&&8{M14OTfIMi=nt{=2~bvOnrCuaVbbNmtw31bkNa&%Hr>8kl#* zy!)s99l(6uRL%7{H&F)p`iLNS9G;Izi(u3iI zDNkBvI5#SAiW*5+wiONRY2Dc-C@|yEQKCnMJf4}+TrxSP{R9tpOE(7wIu8X+jp#<_ zSG>q$o%AvkA55phkw}~k?&<5_-`QvOA2@I{7&1eh`}=}yI1h?uIFkvFnN~`Ej#w#> zA1{R2{q*6^L%m&sr$F^J0`=sliAXkQ%F|_~c-2P_^NHuo0c$v(#o@Or5zc0RZYxyCx2@A>KqkRNMgXvKd3bftG@ diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c b/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c deleted file mode 100644 index 50c793c7fa..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c +++ /dev/null @@ -1,69 +0,0 @@ -/** - * You'll notice that we need to include a header file that - * contains functions we need to use. Being a compiled language, - * it's inefficient to include functions that aren't needed. - * stdio.h contains functions for reading from and writing to the console - */ - -#include - -/** - * In C, the program executes the main function. You should also take note - * that we must declare a return type for the function. In this case, it's - * an integer, and we return 0 to indicate successful completion of the - * program. - */ - -int fibonacci(unsigned long int n); - -int main () -{ - /* Notice that we need to declare our variables, and their type */ - - unsigned long int n; - - /* printf prints a formated string to the stdout */ - - printf("\nHow many numbers of the sequence would you like?\n"); - - /* scanf reads a formated string from the stdin. We are expecting an integer here. */ - - scanf("%d",&n); - - /* Here we call the fibonacci function */ - - fibonacci(n); - - /* Finally, return 0 */ - - return 0; -} - -/** - * This is the simple fibonacci sequence generator. Notice also, we - * declare the type of variable we expect to be passed to the function. - */ - -int fibonacci(unsigned long int n) -{ - /** - * Here we declare and set our variables. - */ - long unsigned int a = 0; - long unsigned int b = 1; - long unsigned int sum; - int i; - - /** - * Here is the standard for loop. This will step through, performing the code - * inside the braces until i is equal to n. - */ - for (i=0;ib~zjlp_5aT2%`F|%iYMlTxlAGPq;;m*dW%4 zm8hbw@gz79*#M1Jpw0y;p$@ol7<$MWUC^> zymdm_rQQje4|*STlqp~e{h|%Z9<%x4lgm?VYF%#}Y;+9SMtpR4ifkf=-4_?+?Zj zVs}S-bBnPhpe#Fa2lUB-AIFTsR2GYs^6r`y6myu{l_Y-O<-QNOi#cxI%^ZVsD0kyv zcGguO{mAfS?Rp{d-}u0?tdTd&6@?9`EnMa07TSF7$g7jq)?4V&+VlagY-4R=&rud{ zUPCi$6D>rkyE!E>Ek)_x%?V%<8~$=E_lNBDxhK23q5~t)p2X$A;pla&m%>?)=1(t5 zwvQ)2?L${0^Z1w_`PpiCFg#O<>-js*?2Kc_bb7<+&)I)=!ZA*YRXIYnr0qvprN=(&%RkN&f>)ni_8M<&dQS6GL_{g+*S)>%`pPM#*``W%L;cBUa; zx(EH_*H_~D%f8;;-rV$iZ@>P2Zu1ejFYMk!d_UKTq z+wWCIPOvc6iaN)ISLzY;P`Pq0f5G|(n$zigsca!#x}BREC-?FSYB<)?f@4DYL1$?C z%3aHnGm*Vmdn7k|bn;$EU@n%<-)9dWEOer);mH_QUUt@7*a+LBXRC1oqgh@zUp{X+ zM=aCd@NT}XEZ6FH=i5BUT=_OPe6_y$Q?jy`96Ro&exJSQJ#x%AI+^$SVb_koF+NAL zw=8qbS(bWFXJ=g2RK5gNnRyjd3)}+l3+w61TCAPN;L1~2JA4*7ur@aZ8pG5tr{xh? z9)aZ%SRR4p5m+99N@;oI`>cdg{h z$oU=Sho0YiZvuY^c?aaf5Vo&^FmWF>j~y7l;i@70Cgdmf1CTRl&+-e%`CY~hCcm4R zV@H`hfqM9sq)&6m2Y^xhpA)~Cbt5OfTPh$Qh3L96d|Axl26nf!e9BjIs3(&!Grq<^ zW8jgx#*9Q;H!CbeAU)J?278d3DV0Zc3EzT|)PM*il4c~()ZAWY2K#K(m&gQqGBJEZ z$HF2&6b+`MA`l)*pg)zHDW!Qfl1j&tiABJGE)|KBuL=WkQv_m(7_Mey5Z7J+sFLBJ z85Ds?)aXqG`y(O{GLxw^45;ks5IRC9!TwkX29juqOF;IfTK1&D4ki2hBMDQF&wrDz z1Bvs*d6wrO0GvymsAJj)xer2~Jg+f)C|lyMW@0kozIzaoxOt0s~q1$9pBt zLNt%->p7QCHQ*oi#K*CCq6GqrjQ z(iL!Z;@B~L8=`r9zIfn(S8CKn+x@Q1V;42x)qqF;b<(^aqJsUAw;jCg;AtJXy8IH# zb<(SzI|?hye7-2GEbuv^uo@jcFBImJMm-l4=8UTK zudtd;{hlhZBa7=<>A51+x>cA@0`(qLm`@(H4i)xD%=MZJZ*}xBs`9OgMJBe4SZDuH!8 z5U(q`As;xOSb{$T%=qAV@T|KHSjSHVPVV;t^Q=$l*NS~b?HMgk1J@R{A7XpkzcTpu zJTOlTb^EUX^E^@EYVlRzGMiuStQOw_=IJoH7Uj-0;tVj4m^p8}AHJt`qWw$2-UWN_ zSZ@IHELPj&`??0ll5A6k@&7IGap*68lJ~n-{BBA6KLWpH&tHXemADPeV@=)P9bley zKZl(D@L|RGB>S(xE_o#|4_o#9iBQT+o0;C;KnVW}v~+iN86E8hyYVlAVYDtnPqY-N z!bzhqp6m(64Y^Y@f|)^qUD!Z8Vn)J&N9(sV2r7(Nc#!B3A-8u%IMd%hr0ulrZ - -int a=10000,b,c=2800,d,e,f[2801],g; -int main(void){ - for(;b-c;)f[b++]=a/5; - for(;d=0,g=c*2;c-=14, printf("%.4d",e+d/a),e=d%a) - for(b=c;d+=f[b]*a,f[b]=d%--g,d/=g--,--b;d*=b); - return 0; - } diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc deleted file mode 100644 index 0e8bc5212f..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc +++ /dev/null @@ -1,39 +0,0 @@ - -#include - -configuration DVSTestAppC { -} -implementation { - components MainC; - components LedsC; - components DVSTestP as App; - - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - components SerialPrintfC; - - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //For tasks - components TasksC; - App.Tasks -> TasksC; - - //for Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; - - //for frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestP.nc deleted file mode 100644 index 3e300862ec..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/DVSTestP.nc +++ /dev/null @@ -1,180 +0,0 @@ -#include -#include -#include "Radio.h" - -#define MAX_FREQUENCY_INCREASE 5000000 -#define MAX_FREQUENCY 25000000 -#define START_FREQUENCY 25000000 - -module DVSTestP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - uses interface Tasks; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; - uses interface FreqControl; -} -implementation { - - message_t pkt; - bool busy = FALSE; - uint16_t state; - uint32_t ActFrequency = 0; - uint16_t deadline; - // prototypes - error_t SendMsgTaskDone(); - error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus); - - event void Boot.booted() { - printf("Booted\n"); - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - if(call FreqControl.setMCLKFreq(START_FREQUENCY) == SUCCESS){ - ActFrequency = START_FREQUENCY; - printf("Frequency at %lu Hz\n", ActFrequency); - call AMControl.start(); //start radio - } - else - printf("err: Could not set Start Frequency\n"); - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { printf("Radio started\n");} - else - call AMControl.start(); - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) - busy = FALSE; - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MicaMsg)) { - micaz_m = (MicaMsg*)payload; - /* - * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) - */ - if(micaz_m->nodeid == MICA_NODE_ID){ - //printf("Incoming msg from mica\n"); - if (!busy) { //check if radio is busy - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - return 0; - } - mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID - state = micaz_m->state; - switch(micaz_m->state){ - - case REQUEST: - printf("Mica: REQUEST\n\n"); - mist_m->state = REQUEST; - state = REQUEST; - break; - case START: - printf("Mica: START.\niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); - mist_m->state = STARTED; - call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); - state = STARTED; - deadline = micaz_m->deadline; - break; - case DEADLINE_MET: - call Leds.led2Toggle(); - printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - case DEADLINE_MISS: - call Leds.led1Toggle(); - printf("Mica: DEADLINE_MISS:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - default: - break; - } - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - if(status == SUCCESS) - if(SendMsgTaskDone()!=SUCCESS) - call Timer0.startPeriodic(1); - AdaptFrequency(elapsedTime, status); - } - event void Tasks.FibonacciIterationDone(){ } - - event void Timer0.fired() { - if(SendMsgTaskDone()==SUCCESS) - call Timer0.stop(); - } - - event void Timer1.fired() {} - - - //functions - error_t SendMsgTaskDone(){ - MoteISTMsg* mist_m; - if (!busy) {//check if radio is busy - /*build the packet*/ - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - printf("App: null pointer\n"); - return FAIL; - } - mist_m->state = DEADLINE_MET; // task done in time - state = DEADLINE_MET; - /*send the packet*/ - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ - busy = TRUE; - } - return SUCCESS; - } //if(!busy) - return FAIL; - } - - error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus){ - uint32_t newFreq; - float deadlineWindow; - deadlineWindow = deadline - deadline * 0.5; - printf("Task done! Elapsed: %lu, status: %d\n", elapsedTime, taskStatus); - printf("Act Freq is %lu Hz\n", ActFrequency); - - if(taskStatus!=SUCCESS) - newFreq = ActFrequency + MAX_FREQUENCY_INCREASE; - else{ - //ajust to finish in 20% less time of deadline - newFreq = (uint32_t) ( (((float) elapsedTime) / deadlineWindow) * ((float) ActFrequency) ); - newFreq = (newFreq/100000)*100000; //round frequency to hundreads of kHz - } - if(newFreq == ActFrequency || newFreq < 700000) - return FAIL; - - if(newFreq > MAX_FREQUENCY) - newFreq = MAX_FREQUENCY; - - if(call FreqControl.setMCLKFreq(newFreq)==SUCCESS) - ActFrequency = newFreq; - //set new frequency to the one needed in order to meet the deadline in half its time with a 20% window - printf("New Freq is %lu Hz\n", ActFrequency); - return SUCCESS; - } -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/Makefile deleted file mode 100644 index aabeeeb4e5..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/RadioNoAdc/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSTestAppC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/Tasks.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/Tasks.nc deleted file mode 100644 index 2e33e2092b..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/Tasks.nc +++ /dev/null @@ -1,24 +0,0 @@ -interface Tasks{ - - /* - * Calculates the fibonacci sequence numbers to the number of the parameter iterations. - * The param deadline is the deadline in miliseconds. - */ - - error_t command getFibonacci(uint16_t iterations, uint32_t deadline); - - /* - *this event is used for each iteration done in TasksP - */ - - event void FibonacciIterationDone(void); - /* - *This signals the stop of the interations for the fibonacci sequence numbers - * returns - * num_iterations: the remanining iterations at the time the event was signaled, if any. - * actualTime: the actual time the event was signaled - * status: FAIL if it missed the deadline - * SUCCESS if it has finished before deadline - */ - event void FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status); -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksC.nc deleted file mode 100644 index 3e6dfa33b9..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksC.nc +++ /dev/null @@ -1,11 +0,0 @@ -configuration TasksC { - provides interface Tasks; -} -implementation { - - components TasksP, SerialPrintfC; - Tasks = TasksP.Tasks; - - components new TimerMilliC() as Timer0; - TasksP.Timer0 -> Timer0; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksP.nc deleted file mode 100644 index dcbc13cac1..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/TasksP.nc +++ /dev/null @@ -1,81 +0,0 @@ - -#define FIBONACCI_A 0 -#define FIBONACCI_B 1 - -module TasksP { - uses interface Timer as Timer0; - provides interface Tasks; - uses interface Tasks as TaskDone; -} -implementation { - - uint32_t a = FIBONACCI_A; - uint32_t b = FIBONACCI_B; - uint32_t i = 0; - uint32_t sum = 0; - uint16_t num_iterations; - uint16_t totalIterations; - uint32_t time_deadline; - bool deadline_miss=FALSE; - - //tasks - task void fibonacci(void){ - /** - * Here is the single iteration. - * On each iteration it performs the parameter @iterations is decremented. - * - */ - // printf("N=%d, %lu\n", num_iterations, a); - sum = a + b; - a = b; - b = sum; - //signal iteration done - num_iterations--; - signal TaskDone.FibonacciIterationDone(); - } - - //commands - command error_t Tasks.getFibonacci(uint16_t iterations, uint32_t deadline){ - deadline_miss = FALSE; - num_iterations = iterations; - totalIterations = iterations; - time_deadline = deadline; - - call Timer0.startOneShot(deadline); - - //printf("Posted fibonacci\nIterations:%d, deadline: %lu, deadline miss: %d\n",num_iterations, time_deadline, deadline_miss); - post fibonacci(); - - return SUCCESS; - } - - //events - event void TaskDone.FibonacciIterationDone(){ - uint32_t t0, now; - if(num_iterations && !deadline_miss) - post fibonacci(); - else{ - if(!deadline_miss){ - call Timer0.stop(); - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - //printf("fibonacci is done in: %lu\n", now-t0); - signal Tasks.FibonacciDone(totalIterations, t0, now, SUCCESS); - } - } - } - - event void Timer0.fired() { - //deadline missed! - uint32_t now,t0; - deadline_miss = TRUE; - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - - // printf("timer fired in fibonacci: %lu\n", now-t0); - signal Tasks.FibonacciDone(num_iterations, now, t0, FAIL); - } - - event void TaskDone.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ } - -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/fibonacci/fib b/tos/platforms/MoteISTx5/tests/DVSTest/Tasks/fibonacci/fib deleted file mode 100755 index 27f8df5405ecbc675bdb1da328523abe0191556c..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7253 zcmeHMZ){sv6~A_z&D%n8(?G)-swd_^3e-)yv|WIyO%pfGmNskZ7Did$9Q!49>p#JM zUXvn0g9#|O5f$UZ1QM*E@c|8K(?qG%f-)sqT4_RoeVNceMYNKu1Z1SpO(OL1``zp7 zIO!(AXL79Ldw=(wd(OS*{(1M^_l;oR0hh}qG`U5MAezp5yzNL^H!4ZHFoajMh^=Ca zxDQ2?wV#6ySXMx#T9kRfHIxCjk3$aL1Wcxkw#kxM7wm&UGV2SUlGlA$h`OJ6yks9L zG=k}uayJqKasx8*JTRGZ`XC>K{z3RAcLS5P?8q%U3V09c`U8+x`(J`4nf2NB9f|nh zjzn~OBA&{P2D0hEP9;Orq`c?wG2~P`X%kJAbsLZ}Hk2=ZCQu50?a=SGzV=dg;>e91 zp_(2qW%rkL84KcSqAmJo|4B@BnT(ww43@L(mrwq6n)zyCT}=iujESatWFFT5De<;7 z_^~zkVc<6>JYL3SBL~Jbhm+})nYF_i+cX8j6k&LF3$wQ$rO|lG%w?@8^y1lcq@%;k zM#8BfF_N>hVk8q!*+USqR@p={98Za!zTW*^=FY&LO0HG5!;SvefL-{x>0L5Ko8$2h zF?z?#Wj=}B;#mqoCCr)o7>pM^-usbym?D^7rU-f+Q*_G56oEZ9dFyC?(NkpI6XP?p zO+pl&Uv?a4;tzIhaVtuTwJ=j`g^e$rxIW|TdJi6)=4Je|j?+v}F=lVyKsBeC9%Gc< zo|l-OW9-81X^Gi_SR?T(60;>SgZM>Yq!nuW+sVnlk&Jzaz(E_P0FV z;`2~my0D7MeL44d6HJQS-irp(D~)LB_(B8zU;mdozu@Y4JG*u25}o9yT|c9W(=b7? zRPT5@Q+%VA23+}B&xvPdrtD9OsjHu&KJ4cg8!t9NcVgPEzsxdZ9+>m^S?0`NpSeJt zo2C4sfx>w-x3~rEyzKtA$2%4BH%*58o=K0tc;~L;6uNh_FW16I;n1KlYd6~$Dz$^$4s-U_Aos5m=AFdIbK@B7ifR zJX`CO-RJR=2lG0xAMeC?u@Eog%*uD3^LV%X=Upd#6)E4p`o4+x3Z(A<^Eh=1{1BM+ zKLRH4oVJ7$9^c(sz+tO@P3F#$ZWdCR4 zJF~8I3Vk{Y{x0~3;9r2Xtf#B%b4JUt!CcDD8SR1gz@yvSa}w>^rmzr!>{!wc41fyvi+~j~hce-$B?1vUoyo$1N=`*! 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Being a compiled language, - * it's inefficient to include functions that aren't needed. - * stdio.h contains functions for reading from and writing to the console - */ - -#include - -/** - * In C, the program executes the main function. You should also take note - * that we must declare a return type for the function. In this case, it's - * an integer, and we return 0 to indicate successful completion of the - * program. - */ - -int fibonacci(unsigned long int n); - -int main () -{ - /* Notice that we need to declare our variables, and their type */ - - unsigned long int n; - - /* printf prints a formated string to the stdout */ - - printf("\nHow many numbers of the sequence would you like?\n"); - - /* scanf reads a formated string from the stdin. We are expecting an integer here. */ - - scanf("%d",&n); - - /* Here we call the fibonacci function */ - - fibonacci(n); - - /* Finally, return 0 */ - - return 0; -} - -/** - * This is the simple fibonacci sequence generator. Notice also, we - * declare the type of variable we expect to be passed to the function. - */ - -int fibonacci(unsigned long int n) -{ - /** - * Here we declare and set our variables. - */ - long unsigned int a = 0; - long unsigned int b = 1; - long unsigned int sum; - int i; - - /** - * Here is the standard for loop. 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for(b=c;d+=f[b]*a,f[b]=d%--g,d/=g--,--b;d*=b); - return 0; - } diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc deleted file mode 100644 index c1a27ad206..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc +++ /dev/null @@ -1,32 +0,0 @@ - -#include - -configuration DVSnoRadioC { -} -implementation { - components MainC; - components LedsC; - components DVSnoRadioP as App; - components SerialPrintfC; - - App.Boot -> MainC; - App.Leds -> LedsC; - - //For tasks (fibonacci) - components TasksC; - App.Tasks -> TasksC; - - //For ADC - components new Msp430Adc12ClientAutoRVGC() as adc; - App.adc -> adc; - App.AdcResource -> adc; - adc.AdcConfigure -> App.AdcConfigure; - - //For frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; - - //For UART - //components PlatformSerialC; - //App.UartStream -> PlatformSerialC; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc deleted file mode 100644 index da2b479107..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc +++ /dev/null @@ -1,203 +0,0 @@ -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define ADC_SAMPLE_TIME 10 //miliseconds -#define ITERATIONS 900 -#define DEADLINE 5000 -#define SAMPLES 16 - -module DVSnoRadioP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Tasks; - uses interface FreqControl; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource as AdcResource; -} -implementation { - - uint16_t adb[SAMPLES]; - //uint8_t count = 0; - uint32_t Freq = 1000000; - uint32_t ActFreq = 0; - uint32_t EndFreq = 25000000; - uint32_t Step = 500000; - uint32_t timeStart = 0; - uint32_t timeEnd = 0; - uint16_t Number = 0; - bool AdcDone = FALSE; - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureAdc(); - void frequency_sweep(); - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ADC12OSC, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_16_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - event void Boot.booted() { - //request the adc - call AdcResource.request(); - - } - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureAdc(); - } - /* - * Adc is configured, now init the system - */ - printf("Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit)\n"); - if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) - printf("Could not change the frequency to: %lu Hz. \r\n", Freq); - else - atomic ActFreq = Freq; - - call adc.getData(); - - uwait(1024*5); - atomic if(AdcDone){ - printadb(); - AdcDone=FALSE; - } - call Tasks.getFibonacci(ITERATIONS, DEADLINE); - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ - atomic timeEnd = startTime; - atomic timeStart = endTime; - - if(Freq=EndFreq){ - call Leds.led2On(); - return; - } - } - - event void Tasks.FibonacciIterationDone(){ - } - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - AdcDone = TRUE; - - } - - -//functions - void printadb(){ - uint8_t i; - uint32_t currentMean = 0; - uint32_t voltageMean = 0; - //float Gain = 37.5; //(Gm*Rout) - //float refVolt = 2.5; - //float Nmax = 4095; - //float Rsense = 1.01; - - for(i = 0; i < SAMPLES; i+=2){ - currentMean += adb[i]; - voltageMean += adb[i+1]; - } - currentMean /= SAMPLES/2; //bits - voltageMean /= SAMPLES/2; // bits - //currentMean *= refVolt/Nmax; //value in Volts - //voltageMean *= refVolt/Nmax; //value in Volts - - //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //voltageMean *= 2; // multiply by 2 to get total battery voltage - - printf("%d,%lu,%lu,%lu,%lu\n", Number, ActFreq, timeEnd, currentMean, voltageMean); - } - - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - float f = toBePrinted; - - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/Makefile deleted file mode 100644 index 1e65e3cde8..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSnoRadioC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/test.txt b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/test.txt deleted file mode 100644 index 98d693eacb..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/2Channels/test.txt +++ /dev/null @@ -1,165 +0,0 @@ -Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) -0,25000000,0,80,1137 -2,24000000,580,462,1263 -3,23500000,594,613,1467 -4,23000000,608,597,1438 -5,22500000,623,593,1414 -6,22000000,638,589,1402 -7,21500000,653,585,1392 -8,21000000,668,564,1322 -9,20500000,684,561,1308 -10,20000000,700,553,1312 -11,19500000,717,542,1258 -12,19000000,734,538,1256 -13,18500000,752,515,1179 -14,18000000,770,516,1161 -15,17500000,788,512,1186 -16,17000000,807,434,1284 -18,16000000,843,446,1245 -19,15500000,863,440,1235 -20,15000000,884,439,1228 -21,14500000,905,441,1245 -22,14000000,927,433,1239 -23,13500000,950,423,1181 -24,13000000,973,410,1171 -25,12500000,998,385,1299 -26,12000000,1023,372,1392 -27,11500000,1049,369,1329 -28,11000000,1077,356,1313 -29,10500000,1106,334,1280 -30,10000000,1136,343,1280 -31,9500000,1167,338,1287 -32,9000000,1199,327,1251 -33,8500000,1233,319,1218 -34,8000000,1268,312,1196 -35,7500000,1306,300,1156 -36,7000000,1346,294,1178 -37,6500000,1389,292,1154 -38,6000000,1435,284,1100 -39,5500000,1485,274,1079 -40,5000000,1539,249,1335 -41,4500000,1599,482,1228 -42,4000000,1663,246,1266 -43,3500000,1735,238,1207 -44,3000000,1817,236,1355 -45,2500000,1912,214,1148 -46,2000000,2026,213,1297 -47,1500000,2162,211,1138 -48,1000000,2344,198,1099 -49,1000000,2617,199,1347 -Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) -0,1000000,0,59,1029 -1,1500000,774,61,1021 -2,2000000,969,60,1037 -3,2500000,1111,65,1040 -4,3000000,1227,75,1190 -5,3500000,1324,76,1164 -6,4000000,1409,83,1103 -7,4500000,1483,88,1255 -8,5000000,1548,100,1264 -9,5500000,1608,113,1235 -10,6000000,1662,104,1211 -11,6500000,1713,120,1257 -12,7000000,1760,124,1168 -13,7500000,1804,126,1088 -14,8000000,1845,129,1029 -15,8500000,1884,155,1027 -16,9000000,1920,160,1042 -17,9500000,1955,171,1090 -18,10000000,1987,180,1137 -19,10500000,2018,183,1137 -21,11500000,2072,198,1172 -22,12000000,2100,209,1202 -23,12500000,2127,224,1244 -24,13000000,2153,225,1236 -26,14000000,2198,244,1275 -27,14500000,2222,265,1141 -28,15000000,2244,269,1105 -29,15500000,2266,300,1131 -30,16000000,2287,301,1147 -31,16500000,2307,307,1166 -32,17000000,2327,318,1202 -33,17500000,2346,337,1272 -34,18000000,2365,371,1098 -35,18500000,2384,351,1317 -36,19000000,2402,351,1319 -37,19500000,2420,399,1392 -38,20000000,2437,377,1118 -39,20500000,2454,380,1073 -40,21000000,2471,419,1221 -41,21500000,2487,417,1239 -42,22000000,2503,434,1247 -43,22500000,2519,440,1274 -44,23000000,2534,453,1318 -45,23500000,2549,463,1342 -46,24000000,2564,472,1371 -47,24500000,2578,475,1384 -Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) -0,1000000,0,58,1018 -1,1500000,775,62,1018 -2,2000000,969,65,1036 -3,2500000,1112,67,1173 -4,3000000,1227,83,1199 -5,3500000,1325,80,1217 -6,4000000,1410,84,1092 -7,4500000,1484,88,1239 -8,5000000,1549,97,1269 -9,5500000,1608,109,1252 -10,6000000,1663,109,1195 -11,6500000,1713,115,1260 -12,7000000,1761,128,1173 -13,7500000,1805,128,1070 -14,8000000,1846,134,1002 -15,8500000,1884,158,1031 -16,9000000,1921,163,1059 -17,9500000,1955,169,1110 -18,10000000,1988,179,1122 -19,10500000,2019,189,1161 -21,11500000,2073,199,1173 -22,12000000,2101,205,1189 -23,12500000,2128,218,1224 -24,13000000,2154,233,1270 -26,14000000,2199,240,1284 -27,14500000,2222,269,1200 -28,15000000,2245,279,1136 -29,15500000,2267,288,1125 -30,16000000,2288,304,1154 -31,16500000,2308,306,1165 -32,17000000,2328,314,1189 -33,17500000,2347,335,1266 -34,18000000,2366,374,1096 -35,18500000,2385,344,1295 -36,19000000,2403,354,1323 -37,19500000,2421,376,1253 -38,20000000,2438,371,1098 -39,20500000,2455,389,1110 -40,21000000,2472,415,1211 -41,21500000,2488,426,1250 -42,22000000,2504,425,1219 -43,22500000,2520,444,1293 -44,23000000,2535,454,1315 -45,23500000,2550,453,1315 -Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) -0,1000000,0,62,1010 -1,1500000,774,60,1020 -2,2000000,969,57,1013 -3,2500000,1111,70,1058 -4,3000000,1227,77,1196 -5,3500000,1324,78,1069 -6,4000000,1409,87,1101 -7,4500000,1483,89,1179 -8,5000000,1549,95,1265 -9,5500000,1608,107,1241 -10,6000000,1662,109,1174 -11,6500000,1713,119,1304 -12,7000000,1760,124,1188 -13,7500000,1804,129,1089 -14,8000000,1845,128,987 -15,8500000,1884,157,1031 -16,9000000,1920,164,1065 -17,9500000,1954,168,1083 -18,10000000,1987,176,1114 -19,10500000,2018,191,1152 -21,11500000,2072,203,1228 -22,12000000,2100,209,1196 - diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc deleted file mode 100644 index c7b5a3fc53..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc +++ /dev/null @@ -1,37 +0,0 @@ - -#include - -configuration DVSnoRadioC { -} -implementation { - components MainC; - components LedsC; - components DVSnoRadioP as App; - components SerialPrintfC; - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - components new TimerMilliC() as Timer2; - App.Boot -> MainC; - App.Leds -> LedsC; - - //For tasks (fibonacci) - components TasksC; - App.Tasks -> TasksC; - - //For ADC - components new Msp430Adc12ClientAutoRVGC() as adc; - App.adc -> adc; - App.AdcResource -> adc; - adc.AdcConfigure -> App.AdcConfigure; - - //For frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; - //timers - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - App.Timer2 -> Timer2; - //For UART - //components PlatformSerialC; - //App.UartStream -> PlatformSerialC; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc deleted file mode 100644 index ce54c33d12..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc +++ /dev/null @@ -1,257 +0,0 @@ -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define ADC_SAMPLE_TIME 10 //miliseconds -#define ITERATIONS 5000 -#define DEADLINE 9000 -#define SAMPLES 15 -#define FREQ_25MHz 25000000 -#define FREQ_1MHz 1000000 -#define FREQ_STEP FREQ_1MHz -#define SWEEP_REPOST_DELAY 50 -#define UP - -module DVSnoRadioP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Tasks; - uses interface FreqControl; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource as AdcResource; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - uses interface Timer as Timer2; -} -implementation { - - uint16_t adb[SAMPLES]; - //uint8_t count = 0; - #ifdef UP - uint32_t Freq = FREQ_1MHz; - uint32_t EndFreq = FREQ_25MHz; - uint32_t ActFreq = FREQ_1MHz; - #else - uint32_t Freq = FREQ_25MHz; - uint32_t EndFreq = FREQ_1MHz; - uint32_t ActFreq = FREQ_25MHz; - #endif - uint32_t timeStart = 0; - uint32_t timeEnd = 0; - uint16_t Number = 0; - uint32_t adcStartTime, adcEndTime; - bool fibDone = FALSE; -//prototypes - //void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureAdc(); - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_1_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_64_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - /*adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - };*/ - - adc12memctl_t channelconfig [] = { - {INPUT_CHANNEL_A2, REFVOLT_LEVEL_1_5, 0}, - {INPUT_CHANNEL_A3, REFVOLT_LEVEL_1_5, 1} - }; - adc12memctl_t * adcchannelconfig = (adc12memctl_t *) channelconfig; - - task void delaySweep(){ - call Timer1.startOneShot(SWEEP_REPOST_DELAY); - } - - task void sweep(){ - uint32_t t0 = 0; - uint32_t now = 0; - - #ifdef UP - if(Freq<=EndFreq){ - #else - if(Freq>=EndFreq){ - #endif - atomic call Timer2.startOneShot(600); - atomic adcStartTime=call Timer2.gett0(); - //atomic adcStartTime=call Timer0.getdt(); - call adc.getData(); - if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) - printf("Could not change the frequency to: %lu Hz. \r\n", Freq); - else{ - ActFreq = Freq; - Number++; // increment the number of sequences calculated - } - //printf("adc.getdata; "); - //printf("tasks.getfib\n "); - atomic fibDone = FALSE; - call Tasks.getFibonacci(ITERATIONS, DEADLINE); - } - else{ - call Leds.led2On(); - call Timer0.stop(); - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - //printf("sweep: "); - printf("app end time: %lu\n", now-t0); - } - #ifdef UP - Freq+=FREQ_STEP; - #else - Freq-=FREQ_STEP; - #endif - } - - task void printadb(){ - uint8_t i; - uint32_t currentMean = 0; - uint32_t voltageMean = 0; - uint32_t vcoreMean = 0; - //float Gain = 37.5; //(Gm*Rout) - //float refVolt = 2.5; - //float Nmax = 4095; - //float Rsense = 1.01; - //printf("print adb: "); - for(i = 0; i < SAMPLES; i+=3){ - currentMean += adb[i]; - voltageMean += adb[i+1]; - vcoreMean += adb[i+2]; - } - currentMean /= SAMPLES/3; //bits - voltageMean /= SAMPLES/3; // bits - vcoreMean /= SAMPLES/3; // bits - //currentMean *= refVolt/Nmax; //value in Volts - //voltageMean *= refVolt/Nmax; //value in Volts - - //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //voltageMean *= 2; // multiply by 2 to get total battery voltage - - atomic printf("%d,%lu,%lu,%lu,%lu,%lu,%lu,%lu,%lu\n", Number, ActFreq, timeStart, timeEnd, currentMean, voltageMean, vcoreMean, adcStartTime, adcEndTime); - } - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - event void Boot.booted() { - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - //request the adc - call AdcResource.request(); - - } - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - uint32_t maxTime = 9000; - while(e != SUCCESS){ - e = configureAdc(); - } - atomic TA1R = 0; //reset timer A - call Timer0.startOneShot(maxTime); - printf("Fib Iteration Num,ActualFrequency(Hz),Fib-startTime(ms),Fib-endTime(ms),currentMean(12bit),supplyMean(12bit),vcoreMean(12bit),adcStartTime(ms),adcEndTime(ms),app startTime(ms): %lu\n", call Timer0.gett0()); - post sweep(); - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ - timeStart = startTime; - timeEnd = endTime; - atomic fibDone = TRUE; - /*if(status ==SUCCESS) - printf("tasks.fibDone; %lu\n", endTime-startTime); - else - printf("fib fail..\n");*/ - } - - event void Tasks.FibonacciIterationDone(){ } - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - //printf("data ready: post\n"); - adcEndTime=call Timer2.getNow(); - //adcEndTime=call Timer0.getdt(); - call Timer2.stop(); - - if(fibDone){ - post printadb(); - post sweep(); - } - else - post delaySweep(); - } - - event void Timer0.fired() { - //printf("Timer0 fired! end time of program not valid! \n"); - } - event void Timer1.fired() { - bool ready; - //printf("Timer1 Fired. Repost Sweep!\n"); - atomic ready = fibDone; - if(ready){ - post printadb(); - post sweep(); - } - else - call Timer1.startOneShot(SWEEP_REPOST_DELAY); - } - event void Timer2.fired() { - //printf("Timer2 fired! AdcConvertion endTime not valid!\n"); - } - //functions - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - float f = toBePrinted; - - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - e = call adc.configure(&adcconfig, adcchannelconfig, 2, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/Makefile deleted file mode 100644 index 1e65e3cde8..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/3Channels/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSnoRadioC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc deleted file mode 100644 index c1a27ad206..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc +++ /dev/null @@ -1,32 +0,0 @@ - -#include - -configuration DVSnoRadioC { -} -implementation { - components MainC; - components LedsC; - components DVSnoRadioP as App; - components SerialPrintfC; - - App.Boot -> MainC; - App.Leds -> LedsC; - - //For tasks (fibonacci) - components TasksC; - App.Tasks -> TasksC; - - //For ADC - components new Msp430Adc12ClientAutoRVGC() as adc; - App.adc -> adc; - App.AdcResource -> adc; - adc.AdcConfigure -> App.AdcConfigure; - - //For frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; - - //For UART - //components PlatformSerialC; - //App.UartStream -> PlatformSerialC; -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc deleted file mode 100644 index 13bea3ef2f..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc +++ /dev/null @@ -1,237 +0,0 @@ -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define ADC_SAMPLE_TIME 10 //miliseconds -#define ITERATIONS 900 -#define DEADLINE 5000 -#define SAMPLES 16 - -module DVSnoRadioP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Tasks; - uses interface FreqControl; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource as AdcResource; -} -implementation { - - uint16_t adb[SAMPLES]; - //uint8_t count = 0; - uint32_t Freq = 1000000; - uint32_t ActFreq = 0; - uint32_t EndFreq = 25000000; - uint32_t Step = 500000; - uint32_t Time = 0; - uint16_t Number = 0; - bool AdcDone = FALSE; - bool flag = 1; - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureAdc(); - void frequency_sweep(); - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ADC12OSC, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_16_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - event void Boot.booted() { - //printf("Booted\n"); - call Leds.led0Off(); - call Leds.led1Off(); - call Leds.led2Off(); - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - //request the adc - call AdcResource.request(); - - } - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureAdc(); - } - /* - * Adc is configured, now init the system - */ - printf("Number#,Frequency(Hz),Time(ms),Vin(V),I(mA)\n"); - if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) - printf("Could not change the frequency to: %lu Hz. \r\n", Freq); - else - atomic ActFreq = Freq; - - call adc.getData(); - //printf("Conversion didn't start!\n"); - - uwait(1024*5); - atomic if(AdcDone){ - printadb(); - AdcDone=FALSE; - } - call Tasks.getFibonacci(ITERATIONS, DEADLINE); - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - printf("Task done in %lu ms\n",elapsedTime); - atomic Time = elapsedTime; - if(flag){ - flag=0; - Freq=EndFreq; - if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) - printf("Could not change the frequency to: %lu Hz. \r\n", Freq); - else{ - //printf("MCLK frequency is now %lu Hz. \r\n\n", Freq); - atomic ActFreq = Freq; - atomic Number++; // increment the number of sequences calculated - } - call adc.getData(); - - call Tasks.getFibonacci(ITERATIONS+100, DEADLINE); - atomic if(AdcDone){ - printadb(); - AdcDone = FALSE; - } - } - - if(Freq==EndFreq){ - call Leds.led2On(); - return; - } - } - - event void Tasks.FibonacciIterationDone(){ - } - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - AdcDone = TRUE; - return buffer; - } - - async event error_t adc.singleDataReady(uint16_t data){ - return FAIL; - } - -//functions - void printadb(){ - uint8_t i; - float mean = 0; - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Vout = 0; - float Current = 0; - //float Vsense = 0; - float Rsense = 1.01; - - for(i = 0; i < SAMPLES; i++){ - mean += (float) adb[i]; - //printf("Sample %d =", i); - //printfFloat((float) adb[i]); - //printf("\n"); - //printf("Vout ="); - //Vout = adb[i]*refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //printfFloat(Vout); - //printf(" V\n"); - } - mean = mean/SAMPLES; - //printf("Sample mean ="); - //printfFloat(mean); - //printf("\n"); - - //printf("Vout mean (into ADC) ="); - Vout = mean*refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //printfFloat(Vout); - //printf(" V\n"); - - //Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV - // printf("Vsense ="); - // printfFloat(Vsense); - // printf(" mV\n"); - - //Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm - //printf("Current ="); - //printfFloat(Current); - //printf(" mA\n"); - - Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - printf("%d,%lu,%lu,", Number, ActFreq, Time); - printfFloat(Vout); - printf(","); - printfFloat(Current); - //printf(" mA\n"); - //printf("\n"); - printf("\n"); - } - - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - //e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); - e = call adc.configureMultiple(&adcconfig, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/Makefile b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/Makefile deleted file mode 100644 index 1e65e3cde8..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSnoRadioC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h deleted file mode 100644 index 381b58face..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h +++ /dev/null @@ -1,11 +0,0 @@ - -typedef struct uartMessage{ - uint32_t freq; //actual frequency - uint32_t time; //time elapsed - uint16_t iter; //iteration number - uint16_t num; //number of the fib sequence - float current; //current being consumed - float voltage; //battery voltage - bool lock; -} uartMessage; - diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/ConfigureAdc.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/ConfigureAdc.nc deleted file mode 100644 index 28f536c255..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/ConfigureAdc.nc +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * This open source code was developed with funding from People Power Company - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -#include "Msp430Adc12.h" - -interface Msp430UsciConfigure { - /** - * Return a pointer to the configuration that should be used for the ADC - */ - async command const msp430adc12_channel_config_t* getConfiguration (); - - async command const adc12memctl_t* getAdditionalChannels (); -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc deleted file mode 100644 index f5eb9ae5a8..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc +++ /dev/null @@ -1,238 +0,0 @@ -#include -#include "Msp430Adc12.h" -#include "messagetypes.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define ITERATIONS 900 -#define DEADLINE 5000 // 5sec -#define SAMPLES 16 -#define START_FREQUENCY 1000000 // 1MHz -#define STOP_FREQUENCY 25000000 // 25MHz -#define STEP_FREQUENCY 500000 // 500kHz - -module DVSnoRadioP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Tasks; - uses interface FreqControl; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource as AdcResource; - uses interface UartStream; -} -implementation { - - uint16_t adb[SAMPLES]; - uint32_t actualFreq = START_FREQUENCY; - - uartMessage message = { - freq: START_FREQUENCY, - time: 0, - iter: 0, - num: 0, - current: 0, - voltage: 0, - lock: FALSE - }; - -//prototypes - void printfFloat(float toBePrinted); - void showerror(); - error_t configureAdc(); - error_t readAdc(); - void uwait(uint32_t u); - - msp430adc12_channel_config_t adcconfig = { - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - task void sendMessage(){ - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Vout = 0; - float Rsense = 1.01; - - atomic{ - Vout = message.current * refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV - - message.current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //printf("%d,%lu,%lu,", Number, ActFreq, Time); - message.voltage *= (refVolt*2)/Nmax; //multiply by 2 to get the real batery value - - printf("%lu,%lu,%d,%d,", message.freq, message.time, message.iter, message.num); - printfFloat(message.current); - printf(","); - printfFloat(message.voltage); - printf("\n"); - message.lock=FALSE; - } - } - - event void Boot.booted() { - printf("Booted\n"); - // P1DIR |= 0x40; // P1.6 to output direction - // P2DIR |= 0x01; // P2.0 to output direction - // P1SEL |= 0x40; // P1.6 Output SMCLK - // P2SEL |= 0x01; // 2.0 Output MCLK - //request the adc - call AdcResource.request(); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureAdc(); - } - /* - * Set start frequency - */ - if(call FreqControl.setMCLKFreq(START_FREQUENCY) != SUCCESS){ - printf("error: set start frequency\n"); - showerror(); - return; - } - /* - * Read first data - */ - readAdc(); - - //Start the First Fibonacci running at START_FREQUENCY - if(call Tasks.getFibonacci(ITERATIONS,DEADLINE) != SUCCESS){ - printf("error: first fib\n"); - showerror(); - return; - } - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - bool lock; - printf("fib done: elapsed %lu\n", elapsedTime); - if(status!=SUCCESS){ - printf("error: did not finish fib\nelapsed %lu\n", elapsedTime); - showerror(); - return; - } - printf("wait adc 1\n"); - while(lock){ atomic lock = message.lock; } //wait for any adc convertion to finish - - atomic message.time = elapsedTime; - readAdc(); - - if(actualFreq==STOP_FREQUENCY){ - /* - * Finished, light green led - */ - call Leds.led2On(); - return; - } - if(START_FREQUENCY < STOP_FREQUENCY) - actualFreq += STEP_FREQUENCY; - else - actualFreq -= STEP_FREQUENCY; - - printf("wait adc 2\n"); - while(lock){ atomic lock = message.lock; } //wait for any adc convertion to finish - atomic message.num++; - atomic message.freq = actualFreq; - - if(call FreqControl.setMCLKFreq(actualFreq) != SUCCESS){ - showerror(); - atomic printf("error: in fibDone %d\n", message.num); - return; - } - - if(call Tasks.getFibonacci(ITERATIONS,DEADLINE) != SUCCESS){ - showerror(); - return; - } - - } - - event void Tasks.FibonacciIterationDone(uint16_t iter){ } - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - uint8_t i; - uint32_t current, voltage; - for(i = 0; i<(numSamples/2); i++){ - current += buffer[i]; - voltage += buffer[i+1]; - } - message.current = (float) current/(numSamples/2); - message.voltage = (float) voltage/(numSamples/2); - post sendMessage(); - } - - async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t err){ } - async event void UartStream.receivedByte (uint8_t byte) { } - async event void UartStream.receiveDone (uint8_t* buf, uint16_t len, error_t err) { } - -//functions - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - - error_t readAdc(){ - atomic message.lock=TRUE; - return call adc.getData(); - } - - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } -} diff --git a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/messagetypes.h b/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/messagetypes.h deleted file mode 100644 index 381b58face..0000000000 --- a/tos/platforms/MoteISTx5/tests/DVSTest/noRadio/old/messagetypes.h +++ /dev/null @@ -1,11 +0,0 @@ - -typedef struct uartMessage{ - uint32_t freq; //actual frequency - uint32_t time; //time elapsed - uint16_t iter; //iteration number - uint16_t num; //number of the fib sequence - float current; //current being consumed - float voltage; //battery voltage - bool lock; -} uartMessage; - diff --git a/tos/platforms/MoteISTx5/tests/FlashTest/ClientC.nc b/tos/platforms/MoteISTx5/tests/FlashTest/ClientC.nc deleted file mode 100644 index 3302da1492..0000000000 --- a/tos/platforms/MoteISTx5/tests/FlashTest/ClientC.nc +++ /dev/null @@ -1,12 +0,0 @@ - -configuration ClientC{ - -} - -implementation -{ - components new SettingsC(); - components ClientP; - - ClientP.FlashSettings -> SettingsC; -} diff --git a/tos/platforms/MoteISTx5/tests/FlashTest/ClientP.nc b/tos/platforms/MoteISTx5/tests/FlashTest/ClientP.nc deleted file mode 100644 index 839aa93791..0000000000 --- a/tos/platforms/MoteISTx5/tests/FlashTest/ClientP.nc +++ /dev/null @@ -1,50 +0,0 @@ -#include - -module ClientP @safe(){ - uses interface Settings as FlashSettings; -} - -implementation -{ - uint8_t data[] = {9,33,3,2,5,6,9,25}; - - event void FlashSettings.requestLogin(){ - error_t status; - uint8_t i; - - printf("Second Client: "); - printf("Request login.\n"); - - status = call FlashSettings.login((void*) data, sizeof(data)*sizeof(uint8_t)); - switch (status){ - case EINVAL:{ - printf("Second Client Request Login -> EINVAL.\n"); - break; - } - case SUCCESS:{ - /*printf("Second Client storing to flash: "); - for(i=0; i MainC.Boot; - FlashTestP.Leds -> LedsC; - - components new SettingsC(); - FlashTestP.Settings -> SettingsC; - - components SettingsP; - FlashTestP.Init -> SettingsP; - - components Msp430FlashC; - FlashTestP.Msp430Flash -> Msp430FlashC.Msp430Flash; - - components ClientC; - } diff --git a/tos/platforms/MoteISTx5/tests/FlashTest/FlashTestP.nc b/tos/platforms/MoteISTx5/tests/FlashTest/FlashTestP.nc deleted file mode 100644 index 75fe3e61e7..0000000000 --- a/tos/platforms/MoteISTx5/tests/FlashTest/FlashTestP.nc +++ /dev/null @@ -1,86 +0,0 @@ - -/** - * - **/ - -#include "Timer.h" -#include - -module FlashTestP @safe() -{ - //uses interface Timer as Timer0; - uses interface Leds; - uses interface Boot; - uses interface Settings; - uses interface Init; - uses interface Msp430Flash; - } -implementation -{ - - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - //prototypes - void test(void); - - uint8_t data[] = {9,33,3,2,5,6,9,25}; - event void Boot.booted(){ - printf("Booted.\n"); - - if(call Msp430Flash.isFirstBoot() == TRUE); - printf("It's First boot\n"); - - call Init.init(); // this is the first client - //if(call Client.FlashTestClient() == SUCCESS) // this is the second client - // printf("First Client: Second Client as called init"); - - } - - event void Settings.requestLogin(){ - error_t status; - uint8_t i; - - printf("First Client: "); - printf("Request login.\n"); - - status = call Settings.login((void*) data, sizeof(data)*sizeof(uint8_t)); - switch (status){ - case EINVAL:{ - printf("This is the first boot, nothing in flash memory.\n"); - - printf("Storing "); - for(i=0; i - **/ - -configuration ClockTestAppC{ -} -implementation -{ - - components MainC, ClockTestP, LedsC; - //components new TimerMilliC() as Timer0; - components SerialPrintfC; - //components PlatformSerialC; - //ClockTestP.UartByte -> PlatformSerialC; - - components Msp430FreqControlC; - ClockTestP.FreqControl -> Msp430FreqControlC; - - ClockTestP -> MainC.Boot; - //ClockTestP.Timer0 -> Timer0; - ClockTestP.Leds -> LedsC; -} - diff --git a/tos/platforms/MoteISTx5/tests/FrequencyTest/ClockTestP.nc b/tos/platforms/MoteISTx5/tests/FrequencyTest/ClockTestP.nc deleted file mode 100644 index 51630f88e4..0000000000 --- a/tos/platforms/MoteISTx5/tests/FrequencyTest/ClockTestP.nc +++ /dev/null @@ -1,69 +0,0 @@ - -/** - * Output MCLK and SMCLK on Boot. - * Toggle One Led to know the OS is alive - **/ - -#include "Timer.h" -#include -#include "../../../../chips/msp430/x5xxx/usci/msp430usci.h" - - -module ClockTestP @safe() -{ - //uses interface Timer as Timer0; - uses interface Leds; - uses interface Boot; - uses interface FreqControl; - - //uses interface UartByte; - } -implementation -{ - uint32_t wait = 7536640; - - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - void frequency_swype(uint32_t start_freq, uint32_t end_freq, uint32_t step){ - while(start_freq <= end_freq){ - printf("Setting MCLK frequency to %lu Hz.\n", start_freq); - if(call FreqControl.setMCLKFreq(start_freq) == FAIL ) - printf("Could not change the frequency to: %lu Hz. \r\n", start_freq); - else - printf("MCLK frequency is now %lu Hz. \r\n\n", start_freq); - start_freq = start_freq + step; - uwait(wait*5); - } - } - - event void Boot.booted(){ - uint32_t start_freq = 500000; - uint32_t end_freq = 25000000; - uint32_t step = 500000; - uint8_t source; - uint32_t freq; - - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - - printf("#\n\n|************* Starting frequency swype *************|\n\n"); - - if(call FreqControl.getMCLKSource() != SELM__DCOCLKDIV){ - printf("#MCLK is not sourced by DCOCLKDIV.\n\n"); - return; - } - printf("#MCLK is sourced by DCOCLKDIV.\n\n"); - //printf("#VCore will be ajusted to the frequency of MCLK.\n"); - printf("#Start swype at %lu Hz and end at %lu Hz. Use %lu Hz of step.\n", start_freq, end_freq, step); - - frequency_swype(start_freq, end_freq, step); - printf("#\n\n|************* Frequency swype finished *************|\n\n"); - - } -} - diff --git a/tos/platforms/MoteISTx5/tests/FrequencyTest/Makefile b/tos/platforms/MoteISTx5/tests/FrequencyTest/Makefile deleted file mode 100644 index 5c7e922b29..0000000000 --- a/tos/platforms/MoteISTx5/tests/FrequencyTest/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=ClockTestAppC -include $(MAKERULES) - diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadio.h b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadio.h deleted file mode 100644 index e0cdf181ac..0000000000 --- a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadio.h +++ /dev/null @@ -1,22 +0,0 @@ -// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ - -#ifndef BLINKTORADIO_H -#define BLINKTORADIO_H - -#ifdef TOS_NODE_ID -#undef TOS_NODE_ID -#define TOS_NODE_ID 1 -#endif - -enum { - AM_BLINKTORADIO = 6, - TIMER_PERIOD_MILLI = 1500 -}; - -typedef nx_struct BlinkToRadioMsg { - nx_uint16_t nodeid; - nx_uint16_t counter; - nx_uint16_t teste; -} BlinkToRadioMsg; - -#endif diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc deleted file mode 100644 index fc7ea5dd8a..0000000000 --- a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc +++ /dev/null @@ -1,72 +0,0 @@ -// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ - -/* - * Copyright (c) 2000-2006 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the University of California nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Application file for the BlinkToRadio application. A counter is - * incremented and a radio message is sent whenever a timer fires. - * Whenever a radio message is received, the three least significant - * bits of the counter in the message payload are displayed on the - * LEDs. Program two motes with this application. As long as they - * are both within range of each other, the LEDs on both will keep - * changing. If the LEDs on one (or both) of the nodes stops changing - * and hold steady, then that node is no longer receiving any messages - * from the other node. - * - * @author Prabal Dutta - * @date Feb 1, 2006 - */ -#include -#include "BlinkToRadio.h" - -configuration BlinkToRadioAppC { -} -implementation { - components MainC; - components LedsC; - components BlinkToRadioC as App; - components new TimerMilliC() as Timer0; - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - components SerialPrinfC; - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc deleted file mode 100644 index c57a7d9144..0000000000 --- a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc +++ /dev/null @@ -1,134 +0,0 @@ -// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ - -/* - * Copyright (c) 2000-2006 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the University of California nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Implementation of the BlinkToRadio application. A counter is - * incremented and a radio message is sent whenever a timer fires. - * Whenever a radio message is received, the three least significant - * bits of the counter in the message payload are displayed on the - * LEDs. Program two motes with this application. As long as they - * are both within range of each other, the LEDs on both will keep - * changing. If the LEDs on one (or both) of the nodes stops changing - * and hold steady, then that node is no longer receiving any messages - * from the other node. - * - * @author Prabal Dutta - * @date Feb 1, 2006 - */ -#include -#include "BlinkToRadio.h" - -module BlinkToRadioC { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - uint16_t counter; - message_t pkt; - bool busy = FALSE; - - void setLeds(uint16_t val) { - if (val & 0x01) - call Leds.led0On(); - else - call Leds.led0Off(); - if (val & 0x02) - call Leds.led1On(); - else - call Leds.led1Off(); - if (val & 0x04) - call Leds.led2On(); - else - call Leds.led2Off(); - } - - event void Boot.booted() { - call AMControl.start(); - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call Timer0.startPeriodic(TIMER_PERIOD_MILLI); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - } - - event void Timer0.fired() { - counter++; - if (!busy) { - BlinkToRadioMsg* btrpkt = - (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); - if (btrpkt == NULL) { - return; - } - btrpkt->nodeid = TOS_NODE_ID; - btrpkt->counter = counter; - btrpkt->teste = 23; - if (call AMSend.send(AM_BROADCAST_ADDR, - &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { - busy = TRUE; - printf("Sent a packt\n"); - } - } - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) { - busy = FALSE; - } - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - - if (len == sizeof(BlinkToRadioMsg)) { - BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; - setLeds(btrpkt->counter); - printf("Received \nnodeid: %d\ncounter:%d\ntest:%d\n", btrpkt->nodeid, btrpkt->counter, btrpkt->test); - } - return msg; - } -} diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/Makefile b/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/Makefile deleted file mode 100644 index b713521214..0000000000 --- a/tos/platforms/MoteISTx5/tests/RadioTest/MoteISTx5/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=BlinkToRadioAppC -include $(MAKERULES) - diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadio.h b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadio.h deleted file mode 100644 index a81d7be699..0000000000 --- a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadio.h +++ /dev/null @@ -1,22 +0,0 @@ -// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ - -#ifndef BLINKTORADIO_H -#define BLINKTORADIO_H - -#ifdef TOS_NODE_ID -#undef TOS_NODE_ID -#define TOS_NODE_ID 1 -#endif - -enum { - AM_BLINKTORADIO = 6, - TIMER_PERIOD_MILLI = 2000 -}; - -typedef nx_struct BlinkToRadioMsg { - nx_uint16_t nodeid; - nx_uint16_t counter; - nx_uint16_t teste; -} BlinkToRadioMsg; - -#endif diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioAppC.nc b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioAppC.nc deleted file mode 100644 index cfc8a87442..0000000000 --- a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioAppC.nc +++ /dev/null @@ -1,72 +0,0 @@ -// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ - -/* - * Copyright (c) 2000-2006 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the University of California nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Application file for the BlinkToRadio application. A counter is - * incremented and a radio message is sent whenever a timer fires. - * Whenever a radio message is received, the three least significant - * bits of the counter in the message payload are displayed on the - * LEDs. Program two motes with this application. As long as they - * are both within range of each other, the LEDs on both will keep - * changing. If the LEDs on one (or both) of the nodes stops changing - * and hold steady, then that node is no longer receiving any messages - * from the other node. - * - * @author Prabal Dutta - * @date Feb 1, 2006 - */ -#include -#include "BlinkToRadio.h" - -configuration BlinkToRadioAppC { -} -implementation { - components MainC; - components LedsC; - components BlinkToRadioC as App; - components new TimerMilliC() as Timer0; - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioC.nc b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioC.nc deleted file mode 100644 index 65d7d40e4e..0000000000 --- a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/BlinkToRadioC.nc +++ /dev/null @@ -1,131 +0,0 @@ -// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ - -/* - * Copyright (c) 2000-2006 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the University of California nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Implementation of the BlinkToRadio application. A counter is - * incremented and a radio message is sent whenever a timer fires. - * Whenever a radio message is received, the three least significant - * bits of the counter in the message payload are displayed on the - * LEDs. Program two motes with this application. As long as they - * are both within range of each other, the LEDs on both will keep - * changing. If the LEDs on one (or both) of the nodes stops changing - * and hold steady, then that node is no longer receiving any messages - * from the other node. - * - * @author Prabal Dutta - * @date Feb 1, 2006 - */ -#include -#include "BlinkToRadio.h" - -module BlinkToRadioC { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - uint16_t counter; - message_t pkt; - bool busy = FALSE; - - void setLeds(uint16_t val) { - if (val & 0x01) - call Leds.led0On(); - else - call Leds.led0Off(); - if (val & 0x02) - call Leds.led1On(); - else - call Leds.led1Off(); - if (val & 0x04) - call Leds.led2On(); - else - call Leds.led2Off(); - } - - event void Boot.booted() { - call AMControl.start(); - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call Timer0.startPeriodic(TIMER_PERIOD_MILLI); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - } - - event void Timer0.fired() { - counter++; - if (!busy) { - BlinkToRadioMsg* btrpkt = - (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); - if (btrpkt == NULL) { - return; - } - btrpkt->nodeid = TOS_NODE_ID; - btrpkt->counter = counter; - btrpkt->teste = 23; - if (call AMSend.send(AM_BROADCAST_ADDR, - &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { - busy = TRUE; - } - } - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) { - busy = FALSE; - } - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - if (len == sizeof(BlinkToRadioMsg)) { - BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; - setLeds(btrpkt->counter); - } - return msg; - } -} diff --git a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/Makefile b/tos/platforms/MoteISTx5/tests/RadioTest/micaz/Makefile deleted file mode 100644 index b713521214..0000000000 --- a/tos/platforms/MoteISTx5/tests/RadioTest/micaz/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=BlinkToRadioAppC -include $(MAKERULES) - diff --git a/tos/platforms/MoteISTx5/tests/TimerTest/Makefile b/tos/platforms/MoteISTx5/tests/TimerTest/Makefile deleted file mode 100644 index d6c413dae3..0000000000 --- a/tos/platforms/MoteISTx5/tests/TimerTest/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=TimerTestC -include $(MAKERULES) - diff --git a/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestC.nc b/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestC.nc deleted file mode 100644 index b7b5f2c29f..0000000000 --- a/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestC.nc +++ /dev/null @@ -1,17 +0,0 @@ - -#include - -configuration TimerTestC { -} -implementation { - components MainC; - components LedsC; - components TimerTestP as App; - components new TimerMilliC() as Timer0; - components SerialPrintfC; - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - -} diff --git a/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestP.nc b/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestP.nc deleted file mode 100644 index f62bcab261..0000000000 --- a/tos/platforms/MoteISTx5/tests/TimerTest/TimerTestP.nc +++ /dev/null @@ -1,39 +0,0 @@ - -#include -#include -#define DEADLINE 100 - -module TimerTestP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; -} -implementation { - - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - - event void Boot.booted() { - P6SEL &= 0xFB; //ADC2 sel GIO func - P6DIR |= 0x04; //ADC2 sel output func - P6OUT &= 0xFB; //ADC output 0 - uwait(1000); - P6OUT |= 0x04; //ADC output 1 //start pulse - uwait(1000); - P6OUT &= 0xFB; //ADC output 0 - uwait(1000); - P6OUT |= 0x04; //ADC output 1 //start pulse - call Timer0.startPeriodic(DEADLINE); - } - - event void Timer0.fired() { - uint32_t time; - P6OUT &= 0xFB; //ADC output 0 -// P6OUT |= 0x04; //ADC output 1 //end pulse - //time = call Timer0.getNow(); - //printf("Timer fired at %lu \n", time); - } -} diff --git a/tos/platforms/MoteISTx5/tests/current-readings/adc-error/1.188V-error.csv b/tos/platforms/MoteISTx5/tests/current-readings/adc-error/1.188V-error.csv deleted file mode 100644 index 816dd18c15fa1a58221c7a50df2966d3981d3547..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 6091 zcmZvgS(5BF3uyxeE!zOQ3* z6Ve0kFLruv@zUd*Tjp>hvW*95Cm z&mi8%Ls)NtBWMnjq>i%Q$mCTauF3`E6gmG^1fGYFIxZ5D=SWVD@3BC`mUw zs0{0A?&K$X>UWdIreOWjGq%J?la|Rw#*-wHm~X0*Q>B|+l1M0H>-HPo|@2%aUK&jX3Um-QkRYZTeZ z2rCJv2fU*MfdN_^*s3GQm!jBX>+DQM$Bkt*H$|SvplJg|?^tOpp~9($Qiz~j;v8)WrqvT*%?Yg*Q}B@E*1df zyE*ck0--WEJG@VrUtMfSKcQRQRkv7o+qR3`pN-;RI>(OzQm*|QNyU^wdB(uJH4si z`0YgyDW*{iv5~Q;1BNutbMA$bxJZ6B$(Y_Hxm+rHrw(#Y=vv>30 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zyBBQAxau|aX9aA*(&!Q8QBde2(7qxIqpT?BquwzxW$I>GQ8#bqj&eHExrocj`HeBT z>*bY!gU}0E+IeawVyJjTxxJDO`1<}%#(a+AEN&)WQh*lBPAkfTu3IAM&ORp?OBb`I z@Qxy>s9sg+FJDv$Joi4LD2i&;q|=MZqF?HF^y*^EL9wR - **/ - -configuration PrintfAppC{ -} -implementation -{ - components MainC, PrintfP, LedsC; - components SerialPrintfC; - //components PlatformSerialC; - //ClockTestP.UartByte -> PlatformSerialC; - - PrintfP -> MainC.Boot; - PrintfP.Leds -> LedsC; -} - diff --git a/tos/platforms/MoteISTx5/tests/printf-test/PrintfP.nc b/tos/platforms/MoteISTx5/tests/printf-test/PrintfP.nc deleted file mode 100644 index 587114c503..0000000000 --- a/tos/platforms/MoteISTx5/tests/printf-test/PrintfP.nc +++ /dev/null @@ -1,67 +0,0 @@ - -/** - * Testing types and variables in tinyos - * Use UART to prinft - **/ - -#include - -module PrintfP @safe() -{ - uses interface Leds; - uses interface Boot; - } -implementation -{ - #define MHZ 1000000 - - uint32_t frequency = 12000000; //1 MHz - float dco0_max [] = {0.2, 0.36, 0.75, 1.51, 3.2, 6.0, 10.7, 19.6}; - float dco31_min [] = {0.7, 1.47, 3.17, 6.07, 12.3, 23.7, 39.0, 60.0}; - bool rangefound = FALSE; - float ratio = 1.12; - uint8_t RSELx = 0; - - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("\n\n%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - event void Boot.booted(){ - - printf("Searching RSELx for the frequency of %d MHz.\n", (uint8_t)(frequency/MHZ)); - while(!rangefound){ - if((frequency >= (uint32_t)((dco0_max[RSELx]*ratio)*MHZ)) && (frequency < (uint32_t)((dco31_min[RSELx]/ratio)*MHZ))){ - rangefound = TRUE; - printf("RSELx found. Use RSELx = %d!\n", RSELx); - } - else{ - RSELx++; - printf("Try RSELx = %d...\n", RSELx); - } - } - } -} - diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc deleted file mode 100644 index 84806b6bb5..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCAppC.nc +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.overflow -> Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc deleted file mode 100644 index 7ea1a1ef36..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/FastADCC.nc +++ /dev/null @@ -1,204 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define SAMPLES 16 - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource; - -} - -implementation{ - - uint16_t adb[SAMPLES]; - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureMultiple(); - - event void Boot.booted(){ - call Resource.request(); - } - - event void Resource.granted(){ - uint8_t i; - error_t e = FAIL; - while(e != SUCCESS){ - e = configureMultiple(); - } - - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - - for(i=0; i<5; i++){ - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - } - - - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - printadb(); - return buffer; - } - - async event error_t adc.singleDataReady(uint16_t data){ - return FAIL; - } -//functions - - void printadb(){ - uint8_t i; - float mean = 0; - float Gain = 37.461; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Vout = 0; - float Current = 0; - float Vsense = 0; - float Rsense = 1.01; - - for(i = 0; i < SAMPLES; i++){ - mean += (float) adb[i]; - //printf("Sample %d =", i); - //printfFloat((float) adb[i]); - //printf("\n"); - } - mean = mean/SAMPLES; - printf("Sample mean ="); - printfFloat(mean); - printf("\n"); - - printf("Vout mean (into ADC) ="); - Vout = mean*refVolt/Nmax; - printfFloat(Vout); - printf(" V\n"); - - Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV - printf("Vsense ="); - printfFloat(Vsense); - printf(" mV\n"); - - Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm - printf("Current ="); - printfFloat(Current); - printf(" mA\n"); - - Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - printf("Current ="); - printfFloat(Current); - printf(" mA\n"); - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureMultiple(){ - error_t e; - printf("Configure multipleRepeat\n"); - e = call adc.configureMultiple(&adcconfig, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile deleted file mode 100644 index d0904ef732..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat-mean/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=FastADCAppC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc deleted file mode 100644 index 28f536c255..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/ConfigureAdc.nc +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * This open source code was developed with funding from People Power Company - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -#include "Msp430Adc12.h" - -interface Msp430UsciConfigure { - /** - * Return a pointer to the configuration that should be used for the ADC - */ - async command const msp430adc12_channel_config_t* getConfiguration (); - - async command const adc12memctl_t* getAdditionalChannels (); -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc deleted file mode 100644 index 790561e6b0..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCAppC.nc +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc deleted file mode 100644 index 100ac4cc9e..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/FastADCC.nc +++ /dev/null @@ -1,219 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * 2 Channels convertion - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define SAMPLES 15 - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource; -} - -implementation{ - - uint16_t adb[SAMPLES]; - - msp430adc12_channel_config_t adcconfig = { - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_1024_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - /*adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - };*/ - adc12memctl_t channelconfig [] = { - {INPUT_CHANNEL_A2, REFVOLT_LEVEL_2_5, 0}, - {INPUT_CHANNEL_A3, REFVOLT_LEVEL_2_5, 1} - }; - adc12memctl_t * adcchannelconfig = (adc12memctl_t *) channelconfig; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configure(); - - event void Boot.booted(){ - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - printf("Booting...\n"); - call Resource.request(); - } - - event void Resource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configure(); - } - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - /** - * Conversion results are ready. Results are stored in the buffer in the - * order the channels where specified in the configure() - * command, i.e. every (numMemctl+1)-th entry maps to the same channel. - * - * @param buffer Conversion results (lower 12 bit are valid, respectively). - * @param numSamples Number of results stored in buffer - */ - printadb(); - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - //functions - - void printadb(){ - uint8_t i; - uint32_t VCurrentMean = 0; - uint32_t VCoreMean = 0; - uint32_t VbatMean = 0; - - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Rsense = 1.01; - float curr=0; - float bat =0; - float core=0; - - for(i = 0; i < SAMPLES; i++){ - printf("adb[%d] = %d ->", i, adb[i]); - core = (float)adb[i]*2.5/4095; - printfFloat(core); - } - uwait(1024*6); - /* - for(i = 0; i < SAMPLES; i+=3){ - VCurrentMean += adb[i]; - VbatMean += adb[i+1]; - VCoreMean += adb[i+2]; - } - VCurrentMean /= (SAMPLES/3); //bits - VCoreMean /= (SAMPLES/3); // bits - VbatMean /= (SAMPLES/3); // bits - curr = ((float)VCurrentMean)*2.5/Nmax); - curr /= (Gain*Rsense); - curr = curr *1000;//value in mA - - bat = (((float)VCoreMean)*2.5/Nmax)*2; //value in V - - core = ((float)VCoreMean)*1.5/Nmax; // in V - //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //voltageMean *= 2; // multiply by 2 to get total battery voltage - printf("Current,Supply,Vcore\n"); - printfFloat(curr); - printf(","); - printfFloat(bat); - printf(","); - printfFloat(core); - printf("\n"); - //printf("%d,%lu,%lu,%lu,%lu,%lu\n", Number, ActFreq, Time, VCurrentMean, VbatMean, VCoreMean); - */ - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configure(){ - error_t e; - e = call adc.configure(&adcconfig, adcchannelconfig, 2, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile deleted file mode 100644 index 535593717b..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -COMPONENT=FastADCAppC -#CFLAGS += -DPRINTFUART_ENABLED -#CFLAGS += -DADC12_ONLY_WITH_DMA -# already defined in msp430/adc12/Msp430Adc12.h -#CFLAGS += -DADC12_TIMERA_ENABLED - -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h b/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h deleted file mode 100644 index 94c62756ea..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/MultiChannel/MultipleNoRepeat/adc_configuration.h +++ /dev/null @@ -1,2 +0,0 @@ -#include "Msp430Adc12.h" - diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc deleted file mode 100644 index 84806b6bb5..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCAppC.nc +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.overflow -> Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc deleted file mode 100644 index 10c452b52d..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/FastADCC.nc +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define SAMPLES 16 - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource; - -} - -implementation{ - - uint16_t adb[SAMPLES]; - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_8_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureMultiple(); - - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - event void Boot.booted(){ - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - printf("Booting...\n"); - call Resource.request(); - } - - event void Resource.granted(){ - error_t e = FAIL; - printf("Resource Granted\n"); - while(e != SUCCESS){ - e = configureMultiple(); - } - printf("Starting 1st conversion\n"); - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - printf("Samples ready\n"); - printadb(); - uwait(4096); - return buffer; - } - - async event error_t adc.singleDataReady(uint16_t data){ - return FAIL; - } -//functions - - void printadb(){ - uint16_t i; - float voltage = 0; - printf("Printing buffer\n"); - for(i = 0; i < SAMPLES; i++){ - printf("adb[%d] = %d ->", i, adb[i]); - voltage = adb[i]*2.5/4095; - printfFloat(voltage); - } - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d Volt\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureMultiple(){ - error_t e; - printf("Configure multipleRepeat\n"); - e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile deleted file mode 100644 index 535593717b..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -COMPONENT=FastADCAppC -#CFLAGS += -DPRINTFUART_ENABLED -#CFLAGS += -DADC12_ONLY_WITH_DMA -# already defined in msp430/adc12/Msp430Adc12.h -#CFLAGS += -DADC12_TIMERA_ENABLED - -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput deleted file mode 100644 index 741e490853..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/AdcTestSamplesOutput +++ /dev/null @@ -1,244 +0,0 @@ -Configure multipleRepeat -Starting the ADC... - -Printing ADC set of samples Nº0. -Sample 0 = 3830.000 -Sample 1 = 2989.000 -Sample 2 = 2546.000 -Sample 3 = 2283.000 -Sample 4 = 2114.000 -Sample 5 = 2010.000 -Sample 6 = 1929.000 -Sample 7 = 1875.000 -Sample 8 = 1839.000 -Sample 9 = 1812.000 -Sample 10 = 1805.000 -Sample 11 = 1786.000 -Sample 12 = 1781.000 -Sample 13 = 1769.000 -Sample 14 = 1776.000 -Sample 15 = 1761.000 -Sample mean = 2119.062 -Vout mean (into ADC) = 1.293 V -Vsense = 34.534 mV -Current = 34.192 mA - -Printing ADC set of samples Nº1. -Sample 0 = 1695.000 -Sample 1 = 1721.000 -Sample 2 = 1695.000 -Sample 3 = 1692.000 -Sample 4 = 1697.000 -Sample 5 = 1702.000 -Sample 6 = 1692.000 -Sample 7 = 1697.000 -Sample 8 = 1698.000 -Sample 9 = 1688.000 -Sample 10 = 1695.000 -Sample 11 = 1740.000 -Sample 12 = 1701.000 -Sample 13 = 1690.000 -Sample 14 = 1703.000 -Sample 15 = 1691.000 -Sample mean = 1699.812 -Vout mean (into ADC) = 1.037 V -Vsense = 27.701 mV -Current = 27.427 mA - -Printing ADC set of samples Nº2. -Sample 0 = 1836.000 -Sample 1 = 1832.000 -Sample 2 = 1836.000 -Sample 3 = 1835.000 -Sample 4 = 1830.000 -Sample 5 = 1834.000 -Sample 6 = 1836.000 -Sample 7 = 1826.000 -Sample 8 = 1834.000 -Sample 9 = 1836.000 -Sample 10 = 1839.000 -Sample 11 = 1849.000 -Sample 12 = 1834.000 -Sample 13 = 1850.000 -Sample 14 = 1832.000 -Sample 15 = 1835.000 -Sample mean = 1835.875 -Vout mean (into ADC) = 1.120 V -Vsense = 29.919 mV -Current = 29.622 mA - -Printing ADC set of samples Nº3. -Sample 0 = 1876.000 -Sample 1 = 1882.000 -Sample 2 = 1875.000 -Sample 3 = 1890.000 -Sample 4 = 1873.000 -Sample 5 = 1887.000 -Sample 6 = 1873.000 -Sample 7 = 1873.000 -Sample 8 = 1878.000 -Sample 9 = 1872.000 -Sample 10 = 1874.000 -Sample 11 = 1888.000 -Sample 12 = 1883.000 -Sample 13 = 1877.000 -Sample 14 = 1879.000 -Sample 15 = 1880.000 -Sample mean = 1878.750 -Vout mean (into ADC) = 1.146 V -Vsense = 30.617 mV -Current = 30.314 mA - -Printing ADC set of samples Nº4. -Sample 0 = 1909.000 -Sample 1 = 1904.000 -Sample 2 = 1907.000 -Sample 3 = 1905.000 -Sample 4 = 1906.000 -Sample 5 = 1900.000 -Sample 6 = 1909.000 -Sample 7 = 1898.000 -Sample 8 = 1910.000 -Sample 9 = 1909.000 -Sample 10 = 1911.000 -Sample 11 = 1910.000 -Sample 12 = 1908.000 -Sample 13 = 1905.000 -Sample 14 = 1908.000 -Sample 15 = 1910.000 -Sample mean = 1906.812 -Vout mean (into ADC) = 1.164 V -Vsense = 31.075 mV -Current = 30.767 mA - -Printing ADC set of samples Nº5. -Sample 0 = 1907.000 -Sample 1 = 1922.000 -Sample 2 = 1907.000 -Sample 3 = 1913.000 -Sample 4 = 1911.000 -Sample 5 = 1909.000 -Sample 6 = 1911.000 -Sample 7 = 1909.000 -Sample 8 = 1907.000 -Sample 9 = 1954.000 -Sample 10 = 1912.000 -Sample 11 = 1898.000 -Sample 12 = 1907.000 -Sample 13 = 1899.000 -Sample 14 = 1908.000 -Sample 15 = 1925.000 -Sample mean = 1912.437 -Vout mean (into ADC) = 1.167 V -Vsense = 31.166 mV -Current = 30.858 mA - -Printing ADC set of samples Nº6. -Sample 0 = 1903.000 -Sample 1 = 1905.000 -Sample 2 = 1908.000 -Sample 3 = 1906.000 -Sample 4 = 1903.000 -Sample 5 = 1906.000 -Sample 6 = 1909.000 -Sample 7 = 1904.000 -Sample 8 = 1903.000 -Sample 9 = 1902.000 -Sample 10 = 1905.000 -Sample 11 = 1896.000 -Sample 12 = 1914.000 -Sample 13 = 1894.000 -Sample 14 = 1905.000 -Sample 15 = 1900.000 -Sample mean = 1903.937 -Vout mean (into ADC) = 1.162 V -Vsense = 31.028 mV -Current = 30.721 mA - -Printing ADC set of samples Nº7. -Sample 0 = 1895.000 -Sample 1 = 1903.000 -Sample 2 = 1894.000 -Sample 3 = 1890.000 -Sample 4 = 1891.000 -Sample 5 = 1898.000 -Sample 6 = 1896.000 -Sample 7 = 1901.000 -Sample 8 = 1891.000 -Sample 9 = 1888.000 -Sample 10 = 1899.000 -Sample 11 = 1916.000 -Sample 12 = 1897.000 -Sample 13 = 1896.000 -Sample 14 = 1890.000 -Sample 15 = 1899.000 -Sample mean = 1896.500 -Vout mean (into ADC) = 1.157 V -Vsense = 30.907 mV -Current = 30.601 mA - -Printing ADC set of samples Nº8. -Sample 0 = 1887.000 -Sample 1 = 1886.000 -Sample 2 = 1885.000 -Sample 3 = 1881.000 -Sample 4 = 1885.000 -Sample 5 = 1892.000 -Sample 6 = 1886.000 -Sample 7 = 1907.000 -Sample 8 = 1889.000 -Sample 9 = 1898.000 -Sample 10 = 1889.000 -Sample 11 = 1886.000 -Sample 12 = 1889.000 -Sample 13 = 1898.000 -Sample 14 = 1880.000 -Sample 15 = 1883.000 -Sample mean = 1888.812 -Vout mean (into ADC) = 1.153 V -Vsense = 30.781 mV -Current = 30.477 mA - -Printing ADC set of samples Nº9. -Sample 0 = 1867.000 -Sample 1 = 1860.000 -Sample 2 = 1869.000 -Sample 3 = 1866.000 -Sample 4 = 1863.000 -Sample 5 = 1869.000 -Sample 6 = 1870.000 -Sample 7 = 1870.000 -Sample 8 = 1871.000 -Sample 9 = 1869.000 -Sample 10 = 1868.000 -Sample 11 = 1880.000 -Sample 12 = 1871.000 -Sample 13 = 1867.000 -Sample 14 = 1870.000 -Sample 15 = 1862.000 -Sample mean = 1868.250 -Vout mean (into ADC) = 1.140 V -Vsense = 30.446 mV -Current = 30.145 mA - -Printing ADC set of samples Nº9. -Sample 0 = 1867.000 -Sample 1 = 1860.000 -Sample 2 = 1869.000 -Sample 3 = 1866.000 -Sample 4 = 1863.000 -Sample 5 = 1869.000 -Sample 6 = 1870.000 -Sample 7 = 1870.000 -Sample 8 = 1871.000 -Sample 9 = 1869.000 -Sample 10 = 1868.000 -Sample 11 = 1880.000 -Sample 12 = 1871.000 -Sample 13 = 1867.000 -Sample 14 = 1870.000 -Sample 15 = 1862.000 -Sample mean = 1868.250 -Vout mean (into ADC) = 1.140 V -Vsense = 30.446 mV -Current = 30.145 mA diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc deleted file mode 100644 index 84806b6bb5..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCAppC.nc +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.overflow -> Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc deleted file mode 100644 index e2217331f6..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/FastADCC.nc +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define SAMPLES 16 - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource; - -} - -implementation{ - - uint16_t adb[SAMPLES]; - uint8_t count = 0; - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A2, - //sref: REFERENCE_VREFplus_VREFnegterm, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_8_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void uwait(uint32_t u); - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureMultipleRepeat(); - - event void Boot.booted(){ - call Leds.led0Off(); - call Leds.led1Off(); - call Leds.led2Off(); - call Resource.request(); - } - - event void Resource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureMultipleRepeat(); - } - //printf("Starting the ADC...\n"); - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - //if(count<20){ - printadb(); - // count++; - // } - // else - // return NULL; - // uwait(1024*6); - call Leds.led2Toggle(); - return buffer; - } - - async event error_t adc.singleDataReady(uint16_t data){ - return FAIL; - } -//functions - - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - void printadb(){ - uint8_t i; - float mean = 0; - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Vout = 0; - float Current = 0; - float Vsense = 0; - float Rsense = 1.01; - //printf("Sample,Vin(V)\n"); - for(i = 0; i < SAMPLES; i++){ - mean += (float) adb[i]; - //printfFloat((float) adb[i]); - //printf(","); - Vout = adb[i]*refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //printfFloat(Vout); - //printf("\n"); - } - mean = mean/SAMPLES; - //printf("Sample mean ="); - //printfFloat(mean); - //printf("\n"); - // printf("Mean(V),Vsense(mV),Current(mA),Current(mA)\n"); - //printf("Vout corrected with \" ((float)((uint8_t)(Vout*100)))/100 \" = "); - Vout = mean*refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //printf("Mean Voltage: "); - printfFloat(Vout); - printf("\n"); - /* - Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV - //printf("Vsense ="); - printfFloat(Vsense); - printf(","); - - Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm - //printf("Current ="); - printfFloat(Current); - printf(","); - - Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //printf("Current ="); - printfFloat(Current); - //printf(" mA\n"); - //printf("\n"); - printf("\n");*/ - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2, f3; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - f3 = f*10000;f3 %= 10; - printf("%ld.%d%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2, (uint8_t) f3); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureMultipleRepeat(){ - error_t e; - //printf("Configure multipleRepeat\n"); - e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile deleted file mode 100644 index 535593717b..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -COMPONENT=FastADCAppC -#CFLAGS += -DPRINTFUART_ENABLED -#CFLAGS += -DADC12_ONLY_WITH_DMA -# already defined in msp430/adc12/Msp430Adc12.h -#CFLAGS += -DADC12_TIMERA_ENABLED - -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcCurrent1MHz.csv b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcCurrent1MHz.csv deleted file mode 100644 index add09c2b9852a8eee9f5b4caca5bd7f0fc189b37..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 6801 zcmbuEOOM<*41{y;Uy=ZgfgY4BAA>#Tw7}eR=)(e=!6J|UA5z?L*~JFD#^$0S)Rv{v zrxNLW`19+xfBt^lU;ldh`1 z_cVUrJ-@bF?mCh8`7Ab{fwCz z)ZeSd>!v|gy*0+1^N?Ff=r2XbU$;Hd@l=Dc?U6oTwSU`_tbd2NBs^bg)$uXkqI(|W zh~{JDgof#y$2_ z>>LO*l%Zb0{bjelRW+~2@viu37BNkStP@xDMvJr|O(SQ=eT{yJIZgjOTjc{Jm+r+NJscUNsl)5z(L1Ir(o%d>l$^Mv51M@}MF z+z(Bj=bzBj^8$XJ`*-(+-q@Ek6|p30xTZr(7>lfuIjf^EC(l=zGiYvgQp_80wyh3g z|6=Z9KaEeE#e4sZb2=9T8Yj)IE@`TV+Bj`88%@hB(uOpR_de#}eu_E!z0du-eSelG zoN@~9@O+cT<9nR$?dYdqVAgHHkB|MAG=29|aX;-|HJd(!u*c?jQuXwRmbPK|D1E2yZ>KD{YOrjBhC*47tnC}TlhWtz0QIr zp1)Ge9G>NyR0nZg6!YODm;C!{oI0RgCZMIya!MQKl(`DuiE!5ao`xoV&l0!HJ=IO@ zr;$7OvDM?TPQsp9eb4>OZH(d9R<~W!^u6A%UhfxoSIyv#XFvKWG;^*nhxr{Ta0{<+ zKitLk-70Vg&1U`2oQJ#ud+K!;bGMtH<*Ol2!P&Qbv=q#*F7=wG;u-0(_;;z9`j5JX zI_lIPF(=Oh5Su>*?uc{#o*DfUYn*i&&xh-{6&m}wfyS0U$NculHP7cFr<2TOc)h>O zNc1Z(a|(@SeIDwb9S6_y)xa&*;Q1uRpPYp6SkQEG9yo<&evi|5!H?lZGV3lr7r1jp z^OQ@PN}KuVSiIhMP9<_mT!nj|zXvc!;k!T9nz)e(>1oB` za7gKwFJHg?_2=XM{Kw0u=g+s0!_%UF_vLA+F{qtk%c}MYJ4dw>>?CRnY*_~DH_Ydv z^Spn-{A&AE*qiOg^KA2avR8HN&A-k3InV$8_-Z)ZpMN}Femv~I-+q4o{&@NO)3;ww z|KALtyx!we&P%Z&x~0R7Fs(bLA*}k%8sE+k!loG3{Y*j6GnnV~Z10$dP!zLn|2;-TOSwr7vpwgdj?Z;;GUi|%*lqhEw2M%8fE8A zkeY8%a7HOi5!~2SJqQF#$u-Jc$W0kyr-n59ims>DM3p ziBadz>!&c4yeW#Mti=X}=XD@VLxB%LH1`X5pn0xw2L{elwt<=R9Q!%1fLW-P2W(%h z$9WnrnWr7EndfYu_nX30!7yfSvf3aiybgqE6!?@ESjkjzc;@)@+jPhbUW~U;|-#$xG&O1;!dSnUQ;cv^sANO@4#fmuwZ|A>j}FXpX}i3{=~=5U+BG?Yfr)ysd{nx5)FnD+V! zA6y@ChSnD(oVoExXnm)b#LJGy_`UOv?Zfw5UB8;=^@!1^kC?*rqjjJAQ|9TFU7=Ur zU&1HXTVOD*`@9|)xSk>=<9_x1{o?{{QvN7U!CT|?6sDmzW^S9;{Z_Gp7OqR4;tZ~j zq@TD~=@miXaFep8srY8`1^Vk`e^YIR=+!nD&< z=3N2CA*x;#@Fs}eTY&la9>%<58yI|~|BMUz<7jv3PCw84F)w-j6sDoJ3sec#`iH!D z-PhaQ`EJ_xr{Kv@PcQpd_&mNRAtqk;*#_pWf52$i2MA)`@~YEw#9V^i)6Vu3rf)oL z&3;+Mc`6-GxvqBoD9-HtCvwO25`@0nU znXdclkP=j{YF_>u!ePst`z?^KY-7!uh0tDNAPs0uY9k&Xzx-wbUcO6{_cdhdL3t;A;h&XdX+I@!}kl2Jacz@cMrTr^m#bK!syLeWX#{T-- zb$9o2IKIF2+x_clv%jzC!3>|R8I7-k`Swh9_m}>3>BnzR zpXYOb`q&&F;X7Z&1`?jwFbQueWQMVn@X`rV7g3Pei72E%eY}dPeWir98)@0bu?g&K zLkei==}I}^TDnAVU%H1;E1CTfp`~YA;+INh*Txiz^V+o5FU}GqP)pJYSrv z;r*j#I&epd1C`Kt*l;{-I36~fJZzLND@2iAWVjDKDQYD%ZfK767R{oerJs(!yp4Ao zW>PF!%xY#9jmS(o9oM9Li@!|w76qu-IE%)&i$|G`8V?w@w{@AZwnUZD456omd}eD#{zE|tEhvm^P#D=zrGr^PXeAIL zrRj~{xK8A$WLA&TBGw!6`_o`nU?vp{=AP@NpP*#M{htM9q7j*;$C8^Z?yIN4i)6jv zKFPy(IVH28Gt+Tj>zH7dud@>Q;s0GFYFf#R`xymh#E;Rzh&q$*AFi#f$XuREX1{)L UrgK5PAYI8zKVceuZgxW}^od2Tf{+Nr`h8s1Lh>7VdA2ERLBsor5*9 z;GTpQu567A%=*_K(d@ts%tVA$Px diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcErrorVREFneg.csv b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/MultipleRepeat/MultipleRepeat-mean/readings/adcErrorVREFneg.csv deleted file mode 100644 index cba180b4056262c846eb6e9706bde2e87fa8593f..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 6164 zcmb`LJ8#@D5QJ0fm)O7|;7hMENbM@X^)6Hdh!26C{QpQ?0lJSyCZytPc#B=`&W?r; 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IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - - -configuration FastADCAppC { } - -implementation { - - components MainC, FastADCC as App; - App -> MainC.Boot; - - components LedsC; - App.Leds -> LedsC; - - components new Msp430Adc12ClientAutoRVGC() as Fadc; - App.overflow -> Fadc; - App.adc -> Fadc; - App.Resource -> Fadc; - Fadc.AdcConfigure -> App.AdcConfigure; - components SerialPrintfC; - - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc deleted file mode 100644 index a897ef06f5..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/FastADCC.nc +++ /dev/null @@ -1,153 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Simple test application to test ADC - * Single ADC channel doing repeated conversions - * @author: João Gonçalves - */ - -#include "Timer.h" -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -module FastADCC{ - provides { - interface AdcConfigure as AdcConfigure; - } - uses interface Boot; - uses interface Leds; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource; - -} - -implementation{ - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - -//prototypes - void showerror(); - error_t configureSingleRepeat(); - void printfFloat(float toBePrinted); - - - event void Boot.booted(){ - printf("Booting...\n"); - call Resource.request(); - } - - event void Resource.granted(){ - error_t e = FAIL; - printf("Resource Granted\n"); - while(e != SUCCESS){ - e = configureSingleRepeat(); - } - printf("Starting 1st conversion\n"); - if(call adc.getData() != SUCCESS) - printf("Conversion didn't start!\n"); - } - - async event error_t adc.singleDataReady(uint16_t data){ - float voltage = 0; - printf("Sample: %d\nVoltage: ", data); - voltage = data*2.5/4095; - printfFloat(voltage); - return SUCCESS; - } - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - } - -//functions - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d\n", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureSingleRepeat(){ - error_t e; - printf("Configure singleRepeat\n"); - e = call adc.configureSingleRepeat(&adcconfig, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/Makefile b/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/Makefile deleted file mode 100644 index 535593717b..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/AdcTest/SingleChannel/SingleRepeat/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -COMPONENT=FastADCAppC -#CFLAGS += -DPRINTFUART_ENABLED -#CFLAGS += -DADC12_ONLY_WITH_DMA -# already defined in msp430/adc12/Msp430Adc12.h -#CFLAGS += -DADC12_TIMERA_ENABLED - -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/Makefile deleted file mode 100644 index 95184a0aae..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=MicaTaskC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskC.nc deleted file mode 100644 index da1aeb47d6..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskC.nc +++ /dev/null @@ -1,26 +0,0 @@ -configuration MicaTaskC { -} -implementation { - components MainC; - components LedsC; - components MicaTaskP as App; - - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //for Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskP.nc deleted file mode 100644 index e28f400ccd..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Micaz/MicaTaskP.nc +++ /dev/null @@ -1,156 +0,0 @@ -#include -#include "../RadioAdc/Radio.h" - -module MicaTaskP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - message_t pkt; - bool busy = FALSE; - bool up = TRUE; - uint16_t missedDeadlines = 0; - uint16_t metDeadlines = 0; - uint16_t deadline = 100; //now using this one instead of the one in radio.h - uint16_t iterations = 100; //now using this one instead of the one in radio.h - uint16_t numRequest = 0; //serves as a counter for rasing or lowering the iteration number - uint16_t requestNum = 0;//count the number of requests so far - //prototypes - error_t MicaSendMsg(uint8_t state); - - event void Boot.booted() { - call AMControl.start(); //start radio - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call Timer1.startPeriodic(PERIOD); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) { - busy = FALSE; - } - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MoteISTMsg)) { - mist_m = (MoteISTMsg*)payload; - if(mist_m->nodeid == MOTEIST_NODE_ID){ - if (!busy) { //check if radio is busy - micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); - if (micaz_m == NULL){ - return 0; - } - micaz_m->nodeid = MICA_NODE_ID; //assign Micaz ID - micaz_m->task_i = iterations; - micaz_m->deadline = deadline; - micaz_m->missed = missedDeadlines; - micaz_m->met = metDeadlines; - - switch (mist_m->state){ - case REQUEST: // MoteIST ready for start - micaz_m->state = START; - break; - case STARTED: // MoteIST has started - call Timer0.startOneShot(deadline); - return msg; // At this point don't need to send msg to MoteIST, return - case DEADLINE_MET: - call Timer0.stop(); //stop timer, deadline is met - call Leds.led1Toggle(); - micaz_m->met = ++metDeadlines; - micaz_m->state = DEADLINE_MET; - break; - case DEADLINE_MISS: // MoteIST missed the deadline, too bad.. but nothing to do here - return msg; - default: - } - if(call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - - - event void Timer0.fired(){ //deadline Reached - missedDeadlines++; - call Leds.led0Toggle(); - MicaSendMsg(DEADLINE_MISS); - } - - event void Timer1.fired(){ //make new request - requestNum++; - MicaSendMsg(REQUEST); - numRequest++; - - if(numRequest>3){ - switch(up){ - case TRUE: - if(iterations < ITERATIONS) - iterations += 200; - else{ - up = FALSE; - return; - } - break; - case FALSE: - if(iterations > 200) - iterations -= 200; - else{ - call Timer1.stop(); - return; - } - break; - default: - } - numRequest=0; - } - } - - //functions - error_t MicaSendMsg(uint8_t state){ - - MicaMsg* micaz_m; - if (!busy) { //check if radio is busy - micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); - if (micaz_m == NULL){ - return FAIL; - } - micaz_m->nodeid = MICA_NODE_ID; - micaz_m->request = requestNum; - micaz_m->task_i = iterations; // 0 for deadline miss - micaz_m->deadline = deadline; - micaz_m->missed = missedDeadlines; - micaz_m->met = metDeadlines; - micaz_m->state = state; - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { - busy = TRUE; - } - } - return SUCCESS; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Makefile deleted file mode 100644 index ac59737e3b..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=RadioAdcC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Radio.h b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Radio.h deleted file mode 100644 index 67f949c958..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/Radio.h +++ /dev/null @@ -1,43 +0,0 @@ -#define MOTEIST_NODE_ID 1 //for MoteIST -#define MICA_NODE_ID 2 -#define ITERATIONS 5000 -#define DEADLINE 100 -#define PERIOD 200 - - -enum { - AM_BLINKTORADIO = 6, - TIMER_PERIOD_MILLI = 1000, - DEADLINE_MISS = 4, - DEADLINE_MET = 3, - STARTED = 2, - START = 1, - REQUEST = 0 -}; - -typedef nx_struct MicaMsg { - nx_uint16_t nodeid; //node id - nx_uint16_t request; - nx_uint8_t state; // state of operation - nx_uint16_t task_i; //number of iterations to perform the task: passing 0 means deadline missed - nx_uint16_t deadline; //deadline for the task: passing 0 means this is a request to start - nx_uint16_t missed; //number of missed deadlines so far - nx_uint16_t met; - -} MicaMsg; - -typedef nx_struct MoteISTMsg { - nx_uint16_t nodeid; //node id - nx_uint16_t state; -} MoteISTMsg; - - -/* - * The MicaMsg struct - * - * parameter @state has the state of mica's operation such as: - * 0 - requesting - * 1 - start order - * 2 - deadline met - * 3 - deadline missed - */ diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcC.nc deleted file mode 100644 index 375839c82b..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcC.nc +++ /dev/null @@ -1,44 +0,0 @@ -#include - -configuration RadioAdcC { -} -implementation { - components MainC; - components LedsC; - components RadioAdcP as App; - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - components SerialPrintfC; - - App.Boot -> MainC; - App.Leds -> LedsC; - - //timers - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //tasks (fibonacci) - components TasksC; - App.Tasks -> TasksC; - - //ADC - components new Msp430Adc12ClientAutoRVGC() as adc; - App.adc -> adc; - App.AdcResource -> adc; - adc.AdcConfigure -> App.AdcConfigure; - - //Frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; - - //Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcP.nc deleted file mode 100644 index 94190a0139..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioAdc/RadioAdcP.nc +++ /dev/null @@ -1,308 +0,0 @@ -#include -#include -#include "Radio.h" -#include "Msp430Adc12.h" - - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif -#define MAX_FREQUENCY_INCREASE 5000000 -#define MAX_FREQUENCY 25000000 -#define START_FREQUENCY 25000000 -#define SAMPLES 16 - -module RadioAdcP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - uses interface Tasks; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; - uses interface FreqControl; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource as AdcResource; -} -implementation { - - message_t pkt; - bool busy = FALSE; - uint16_t state; - uint32_t ActFrequency = 0; - uint16_t deadline; - uint16_t requestNum; - - uint16_t adb[SAMPLES]; - bool AdcDone = FALSE; - - //prototypes - void print(uint16_t iterations, uint32_t elapsedTime, error_t status); - void showerror(); - error_t configureAdc(); - - error_t SendMsgTaskDone(); - error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus); - void uwait(uint32_t u); - void printfFloat(float toBePrinted); - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ADC12OSC, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_16_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - - event void Boot.booted() { - printf("Iterations,Deadline,Frequency,ElapsedTime,Current,Voltage,Status\n"); - - if(call FreqControl.setMCLKFreq(START_FREQUENCY) == SUCCESS){ - ActFrequency = START_FREQUENCY; - //printf("Frequency at %lu Hz\n", ActFrequency); - //request the adc - call AdcResource.request(); - } - else - printf("err: Could not set Start Frequency\n"); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureAdc(); - } - call adc.getData(); - uwait(1024*5); - atomic if(AdcDone){ - print(0, 0, 0); - AdcDone=FALSE; - } - call AMControl.start(); //start radio - } - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - AdcDone = TRUE; - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { /*printf("Radio started\n");*/} - else - call AMControl.start(); - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) - busy = FALSE; - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MicaMsg)) { - micaz_m = (MicaMsg*)payload; - /* - * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) - */ - if(micaz_m->nodeid == MICA_NODE_ID){ - //printf("Incoming msg from mica\n"); - if (!busy) { //check if radio is busy - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - return 0; - } - mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID - state = micaz_m->state; - switch(micaz_m->state){ - - case REQUEST: - //printf("Mica: REQUEST\n\n"); - mist_m->state = REQUEST; - state = REQUEST; - break; - case START: - //printf("Mica: START.\niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); - mist_m->state = STARTED; - call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); - requestNum = micaz_m->request; - deadline = micaz_m->deadline; - break; - case DEADLINE_MET: - call Leds.led2Toggle(); - //printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - case DEADLINE_MISS: - call Leds.led1Toggle(); - //printf("Mica: DEADLINE_MISS:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - default: - break; - } - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - call adc.getData(); - - if(status == SUCCESS) - if(SendMsgTaskDone()!=SUCCESS) - call Timer0.startPeriodic(1); - - AdaptFrequency(elapsedTime, status); - - atomic if(AdcDone){ - print(iterations, elapsedTime, status); - AdcDone=FALSE; - } - } - event void Tasks.FibonacciIterationDone(){ } - - event void Timer0.fired() { - if(SendMsgTaskDone()==SUCCESS) - call Timer0.stop(); - } - - event void Timer1.fired() {} - - - //functions - error_t SendMsgTaskDone(){ - MoteISTMsg* mist_m; - if (!busy) {//check if radio is busy - /*build the packet*/ - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - printf("App: null pointer\n"); - return FAIL; - } - mist_m->state = DEADLINE_MET; // task done in time - state = DEADLINE_MET; - /*send the packet*/ - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ - busy = TRUE; - } - return SUCCESS; - } //if(!busy) - return FAIL; - } - - error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus){ - uint32_t newFreq; - float deadlineWindow; - deadlineWindow = deadline - deadline * 0.5; - //printf("Task done! Elapsed: %lu, status: %d\n", elapsedTime, taskStatus); - //printf("Act Freq is %lu Hz\n", ActFrequency); - - if(taskStatus!=SUCCESS) - newFreq = ActFrequency + MAX_FREQUENCY_INCREASE; - else{ - //ajust to finish in 20% less time of deadline - newFreq = (uint32_t) ( (((float) elapsedTime) / deadlineWindow) * ((float) ActFrequency) ); - newFreq = (newFreq/100000)*100000; //round frequency to hundreads of kHz - } - if(newFreq == ActFrequency || newFreq < 700000) - return FAIL; - - if(newFreq > MAX_FREQUENCY) - newFreq = MAX_FREQUENCY; - - if(call FreqControl.setMCLKFreq(newFreq)==SUCCESS) - ActFrequency = newFreq; - //set new frequency to the one needed in order to meet the deadline in half its time with a 20% window - //printf("New Freq is %lu Hz\n", ActFrequency); - return SUCCESS; - } - - void print(uint16_t iterations, uint32_t elapsedTime, error_t status){ - uint8_t i; - float currentMean = 0; - float voltageMean = 0; - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Rsense = 1.01; - - for(i = 0; i < SAMPLES; i+=2){ - currentMean += (float) adb[i]; - voltageMean += (float) adb[i+1]; - } - currentMean /= SAMPLES/2; //bits - voltageMean /= SAMPLES/2; // bits - currentMean *= refVolt/Nmax; //value in Volts - voltageMean *= refVolt/Nmax; //value in Volts - - currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //voltageMean *= 2; // multiply by 2.92 to get total battery voltage - - printf("%d,%d,%d,%lu,%lu,%d,", requestNum, iterations, deadline, ActFrequency, elapsedTime, status); - printfFloat(currentMean); - printf(","); - printfFloat(voltageMean); - printf("\n"); - } - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - float f = toBePrinted; - - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc deleted file mode 100644 index 5684c8d960..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestAppC.nc +++ /dev/null @@ -1,35 +0,0 @@ - -#include - -configuration DVSTestAppC { -} -implementation { - components MainC; - components LedsC; - components DVSTestP as App; - - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - components SerialPrintfC; - - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //For tasks - components TasksC; - App.Tasks -> TasksC; - - //for Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc deleted file mode 100644 index 9d962687af..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/DVSTestP.nc +++ /dev/null @@ -1,140 +0,0 @@ -#include -#include -#include "Radio.h" - -#define ADC_SAMPLE_TIME 10 //miliseconds - -module DVSTestP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - uses interface Tasks; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - message_t pkt; - bool busy = FALSE; - uint16_t state; - - // prototypes - error_t SendMsgTaskDone(); - - - event void Boot.booted() { - //call Timer0.startPeriodic(ADC_SAMPLE_TIME); - printf("Booted\n"); - call Leds.led0Off(); - call Leds.led1Off(); - call Leds.led2Off(); - call AMControl.start(); //start radio - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) {} - else - call AMControl.start(); - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) - busy = FALSE; - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MicaMsg)) { - micaz_m = (MicaMsg*)payload; - /* - * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) - */ - if(micaz_m->nodeid == MICA_NODE_ID){ - //printf("Incoming msg from mica\n"); - if (!busy) { //check if radio is busy - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - return 0; - } - mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID - state = micaz_m->state; - switch(micaz_m->state){ - - case REQUEST: - printf("Mica: REQUEST\n\n"); - mist_m->state = REQUEST; - state = REQUEST; - break; - case START: - printf("Mica: START. \niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); - mist_m->state = STARTED; - call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); - state = STARTED; - break; - case DEADLINE_MET: - call Leds.led2Toggle(); - printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - case DEADLINE_MISS: - call Leds.led1Toggle(); - printf("Mica: DEADLINE_MISS\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - default: - break; - } - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - if(SendMsgTaskDone()!=SUCCESS) - call Timer0.startPeriodic(1); - } - event void Tasks.FibonacciIterationDone(){ } - - event void Timer0.fired() { - if(SendMsgTaskDone()==SUCCESS) - call Timer0.stop(); - } - - event void Timer1.fired() {} - - - //functions - error_t SendMsgTaskDone(){ - MoteISTMsg* mist_m; - if (!busy) {//check if radio is busy - /*build the packet*/ - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - printf("App: null pointer\n"); - return FAIL; - } - mist_m->state = DEADLINE_MET; // task done in time - state = DEADLINE_MET; - /*send the packet*/ - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ - busy = TRUE; - } - return SUCCESS; - } //if(!busy) - return FAIL; - } -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile deleted file mode 100644 index aabeeeb4e5..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSTestAppC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile deleted file mode 100644 index 95184a0aae..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=MicaTaskC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc deleted file mode 100644 index da1aeb47d6..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskC.nc +++ /dev/null @@ -1,26 +0,0 @@ -configuration MicaTaskC { -} -implementation { - components MainC; - components LedsC; - components MicaTaskP as App; - - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //for Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc deleted file mode 100644 index dabe3d3528..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Micaz/MicaTaskP.nc +++ /dev/null @@ -1,127 +0,0 @@ -#include -#include "../Radio.h" - -module MicaTaskP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - message_t pkt; - bool busy = FALSE; - uint16_t missedDeadlines = 0; - uint16_t metDeadlines = 0; - uint8_t deadline = 100; //now using this one instead of the one in radio.h - - //prototypes - error_t MicaSendMsg(uint8_t state); - - event void Boot.booted() { - call AMControl.start(); //start radio - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call Timer1.startPeriodic(PERIOD); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) { - busy = FALSE; - } - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MoteISTMsg)) { - mist_m = (MoteISTMsg*)payload; - if(mist_m->nodeid == MOTEIST_NODE_ID){ - if (!busy) { //check if radio is busy - micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); - if (micaz_m == NULL){ - return 0; - } - micaz_m->nodeid = MICA_NODE_ID; //assign Micaz ID - micaz_m->task_i = ITERATIONS; - micaz_m->deadline = deadline; - micaz_m->missed = missedDeadlines; - micaz_m->met = metDeadlines; - - switch (mist_m->state){ - case REQUEST: // MoteIST ready for start - micaz_m->state = START; - break; - case STARTED: // MoteIST has started - call Timer0.startOneShot(deadline); - return msg; // At this point don't need to send msg to MoteIST, return - case DEADLINE_MET: - call Timer0.stop(); //stop timer, deadline is met - call Leds.led1Toggle(); - micaz_m->met = ++metDeadlines; - micaz_m->state = DEADLINE_MET; - break; - case DEADLINE_MISS: // MoteIST missed the deadline, too bad.. but nothing to do here - call Leds.led0Toggle(); - return msg; - default: - } - if(call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - - - event void Timer0.fired(){ //deadline Reached - missedDeadlines++; - MicaSendMsg(DEADLINE_MISS); - } - - event void Timer1.fired() { //make new request - MicaSendMsg(REQUEST); - } - - //functions - error_t MicaSendMsg(uint8_t state){ - - MicaMsg* micaz_m; - if (!busy) { //check if radio is busy - micaz_m = (MicaMsg*)(call Packet.getPayload(&pkt, sizeof(MicaMsg))); - if (micaz_m == NULL){ - return FAIL; - } - micaz_m->nodeid = MICA_NODE_ID; - micaz_m->task_i = ITERATIONS; // 0 for deadline miss - micaz_m->deadline = deadline; - micaz_m->missed = missedDeadlines; - micaz_m->met = metDeadlines; - micaz_m->state = state; - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MicaMsg)) == SUCCESS) { - busy = TRUE; - } - } - return SUCCESS; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h deleted file mode 100644 index 8d77f02ae2..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Radio.h +++ /dev/null @@ -1,42 +0,0 @@ -#define MOTEIST_NODE_ID 1 //for MoteIST -#define MICA_NODE_ID 2 -#define ITERATIONS 200 -#define DEADLINE 500 //0.1 sec -#define PERIOD 1000 //1 sec - - -enum { - AM_BLINKTORADIO = 6, - TIMER_PERIOD_MILLI = 1000, - DEADLINE_MISS = 4, - DEADLINE_MET = 3, - STARTED = 2, - START = 1, - REQUEST = 0 -}; - -typedef nx_struct MicaMsg { - nx_uint16_t nodeid; //node id - nx_uint8_t state; // state of operation - nx_uint8_t task_i; //number of iterations to perform the task: passing 0 means deadline missed - nx_uint16_t deadline; //deadline for the task: passing 0 means this is a request to start - nx_uint16_t missed; //number of missed deadlines so far - nx_uint16_t met; - -} MicaMsg; - -typedef nx_struct MoteISTMsg { - nx_uint16_t nodeid; //node id - nx_uint16_t state; -} MoteISTMsg; - - -/* - * The MicaMsg struct - * - * parameter @state has the state of mica's operation such as: - * 0 - requesting - * 1 - start order - * 2 - deadline met - * 3 - deadline missed - */ diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc deleted file mode 100644 index e456e577bf..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/Tasks.nc +++ /dev/null @@ -1,24 +0,0 @@ -interface Tasks{ - - /* - * Calculates the fibonacci sequence numbers to the number of the parameter iterations. - * The param deadline is the deadline in miliseconds. - */ - - error_t command getFibonacci(uint16_t iterations, uint32_t deadline); - - /* - *this event is used for each iteration done in TasksP - */ - - event void FibonacciIterationDone(void); - /* - *This signals the stop of the interations for the fibonacci sequence numbers - * returns - * num_iterations: the remanining iterations at the time the event was signaled, if any. - * actualTime: the actual time the event was signaled - * status: FAIL if it missed the deadline - * SUCCESS if it has finished before deadline - */ - event void FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status); -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc deleted file mode 100644 index 3e6dfa33b9..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksC.nc +++ /dev/null @@ -1,11 +0,0 @@ -configuration TasksC { - provides interface Tasks; -} -implementation { - - components TasksP, SerialPrintfC; - Tasks = TasksP.Tasks; - - components new TimerMilliC() as Timer0; - TasksP.Timer0 -> Timer0; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc deleted file mode 100644 index b717945247..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/TasksP.nc +++ /dev/null @@ -1,75 +0,0 @@ - -#define FIBONACCI_A 0 -#define FIBONACCI_B 1 - -module TasksP { - uses interface Timer as Timer0; - provides interface Tasks; - uses interface Tasks as TaskDone; -} -implementation { - - uint32_t a = FIBONACCI_A; - uint32_t b = FIBONACCI_B; - uint32_t i = 0; - uint32_t sum = 0; - uint16_t num_iterations; - uint32_t time_deadline; - bool deadline_miss=0; - //tasks - task void fibonacci(void){ - /** - * Here is the single iteration. - * On each iteration it performs the parameter @iterations is decremented. - * - */ - // printf("N=%d, %lu\n", num_iterations, a); - sum = a + b; - a = b; - b = sum; - //signal iteration done - num_iterations--; - signal TaskDone.FibonacciIterationDone(); - } - - //commands - command error_t Tasks.getFibonacci(uint16_t iterations, uint32_t deadline){ - num_iterations = iterations; - time_deadline = deadline; - - call Timer0.startOneShot(deadline); - - //printf("Posted fibonacci\nIterations:%d, deadline: %lu\n",num_iterations, time_deadline); - post fibonacci(); - - return SUCCESS; - } - - //events - event void TaskDone.FibonacciIterationDone(){ - uint32_t t0, now; - if(num_iterations && !deadline_miss) - post fibonacci(); - else{ - if(!deadline_miss){ - call Timer0.stop(); - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - signal Tasks.FibonacciDone(num_iterations, now-t0, SUCCESS); - } - } - } - - event void Timer0.fired() { - //deadline missed! - uint32_t now,t0; - deadline_miss = 1; - call Timer0.stop(); - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - signal Tasks.FibonacciDone(num_iterations, now-t0, FAIL); - } - - event void TaskDone.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fib b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fib deleted file mode 100755 index 27f8df5405ecbc675bdb1da328523abe0191556c..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7253 zcmeHMZ){sv6~A_z&D%n8(?G)-swd_^3e-)yv|WIyO%pfGmNskZ7Did$9Q!49>p#JM zUXvn0g9#|O5f$UZ1QM*E@c|8K(?qG%f-)sqT4_RoeVNceMYNKu1Z1SpO(OL1``zp7 zIO!(AXL79Ldw=(wd(OS*{(1M^_l;oR0hh}qG`U5MAezp5yzNL^H!4ZHFoajMh^=Ca zxDQ2?wV#6ySXMx#T9kRfHIxCjk3$aL1Wcxkw#kxM7wm&UGV2SUlGlA$h`OJ6yks9L zG=k}uayJqKasx8*JTRGZ`XC>K{z3RAcLS5P?8q%U3V09c`U8+x`(J`4nf2NB9f|nh zjzn~OBA&{P2D0hEP9;Orq`c?wG2~P`X%kJAbsLZ}Hk2=ZCQu50?a=SGzV=dg;>e91 zp_(2qW%rkL84KcSqAmJo|4B@BnT(ww43@L(mrwq6n)zyCT}=iujESatWFFT5De<;7 z_^~zkVc<6>JYL3SBL~Jbhm+})nYF_i+cX8j6k&LF3$wQ$rO|lG%w?@8^y1lcq@%;k zM#8BfF_N>hVk8q!*+USqR@p={98Za!zTW*^=FY&LO0HG5!;SvefL-{x>0L5Ko8$2h zF?z?#Wj=}B;#mqoCCr)o7>pM^-usbym?D^7rU-f+Q*_G56oEZ9dFyC?(NkpI6XP?p zO+pl&Uv?a4;tzIhaVtuTwJ=j`g^e$rxIW|TdJi6)=4Je|j?+v}F=lVyKsBeC9%Gc< zo|l-OW9-81X^Gi_SR?T(60;>SgZM>Yq!nuW+sVnlk&Jzaz(E_P0FV z;`2~my0D7MeL44d6HJQS-irp(D~)LB_(B8zU;mdozu@Y4JG*u25}o9yT|c9W(=b7? zRPT5@Q+%VA23+}B&xvPdrtD9OsjHu&KJ4cg8!t9NcVgPEzsxdZ9+>m^S?0`NpSeJt zo2C4sfx>w-x3~rEyzKtA$2%4BH%*58o=K0tc;~L;6uNh_FW16I;n1KlYd6~$Dz$^$4s-U_Aos5m=AFdIbK@B7ifR zJX`CO-RJR=2lG0xAMeC?u@Eog%*uD3^LV%X=Upd#6)E4p`o4+x3Z(A<^Eh=1{1BM+ zKLRH4oVJ7$9^c(sz+tO@P3F#$ZWdCR4 zJF~8I3Vk{Y{x0~3;9r2Xtf#B%b4JUt!CcDD8SR1gz@yvSa}w>^rmzr!>{!wc41fyvi+~j~hce-$B?1vUoyo$1N=`*! z2u8xmcmxj8sEEISw5DnfW}zKPCzDpn)^Yi7(k)QpIB}fiJqQ5DQWIsQN5Fi$p`N_2 zfWSar6XzMJ4XpKIm|rpI`K3htX}yDhoQt%_`FS3Ct;lm;lBh@S2H(LPq8{h()w18U zdWRwB9Ht)U^*hiTL7r_vR@&nH=DRlMHubm;`jFxL*F;^?NigRy^*DboA+rH_?U&`` z(_qed<~i?Ykzqfo{Q`=!;0M6ewhXW zzdtVPvA@@#cMW=76)okH@aJIKqh1|eitErJZ39J>{42;)56x2dZMdvryfo=Lzea)9 z<3&Kj2k8B_N{=u6P0-UeXjA8BkY|kPSKi}6ZytG$FNu0=$D3g7m-jZM_pwLa-&g5z ze_eu}fig|hA^#Dq?KR*AqX7f(e*L`xJ(jb5yyM7>8;R{m2)=Dto_ zn)X8P?;0Sb4v8tpOw$cKIQF68A4kDI@*PFszxkBDmE6kllJ)afEBmi-pD9p&I^`J0EMa_GK`P9WT8S_VBwPSN0 zE6k_0kn>ex^;GA)RQRJzX5qN@5@MepU06Tjv;*tcZEnW z?>3-ph3KCTJztgoabWHz)N)}~e-CN3{~rOLE61DmUZrB0Xzw@3bA7VN<=!mbLaO^G z-1Xw-8vHJ>KCigkh&LLj<7tRS@enZYJvkHW;cp8t_gO%RKLM=CK&EXC4gzz2Fdn?a z?gQrj%R2SAxgV&~=j`C&tNPCS>%h7_KD4I*+*ls(jqXPA0&%&&8{M14OTfIMi=nt{=2~bvOnrCuaVbbNmtw31bkNa&%Hr>8kl#* zy!)s99l(6uRL%7{H&F)p`iLNS9G;Izi(u3iI zDNkBvI5#SAiW*5+wiONRY2Dc-C@|yEQKCnMJf4}+TrxSP{R9tpOE(7wIu8X+jp#<_ zSG>q$o%AvkA55phkw}~k?&<5_-`QvOA2@I{7&1eh`}=}yI1h?uIFkvFnN~`Ej#w#> zA1{R2{q*6^L%m&sr$F^J0`=sliAXkQ%F|_~c-2P_^NHuo0c$v(#o@Or5zc0RZYxyCx2@A>KqkRNMgXvKd3bftG@ diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c deleted file mode 100644 index 50c793c7fa..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioConstFrequencyNoAdc/Tasks/fibonacci/fibonacci.c +++ /dev/null @@ -1,69 +0,0 @@ -/** - * You'll notice that we need to include a header file that - * contains functions we need to use. Being a compiled language, - * it's inefficient to include functions that aren't needed. - * stdio.h contains functions for reading from and writing to the console - */ - -#include - -/** - * In C, the program executes the main function. You should also take note - * that we must declare a return type for the function. In this case, it's - * an integer, and we return 0 to indicate successful completion of the - * program. - */ - -int fibonacci(unsigned long int n); - -int main () -{ - /* Notice that we need to declare our variables, and their type */ - - unsigned long int n; - - /* printf prints a formated string to the stdout */ - - printf("\nHow many numbers of the sequence would you like?\n"); - - /* scanf reads a formated string from the stdin. We are expecting an integer here. */ - - scanf("%d",&n); - - /* Here we call the fibonacci function */ - - fibonacci(n); - - /* Finally, return 0 */ - - return 0; -} - -/** - * This is the simple fibonacci sequence generator. Notice also, we - * declare the type of variable we expect to be passed to the function. - */ - -int fibonacci(unsigned long int n) -{ - /** - * Here we declare and set our variables. - */ - long unsigned int a = 0; - long unsigned int b = 1; - long unsigned int sum; - int i; - - /** - * Here is the standard for loop. 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-int main(void){ - for(;b-c;)f[b++]=a/5; - for(;d=0,g=c*2;c-=14, printf("%.4d",e+d/a),e=d%a) - for(b=c;d+=f[b]*a,f[b]=d%--g,d/=g--,--b;d*=b); - return 0; - } diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc deleted file mode 100644 index 0e8bc5212f..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestAppC.nc +++ /dev/null @@ -1,39 +0,0 @@ - -#include - -configuration DVSTestAppC { -} -implementation { - components MainC; - components LedsC; - components DVSTestP as App; - - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - components SerialPrintfC; - - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - - //For tasks - components TasksC; - App.Tasks -> TasksC; - - //for Radio - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; - - //for frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestP.nc deleted file mode 100644 index 3e300862ec..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/DVSTestP.nc +++ /dev/null @@ -1,180 +0,0 @@ -#include -#include -#include "Radio.h" - -#define MAX_FREQUENCY_INCREASE 5000000 -#define MAX_FREQUENCY 25000000 -#define START_FREQUENCY 25000000 - -module DVSTestP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - uses interface Tasks; - - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; - uses interface FreqControl; -} -implementation { - - message_t pkt; - bool busy = FALSE; - uint16_t state; - uint32_t ActFrequency = 0; - uint16_t deadline; - // prototypes - error_t SendMsgTaskDone(); - error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus); - - event void Boot.booted() { - printf("Booted\n"); - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - if(call FreqControl.setMCLKFreq(START_FREQUENCY) == SUCCESS){ - ActFrequency = START_FREQUENCY; - printf("Frequency at %lu Hz\n", ActFrequency); - call AMControl.start(); //start radio - } - else - printf("err: Could not set Start Frequency\n"); - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { printf("Radio started\n");} - else - call AMControl.start(); - } - - event void AMControl.stopDone(error_t err) { - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) - busy = FALSE; - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - MoteISTMsg* mist_m; - MicaMsg* micaz_m; - - if (len == sizeof(MicaMsg)) { - micaz_m = (MicaMsg*)payload; - /* - * Check if message comes from Mica1 and if it is a request to start the processing (task != 0) - */ - if(micaz_m->nodeid == MICA_NODE_ID){ - //printf("Incoming msg from mica\n"); - if (!busy) { //check if radio is busy - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - return 0; - } - mist_m->nodeid = MOTEIST_NODE_ID; //assign MoteIST ID - state = micaz_m->state; - switch(micaz_m->state){ - - case REQUEST: - printf("Mica: REQUEST\n\n"); - mist_m->state = REQUEST; - state = REQUEST; - break; - case START: - printf("Mica: START.\niterations=%d\ndeadline=%d\nmissed=%d\nmet=%d\n\n", micaz_m->task_i, micaz_m->deadline, micaz_m->missed, micaz_m->met); - mist_m->state = STARTED; - call Tasks.getFibonacci(micaz_m->task_i, micaz_m->deadline); - state = STARTED; - deadline = micaz_m->deadline; - break; - case DEADLINE_MET: - call Leds.led2Toggle(); - printf("Mica DEADLINE_MET:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - case DEADLINE_MISS: - call Leds.led1Toggle(); - printf("Mica: DEADLINE_MISS:\nmissed=%d\nmet=%d\n\n", micaz_m->missed, micaz_m->met); - return msg; - break; - default: - break; - } - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS) { - busy = TRUE; - } - }//if !busy - }// if == MICA_NODE_ID - }// if len = len MicaMsg - return msg; - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - if(status == SUCCESS) - if(SendMsgTaskDone()!=SUCCESS) - call Timer0.startPeriodic(1); - AdaptFrequency(elapsedTime, status); - } - event void Tasks.FibonacciIterationDone(){ } - - event void Timer0.fired() { - if(SendMsgTaskDone()==SUCCESS) - call Timer0.stop(); - } - - event void Timer1.fired() {} - - - //functions - error_t SendMsgTaskDone(){ - MoteISTMsg* mist_m; - if (!busy) {//check if radio is busy - /*build the packet*/ - mist_m = (MoteISTMsg*)(call Packet.getPayload(&pkt, sizeof(MoteISTMsg))); - if (mist_m == NULL){ - printf("App: null pointer\n"); - return FAIL; - } - mist_m->state = DEADLINE_MET; // task done in time - state = DEADLINE_MET; - /*send the packet*/ - if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(MoteISTMsg)) == SUCCESS){ - busy = TRUE; - } - return SUCCESS; - } //if(!busy) - return FAIL; - } - - error_t AdaptFrequency(uint32_t elapsedTime, error_t taskStatus){ - uint32_t newFreq; - float deadlineWindow; - deadlineWindow = deadline - deadline * 0.5; - printf("Task done! Elapsed: %lu, status: %d\n", elapsedTime, taskStatus); - printf("Act Freq is %lu Hz\n", ActFrequency); - - if(taskStatus!=SUCCESS) - newFreq = ActFrequency + MAX_FREQUENCY_INCREASE; - else{ - //ajust to finish in 20% less time of deadline - newFreq = (uint32_t) ( (((float) elapsedTime) / deadlineWindow) * ((float) ActFrequency) ); - newFreq = (newFreq/100000)*100000; //round frequency to hundreads of kHz - } - if(newFreq == ActFrequency || newFreq < 700000) - return FAIL; - - if(newFreq > MAX_FREQUENCY) - newFreq = MAX_FREQUENCY; - - if(call FreqControl.setMCLKFreq(newFreq)==SUCCESS) - ActFrequency = newFreq; - //set new frequency to the one needed in order to meet the deadline in half its time with a 20% window - printf("New Freq is %lu Hz\n", ActFrequency); - return SUCCESS; - } -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/Makefile deleted file mode 100644 index aabeeeb4e5..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/RadioNoAdc/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSTestAppC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/Tasks.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/Tasks.nc deleted file mode 100644 index 2e33e2092b..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/Tasks.nc +++ /dev/null @@ -1,24 +0,0 @@ -interface Tasks{ - - /* - * Calculates the fibonacci sequence numbers to the number of the parameter iterations. - * The param deadline is the deadline in miliseconds. - */ - - error_t command getFibonacci(uint16_t iterations, uint32_t deadline); - - /* - *this event is used for each iteration done in TasksP - */ - - event void FibonacciIterationDone(void); - /* - *This signals the stop of the interations for the fibonacci sequence numbers - * returns - * num_iterations: the remanining iterations at the time the event was signaled, if any. - * actualTime: the actual time the event was signaled - * status: FAIL if it missed the deadline - * SUCCESS if it has finished before deadline - */ - event void FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status); -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksC.nc deleted file mode 100644 index 3e6dfa33b9..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksC.nc +++ /dev/null @@ -1,11 +0,0 @@ -configuration TasksC { - provides interface Tasks; -} -implementation { - - components TasksP, SerialPrintfC; - Tasks = TasksP.Tasks; - - components new TimerMilliC() as Timer0; - TasksP.Timer0 -> Timer0; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksP.nc deleted file mode 100644 index dcbc13cac1..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/Tasks/TasksP.nc +++ /dev/null @@ -1,81 +0,0 @@ - -#define FIBONACCI_A 0 -#define FIBONACCI_B 1 - -module TasksP { - uses interface Timer as Timer0; - provides interface Tasks; - uses interface Tasks as TaskDone; -} -implementation { - - uint32_t a = FIBONACCI_A; - uint32_t b = FIBONACCI_B; - uint32_t i = 0; - uint32_t sum = 0; - uint16_t num_iterations; - uint16_t totalIterations; - uint32_t time_deadline; - bool deadline_miss=FALSE; - - //tasks - task void fibonacci(void){ - /** - * Here is the single iteration. - * On each iteration it performs the parameter @iterations is decremented. - * - */ - // printf("N=%d, %lu\n", num_iterations, a); - sum = a + b; - a = b; - b = sum; - //signal iteration done - num_iterations--; - signal TaskDone.FibonacciIterationDone(); - } - - //commands - command error_t Tasks.getFibonacci(uint16_t iterations, uint32_t deadline){ - deadline_miss = FALSE; - num_iterations = iterations; - totalIterations = iterations; - time_deadline = deadline; - - call Timer0.startOneShot(deadline); - - //printf("Posted fibonacci\nIterations:%d, deadline: %lu, deadline miss: %d\n",num_iterations, time_deadline, deadline_miss); - post fibonacci(); - - return SUCCESS; - } - - //events - event void TaskDone.FibonacciIterationDone(){ - uint32_t t0, now; - if(num_iterations && !deadline_miss) - post fibonacci(); - else{ - if(!deadline_miss){ - call Timer0.stop(); - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - //printf("fibonacci is done in: %lu\n", now-t0); - signal Tasks.FibonacciDone(totalIterations, t0, now, SUCCESS); - } - } - } - - event void Timer0.fired() { - //deadline missed! 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Being a compiled language, - * it's inefficient to include functions that aren't needed. - * stdio.h contains functions for reading from and writing to the console - */ - -#include - -/** - * In C, the program executes the main function. You should also take note - * that we must declare a return type for the function. In this case, it's - * an integer, and we return 0 to indicate successful completion of the - * program. - */ - -int fibonacci(unsigned long int n); - -int main () -{ - /* Notice that we need to declare our variables, and their type */ - - unsigned long int n; - - /* printf prints a formated string to the stdout */ - - printf("\nHow many numbers of the sequence would you like?\n"); - - /* scanf reads a formated string from the stdin. We are expecting an integer here. */ - - scanf("%d",&n); - - /* Here we call the fibonacci function */ - - fibonacci(n); - - /* Finally, return 0 */ - - return 0; -} - -/** - * This is the simple fibonacci sequence generator. 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for(b=c;d+=f[b]*a,f[b]=d%--g,d/=g--,--b;d*=b); - return 0; - } diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc deleted file mode 100644 index c1a27ad206..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioC.nc +++ /dev/null @@ -1,32 +0,0 @@ - -#include - -configuration DVSnoRadioC { -} -implementation { - components MainC; - components LedsC; - components DVSnoRadioP as App; - components SerialPrintfC; - - App.Boot -> MainC; - App.Leds -> LedsC; - - //For tasks (fibonacci) - components TasksC; - App.Tasks -> TasksC; - - //For ADC - components new Msp430Adc12ClientAutoRVGC() as adc; - App.adc -> adc; - App.AdcResource -> adc; - adc.AdcConfigure -> App.AdcConfigure; - - //For frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; - - //For UART - //components PlatformSerialC; - //App.UartStream -> PlatformSerialC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc deleted file mode 100644 index da2b479107..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/DVSnoRadioP.nc +++ /dev/null @@ -1,203 +0,0 @@ -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define ADC_SAMPLE_TIME 10 //miliseconds -#define ITERATIONS 900 -#define DEADLINE 5000 -#define SAMPLES 16 - -module DVSnoRadioP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Tasks; - uses interface FreqControl; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource as AdcResource; -} -implementation { - - uint16_t adb[SAMPLES]; - //uint8_t count = 0; - uint32_t Freq = 1000000; - uint32_t ActFreq = 0; - uint32_t EndFreq = 25000000; - uint32_t Step = 500000; - uint32_t timeStart = 0; - uint32_t timeEnd = 0; - uint16_t Number = 0; - bool AdcDone = FALSE; - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureAdc(); - void frequency_sweep(); - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ADC12OSC, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_16_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - event void Boot.booted() { - //request the adc - call AdcResource.request(); - - } - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureAdc(); - } - /* - * Adc is configured, now init the system - */ - printf("Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit)\n"); - if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) - printf("Could not change the frequency to: %lu Hz. \r\n", Freq); - else - atomic ActFreq = Freq; - - call adc.getData(); - - uwait(1024*5); - atomic if(AdcDone){ - printadb(); - AdcDone=FALSE; - } - call Tasks.getFibonacci(ITERATIONS, DEADLINE); - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ - atomic timeEnd = startTime; - atomic timeStart = endTime; - - if(Freq=EndFreq){ - call Leds.led2On(); - return; - } - } - - event void Tasks.FibonacciIterationDone(){ - } - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - AdcDone = TRUE; - - } - - -//functions - void printadb(){ - uint8_t i; - uint32_t currentMean = 0; - uint32_t voltageMean = 0; - //float Gain = 37.5; //(Gm*Rout) - //float refVolt = 2.5; - //float Nmax = 4095; - //float Rsense = 1.01; - - for(i = 0; i < SAMPLES; i+=2){ - currentMean += adb[i]; - voltageMean += adb[i+1]; - } - currentMean /= SAMPLES/2; //bits - voltageMean /= SAMPLES/2; // bits - //currentMean *= refVolt/Nmax; //value in Volts - //voltageMean *= refVolt/Nmax; //value in Volts - - //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //voltageMean *= 2; // multiply by 2 to get total battery voltage - - printf("%d,%lu,%lu,%lu,%lu\n", Number, ActFreq, timeEnd, currentMean, voltageMean); - } - - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - float f = toBePrinted; - - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/Makefile deleted file mode 100644 index 1e65e3cde8..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSnoRadioC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/test.txt b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/test.txt deleted file mode 100644 index 98d693eacb..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/2Channels/test.txt +++ /dev/null @@ -1,165 +0,0 @@ -Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) -0,25000000,0,80,1137 -2,24000000,580,462,1263 -3,23500000,594,613,1467 -4,23000000,608,597,1438 -5,22500000,623,593,1414 -6,22000000,638,589,1402 -7,21500000,653,585,1392 -8,21000000,668,564,1322 -9,20500000,684,561,1308 -10,20000000,700,553,1312 -11,19500000,717,542,1258 -12,19000000,734,538,1256 -13,18500000,752,515,1179 -14,18000000,770,516,1161 -15,17500000,788,512,1186 -16,17000000,807,434,1284 -18,16000000,843,446,1245 -19,15500000,863,440,1235 -20,15000000,884,439,1228 -21,14500000,905,441,1245 -22,14000000,927,433,1239 -23,13500000,950,423,1181 -24,13000000,973,410,1171 -25,12500000,998,385,1299 -26,12000000,1023,372,1392 -27,11500000,1049,369,1329 -28,11000000,1077,356,1313 -29,10500000,1106,334,1280 -30,10000000,1136,343,1280 -31,9500000,1167,338,1287 -32,9000000,1199,327,1251 -33,8500000,1233,319,1218 -34,8000000,1268,312,1196 -35,7500000,1306,300,1156 -36,7000000,1346,294,1178 -37,6500000,1389,292,1154 -38,6000000,1435,284,1100 -39,5500000,1485,274,1079 -40,5000000,1539,249,1335 -41,4500000,1599,482,1228 -42,4000000,1663,246,1266 -43,3500000,1735,238,1207 -44,3000000,1817,236,1355 -45,2500000,1912,214,1148 -46,2000000,2026,213,1297 -47,1500000,2162,211,1138 -48,1000000,2344,198,1099 -49,1000000,2617,199,1347 -Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) -0,1000000,0,59,1029 -1,1500000,774,61,1021 -2,2000000,969,60,1037 -3,2500000,1111,65,1040 -4,3000000,1227,75,1190 -5,3500000,1324,76,1164 -6,4000000,1409,83,1103 -7,4500000,1483,88,1255 -8,5000000,1548,100,1264 -9,5500000,1608,113,1235 -10,6000000,1662,104,1211 -11,6500000,1713,120,1257 -12,7000000,1760,124,1168 -13,7500000,1804,126,1088 -14,8000000,1845,129,1029 -15,8500000,1884,155,1027 -16,9000000,1920,160,1042 -17,9500000,1955,171,1090 -18,10000000,1987,180,1137 -19,10500000,2018,183,1137 -21,11500000,2072,198,1172 -22,12000000,2100,209,1202 -23,12500000,2127,224,1244 -24,13000000,2153,225,1236 -26,14000000,2198,244,1275 -27,14500000,2222,265,1141 -28,15000000,2244,269,1105 -29,15500000,2266,300,1131 -30,16000000,2287,301,1147 -31,16500000,2307,307,1166 -32,17000000,2327,318,1202 -33,17500000,2346,337,1272 -34,18000000,2365,371,1098 -35,18500000,2384,351,1317 -36,19000000,2402,351,1319 -37,19500000,2420,399,1392 -38,20000000,2437,377,1118 -39,20500000,2454,380,1073 -40,21000000,2471,419,1221 -41,21500000,2487,417,1239 -42,22000000,2503,434,1247 -43,22500000,2519,440,1274 -44,23000000,2534,453,1318 -45,23500000,2549,463,1342 -46,24000000,2564,472,1371 -47,24500000,2578,475,1384 -Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) -0,1000000,0,58,1018 -1,1500000,775,62,1018 -2,2000000,969,65,1036 -3,2500000,1112,67,1173 -4,3000000,1227,83,1199 -5,3500000,1325,80,1217 -6,4000000,1410,84,1092 -7,4500000,1484,88,1239 -8,5000000,1549,97,1269 -9,5500000,1608,109,1252 -10,6000000,1663,109,1195 -11,6500000,1713,115,1260 -12,7000000,1761,128,1173 -13,7500000,1805,128,1070 -14,8000000,1846,134,1002 -15,8500000,1884,158,1031 -16,9000000,1921,163,1059 -17,9500000,1955,169,1110 -18,10000000,1988,179,1122 -19,10500000,2019,189,1161 -21,11500000,2073,199,1173 -22,12000000,2101,205,1189 -23,12500000,2128,218,1224 -24,13000000,2154,233,1270 -26,14000000,2199,240,1284 -27,14500000,2222,269,1200 -28,15000000,2245,279,1136 -29,15500000,2267,288,1125 -30,16000000,2288,304,1154 -31,16500000,2308,306,1165 -32,17000000,2328,314,1189 -33,17500000,2347,335,1266 -34,18000000,2366,374,1096 -35,18500000,2385,344,1295 -36,19000000,2403,354,1323 -37,19500000,2421,376,1253 -38,20000000,2438,371,1098 -39,20500000,2455,389,1110 -40,21000000,2472,415,1211 -41,21500000,2488,426,1250 -42,22000000,2504,425,1219 -43,22500000,2520,444,1293 -44,23000000,2535,454,1315 -45,23500000,2550,453,1315 -Number#,Frequency(Hz),Time(ms),I(12bit), V(12bit) -0,1000000,0,62,1010 -1,1500000,774,60,1020 -2,2000000,969,57,1013 -3,2500000,1111,70,1058 -4,3000000,1227,77,1196 -5,3500000,1324,78,1069 -6,4000000,1409,87,1101 -7,4500000,1483,89,1179 -8,5000000,1549,95,1265 -9,5500000,1608,107,1241 -10,6000000,1662,109,1174 -11,6500000,1713,119,1304 -12,7000000,1760,124,1188 -13,7500000,1804,129,1089 -14,8000000,1845,128,987 -15,8500000,1884,157,1031 -16,9000000,1920,164,1065 -17,9500000,1954,168,1083 -18,10000000,1987,176,1114 -19,10500000,2018,191,1152 -21,11500000,2072,203,1228 -22,12000000,2100,209,1196 - diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc deleted file mode 100644 index c7b5a3fc53..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioC.nc +++ /dev/null @@ -1,37 +0,0 @@ - -#include - -configuration DVSnoRadioC { -} -implementation { - components MainC; - components LedsC; - components DVSnoRadioP as App; - components SerialPrintfC; - components new TimerMilliC() as Timer0; - components new TimerMilliC() as Timer1; - components new TimerMilliC() as Timer2; - App.Boot -> MainC; - App.Leds -> LedsC; - - //For tasks (fibonacci) - components TasksC; - App.Tasks -> TasksC; - - //For ADC - components new Msp430Adc12ClientAutoRVGC() as adc; - App.adc -> adc; - App.AdcResource -> adc; - adc.AdcConfigure -> App.AdcConfigure; - - //For frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; - //timers - App.Timer0 -> Timer0; - App.Timer1 -> Timer1; - App.Timer2 -> Timer2; - //For UART - //components PlatformSerialC; - //App.UartStream -> PlatformSerialC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc deleted file mode 100644 index ce54c33d12..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/DVSnoRadioP.nc +++ /dev/null @@ -1,257 +0,0 @@ -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define ADC_SAMPLE_TIME 10 //miliseconds -#define ITERATIONS 5000 -#define DEADLINE 9000 -#define SAMPLES 15 -#define FREQ_25MHz 25000000 -#define FREQ_1MHz 1000000 -#define FREQ_STEP FREQ_1MHz -#define SWEEP_REPOST_DELAY 50 -#define UP - -module DVSnoRadioP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Tasks; - uses interface FreqControl; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource as AdcResource; - uses interface Timer as Timer0; - uses interface Timer as Timer1; - uses interface Timer as Timer2; -} -implementation { - - uint16_t adb[SAMPLES]; - //uint8_t count = 0; - #ifdef UP - uint32_t Freq = FREQ_1MHz; - uint32_t EndFreq = FREQ_25MHz; - uint32_t ActFreq = FREQ_1MHz; - #else - uint32_t Freq = FREQ_25MHz; - uint32_t EndFreq = FREQ_1MHz; - uint32_t ActFreq = FREQ_25MHz; - #endif - uint32_t timeStart = 0; - uint32_t timeEnd = 0; - uint16_t Number = 0; - uint32_t adcStartTime, adcEndTime; - bool fibDone = FALSE; -//prototypes - //void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureAdc(); - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_1_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_64_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - /*adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - };*/ - - adc12memctl_t channelconfig [] = { - {INPUT_CHANNEL_A2, REFVOLT_LEVEL_1_5, 0}, - {INPUT_CHANNEL_A3, REFVOLT_LEVEL_1_5, 1} - }; - adc12memctl_t * adcchannelconfig = (adc12memctl_t *) channelconfig; - - task void delaySweep(){ - call Timer1.startOneShot(SWEEP_REPOST_DELAY); - } - - task void sweep(){ - uint32_t t0 = 0; - uint32_t now = 0; - - #ifdef UP - if(Freq<=EndFreq){ - #else - if(Freq>=EndFreq){ - #endif - atomic call Timer2.startOneShot(600); - atomic adcStartTime=call Timer2.gett0(); - //atomic adcStartTime=call Timer0.getdt(); - call adc.getData(); - if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) - printf("Could not change the frequency to: %lu Hz. \r\n", Freq); - else{ - ActFreq = Freq; - Number++; // increment the number of sequences calculated - } - //printf("adc.getdata; "); - //printf("tasks.getfib\n "); - atomic fibDone = FALSE; - call Tasks.getFibonacci(ITERATIONS, DEADLINE); - } - else{ - call Leds.led2On(); - call Timer0.stop(); - t0=call Timer0.gett0(); - now=call Timer0.getNow(); - //printf("sweep: "); - printf("app end time: %lu\n", now-t0); - } - #ifdef UP - Freq+=FREQ_STEP; - #else - Freq-=FREQ_STEP; - #endif - } - - task void printadb(){ - uint8_t i; - uint32_t currentMean = 0; - uint32_t voltageMean = 0; - uint32_t vcoreMean = 0; - //float Gain = 37.5; //(Gm*Rout) - //float refVolt = 2.5; - //float Nmax = 4095; - //float Rsense = 1.01; - //printf("print adb: "); - for(i = 0; i < SAMPLES; i+=3){ - currentMean += adb[i]; - voltageMean += adb[i+1]; - vcoreMean += adb[i+2]; - } - currentMean /= SAMPLES/3; //bits - voltageMean /= SAMPLES/3; // bits - vcoreMean /= SAMPLES/3; // bits - //currentMean *= refVolt/Nmax; //value in Volts - //voltageMean *= refVolt/Nmax; //value in Volts - - //currentMean = (currentMean*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //voltageMean *= 2; // multiply by 2 to get total battery voltage - - atomic printf("%d,%lu,%lu,%lu,%lu,%lu,%lu,%lu,%lu\n", Number, ActFreq, timeStart, timeEnd, currentMean, voltageMean, vcoreMean, adcStartTime, adcEndTime); - } - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - event void Boot.booted() { - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - //request the adc - call AdcResource.request(); - - } - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - uint32_t maxTime = 9000; - while(e != SUCCESS){ - e = configureAdc(); - } - atomic TA1R = 0; //reset timer A - call Timer0.startOneShot(maxTime); - printf("Fib Iteration Num,ActualFrequency(Hz),Fib-startTime(ms),Fib-endTime(ms),currentMean(12bit),supplyMean(12bit),vcoreMean(12bit),adcStartTime(ms),adcEndTime(ms),app startTime(ms): %lu\n", call Timer0.gett0()); - post sweep(); - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t startTime, uint32_t endTime, error_t status){ - timeStart = startTime; - timeEnd = endTime; - atomic fibDone = TRUE; - /*if(status ==SUCCESS) - printf("tasks.fibDone; %lu\n", endTime-startTime); - else - printf("fib fail..\n");*/ - } - - event void Tasks.FibonacciIterationDone(){ } - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - //printf("data ready: post\n"); - adcEndTime=call Timer2.getNow(); - //adcEndTime=call Timer0.getdt(); - call Timer2.stop(); - - if(fibDone){ - post printadb(); - post sweep(); - } - else - post delaySweep(); - } - - event void Timer0.fired() { - //printf("Timer0 fired! end time of program not valid! \n"); - } - event void Timer1.fired() { - bool ready; - //printf("Timer1 Fired. Repost Sweep!\n"); - atomic ready = fibDone; - if(ready){ - post printadb(); - post sweep(); - } - else - call Timer1.startOneShot(SWEEP_REPOST_DELAY); - } - event void Timer2.fired() { - //printf("Timer2 fired! AdcConvertion endTime not valid!\n"); - } - //functions - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - float f = toBePrinted; - - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%ld.%d%d%d", fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - e = call adc.configure(&adcconfig, adcchannelconfig, 2, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/Makefile deleted file mode 100644 index 1e65e3cde8..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/3Channels/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSnoRadioC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc deleted file mode 100644 index c1a27ad206..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioC.nc +++ /dev/null @@ -1,32 +0,0 @@ - -#include - -configuration DVSnoRadioC { -} -implementation { - components MainC; - components LedsC; - components DVSnoRadioP as App; - components SerialPrintfC; - - App.Boot -> MainC; - App.Leds -> LedsC; - - //For tasks (fibonacci) - components TasksC; - App.Tasks -> TasksC; - - //For ADC - components new Msp430Adc12ClientAutoRVGC() as adc; - App.adc -> adc; - App.AdcResource -> adc; - adc.AdcConfigure -> App.AdcConfigure; - - //For frequency control - components Msp430FreqControlC; - App.FreqControl -> Msp430FreqControlC; - - //For UART - //components PlatformSerialC; - //App.UartStream -> PlatformSerialC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc deleted file mode 100644 index 13bea3ef2f..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/DVSnoRadioP.nc +++ /dev/null @@ -1,237 +0,0 @@ -#include -#include "Msp430Adc12.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define ADC_SAMPLE_TIME 10 //miliseconds -#define ITERATIONS 900 -#define DEADLINE 5000 -#define SAMPLES 16 - -module DVSnoRadioP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Tasks; - uses interface FreqControl; - uses interface Msp430Adc12Overflow as overflow; - uses interface Msp430Adc12SingleChannel as adc; - uses interface Resource as AdcResource; -} -implementation { - - uint16_t adb[SAMPLES]; - //uint8_t count = 0; - uint32_t Freq = 1000000; - uint32_t ActFreq = 0; - uint32_t EndFreq = 25000000; - uint32_t Step = 500000; - uint32_t Time = 0; - uint16_t Number = 0; - bool AdcDone = FALSE; - bool flag = 1; - -//prototypes - void printadb(); - void printfFloat(float toBePrinted); - void showerror(); - error_t configureAdc(); - void frequency_sweep(); - - msp430adc12_channel_config_t adcconfig = { - - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ADC12OSC, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_16_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_ACLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - event void Boot.booted() { - //printf("Booted\n"); - call Leds.led0Off(); - call Leds.led1Off(); - call Leds.led2Off(); - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - //request the adc - call AdcResource.request(); - - } - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureAdc(); - } - /* - * Adc is configured, now init the system - */ - printf("Number#,Frequency(Hz),Time(ms),Vin(V),I(mA)\n"); - if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) - printf("Could not change the frequency to: %lu Hz. \r\n", Freq); - else - atomic ActFreq = Freq; - - call adc.getData(); - //printf("Conversion didn't start!\n"); - - uwait(1024*5); - atomic if(AdcDone){ - printadb(); - AdcDone=FALSE; - } - call Tasks.getFibonacci(ITERATIONS, DEADLINE); - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - printf("Task done in %lu ms\n",elapsedTime); - atomic Time = elapsedTime; - if(flag){ - flag=0; - Freq=EndFreq; - if(call FreqControl.setMCLKFreq(Freq) != SUCCESS) - printf("Could not change the frequency to: %lu Hz. \r\n", Freq); - else{ - //printf("MCLK frequency is now %lu Hz. \r\n\n", Freq); - atomic ActFreq = Freq; - atomic Number++; // increment the number of sequences calculated - } - call adc.getData(); - - call Tasks.getFibonacci(ITERATIONS+100, DEADLINE); - atomic if(AdcDone){ - printadb(); - AdcDone = FALSE; - } - } - - if(Freq==EndFreq){ - call Leds.led2On(); - return; - } - } - - event void Tasks.FibonacciIterationDone(){ - } - - async event void overflow.conversionTimeOverflow(){ } - - async event void overflow.memOverflow(){ } - - async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ - AdcDone = TRUE; - return buffer; - } - - async event error_t adc.singleDataReady(uint16_t data){ - return FAIL; - } - -//functions - void printadb(){ - uint8_t i; - float mean = 0; - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Vout = 0; - float Current = 0; - //float Vsense = 0; - float Rsense = 1.01; - - for(i = 0; i < SAMPLES; i++){ - mean += (float) adb[i]; - //printf("Sample %d =", i); - //printfFloat((float) adb[i]); - //printf("\n"); - //printf("Vout ="); - //Vout = adb[i]*refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //printfFloat(Vout); - //printf(" V\n"); - } - mean = mean/SAMPLES; - //printf("Sample mean ="); - //printfFloat(mean); - //printf("\n"); - - //printf("Vout mean (into ADC) ="); - Vout = mean*refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //printfFloat(Vout); - //printf(" V\n"); - - //Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV - // printf("Vsense ="); - // printfFloat(Vsense); - // printf(" mV\n"); - - //Current = Vsense/Rsense; //current in mA, Rsense = 1.01 Ohm - //printf("Current ="); - //printfFloat(Current); - //printf(" mA\n"); - - Current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - printf("%d,%lu,%lu,", Number, ActFreq, Time); - printfFloat(Vout); - printf(","); - printfFloat(Current); - //printf(" mA\n"); - //printf("\n"); - printf("\n"); - } - - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - //e = call adc.configureMultipleRepeat(&adcconfig, adb, SAMPLES, 0); - e = call adc.configureMultiple(&adcconfig, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/Makefile b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/Makefile deleted file mode 100644 index 1e65e3cde8..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -COMPONENT=DVSnoRadioC -include $(MAKERULES) diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h deleted file mode 100644 index 381b58face..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/FibonacciTest/messagetypes.h +++ /dev/null @@ -1,11 +0,0 @@ - -typedef struct uartMessage{ - uint32_t freq; //actual frequency - uint32_t time; //time elapsed - uint16_t iter; //iteration number - uint16_t num; //number of the fib sequence - float current; //current being consumed - float voltage; //battery voltage - bool lock; -} uartMessage; - diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/ConfigureAdc.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/ConfigureAdc.nc deleted file mode 100644 index 28f536c255..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/ConfigureAdc.nc +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2011 João Gonçalves - * All rights reserved. - * - * This open source code was developed with funding from People Power Company - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -#include "Msp430Adc12.h" - -interface Msp430UsciConfigure { - /** - * Return a pointer to the configuration that should be used for the ADC - */ - async command const msp430adc12_channel_config_t* getConfiguration (); - - async command const adc12memctl_t* getAdditionalChannels (); -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc deleted file mode 100644 index f5eb9ae5a8..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/DVSnoRadioP2.nc +++ /dev/null @@ -1,238 +0,0 @@ -#include -#include "Msp430Adc12.h" -#include "messagetypes.h" - -#ifdef ADC12_TIMERA_ENABLED -#undef ADC12_TIMERA_ENABLED -#endif - -#define ITERATIONS 900 -#define DEADLINE 5000 // 5sec -#define SAMPLES 16 -#define START_FREQUENCY 1000000 // 1MHz -#define STOP_FREQUENCY 25000000 // 25MHz -#define STEP_FREQUENCY 500000 // 500kHz - -module DVSnoRadioP { - provides interface AdcConfigure as AdcConfigure; - uses interface Boot; - uses interface Leds; - uses interface Tasks; - uses interface FreqControl; - uses interface Msp430Adc12MultiChannel as adc; - uses interface Resource as AdcResource; - uses interface UartStream; -} -implementation { - - uint16_t adb[SAMPLES]; - uint32_t actualFreq = START_FREQUENCY; - - uartMessage message = { - freq: START_FREQUENCY, - time: 0, - iter: 0, - num: 0, - current: 0, - voltage: 0, - lock: FALSE - }; - -//prototypes - void printfFloat(float toBePrinted); - void showerror(); - error_t configureAdc(); - error_t readAdc(); - void uwait(uint32_t u); - - msp430adc12_channel_config_t adcconfig = { - inch: INPUT_CHANNEL_A1, - sref: REFERENCE_VREFplus_AVss, - ref2_5v: REFVOLT_LEVEL_2_5, - adc12ssel: SHT_SOURCE_ACLK, - adc12div: SHT_CLOCK_DIV_1, - sht: SAMPLE_HOLD_4_CYCLES, - sampcon_ssel: SAMPCON_SOURCE_SMCLK, - sampcon_id: SAMPCON_CLOCK_DIV_1 - }; - - adc12memctl_t channelconfig = { - inch: INPUT_CHANNEL_A2, - sref: REFVOLT_LEVEL_2_5, - eos: 1 - }; - - async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ - return &adcconfig; // must not be changed - } - - task void sendMessage(){ - float Gain = 37.5; //(Gm*Rout) - float refVolt = 2.5; - float Nmax = 4095; - float Vout = 0; - float Rsense = 1.01; - - atomic{ - Vout = message.current * refVolt/Nmax; - //Vout = ((float)((uint8_t)(Vout*100)))/100; - //Vsense = (Vout*1000)/Gain; //multiply by 1000 to get value in mV - - message.current = (Vout*1000)/(Gain*Rsense); //current in mA, Rsense = 1.01 Ohm - //printf("%d,%lu,%lu,", Number, ActFreq, Time); - message.voltage *= (refVolt*2)/Nmax; //multiply by 2 to get the real batery value - - printf("%lu,%lu,%d,%d,", message.freq, message.time, message.iter, message.num); - printfFloat(message.current); - printf(","); - printfFloat(message.voltage); - printf("\n"); - message.lock=FALSE; - } - } - - event void Boot.booted() { - printf("Booted\n"); - // P1DIR |= 0x40; // P1.6 to output direction - // P2DIR |= 0x01; // P2.0 to output direction - // P1SEL |= 0x40; // P1.6 Output SMCLK - // P2SEL |= 0x01; // 2.0 Output MCLK - //request the adc - call AdcResource.request(); - } - - event void AdcResource.granted(){ - error_t e = FAIL; - while(e != SUCCESS){ - e = configureAdc(); - } - /* - * Set start frequency - */ - if(call FreqControl.setMCLKFreq(START_FREQUENCY) != SUCCESS){ - printf("error: set start frequency\n"); - showerror(); - return; - } - /* - * Read first data - */ - readAdc(); - - //Start the First Fibonacci running at START_FREQUENCY - if(call Tasks.getFibonacci(ITERATIONS,DEADLINE) != SUCCESS){ - printf("error: first fib\n"); - showerror(); - return; - } - } - - event void Tasks.FibonacciDone(uint16_t iterations, uint32_t elapsedTime, error_t status){ - bool lock; - printf("fib done: elapsed %lu\n", elapsedTime); - if(status!=SUCCESS){ - printf("error: did not finish fib\nelapsed %lu\n", elapsedTime); - showerror(); - return; - } - printf("wait adc 1\n"); - while(lock){ atomic lock = message.lock; } //wait for any adc convertion to finish - - atomic message.time = elapsedTime; - readAdc(); - - if(actualFreq==STOP_FREQUENCY){ - /* - * Finished, light green led - */ - call Leds.led2On(); - return; - } - if(START_FREQUENCY < STOP_FREQUENCY) - actualFreq += STEP_FREQUENCY; - else - actualFreq -= STEP_FREQUENCY; - - printf("wait adc 2\n"); - while(lock){ atomic lock = message.lock; } //wait for any adc convertion to finish - atomic message.num++; - atomic message.freq = actualFreq; - - if(call FreqControl.setMCLKFreq(actualFreq) != SUCCESS){ - showerror(); - atomic printf("error: in fibDone %d\n", message.num); - return; - } - - if(call Tasks.getFibonacci(ITERATIONS,DEADLINE) != SUCCESS){ - showerror(); - return; - } - - } - - event void Tasks.FibonacciIterationDone(uint16_t iter){ } - - async event void adc.dataReady(uint16_t *buffer, uint16_t numSamples){ - uint8_t i; - uint32_t current, voltage; - for(i = 0; i<(numSamples/2); i++){ - current += buffer[i]; - voltage += buffer[i+1]; - } - message.current = (float) current/(numSamples/2); - message.voltage = (float) voltage/(numSamples/2); - post sendMessage(); - } - - async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t err){ } - async event void UartStream.receivedByte (uint8_t byte) { } - async event void UartStream.receiveDone (uint8_t* buf, uint16_t len, error_t err) { } - -//functions - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - void showerror(){ - call Leds.led0On(); - } - - error_t configureAdc(){ - error_t e; - e = call adc.configure(&adcconfig, &channelconfig, 1, adb, SAMPLES, 0); - if(e != SUCCESS){ - showerror(); - printf("error %d\n", e); - } - return e; - } - - error_t readAdc(){ - atomic message.lock=TRUE; - return call adc.getData(); - } - - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } -} diff --git a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/messagetypes.h b/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/messagetypes.h deleted file mode 100644 index 381b58face..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/DVSTest/noRadio/old/messagetypes.h +++ /dev/null @@ -1,11 +0,0 @@ - -typedef struct uartMessage{ - uint32_t freq; //actual frequency - uint32_t time; //time elapsed - uint16_t iter; //iteration number - uint16_t num; //number of the fib sequence - float current; //current being consumed - float voltage; //battery voltage - bool lock; -} uartMessage; - diff --git a/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientC.nc b/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientC.nc deleted file mode 100644 index 3302da1492..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientC.nc +++ /dev/null @@ -1,12 +0,0 @@ - -configuration ClientC{ - -} - -implementation -{ - components new SettingsC(); - components ClientP; - - ClientP.FlashSettings -> SettingsC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientP.nc b/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientP.nc deleted file mode 100644 index 839aa93791..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/FlashTest/ClientP.nc +++ /dev/null @@ -1,50 +0,0 @@ -#include - -module ClientP @safe(){ - uses interface Settings as FlashSettings; -} - -implementation -{ - uint8_t data[] = {9,33,3,2,5,6,9,25}; - - event void FlashSettings.requestLogin(){ - error_t status; - uint8_t i; - - printf("Second Client: "); - printf("Request login.\n"); - - status = call FlashSettings.login((void*) data, sizeof(data)*sizeof(uint8_t)); - switch (status){ - case EINVAL:{ - printf("Second Client Request Login -> EINVAL.\n"); - break; - } - case SUCCESS:{ - /*printf("Second Client storing to flash: "); - for(i=0; i MainC.Boot; - FlashTestP.Leds -> LedsC; - - components new SettingsC(); - FlashTestP.Settings -> SettingsC; - - components SettingsP; - FlashTestP.Init -> SettingsP; - - components Msp430FlashC; - FlashTestP.Msp430Flash -> Msp430FlashC.Msp430Flash; - - components ClientC; - } diff --git a/tos/platforms/MoteISTx5/tests/tests/FlashTest/FlashTestP.nc b/tos/platforms/MoteISTx5/tests/tests/FlashTest/FlashTestP.nc deleted file mode 100644 index 75fe3e61e7..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/FlashTest/FlashTestP.nc +++ /dev/null @@ -1,86 +0,0 @@ - -/** - * - **/ - -#include "Timer.h" -#include - -module FlashTestP @safe() -{ - //uses interface Timer as Timer0; - uses interface Leds; - uses interface Boot; - uses interface Settings; - uses interface Init; - uses interface Msp430Flash; - } -implementation -{ - - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - //prototypes - void test(void); - - uint8_t data[] = {9,33,3,2,5,6,9,25}; - event void Boot.booted(){ - printf("Booted.\n"); - - if(call Msp430Flash.isFirstBoot() == TRUE); - printf("It's First boot\n"); - - call Init.init(); // this is the first client - //if(call Client.FlashTestClient() == SUCCESS) // this is the second client - // printf("First Client: Second Client as called init"); - - } - - event void Settings.requestLogin(){ - error_t status; - uint8_t i; - - printf("First Client: "); - printf("Request login.\n"); - - status = call Settings.login((void*) data, sizeof(data)*sizeof(uint8_t)); - switch (status){ - case EINVAL:{ - printf("This is the first boot, nothing in flash memory.\n"); - - printf("Storing "); - for(i=0; i - **/ - -configuration ClockTestAppC{ -} -implementation -{ - - components MainC, ClockTestP, LedsC; - //components new TimerMilliC() as Timer0; - components SerialPrintfC; - //components PlatformSerialC; - //ClockTestP.UartByte -> PlatformSerialC; - - components Msp430FreqControlC; - ClockTestP.FreqControl -> Msp430FreqControlC; - - ClockTestP -> MainC.Boot; - //ClockTestP.Timer0 -> Timer0; - ClockTestP.Leds -> LedsC; -} - diff --git a/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/ClockTestP.nc b/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/ClockTestP.nc deleted file mode 100644 index 51630f88e4..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/ClockTestP.nc +++ /dev/null @@ -1,69 +0,0 @@ - -/** - * Output MCLK and SMCLK on Boot. - * Toggle One Led to know the OS is alive - **/ - -#include "Timer.h" -#include -#include "../../../../chips/msp430/x5xxx/usci/msp430usci.h" - - -module ClockTestP @safe() -{ - //uses interface Timer as Timer0; - uses interface Leds; - uses interface Boot; - uses interface FreqControl; - - //uses interface UartByte; - } -implementation -{ - uint32_t wait = 7536640; - - void uwait(uint32_t u) { - uint32_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - void frequency_swype(uint32_t start_freq, uint32_t end_freq, uint32_t step){ - while(start_freq <= end_freq){ - printf("Setting MCLK frequency to %lu Hz.\n", start_freq); - if(call FreqControl.setMCLKFreq(start_freq) == FAIL ) - printf("Could not change the frequency to: %lu Hz. \r\n", start_freq); - else - printf("MCLK frequency is now %lu Hz. \r\n\n", start_freq); - start_freq = start_freq + step; - uwait(wait*5); - } - } - - event void Boot.booted(){ - uint32_t start_freq = 500000; - uint32_t end_freq = 25000000; - uint32_t step = 500000; - uint8_t source; - uint32_t freq; - - P1DIR |= 0x40; // P1.6 to output direction - P2DIR |= 0x01; // P2.0 to output direction - P1SEL |= 0x40; // P1.6 Output SMCLK - P2SEL |= 0x01; // 2.0 Output MCLK - - printf("#\n\n|************* Starting frequency swype *************|\n\n"); - - if(call FreqControl.getMCLKSource() != SELM__DCOCLKDIV){ - printf("#MCLK is not sourced by DCOCLKDIV.\n\n"); - return; - } - printf("#MCLK is sourced by DCOCLKDIV.\n\n"); - //printf("#VCore will be ajusted to the frequency of MCLK.\n"); - printf("#Start swype at %lu Hz and end at %lu Hz. Use %lu Hz of step.\n", start_freq, end_freq, step); - - frequency_swype(start_freq, end_freq, step); - printf("#\n\n|************* Frequency swype finished *************|\n\n"); - - } -} - diff --git a/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/Makefile b/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/Makefile deleted file mode 100644 index 5c7e922b29..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/FrequencyTest/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=ClockTestAppC -include $(MAKERULES) - diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadio.h b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadio.h deleted file mode 100644 index e0cdf181ac..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadio.h +++ /dev/null @@ -1,22 +0,0 @@ -// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ - -#ifndef BLINKTORADIO_H -#define BLINKTORADIO_H - -#ifdef TOS_NODE_ID -#undef TOS_NODE_ID -#define TOS_NODE_ID 1 -#endif - -enum { - AM_BLINKTORADIO = 6, - TIMER_PERIOD_MILLI = 1500 -}; - -typedef nx_struct BlinkToRadioMsg { - nx_uint16_t nodeid; - nx_uint16_t counter; - nx_uint16_t teste; -} BlinkToRadioMsg; - -#endif diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc deleted file mode 100644 index fc7ea5dd8a..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioAppC.nc +++ /dev/null @@ -1,72 +0,0 @@ -// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ - -/* - * Copyright (c) 2000-2006 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the University of California nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Application file for the BlinkToRadio application. A counter is - * incremented and a radio message is sent whenever a timer fires. - * Whenever a radio message is received, the three least significant - * bits of the counter in the message payload are displayed on the - * LEDs. Program two motes with this application. As long as they - * are both within range of each other, the LEDs on both will keep - * changing. If the LEDs on one (or both) of the nodes stops changing - * and hold steady, then that node is no longer receiving any messages - * from the other node. - * - * @author Prabal Dutta - * @date Feb 1, 2006 - */ -#include -#include "BlinkToRadio.h" - -configuration BlinkToRadioAppC { -} -implementation { - components MainC; - components LedsC; - components BlinkToRadioC as App; - components new TimerMilliC() as Timer0; - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - components SerialPrinfC; - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc deleted file mode 100644 index c57a7d9144..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/BlinkToRadioC.nc +++ /dev/null @@ -1,134 +0,0 @@ -// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ - -/* - * Copyright (c) 2000-2006 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the University of California nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Implementation of the BlinkToRadio application. A counter is - * incremented and a radio message is sent whenever a timer fires. - * Whenever a radio message is received, the three least significant - * bits of the counter in the message payload are displayed on the - * LEDs. Program two motes with this application. As long as they - * are both within range of each other, the LEDs on both will keep - * changing. If the LEDs on one (or both) of the nodes stops changing - * and hold steady, then that node is no longer receiving any messages - * from the other node. - * - * @author Prabal Dutta - * @date Feb 1, 2006 - */ -#include -#include "BlinkToRadio.h" - -module BlinkToRadioC { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - uint16_t counter; - message_t pkt; - bool busy = FALSE; - - void setLeds(uint16_t val) { - if (val & 0x01) - call Leds.led0On(); - else - call Leds.led0Off(); - if (val & 0x02) - call Leds.led1On(); - else - call Leds.led1Off(); - if (val & 0x04) - call Leds.led2On(); - else - call Leds.led2Off(); - } - - event void Boot.booted() { - call AMControl.start(); - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call Timer0.startPeriodic(TIMER_PERIOD_MILLI); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - } - - event void Timer0.fired() { - counter++; - if (!busy) { - BlinkToRadioMsg* btrpkt = - (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); - if (btrpkt == NULL) { - return; - } - btrpkt->nodeid = TOS_NODE_ID; - btrpkt->counter = counter; - btrpkt->teste = 23; - if (call AMSend.send(AM_BROADCAST_ADDR, - &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { - busy = TRUE; - printf("Sent a packt\n"); - } - } - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) { - busy = FALSE; - } - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - - if (len == sizeof(BlinkToRadioMsg)) { - BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; - setLeds(btrpkt->counter); - printf("Received \nnodeid: %d\ncounter:%d\ntest:%d\n", btrpkt->nodeid, btrpkt->counter, btrpkt->test); - } - return msg; - } -} diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/Makefile b/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/Makefile deleted file mode 100644 index b713521214..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/RadioTest/MoteISTx5/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=BlinkToRadioAppC -include $(MAKERULES) - diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadio.h b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadio.h deleted file mode 100644 index a81d7be699..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadio.h +++ /dev/null @@ -1,22 +0,0 @@ -// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ - -#ifndef BLINKTORADIO_H -#define BLINKTORADIO_H - -#ifdef TOS_NODE_ID -#undef TOS_NODE_ID -#define TOS_NODE_ID 1 -#endif - -enum { - AM_BLINKTORADIO = 6, - TIMER_PERIOD_MILLI = 2000 -}; - -typedef nx_struct BlinkToRadioMsg { - nx_uint16_t nodeid; - nx_uint16_t counter; - nx_uint16_t teste; -} BlinkToRadioMsg; - -#endif diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioAppC.nc b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioAppC.nc deleted file mode 100644 index cfc8a87442..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioAppC.nc +++ /dev/null @@ -1,72 +0,0 @@ -// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ - -/* - * Copyright (c) 2000-2006 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the University of California nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Application file for the BlinkToRadio application. A counter is - * incremented and a radio message is sent whenever a timer fires. - * Whenever a radio message is received, the three least significant - * bits of the counter in the message payload are displayed on the - * LEDs. Program two motes with this application. As long as they - * are both within range of each other, the LEDs on both will keep - * changing. If the LEDs on one (or both) of the nodes stops changing - * and hold steady, then that node is no longer receiving any messages - * from the other node. - * - * @author Prabal Dutta - * @date Feb 1, 2006 - */ -#include -#include "BlinkToRadio.h" - -configuration BlinkToRadioAppC { -} -implementation { - components MainC; - components LedsC; - components BlinkToRadioC as App; - components new TimerMilliC() as Timer0; - components ActiveMessageC; - components new AMSenderC(AM_BLINKTORADIO); - components new AMReceiverC(AM_BLINKTORADIO); - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - App.Packet -> AMSenderC; - App.AMPacket -> AMSenderC; - App.AMControl -> ActiveMessageC; - App.AMSend -> AMSenderC; - App.Receive -> AMReceiverC; -} diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioC.nc b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioC.nc deleted file mode 100644 index 65d7d40e4e..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/BlinkToRadioC.nc +++ /dev/null @@ -1,131 +0,0 @@ -// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ - -/* - * Copyright (c) 2000-2006 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of the University of California nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * Implementation of the BlinkToRadio application. A counter is - * incremented and a radio message is sent whenever a timer fires. - * Whenever a radio message is received, the three least significant - * bits of the counter in the message payload are displayed on the - * LEDs. Program two motes with this application. As long as they - * are both within range of each other, the LEDs on both will keep - * changing. If the LEDs on one (or both) of the nodes stops changing - * and hold steady, then that node is no longer receiving any messages - * from the other node. - * - * @author Prabal Dutta - * @date Feb 1, 2006 - */ -#include -#include "BlinkToRadio.h" - -module BlinkToRadioC { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; - uses interface Packet; - uses interface AMPacket; - uses interface AMSend; - uses interface Receive; - uses interface SplitControl as AMControl; -} -implementation { - - uint16_t counter; - message_t pkt; - bool busy = FALSE; - - void setLeds(uint16_t val) { - if (val & 0x01) - call Leds.led0On(); - else - call Leds.led0Off(); - if (val & 0x02) - call Leds.led1On(); - else - call Leds.led1Off(); - if (val & 0x04) - call Leds.led2On(); - else - call Leds.led2Off(); - } - - event void Boot.booted() { - call AMControl.start(); - } - - event void AMControl.startDone(error_t err) { - if (err == SUCCESS) { - call Timer0.startPeriodic(TIMER_PERIOD_MILLI); - } - else { - call AMControl.start(); - } - } - - event void AMControl.stopDone(error_t err) { - } - - event void Timer0.fired() { - counter++; - if (!busy) { - BlinkToRadioMsg* btrpkt = - (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); - if (btrpkt == NULL) { - return; - } - btrpkt->nodeid = TOS_NODE_ID; - btrpkt->counter = counter; - btrpkt->teste = 23; - if (call AMSend.send(AM_BROADCAST_ADDR, - &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { - busy = TRUE; - } - } - } - - event void AMSend.sendDone(message_t* msg, error_t err) { - if (&pkt == msg) { - busy = FALSE; - } - } - - event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ - if (len == sizeof(BlinkToRadioMsg)) { - BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; - setLeds(btrpkt->counter); - } - return msg; - } -} diff --git a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/Makefile b/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/Makefile deleted file mode 100644 index b713521214..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/RadioTest/micaz/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=BlinkToRadioAppC -include $(MAKERULES) - diff --git a/tos/platforms/MoteISTx5/tests/tests/TimerTest/Makefile b/tos/platforms/MoteISTx5/tests/tests/TimerTest/Makefile deleted file mode 100644 index d6c413dae3..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/TimerTest/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -COMPONENT=TimerTestC -include $(MAKERULES) - diff --git a/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestC.nc b/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestC.nc deleted file mode 100644 index b7b5f2c29f..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestC.nc +++ /dev/null @@ -1,17 +0,0 @@ - -#include - -configuration TimerTestC { -} -implementation { - components MainC; - components LedsC; - components TimerTestP as App; - components new TimerMilliC() as Timer0; - components SerialPrintfC; - - App.Boot -> MainC; - App.Leds -> LedsC; - App.Timer0 -> Timer0; - -} diff --git a/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestP.nc b/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestP.nc deleted file mode 100644 index f62bcab261..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/TimerTest/TimerTestP.nc +++ /dev/null @@ -1,39 +0,0 @@ - -#include -#include -#define DEADLINE 100 - -module TimerTestP { - uses interface Boot; - uses interface Leds; - uses interface Timer as Timer0; -} -implementation { - - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - - event void Boot.booted() { - P6SEL &= 0xFB; //ADC2 sel GIO func - P6DIR |= 0x04; //ADC2 sel output func - P6OUT &= 0xFB; //ADC output 0 - uwait(1000); - P6OUT |= 0x04; //ADC output 1 //start pulse - uwait(1000); - P6OUT &= 0xFB; //ADC output 0 - uwait(1000); - P6OUT |= 0x04; //ADC output 1 //start pulse - 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zyBBQAxau|aX9aA*(&!Q8QBde2(7qxIqpT?BquwzxW$I>GQ8#bqj&eHExrocj`HeBT z>*bY!gU}0E+IeawVyJjTxxJDO`1<}%#(a+AEN&)WQh*lBPAkfTu3IAM&ORp?OBb`I z@Qxy>s9sg+FJDv$Joi4LD2i&;q|=MZqF?HF^y*^EL9wR - **/ - -configuration PrintfAppC{ -} -implementation -{ - components MainC, PrintfP, LedsC; - components SerialPrintfC; - //components PlatformSerialC; - //ClockTestP.UartByte -> PlatformSerialC; - - PrintfP -> MainC.Boot; - PrintfP.Leds -> LedsC; -} - diff --git a/tos/platforms/MoteISTx5/tests/tests/printf-test/PrintfP.nc b/tos/platforms/MoteISTx5/tests/tests/printf-test/PrintfP.nc deleted file mode 100644 index 587114c503..0000000000 --- a/tos/platforms/MoteISTx5/tests/tests/printf-test/PrintfP.nc +++ /dev/null @@ -1,67 +0,0 @@ - -/** - * Testing types and variables in tinyos - * Use UART to prinft - **/ - -#include - -module PrintfP @safe() -{ - uses interface Leds; - uses interface Boot; - } -implementation -{ - #define MHZ 1000000 - - uint32_t frequency = 12000000; //1 MHz - float dco0_max [] = {0.2, 0.36, 0.75, 1.51, 3.2, 6.0, 10.7, 19.6}; - float dco31_min [] = {0.7, 1.47, 3.17, 6.07, 12.3, 23.7, 39.0, 60.0}; - bool rangefound = FALSE; - float ratio = 1.12; - uint8_t RSELx = 0; - - void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); - } - - void printfFloat(float toBePrinted) { - uint32_t fi, f0, f1, f2; - char c; - float f = toBePrinted; - - if (f<0){ - c = '-'; f = -f; - } else { - c = ' '; - } - - // integer portion. - fi = (uint32_t) f; - - // decimal portion...get index for up to 3 decimal places. - f = f - ((float) fi); - f0 = f*10; f0 %= 10; - f1 = f*100; f1 %= 10; - f2 = f*1000; f2 %= 10; - printf("\n\n%c%ld.%d%d%d", c, fi, (uint8_t) f0, (uint8_t) f1, (uint8_t) f2); - } - - event void Boot.booted(){ - - printf("Searching RSELx for the frequency of %d MHz.\n", (uint8_t)(frequency/MHZ)); - while(!rangefound){ - if((frequency >= (uint32_t)((dco0_max[RSELx]*ratio)*MHZ)) && (frequency < (uint32_t)((dco31_min[RSELx]/ratio)*MHZ))){ - rangefound = TRUE; - printf("RSELx found. Use RSELx = %d!\n", RSELx); - } - else{ - RSELx++; - printf("Try RSELx = %d...\n", RSELx); - } - } - } -} - diff --git a/tos/platforms/MoteISTx5/.platform b/tos/platforms/moteist5/.platform similarity index 100% rename from tos/platforms/MoteISTx5/.platform rename to tos/platforms/moteist5/.platform diff --git a/tos/platforms/MoteISTx5/ActiveMessageC.nc b/tos/platforms/moteist5/ActiveMessageC.nc similarity index 100% rename from tos/platforms/MoteISTx5/ActiveMessageC.nc rename to tos/platforms/moteist5/ActiveMessageC.nc diff --git a/tos/platforms/MoteISTx5/Ieee154MessageC.nc b/tos/platforms/moteist5/Ieee154MessageC.nc similarity index 100% rename from tos/platforms/MoteISTx5/Ieee154MessageC.nc rename to tos/platforms/moteist5/Ieee154MessageC.nc diff --git a/tos/platforms/MoteISTx5/LocalIeeeEui64C.nc b/tos/platforms/moteist5/LocalIeeeEui64C.nc similarity index 100% rename from tos/platforms/MoteISTx5/LocalIeeeEui64C.nc rename to tos/platforms/moteist5/LocalIeeeEui64C.nc diff --git a/tos/platforms/MoteISTx5/PlatformC.nc b/tos/platforms/moteist5/PlatformC.nc similarity index 100% rename from tos/platforms/MoteISTx5/PlatformC.nc rename to tos/platforms/moteist5/PlatformC.nc diff --git a/tos/platforms/MoteISTx5/PlatformP.nc b/tos/platforms/moteist5/PlatformP.nc similarity index 100% rename from tos/platforms/MoteISTx5/PlatformP.nc rename to tos/platforms/moteist5/PlatformP.nc diff --git a/tos/platforms/MoteISTx5/chips/adg715/ADG715C.nc b/tos/platforms/moteist5/chips/adg715/ADG715C.nc similarity index 100% rename from tos/platforms/MoteISTx5/chips/adg715/ADG715C.nc rename to tos/platforms/moteist5/chips/adg715/ADG715C.nc diff --git a/tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc b/tos/platforms/moteist5/chips/adg715/ADG715P.nc similarity index 100% rename from tos/platforms/MoteISTx5/chips/adg715/ADG715P.nc rename to tos/platforms/moteist5/chips/adg715/ADG715P.nc diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/moteist5/chips/cc2420/HplCC2420AlarmC.nc similarity index 100% rename from tos/platforms/MoteISTx5/chips/cc2420/HplCC2420AlarmC.nc rename to tos/platforms/moteist5/chips/cc2420/HplCC2420AlarmC.nc diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/moteist5/chips/cc2420/HplCC2420InterruptsC.nc similarity index 100% rename from tos/platforms/MoteISTx5/chips/cc2420/HplCC2420InterruptsC.nc rename to tos/platforms/moteist5/chips/cc2420/HplCC2420InterruptsC.nc diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/moteist5/chips/cc2420/HplCC2420PinsC.nc similarity index 100% rename from tos/platforms/MoteISTx5/chips/cc2420/HplCC2420PinsC.nc rename to tos/platforms/moteist5/chips/cc2420/HplCC2420PinsC.nc diff --git a/tos/platforms/MoteISTx5/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/moteist5/chips/cc2420/HplCC2420SpiC.nc similarity index 100% rename from tos/platforms/MoteISTx5/chips/cc2420/HplCC2420SpiC.nc rename to tos/platforms/moteist5/chips/cc2420/HplCC2420SpiC.nc diff --git a/tos/platforms/MoteISTx5/hardware.h b/tos/platforms/moteist5/hardware.h similarity index 100% rename from tos/platforms/MoteISTx5/hardware.h rename to tos/platforms/moteist5/hardware.h diff --git a/tos/platforms/MoteISTx5/hardware/adc/DemoSensorC.nc b/tos/platforms/moteist5/hardware/adc/DemoSensorC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/adc/DemoSensorC.nc rename to tos/platforms/moteist5/hardware/adc/DemoSensorC.nc diff --git a/tos/platforms/MoteISTx5/hardware/adc/DemoSensorNowC.nc b/tos/platforms/moteist5/hardware/adc/DemoSensorNowC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/adc/DemoSensorNowC.nc rename to tos/platforms/moteist5/hardware/adc/DemoSensorNowC.nc diff --git a/tos/platforms/MoteISTx5/hardware/adc/DemoSensorStreamC.nc b/tos/platforms/moteist5/hardware/adc/DemoSensorStreamC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/adc/DemoSensorStreamC.nc rename to tos/platforms/moteist5/hardware/adc/DemoSensorStreamC.nc diff --git a/tos/platforms/MoteISTx5/hardware/adc/PlatformAdcC.nc b/tos/platforms/moteist5/hardware/adc/PlatformAdcC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/adc/PlatformAdcC.nc rename to tos/platforms/moteist5/hardware/adc/PlatformAdcC.nc diff --git a/tos/platforms/MoteISTx5/hardware/adc/VoltageC.nc b/tos/platforms/moteist5/hardware/adc/VoltageC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/adc/VoltageC.nc rename to tos/platforms/moteist5/hardware/adc/VoltageC.nc diff --git a/tos/platforms/MoteISTx5/hardware/buttons/HplUserButtonC.nc b/tos/platforms/moteist5/hardware/buttons/HplUserButtonC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/buttons/HplUserButtonC.nc rename to tos/platforms/moteist5/hardware/buttons/HplUserButtonC.nc diff --git a/tos/platforms/MoteISTx5/hardware/buttons/SwitchToggleC.nc b/tos/platforms/moteist5/hardware/buttons/SwitchToggleC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/buttons/SwitchToggleC.nc rename to tos/platforms/moteist5/hardware/buttons/SwitchToggleC.nc diff --git a/tos/platforms/MoteISTx5/hardware/buttons/UserButton.h b/tos/platforms/moteist5/hardware/buttons/UserButton.h similarity index 100% rename from tos/platforms/MoteISTx5/hardware/buttons/UserButton.h rename to tos/platforms/moteist5/hardware/buttons/UserButton.h diff --git a/tos/platforms/MoteISTx5/hardware/buttons/UserButtonC.nc b/tos/platforms/moteist5/hardware/buttons/UserButtonC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/buttons/UserButtonC.nc rename to tos/platforms/moteist5/hardware/buttons/UserButtonC.nc diff --git a/tos/platforms/MoteISTx5/hardware/buttons/UserButtonP.nc b/tos/platforms/moteist5/hardware/buttons/UserButtonP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/buttons/UserButtonP.nc rename to tos/platforms/moteist5/hardware/buttons/UserButtonP.nc diff --git a/tos/platforms/MoteISTx5/hardware/clock/FreqControl.nc b/tos/platforms/moteist5/hardware/clock/FreqControl.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/clock/FreqControl.nc rename to tos/platforms/moteist5/hardware/clock/FreqControl.nc diff --git a/tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlC.nc b/tos/platforms/moteist5/hardware/clock/Msp430FreqControlC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlC.nc rename to tos/platforms/moteist5/hardware/clock/Msp430FreqControlC.nc diff --git a/tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlP.nc b/tos/platforms/moteist5/hardware/clock/Msp430FreqControlP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/clock/Msp430FreqControlP.nc rename to tos/platforms/moteist5/hardware/clock/Msp430FreqControlP.nc diff --git a/tos/platforms/MoteISTx5/hardware/clock/Msp430XV2ClockControlP.nc b/tos/platforms/moteist5/hardware/clock/Msp430XV2ClockControlP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/clock/Msp430XV2ClockControlP.nc rename to tos/platforms/moteist5/hardware/clock/Msp430XV2ClockControlP.nc diff --git a/tos/platforms/MoteISTx5/hardware/clock/PlatformClockC.nc b/tos/platforms/moteist5/hardware/clock/PlatformClockC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/clock/PlatformClockC.nc rename to tos/platforms/moteist5/hardware/clock/PlatformClockC.nc diff --git a/tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc b/tos/platforms/moteist5/hardware/clock/PlatformClockP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/clock/PlatformClockP.nc rename to tos/platforms/moteist5/hardware/clock/PlatformClockP.nc diff --git a/tos/platforms/MoteISTx5/hardware/clock/freq_control_const.h b/tos/platforms/moteist5/hardware/clock/freq_control_const.h similarity index 100% rename from tos/platforms/MoteISTx5/hardware/clock/freq_control_const.h rename to tos/platforms/moteist5/hardware/clock/freq_control_const.h diff --git a/tos/platforms/MoteISTx5/hardware/leds/LedsC.nc b/tos/platforms/moteist5/hardware/leds/LedsC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/leds/LedsC.nc rename to tos/platforms/moteist5/hardware/leds/LedsC.nc diff --git a/tos/platforms/MoteISTx5/hardware/leds/LedsP.nc b/tos/platforms/moteist5/hardware/leds/LedsP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/leds/LedsP.nc rename to tos/platforms/moteist5/hardware/leds/LedsP.nc diff --git a/tos/platforms/MoteISTx5/hardware/leds/PlatformLedsC.nc b/tos/platforms/moteist5/hardware/leds/PlatformLedsC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/leds/PlatformLedsC.nc rename to tos/platforms/moteist5/hardware/leds/PlatformLedsC.nc diff --git a/tos/platforms/MoteISTx5/hardware/leds/PlatformLedsP.nc b/tos/platforms/moteist5/hardware/leds/PlatformLedsP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/leds/PlatformLedsP.nc rename to tos/platforms/moteist5/hardware/leds/PlatformLedsP.nc diff --git a/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsC.nc b/tos/platforms/moteist5/hardware/pins/PlatformPinsC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/pins/PlatformPinsC.nc rename to tos/platforms/moteist5/hardware/pins/PlatformPinsC.nc diff --git a/tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc b/tos/platforms/moteist5/hardware/pins/PlatformPinsP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/pins/PlatformPinsP.nc rename to tos/platforms/moteist5/hardware/pins/PlatformPinsP.nc diff --git a/tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmC.nc b/tos/platforms/moteist5/hardware/pmm/Msp430PmmC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmC.nc rename to tos/platforms/moteist5/hardware/pmm/Msp430PmmC.nc diff --git a/tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmP.nc b/tos/platforms/moteist5/hardware/pmm/Msp430PmmP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/pmm/Msp430PmmP.nc rename to tos/platforms/moteist5/hardware/pmm/Msp430PmmP.nc diff --git a/tos/platforms/MoteISTx5/hardware/pmm/Pmm.nc b/tos/platforms/moteist5/hardware/pmm/Pmm.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/pmm/Pmm.nc rename to tos/platforms/moteist5/hardware/pmm/Pmm.nc diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformI2CC.nc b/tos/platforms/moteist5/hardware/usci/PlatformI2CC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/usci/PlatformI2CC.nc rename to tos/platforms/moteist5/hardware/usci/PlatformI2CC.nc diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformI2CP.nc b/tos/platforms/moteist5/hardware/usci/PlatformI2CP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/usci/PlatformI2CP.nc rename to tos/platforms/moteist5/hardware/usci/PlatformI2CP.nc diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSerialC.nc b/tos/platforms/moteist5/hardware/usci/PlatformSerialC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/usci/PlatformSerialC.nc rename to tos/platforms/moteist5/hardware/usci/PlatformSerialC.nc diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSerialP.nc b/tos/platforms/moteist5/hardware/usci/PlatformSerialP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/usci/PlatformSerialP.nc rename to tos/platforms/moteist5/hardware/usci/PlatformSerialP.nc diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc b/tos/platforms/moteist5/hardware/usci/PlatformSpiC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/usci/PlatformSpiC.nc rename to tos/platforms/moteist5/hardware/usci/PlatformSpiC.nc diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc b/tos/platforms/moteist5/hardware/usci/PlatformSpiP.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/usci/PlatformSpiP.nc rename to tos/platforms/moteist5/hardware/usci/PlatformSpiP.nc diff --git a/tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/moteist5/hardware/usci/PlatformUsciMapC.nc similarity index 100% rename from tos/platforms/MoteISTx5/hardware/usci/PlatformUsciMapC.nc rename to tos/platforms/moteist5/hardware/usci/PlatformUsciMapC.nc diff --git a/tos/platforms/MoteISTx5/hardware/usci/msp430usci.h b/tos/platforms/moteist5/hardware/usci/msp430usci.h similarity index 100% rename from tos/platforms/MoteISTx5/hardware/usci/msp430usci.h rename to tos/platforms/moteist5/hardware/usci/msp430usci.h diff --git a/tos/platforms/MoteISTx5/platform.h b/tos/platforms/moteist5/platform.h similarity index 100% rename from tos/platforms/MoteISTx5/platform.h rename to tos/platforms/moteist5/platform.h diff --git a/tos/platforms/MoteISTx5/platform_message.h b/tos/platforms/moteist5/platform_message.h similarity index 100% rename from tos/platforms/MoteISTx5/platform_message.h rename to tos/platforms/moteist5/platform_message.h From f10654955af24a7120dcea4b290c4ec818118277 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Wed, 20 Jun 2012 12:28:58 +0100 Subject: [PATCH 278/411] moteist5 has no buttons, removed buttons directory --- .../hardware/buttons/HplUserButtonC.nc | 55 ----------- .../hardware/buttons/SwitchToggleC.nc | 94 ------------------- .../moteist5/hardware/buttons/UserButton.h | 46 --------- .../moteist5/hardware/buttons/UserButtonC.nc | 65 ------------- .../moteist5/hardware/buttons/UserButtonP.nc | 78 --------------- 5 files changed, 338 deletions(-) delete mode 100755 tos/platforms/moteist5/hardware/buttons/HplUserButtonC.nc delete mode 100755 tos/platforms/moteist5/hardware/buttons/SwitchToggleC.nc delete mode 100755 tos/platforms/moteist5/hardware/buttons/UserButton.h delete mode 100755 tos/platforms/moteist5/hardware/buttons/UserButtonC.nc delete mode 100755 tos/platforms/moteist5/hardware/buttons/UserButtonP.nc diff --git a/tos/platforms/moteist5/hardware/buttons/HplUserButtonC.nc b/tos/platforms/moteist5/hardware/buttons/HplUserButtonC.nc deleted file mode 100755 index a9cce13afb..0000000000 --- a/tos/platforms/moteist5/hardware/buttons/HplUserButtonC.nc +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Implementation of the user button for the em430 platform - * - * @author Gilman Tolle - * @author Peter A. Bigot - */ - -configuration HplUserButtonC { - provides interface HplMsp430GeneralIO; - provides interface GpioInterrupt; -} -implementation { - components HplMsp430GeneralIOC as GeneralIOC; - components HplMsp430InterruptC as InterruptC; - - HplMsp430GeneralIO = GeneralIOC.Port17; - - components new Msp430InterruptC() as InterruptUserButtonC; - InterruptUserButtonC.HplInterrupt -> InterruptC.Port17; - GpioInterrupt = InterruptUserButtonC.Interrupt; -} diff --git a/tos/platforms/moteist5/hardware/buttons/SwitchToggleC.nc b/tos/platforms/moteist5/hardware/buttons/SwitchToggleC.nc deleted file mode 100755 index b7dfa1bce4..0000000000 --- a/tos/platforms/moteist5/hardware/buttons/SwitchToggleC.nc +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Not quite generic layer to translate a GIO into a toggle switch - * (Newer MSP430 chips require configuring pull-up resistor) - * - * @author Gilman Tolle - * @author Peter A. Bigot - */ - -#include - -generic module SwitchToggleC() { - provides interface Get; - provides interface Notify; - - uses interface HplMsp430GeneralIO; - uses interface GpioInterrupt; -} -implementation { - norace bool m_pinHigh; - - task void sendEvent(); - - command bool Get.get() { return call HplMsp430GeneralIO.get(); } - - command error_t Notify.enable() { - error_t rv; - - call HplMsp430GeneralIO.makeInput(); - call HplMsp430GeneralIO.setResistor(MSP430_PORT_RESISTOR_PULLUP); - if ( call HplMsp430GeneralIO.get() ) { - m_pinHigh = TRUE; - return call GpioInterrupt.enableFallingEdge(); - } else { - m_pinHigh = FALSE; - return call GpioInterrupt.enableRisingEdge(); - } - } - - command error_t Notify.disable() { - return call GpioInterrupt.disable(); - } - - async event void GpioInterrupt.fired() { - call GpioInterrupt.disable(); - - m_pinHigh = !m_pinHigh; - - post sendEvent(); - } - - task void sendEvent() { - bool pinHigh; - pinHigh = m_pinHigh; - signal Notify.notify( pinHigh ); - if ( pinHigh ) - call GpioInterrupt.enableFallingEdge(); - else - call GpioInterrupt.enableRisingEdge(); - } -} diff --git a/tos/platforms/moteist5/hardware/buttons/UserButton.h b/tos/platforms/moteist5/hardware/buttons/UserButton.h deleted file mode 100755 index bb0065fbdb..0000000000 --- a/tos/platforms/moteist5/hardware/buttons/UserButton.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Implementation of the user button for the telosb platform - * - * @author Gilman Tolle - */ - -#ifndef USERBUTTON_H -#define USERBUTTON_H - -typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t; - -#endif diff --git a/tos/platforms/moteist5/hardware/buttons/UserButtonC.nc b/tos/platforms/moteist5/hardware/buttons/UserButtonC.nc deleted file mode 100755 index f208b8638f..0000000000 --- a/tos/platforms/moteist5/hardware/buttons/UserButtonC.nc +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Implementation of the user button for the telosb platform. Get - * returns the current state of the button by reading the pin, - * regardless of whether enable() or disable() has been called on the - * Interface. Notify.enable() and Notify.disable() modify the - * underlying interrupt state of the pin, and have the effect of - * enabling or disabling notifications that the button has changed - * state. - * - * @author Gilman Tolle - */ - -#include - -configuration UserButtonC { - provides interface Get; - provides interface Notify; -} -implementation { - components HplUserButtonC; - components new SwitchToggleC(); - SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt; - SwitchToggleC.HplMsp430GeneralIO -> HplUserButtonC.HplMsp430GeneralIO; - - components UserButtonP; - Get = UserButtonP; - Notify = UserButtonP; - - UserButtonP.GetLower -> SwitchToggleC.Get; - UserButtonP.NotifyLower -> SwitchToggleC.Notify; -} diff --git a/tos/platforms/moteist5/hardware/buttons/UserButtonP.nc b/tos/platforms/moteist5/hardware/buttons/UserButtonP.nc deleted file mode 100755 index a25838de6f..0000000000 --- a/tos/platforms/moteist5/hardware/buttons/UserButtonP.nc +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (c) 2007 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * Implementation of the user button for the telosb platform - * - * @author Gilman Tolle - */ - -#include - -module UserButtonP { - provides interface Get; - provides interface Notify; - - uses interface Get as GetLower; - uses interface Notify as NotifyLower; -} -implementation { - - command button_state_t Get.get() { - if ( call GetLower.get() ) { - return BUTTON_PRESSED; - } else { - return BUTTON_RELEASED; - } - } - - command error_t Notify.enable() { - return call NotifyLower.enable(); - } - - command error_t Notify.disable() { - return call NotifyLower.disable(); - } - - event void NotifyLower.notify( bool val ) { - // telosb user button pin is high when released - invert state - if ( val ) { - signal Notify.notify( BUTTON_RELEASED ); - } else { - signal Notify.notify( BUTTON_PRESSED ); - } - } - - default event void Notify.notify( button_state_t val ) { } -} From a8daaaf45124abd20703e2b00a875be709b56319 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Thu, 21 Jun 2012 16:52:05 +0100 Subject: [PATCH 279/411] Fix .platform to include moteist5/chips/cc2420 --- tos/platforms/moteist5/.platform | 1 + 1 file changed, 1 insertion(+) diff --git a/tos/platforms/moteist5/.platform b/tos/platforms/moteist5/.platform index ff47780c97..9c80b7741a 100755 --- a/tos/platforms/moteist5/.platform +++ b/tos/platforms/moteist5/.platform @@ -13,6 +13,7 @@ for (split(/\n/, <<'EOText' %P/hardware/clock %P/hardware/pmm %P/chips/adg715 + %P/chips/cc2420 %P/tests/DVSTest/Tasks %P/tests/DVSTest From 2696b08adbea906724143ac4f4f744b0e25afed8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Gon=C3=A7alves?= Date: Thu, 21 Jun 2012 16:58:42 +0100 Subject: [PATCH 280/411] Added Split-phase SpiPacket.send to x5xxx/usci (also modified the equivilent file in usci-bf), same code. --- .../msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc | 81 ++++++++++++++++--- tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc | 80 +++++++++++++++--- 2 files changed, 140 insertions(+), 21 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc index dd3b08b7b8..78381bb7bc 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2011-2012 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -63,7 +63,23 @@ generic module Msp430UsciSpiP () @safe() { } } implementation { + + enum { + SPI_ATOMIC_SIZE = 2, + }; + norace uint16_t m_len; + norace uint8_t* COUNT_NOK(m_len) m_tx_buf; + norace uint8_t* COUNT_NOK(m_len) m_rx_buf; + norace uint16_t m_pos; + norace uint8_t m_client; + + void signalDone(); + + task void signalDone_task() { + atomic signalDone(); + } + /** The SPI is busy if it's actively transmitting/receiving, or if * there is an active buffered I/O operation. */ @@ -186,30 +202,75 @@ implementation { } } + void continueOp() { + uint8_t end; + uint8_t tmp; - /* - * SpiPacket.send is improperly implemented. It should be split phase. Other msp430 families - * implement it using interrupts and/or dma. - * - * For the time being, the functionality implemented originally by the x5 SpiPacket, is now - * available in SpiBlock.transfer. This routine now returns FAIL. + atomic { + call Usci.setTxbuf( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); + + end = m_pos + SPI_ATOMIC_SIZE; + if ( end > m_len ) + end = m_len; + + while ( ++m_pos < end ) { + while( !call Usci.isRxIntrPending() ); + tmp = call Usci.getRxbuf(); + if ( m_rx_buf ) + m_rx_buf[ m_pos - 1 ] = tmp; + call Usci.setTxbuf( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); + } + } + } + /** Split phase SpiPacket send + * Implemented just as in the x2 usci Msp430SpiNoDmaP */ + async command error_t SpiPacket.send[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { - return FAIL; + m_client = client; + m_tx_buf = txBuf; + m_rx_buf = rxBuf; + m_len = len; + m_pos = 0; + + if ( len ) { + call Usci.enableRxIntr(); + continueOp(); + } else + post signalDone_task(); + return SUCCESS; + } + + + void signalDone() { + signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, SUCCESS ); } - default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, - uint8_t* rxBuf, uint16_t len, error_t error ) { } async event void Interrupts.interrupted (uint8_t iv) { + uint8_t data; + if (! call ArbiterInfo.inUse()) { return; } if (USCI_UCRXIFG == iv) { + data = call Usci.getRxbuf(); + if ( m_rx_buf ) + m_rx_buf[ m_pos-1 ] = data; + if ( m_pos < m_len ) + continueOp(); + else { + call Usci.disableRxIntr(); + signalDone(); + } } else if (USCI_UCTXIFG == iv) { } } + + default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, + uint8_t* rxBuf, uint16_t len, error_t error ) { } + default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client] () { return &msp430_usci_spi_default_config; diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc index dd3b08b7b8..daf786fd85 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciSpiP.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 João Gonçalves + * Copyright (c) 2011-2012 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -63,7 +63,23 @@ generic module Msp430UsciSpiP () @safe() { } } implementation { + + enum { + SPI_ATOMIC_SIZE = 2, + }; + norace uint16_t m_len; + norace uint8_t* COUNT_NOK(m_len) m_tx_buf; + norace uint8_t* COUNT_NOK(m_len) m_rx_buf; + norace uint16_t m_pos; + norace uint8_t m_client; + + void signalDone(); + + task void signalDone_task() { + atomic signalDone(); + } + /** The SPI is busy if it's actively transmitting/receiving, or if * there is an active buffered I/O operation. */ @@ -185,30 +201,72 @@ implementation { len--; } } + + void continueOp() { + uint8_t end; + uint8_t tmp; + atomic { + call Usci.setTxbuf( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); - /* - * SpiPacket.send is improperly implemented. It should be split phase. Other msp430 families - * implement it using interrupts and/or dma. - * - * For the time being, the functionality implemented originally by the x5 SpiPacket, is now - * available in SpiBlock.transfer. This routine now returns FAIL. + end = m_pos + SPI_ATOMIC_SIZE; + if ( end > m_len ) + end = m_len; + + while ( ++m_pos < end ) { + while( !call Usci.isRxIntrPending() ); + tmp = call Usci.getRxbuf(); + if ( m_rx_buf ) + m_rx_buf[ m_pos - 1 ] = tmp; + call Usci.setTxbuf( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); + } + } + } + /** Split phase SpiPacket send + * Implemented just as in the x2 usci Msp430SpiNoDmaP */ + async command error_t SpiPacket.send[uint8_t client] (uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { - return FAIL; - } + m_client = client; + m_tx_buf = txBuf; + m_rx_buf = rxBuf; + m_len = len; + m_pos = 0; - default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, - uint8_t* rxBuf, uint16_t len, error_t error ) { } + if ( len ) { + call Usci.enableRxIntr(); + continueOp(); + } else + post signalDone_task(); + return SUCCESS; + } + + void signalDone() { + signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, SUCCESS ); + } async event void Interrupts.interrupted (uint8_t iv) { + uint8_t data; if (! call ArbiterInfo.inUse()) { return; } if (USCI_UCRXIFG == iv) { + data = call Usci.getRxbuf(); + + if ( m_rx_buf ) + m_rx_buf[ m_pos-1 ] = data; + if ( m_pos < m_len ) + continueOp(); + else { + call Usci.disableRxIntr(); + signalDone(); + } } else if (USCI_UCTXIFG == iv) { } } + + default async event void SpiPacket.sendDone[uint8_t client] (uint8_t* txBuf, + uint8_t* rxBuf, uint16_t len, error_t error ) { } default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client] () { From aaf40d8c740a7f750cc5d071ffd5b7b4d2195f6e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 28 Jun 2012 12:58:44 -0700 Subject: [PATCH 281/411] usci-bf:i2c update comments about Master Mode --- .../msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc | 39 +++++++++++++------ 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc index 1df3ad182d..2c01fe2d12 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc @@ -299,18 +299,33 @@ implementation { /* check if this is a new connection or a continuation */ if (m_flags & I2C_START) { - //sequence as described in 17.3.4.2.1 of slau144h is: - // - set sa - // - set UCTR - // - set UCTXSTT - // (start/address written, then we get an interrupt) - // no reset should be necessary for this process. however, when - // I did it in a different sequence, the first write worked OK - // but the second one began with the UCSTPIFG set, and the first - // character was dropped. I have no explanation for why this - // would be the case. - - //need to enter master mode + /* + * Original "gen 1" driver was written for the x2 and implements + * i2c as described in x2 User_Manual (slau144, rev H). + * + * x5 i2c master is described in slau208, section 34.3.4.2.1. + * + * Sequence: + * + * - set sa + * - set UCTR + * - set UCTXSTT + * + * (start/address written, then we get an interrupt), for TXIFG + * + */ + + /* + * Enter Master mode. + * + * Reset to make sure it takes properly. + * + * It would be nice if one didn't have to reset the module. When + * not doing the reset, it was observed that the first bus transaction + * worked but subsequent didn't (Saw UCSTPIFG, stop condition, and first + * byte was dropped). Adding the reset/leavereset sequence fixed this. + */ + call Usci.enterResetMode_(); call Usci.setCtl0(call Usci.getCtl0() | UCMST); call Usci.leaveResetMode_(); From dbdf5b65e620cf46107e97643eadf1ded0cab68e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 28 Jun 2012 13:01:44 -0700 Subject: [PATCH 282/411] usci-bf:i2c fix calling parameters to interrupt handlers. xxx_interrupted(getIfg) should be xxx_interrupted(iv), interrupt vector value. --- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc index 2c01fe2d12..ea9a80f374 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc @@ -495,10 +495,10 @@ implementation { STP_interrupt(); break; case USCI_I2C_UCRXIFG: - RXInterrupts_interrupted(call Usci.getIfg()); + RXInterrupts_interrupted(iv); break; case USCI_I2C_UCTXIFG: - TXInterrupts_interrupted(call Usci.getIfg()); + TXInterrupts_interrupted(iv); break; default: //error From adae4667d9046ce0b52972d002a74761f8616ee4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 28 Jun 2012 13:06:54 -0700 Subject: [PATCH 283/411] usci-bf:spi remove extraneous IE clearing, tweak comments. --- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc index 78381bb7bc..3530f3d08c 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc @@ -145,8 +145,7 @@ implementation { /* * Do basic configuration, leaving USCI in reset mode. Configure - * the SPI pins, enable the USCI, and leave interrupts off. Note - * reseting the USCI will kill the IEs so no need to do so explicitly. + * the SPI pins, enable the USCI, and leave interrupts off. */ call Usci.configure(config, TRUE); call SIMO.makeOutput(); @@ -156,9 +155,11 @@ implementation { call CLK.makeOutput(); call CLK.selectModuleFunc(); + /* + * The IE bits are cleared when the USCI is reset, so there is no need + * to clear the IE bits. + */ call Usci.leaveResetMode_(); - call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); - return SUCCESS; } @@ -199,7 +200,7 @@ implementation { if (rxBuf) *rxBuf++ = byt; len--; - } + } } void continueOp() { From 820f64f51b899d023b9d489be0e6d30cdaee41cf Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 28 Jun 2012 13:08:23 -0700 Subject: [PATCH 284/411] usci-bf: update comments about setting for 1MiHz (should be platform specific) --- tos/chips/msp430/x5xxx/usci-bf/msp430usci.h | 24 +++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h index 482dde05ab..22317480c0 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h @@ -60,6 +60,16 @@ typedef struct msp430_usci_config_t { /* * The following default configurations assume SMCLK clock is 1MiHz (2^20Hz). + * + * WARNING: This is not necessarily a good assumption. Choice of clocks is + * really a platform thing and should be provided in some fashion by the platform. + * + * The common definition here is a carry over from the old initial way that T2 dealt + * with this issue. + * + * In addition, there are issues with assuming binary vs. decimal clocks. For example + * the msp430f5438a with out tweak the PMM wants to be clocked no faster than 8,000,000 + * (8 MHz). */ msp430_usci_config_t msp430_usci_uart_default_config = { @@ -105,7 +115,7 @@ msp430_usci_config_t msp430_usci_spi_default_config = { /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ ctl0 : UCCKPL | UCMSB | UCMST | UCSYNC, ctl1 : UCSSEL__SMCLK, - br0 : 2, /* 2x Prescale */ + br0 : 2, /* 2x Prescale, 1*2^19 (512 KiHz) */ br1 : 0, mctl : 0, i2coa: 0 @@ -114,13 +124,19 @@ msp430_usci_config_t msp430_usci_spi_default_config = { // Should the default be the following? MM (multi-master) seems // like it should be a platform specific thing. // ctl0 : (UCMST | UCMODE_3 | UCSYNC), +// +// clock divisor is definitely a platform specific thing. The +// default should probably be SMCLK/div ~= 100kbps. + msp430_usci_config_t msp430_usci_i2c_default_config = { - /* 7 bit addressing single I2C master driven by SMCLK */ + /* 7 bit addressing, multi-master, driven by SMCLK + * note: UCMST must be set each time + */ ctl0 : UCSYNC | UCMODE_3 | UCMM, ctl1 : UCSSEL__SMCLK, - br0 : 10, /* 104857 hz, slow for slow devices. */ - br1 : 0, + br0 : 10, /* SMCLK/div */ + br1 : 0, /* 1*2^20/div -> 104,858 Hz */ mctl : 0, i2coa: 0x41, }; From ef2c52befc79fb2bf01737b86400306ce0dd6c08 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 29 Jun 2012 03:21:18 -0700 Subject: [PATCH 285/411] msp430: usci-bf, i2c: split multi-master, create single master drivers - split out jhu multi-master into usci-bf/i2c-mm - create optimized single master i2c driver in usci-bf/i2c-sm - tweak msp430usci.h header to handle changing default i2c config --- .../usci-bf/{ => i2c-mm}/Msp430UsciI2CP.nc | 5 +- .../x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc | 452 ++++++++++++++++++ tos/chips/msp430/x5xxx/usci-bf/msp430usci.h | 37 +- 3 files changed, 482 insertions(+), 12 deletions(-) rename tos/chips/msp430/x5xxx/usci-bf/{ => i2c-mm}/Msp430UsciI2CP.nc (99%) create mode 100644 tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc similarity index 99% rename from tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc rename to tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc index ea9a80f374..5853c03402 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc @@ -5,6 +5,8 @@ * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * + * Multi-Master driver. + * * This open source code was developed with funding from People Power Company * * Redistribution and use in source and binary forms, with or without @@ -38,7 +40,7 @@ * * * Implement the I2C-related interfaces for a MSP430 USCI module - * instance. + * instance. Multi-Master driver. * * port of usci gen 1 (john hopkins) implementation of i2c * @@ -474,7 +476,6 @@ implementation { void TXInterrupts_interrupted(uint8_t iv); void RXInterrupts_interrupted(uint8_t iv); - void StateInterrupts_interrupted(uint8_t iv); void NACK_interrupt(); void AL_interrupt(); void STP_interrupt(); diff --git a/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc new file mode 100644 index 0000000000..f26e8e4f7d --- /dev/null +++ b/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc @@ -0,0 +1,452 @@ +/* + * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2011 John Hopkins University + * Copyright (c) 2011 Redslate Ltd. + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Single Master driver. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * Implement the I2C-related interfaces for a MSP430 USCI module + * instance. Single Master. + * + * Started with the John Hopkins Multi-Master i2c driver and then + * optimized for Single Master. + * + * @author Eric B. Decker + * @author Doug Carlson + * @author Marcus Chang + * @author Peter A. Bigot + * @author Derek Baker + */ + +#include +#include "msp430usci.h" +#include + +generic module Msp430UsciI2CP () @safe() { + provides { + interface I2CPacket as I2CBasicAddr[uint8_t client]; + interface I2CSlave[uint8_t client]; + interface ResourceConfigure[uint8_t client]; + interface Msp430UsciError[uint8_t client]; + } + uses { + interface HplMsp430Usci as Usci; + interface HplMsp430UsciInterrupts as Interrupts; + interface HplMsp430GeneralIO as SDA; + interface HplMsp430GeneralIO as SCL; + interface Msp430UsciConfigure[uint8_t client]; + interface ArbiterInfo; + interface LocalTime as LocalTime_bms; + } +} + +implementation { + enum{ + SLAVE = 0, + MASTER_READ = 1, + MASTER_WRITE = 2, + }; + + norace uint8_t* m_buf; + norace uint8_t m_len; + norace uint8_t m_pos; + norace uint8_t m_action; + norace i2c_flags_t m_flags; + + void nextRead(); + void nextWrite(); + void signalDone( error_t error ); + + error_t configure_(const msp430_usci_config_t* config){ + if(! config){ + return FAIL; + } + call Usci.configure(config, TRUE); + call SCL.selectModuleFunc(); + call SDA.selectModuleFunc(); + call Usci.leaveResetMode_(); + return SUCCESS; + } + + + /* + * We assume that SCL/SDA are initially set up as input so when + * we deselect the pins from the module, the pins go back to inputs. + * The module is kept in reset. This configuration should be + * reasonable for lowish power. + */ + error_t unconfigure_(){ + call Usci.enterResetMode_(); + call SCL.selectIOFunc(); + call SDA.selectIOFunc(); + return SUCCESS; + } + + async command void ResourceConfigure.configure[ uint8_t client ]() { + configure_(call Msp430UsciConfigure.getConfiguration[client]()); + } + + async command void ResourceConfigure.unconfigure[ uint8_t client ]() { + unconfigure_(); + } + + /*************************************************************************/ + + async command error_t I2CBasicAddr.read[uint8_t client]( i2c_flags_t flags, + uint16_t addr, uint8_t len, + uint8_t* buf ) { + + //According to TI, we can just poll until the start condition + //clears. But we're nervous and want to bail out if it doesn't + //clear fast enough. This is how many times we loop before we + //bail out. + + uint16_t counter = I2C_ONE_BYTE_READ_COUNTER; + + m_buf = buf; + m_len = len; + m_flags = flags; + m_pos = 0; + m_action = MASTER_READ; + + /* check if this is a new connection or a continuation */ + if (m_flags & I2C_START) { + call Usci.setI2Csa(addr); + + //check bus status at the latest point possible. + if ( call Usci.getStat() & UCBBUSY ) { + /* + * If the bus is busy, that is real weird. We are single + * master. Just signal a timeout. Later. FIXME. + */ + return EBUSY; + } + + // clear TR bit (receiving), set start condition + call Usci.setCtl1((call Usci.getCtl1() & ~UCTR) | UCTXSTT); + + // enable nack and rx interrupts only + call Usci.setIe(UCNACKIE | UCRXIE); + + /* + * if only reading 1 byte, STOP bit must be set right after + * START condition is triggered + */ + if ( (m_len == 1) && (m_flags & I2C_STOP) ) { + //this logic seems to work fine + /* wait until START bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ + counter--; + } + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + } else if (m_flags & I2C_RESTART) { + /* set slave address */ + call Usci.setI2Csa(addr); + + /* + * clear TR (receive), generate START + */ + call Usci.setCtl1((call Usci.getCtl1() & ~UCTR) | UCTXSTT); + + // enable nack and rx only + call Usci.setIe(UCNACKIE | UCRXIE); + + /* if only reading 1 byte, STOP bit must be set right after START bit */ + if ( (m_len == 1) && (m_flags & I2C_STOP) ) { + /* wait until START bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ + counter--; + } + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + } else { + //TODO: test + nextRead(); + } + if (counter > 1) + return SUCCESS; + + return FAIL; + } + + void nextRead() { + uint16_t counter = 0xFFFF; + + if ((m_pos == (m_len - 2)) && m_len > 1) { + //we want to send NACK + STOP in response to the last byte. + //if m_pos == m_len-2 and we get the RX interrupt, that means + // that the slave has already written the next-to-last byte + // and we have acknowledged it--BUT we have not yet read it. + //By setting the stop condition here, we say "send STOP after + //the next byte," which will actually be the last byte. + // + //it is more intuitive to say "read the next-to-last byte and + //set the STOP condition real quick before the last byte gets + //sent so that we can NACK+STOP it". Maybe this would work if + //you slowed down the I2C clock enough? + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + } + /* read byte from RX buffer */ + m_buf[ m_pos++ ] = call Usci.getRxbuf(); + + //TODO: this should check m_flags: if RESTART flag is present, we + //should not send stop condition + if (m_pos == m_len) { + + //when we receive the last byte, wait until STP condition is + //cleared, then return. + while( (call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + counter --; + } + + //disable the rx interrupt + call Usci.setIe(call Usci.getIe() & ~UCRXIE); + if (counter > 0x01) { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2Csa(), m_pos, m_buf ); + } else { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2Csa() , m_pos, m_buf ); + } + } + } + + async command error_t I2CBasicAddr.write[uint8_t client]( i2c_flags_t flags, + uint16_t addr, uint8_t len, + uint8_t* buf ) { + m_buf = buf; + m_len = len; + m_flags = flags; + m_pos = 0; + m_action = MASTER_WRITE; + + /* check if this is a new connection or a continuation */ + if (m_flags & I2C_START) { + /* + * Original "gen 1" driver was written for the x2 and implements + * i2c as described in x2 User_Manual (slau144, rev H). + * + * x5 i2c master is described in slau208, section 34.3.4.2.1. + * + * Sequence: + * + * - set sa + * - set UCTR (transmit, write) + * - set UCTXSTT (start) + * + * (start/address written, then we get an interrupt), for TXIFG + * + */ + call Usci.setI2Csa(addr); + + //check bus status at the latest point possible. + if (call Usci.getStat() & UCBBUSY) { + /* + * If the bus is busy, that is real weird. We are single + * master. Just signal a timeout. Later. FIXME. + */ + return EBUSY; + } + + call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); + + /* + * enable relevant state interrupts and TX, clear the rest + */ + +// while ( call Usci.getCtl1() & UCTXSTT) {} + + call Usci.setIe(UCNACKIE | UCTXIE); + } + /* is this a restart or a direct continuation */ + else if (m_flags & I2C_RESTART) { + // set slave address + call Usci.setI2Csa(addr); + + /* UCTR - set transmit */ + /* UCTXSTT - generate START condition */ + call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); + //do we not need to enable any interrupts here? + } else { + // continue writing next byte + nextWrite(); + } + return SUCCESS; + } + + void nextWrite() { + uint16_t counter = 0xFFFF; + + //Hey, now here's a fun thing to do: + // It seems like if two masters set START at almost the same + // time, they both get the TX interrupt, so both write their 0th + // byte into the TX buffer. However, only one of them actually + // writes it out, and no arbitration-loss interrupt is raised for + // the "slow" one. When the "fast" one finishes its transaction, + // the slow one gets a second TX interrupt, which would cause us + // to skip over the first byte by accident. This checks for the + // issue and rewinds the buffer position to 0 if it applies. I + // make no guarantees about how stable this behavior is. + + if ( call Usci.getCtl1() & UCTXSTT) { + m_pos = 0; + } + + /* more bytes to do? */ + if (m_pos < m_len) { + call Usci.setTxbuf(m_buf[m_pos++]); + return; + } + + /* + * all bytes sent + * + * if STOPPING, set stop bit. Not setting stop let's the master + * to continue with more transactions.... + */ + if ( m_flags & I2C_STOP ) { + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + + /* wait until STOP bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + counter--; + } + } + + // disable tx interrupt, we're DONE + call Usci.setIe(call Usci.getIe() & ~UCTXIE ); + + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( + (counter > 1) ? SUCCESS : FAIL, call Usci.getI2Csa(), m_len, m_buf); + return; + } + + + // defaults + + default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} + + default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} + + default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client]() { + return &msp430_usci_i2c_default_config; + } + + + /***************************************************************************/ + + void TXInterrupts_interrupted(uint8_t iv); + void RXInterrupts_interrupted(uint8_t iv); + void NACK_interrupt(); + + async event void Interrupts.interrupted(uint8_t iv) { + switch(iv) { + case USCI_I2C_UCNACKIFG: + NACK_interrupt(); + break; + case USCI_I2C_UCRXIFG: + RXInterrupts_interrupted(iv); + break; + case USCI_I2C_UCTXIFG: + TXInterrupts_interrupted(iv); + break; + default: + //error + break; + } + } + + void TXInterrupts_interrupted(uint8_t iv) { + nextWrite(); + } + + void RXInterrupts_interrupted(uint8_t iv) { + nextRead(); + } + + void NACK_interrupt() { + uint8_t counter = 0xff; + + /* + * This occurs during write and read when no ack is received. + * + * set stop bit + */ + call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + + /* wait until STOP bit has been transmitted */ + while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + counter--; + } + call Usci.enterResetMode_(); + call Usci.leaveResetMode_(); + + /* + * signal appropriate event depending on whether we were + * transmitting or receiving + * + * Note that UCTR will be cleared if we lost MM arbitration because + * + * another master addressed us as a slave. However, this should + * manifest as an AL interrupt, not a NACK interrupt. + */ + if (call Usci.getCtl1() & UCTR) { + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); + } else { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); + } + } + + + /* + * No Slave interfaces actually implemented. We are Single Master only. We are always the + * master... To avoid having to mess with the wiring from the main usci directory (auto-generated + * modules, we simply stub out the Slave interfaces. + */ + command error_t I2CSlave.setOwnAddress[uint8_t client](uint16_t addr) { return FAIL; } + command error_t I2CSlave.enableGeneralCall[uint8_t client]() { return FAIL; } + command error_t I2CSlave.disableGeneralCall[uint8_t client]() { return FAIL; } + async command uint8_t I2CSlave.slaveReceive[uint8_t client]() { return 0; } + async command void I2CSlave.slaveTransmit[uint8_t clientId](uint8_t data) {} + +#ifdef notdef + default async event bool I2CSlave.slaveReceiveRequested[uint8_t client]() { return FALSE; } + default async event bool I2CSlave.slaveTransmitRequested[uint8_t client]() { return FALSE; } + + default async event void I2CSlave.slaveStart[uint8_t client](bool isGeneralCall) { ; } + default async event void I2CSlave.slaveStop[uint8_t client]() { ; } +#endif +} diff --git a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h index 22317480c0..6f7eb5fdfc 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h @@ -121,22 +121,39 @@ msp430_usci_config_t msp430_usci_spi_default_config = { i2coa: 0 }; -// Should the default be the following? MM (multi-master) seems -// like it should be a platform specific thing. -// ctl0 : (UCMST | UCMODE_3 | UCSYNC), -// -// clock divisor is definitely a platform specific thing. The -// default should probably be SMCLK/div ~= 100kbps. +/* + * Should the default be the following? MM (multi-master) seems + * like it should be a platform specific thing. + * ctl0 : (UCMST | UCMODE_3 | UCSYNC), + * + * clock divisor is definitely a platform specific thing. The + * default should probably be SMCLK/div ~= 100kbps. + * + * MM vs. SM is also a platform thing. But for now we let the + * application or platform override it. + */ + +#ifndef MSP430_I2C_MASTER_MODE +/* + * default to multi-master, because the usci-bf code + * was originally written as a multi-master. + */ +#define MSP430_I2C_MASTER_MODE UCMM +#endif -msp430_usci_config_t msp430_usci_i2c_default_config = { +#ifndef MSP430_I2C_DEFAULT_DIVISOR +#define MSP430_I2C_DEFAULT_DIVISOR 10 +#endif + +const msp430_usci_config_t msp430_usci_i2c_default_config = { /* 7 bit addressing, multi-master, driven by SMCLK * note: UCMST must be set each time */ - ctl0 : UCSYNC | UCMODE_3 | UCMM, + ctl0 : UCSYNC | UCMODE_3 | MSP430_I2C_MASTER_MODE, ctl1 : UCSSEL__SMCLK, - br0 : 10, /* SMCLK/div */ - br1 : 0, /* 1*2^20/div -> 104,858 Hz */ + br0 : MSP430_I2C_DEFAULT_DIVISOR, /* SMCLK/div */ + br1 : 0, /* 1*2^20/div -> 104,858 Hz */ mctl : 0, i2coa: 0x41, }; From 26590c8cd849d4cdd982cd4221b026f774888b6d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 29 Jun 2012 03:26:24 -0700 Subject: [PATCH 286/411] usci-bf: move default usci configs from ram into rom. --- tos/chips/msp430/x5xxx/usci-bf/msp430usci.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h index 6f7eb5fdfc..768e848105 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h @@ -72,7 +72,7 @@ typedef struct msp430_usci_config_t { * (8 MHz). */ -msp430_usci_config_t msp430_usci_uart_default_config = { +const msp430_usci_config_t msp430_usci_uart_default_config = { /* N81 UART mode driven by SMCLK */ ctl0 : 0, ctl1 : UCSSEL__SMCLK, @@ -111,7 +111,7 @@ msp430_usci_config_t msp430_usci_uart_default_config = { i2coa: 0 }; -msp430_usci_config_t msp430_usci_spi_default_config = { +const msp430_usci_config_t msp430_usci_spi_default_config = { /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ ctl0 : UCCKPL | UCMSB | UCMST | UCSYNC, ctl1 : UCSSEL__SMCLK, From 171a7445a6515f6072607ca657cf99edd0b3796b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 29 Jun 2012 03:27:02 -0700 Subject: [PATCH 287/411] gdb: modify ucsi B dumps to include OA and SA address registers --- tos/chips/msp430/99_gdb/gdb_x5 | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/tos/chips/msp430/99_gdb/gdb_x5 b/tos/chips/msp430/99_gdb/gdb_x5 index a044f06b1b..f1352f1c6d 100644 --- a/tos/chips/msp430/99_gdb/gdb_x5 +++ b/tos/chips/msp430/99_gdb/gdb_x5 @@ -53,13 +53,13 @@ end #display usci define us printf "A0: ie: %02x ifg: %02x iv: %04x\n", \ - (*(uint8_t *)0x5dc), (*(uint8_t *)0x5dd), (*(uint8_t *)0x5de) + (*(uint8_t *)0x5dc), (*(uint8_t *)0x5dd), (*(uint16_t *)0x5de) printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ (*(uint8_t *)0x5c1), (*(uint8_t *)0x5c0), (*(uint8_t *)0x5c7), (*(uint8_t *)0x5c6),\ (*(uint8_t *)0x5c8), (*(uint8_t *)0x5ca), (*(uint8_t *)0x5cc), (*(uint8_t *)0x5ce) -printf "B0: ie: %02x ifg: %02x iv: %04x\n", \ - (*(uint8_t *)0x5fc), (*(uint8_t *)0x5fd), (*(uint8_t *)0x5fe) +printf "B0: ie: %02x ifg: %02x iv: %04x oa: %04x sa: %04x\n", \ + (*(uint8_t *)0x5fc), (*(uint8_t *)0x5fd), (*(uint8_t *)0x5fe), (*(uint16_t *) 0x5f0), (*(uint16_t *) 0x5f2) printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ (*(uint8_t *)0x5e1), (*(uint8_t *)0x5e0), (*(uint8_t *)0x5e7), (*(uint8_t *)0x5e6),\ (*(uint8_t *)0x5e8), (*(uint8_t *)0x5ea), (*(uint8_t *)0x5ec), (*(uint8_t *)0x5ee) @@ -71,8 +71,8 @@ printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x # (*(uint8_t *)0x601), (*(uint8_t *)0x600), (*(uint8_t *)0x607), (*(uint8_t *)0x606),\ # (*(uint8_t *)0x608), (*(uint8_t *)0x60a), (*(uint8_t *)0x60c), (*(uint8_t *)0x60e) # -#printf "B1: IE: %02x IFG: %02x IV: %04x\n", \ -# (*(uint8_t *)0x63c), (*(uint8_t *)0x63d), (*(uint8_t *)0x63e) +#printf "B1: IE: %02x IFG: %02x IV: %04x oa: %04x sa: %04x\n", \ +# (*(uint8_t *)0x63c), (*(uint8_t *)0x63d), (*(uint8_t *)0x63e), (*(uint16_t *) 0x630), (*(uint16_t *) 0x632) #printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ # (*(uint8_t *)0x621), (*(uint8_t *)0x620), (*(uint8_t *)0x627), (*(uint8_t *)0x626),\ # (*(uint8_t *)0x628), (*(uint8_t *)0x62a), (*(uint8_t *)0x62c), (*(uint8_t *)0x62e) @@ -83,8 +83,8 @@ printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x # (*(uint8_t *)0x641), (*(uint8_t *)0x640), (*(uint8_t *)0x647), (*(uint8_t *)0x646),\ # (*(uint8_t *)0x648), (*(uint8_t *)0x64a), (*(uint8_t *)0x64c), (*(uint8_t *)0x64e) # -#printf "B2: IE: %02x IFG: %02x IV: %04x\n", \ -# (*(uint8_t *)0x67c), (*(uint8_t *)0x67d), (*(uint8_t *)0x67e) +#printf "B2: IE: %02x IFG: %02x IV: %04x oa: %04x sa: %04x\n", \ +# (*(uint8_t *)0x67c), (*(uint8_t *)0x67d), (*(uint8_t *)0x67e), (*(uint16_t *) 0x670), (*(uint16_t *) 0x672) #printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ # (*(uint8_t *)0x661), (*(uint8_t *)0x660), (*(uint8_t *)0x667), (*(uint8_t *)0x666),\ # (*(uint8_t *)0x668), (*(uint8_t *)0x66a), (*(uint8_t *)0x66c), (*(uint8_t *)0x66e) @@ -95,8 +95,8 @@ printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x # (*(uint8_t *)0x681), (*(uint8_t *)0x680), (*(uint8_t *)0x687), (*(uint8_t *)0x686),\ # (*(uint8_t *)0x688), (*(uint8_t *)0x68a), (*(uint8_t *)0x68c), (*(uint8_t *)0x68e) # -#printf "B3: IE: %02x IFG: %02x IV: %04x\n", \ -# (*(uint8_t *)0x6bc), (*(uint8_t *)0x6bd), (*(uint8_t *)0x6be) +#printf "B3: IE: %02x IFG: %02x IV: %04x oa: %04x sa: %04x\n", \ +# (*(uint8_t *)0x6bc), (*(uint8_t *)0x6bd), (*(uint16_t *)0x6be), (*(uint16_t *) 0x6b0), (*(uint16_t *) 0x6b2) #printf " ctl0: %02x ctl1: %02x br: %02x%02x mctl: %02x stat: %02x rx: %02x tx: %02x\n",\ # (*(uint8_t *)0x6a1), (*(uint8_t *)0x6a0), (*(uint8_t *)0x6a7), (*(uint8_t *)0x6a6),\ # (*(uint8_t *)0x6a8), (*(uint8_t *)0x6aa), (*(uint8_t *)0x6ac), (*(uint8_t *)0x6ae) From 6ae331401d89bfd61e528ceffb704b662c5f53a7 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Mon, 23 Jul 2012 12:23:29 +0300 Subject: [PATCH 288/411] Local Rf1aConfigure.h now overrides global one. Look more from: https://github.com/tp-freeforall/prod/commit/5c07f61e7693ac2b6fb8062c5f356cadb6969628 --- tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc b/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc index 51083b1008..cc01519a10 100644 --- a/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc +++ b/tos/chips/msp430/rf1a/physical/Rf1aPhysical.nc @@ -34,7 +34,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "Rf1aConfigure.h" +#include /** The physical-layer interface for the RF1A radio. * From d90e6f9a8240291d17c728881de64d0224b0f9c4 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 25 Jul 2012 16:38:13 -0700 Subject: [PATCH 289/411] msp430/rf1a: change "[include]" to <[include]> to allow override. see 6ae3314 and in particular 5c07f61 --- apps/tests/msp430/rf1a/Rf1aRadioPower/TestP.nc | 4 ++-- tos/chips/msp430/rf1a/physical/Rf1aDumpConfig.nc | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/apps/tests/msp430/rf1a/Rf1aRadioPower/TestP.nc b/apps/tests/msp430/rf1a/Rf1aRadioPower/TestP.nc index 1d6cd03397..0f666aef75 100644 --- a/apps/tests/msp430/rf1a/Rf1aRadioPower/TestP.nc +++ b/apps/tests/msp430/rf1a/Rf1aRadioPower/TestP.nc @@ -1,6 +1,6 @@ #include -#include "Rf1aConfigure.h" -#include "Rf1aRadioPower.h" +#include +#include module TestP { uses interface Boot; diff --git a/tos/chips/msp430/rf1a/physical/Rf1aDumpConfig.nc b/tos/chips/msp430/rf1a/physical/Rf1aDumpConfig.nc index 31f676cf08..d1cf3ce1d8 100644 --- a/tos/chips/msp430/rf1a/physical/Rf1aDumpConfig.nc +++ b/tos/chips/msp430/rf1a/physical/Rf1aDumpConfig.nc @@ -34,7 +34,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "Rf1aConfigure.h" +#include /** Dump internal radio configuration information to the console for * debugging purposes. From 18f686f59e915a952028f21cd2388e8ccb4895ce Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 12 Sep 2012 01:39:19 -0700 Subject: [PATCH 290/411] panic: add basics for Panic interface and simple implementation. - Panic allows a mechanism to indicate fatal errors. --- tos/interfaces/Panic.nc | 103 ++++++++++++++++++++++++++++++ tos/system/panic.h | 28 ++++++++ tos/system/panic_simple/PanicC.nc | 16 +++++ tos/system/panic_simple/PanicP.nc | 79 +++++++++++++++++++++++ 4 files changed, 226 insertions(+) create mode 100644 tos/interfaces/Panic.nc create mode 100644 tos/system/panic.h create mode 100644 tos/system/panic_simple/PanicC.nc create mode 100644 tos/system/panic_simple/PanicP.nc diff --git a/tos/interfaces/Panic.nc b/tos/interfaces/Panic.nc new file mode 100644 index 0000000000..70ac80039f --- /dev/null +++ b/tos/interfaces/Panic.nc @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2012, Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Panic: Allow code to signal extreme conditions + * + * Panic allows code that implements sanity checking to indicate that + * something major has gone wrong. The class of error being checked and/or + * indicated is fatal and not intended to be recoverable. Included are things + * that might happen that are bad but are unexpected and visibility is needed + * when these failures occur. Panic provides this mechanism. + * + * Modules that use Panic should provide a default handler (typically empty). + * This avoids forcing a platform providing a Panic handler and makes + * transitioning simpler. This preserves exisiting code's behaviour (return + * an error which typically isn't handled), sit in a tight loop, or ignore the + * condition. While the code shouldn't do that, Panic being defined the + * way it is allows a graceful transition to giving visibility to that + * condition. + * + * If one wants to make sure that Panic stubs are wired into an actual + * panic handler, define REQUIRE_PANIC. Typically this would be done + * in the platform.h file. Any Panic stubs not wired will throw "not + * connected" errors. + * + * It is intended that Panic processing be defined on a platform by platform + * basis. For example, one platform may simply write the panic information + * out a debugging channel (comm port) while another platform may write the + * entire machine state to non-volatile storage and restart the machine. + * + * Usage: Typically a call to PanicHook.panic will be placed in error + * detection code that is fatal and not intended to be recovered + * from. For example a tight loop waiting for some hardware event. The + * event should be timed (infinite loops when the h/w event doesn't happen + * are bad and hang the machine). The only recourse at that point is to + * rely on the watchdog timer going off or similar function. This is bad, + * very bad. + * + * The first two parmeters (pcode, where) denote the subsystem and where + * in the subsystem the failure has occured at. Pcode can be allocated + * automatically or a platform can specify explicitly what Pcode values + * corespond to what subsystem. + * + * For example, the following is used in the msp430 i2c subsystem, which + * checks for various h/w conditions that can hang the system: + * + * #ifndef PANIC_I2C + * + * enum { + * __panic_i2c = unique(UQ_PANIC_SUBSYS) + * }; + * + * #define PANIC_I2C __panic_i2c + * #endif + * + * "where" is a simple integer (uint8_t) that denotes where in the subsystem + * the problem has occurred. This mechanism was chosen to keep things simple + * and to minimize resources that could be consummed. For example, the + * mechanism used by ASSERT typically uses __FILE__ and __LINE__ to denote the + * failure location but __FILE__ generates a string which in a memory + * constrained system is too expensive. + * + * Typically Panics in h/w modules get wired in via a platform dependent mapping + * module, ie. PlatformUsciMapC.nc. + */ + +interface Panic { + async command void panic(uint8_t pcode, uint8_t where, uint16_t arg0, + uint16_t arg1, uint16_t arg2, uint16_t arg3); + async command void warn(uint8_t pcode, uint8_t where, uint16_t arg0, + uint16_t arg1, uint16_t arg2, uint16_t arg3); +} diff --git a/tos/system/panic.h b/tos/system/panic.h new file mode 100644 index 0000000000..e71c1906c9 --- /dev/null +++ b/tos/system/panic.h @@ -0,0 +1,28 @@ +/* + * panic codes. + * + * If the high bit is set this denotes a warning. Simply + * by convention. If Panic.panic is called the system will + * crash, do a crash dump, and then restart. If Panic.warn + * is called a panic record is written to the SD and the + * system continues after the caller does what ever it needs + * to recover. + */ + + +#ifndef __PANIC_H__ +#define __PANIC_H__ + +#define PANIC_WARN_FLAG 0x80 + +/* + * pcodes are used to denote what subsystem failed. See + * (main tree) tos/interfaces/Panic.nc for more details. + * + * Pcodes can be defined automatically using unique or + * can be hard coded. To avoid collisions, hard coded + * pcodes start at PANIC_HC_START. + */ +#define PANIC_HC_START 16 + +#endif /* __PANIC_H__ */ diff --git a/tos/system/panic_simple/PanicC.nc b/tos/system/panic_simple/PanicC.nc new file mode 100644 index 0000000000..68af3eeea0 --- /dev/null +++ b/tos/system/panic_simple/PanicC.nc @@ -0,0 +1,16 @@ +/* + * Copyright @ 2008, 2012 Eric B. Decker + * @author Eric B. Decker + */ + +#include "panic.h" + +configuration PanicC { + provides interface Panic; +} + +implementation { + components PanicP, MainC; + Panic = PanicP; + MainC.SoftwareInit -> PanicP; +} diff --git a/tos/system/panic_simple/PanicP.nc b/tos/system/panic_simple/PanicP.nc new file mode 100644 index 0000000000..ce5df9afb1 --- /dev/null +++ b/tos/system/panic_simple/PanicP.nc @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2012, Eric B. Decker + * All rights reserved. + * + * This module provides a simple Panic interface. It currently + * does nothing but provides a place where Panics can be seen (like + * from a debugger). + */ + +#include "panic.h" +#include "typed_data.h" + +uint16_t save_sr; +bool save_sr_free; +norace uint8_t _p, _w; +norace uint16_t _a0, _a1, _a2, _a3, _arg; + +#ifdef PANIC_DINT +#define MAYBE_SAVE_SR_AND_DINT do { \ + if (save_sr_free) { \ + save_sr = READ_SR; \ + save_sr_free = FALSE; \ + } \ + dint(); \ +} while (0); +#else +#define MAYBE_SAVE_SR_AND_DINT do {} while (0) +#endif + + +module PanicP { + provides { + interface Panic; + interface Init; + } +} + +implementation { + + void debug_break(uint16_t arg) __attribute__ ((noinline)) { + _arg = arg; + nop(); + } + + + async command void Panic.warn(uint8_t pcode, uint8_t where, uint16_t arg0, uint16_t arg1, + uint16_t arg2, uint16_t arg3) { + + pcode |= PANIC_WARN_FLAG; + + _p = pcode; _w = where; + _a0 = arg0; _a1 = arg1; + _a2 = arg2; _a3 = arg3; + + MAYBE_SAVE_SR_AND_DINT; + debug_break(0); + } + + + /* + * Panic.panic: something really bad happened. + * Simple version. Do nothing allow debug break. + */ + + async command void Panic.panic(uint8_t pcode, uint8_t where, uint16_t arg0, uint16_t arg1, + uint16_t arg2, uint16_t arg3) { + _p = pcode; _w = where; + _a0 = arg0; _a1 = arg1; + _a2 = arg2; _a3 = arg3; + debug_break(1); + } + + + command error_t Init.init() { + save_sr_free = TRUE; + save_sr = 0xffff; + return SUCCESS; + } +} From baf1738398ad666cf88f8285df1a5a23c0be42d0 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 1 Oct 2012 02:25:10 -0700 Subject: [PATCH 291/411] tos.h: add UQ_PANIC_SUBSYS, unique panic string. Used for automatic PANIC subsystem assignments. --- tos/system/tos.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tos/system/tos.h b/tos/system/tos.h index 41e519cfc9..02d2600ea4 100644 --- a/tos/system/tos.h +++ b/tos/system/tos.h @@ -45,6 +45,8 @@ struct @exactlyonce { }; #define platform_bootstrap() {} #endif +#define UQ_PANIC_SUBSYS "Panic.Subsys" + #ifndef TOSSIM #define dbg(s, ...) #define dbgerror(s, ...) From 9e8d2e6887855e8ecbcc630b26aa37bb913deb59 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 1 Oct 2012 02:51:44 -0700 Subject: [PATCH 292/411] msp430x5-usci-v2: add timeout (UsciError), add ETIMEOUT for error_t provide for possibility of timeout signalling from Usci subsystem. Also provide for ETIMEOUT return error code. --- tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc | 12 ++++++++---- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc | 4 +++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc | 5 ++++- tos/types/TinyError.h | 3 ++- 4 files changed, 17 insertions(+), 7 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc index 438443c307..91c89dddf1 100644 --- a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciError.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2012 Eric B. Decker * Copyright (c) 2010 People Power Co. * All rights reserved. * @@ -34,15 +35,18 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ -/** Support notification of errors detected in MSP430 USCI modules. */ +/** + * Support notification of errors detected in MSP430 USCI modules. + */ + interface Msp430UsciError { - /** - * Signalled when the USCI infrastructure detects a hardware error. + /** Signalled when the USCI infrastructure detects a hardware error. * * The passed parameter is a bit set comprising values defined in * msp430usci.h; these generally map to bits in the USCI UCxySTAT * register. Note that this event is usually signalled from within * an interrupt handler. */ - async event void condition (unsigned int errors); + async event void condition(unsigned int errors); + async event void timeout(); } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc index 6b9c1b6037..91c89dddf1 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciError.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2012 Eric B. Decker * Copyright (c) 2010 People Power Co. * All rights reserved. * @@ -46,5 +47,6 @@ interface Msp430UsciError { * register. Note that this event is usually signalled from within * an interrupt handler. */ - async event void condition (unsigned int errors); + async event void condition(unsigned int errors); + async event void timeout(); } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc index 3530f3d08c..ac557a6c05 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciSpiP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2012, Eric B. Decker * Copyright (c) 2011-2012 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -41,6 +42,7 @@ * * @author Peter A. Bigot * @author João Gonçalves + * @author Eric B. Decker */ generic module Msp430UsciSpiP () @safe() { @@ -285,5 +287,6 @@ implementation { unconfigure_(); } - default async event void Msp430UsciError.condition (unsigned int errors) { } + default async event void Msp430UsciError.condition(unsigned int errors) { } + default async event void Msp430UsciError.timeout() { } } diff --git a/tos/types/TinyError.h b/tos/types/TinyError.h index ae2155b41c..ded1e6cfa2 100644 --- a/tos/types/TinyError.h +++ b/tos/types/TinyError.h @@ -61,7 +61,8 @@ typedef enum { EALREADY = 9, // The device state you are requesting is already set ENOMEM = 10, // Memory required not available ENOACK = 11, // A packet was not acknowledged - ELAST = 11 // Last enum value + ETIMEOUT = 12, // operation timed out + ELAST = 12 // Last enum value } error_t NESC_COMBINE("ecombine"); /* From dd4cc0cbb47a4eb8eca310f535371bf06e8fba02 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 1 Oct 2012 03:23:15 -0700 Subject: [PATCH 293/411] msp430-usci-v2: tweak msp430usci.h ground work for removing timeout counters replace with real time from Platform raw timing. tweak i2c configurations to get 100KHz. --- tos/chips/msp430/x2xxx/usci-bf/msp430usci.h | 66 +++++++++++++++++---- tos/chips/msp430/x5xxx/usci-bf/msp430usci.h | 31 ++++++---- tos/chips/msp430/x5xxx/usci/msp430usci.h | 2 +- 3 files changed, 77 insertions(+), 22 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h index 0a281f83b7..c0baa7e29b 100644 --- a/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h +++ b/tos/chips/msp430/x2xxx/usci-bf/msp430usci.h @@ -4,15 +4,16 @@ #include "msp430hardware.h" #ifndef UCSSEL__SMCLK + /* * Both the x2 and x5 families have UCSIs and need a clock source. * The x5 cpu header files define UCSSEL__SMCLK but the x2 headers * don't (please TI, can you be more consistent?... nah. that's * fine, we'll deal) * - * Note: this is x2xxx/usci/msp430usci.h and is inherently a - * x2 file. + * Note: this is x2xxx/usci/msp430usci.h and is inherently an x2 file. */ + #define UCSSEL__SMCLK (0x80) /* USCI 0 Clock Source: SMCLK */ #endif @@ -49,8 +50,21 @@ typedef struct msp430_usci_config_t { uint16_t i2coa; } msp430_usci_config_t; -// see note in Msp430UsciI2CP.nc I2CBasicAddr.read -// x5 uses 0x500, x2 uses 0xe00 can they be the same? +/* + * see Msp430UsciI2CP.nc, I2CBasicAddr.read. + * + * I2C_ONE_BYTE_READ_COUNTER is used as a limit to keep + * the routine from going infinite when things go wrong. + * + * DEPRECATED. It is going away!!!! + * + * The x5 code has been converted to use time via Platform raw time + * interfaces. The x2 code currently uses the counters. This + * should be changed by the x2 folks. + * + * x5 uses 0x500, x2 uses 0xe00 can they be the same? + */ + #define I2C_ONE_BYTE_READ_COUNTER 0x0E00 #ifndef TOS_DEFAULT_BAUDRATE @@ -60,6 +74,16 @@ typedef struct msp430_usci_config_t { /* * The following default configurations assume SMCLK clock is 1MiHz (2^20Hz). + * + * WARNING: This is not necessarily a good assumption. Choice of clocks is + * really a platform thing and should be provided in some fashion by the platform. + * + * The common definition here is a carry over from the old initial way that T2 dealt + * with this issue. + * + * In addition, there are issues with assuming binary vs. decimal clocks. For example + * the msp430f5438a with out tweak the PMM wants to be clocked no faster than 8,000,000 + * (8 MHz). */ msp430_usci_config_t msp430_usci_uart_default_config = { @@ -84,16 +108,36 @@ msp430_usci_config_t msp430_usci_spi_default_config = { i2coa: 0 }; -// Should the default be the following? MM (multi-master) seems -// like it should be a platform specific thing. -// ctl0 : (UCMST | UCMODE_3 | UCSYNC), +/* + * Should the default be the following? MM (multi-master) seems + * like it should be a platform specific thing. + * ctl0 : (UCMST | UCMODE_3 | UCSYNC), + * + * clock divisor is definitely a platform specific thing. The + * default should probably be SMCLK/div ~= 100kbps. + * + * MM vs. SM is also a platform thing. But for now we let the + * application or platform override it. + */ + +#ifndef MSP430_I2C_MASTER_MODE +/* + * default to multi-master, because the usci-bf code + * was originally written as a multi-master. + */ +#define MSP430_I2C_MASTER_MODE UCMM +#endif + + +#ifndef MSP430_I2C_DIVISOR +#define MSP430_I2C_DIVISOR 10 +#endif msp430_usci_config_t msp430_usci_i2c_default_config = { - /* 7 bit addressing single I2C master driven by SMCLK */ - ctl0 : UCSYNC | UCMODE_3 | UCMM, + ctl0 : UCSYNC | UCMODE_3 | MSP430_I2C_MASTER_MODE, ctl1 : UCSSEL__SMCLK, - br0 : 10, /* 104857 hz, slow for slow devices. */ - br1 : 0, + br0 : MSP430_I2C_DIVISOR, /* SMCLK/div */ + br1 : 0, /* 1*2^20/div -> 104,858 Hz */ mctl : 0, i2coa: 0x41, }; diff --git a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h index 768e848105..0849c66443 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h @@ -4,15 +4,16 @@ #include "msp430hardware.h" #ifndef UCSSEL__SMCLK + /* * Both the x2 and x5 families have UCSIs and need a clock source. * The x5 cpu header files define UCSSEL__SMCLK but the x2 headers * don't (please TI, can you be more consistent?... nah. that's * fine, we'll deal) * - * Note: this is x2xxx/usci/msp430usci.h and is inherently a - * x2 file. + * Note: this is x5xxx/usci/msp430usci.h and is inherently a x5 file. */ + #define UCSSEL__SMCLK (0x80) /* USCI 0 Clock Source: SMCLK */ #endif @@ -49,8 +50,21 @@ typedef struct msp430_usci_config_t { uint16_t i2coa; } msp430_usci_config_t; -// see note in Msp430UsciI2CP.nc I2CBasicAddr.read -// x5 uses 0x500, x2 uses 0xe00 can they be the same? +/* + * see Msp430UsciI2CP.nc, I2CBasicAddr.read. + * + * I2C_ONE_BYTE_READ_COUNTER is used as a limit to keep + * the routine from going infinite when things go wrong. + * + * DEPRECATED. It is going away!!!! + * + * The x5 code has been converted to use time via Platform raw time + * interfaces. The x2 code currently uses the counters. This + * should be changed by the x2 folks. + * + * x5 uses 0x500, x2 uses 0xe00 can they be the same? + */ + #define I2C_ONE_BYTE_READ_COUNTER 0x0500 #ifndef TOS_DEFAULT_BAUDRATE @@ -142,17 +156,14 @@ const msp430_usci_config_t msp430_usci_spi_default_config = { #endif -#ifndef MSP430_I2C_DEFAULT_DIVISOR -#define MSP430_I2C_DEFAULT_DIVISOR 10 +#ifndef MSP430_I2C_DIVISOR +#define MSP430_I2C_DIVISOR 10 #endif const msp430_usci_config_t msp430_usci_i2c_default_config = { - /* 7 bit addressing, multi-master, driven by SMCLK - * note: UCMST must be set each time - */ ctl0 : UCSYNC | UCMODE_3 | MSP430_I2C_MASTER_MODE, ctl1 : UCSSEL__SMCLK, - br0 : MSP430_I2C_DEFAULT_DIVISOR, /* SMCLK/div */ + br0 : MSP430_I2C_DIVISOR, /* SMCLK/div */ br1 : 0, /* 1*2^20/div -> 104,858 Hz */ mctl : 0, i2coa: 0x41, diff --git a/tos/chips/msp430/x5xxx/usci/msp430usci.h b/tos/chips/msp430/x5xxx/usci/msp430usci.h index bc81b3d92d..c439995b69 100644 --- a/tos/chips/msp430/x5xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x5xxx/usci/msp430usci.h @@ -104,7 +104,7 @@ enum { msp430_usci_config_t msp430_usci_i2c_default_config = { /* 7 bit addressing single I2C master driven by SMCLK */ ctlw0 : ((UCMST + UCMODE_3 + UCSYNC) << 8) | UCSSEL__SMCLK, - brw : 10, /* gives us 103680 hz, slow speed but will work with all devices.*/ + brw : 80, /* gives us 103680 hz, slow speed but will work with all devices.*/ mctl : 0 /* Not used in I2C mode*/ }; From 04930ffeb96c624112e58ca63463ac30d6d98014 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 1 Oct 2012 03:24:44 -0700 Subject: [PATCH 294/411] msp430-usci-v2: create I2CReg inteface --- tos/interfaces/I2CReg.nc | 120 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 120 insertions(+) create mode 100644 tos/interfaces/I2CReg.nc diff --git a/tos/interfaces/I2CReg.nc b/tos/interfaces/I2CReg.nc new file mode 100644 index 0000000000..5de7a93bd7 --- /dev/null +++ b/tos/interfaces/I2CReg.nc @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2012 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * I2CReg: interface to simple I2C devices with registers. + * single phase, run to completion. + * + * @author Eric B. Decker + */ + +#include + +interface I2CReg { + /* + * slave_present: check to see if a device is on the bus + * + * input: slave_addr to probe + * output: RETURN + * 0 slave not home + * 1 slave has responded. + */ + async command bool slave_present(uint16_t slave_addr); + + /* + * reg_read{,16}: read byte (or word) from an i2c device register + * + * Uses register symantics, will first address the register. + * + * input: slave_addr + * reg 8 bit register to address + * *val pointer to 8 (or 16) bit val + * read value returned here. + * + * RETURNS: SUCCESS yum + * ETIMEOUT operation would timeout. + * + * can also signal I2CReg.timeout() + */ + async command error_t reg_read(uint16_t slave_addr, uint8_t reg, uint8_t *val); + async command error_t reg_read16(uint16_t slave_addr, uint8_t reg, uint16_t *val); + + /* + * reg_readBlock: read block of data from the device registers. + * + * Starting with reg, read a block of data from the device (ie. a register block) + * + * input: slave_addr + * reg 8 bit register to address + * *buf where to put the data. + * + * RETURNS: SUCCESS yum + * ETIMEOUT operation would timeout. + * + * can also signal I2CReg.timeout() + */ + async command error_t reg_readBlock(uint16_t slave_addr, uint8_t reg, uint8_t num_bytes, uint8_t *buf); + + /* + * reg_write{,16}: write byte (or word) from an i2c device register + * + * Uses register symantics, will first address the register. + * + * input: slave_addr + * reg 8 bit register to address + * val 8 (or 16) bit val to write. + * + * RETURNS: SUCCESS yum + * ETIMEOUT operation would timeout. + * + * can also signal I2CReg.timeout() + */ + async command error_t reg_write(uint16_t slave_addr, uint8_t reg, uint8_t val); + async command error_t reg_write16(uint16_t slave_addr, uint8_t reg, uint16_t val); + + /* + * reg_writeBlock: write block of data to the device registers. + * + * Starting with reg, write a block of data to the device (ie. a register block) + * + * input: slave_addr + * reg 8 bit register to address + * *buf data to stuff + * + * RETURNS: SUCCESS yum + * ETIMEOUT operation would timeout. + */ + async command error_t reg_writeBlock(uint16_t slave_addr, uint8_t reg, uint8_t num_bytes, uint8_t *buf); + +} From b4e792cf63af1fd7dbc650fd52764b72e61f7770 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 1 Oct 2012 03:25:11 -0700 Subject: [PATCH 295/411] create Platform interface --- tos/interfaces/Platform.nc | 55 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 tos/interfaces/Platform.nc diff --git a/tos/interfaces/Platform.nc b/tos/interfaces/Platform.nc new file mode 100644 index 0000000000..f050e7abd7 --- /dev/null +++ b/tos/interfaces/Platform.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2012, Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Platform: low level platform interface. + */ + +interface Platform { + /* + * platforms provide a low level usec timing element. + * usecsRaw returns a raw value for this timing element. + * This is used in low level time outs that are time based. + */ + async command uint16_t usecsRaw(); + + /* + * platforms provide a longer term timing element. + * + * typically 32768 Hz (32 KiHz). For lack of a better name + * call it jiffies. Note. Existing code calls these ticks + * jiffies already. + */ + async command uint16_t jiffiesRaw(); +} From bff9e7f7ae5332b3577fc345171aa43f7930840d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 1 Oct 2012 03:27:58 -0700 Subject: [PATCH 296/411] msp430-usci-v2: I2C, rework Hpl, regularize i2c access names. - add or and and versions of accessors for Usci Ctrl words. - fix how the i2c bits are named. make them regular. - fix formatting so you can actually read the thing. --- .../msp430/x5xxx/usci-bf/HplMsp430Usci.nc | 25 ++-- .../msp430/x5xxx/usci-bf/HplMsp430UsciP.nc | 136 ++++++++++-------- 2 files changed, 93 insertions(+), 68 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430Usci.nc index a918765a84..d322e11211 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430Usci.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430Usci.nc @@ -113,6 +113,14 @@ interface HplMsp430Usci { async command void setCtl0(uint8_t v); async command void setCtl1(uint8_t v); + async command void orCtlw0(uint16_t v); + async command void orCtl0(uint8_t v); + async command void orCtl1(uint8_t v); + + async command void andCtlw0(uint16_t v); + async command void andCtl0(uint8_t v); + async command void andCtl1(uint8_t v); + /** * Reads the UCmxBRW Baud Rate Control registers. * This register is present on all USCI modules. @@ -359,17 +367,18 @@ interface HplMsp430Usci { */ async command void setTransmitMode(); async command void setReceiveMode(); - - /* Various I2C bits */ - async command bool getStopBit(); - async command bool getStartBit(); - async command bool getNackBit(); async command bool getTransmitReceiveMode(); /* transmit NACK, Stop, or Start condition, automatically cleared */ - async command void setTXNACK(); - async command void setTXStop(); - async command void setTXStart(); + async command void setTxNack(); + async command void setTxStop(); + async command void setTxStart(); + + async command bool getTxNack(); + async command bool getTxStop(); + async command bool getTxStart(); + + async command bool isBusBusy(); async command bool isNackIntrPending(); async command void clrNackIntr(); diff --git a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc index 47c56310f8..7c3a9ab6ef 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/HplMsp430UsciP.nc @@ -52,6 +52,12 @@ * @author Doug Carlson * @author Marcus Chang * @author Eric B. Decker + * + * WARNING: This code makes the assumption that access to the various + * registers occurs with single instructions and thus is atomic. It + * has been verified that with -Os optimization, that indeed register + * access is via single instructions. Other optimizations may not + * result in single instructions. */ generic module HplMsp430UsciP( @@ -93,7 +99,7 @@ implementation { #define UCmxIFG (*TCAST(volatile uint8_t* ONE, UCmxCTLW0_ + 0x1d)) #define UCmxIV (*TCAST(volatile uint16_t* ONE, UCmxCTLW0_ + 0x1e)) - async command uint8_t Usci.getModuleIdentifier() { return USCI_ID; } + async command uint8_t Usci.getModuleIdentifier() { return USCI_ID; } async command uint16_t Usci.getCtlw0() { return UCmxCTLW0; } async command uint8_t Usci.getCtl0() { return UCmxCTL0; } @@ -103,6 +109,14 @@ implementation { async command void Usci.setCtl0(uint8_t v) { UCmxCTL0 = v; } async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } + async command void Usci.orCtlw0(uint16_t v) { UCmxCTLW0 |= v; } + async command void Usci.orCtl0(uint8_t v) { UCmxCTL0 |= v; } + async command void Usci.orCtl1(uint8_t v) { UCmxCTL1 |= v; } + + async command void Usci.andCtlw0(uint16_t v) { UCmxCTLW0 &= v; } + async command void Usci.andCtl0(uint8_t v) { UCmxCTL0 &= v; } + async command void Usci.andCtl1(uint8_t v) { UCmxCTL1 &= v; } + async command uint16_t Usci.getBrw() { return UCmxBRW; } async command uint8_t Usci.getBr0() { return UCmxBR0; } async command uint8_t Usci.getBr1() { return UCmxBR1; } @@ -111,70 +125,72 @@ implementation { async command void Usci.setBr0(uint8_t v) { UCmxBR0 = v; } async command void Usci.setBr1(uint8_t v) { UCmxBR1 = v; } - async command uint8_t Usci.getMctl() { return UCmxMCTL; } - async command void Usci.setMctl(uint8_t v) { UCmxMCTL = v; } - async command uint8_t Usci.getStat() { return UCmxSTAT; } - async command void Usci.setStat(uint8_t v) { UCmxSTAT = v; } - async command uint8_t Usci.getRxbuf() { return UCmxRXBUF; } - async command void Usci.setRxbuf(uint8_t v) { UCmxRXBUF = v; } - async command uint8_t Usci.getTxbuf() { return UCmxTXBUF; } - async command void Usci.setTxbuf(uint8_t v) { UCmxTXBUF = v; } - async command uint8_t Usci.getAbctl() { return UCmxABCTL; } - async command void Usci.setAbctl(uint8_t v) { UCmxABCTL = v; } - async command uint16_t Usci.getIrctl() { return UCmxIRCTL; } - async command void Usci.setIrctl(uint16_t v) { UCmxIRCTL = v; } - async command uint8_t Usci.getIrtctl() { return UCmxIRTCTL; } - async command void Usci.setIrtctl(uint8_t v) { UCmxIRTCTL = v; } - async command uint8_t Usci.getIrrctl() { return UCmxIRRCTL; } - async command void Usci.setIrrctl(uint8_t v) { UCmxIRRCTL = v; } - - async command uint16_t Usci.getI2Coa() { return UCmxI2COA; } - async command void Usci.setI2Coa(uint16_t v) { UCmxI2COA = v; } - - async command uint16_t Usci.getI2Csa() { return UCmxI2CSA; } - async command void Usci.setI2Csa(uint16_t v) { UCmxI2CSA = v; } - - async command uint16_t Usci.getIctl() { return UCmxICTL; } - async command uint16_t Usci.setIctl(uint16_t v) { UCmxICTL = v; } - async command uint8_t Usci.getIe() { return UCmxIE; } - async command void Usci.setIe(uint8_t v) { UCmxIE = v; } - async command uint8_t Usci.getIfg() { return UCmxIFG; } - async command void Usci.setIfg(uint8_t v) { UCmxIFG = v; } - - async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } - async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } - async command void Usci.disableRxIntr() { UCmxIE &= ~UCRXIE; } - async command void Usci.enableRxIntr() { UCmxIE |= UCRXIE; } - - async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } - async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } - async command void Usci.disableTxIntr() { UCmxIE &= ~UCTXIE; } - async command void Usci.enableTxIntr() { UCmxIE |= UCTXIE; } - - async command bool Usci.isBusy() { return (UCmxSTAT & UCBUSY); } - - async command uint8_t Usci.getIv() { return UCmxIV; } + async command uint8_t Usci.getMctl() { return UCmxMCTL; } + async command void Usci.setMctl(uint8_t v) { UCmxMCTL = v; } + async command uint8_t Usci.getStat() { return UCmxSTAT; } + async command void Usci.setStat(uint8_t v) { UCmxSTAT = v; } + async command uint8_t Usci.getRxbuf() { return UCmxRXBUF; } + async command void Usci.setRxbuf(uint8_t v) { UCmxRXBUF = v; } + async command uint8_t Usci.getTxbuf() { return UCmxTXBUF; } + async command void Usci.setTxbuf(uint8_t v) { UCmxTXBUF = v; } + async command uint8_t Usci.getAbctl() { return UCmxABCTL; } + async command void Usci.setAbctl(uint8_t v) { UCmxABCTL = v; } + async command uint16_t Usci.getIrctl() { return UCmxIRCTL; } + async command void Usci.setIrctl(uint16_t v) { UCmxIRCTL = v; } + async command uint8_t Usci.getIrtctl() { return UCmxIRTCTL; } + async command void Usci.setIrtctl(uint8_t v) { UCmxIRTCTL = v; } + async command uint8_t Usci.getIrrctl() { return UCmxIRRCTL; } + async command void Usci.setIrrctl(uint8_t v) { UCmxIRRCTL = v; } + + async command uint16_t Usci.getI2Coa() { return UCmxI2COA; } + async command void Usci.setI2Coa(uint16_t v) { UCmxI2COA = v; } + + async command uint16_t Usci.getI2Csa() { return UCmxI2CSA; } + async command void Usci.setI2Csa(uint16_t v) { UCmxI2CSA = v; } + + async command uint16_t Usci.getIctl() { return UCmxICTL; } + async command uint16_t Usci.setIctl(uint16_t v) { UCmxICTL = v; } + async command uint8_t Usci.getIe() { return UCmxIE; } + async command void Usci.setIe(uint8_t v) { UCmxIE = v; } + async command uint8_t Usci.getIfg() { return UCmxIFG; } + async command void Usci.setIfg(uint8_t v) { UCmxIFG = v; } + + async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } + async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } + async command void Usci.disableRxIntr() { UCmxIE &= ~UCRXIE; } + async command void Usci.enableRxIntr() { UCmxIE |= UCRXIE; } + + async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } + async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } + async command void Usci.disableTxIntr() { UCmxIE &= ~UCTXIE; } + async command void Usci.enableTxIntr() { UCmxIE |= UCTXIE; } + + async command bool Usci.isBusy() { return (UCmxSTAT & UCBUSY); } + + async command uint8_t Usci.getIv() { return UCmxIV; } + /* I2C bits * * set direction of the bus */ - async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } - async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } - - /* Various i2c bits */ - async command bool Usci.getStopBit() { return (UCmxCTL1 & UCTXSTP); } - async command bool Usci.getStartBit() { return (UCmxCTL1 & UCTXSTT); } - async command bool Usci.getNackBit() { return (UCmxCTL1 & UCTXNACK); } - async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } - - /* set NACK, Stop condition, or Start condition, automatically cleared */ - async command void Usci.setTXNACK() { UCmxCTL1 |= UCTXNACK; } - async command void Usci.setTXStop() { UCmxCTL1 |= UCTXSTP; } - async command void Usci.setTXStart() { UCmxCTL1 |= UCTXSTT; } - - async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } - async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } + async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } + async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } + async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } + + /* NACK, Stop condition, or Start condition, automatically cleared */ + async command void Usci.setTxNack() { UCmxCTL1 |= UCTXNACK; } + async command void Usci.setTxStop() { UCmxCTL1 |= UCTXSTP; } + async command void Usci.setTxStart() { UCmxCTL1 |= UCTXSTT; } + + async command bool Usci.getTxNack() { return (UCmxCTL1 & UCTXNACK); } + async command bool Usci.getTxStop() { return (UCmxCTL1 & UCTXSTP); } + async command bool Usci.getTxStart() { return (UCmxCTL1 & UCTXSTT); } + + async command bool Usci.isBusBusy() { return (UCmxSTAT & UCBBUSY); } + + async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } + async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } async command void Usci.configure (const msp430_usci_config_t* config, bool leave_in_reset) { From 6d52da62196a733395bbe95c03640ccc4ebc284e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 1 Oct 2012 03:35:20 -0700 Subject: [PATCH 297/411] msp430-usci-v2: add I2CReg, Panic, and Platform interfaces Auto generated from master, I2CB0 -> 1, 2, 3. - Add I2CReg direct access interface (non-interrupt) - Add hooks for Panic and Platform raw timer access for timeouts. --- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc | 10 +++++++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc | 6 ++++++ tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc | 10 +++++++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc | 6 ++++++ tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc | 10 +++++++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc | 6 ++++++ tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc | 10 +++++++++- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc | 6 ++++++ 8 files changed, 60 insertions(+), 4 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc index 250f2050a8..2261cb7acc 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0C.nc @@ -53,10 +53,15 @@ generic configuration Msp430UsciI2CB0C() { interface Resource; interface ResourceRequested; interface I2CPacket; + interface I2CReg; interface I2CSlave; interface Msp430UsciError; } - uses interface Msp430UsciConfigure; + uses { + interface Msp430UsciConfigure; + interface Panic; + interface Platform; + } } implementation { enum { @@ -69,9 +74,12 @@ implementation { components Msp430UsciI2CB0P as I2CP; I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CReg = I2CP.I2CReg[CLIENT_ID]; I2CSlave = I2CP.I2CSlave[CLIENT_ID]; Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; Msp430UsciError = I2CP.Msp430UsciError[CLIENT_ID]; + Panic = I2CP; + Platform = I2CP; UsciP.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc index d0434548fb..08287ec55c 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc @@ -47,6 +47,7 @@ configuration Msp430UsciI2CB0P { provides { interface I2CPacket[uint8_t client]; + interface I2CReg[uint8_t client]; interface I2CSlave[uint8_t client]; interface ResourceConfigure[uint8_t client]; interface Msp430UsciError[uint8_t client]; @@ -55,6 +56,8 @@ configuration Msp430UsciI2CB0P { interface Msp430UsciConfigure[ uint8_t client ]; interface HplMsp430GeneralIO as SCL; interface HplMsp430GeneralIO as SDA; + interface Panic; + interface Platform; } } implementation { @@ -68,8 +71,11 @@ implementation { Msp430UsciConfigure = I2CP; ResourceConfigure = I2CP; I2CPacket = I2CP; + I2CReg = I2CP; I2CSlave = I2CP; Msp430UsciError = I2CP; + Panic = I2CP; + Platform = I2CP; SCL = I2CP.SCL; SDA = I2CP.SDA; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc index cfca1f3408..57ea400603 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1C.nc @@ -55,10 +55,15 @@ generic configuration Msp430UsciI2CB1C() { interface Resource; interface ResourceRequested; interface I2CPacket; + interface I2CReg; interface I2CSlave; interface Msp430UsciError; } - uses interface Msp430UsciConfigure; + uses { + interface Msp430UsciConfigure; + interface Panic; + interface Platform; + } } implementation { enum { @@ -71,9 +76,12 @@ implementation { components Msp430UsciI2CB1P as I2CP; I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CReg = I2CP.I2CReg[CLIENT_ID]; I2CSlave = I2CP.I2CSlave[CLIENT_ID]; Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; Msp430UsciError = I2CP.Msp430UsciError[CLIENT_ID]; + Panic = I2CP; + Platform = I2CP; UsciP.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc index 40458a9161..a4c9c5fb39 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc @@ -49,6 +49,7 @@ configuration Msp430UsciI2CB1P { provides { interface I2CPacket[uint8_t client]; + interface I2CReg[uint8_t client]; interface I2CSlave[uint8_t client]; interface ResourceConfigure[uint8_t client]; interface Msp430UsciError[uint8_t client]; @@ -57,6 +58,8 @@ configuration Msp430UsciI2CB1P { interface Msp430UsciConfigure[ uint8_t client ]; interface HplMsp430GeneralIO as SCL; interface HplMsp430GeneralIO as SDA; + interface Panic; + interface Platform; } } implementation { @@ -70,8 +73,11 @@ implementation { Msp430UsciConfigure = I2CP; ResourceConfigure = I2CP; I2CPacket = I2CP; + I2CReg = I2CP; I2CSlave = I2CP; Msp430UsciError = I2CP; + Panic = I2CP; + Platform = I2CP; SCL = I2CP.SCL; SDA = I2CP.SDA; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc index e563b8a7a7..bcc3098734 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2C.nc @@ -55,10 +55,15 @@ generic configuration Msp430UsciI2CB2C() { interface Resource; interface ResourceRequested; interface I2CPacket; + interface I2CReg; interface I2CSlave; interface Msp430UsciError; } - uses interface Msp430UsciConfigure; + uses { + interface Msp430UsciConfigure; + interface Panic; + interface Platform; + } } implementation { enum { @@ -71,9 +76,12 @@ implementation { components Msp430UsciI2CB2P as I2CP; I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CReg = I2CP.I2CReg[CLIENT_ID]; I2CSlave = I2CP.I2CSlave[CLIENT_ID]; Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; Msp430UsciError = I2CP.Msp430UsciError[CLIENT_ID]; + Panic = I2CP; + Platform = I2CP; UsciP.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc index 397860c0df..01d9be1ecc 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc @@ -49,6 +49,7 @@ configuration Msp430UsciI2CB2P { provides { interface I2CPacket[uint8_t client]; + interface I2CReg[uint8_t client]; interface I2CSlave[uint8_t client]; interface ResourceConfigure[uint8_t client]; interface Msp430UsciError[uint8_t client]; @@ -57,6 +58,8 @@ configuration Msp430UsciI2CB2P { interface Msp430UsciConfigure[ uint8_t client ]; interface HplMsp430GeneralIO as SCL; interface HplMsp430GeneralIO as SDA; + interface Panic; + interface Platform; } } implementation { @@ -70,8 +73,11 @@ implementation { Msp430UsciConfigure = I2CP; ResourceConfigure = I2CP; I2CPacket = I2CP; + I2CReg = I2CP; I2CSlave = I2CP; Msp430UsciError = I2CP; + Panic = I2CP; + Platform = I2CP; SCL = I2CP.SCL; SDA = I2CP.SDA; diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc index 618f89159b..5fbcc7e5ce 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3C.nc @@ -55,10 +55,15 @@ generic configuration Msp430UsciI2CB3C() { interface Resource; interface ResourceRequested; interface I2CPacket; + interface I2CReg; interface I2CSlave; interface Msp430UsciError; } - uses interface Msp430UsciConfigure; + uses { + interface Msp430UsciConfigure; + interface Panic; + interface Platform; + } } implementation { enum { @@ -71,9 +76,12 @@ implementation { components Msp430UsciI2CB3P as I2CP; I2CPacket = I2CP.I2CPacket[CLIENT_ID]; + I2CReg = I2CP.I2CReg[CLIENT_ID]; I2CSlave = I2CP.I2CSlave[CLIENT_ID]; Msp430UsciConfigure = I2CP.Msp430UsciConfigure[ CLIENT_ID ]; Msp430UsciError = I2CP.Msp430UsciError[CLIENT_ID]; + Panic = I2CP; + Platform = I2CP; UsciP.ResourceConfigure[CLIENT_ID] -> I2CP.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc index 01e8bd0e20..1c86cc18c8 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc @@ -49,6 +49,7 @@ configuration Msp430UsciI2CB3P { provides { interface I2CPacket[uint8_t client]; + interface I2CReg[uint8_t client]; interface I2CSlave[uint8_t client]; interface ResourceConfigure[uint8_t client]; interface Msp430UsciError[uint8_t client]; @@ -57,6 +58,8 @@ configuration Msp430UsciI2CB3P { interface Msp430UsciConfigure[ uint8_t client ]; interface HplMsp430GeneralIO as SCL; interface HplMsp430GeneralIO as SDA; + interface Panic; + interface Platform; } } implementation { @@ -70,8 +73,11 @@ implementation { Msp430UsciConfigure = I2CP; ResourceConfigure = I2CP; I2CPacket = I2CP; + I2CReg = I2CP; I2CSlave = I2CP; Msp430UsciError = I2CP; + Panic = I2CP; + Platform = I2CP; SCL = I2CP.SCL; SDA = I2CP.SDA; From 421a877816305918083f099e9b143167d0efb2eb Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 1 Oct 2012 03:40:02 -0700 Subject: [PATCH 298/411] msp430-usci-v2: Add I2C interfaces to i2c-sm code - update readme - add hooks for Panic and Platform code in i2c-mm code - full implementation for i2c-sm i2c interfaces. foundation for interrupt driven code. - this is a full rewrite (in progress) for the usci i2c code. --- tos/chips/msp430/x5xxx/usci-bf/README.txt | 23 +- .../x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc | 15 +- .../x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc | 803 ++++++++++++++++-- 3 files changed, 749 insertions(+), 92 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/README.txt b/tos/chips/msp430/x5xxx/usci-bf/README.txt index db6a345fab..aca8d1bd33 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/README.txt +++ b/tos/chips/msp430/x5xxx/usci-bf/README.txt @@ -117,20 +117,27 @@ configurations should wire the appropriate chip pins to Msp430UsciSpiB0P. I2C Mode Support ---------------- -I2C support added by Derek Baker (derek@red-slate.com) +A series of I2C drivers were written by Doug Carlson and Marcus Chang +(John Hopkins) for both the x2 and x5 processors that implements a +multi-master I2C implementation. These implementations came from the +breakfast fork at John Hopkins and were brought in as x2xxx/usci-bf +and x5xxx/usci-bf. -Added support for I2C master 7 bit addressing ~100khz/~400khz NONE interrupt driven, -tested on cc430F5137 with microchip 24lc1025 and Melexis MLX90614 thermometer. -I2CPacket.read, I2CPacket.write, I2CPacketreadDone, I2CPacketwriteDone -Bits taken from both PeoplePower and Z1 authors with thanks also to Eric Decker. -Note / Gotcha +These drivers were fleshed out and verified using a logic analyser. +A single master optimization was also added. + +This forms the i2c portion of the x5xxx/usci-v2 implementation. + + + +Notes: When setting the address of the slave device remember you only need the 7 bits, most devices datasheets show the address in a 8bit format, e.g 24lc1025 address is 0xA0, this turns into 0x50, the 7 msb's right shifted one, the read/right bit is added by the UART when you select the read/write function of the UART in I2C mode. -When writing to a device multiple time, check the data sheet for write times, you +When writing to a device multiple times, check the data sheet for write times, you need to give the device time to commit before you write again else the I2CPacket.write -will FAIL. +will FAIL. This of course depends on the device. diff --git a/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc index 5853c03402..8b20551a08 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc @@ -7,8 +7,6 @@ * * Multi-Master driver. * - * This open source code was developed with funding from People Power Company - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -61,6 +59,7 @@ generic module Msp430UsciI2CP () @safe() { interface I2CSlave[uint8_t client]; interface ResourceConfigure[uint8_t client]; interface Msp430UsciError[uint8_t client]; + interface Panic; } uses { interface HplMsp430Usci as Usci; @@ -626,4 +625,16 @@ implementation { call Usci.setIe(call Usci.getIe() | UCSTPIE | UCRXIE | UCTXIE); signal I2CSlave.slaveStart[call ArbiterInfo.userId()]( call Usci.getStat() & UCGC); } + +#ifndef REQUIRE_PLATFORM + default async command uint16_t Platform.usecsRaw() { return 0; } + default async command uint16_t Platform.jiffiesRaw() { return 0; } +#endif + +#ifndef REQUIRE_PANIC + default async command void Panic.panic(uint8_t pcode, uint8_t where, uint16_t arg0, + uint16_t arg1, uint16_t arg2, uint16_t arg3) { } + default async command void Panic.warn(uint8_t pcode, uint8_t where, uint16_t arg0, + uint16_t arg1, uint16_t arg2, uint16_t arg3) { } +#endif } diff --git a/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc index f26e8e4f7d..bce2e8ed42 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc @@ -1,14 +1,9 @@ /* * Copyright (c) 2012 Eric B. Decker - * Copyright (c) 2011 John Hopkins University - * Copyright (c) 2011 Redslate Ltd. - * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * * Single Master driver. * - * This open source code was developed with funding from People Power Company - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -42,23 +37,83 @@ * Implement the I2C-related interfaces for a MSP430 USCI module * instance. Single Master. * - * Started with the John Hopkins Multi-Master i2c driver and then - * optimized for Single Master. + * Originally started with the Multi-Master i2c driver from John + * Hopkins (Doug Carlson, et. al.). Completely rewritten to + * simplify and verified for proper operation at 400 KHz. Previous + * drivers worked at 100 KHz but not at 400 KHz. + * + * Optimized for single master. + * + * Following research into how the TI MSP430 x5 i2c implementation really + * works, including observation using a logic analyzer, corrected to + * obtain correct bus operation (minimizes extra bytes). + * + * Written explicitly for 400KHz bus operation assuming small register + * transactions. Added I2CReg semantics. (100Khz is fine too). + * + * Uses Panic to call out abnormal conditions. These conditions are + * assumed to be out of normal behaviour and aren't recoverable. + * + * Uses Platform to obtain raw timing information for timeout functions. + * + * WARNING: By default, null versions for both Panic and timing modules are + * used. This effectively disables any timeout checks or panic invocations. + * This preserves the original behaviour and doesn't require changing lots + * of things all at once. When a Platform wants to use the new functionality + * it can wire in the required components. This is the recommended + * configuration + * + * To enable Panic signalling and timeout functions, you must wire in + * appropriate routines into Panic and Platform in this module. + * + * It is recommended that you define REQUIRE_PLATFORM and REQUIRE_PANIC in + * your platform.h file. This will require that appropriate wiring exists + * for Panic and Platform and is wired in. * * @author Eric B. Decker + * + * previous authors... But it has been completely rewritten. + * * @author Doug Carlson * @author Marcus Chang * @author Peter A. Bigot * @author Derek Baker */ -#include #include "msp430usci.h" #include +#ifndef PANIC_I2C + +enum { + __panic_i2c = unique(UQ_PANIC_SUBSYS) +}; + +#define PANIC_I2C __panic_i2c +#endif + +volatile uint8_t bees[32]; +uint16_t bees_idx; + +typedef struct { + uint16_t ts; + uint8_t ctl1; + uint8_t ifg; + uint8_t stat; +} usci_reg_t; + +void get_state(usci_reg_t *p) { + p->ts = TA1R; + p->ctl1 = UCB3CTL1; + p->ifg = UCB3IFG; + p->stat = UCB3STAT; +} + + generic module Msp430UsciI2CP () @safe() { provides { interface I2CPacket as I2CBasicAddr[uint8_t client]; + interface I2CReg[uint8_t client]; interface I2CSlave[uint8_t client]; interface ResourceConfigure[uint8_t client]; interface Msp430UsciError[uint8_t client]; @@ -71,16 +126,38 @@ generic module Msp430UsciI2CP () @safe() { interface Msp430UsciConfigure[uint8_t client]; interface ArbiterInfo; interface LocalTime as LocalTime_bms; + interface Panic; + interface Platform; } } implementation { enum{ - SLAVE = 0, MASTER_READ = 1, MASTER_WRITE = 2, + + /* + * Time based timeouts. Given 100 KHz, 400 uS should be plenty, but + * this doesn't handle clock stretching. The time out code needs + * to handle this special. And still needs to make sure that we + * don't hang. While still giving the h/w long enough to complete + * its bus transaction. + * + * For the time being we ignore clock stretching. Cross that bridge + * if the troll climbs out from underneath. + * + * Timeout is in either uS or uiS depending on what the base clock + * system is set for. Just set it high enough so it doesn't matter. + */ + I2C_MAX_TIME = 400, /* max allowed, 400 uS (uis) */ }; +#define __PANIC_I2C(where, x, y, z) do { \ + call Panic.panic(PANIC_I2C, where, call Usci.getModuleIdentifier(), \ + x, y, z); \ + call Usci.enterResetMode_(); \ + } while (0) + norace uint8_t* m_buf; norace uint8_t m_len; norace uint8_t m_pos; @@ -91,6 +168,7 @@ implementation { void nextWrite(); void signalDone( error_t error ); + error_t configure_(const msp430_usci_config_t* config){ if(! config){ return FAIL; @@ -104,10 +182,11 @@ implementation { /* - * We assume that SCL/SDA are initially set up as input so when - * we deselect the pins from the module, the pins go back to inputs. - * The module is kept in reset. This configuration should be - * reasonable for lowish power. + * We assume that the pins begin used for SCL/SDA have been set up + * or left (initial state) as input (DIR set to 0 for the pin). + * When we deselect the pins from the module, the pins will go + * back to inputs. The module itself is kept in reset. This + * configuration should be reasonable for lowish power. */ error_t unconfigure_(){ call Usci.enterResetMode_(); @@ -124,16 +203,103 @@ implementation { unconfigure_(); } + + /* + * Set up for a transaction. + * + * First, reset the module. This will blow away pending interrupts and + * interrupt enables. Will this also make it impossible for the bus + * to be busy? + * + * Reset and then make sure the bus isn't busy. + */ + + error_t start_check_busy() { + uint16_t t0, t1; + + call Usci.enterResetMode_(); // blow any cruft away + call Usci.leaveResetMode_(); + + t0 = call Platform.usecsRaw(); + while (call Usci.isBusBusy()) { + t1 = call Platform.usecsRaw(); + if (t1 - t0 > I2C_MAX_TIME) { + __PANIC_I2C(6, t1, t0, 0); + return EBUSY; + } + } + return SUCCESS; + } + + + /* + * Wait for a CTRL1 signal to deassert. These in particular + * are UCTXNACK, UCTXSTP, and UCTXSTT. + */ + error_t wait_deassert_ctl1(uint8_t code) { + uint16_t t0, t1; + + t0 = call Platform.usecsRaw(); + + /* wait for code bits to go away */ + while (call Usci.getCtl1() & code) { + t1 = call Platform.usecsRaw(); + if (t1 - t0 > I2C_MAX_TIME) { + __PANIC_I2C(7, t1, t0, 0); + return ETIMEOUT; + } + } + return SUCCESS; + } + + +#ifdef notdef + void send_stop() { // close out current bus transaction... + error_t rtn; + + TELL = 1; + call Usci.setTxStop(); // finish cleaning up + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return; + TELL = 0; + } +#endif + + + error_t wait_ifg(uint8_t code) { + uint16_t t0, t1; + uint8_t ifg; + + t0 = call Platform.usecsRaw(); + while (1) { + ifg = call Usci.getIfg(); + if (ifg & UCNACKIFG) { // didn't respond. + __PANIC_I2C(9, ifg, 0, 0); + return EINVAL; + } + if (ifg & code) break; + t1 = call Platform.usecsRaw(); + if (t1 - t0 > I2C_MAX_TIME) { + __PANIC_I2C(10, t1, t0, 0); + return ETIMEOUT; + } + } + return SUCCESS; + } + + /*************************************************************************/ async command error_t I2CBasicAddr.read[uint8_t client]( i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { - //According to TI, we can just poll until the start condition - //clears. But we're nervous and want to bail out if it doesn't - //clear fast enough. This is how many times we loop before we - //bail out. + /* + * According to TI, we can just poll until the start condition + * clears. But we're nervous and want to bail out if it doesn't + * clear fast enough. This is how many times we loop before we + * bail out. + */ uint16_t counter = I2C_ONE_BYTE_READ_COUNTER; @@ -148,16 +314,13 @@ implementation { call Usci.setI2Csa(addr); //check bus status at the latest point possible. - if ( call Usci.getStat() & UCBBUSY ) { - /* - * If the bus is busy, that is real weird. We are single - * master. Just signal a timeout. Later. FIXME. - */ - return EBUSY; + if (call Usci.isBusBusy()) { /* shouldn't be busy */ + __PANIC_I2C(2, call Usci.getStat(), 0, 0); + return EBUSY; } - // clear TR bit (receiving), set start condition - call Usci.setCtl1((call Usci.getCtl1() & ~UCTR) | UCTXSTT); + call Usci.setReceiveMode(); /* clears CTR, reading */ + call Usci.setTxStart(); /* set TXSTT, send Start */ // enable nack and rx interrupts only call Usci.setIe(UCNACKIE | UCRXIE); @@ -169,19 +332,21 @@ implementation { if ( (m_len == 1) && (m_flags & I2C_STOP) ) { //this logic seems to work fine /* wait until START bit has been transmitted */ - while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ - counter--; + while (call Usci.getTxStart()) { + if (!(--counter)) { + __PANIC_I2C(3, 0, 0, 0); + } } - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + call Usci.setTxStop(); } } else if (m_flags & I2C_RESTART) { - /* set slave address */ call Usci.setI2Csa(addr); /* * clear TR (receive), generate START */ - call Usci.setCtl1((call Usci.getCtl1() & ~UCTR) | UCTXSTT); + call Usci.setReceiveMode(); /* clears CTR, reading */ + call Usci.setTxStart(); /* set TXSTT, send Start */ // enable nack and rx only call Usci.setIe(UCNACKIE | UCRXIE); @@ -189,15 +354,18 @@ implementation { /* if only reading 1 byte, STOP bit must be set right after START bit */ if ( (m_len == 1) && (m_flags & I2C_STOP) ) { /* wait until START bit has been transmitted */ - while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ - counter--; + while (call Usci.getCtl1() & UCTXSTT) { + if ((--counter) == 0) { /* went to zero */ + __PANIC_I2C(4, 0, 0, 0); + } } - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + call Usci.setTxStop(); } } else { //TODO: test nextRead(); } + if (counter > 1) return SUCCESS; @@ -219,7 +387,7 @@ implementation { //set the STOP condition real quick before the last byte gets //sent so that we can NACK+STOP it". Maybe this would work if //you slowed down the I2C clock enough? - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + call Usci.setTxStop(); } /* read byte from RX buffer */ m_buf[ m_pos++ ] = call Usci.getRxbuf(); @@ -230,23 +398,20 @@ implementation { //when we receive the last byte, wait until STP condition is //cleared, then return. - while( (call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + while (call Usci.getTxStop() && (counter > 1)) counter --; - } - //disable the rx interrupt - call Usci.setIe(call Usci.getIe() & ~UCRXIE); - if (counter > 0x01) { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2Csa(), m_pos, m_buf ); - } else { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2Csa() , m_pos, m_buf ); - } + //disable the rx interrupt + call Usci.disableRxIntr(); + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( + (counter > 1) ? SUCCESS : FAIL, + call Usci.getI2Csa(), m_pos, m_buf); } } - async command error_t I2CBasicAddr.write[uint8_t client]( i2c_flags_t flags, + async command error_t I2CBasicAddr.write[uint8_t client](i2c_flags_t flags, uint16_t addr, uint8_t len, - uint8_t* buf ) { + uint8_t* buf) { m_buf = buf; m_len = len; m_flags = flags; @@ -273,37 +438,31 @@ implementation { call Usci.setI2Csa(addr); //check bus status at the latest point possible. - if (call Usci.getStat() & UCBBUSY) { - /* - * If the bus is busy, that is real weird. We are single - * master. Just signal a timeout. Later. FIXME. - */ - return EBUSY; + if (call Usci.isBusBusy()) { /* shouldn't be busy */ + __PANIC_I2C(5, call Usci.getStat(), 0, 0); + return EBUSY; } - call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); + call Usci.orCtl1(UCTR | UCTXSTT); // writing, Start. /* * enable relevant state interrupts and TX, clear the rest */ -// while ( call Usci.getCtl1() & UCTXSTT) {} +// while (call Usci.getTxStart()) { } call Usci.setIe(UCNACKIE | UCTXIE); - } - /* is this a restart or a direct continuation */ - else if (m_flags & I2C_RESTART) { - // set slave address + + } else if (m_flags & I2C_RESTART) { + /* is this a restart or a direct continuation */ call Usci.setI2Csa(addr); - /* UCTR - set transmit */ - /* UCTXSTT - generate START condition */ - call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); + call Usci.orCtl1(UCTR | UCTXSTT); // writing, Start. + //do we not need to enable any interrupts here? - } else { - // continue writing next byte + + } else nextWrite(); - } return SUCCESS; } @@ -321,9 +480,8 @@ implementation { // issue and rewinds the buffer position to 0 if it applies. I // make no guarantees about how stable this behavior is. - if ( call Usci.getCtl1() & UCTXSTT) { + if (call Usci.getTxStart()) m_pos = 0; - } /* more bytes to do? */ if (m_pos < m_len) { @@ -338,28 +496,28 @@ implementation { * to continue with more transactions.... */ if ( m_flags & I2C_STOP ) { - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + call Usci.setTxStop(); /* wait until STOP bit has been transmitted */ - while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + while (call Usci.getTxStop() && (counter > 1)) counter--; - } } - // disable tx interrupt, we're DONE - call Usci.setIe(call Usci.getIe() & ~UCTXIE ); - + call Usci.disableTxIntr(); // we are done, no more txintrs signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( - (counter > 1) ? SUCCESS : FAIL, call Usci.getI2Csa(), m_len, m_buf); + (counter > 1) ? SUCCESS : FAIL, + call Usci.getI2Csa(), m_len, m_buf); return; } // defaults - default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} + default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, + uint8_t length, uint8_t* data) {} - default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} + default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, + uint8_t length, uint8_t* data) {} default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client]() { return &msp430_usci_i2c_default_config; @@ -400,15 +558,11 @@ implementation { void NACK_interrupt() { uint8_t counter = 0xff; - /* - * This occurs during write and read when no ack is received. - * - * set stop bit - */ - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + /* Nobody home, abort. Read or Write */ + call Usci.setTxStop(); /* wait until STOP bit has been transmitted */ - while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { + while (call Usci.getTxStop() && (counter > 1)) { counter--; } call Usci.enterResetMode_(); @@ -423,7 +577,7 @@ implementation { * another master addressed us as a slave. However, this should * manifest as an AL interrupt, not a NACK interrupt. */ - if (call Usci.getCtl1() & UCTR) { + if (call Usci.getTransmitReceiveMode()) { /* 1 if transmitting, UCTR */ signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); } else { signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); @@ -431,6 +585,9 @@ implementation { } + /***************************************************************************/ + + /* * No Slave interfaces actually implemented. We are Single Master only. We are always the * master... To avoid having to mess with the wiring from the main usci directory (auto-generated @@ -449,4 +606,486 @@ implementation { default async event void I2CSlave.slaveStart[uint8_t client](bool isGeneralCall) { ; } default async event void I2CSlave.slaveStop[uint8_t client]() { ; } #endif + + + /***************************************************************************/ + + + /* + * see if the slave is out there... + * + * 0 if no one home + * 1 well your guess here. + */ + async command bool I2CReg.slave_present[uint8_t client](uint16_t sa) { + error_t rtn; + + nop(); + TOGGLE_TELL; + TOGGLE_TELL; + if ((rtn = start_check_busy())) + return rtn; + + call Usci.setI2Csa(sa); + call Usci.orCtl1(UCTR | UCTXSTT | UCTXSTP); // Write, Start, Stop + + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + + rtn = call Usci.isNackIntrPending(); // 1 says NACK'd + return (!rtn); // we want the opposite sense + } + + + /* + * reg_read: + * + * START (w/ device addr, in i2csa), transmit + * 1st write the reg addr + * 2nd restart (w/device addr), receive + * read byte (reg contents) + * finish + */ + async command error_t I2CReg.reg_read[uint8_t client_id](uint16_t sa, uint8_t reg, uint8_t *val) { + uint16_t data; + error_t rtn; + + *val = 0; + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + nop(); + TOGGLE_TELL; + TOGGLE_TELL; + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can receive the + * byte coming back. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + /* looking for 2nd TxIFG */ + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + /* + * receive one byte + * + * First turn the bus around with a Restart. Wait for the TxStart + * to take and then assert the Stop. This should put the stop + * on the first receive byte. + */ + call Usci.setReceiveMode(); // clears CTR + call Usci.setTxStart(); + + /* wait for the TxStart to go away */ + if ((rtn = wait_deassert_ctl1(UCTXSTT))) + return rtn; + call Usci.setTxStop(); + + /* wait for inbound char to show up, first rx byte */ + if ((rtn = wait_ifg(UCRXIFG))) + return rtn; + + data = call Usci.getRxbuf(); + *val = data; + nop(); + return SUCCESS; + } + + + /* + * reg_read16 + * + * address slave (sa) + * tx (write) reg addr (reg) to the device + * restart (assert TXStart) to turn bus around + * read two bytes. + */ + async command error_t I2CReg.reg_read16[uint8_t client_id](uint16_t sa, uint8_t reg, uint16_t *val) { + uint16_t data; + error_t rtn; + + *val = 0; + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + nop(); + TOGGLE_TELL; + TOGGLE_TELL; + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can receive two + * bytes. (Send a Restart (assert TxSTT again, but this time indicate + * receiving)). This will occur after the current outgoing byte (in + * the outbound serial register) has been ACK'd. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + /* looking for 2nd TxIFG */ + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + /* + * receive two bytes + * + * First turn the bus around with a Restart. + * + * Also double buffered.... When the 1st RxIFG asserts saying + * there is something in RxBUF, the 2nd byte is also being clocked + * into the Rx Shift register. (unless the slave isn't ready in which + * case it will be doing clock stretching, SCLLOW will be asserted). + * + * So if we want to receive two bytes all is good. TxStop needs + * to be asserted while the 2nd byte is being received which + * means after the 1st RxIFG has been seen. We should get one + * more RxIFG and that should complete the transaction. + */ + call Usci.setReceiveMode(); // clears CTR + call Usci.setTxStart(); + + /* wait for the TxStart to go away */ + if ((rtn = wait_deassert_ctl1(UCTXSTT))) + return rtn; + + /* wait for inbound char to show up, first rx byte */ + if ((rtn = wait_ifg(UCRXIFG))) + return rtn; + + /* + * Since we have RxIntr asserted, we have a byte in the RxBuf and its been ack'd. + * The next byte is in progress so set TxStop. It will go on the next byte. + * Then actually read the current byte which will unfreeze the state machine. + * + * This will avoid starting another bus cycle, which can happen if we set + * stop after reading the first byte. Depends on if the bus is stalled. + * Ie. we got backed up and the I2C h/w is ahead of us. + */ + call Usci.setTxStop(); + + data = call Usci.getRxbuf(); + data = data << 8; + if ((rtn = wait_ifg(UCRXIFG))) + return rtn; + data |= call Usci.getRxbuf(); + *val = data; + nop(); + return SUCCESS; + } + + + async command error_t I2CReg.reg_readBlock[uint8_t client_id](uint16_t sa, + uint8_t reg, uint8_t num_bytes, uint8_t *buf) { + uint16_t left; + error_t rtn; + + if (num_bytes == 0 || buf == NULL) + return EINVAL; + + left = num_bytes; + + /* + * special case of left starts out 1, single byte. + * + */ + if (left == 1) + return call I2CReg.reg_read[client_id](sa, reg, &buf[0]); + + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + nop(); + TOGGLE_TELL; + TOGGLE_TELL; + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can start to receive + * bytes. (Send a Restart (assert TxSTT again, but this time indicate + * receiving)). This will occur after the current outgoing byte (in + * the outbound serial register) has been ACK'd. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + /* looking for 2nd TxIFG */ + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + /* + * Turn the bus around with a Restart. + */ + call Usci.setReceiveMode(); // clears CTR + call Usci.setTxStart(); + + /* wait for the TxStart to go away */ + if ((rtn = wait_deassert_ctl1(UCTXSTT))) + return rtn; + + /* + * RX is doubled buffered. There is the incoming shift register (SR) + * which feeds the actual RXBUF. When rxbuf is loaded rxifg is asserted. + * + * After rxbuf is loaded, the next byte will start to be clocked into + * SR. If rxbuf hasn't been emptied by the time 7 bit times have gone + * by, the state machine will stop clocking (scl will be low) until + * rxbuf gets emptied. + * + * What happens if we assert TxStop when we are holding off the receiver? + */ + while (left) { + if ((rtn = wait_ifg(UCRXIFG))) + return rtn; + left--; + + /* + * If there is only one more byte left, then set stop. + * The state machine will have already started to receive + * into the SR so the last byte is on the fly. + * + * If the state machine hung (on bit 7, scl low), setting + * TxStop prior to pulling the last byte will issue the + * Stop after this last byte. + * + * The order of setting txStop and pulling the Rxbuf byte + * is important. + */ + if (left == 1) + call Usci.setTxStop(); + *buf++ = call Usci.getRxbuf(); + } + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + nop(); + return SUCCESS; + } + + + /* + * reg_write: + * + * START (w/ device addr, in i2csa), transmit + * 1st write the reg addr + * write byte (reg contents) + * finish + */ + async command error_t I2CReg.reg_write[uint8_t client_id](uint16_t sa, + uint8_t reg, uint8_t val) { + error_t rtn; + + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + nop(); + TOGGLE_TELL; + TOGGLE_TELL; + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can receive the + * byte coming back. + */ + + if ((rtn = wait_ifg(UCTXIFG))) // wait for txstart to finish + return rtn; + + call Usci.setTxbuf(reg); // write register address + if ((rtn = wait_ifg(UCTXIFG))) // says reg addr got ack'd + return rtn; + + /* + * write one byte + * + * We've got an existing TxIFG, so we have room. Write the new value + * and wait until it gets moved into the shift register (TxIfg will come + * up when this happens). Then set TxStop to finish. + */ + call Usci.setTxbuf(val); + if ((rtn = wait_ifg(UCTXIFG))) // says val got ack'd + return rtn; + + call Usci.setTxStop(); + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + + nop(); + return SUCCESS; + } + + + async command error_t I2CReg.reg_write16[uint8_t client_id](uint16_t sa, + uint8_t reg, uint16_t val) { + error_t rtn; + + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + nop(); + TOGGLE_TELL; + TOGGLE_TELL; + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can receive the + * byte coming back. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + /* looking for 2nd TxIFG */ + if ((rtn = wait_ifg(UCTXIFG))) // says reg addr got ack'd + return rtn; + + /* + * write first byte, we do msb first. + * We've got an existing TxIFG, so we have room. + */ + call Usci.setTxbuf(val >> 8); // msb part + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + /* + * send 2nd, but wait until it is in the shift register + * before sending Stop + */ + call Usci.setTxbuf(val & 0xff); // lsb part + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + + call Usci.setTxStop(); + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + + nop(); + return SUCCESS; + } + + + async command error_t I2CReg.reg_writeBlock[uint8_t client_id](uint16_t sa, + uint8_t reg, uint8_t num_bytes, uint8_t *buf) { + uint16_t left; + error_t rtn; + + if (num_bytes == 0 || buf == NULL) + return EINVAL; + + left = num_bytes; + + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + nop(); + TOGGLE_TELL; + TOGGLE_TELL; + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can start to receive + * bytes. (Send a Restart (assert TxSTT again, but this time indicate + * receiving)). This will occur after the current outgoing byte (in + * the outbound serial register) has been ACK'd. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + while (left) { + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + left--; + call Usci.setTxbuf(*buf++); + } + /* + * we have to wait until the last byte written actually + * makes it into the SR before setting Stop. + */ + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxStop(); + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + nop(); + return SUCCESS; + } + + +#ifndef REQUIRE_PLATFORM + default async command uint16_t Platform.usecsRaw() { return 0; } + default async command uint16_t Platform.jiffiesRaw() { return 0; } +#endif + +#ifndef REQUIRE_PANIC + default async command void Panic.panic(uint8_t pcode, uint8_t where, uint16_t arg0, + uint16_t arg1, uint16_t arg2, uint16_t arg3) { } + default async command void Panic.warn(uint8_t pcode, uint8_t where, uint16_t arg0, + uint16_t arg1, uint16_t arg2, uint16_t arg3) { } +#endif } From 9505fedb1bade1b97181925f7be1edc2b1275b50 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 1 Oct 2011 23:39:35 -0700 Subject: [PATCH 299/411] Motnet 1.0 Release --- support/sdk/c/motenet/.gitignore | 18 + support/sdk/c/motenet/INSTALL | 36 ++ support/sdk/c/motenet/Makefile.am | 39 ++ support/sdk/c/motenet/README | 77 +++ support/sdk/c/motenet/am.h | 74 +++ support/sdk/c/motenet/am_types.h | 58 ++ support/sdk/c/motenet/bootstrap | 5 + support/sdk/c/motenet/configure.ac | 10 + support/sdk/c/motenet/mnlisten.c | 142 +++++ support/sdk/c/motenet/mnsend.c | 186 ++++++ support/sdk/c/motenet/motenet.c | 981 +++++++++++++++++++++++++++++ support/sdk/c/motenet/motenet.h | 153 +++++ support/sdk/c/netlib/.gitignore | 12 + support/sdk/c/netlib/INSTALL | 32 + support/sdk/c/netlib/Makefile.am | 11 + support/sdk/c/netlib/README | 6 + support/sdk/c/netlib/bootstrap | 5 + support/sdk/c/netlib/configure.ac | 19 + support/sdk/c/netlib/dspsock.c | 103 +++ support/sdk/c/netlib/error.c | 107 ++++ support/sdk/c/netlib/netlib.h | 30 + support/sdk/c/netlib/sock_ntop.c | 112 ++++ support/sdk/c/sf/.gitignore | 21 + support/sdk/c/sf/Makefile.am | 10 +- support/sdk/c/sf/README | 30 + support/sdk/c/sf/message.c | 49 +- support/sdk/c/sf/message.h | 12 +- support/sdk/c/sf/sf.c | 2 +- 28 files changed, 2315 insertions(+), 25 deletions(-) create mode 100644 support/sdk/c/motenet/.gitignore create mode 100644 support/sdk/c/motenet/INSTALL create mode 100644 support/sdk/c/motenet/Makefile.am create mode 100644 support/sdk/c/motenet/README create mode 100644 support/sdk/c/motenet/am.h create mode 100644 support/sdk/c/motenet/am_types.h create mode 100755 support/sdk/c/motenet/bootstrap create mode 100644 support/sdk/c/motenet/configure.ac create mode 100644 support/sdk/c/motenet/mnlisten.c create mode 100644 support/sdk/c/motenet/mnsend.c create mode 100644 support/sdk/c/motenet/motenet.c create mode 100644 support/sdk/c/motenet/motenet.h create mode 100644 support/sdk/c/netlib/.gitignore create mode 100644 support/sdk/c/netlib/INSTALL create mode 100644 support/sdk/c/netlib/Makefile.am create mode 100644 support/sdk/c/netlib/README create mode 100755 support/sdk/c/netlib/bootstrap create mode 100644 support/sdk/c/netlib/configure.ac create mode 100644 support/sdk/c/netlib/dspsock.c create mode 100644 support/sdk/c/netlib/error.c create mode 100644 support/sdk/c/netlib/netlib.h create mode 100644 support/sdk/c/netlib/sock_ntop.c create mode 100644 support/sdk/c/sf/.gitignore diff --git a/support/sdk/c/motenet/.gitignore b/support/sdk/c/motenet/.gitignore new file mode 100644 index 0000000000..1621e9cfa5 --- /dev/null +++ b/support/sdk/c/motenet/.gitignore @@ -0,0 +1,18 @@ +.deps +Makefile +Makefile.in +aclocal.m4 +autoconf.h +autoconf.h.in +autom4te.cache +config-aux +config.log +config.status +configure +serialpacket.c +serialpacket.h +serialprotocol.h +mnlisten +mnsend +sf +stamp-h1 diff --git a/support/sdk/c/motenet/INSTALL b/support/sdk/c/motenet/INSTALL new file mode 100644 index 0000000000..057b1823af --- /dev/null +++ b/support/sdk/c/motenet/INSTALL @@ -0,0 +1,36 @@ + +First, build and install netlib (../netlib) + +To install using stow: + + ./bootstrap + ./configure --prefix=/opt/stow/motenet + make + + sudo -s + make install + + ("sudo make install" for some reason doesn't pick up the value of $TOSROOT properly so + the make install doesn't work right unless you are root first) + + This will install bin/{mnlisten, mnsend}, include/motenet.h, and lib/libmotenet.a. + Install also installs message.h, serialsource.h, and sfsource.h from ../sf for + backward compatibility. These are installed into /opt/stow/motenet. + + + Install into /opt/{bin,include,lib} using stow. (still root) + + cd /opt/stow + stow motenet + + +Alternative Installation: + + ./bootstrap + ./configure --prefix=/opt + make + + sudo -s + make install + + If no prefix is given, it will default to /usr/local. diff --git a/support/sdk/c/motenet/Makefile.am b/support/sdk/c/motenet/Makefile.am new file mode 100644 index 0000000000..e186e9052e --- /dev/null +++ b/support/sdk/c/motenet/Makefile.am @@ -0,0 +1,39 @@ +AUTOMAKE_OPTIONS = foreign + +STOW_DIR=/opt +INC_DIR=$(STOW_DIR)/include +LIB_DIR=$(STOW_DIR)/lib + +CFLAGS=-O0 -g -Wall -I../sf -I$(INC_DIR) + +MIGFLAGS = -D_POSIX_C_SOURCE +TOS=$(shell ncc -print-tosdir) +SERIAL_H = $(TOS)/lib/serial/Serial.h + +BUILT_SOURCES = serialpacket.h serialprotocol.h + +bin_PROGRAMS=sf mnlisten mnsend +lib_LIBRARIES=libmotenet.a +include_HEADERS=am.h am_types.h motenet.h ../sf/message.h ../sf/serialsource.h ../sf/sfsource.h + +sf_SOURCES = ../sf/sf.c +sf_LDADD = libmotenet.a $(LIB_DIR)/libnetlib.a + +mnlisten_SOURCES = mnlisten.c +mnlisten_LDADD = libmotenet.a $(LIB_DIR)/libnetlib.a + +mnsend_SOURCES = mnsend.c +mnsend_LDADD = libmotenet.a $(LIB_DIR)/libnetlib.a + +libmotenet_a_SOURCES = \ + serialpacket.c \ + ../sf/message.c \ + ../sf/serialsource.c \ + ../sf/sfsource.c \ + motenet.c + +serialpacket.c serialpacket.h: $(SERIAL_H) + mig -o serialpacket.h -c-prefix=spacket c $(SERIAL_H) serial_packet $(MIGFLAGS) + +serialprotocol.h: $(SERIAL_H) + ncg -o $@ -c-prefix=SERIAL c $(SERIAL_H) Serial.h $(MIGFLAGS) diff --git a/support/sdk/c/motenet/README b/support/sdk/c/motenet/README new file mode 100644 index 0000000000..3fb918dafc --- /dev/null +++ b/support/sdk/c/motenet/README @@ -0,0 +1,77 @@ + +Socket Interface for TinyOS Network Communications +=============================================================================== + +MoteNet implements a socket interface for communications with a wireless +sensor network. Any network stack supported by both the mote and base +station can be supported. Currently, IPv6 and TinyOS Active Messaging (AM) +sockets are supported. + +Motivation: Many network cognizant programs are implemented using a socket +interface. This isolates most of the details of network communications behind +the sockets abstraction barrier. + +There is work in progress to implement an IPv6/6lowpan stack on the motes. +Interfacing to this network from the base station consists of a socket +interface to a IPv6 network. This has many benefits. + +MoteNet provides the same interface for programs built on top of the AM +protocol stack. The AM stack provides a significantly lighter weight network +transport than the ipv6/6lowpan stack. + +Normally just the payload crosses the socket interface (specified via +SOCK_DGRAM), however the whole AM packet can be requested by using SOCK_RAW. + +See mnlisten.c and mnsend.c for working examples. + + +Usage of the interface looks like the following: + + +struct sockaddr_am local_addr, remote_addr; + +mn_parse_motecom(&mcs_conn, "serial@/dev/ttyUSB0:115200"); +sock_fd = mn_socket(&mcs_conn, AF_AM, SOCK_DGRAM, 0); +memset(&local_addr, 0, sizeof(local_addr); +memset(&remote_addr, 0, sizeof(remote_addr); +local_addr.am_family = AF_AM; +local_addr.am_am_addr = htons(0x0001); +local_addr.am_type = 0xa1; /* only receive for type A1 (161) */ + +remote_addr.am_family = AF_AM; +remote_addr.am_am_addr = htons(0xffff); /* broadcast */ +remote_addr.am_type = 0xa1; + +/* set local address, also opens the serial port */ +err = mn_bind(sock_fd, &local_sockaddr, sizeof(local_sockaddr)); + +/* set remote end's address, we will broadcast */ +err = mn_connect(sock_fd, &remote_sockaddr, sizeof(remote_sockaddr)); + +/* will receive any packets addressed to 0x0001 or 0xffff */ +num_recvd = mn_recv(sock_fd, buf, 1024, 0); + + +Each mn_recv() will receive the next complete packet. Each mn_send() will +send one complete packet. mn_recvfrom() will receive the next packet but also +returns the address of the sender (this is the AM address in the src field). +Similarily, a different destination address can be specified for the send +using mn_sendto(). + + +The directory contains all files to build the library (libmotenet.a) that +provides the socket interface and lower layer code that implements direct +access to the serial port as well as the interconnect to the remote server. + +Two example programs are also included that demonstrate usage of the library +and the socket interface. + +The Active Message stack in TinyOS 2.1 implements a light weight +network protocol for a wireless sensor network. Its header follows: + + +--------+------+-----+-----+-----+------+--------- + | encap | dest | src | len | grp | type | payload + +--------+------+-----+-----+-----+------+--------- +bytes 1 2 2 1 1 1 len + +encap == 0x00 diff --git a/support/sdk/c/motenet/am.h b/support/sdk/c/motenet/am.h new file mode 100644 index 0000000000..0d1883b331 --- /dev/null +++ b/support/sdk/c/motenet/am.h @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2011 Eric B. Decker. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __AM_H__ +#define __AM_H__ + +#include + +#define AM_ENCAP_BASIC 0x00 +#define AM_ENCAP_LEN16 0x80 + +#define AM_ADDR_BCAST 0xffff +#define AM_ADDR_ANY 0x0000 + +#define AM_GRP_ANY 0x00 + +#define AM_TYPE_ANY 0x00 + + +#define AM_HDR_LEN 8 + +typedef struct __attribute__((__packed__)) { + uint8_t am_encap; + uint16_t am_dest; /* network order */ + uint16_t am_src; /* network order */ + uint8_t am_len; + uint8_t am_grp; + uint8_t am_type; + uint8_t am_data[0]; +} am_hdr_t; + + +typedef struct __attribute__((__packed__)) { + uint8_t am_encap; + uint16_t am_dest; /* network order */ + uint16_t am_src; /* network order */ + uint16_t am_len; /* network order */ + uint8_t am_type; + uint8_t am_data[0]; +} am_len16_hdr_t; + + +#endif /* __AM_H__ */ diff --git a/support/sdk/c/motenet/am_types.h b/support/sdk/c/motenet/am_types.h new file mode 100644 index 0000000000..74c0521cec --- /dev/null +++ b/support/sdk/c/motenet/am_types.h @@ -0,0 +1,58 @@ +/* + * am_types + * + */ + +#ifndef __AM_TYPES_H__ +#define __AM_TYPES_H__ + +/* + * Well known TinyOS numbers. + */ + +enum { + AM_RESERVED_00 = 0x00, /* indicates any type */ + + AM_PACKET_TIMESYNC = 0x3D, + TIMESYNC_AMTYPE = 0x3D, /* alias */ + AM_FTSP = 0x3E, + AM_TIMESYNCMSG = 0x3E, /* alias */ + AM_NALP = 0x3F, + + AM_IP_MSG = 0x41, /* 6lowpan, am encap */ + + AM_DELUGEADVMSG = 0x50, + AM_DELUGEREQMSG = 0x51, + AM_DELUGEDATAMSG = 0x52, + AM_DELUGE_FLASH_VOL_MANAGER = 0x53, + DELUGE_AM_FLASH_VOL_MANAGER = 0x53, /* alias */ + AM_DELUGE_MANAGER = 0x54, + DELUGE_AM_DELUGE_MANAGER = 0x54, /* alias */ + + AM_DISSEMINATION_MESSAGE = 0x60, + AM_DISSEMINATION_PROBE_MESSAGE= 0x61, + AM_DIP = 0x62, + AM_DHV = 0x63, + + AM_PRINTF_MSG = 0x64, + + AM_CTP_ROUTING = 0x70, + AM_CTP_DATA = 0x71, + AM_CTP_DEBUG = 0x72, + AM_LQI_BEACON_MSG = 0x73, + AM_LQI_DATA_MSG = 0x74, + AM_LQI_DEBUG = 0x75, + + AM_SRP = 0x76, +}; + +/* + * MM AM data packets. + */ +enum { + AM_MM_CONTROL = 0xA0, + AM_MM_DT = 0xA1, /* data, typed */ + AM_MM_DEBUG = 0xA2, +}; + +#endif /* __AM_TYPES_H__ */ diff --git a/support/sdk/c/motenet/bootstrap b/support/sdk/c/motenet/bootstrap new file mode 100755 index 0000000000..f35ba82043 --- /dev/null +++ b/support/sdk/c/motenet/bootstrap @@ -0,0 +1,5 @@ +mkdir config-aux +aclocal +autoheader +autoconf +automake -a -c diff --git a/support/sdk/c/motenet/configure.ac b/support/sdk/c/motenet/configure.ac new file mode 100644 index 0000000000..9fbbb0f5a3 --- /dev/null +++ b/support/sdk/c/motenet/configure.ac @@ -0,0 +1,10 @@ +AC_INIT(motenetsdk, 1.0) +AC_CONFIG_SRCDIR(motenet.c) +AM_CONFIG_HEADER(autoconf.h) +AC_CONFIG_AUX_DIR(config-aux) +AM_INIT_AUTOMAKE + +AC_PROG_CC +AC_PROG_RANLIB + +AC_OUTPUT(Makefile) diff --git a/support/sdk/c/motenet/mnlisten.c b/support/sdk/c/motenet/mnlisten.c new file mode 100644 index 0000000000..b926f8bbee --- /dev/null +++ b/support/sdk/c/motenet/mnlisten.c @@ -0,0 +1,142 @@ +/* + * Copyright 2011, Eric B. Decker + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "am.h" +#include "motenet.h" + +static void usage(char *name) { + fprintf(stderr, "usage: %s :\n", name); + fprintf(stderr, " %s server@:\n", name); + fprintf(stderr, " %s serial@:\n", name); + fprintf(stderr, "\n"); + fprintf(stderr, " host: or node or explicit address\n"); + fprintf(stderr, " server: AM gateway server\n"); + fprintf(stderr, " serial: AM serial gateway via serial port\n"); + fprintf(stderr, "\n"); + fprintf(stderr, " environment var MOTECOM can set the connection\n"); + fprintf(stderr, " command line overrides MOTECOM\n"); + exit(2); +} + + +motecom_conn_t mcs_conn; + + +int +main(int argc, char **argv) { + int fd, err; + char *prog_name, *p; + struct sockaddr_am *am_l, *am_r; + struct sockaddr_am am_local_addr, am_remote_addr; + socklen_t slen; + char buff[256]; + uint8_t pkt[1024]; + + prog_name = basename(argv[0]); + + switch(argc) { + case 1: p = NULL; break; + case 2: p = argv[1]; break; + default: + usage(prog_name); + } + mn_debug_set(1); + if (mn_parse_motecom(&mcs_conn, p)) { + fprintf(stderr, "\nCmd Line/MOTECOM connection string didn't parse\n"); + fprintf(stderr, "Command line: \"%s\"\n", p); + p = getenv("MOTECOM"); + fprintf(stderr, "MOTECOM: \"%s\"\n\n", (p ? p : "not found")); + usage(prog_name); + } + + fprintf(stderr, "Connecting: %s\n", mn_mcs2str(&mcs_conn, buff, 256)); + + am_l = &am_local_addr; + am_l->sam_family = AF_AM; + am_l->sam_addr = htons(0x0001); + am_l->sam_grp = AM_GRP_ANY; + am_l->sam_type = AM_TYPE_ANY; + + am_r = &am_remote_addr; + am_r->sam_family = AF_AM; + am_r->sam_addr = htons(AM_ADDR_BCAST); + am_r->sam_grp = AM_GRP_ANY; + am_r->sam_type = AM_TYPE_ANY; + + fd = mn_socket(&mcs_conn, AF_AM, SOCK_RAW, 0); + if (fd < 0) { + fprintf(stderr, "%s: mn_socket: %s (%d)\n", prog_name, strerror(errno), errno); + exit(1); + } + + /* set local side address */ + err = mn_bind(fd, (SA *) am_l, sizeof(am_local_addr)); + if (err) { + fprintf(stderr, "%s: mn_bind: %s (%d)\n", prog_name, strerror(errno), errno); + exit(1); + } + + /* set remote address */ + err = mn_connect(fd, (SA *) am_r, sizeof(am_remote_addr)); + if (err) { + fprintf(stderr, "%s: mn_connect: %s (%d)\n", prog_name, strerror(errno), errno); + exit(1); + } + + for (;;) { + int len, i; + + slen = sizeof(*am_r); + len = mn_recvfrom(fd, &pkt, 1024, 0, (SA *) am_r, &slen); + if (len == 0) + exit(0); + if (len < 0) { + fprintf(stderr, "%s: mn_recvfrom: %s (%d)\n", prog_name, strerror(errno), errno); + exit(1); + } + printf("%04x:%02x (%d) (l: %d): ", ntohs(am_r->sam_addr), am_r->sam_type, am_r->sam_type, len); + for (i = 0; i < len; i++) + printf("%02x ", pkt[i]); + putchar('\n'); + fflush(stdout); + } +} diff --git a/support/sdk/c/motenet/mnsend.c b/support/sdk/c/motenet/mnsend.c new file mode 100644 index 0000000000..7c622b1d46 --- /dev/null +++ b/support/sdk/c/motenet/mnsend.c @@ -0,0 +1,186 @@ +/* + * Copyright 2011, Eric B. Decker + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "am.h" +#include "motenet.h" + +static void usage(char *name) { + fprintf(stderr, "usage: %s : \n", name); + fprintf(stderr, " %s server@: \n", name); + fprintf(stderr, " %s serial@: \n", name); + fprintf(stderr, "\n"); + fprintf(stderr, " host: or node or explicit address\n"); + fprintf(stderr, " server: AM gateway server\n"); + fprintf(stderr, " serial: AM serial gateway via serial port\n"); + fprintf(stderr, "\n"); + fprintf(stderr, " environment var MOTECOM can set the connection\n"); + fprintf(stderr, " command line overrides MOTECOM\n"); + fprintf(stderr, "\n"); + fprintf(stderr, " specifiy AM packet to send. Includes AM encapsulation\n"); + fprintf(stderr, " all fields in hex, multibyte fields in network order\n\n"); + fprintf(stderr, " 00 dddd ssss ll gg tt \n"); + fprintf(stderr, " dddd = dest, ssss = src, ll = len, gg = group, tt = type\n"); + fprintf(stderr, " ie. mnsend server@localhost:9001 00 0004 0001 03 00 a0 03 00 01\n"); + exit(2); +} + + +motecom_conn_t mcs_conn; + +int +main(int argc, char **argv) { + char *prog_name, *p; + int fd, err; + int arg_index, val; + char buff[256]; + struct sockaddr_am *am_l, *am_r; + struct sockaddr_am am_local_addr, am_remote_addr; + uint8_t pkt[1024], *b; + socklen_t slen; + am_hdr_t *amh; + + uint8_t encap; + uint16_t dest, src; + uint8_t len; + uint8_t grp; + uint8_t type; + + prog_name = basename(argv[0]); + + /* must specifiy enough for the header at a minimum */ + if (argc < 7) + usage(prog_name); + + /* see if a connection string was specified, presence of ':' indicates */ + p = strchr(argv[1], ':'); + if (p) { + p = argv[1]; + arg_index = 2; + } else { + p = NULL; + arg_index = 1; + } + + mn_debug_set(1); + if (mn_parse_motecom(&mcs_conn, p)) { + fprintf(stderr, "\nCmd Line/MOTECOM connection string didn't parse\n"); + fprintf(stderr, "Command line: \"%s\"\n", p); + p = getenv("MOTECOM"); + fprintf(stderr, "MOTECOM: \"%s\"\n\n", (p ? p : "not found")); + usage(prog_name); + } + + fprintf(stderr, "Connecting: %s\n", mn_mcs2str(&mcs_conn, buff, 256)); + + memset(pkt, 0, sizeof(pkt)); + + amh = (am_hdr_t *) &pkt[0]; + encap = strtol(argv[arg_index++], &p, 16); + dest = strtol(argv[arg_index++], &p, 16); + src = strtol(argv[arg_index++], &p, 16); + len = strtol(argv[arg_index++], &p, 16); + grp = strtol(argv[arg_index++], &p, 16); + type = strtol(argv[arg_index++], &p, 16); + + amh->am_encap = encap; + amh->am_dest = htons(dest); + amh->am_src = htons(src); + amh->am_len = len; + amh->am_grp = grp; + amh->am_type = type; + + am_l = &am_local_addr; + am_l->sam_family = AF_AM; + am_l->sam_addr = htons(src); + am_l->sam_grp = AM_GRP_ANY; + am_l->sam_type = type; + + am_r = &am_remote_addr; + am_r->sam_family = AF_AM; + am_r->sam_addr = htons(dest); + am_r->sam_grp = AM_GRP_ANY; + am_r->sam_type = type; + + b = &pkt[AM_HDR_LEN]; + + while (arg_index < argc) { + val = strtol(argv[arg_index++], NULL, 16); + *(b++) = val & 0xff; + } + + len = b - &pkt[0]; + + /* use sock_raw because we are sending the AM header too */ + fd = mn_socket(&mcs_conn, AF_AM, SOCK_RAW, 0); + if (fd < 0) { + fprintf(stderr, "%s: mn_socket: %s (%d)\n", prog_name, strerror(errno), errno); + exit(1); + } + + /* set local side address */ + err = mn_bind(fd, (SA *) am_l, sizeof(am_local_addr)); + if (err) { + fprintf(stderr, "%s: mn_bind: %s (%d)\n", prog_name, strerror(errno), errno); + exit(1); + } + + /* set remote address */ + err = mn_connect(fd, (SA *) am_r, sizeof(am_remote_addr)); + if (err) { + fprintf(stderr, "%s: mn_connect: %s (%d)\n", prog_name, strerror(errno), errno); + exit(1); + } + + slen = sizeof(*am_r); + val = mn_sendto(fd, &pkt, len, 0, (SA *) am_r, slen); + if (val < 0) { + fprintf(stderr, "%s: mn_sendto: %s (%d)\n", prog_name, strerror(errno), errno); + exit(1); + } + + /* + * we turned on debugging so the lower layer will display the packet that + * was sent. + */ + + exit(0); +} diff --git a/support/sdk/c/motenet/motenet.c b/support/sdk/c/motenet/motenet.c new file mode 100644 index 0000000000..ed842729c6 --- /dev/null +++ b/support/sdk/c/motenet/motenet.c @@ -0,0 +1,981 @@ +/* + * Copyright 2011, Eric B. Decker + * All rights reserved + * + * MoteNet: Provide a sockets interface for TinyOS network traffic. + * + * In server or serial mode, motenet provides a sockets interface to + * traffic using the AM (Active Message) light weight protocol. A gateway + * between IP (either IPv4 or IPv6) and the AM motenet needs to be + * running at the interface between the different networks. This + * transition occurs at the node with the serial network interface + * to the motenet. + * + * In direct mode, the motenet is assumed to be running an IPv6 network + * stack. Interconnect at the WSN/Main network interface needs to be + * running IPv6 gateway software such as a PPP capable bridge. So an + * application using the socket interface can connect to any node in + * the WSN domain handled by the gateway. + * + * The MoteNet interface is intended to allow construction of network + * applications that will work with zero or minimal changes when connecting + * to nodes on an AM network or on a 6lowpan network using standard socket + * network programming methods. + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include "am.h" +#include "motenet.h" + +int mn_debug = 0; + +/* max buffer size for copying strings from a motecom connection string */ +#define MCS_MAX_BUF 256 + + +/* + * We need to provide a intervention layer in between data below us + * and the application layer. This allows us to handle normal + * sockets talking directly to the network layer as well as emulating + * the network layer handling AM encapsulated packets. + * + * AM packets are handled either directly (SERIAL) or via a Serial + * Forwarder. A motecomm_connection structure (mcs) is used to + * keep track of information needed to provide the switching needed. + * The MCS is provided by the client and is considered opaque to the + * application. We maintain a table that cross references the file + * descriptor returned by the system to the corresponding MCS. + */ + +typedef struct { + int fd; + motecom_conn_t *mcs; +} fd_mcs_t; + + +#define MAX_FD_MCS 5 + +static fd_mcs_t mn_fd_mcs[MAX_FD_MCS]; /* init's to NULL */ + + +static char *msgs[] = { + "unknown_packet_type", + "ack_timeout" , + "sync" , + "too_long" , + "too_short" , + "bad_sync" , + "bad_crc" , + "closed" , + "no_memory" , + "unix_error" +}; + + +void __mn_serial_msg(serial_source_msg problem) { + fprintf(stderr, "*** Note: %s\n", msgs[problem]); +} + + +int +mn_debug_set(int val) { + int ret; + + ret = mn_debug; + mn_debug = val; + return ret; +} + + +int +mn_debug_get() { + return mn_debug; +} + + +/* + * strip in place any white space preceeding or trailing + * the string. + * + * returns: pointer to new start. + * + * any whitespace on the end of the string will be stripped. A + * new eol will be laid down at the end of pertinent bits. + */ + +char * +strip_white(char *s) { + char *p; + int len; + + p = s; + while(*p && isspace(*p)) + p++; + s = p; + len = strlen(s); + if (len > 0) { + p = &s[len-1]; + while(*p && isspace(*p)) + p--; + *(p+1) = 0; + } + return s; +} + + +/* + * parse_host_port: + * + * parse out host and port portions of the input string. + * two fields, host and port seperated by : . + * + * WARNING: source string is modified in place. + * + * h,p <- parse(s) + * + * input: h ptr to char ptr, for host resultant + * p ptr to char ptr, for port resultant + * s char ptr to string to parse + * + * output: ret 0 parse complete + * 1 oops. failed. something wrong. + * *h h filled in, points at host part + * *p p filled in, points at port part + * + * Original string is modified to 0 terminate found parts. + * h and p point into original string buffer. + */ + +int +parse_host_port(char **h, char **p, char *s) { + char *hp, *pp, *t; + + hp = s; + t = strrchr(hp, ':'); /* rev search for port seperator */ + if (t == NULL) + return 1; /* must be present. */ + pp = t + 1; + *t = 0; /* terminate host str */ + + hp = strip_white(hp); /* kill any imbedded white space */ + pp = strip_white(pp); + + /* check for ipv6 explicit address in "[]" */ + if (hp[0] == '[') + hp++; + t = &hp[strlen(hp)-1]; + if (*t == ']') + *t = 0; + hp = strip_white(hp); + + *h = hp; + *p = pp; + return 0; +} + + +int +lookup_host_port(motecom_conn_t *mcs, char *hp, char *pp, int sock_type) { + int err; + struct addrinfo hints, *res; + + memset(&hints, 0, sizeof(hints)); + hints.ai_flags = (AI_V4MAPPED | AI_ADDRCONFIG); + hints.ai_family = AF_UNSPEC; + hints.ai_socktype = sock_type; + err = getaddrinfo(hp, pp, &hints, &res); + if (err) { + fprintf(stderr, "\n*** motenet: gai: \"%s:%s\": %s (%d)\n", hp, pp, + gai_strerror(err), err); + return 1; + } + mcs->ai = res; + if (mn_debug) { + fprintf(stderr, "\n"); + while (res) { + fprintf(stderr, "%s\n", ai2str(res)); + res = res->ai_next; + } + } + return 0; +} + + +/* + * MoteNet Parse MOTECOM. + * + * parse a connection string yielding a connection structure. + * + * input: mcs pointer to a connection structure. Result of the + * parse are stored here. + * + * conn_str provided string to parse. Can be NULL or empty. + * + * returns: 0 parsing succeeded, mcs updated with connection data. + * 1 failed to parse. indicate failure. + * + * Source string can be passed in or can be obtained from the environment + * variable MOTECOM. Passed in string takes priority but only if not empty. + * + * Formats: + * + * : + * server@: + * sf@: + * serial@: + * + * can be an IPv4 or IPv6 literal address or host name. Host name + * will be looked up using DNS. AAAA will yield ipv6 addresses, AA will + * yield ipv4 addresses. IPv4 literals should be specified in dotted + * quads. IPv6 literals are specified using IPv6 colon nomenclature and + * must be specified inside of "[]" like ipv6 URLs. + * + * Examples: + * + * zot:9001, localhost:9001, 127.0.0.1:9001 + * + * serial@/dev/ttyUSB1:115200, serial@COM1:9600 + * + * server@zot:9001, sf@zot:9001, server@localhost:9001, + * server@192.168.1.100:9001, etc. + * + * [fe80::fd41:4242:e88:3]:9001, device.ppp.osian:9001 + * server@[fe80::fd41:4242:e88:2]:9001, server@host.ppp.osian:9001 + * + * port can also be specified by using service name. + */ + +int +mn_parse_motecom(motecom_conn_t *mcs, char *conn_str) { + char cs[MCS_MAX_BUF]; /* conn str copy */ + char *ctp; /* conn type pointer */ + char *hp, *pp; /* host and port pointer */ + char *p; + + if (!mcs) + return 1; + + p = NULL; /* p is where we are starting. */ + memset(mcs, 0, sizeof(motecom_conn_t)); + if (conn_str) { + /* + * connection string specified (non-NULL), make sure it says something. + */ + strncpy(cs, conn_str, MCS_MAX_BUF); + p = strip_white(cs); + strncpy(mcs->conn_str, p, MC_CONN_SIZE); + if (strlen(p) == 0) + p = NULL; + } + if (p == NULL) { /* if still NULL, no connection string */ + /* + * haven't found something to work on yet. So see if we can + * find something in the environment variable MOTECOM. + */ + p = getenv("MOTECOM"); + if (p == NULL) /* MOTECOM not found, bail */ + return 1; + strncpy(cs, p, MCS_MAX_BUF); /* make our own copy */ + p = strip_white(cs); + strncpy(mcs->conn_str, p, MC_CONN_SIZE); + if (strlen(p) == 0) + p = NULL; + } + if (p == NULL) /* still nothing to work on, bail */ + return 1; + + /* + * something to work on. + * + * See if we can find a connection type, Look for @ + */ + ctp = p; + p = strchr(ctp, '@'); + if (p == NULL) { + /* + * @ not found --> must be DIRECT + */ + mcs->mc_src = MCS_DIRECT; + if (parse_host_port(&hp, &pp, ctp)) + return 1; /* parse didn't work, bail */ + ctp = NULL; /* no connection type */ + + return lookup_host_port(mcs, hp, pp, SOCK_DGRAM); + } + + /* + * @ found. Look for "server", "sf", or "serial". + */ + hp = p+1; /* move beyond the connection type */ + *p = 0; /* isolate the connection type */ + + ctp = strip_white(ctp); + if ((strcmp(ctp, "server") == 0) || (strcmp(ctp, "sf") == 0)) { + mcs->mc_src = MCS_SERVER; + if (parse_host_port(&hp, &pp, hp)) + return 1; + return lookup_host_port(mcs, hp, pp, SOCK_STREAM); + } else if (strcmp(ctp, "serial") == 0) { + /* + * serial@/dev/ttyUSB1:115200, use parse_host_port to find + * device (host) and baud (port). Same algorithm. + */ + mcs->mc_src = MCS_SERIAL; + if (parse_host_port(&hp, &pp, hp)) + return 1; + strncpy(mcs->dev, hp, MC_DEV_SIZE); + strncpy(mcs->baud, pp, MC_BAUD_SIZE); + return 0; + } + fprintf(stderr, "\n*** motenet: unrecognized connection type: %s\n", ctp); + return 1; +} + + +char * +mn_mcs2str(motecom_conn_t *mcs, char *str, size_t str_size) { + size_t space_avail, added; + char *cur; + struct addrinfo *ai; + + if (!str || str_size == 0) + return NULL; + if (!mcs) { + str[0]=0; + return str; + } + space_avail = str_size; + cur = str; + added = snprintf(cur, space_avail, "(%s) ", mcs->conn_str); + space_avail -= added; + cur += added; + switch (mcs->mc_src) { + case MCS_DIRECT: + case MCS_SERVER: + added = snprintf(cur, space_avail, "%s@", + (mcs->mc_src == MCS_DIRECT ? "direct" : "server")); + space_avail -= added; + cur += added; + ai = mcs->ai; + while (ai) { + added = snprintf(cur, space_avail, "<%s>", + Sock_ntop(ai->ai_addr, ai->ai_addrlen)); + space_avail -= added; + cur += added; + ai = ai->ai_next; + } + return str; + + case MCS_SERIAL: + added = snprintf(cur, space_avail, "serial@%s:%s", + mcs->dev, mcs->baud); + space_avail -= added; + cur += added; + return str; + + default: + added = snprintf(cur, space_avail, "unknown, %d", + mcs->mc_src); + space_avail -= added; + cur += added; + return str; + } +} + + +static int +open_mn_sf_source(motecom_conn_t *mcs) { + int fd, err; + struct addrinfo *aip; + + if (!mcs) { + errno = EINVAL; + return -1; + } + aip = mcs->ai; + fd = socket(aip->ai_family, aip->ai_socktype, 0); + if (fd < 0) { + fprintf(stderr, "motenet: socket (server open): %s (%d) (%s)\n", + strerror(errno), errno, mcs->conn_str); + return fd; + } + + mcs->sock_fd = fd; + err = connect(fd, aip->ai_addr, aip->ai_addrlen); + if (err < 0) { + fprintf(stderr, "motenet: %s connect (server) %s (%d) (%s)\n", + Sock_ntop(aip->ai_addr, aip->ai_addrlen), + strerror(errno), errno, mcs->conn_str); + close(fd); + return -1; + } + if (init_sf_source(fd) < 0) { + fprintf(stderr, "motenet: init_sf failed. (%s)\n", mcs->conn_str); + close(fd); + errno = EUNATCH; + return -1; + } + return fd; +} + + +int +mn_socket(motecom_conn_t *mcs, int domain, int type, int protocol) { + int i, fd; + fd_mcs_t *slot; + struct addrinfo *aip; + + if (!mcs) { + errno = EINVAL; + return -1; + } + slot = NULL; + for (i = 0; i < MAX_FD_MCS; i++) { + if (mn_fd_mcs[i].mcs == NULL) { + slot = &mn_fd_mcs[i]; + break; + } + } + if (slot == NULL) { + errno = ENOBUFS; + return -1; + } + switch(mcs->mc_src) { + case MCS_DIRECT: + aip = mcs->ai; + fd = socket(aip->ai_family, aip->ai_socktype, 0); + if (fd < 0) { + fprintf(stderr, "motenet: socket (direct): %s (%d) (%s)\n", strerror(errno), errno, mcs->conn_str); + return fd; + } + slot->fd = fd; + break; + + case MCS_SERVER: + fd = open_mn_sf_source(mcs); + if (fd < 0) { + fprintf(stderr, "motenet: socket (server): %s (%d) (%s)\n", strerror(errno), errno, mcs->conn_str); + return fd; + } + slot->fd = fd; + mcs->sock_fd = fd; + break; + + case MCS_SERIAL: + errno = 0; + mcs->serial_src = open_serial_source(mcs->dev, platform_baud_rate(mcs->baud), + 0, __mn_serial_msg); + if (mcs->serial_src == NULL) { + if (errno == 0) + errno = EINVAL; + fprintf(stderr, "motenet: socket (serial open): %s (%d) (%s)\n", strerror(errno), errno, mcs->conn_str); + return -1; + } + fd = serial_source_fd(mcs->serial_src); + slot->fd = fd; + break; + + default: + errno = EINVAL; + return -1; + } + slot->mcs = mcs; + mcs->family = domain; + mcs->socktype = type; + return fd; +} + + +static motecom_conn_t * +find_mcs(int fd) { + int i; + + for (i = 0; i < MAX_FD_MCS; i++) { + if (mn_fd_mcs[i].fd == fd) + return mn_fd_mcs[i].mcs; + } + return NULL; +} + + +int +mn_bind(int sockfd, const struct sockaddr *addr, socklen_t addrlen) { + motecom_conn_t *mcs; + struct sockaddr_am *am_addr; + + mcs = find_mcs(sockfd); + if (!mcs) { + errno = EINVAL; + return -1; + } + if (mcs->mc_src == MCS_DIRECT) + return bind(sockfd, addr, addrlen); + + if (mcs->mc_src != MCS_SERVER && mcs->mc_src != MCS_SERIAL) { + errno = EINVAL; + return -1; + } + + am_addr = (struct sockaddr_am *) addr; + if (am_addr->sam_family != AF_AM) { + errno = EINVAL; + return -1; + } + memcpy(&mcs->am_local, am_addr, sizeof(struct sockaddr_am)); + return 0; +} + + +int +mn_connect(int sockfd, const struct sockaddr *addr, socklen_t addrlen) { + motecom_conn_t *mcs; + struct sockaddr_am *am_addr; + + mcs = find_mcs(sockfd); + if (!mcs) { + errno = EINVAL; + return -1; + } + if (mcs->mc_src == MCS_DIRECT) + return connect(sockfd, addr, addrlen); + + if (mcs->mc_src != MCS_SERVER && mcs->mc_src != MCS_SERIAL) { + errno = EINVAL; + return -1; + } + + am_addr = (struct sockaddr_am *) addr; + if (am_addr->sam_family != AF_AM) { + errno = EINVAL; + return -1; + } + memcpy(&mcs->am_remote, am_addr, sizeof(struct sockaddr_am)); + return 0; +} + + +int +mn_close(int sockfd) { + int ret; + motecom_conn_t *mcs; + + mcs = find_mcs(sockfd); + if (!mcs) { + errno = EINVAL; + return -1; + } + if (mcs->ai) { + freeaddrinfo(mcs->ai); + mcs->ai = NULL; + } + switch (mcs->mc_src) { + case MCS_DIRECT: + return close(sockfd); + + case MCS_SERVER: + ret = close(mcs->sock_fd); + mcs->sock_fd = 0; + return ret; + + case MCS_SERIAL: + ret = close_serial_source(mcs->serial_src); + mcs->serial_src = NULL; + return ret; + + default: + errno = EINVAL; + return -1; + } +} + + +static ssize_t +am_send_packet(motecom_conn_t *mcs, struct sockaddr_am *am_dest, + const void *buf, size_t len) { + void *packet; + int out_len, i; + am_hdr_t *amh; /* am header in packet */ + struct sockaddr_am *aml; /* our local information */ + + packet = malloc(len + AM_HDR_LEN); + if (!packet) { + errno = ENOMEM; + return -1; + } + + /* + * Add a header if needed.... RAW is assumed to be properly constructed. + * DGRAM needs the header put on the front. + */ + switch(mcs->socktype) { + case SOCK_RAW: + memcpy(packet, buf, len); + out_len = len; + break; + + case SOCK_DGRAM: + if (!am_dest || am_dest->sam_family != AF_AM) { + errno = EINVAL; + free(packet); + return -1; + } + amh = packet; + aml = &mcs->am_local; + if (mn_debug && aml->sam_type == 0) + fprintf(stderr, "*** warning: send with local_type set to 0\n"); + amh->am_encap = AM_ENCAP_BASIC; + amh->am_dest = am_dest->sam_addr; /* dest, already network order */ + amh->am_src = aml->sam_addr; /* src, us, network order */ + amh->am_len = len; + amh->am_grp = aml->sam_grp; /* should be the same, local overrides */ + amh->am_type = aml->sam_type; /* local remote should be same */ + memcpy(packet + AM_HDR_LEN, buf, len); + out_len = len + AM_HDR_LEN; + break; + + default: + errno = EINVAL; + free(packet); + return -1; + } + + if (mn_debug) { + amh = packet; + fprintf(stderr, "%04x:%d (%02x) (l: %d): ", ntohs(amh->am_dest), + amh->am_type, amh->am_type, out_len); + for (i = 0; i < out_len; i++) + fprintf(stderr, "%02x ", ((uint8_t *) packet)[i]); + fprintf(stderr, "\n"); + } + + switch(mcs->mc_src) { + case MCS_SERVER: write_sf_packet(mcs->sock_fd, packet, out_len); break; + case MCS_SERIAL: write_serial_packet(mcs->serial_src, packet, out_len); break; + default: + errno = EINVAL; + free(packet); + return -1; + } + free(packet); + return out_len; +} + + +ssize_t +mn_sendto(int sockfd, const void *buf, size_t len, int flags, + const struct sockaddr *dest_addr, socklen_t addrlen){ + motecom_conn_t *mcs; + int out_len; + struct sockaddr_am *dst; + + mcs = find_mcs(sockfd); + if (!mcs || !buf || !len) { + errno = EINVAL; + return -1; + } + + if (mcs->mc_src == MCS_DIRECT) + return send(sockfd, buf, len, flags); + + if (dest_addr) + dst = (struct sockaddr_am *) dest_addr; + else + dst = &mcs->am_remote; + out_len = am_send_packet(mcs, dst, buf, len); + return out_len; +} + + +ssize_t +mn_send(int sockfd, const void *buf, size_t len, int flags) { + motecom_conn_t *mcs; + int out_len; + + mcs = find_mcs(sockfd); + if (!mcs || !buf || !len) { + errno = EINVAL; + return -1; + } + + if (mcs->mc_src == MCS_DIRECT) + return send(sockfd, buf, len, flags); + + out_len = am_send_packet(mcs, &mcs->am_remote, buf, len); + return out_len; +} + + +/* + * receive an AM packet with filtering from AM lower layer + * + * Receive an AM packet from either the server or serial with + * input filtering (dest address, group, type). + */ + +static void * +am_recv_packet(motecom_conn_t *mcs, int *len) { + uint8_t *packet; + am_hdr_t *amh; /* am header in packet */ + struct sockaddr_am *aml; /* our local information */ + + if (mcs == NULL || len == NULL) + return NULL; + + do { + switch (mcs->mc_src) { + case MCS_SERVER: packet = read_sf_packet(mcs->sock_fd, len); break; + case MCS_SERIAL: packet = read_serial_packet(mcs->serial_src, len); break; + default: return NULL; + } + + if (packet == NULL) + return NULL; + + /* + * SOCK_RAW returns raw protocol information, which is the + * uninterpreted data. No address checks, or type checks, etc. are + * done. + */ + if (mcs->socktype == SOCK_RAW) + return packet; + + amh = (am_hdr_t *) packet; + aml = &mcs->am_local; + + /* ignore encaps we don't understand. */ + if (amh->am_encap != AM_ENCAP_BASIC && + amh->am_encap != AM_ENCAP_LEN16) { + free(packet); + continue; + } + + /* + * accept bcast, we're set for any, or its pointed at us + * otherwise kick to next packet. + */ + if ((amh->am_dest != AM_ADDR_BCAST) && + (aml->sam_addr != AM_ADDR_ANY) && + (aml->sam_addr != amh->am_dest)) { + free(packet); + continue; + } + + if ((aml->sam_grp != AM_GRP_ANY) && + (aml->sam_grp != amh->am_grp)) { + free(packet); + continue; + } + + if ((aml->sam_type != AM_TYPE_ANY) && + (aml->sam_type != amh->am_type)) { + free(packet); + continue; + } + break; /* accept the packet */ + } while (1); + + return packet; +} + + +/* + * mn_recv: receive on a socket + * + * input: sockfd socket file descriptor to receive on + * must be registered in the fd_mcs database (via mn_socket) + * buf buffer to receive into. + * len max size of buf + * flags flags for receive (see recvfrom(2)), currently not implemented + * + * Receive a motenet packet into the buffer pointed to by BUF. LEN indicates + * the maximum size of the buffer BUF. If the packet data coming in is too + * large to fit into buf, the receive will still occuur upto the maximum size + * LEN. Any remaining packet data will be lost. + */ + +ssize_t +mn_recv(int sockfd, void *buf, size_t len, int flags) { + motecom_conn_t *mcs; + uint8_t *packet; + int in_len; + + mcs = find_mcs(sockfd); + if (!mcs || !buf || !len) { + errno = EINVAL; + return -1; + } + + /* + * DIRECT uses built in filtering dependent on socktype. + * In other words, let the kernel do it. + */ + if (mcs->mc_src == MCS_DIRECT) + return recv(sockfd, buf, len, flags); + + if (mcs->socktype != SOCK_DGRAM && mcs->socktype != SOCK_RAW) { + errno = EINVAL; + return -1; + } + + packet = am_recv_packet(mcs, &in_len); + if (packet == NULL) + return 0; + + if (mcs->socktype == SOCK_RAW) { /* if RAW, return full packet */ + if (len < in_len) + in_len = len; + memcpy(buf, packet, in_len); + free(packet); + return in_len; + } + + /* + * strip off the header and just return the data + */ + in_len -= AM_HDR_LEN; + if (len < in_len) + in_len = len; + memcpy(buf, packet + AM_HDR_LEN, in_len); + free(packet); + return in_len; +} + + +/* + * mn_recvfrom: receive on a socket returning packet source. + * + * input: sockfd socket file descriptor to receive on + * must be registered in the fd_mcs database (via mn_socket) + * buf buffer to receive into. + * len max size of buf + * flags flags for receive (see recvfrom(2)), currently not implemented + * src_addr pointer to a sockaddr structure, used to fill in the + * if provided. NULL says do not use. + * addrlen pointer to the size of the src_addr structure. On input + * indicates maximum size of *src_addr. On output how + * big the data written into *src_addr is. + * + * Receive a motenet packet into the buffer pointed to by BUF. LEN indicates + * the maximum size of the buffer BUF. If the packet data coming in is too + * large to fit into buf, the receive will still occuur upto the maximum size + * LEN. Any remaining packet data will be lost. + * + * If src_addr is non-NULL, then the source address of the incoming AM packet + * will be copied into the structure pointed to by SRC_ADDR. ADDRLEN indicates + * the maximum size of the data area available for SRC_ADDR. If the size of + * data being written into SRC_ADDR is larger than ADDRLEN, only the data that + * will fit will be written. Any additional data will be lost. ADDRLEN will + * be updated on return to indicate the size of the data area needed to contain + * the full address. + */ + +ssize_t +mn_recvfrom(int sockfd, void *buf, size_t len, int flags, + struct sockaddr *src_addr, socklen_t *addrlen) { + motecom_conn_t *mcs; + void *packet; + int in_len; + am_hdr_t *amh; + struct sockaddr_am *ama, am_addr; + + mcs = find_mcs(sockfd); + if (!mcs || !buf || !len) { + errno = EINVAL; + return -1; + } + + /* + * DIRECT uses built in filtering dependent on socktype. + * In other words, let the kernel do it. + */ + if (mcs->mc_src == MCS_DIRECT) + return recvfrom(sockfd, buf, len, flags, src_addr, addrlen); + + if (mcs->socktype != SOCK_DGRAM && mcs->socktype != SOCK_RAW) { + errno = EINVAL; + return -1; + } + + packet = am_recv_packet(mcs, &in_len); /* has dest filtering */ + if (packet == NULL) + return 0; + + /* + * if src_addr non-NULL (requested), return the src of this packet. + */ + amh = packet; + ama = &am_addr; + ama->sam_family = AF_AM; + ama->sam_addr = amh->am_src; /* net order */ + ama->sam_grp = amh->am_grp; + ama->sam_type = amh->am_type; + + if (src_addr != NULL && addrlen != NULL) { + if (*addrlen > sizeof(*ama)) /* see recvfrom(2) */ + *addrlen = sizeof(*ama); + memcpy(src_addr, ama, *addrlen); /* copy over as much as we can. */ + *addrlen = sizeof(*ama); /* see recvfrom(2) */ + } + + if (mcs->socktype == SOCK_RAW) { /* if RAW, return full packet */ + if (len < in_len) + in_len = len; + memcpy(buf, packet, in_len); + free(packet); + return in_len; + } + + /* + * strip off the header and just return the data + */ + in_len -= AM_HDR_LEN; + if (len < in_len) + in_len = len; + memcpy(buf, packet + AM_HDR_LEN, in_len); + free(packet); + return in_len; +} diff --git a/support/sdk/c/motenet/motenet.h b/support/sdk/c/motenet/motenet.h new file mode 100644 index 0000000000..75c4d8c0a6 --- /dev/null +++ b/support/sdk/c/motenet/motenet.h @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2011 Eric B. Decker. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef __MOTENET_H__ +#define __MOTENET_H__ + +#include +#include +#include +#include + +#include +#include +#include + +#ifdef __cplusplus +//extern "C" { +#endif + +/* + * The MOTECOM environment variable can be used to automatically + * select how to connect to the mote network. It can take a number + * of forms: + * + * AM addressing: + * serial@:, ie. serial@/dev/ttyUSB0:115200 + * server@:, ie. server@localhost:9001 + * sf@:, backward compatibility + * + * AM addressing is used when there is an intermediary gateway + * to an AM based WSN. + * + * IPv6 addressing: + * :, [fe80::0001]:9001 + * %@ [fe80::0001%ppp0]:9001 + * + * Direct addressing assumes that the WSN (the motenet) is running + * an ipv6 6lowpan network that we can get to from this node via + * native ipv6 routing. The destination node:port then specifies + * communications directly with that node. + */ + +typedef enum { + MCS_NONE = 0, /* indicate empty */ + MCS_DIRECT = 1, + MCS_SERVER = 2, + MCS_SERIAL = 3, +} mcs_enum_t; /* motecom src (mcs) */ + + +#ifndef AF_AM +#define AF_AM 20 +#endif + +/* + * sam_addr is stored big endian (network order). + * sam_grp is group, 0 -> unspecified (matches all) + * sam_type is the AM type (similar to port), 0x00 -> unspecified (matches all) + * + * IP network connections have both an IP address and port so are always specified + * by the 4 tuple (dest ip, dest port, src ip, src port). + * + * The AM protocol header only makes room for a single type field. This field denotes + * the type of the data carried in the payload, akin to the server's port. + * The mapping to the ip 4-tuple is (dst am, type, src am, type). + * + * We use socket structures to represent the end points. Bind sets the + * local end point and Connect sets the remote. Grp and Type should match for local + * and remote to be consistant with the AM specification but we don't explicitly + * check for this. + */ +struct sockaddr_am { + __SOCKADDR_COMMON (sam_); /* sam_family */ + uint16_t sam_addr; /* network order */ + uint8_t sam_grp; + uint8_t sam_type; /* equiv to port */ +}; + + +#define MC_DEV_SIZE 32 +#define MC_BAUD_SIZE 16 +#define MC_CONN_SIZE 80 + +typedef struct { + mcs_enum_t mc_src; + struct addrinfo *ai; /* gw/server addr */ + char dev[MC_DEV_SIZE]; + char baud[MC_BAUD_SIZE]; + char conn_str[MC_CONN_SIZE]; /* original connection string */ + serial_source serial_src; + struct sockaddr_am am_local; + struct sockaddr_am am_remote; + int sock_fd; /* fd for direct/server socket */ + int family; + enum __socket_type socktype; +} motecom_conn_t; + + +int mn_debug_set(int val); +int mn_debug_get(); + +int mn_parse_motecom(motecom_conn_t *mcs, char *conn_str); +char *mn_mcs2str(motecom_conn_t *mcs, char *str, size_t str_size); +int mn_socket(motecom_conn_t *mcs, int domain, int type, int protocol); +int mn_bind(int sockfd, const struct sockaddr *addr, socklen_t addrlen); +int mn_connect(int sockfd, const struct sockaddr *addr, socklen_t addrlen); +int mn_close(int sockfd); + +ssize_t mn_send(int sockfd, const void *buf, size_t len, int flags); +ssize_t mn_sendto(int sockfd, const void *buf, size_t len, int flags, + const struct sockaddr *dest_addr, socklen_t addrlen); + +ssize_t mn_recv(int sockfd, void *buf, size_t len, int flags); +ssize_t mn_recvfrom(int sockfd, void *buf, size_t len, int flags, + struct sockaddr *src_addr, socklen_t *addrlen); + +#ifdef __cplusplus +//} +#endif + +#endif /* __MOTENET_H__ */ diff --git a/support/sdk/c/netlib/.gitignore b/support/sdk/c/netlib/.gitignore new file mode 100644 index 0000000000..2a370d8064 --- /dev/null +++ b/support/sdk/c/netlib/.gitignore @@ -0,0 +1,12 @@ +.deps +Makefile +Makefile.in +aclocal.m4 +autoconf.h +autoconf.h.in +autom4te.cache +config-aux +config.log +config.status +configure +stamp-h1 diff --git a/support/sdk/c/netlib/INSTALL b/support/sdk/c/netlib/INSTALL new file mode 100644 index 0000000000..90f6b872e0 --- /dev/null +++ b/support/sdk/c/netlib/INSTALL @@ -0,0 +1,32 @@ +To install using stow: + + ./bootstrap + ./configure --prefix=/opt/stow/motenet + make + + sudo -s + make install + + ("sudo make install" for some reason doesn't pick up the value of $TOSROOT properly so + the make install doesn't work right unless you are root first) + + This will install include/netlib.h and lib/libnetlib.a. + These will be installed into /opt/stow/motenet + + + Install into /opt/{include,lib} using stow. (still root) + + cd /opt/stow + stow motenet + + +Alternative Installation: + + ./bootstrap + ./configure --prefix=/opt + make + + sudo -s + make install + + If no prefix is given, it will default to /usr/local. diff --git a/support/sdk/c/netlib/Makefile.am b/support/sdk/c/netlib/Makefile.am new file mode 100644 index 0000000000..d462a2d6ce --- /dev/null +++ b/support/sdk/c/netlib/Makefile.am @@ -0,0 +1,11 @@ +AUTOMAKE_OPTIONS = foreign + +CFLAGS=-O0 -g + +lib_LIBRARIES=libnetlib.a +include_HEADERS=netlib.h + +libnetlib_a_SOURCES = \ + error.c \ + dspsock.c \ + sock_ntop.c diff --git a/support/sdk/c/netlib/README b/support/sdk/c/netlib/README new file mode 100644 index 0000000000..e81cabaddc --- /dev/null +++ b/support/sdk/c/netlib/README @@ -0,0 +1,6 @@ + +Misc. network functions for TinyOS Base Station Apps +=============================================================================== + +Netlib provides various helper functions for dealing with network things. +Included are routines for protected sockaddr display functions and the like. diff --git a/support/sdk/c/netlib/bootstrap b/support/sdk/c/netlib/bootstrap new file mode 100755 index 0000000000..f35ba82043 --- /dev/null +++ b/support/sdk/c/netlib/bootstrap @@ -0,0 +1,5 @@ +mkdir config-aux +aclocal +autoheader +autoconf +automake -a -c diff --git a/support/sdk/c/netlib/configure.ac b/support/sdk/c/netlib/configure.ac new file mode 100644 index 0000000000..ca9e41fbd5 --- /dev/null +++ b/support/sdk/c/netlib/configure.ac @@ -0,0 +1,19 @@ +AC_INIT(netlibsdk, 1.0) +AC_CONFIG_SRCDIR(sock_ntop.c) +AM_CONFIG_HEADER(autoconf.h) +AC_CONFIG_AUX_DIR(config-aux) +AM_INIT_AUTOMAKE + +AC_PROG_CC +AC_PROG_RANLIB + +AC_TYPE_MODE_T +AC_TYPE_OFF_T +AC_TYPE_PID_T +AC_TYPE_SIZE_T +AC_TYPE_SSIZE_T +AC_TYPE_UINT16_T + +AC_CHECK_FUNCS([gethostname strerror]) + +AC_OUTPUT(Makefile) diff --git a/support/sdk/c/netlib/dspsock.c b/support/sdk/c/netlib/dspsock.c new file mode 100644 index 0000000000..698e273ee0 --- /dev/null +++ b/support/sdk/c/netlib/dspsock.c @@ -0,0 +1,103 @@ +/* + * Copyright 2011, Eric B. Decker + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include + +#include "netlib.h" + +#ifndef AF_AM +#define AF_AM 20 +#endif + + +#define MAX_AF_STR 6 + +char * +af2str(int af) { + switch(af) { + case AF_INET: return "ipv4"; + case AF_INET6: return "ipv6"; + case AF_UNIX: return "unix"; + case AF_AM: return "am"; + case AF_UNSPEC: return "unspec"; + default: return "none"; + } +} + + +#define MAX_SOCKTYPE_STR 6 + +char * +socktype2str(int sock_type) { + switch(sock_type) { + case SOCK_STREAM: return "stream"; + case SOCK_DGRAM: return "dgram"; + case SOCK_RAW: return "raw"; + default: return "none"; + } +} + + +#define MAX_SOCKPROTO_STR 4 + +char * +sockproto2str(int sock_proto) { + switch(sock_proto) { + case IPPROTO_UDP: return "udp"; + case IPPROTO_TCP: return "tcp"; + case IPPROTO_RAW: return "raw"; + default: return "none"; + } +} + + +char * +ai2str(struct addrinfo *ai) { + static char buff[256]; + + if (!ai) + return ""; + snprintf(buff, 256, "[%-*s %-*s %-*s %s (%2d %2d %2d 0x%02x)]", + MAX_AF_STR, af2str(ai->ai_family), + MAX_SOCKTYPE_STR, socktype2str(ai->ai_socktype), + MAX_SOCKPROTO_STR, sockproto2str(ai->ai_protocol), + Sock_ntop(ai->ai_addr, ai->ai_addrlen), + ai->ai_family, ai->ai_socktype, ai->ai_protocol, ai->ai_flags); + return buff; +} diff --git a/support/sdk/c/netlib/error.c b/support/sdk/c/netlib/error.c new file mode 100644 index 0000000000..ab9504626c --- /dev/null +++ b/support/sdk/c/netlib/error.c @@ -0,0 +1,107 @@ + +#include +#include +#include +#include +#include +#include + +#include "netlib.h" + +#ifdef notdef +int daemon_proc; /* set nonzero by daemon_init() */ +#endif + +static void err_doit(int, int, const char *, va_list); + +/* Nonfatal error related to system call + * Print message and return */ + +void +err_ret(const char *fmt, ...) { + va_list ap; + + va_start(ap, fmt); + err_doit(1, LOG_INFO, fmt, ap); + va_end(ap); + return; +} + +/* Fatal error related to system call + * Print message and terminate */ + +void +err_sys(const char *fmt, ...) { + va_list ap; + + va_start(ap, fmt); + err_doit(1, LOG_ERR, fmt, ap); + va_end(ap); + exit(1); +} + +/* Fatal error related to system call + * Print message, dump core, and terminate */ + +void +err_dump(const char *fmt, ...) { + va_list ap; + + va_start(ap, fmt); + err_doit(1, LOG_ERR, fmt, ap); + va_end(ap); + abort(); /* dump core and terminate */ + exit(1); /* shouldn't get here */ +} + +/* Nonfatal error unrelated to system call + * Print message and return */ + +void +err_msg(const char *fmt, ...) { + va_list ap; + + va_start(ap, fmt); + err_doit(0, LOG_INFO, fmt, ap); + va_end(ap); + return; +} + +/* Fatal error unrelated to system call + * Print message and terminate */ + +void +err_quit(const char *fmt, ...) { + va_list ap; + + va_start(ap, fmt); + err_doit(0, LOG_ERR, fmt, ap); + va_end(ap); + exit(1); +} + +/* Print message and return to caller + * Caller specifies "errnoflag" and "level" */ + +static void +err_doit(int errnoflag, int level, const char *fmt, va_list ap) { + int errno_save, n; + char buf[MAXLINE + 1]; + + errno_save = errno; /* value caller might want printed */ + vsnprintf(buf, MAXLINE, fmt, ap); /* safe */ + n = strlen(buf); + if (errnoflag) + snprintf(buf + n, MAXLINE - n, ": %s", strerror(errno_save)); + strcat(buf, "\n"); + +#ifdef notdef + if (daemon_proc) { + syslog(level, buf); + } else { +#endif + fflush(stdout); /* in case stdout and stderr are the same */ + fputs(buf, stderr); + fflush(stderr); + return; +} diff --git a/support/sdk/c/netlib/netlib.h b/support/sdk/c/netlib/netlib.h new file mode 100644 index 0000000000..3b2a2f34c4 --- /dev/null +++ b/support/sdk/c/netlib/netlib.h @@ -0,0 +1,30 @@ + +#ifndef __NETLIB_H__ +#define __NETLIB_H__ + +#include +#include + +/* Following shortens all the typecasts of pointer arguments: */ +#define SA struct sockaddr + +/* Miscellaneous constants */ +#define MAXLINE 4096 /* max text line length */ +#define BUFFSIZE 8192 /* buffer size for reads and writes */ + + +char *af2str(int af); +char *socktype2str(int sock_type); +char *sockproto2str(int sock_proto); +char *ai2str(struct addrinfo *ai); + +char *sock_ntop(const struct sockaddr *sa, socklen_t salen); +char *Sock_ntop(const struct sockaddr *sa, socklen_t salen); + +void err_dump(const char *, ...); +void err_msg(const char *, ...); +void err_quit(const char *, ...); +void err_ret(const char *, ...); +void err_sys(const char *, ...); + +#endif /* __NETLIB_H__ */ diff --git a/support/sdk/c/netlib/sock_ntop.c b/support/sdk/c/netlib/sock_ntop.c new file mode 100644 index 0000000000..2e937d10b5 --- /dev/null +++ b/support/sdk/c/netlib/sock_ntop.c @@ -0,0 +1,112 @@ +/* + * Copyright 2011, Eric B. Decker + * All rights reserved + * + * This work is heavily based on the uncopyrighted work done by + * W. Richard Stevens and later updated by Bill Fenner and Andrew Rudoff, + * Unix Network Programming, Volume 1, Third Edition. Source originally + * taken from http://unpbook.com/src.html, http://unpbook.com/unpv13e.tar.gz. + * Source heavily modifed for modern Ubuntu Linux system and only + * pieces needed copied. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "netlib.h" + +char * +sock_ntop(const struct sockaddr *sa, socklen_t salen) { + char portstr[8]; + static char str[128]; /* Unix domain is largest */ + + switch (sa->sa_family) { + case AF_INET: { + struct sockaddr_in *sin = (struct sockaddr_in *) sa; + + if (inet_ntop(AF_INET, &sin->sin_addr, str, sizeof(str)) == NULL) + return(NULL); + if (ntohs(sin->sin_port) != 0) { + snprintf(portstr, sizeof(portstr), ":%d", ntohs(sin->sin_port)); + strcat(str, portstr); + } + return(str); + } + + case AF_INET6: { + struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *) sa; + + str[0] = '['; + if (inet_ntop(AF_INET6, &sin6->sin6_addr, str + 1, sizeof(str) - 1) == NULL) + return(NULL); + if (ntohs(sin6->sin6_port) != 0) { + snprintf(portstr, sizeof(portstr), "]:%d", ntohs(sin6->sin6_port)); + strcat(str, portstr); + return(str); + } + return (str + 1); + } + + case AF_UNIX: { + struct sockaddr_un *unp = (struct sockaddr_un *) sa; + + /* OK to have no pathname bound to the socket: happens on + every connect() unless client calls bind() first. */ + if (unp->sun_path[0] == 0) + strcpy(str, "(no pathname bound)"); + else + snprintf(str, sizeof(str), "%s", unp->sun_path); + return(str); + } + + default: + snprintf(str, sizeof(str), "sock_ntop: unknown AF_xxx: %d, len %d", + sa->sa_family, salen); + return(str); + } + return (NULL); +} + +char * +Sock_ntop(const struct sockaddr *sa, socklen_t salen) { + char *ptr; + + if ( (ptr = sock_ntop(sa, salen)) == NULL) + err_sys("sock_ntop error"); /* inet_ntop() sets errno */ + return(ptr); +} diff --git a/support/sdk/c/sf/.gitignore b/support/sdk/c/sf/.gitignore new file mode 100644 index 0000000000..d418ee51cc --- /dev/null +++ b/support/sdk/c/sf/.gitignore @@ -0,0 +1,21 @@ +.deps +Makefile +Makefile.in +aclocal.m4 +autoconf.h +autoconf.h.in +autom4te.cache +config-aux +config.log +config.status +configure +prettylisten +seriallisten +serialpacket.c +serialpacket.h +serialprotocol.h +serialsend +sf +sflisten +sfsend +stamp-h1 diff --git a/support/sdk/c/sf/Makefile.am b/support/sdk/c/sf/Makefile.am index eb8adc035a..c0e882d573 100644 --- a/support/sdk/c/sf/Makefile.am +++ b/support/sdk/c/sf/Makefile.am @@ -6,9 +6,13 @@ SERIAL_H = $(TOS)/lib/serial/Serial.h BUILT_SOURCES = serialpacket.h serialprotocol.h -bin_PROGRAMS=sf -noinst_PROGRAMS=prettylisten sflisten sfsend seriallisten serialsend -noinst_LIBRARIES=libmote.a +# set so libmote.a will get built and installed + +bin_PROGRAMS=sf seriallisten serialsend sflisten sfsend +lib_LIBRARIES=libmote.a +include_HEADERS=sfsource.h serialsource.h message.h +noinst_PROGRAMS=prettylisten +#noinst_LIBRARIES=libmote.a sf_SOURCES = sf.c sf_LDADD = libmote.a diff --git a/support/sdk/c/sf/README b/support/sdk/c/sf/README index 100865c28d..c5524abf17 100644 --- a/support/sdk/c/sf/README +++ b/support/sdk/c/sf/README @@ -1,3 +1,33 @@ + +NOTE: motenet supersedes the serial forwarder and libmote.a. See ../motenet +Motenet provides a socket based interface to the WSN. It currently uses +code from sf to build the needed pieces. This all occurs from inside the +motenet directory. + + +To install using stow: + + ./bootstrap + ./configure --prefix=/opt/stow/motenet + make + + sudo -s + make install + + ("sudo make install" for some reason doesn't pick up the value of $TOSROOT properly so + the make install doesn't work write unless you are root first) + + This will install bin/{sf, sflisten, sfsend, seriallisten, serialsend}, include/{message.h, + serialsource.h, sfsource.h}, and lib/libmote.a. These will be installed into /opt/stow/motenet. + + + Install into /opt/{bin,include,lib} using stow. (still root) + + cd /opt/stow + stow motenet + + + Mini C-SDK for TinyOS ===================== diff --git a/support/sdk/c/sf/message.c b/support/sdk/c/sf/message.c index 9aa0c32e04..a6bca3a7ab 100644 --- a/support/sdk/c/sf/message.c +++ b/support/sdk/c/sf/message.c @@ -18,6 +18,23 @@ struct tmsg { size_t len; }; + +static void (*failfn)(void); + + +/* + * reset_tmsg: reset the pointers inside the control structure + * + * Used to more over an encapsulation. + */ +void reset_tmsg(tmsg_t *msg, void *packet, size_t len) +{ + if (!msg) + return; + msg->data = packet; + msg->len = len; +} + tmsg_t *new_tmsg(void *packet, size_t len) { tmsg_t *x = malloc(sizeof(tmsg_t)); @@ -36,14 +53,6 @@ void free_tmsg(tmsg_t *msg) free(msg); } -void reset_tmsg(tmsg_t *msg, void *packet, size_t len) -{ - if (!msg) - return; - msg->data = packet; - msg->len = len; -} - void *tmsg_data(tmsg_t *msg) { return msg->data; @@ -54,7 +63,6 @@ size_t tmsg_length(tmsg_t *msg) return msg->len; } -static void (*failfn)(void); void tmsg_fail(void) { @@ -67,7 +75,6 @@ void (*tmsg_set_fail(void (*fn)(void)))(void) void (*oldfn)(void) = failfn; failfn = fn; - return oldfn; } @@ -273,15 +280,21 @@ void tmsg_write_be(tmsg_t *msg, size_t offset, size_t length, int64_t value) tmsg_write_ube(msg, offset, length, value); } -/* u2f and f2u convert raw 32-bit values to/from float. This code assumes - that the floating point rep in the uint32_t values: - bit 31: sign, bits 30-23: exponent, bits 22-0: mantissa - matches that of a floating point value when such a value is stored in - memory. -*/ -/* Note that C99 wants us to use the union approach rather than the - cast-a-pointer approach... */ +/* + * u2f and f2u convert raw 32-bit values to/from float. This code assumes + * that the floating point rep in the uint32_t values: + * + * bit 31: sign, + * bits 30-23: exponent, + * bits 22-0: mantissa + * + * matches that of a floating point value when such a value is stored in memory. + * + * Note that C99 wants us to use the union approach rather than the + * cast-a-pointer approach... + */ + union f_and_u { uint32_t u; float f; diff --git a/support/sdk/c/sf/message.h b/support/sdk/c/sf/message.h index d1acc5c699..86b9bd7c30 100644 --- a/support/sdk/c/sf/message.h +++ b/support/sdk/c/sf/message.h @@ -9,8 +9,9 @@ /* Authors: David Gay * Intel Research Berkeley Lab */ -#ifndef MESSAGE_H -#define MESSAGE_H + +#ifndef __MESSAGE_H__ +#define __MESSAGE_H__ #include #include @@ -33,6 +34,11 @@ void tmsg_fail(void); */ void (*tmsg_set_fail(void (*fn)(void)))(void); +/** reset the data pointer and length of the tmsg struct + * usefull when moving over encapsulations. + */ +void reset_tmsg(tmsg_t *msg, void *packet, size_t len) ; + /** * Create a message buffer from array 'packet' of 'len' bytes */ @@ -158,4 +164,4 @@ void tmsg_write_float_be(tmsg_t *msg, size_t offset, float x); } #endif -#endif +#endif /* __MESSAGE_H__ */ diff --git a/support/sdk/c/sf/sf.c b/support/sdk/c/sf/sf.c index f26fe81002..a1e980d2c9 100644 --- a/support/sdk/c/sf/sf.c +++ b/support/sdk/c/sf/sf.c @@ -238,7 +238,7 @@ void forward_packet(const void *packet, int len) if (ok < 0) exit(2); if (ok > 0) - fprintf(stderr, "Note: write failed\n"); + fprintf(stderr, "Note: write failed: %d\n", ok); } int main(int argc, char **argv) From c59cfd54a6b67079115c88aace772796314f39fd Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 27 Oct 2012 13:57:36 -0700 Subject: [PATCH 300/411] motenet: 1.1: added python bindings. work in progress --- support/sdk/README | 17 ++++++ support/sdk/python/motenet/SockTest.zip | Bin 0 -> 2249 bytes support/sdk/python/motenet/SockTest/client.py | 43 ++++++++++++++ support/sdk/python/motenet/SockTest/server.py | 22 +++++++ support/sdk/python/motenet/SockTest/v4tst.py | 21 +++++++ support/sdk/python/motenet/client.py | 37 ++++++++++++ support/sdk/python/motenet/dspsock.py | 55 ++++++++++++++++++ support/sdk/python/motenet/dspsock.pyc | Bin 0 -> 2310 bytes support/sdk/python/motenet/server.py | 19 ++++++ support/sdk/python/motenet/test.py | 22 +++++++ 10 files changed, 236 insertions(+) create mode 100644 support/sdk/README create mode 100755 support/sdk/python/motenet/SockTest.zip create mode 100755 support/sdk/python/motenet/SockTest/client.py create mode 100755 support/sdk/python/motenet/SockTest/server.py create mode 100755 support/sdk/python/motenet/SockTest/v4tst.py create mode 100755 support/sdk/python/motenet/client.py create mode 100755 support/sdk/python/motenet/dspsock.py create mode 100644 support/sdk/python/motenet/dspsock.pyc create mode 100755 support/sdk/python/motenet/server.py create mode 100755 support/sdk/python/motenet/test.py diff --git a/support/sdk/README b/support/sdk/README new file mode 100644 index 0000000000..9ba6d6844f --- /dev/null +++ b/support/sdk/README @@ -0,0 +1,17 @@ + +Support Routines and Libraries. + + +motenet (v1.1) +MoteNet provides a Socket Library of TinyOS Network Communications.... +(1.1 adds initial python bindings) + +netlib +NetLib provides misc. networking library routines. (used by motenet) + +sf - serial forwarder +original mote to outside world gateway. superseded by motenet. + +6lowpan +blip +coap diff --git a/support/sdk/python/motenet/SockTest.zip b/support/sdk/python/motenet/SockTest.zip new file mode 100755 index 0000000000000000000000000000000000000000..17507eb70ae25a002a948c06d79ffe96fe046d3b GIT binary patch literal 2249 zcmaKudpr~BAIFC=n_Co0O*-kQ<72oH$^0QZ3a0917AOu`aea3K_392QRs!I7yrvQ7vt5Qn9}g2JPmCz2=h zwnUA(+8Qa`>ooSCmlThdCPIo47{iZD?G&H%(EwkLC7C*Om*2xEv>AucO;~Whv`5*Y z4I}yE_7yv-BoHTE{n=yv{c`RHI$F72Pj?N*RyWf}O7%G>{z$H*b$<0GW%(lio|4epa3ZhYeR3xqb)ggV=mlA-kW6fhKDKy}Hh*hxJ5 zdw3(|!Q<=;jj47c`*vMe2v?F|6KtO|3$#$ejxxR6eANUbq4O5uN|(5GDd9bH{9n=a z&{dM0a_G;Hutl`bm}*%K7ns>efoz&&Un!?0NS0O3(quTHn$DGSH6(?bZYPh@9hN_= z%S;F&bypi$*Og;3Os59SB7NKbax){Tc{q}E+RbW>sz3T(Iv*3YA!uxCch`w|RI}$L z2JuEQ9%Bpg3}TyvSqnXnXWl#@xG|%zk#M1+q{#i(u72FxEi>TCBDAaYYL9L8)pmSI zzsCV&$h#uRWi%y6Dm>WsXV#+cb3&S(-g?HQ@||hr3nw_;drkBgyjrQb9Z%k>?BN<{ zY31QImb5KmLU(kx6fp^BikBPfyE)Ao5@&it2H?rMj3X*qBsEPjbN|Q^I$0Ajw<5KF zVXog!5ui(sW(6qtNmuUXZCbgy*sl#t--u%yMUdAf5tsFQymYyc#b%Ptnp)l((IO0{SuzfsuU(!lD>I-bC2?nONyCag#MX;Te z1OT>v3)?5^oT+3HVr?#VDI&y7MxSr$1WHj-ar#~tGtAMttT=04eKp+8m5For zR1rW-Y4CMpNFtvvv6j9F#Xs_bNp>yk$2P;1t}kx`9^3-)jZ4v~KMJDy9`&qxL@ z^44-ndpYyeH%v8gI%(kyHYcbyuL@}?XmMHZ33=utl~_VN)i@ATuR{jEIehP&bpa*V zIdyh?1mK~^7Zm zc_r8(md{j~&Z``YY57f=-!=Mi33b9HC8dNw2UfJXrH8>F%q#ScQ+N-&B}UEna$D66 zm_(bBSW)x&-qMaP&|brkXfYc(Pa%s}2>zfyOo__o`O{uR@~(>~VYsROdu6vCK;@}V zdK*Vf?Ax1`m`FQr!mra%bg`^8f{C}Q?V8JU=if6_!#WUPy>u$S{Eu=E_*?*Un-9K$3_%#c!FTB0@eBmy>Bn=+=`>rD^QTg<)wPva(1Z=A{bnJBvT_=e`ar!cYk&RoixTq0Bo#D)nri?S zNz{P+-ivLFzrh?+T4L6WyaoD0t{Kv*NCBmqpnkP@sq48BAX_ajXm;{21R0P{?K76* z3CYTCLY$lFS;jeL?$n_Py5U-R6C)cE`lCj&)g_sz(hi@lQ9XW8{c+6=f<{AH58@#Aw)4b$hvD9&sOKW@JbAb`(1~FAO^O(z_t2 z_om@_+7El4;R_|Uc3F5!&hBz|XsF&kZOj{@sH1wY=972!!c)w0GiFVn$(N^tFaHT# z)|O4lmPu(X9a?$^+ZjSW(t+hv9!3*0p%$t+-7(jP@JZ;0chv_CW|I&{MrG+fl2_)D z+$}S`#4Q?ug&)~L-G9VPKzq$T%20Zmet|w+7Kjk2SFSQApoJm#UGW4Zi zXVmH(#P(V8`e5t}SBDWzbS$sk>DltnQez;v!Z2Od>(;+FhWESOoW7JAK- z@2{OPF7NS}VzLi=-sT(O8?&o?J@`ya-$;oMe6;LE>otQeL@{t}bbF;&Uj?Q`--s^)|8>~6;r|50 d*Kn-V_u-%MK-ox&9smHKXv&Hxx&!)j`Zpz#+Nb~k literal 0 HcmV?d00001 diff --git a/support/sdk/python/motenet/SockTest/client.py b/support/sdk/python/motenet/SockTest/client.py new file mode 100755 index 0000000000..239a7540af --- /dev/null +++ b/support/sdk/python/motenet/SockTest/client.py @@ -0,0 +1,43 @@ +#!/usr/bin/env python3 + +import pdb +import socket +import sys + +HOST = '192.168.1.7' #'fe80::f129:4d8a:2a6e:7a3d' +UDPSAM_BASE = 0x2e00 # where the types start. (11776 (0x2e00) - 12031 (0x2eff)) +PORT = UDPSAM_BASE + 0xa1 # MM Ctrl port (161, A1) + +s = None + +print('Starting socket') + +res = socket.getaddrinfo(HOST, PORT, socket.AF_UNSPEC, socket.SOCK_DGRAM) +print(res) +for r in res: + af, socktype, proto, canonname, sa = r + print(r) +# pdb.set_trace() + try: + s = socket.socket(af, socktype, proto) + except socket.error as msg: + print("socket_socket error: {}".format(msg)) + s = None + continue + try: + s.connect(sa) + except socket.error as msg: + s.close() + s = None + continue + break + +if s is None: + print('could not open socket') + sys.exit(1) + +s.send(b'Hello Carl!') +print(s.getsockname()) +data, ra = s.recvfrom(1024) +s.close() +print('Received', repr(data)) diff --git a/support/sdk/python/motenet/SockTest/server.py b/support/sdk/python/motenet/SockTest/server.py new file mode 100755 index 0000000000..8eee9ae76f --- /dev/null +++ b/support/sdk/python/motenet/SockTest/server.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python3 + +import pdb +import socket +import sys + +UDPSAM_BASE = 0x2e00 # where the types start. (11776 (0x2e00) - 12031 (0x2eff)) +PORT = UDPSAM_BASE + 0xa1 # MM Ctrl port (161, A1) + +s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM) +try: + s.bind(('', PORT)) +except socket.error as err: + print("Couldn't be a udp server on port %d : %s" % (PORT, err)) + raise SystemExit + +while True: + datagram = s.recv(1024) + if not datagram: + break + # do something +s.close() diff --git a/support/sdk/python/motenet/SockTest/v4tst.py b/support/sdk/python/motenet/SockTest/v4tst.py new file mode 100755 index 0000000000..deb2554459 --- /dev/null +++ b/support/sdk/python/motenet/SockTest/v4tst.py @@ -0,0 +1,21 @@ +#Echo client program +import socket + +HOST = '192.168.1.132' +PORT = 50007 +s = socket.socket(socket.AF_INET, socket.SOCK_STREAM) +print('s is:', s) +s.connect((HOST, PORT)) +print('s.connect is:', s.connect) +out_chars = 'Hey Carl' +while(len(out_chars) > 0): + still_send = s.send(out_chars) + out_chars = out_chars[still_send:] + +#If you can use a blocking socket, use sendall() +#When using _DGRAM use socket.sendto(data,address) + +data = s.recv(1024) +print('data is:', data) +s.close() +print 'Received ', repr(data) diff --git a/support/sdk/python/motenet/client.py b/support/sdk/python/motenet/client.py new file mode 100755 index 0000000000..fe4cea6281 --- /dev/null +++ b/support/sdk/python/motenet/client.py @@ -0,0 +1,37 @@ +#!/usr/bin/env python3 + +import pdb +import socket +import dspsock +import sys + +sys.path.insert(0, '../misc') +from hexdump import * + +AF_INET = socket.AF_INET +SOCK_DGRAM = socket.SOCK_DGRAM + +port = 8081 +host = "192.168.1.7" + +s = socket.socket(AF_INET, SOCK_DGRAM) +pdb.set_trace() +sa = s.getsockname() +da = (host, port) + +s.connect(da) + +out = ' '.join([repr(da), repr(sa)]).encode() + b' : cmd' +print(b2str(out)) +#s.send(out) + +data, addr = s.recvfrom(1024) +#data = s.recv(1024) +print("{:s} <{:s}>".format(b2str(data), addr)) + +s.send(out) +data = s.recv(1024) +print(data, "+", addr, "+") + +print +print(sys.version) diff --git a/support/sdk/python/motenet/dspsock.py b/support/sdk/python/motenet/dspsock.py new file mode 100755 index 0000000000..e7da1b4d82 --- /dev/null +++ b/support/sdk/python/motenet/dspsock.py @@ -0,0 +1,55 @@ +#!/usr/bin/env python3 + +import pdb +from socket import * + +AF_AM = 20 + +af_dict = { AF_INET : 'ipv4', \ + AF_INET6 : 'ipv6', \ + AF_UNIX : 'unix', \ + AF_AM : 'am', \ + AF_UNSPEC : 'unspec' \ + } + +sock_dict = { SOCK_STREAM : 'stream', \ + SOCK_DGRAM : 'dgram', \ + SOCK_RAW : 'raw' \ + } + +proto_dict = { IPPROTO_UDP : 'udp', \ + IPPROTO_TCP : 'tcp', \ + IPPROTO_RAW : 'raw' \ + } + + +def dsp_af(af): + fam = af_dict.get(af, 'af_none') + return fam + +def dsp_type(st): + t = sock_dict.get(st, 'sock_none') + return t + +def dsp_proto(sp): + p = proto_dict.get(sp, 'proto_none') + return p + +def dsp_addrinfo(ai): + af, st, p, cn, sa = ai + return "({:s}, {:s}, {:s}, '{:s}', {:s})".format(dsp_af(af), dsp_type(st), dsp_proto(p), cn, repr(sa)) + + +import socket + +def main(): +# pdb.set_trace() + res = socket.getaddrinfo("localhost", "", socket.AF_UNSPEC) + print(res) + for res in socket.getaddrinfo("localhost", "", socket.AF_UNSPEC): + af, st, p, cn, sa = res + print("{:s} \t: {:s}".format(repr(res), dsp_addrinfo(res))) + + +if __name__ == '__main__': + main() diff --git a/support/sdk/python/motenet/dspsock.pyc b/support/sdk/python/motenet/dspsock.pyc new file mode 100644 index 0000000000000000000000000000000000000000..019f1ae52d1ca0b5810d542fe9f3526bfdcc88a8 GIT binary patch literal 2310 zcmc&#TW{k;6h31oX_KaV>9z=XKot+HS+N^wh5E2u)T-^SDzs_Uq$;XFmhnusZsQB~ z7+R4?Nac_4cX;48@ttF*WUImhP~pTg-#Ifrp7WiH_q)rT&0jZPhctIJfj4m%zhlt& zD;g7>RM?@hqM>%_#G$B3xIr)D08VZnQfSb{1U#{4DZ>-UA%+A5}hfU$l0zOngS~tc)YJ) zE?^8sev&3eG&6;cLMx`<7+WpK@kXK>1+jMOLKY`Lpa&Jcj58qxWI8V75rDsDJ2O zn{B}IoO{=*+Z`;d1k2u$dy6;_yJs&m^8p|3Upm-7@UG} z=s_znmFnX7_DwtAe!&}W4Hlk8w?0Eenzb3*ssUOKTmAksI@W|Jamx3F*l`*LplxC?XKM?~IvbqJBmLd3(ZW3eKQ z_4>)ZgM-8U;l6*gb0Be=$;0ipWq$fbhvM{<(2V}B_HL%T6eDv})070U0Zp(~eU=3M rr{5-K;PW`u<=A}5iBmkm&{Z9$<#g17{5me9dTg|-U$g79+g Date: Sat, 17 Nov 2012 11:56:42 -0800 Subject: [PATCH 301/411] usci: nuke unused LocalTimeMilliC. (replaced by Platform uSec interface) --- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc | 3 --- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc | 3 --- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc | 3 --- tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc | 3 --- 4 files changed, 12 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc index 08287ec55c..07c5bda113 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB0P.nc @@ -78,7 +78,4 @@ implementation { Platform = I2CP; SCL = I2CP.SCL; SDA = I2CP.SDA; - - components LocalTimeMilliC; - I2CP.LocalTime_bms -> LocalTimeMilliC; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc index a4c9c5fb39..eb5221eb4a 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB1P.nc @@ -80,7 +80,4 @@ implementation { Platform = I2CP; SCL = I2CP.SCL; SDA = I2CP.SDA; - - components LocalTimeMilliC; - I2CP.LocalTime_bms -> LocalTimeMilliC; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc index 01d9be1ecc..adef2e18eb 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB2P.nc @@ -80,7 +80,4 @@ implementation { Platform = I2CP; SCL = I2CP.SCL; SDA = I2CP.SDA; - - components LocalTimeMilliC; - I2CP.LocalTime_bms -> LocalTimeMilliC; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc index 1c86cc18c8..04e9d4e52a 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/Msp430UsciI2CB3P.nc @@ -80,7 +80,4 @@ implementation { Platform = I2CP; SCL = I2CP.SCL; SDA = I2CP.SDA; - - components LocalTimeMilliC; - I2CP.LocalTime_bms -> LocalTimeMilliC; } From 662940f44a41b99fb04b65e18fef84b31ba80d28 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Nov 2012 12:05:30 -0800 Subject: [PATCH 302/411] msp430/i2c: nuke duplicate i2c.h files, update i2c.h. add I2C_RESTART, add TI2C{7,10}Bit and associated notes. --- tos/chips/msp430/x2xxx/usci-bf/I2C.h | 54 --------------------------- tos/chips/msp430/x5xxx/usci-bf/I2C.h | 55 ---------------------------- tos/types/I2C.h | 28 +++++++++++++- 3 files changed, 27 insertions(+), 110 deletions(-) delete mode 100644 tos/chips/msp430/x2xxx/usci-bf/I2C.h delete mode 100644 tos/chips/msp430/x5xxx/usci-bf/I2C.h diff --git a/tos/chips/msp430/x2xxx/usci-bf/I2C.h b/tos/chips/msp430/x2xxx/usci-bf/I2C.h deleted file mode 100644 index 94840a2296..0000000000 --- a/tos/chips/msp430/x2xxx/usci-bf/I2C.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - * @author Phil Buonadonna - * @author Philip Levis - */ - -#ifndef _I2C_H -#define _I2C_H - -typedef struct { } TI2CExtdAddr; -typedef struct { } TI2CBasicAddr; - -typedef uint8_t i2c_flags_t; - -enum { - I2C_START = 0x01, - I2C_STOP = 0x02, - I2C_ACK_END = 0x04, - I2C_RESTART = 0x08, -}; - - -#endif /* _I2C_H */ diff --git a/tos/chips/msp430/x5xxx/usci-bf/I2C.h b/tos/chips/msp430/x5xxx/usci-bf/I2C.h deleted file mode 100644 index fd3f9a889a..0000000000 --- a/tos/chips/msp430/x5xxx/usci-bf/I2C.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2005-2006 Arch Rock Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @author Phil Buonadonna - * @author Philip Levis - */ - -#ifndef _I2C_H -#define _I2C_H - -typedef struct { } TI2CExtdAddr; -typedef struct { } TI2CBasicAddr; - -typedef uint8_t i2c_flags_t; - -enum { - I2C_START = 0x01, - I2C_STOP = 0x02, - I2C_ACK_END = 0x04, - I2C_RESTART = 0x08, -}; - -#endif /* _I2C_H */ diff --git a/tos/types/I2C.h b/tos/types/I2C.h index 534648fbf3..c0286f4e9c 100644 --- a/tos/types/I2C.h +++ b/tos/types/I2C.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2005-2006 Arch Rock Corporation + * Copyright (c) 2012, Eric B. Decker * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -16,7 +17,7 @@ * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, @@ -32,20 +33,45 @@ /** * @author Phil Buonadonna * @author Philip Levis + * @author Eric B. Decker */ #ifndef _I2C_H #define _I2C_H +/* + * It would be nice to deprecate TI2CExtdAddr and TI2CBasicAddr + * and replace them with TI2C7Bit and TI2C10Bit. + * + * But there is way too much code that uses TI2CBasicAddr and BasicAddr + * and it would be a pain to fix all that. Also adding a backward + * compatible interface to code providing BasicAddr is a pain because + * of the signalling. More trouble than it is worth. + * + * So keep in mind that TI2CBasicAddr is really TI2C7Bit. + */ + +/* nobody uses ExtdAddr (10 bit) address but define it anyway */ typedef struct { } TI2CExtdAddr; + +/* + * BasicAddr (7 bit addresses) is used all over the place. + * so back filling isn't recommended. New code should use + * TI2C7Bit. But that is also problematic. If so stick with + * TI2CBasicAddr. + */ typedef struct { } TI2CBasicAddr; +typedef struct { } TI2C7Bit; +typedef struct { } TI2C10Bit; + typedef uint8_t i2c_flags_t; enum { I2C_START = 0x01, I2C_STOP = 0x02, I2C_ACK_END = 0x04, + I2C_RESTART = 0x08, }; From 812bd3350194e6f82f5f3f790ba605d252b1d080 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Nov 2012 12:21:37 -0800 Subject: [PATCH 303/411] i2c: remove I2CReg.timeout signal. Replaced by Panic/Platform call outs. --- tos/interfaces/I2CReg.nc | 6 ------ 1 file changed, 6 deletions(-) diff --git a/tos/interfaces/I2CReg.nc b/tos/interfaces/I2CReg.nc index 5de7a93bd7..190599afee 100644 --- a/tos/interfaces/I2CReg.nc +++ b/tos/interfaces/I2CReg.nc @@ -64,8 +64,6 @@ interface I2CReg { * * RETURNS: SUCCESS yum * ETIMEOUT operation would timeout. - * - * can also signal I2CReg.timeout() */ async command error_t reg_read(uint16_t slave_addr, uint8_t reg, uint8_t *val); async command error_t reg_read16(uint16_t slave_addr, uint8_t reg, uint16_t *val); @@ -81,8 +79,6 @@ interface I2CReg { * * RETURNS: SUCCESS yum * ETIMEOUT operation would timeout. - * - * can also signal I2CReg.timeout() */ async command error_t reg_readBlock(uint16_t slave_addr, uint8_t reg, uint8_t num_bytes, uint8_t *buf); @@ -97,8 +93,6 @@ interface I2CReg { * * RETURNS: SUCCESS yum * ETIMEOUT operation would timeout. - * - * can also signal I2CReg.timeout() */ async command error_t reg_write(uint16_t slave_addr, uint8_t reg, uint8_t val); async command error_t reg_write16(uint16_t slave_addr, uint8_t reg, uint16_t val); From c6e2da4c53ced77821f831e435c3a30543d97bd6 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Nov 2012 12:34:24 -0800 Subject: [PATCH 304/411] i2c: i2cpacket, TI2C{7,10}Bit, update documentation - add TI2C{7,10}Bit definitions, and comments about TI2C7Bit and TI2CBasicAddr equivalence. - add documentation about using I2CPacket for split bus transactions. - add I2C_RESTART, used for split bus transactions. --- tos/interfaces/I2CPacket.nc | 59 ++++++++++++++++++++++++++++++++----- 1 file changed, 52 insertions(+), 7 deletions(-) diff --git a/tos/interfaces/I2CPacket.nc b/tos/interfaces/I2CPacket.nc index 1c48fd6eab..3f3bb6d5ed 100644 --- a/tos/interfaces/I2CPacket.nc +++ b/tos/interfaces/I2CPacket.nc @@ -1,6 +1,6 @@ -// $Id: I2CPacket.nc,v 1.7 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. + * Copyright (c) 2012, Eric B. Decker * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -37,21 +37,64 @@ * has control of that buffer and returns it when the operation has * completed. The I2CPacket interface supports master-mode communication * and provides for multiple repeated STARTs and multiple reads/writes - * within the same START transaction. + * within the same START transaction. + * * The interface is typed according to the address size supported by * the master hardware. Masters capable of supporting extended (10-bit) - * I2C addressing MUST export both types. Applications should use the - * smallest address size to ensure best portability. + * I2C addressing MUST export both types (although there is no particular + * reason why). Applications should use the smallest address size to + * ensure best portability. Typical I2C chips only support 7 bit addresses. * * @param addr_size A type indicating the slave address size. Supported - * values are TI2CExtdAddr (for 10-bit addressing) and TI2CBasicAddr (7-bit - * addressing). + * values are TI2C10Bit (aka TI2CExtdAddr) and TI2C7Bit (aka TI2CBasicAddr). + * + * There is a significant amount of code that uses TI2CBasicAddr so + * transitioning to TI2C7Bit is problematic. At some point if we want + * to spend the effort moving to TI2C7Bit would be reasonable. In the + * meantime just use TI2CBasicAddr keeping in mind that it really means + * TI2C7Bit which hopefully you'll agree is a better more understandable + * name. + * + * flags control how the driver handles the bus. + * + * A single transaction is specified with I2C_START and I2C_STOP. + * + * A repeated transaction is started with I2C_START. Repeated calls + * to I2CPacket can be made, with the last call specifing I2C_STOP. + * For correct operation, one must understand exactly how the h/w + * behaves across these calls. Double buffered h/w greatly impacts + * how these multiple transactions function. + * + * The bus can be turned around by specifing another I2C_START in the + * call without an intervening I2C_STOP. I2C_STOP can be specified + * on the same transaction of the final transaction. + * + * for example: reading a register. + * + * Note: I2CPacket is split phase so has significant overhead and + * the following code needs to be implemented using split phase + * techniques. I2CReg is a single phase, busy wait implementation. + * + * uint8_t reg_buf[1] = ; + * uint8_t reg_data[2]; + * call I2CPacket.write(I2C_START, DEV_ADDR, 1, reg_buf); + * <-- I2CPacket.writeDone(...); + * call I2CPacket.read(I2C_RESTART | I2C_STOP, DEV_ADDR, 2, reg_data); + * <-- I2CPacket.readDone(...); + * + * because there is no intervening I2C_STOP between the two calls, the + * second call (read) will turn the bus around without releasing + * arbitration. + * + * Normally, the bus is checked for busy prior to starting a transaction. + * RESTART is needed to abort this check because the bus can very easily + * be in a busy state left over from the previous transaction. * * @author Joe Polastre * @author Phil Buonadonna * @author Jonathan Hui * @author Phil Levis - * Revision: $Revision: 1.7 $ + * @author Eric B. Decker */ #include @@ -67,6 +110,7 @@ interface I2CPacket { * packet if set. * I2C_ACK_END - ACK the last byte if set. Otherwise NACK last byte. This * flag cannot be used with the I2C_STOP flag. + * I2C_RESTART - restarting an I2C transaction (turn bus around). * @param addr The slave device address. Only used if I2C_START is set. * @param length Length, in bytes, to be read * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read into @@ -83,6 +127,7 @@ interface I2CPacket { * of the packet if set. * I2C_STOP - The STOP condition is transmitted at the end of the * packet if set. + * I2C_RESTART - restarting an I2C transaction (turn bus around). * @param addr The slave device address. Only used if I2C_START is set. * @param length Length, in bytes, to be read * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read into From 565cd69dcbe5474d887f3b3d2f4b32e5dee46b8a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Nov 2012 12:44:08 -0800 Subject: [PATCH 305/411] x5 usci: update README to reflect generation instructions. --- tos/chips/msp430/x5xxx/usci-bf/README.txt | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/README.txt b/tos/chips/msp430/x5xxx/usci-bf/README.txt index aca8d1bd33..a9a006eebc 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/README.txt +++ b/tos/chips/msp430/x5xxx/usci-bf/README.txt @@ -1,6 +1,7 @@ -This directory contains support for the Universal Serial Controller -Interface as implemented on MSP430 chips in families 4xx, 5xx, and some -chips in the 2xx family. +This directory contains support for the TI x5 cpu Universal Serial Controller +(USCI). While it would really be nice to have merged support for both the +x2 and x5 versions of the USCI support, there are major structural differences +that make this problematic. See tos/chips/msp430/02_Serial for an analysis. ============================== @@ -70,6 +71,10 @@ worth running: to clear the clutter out of the way. +When you are happy with the changes to the master files, regenerate all +the clones by simply running generate.sh (./generate.sh to a shell). + + Common USCI Support ------------------- @@ -136,8 +141,11 @@ Notes: When setting the address of the slave device remember you only need the 7 bits, most devices datasheets show the address in a 8bit format, e.g 24lc1025 address is 0xA0, this turns into 0x50, the 7 msb's right shifted one, the read/right bit is added by -the UART when you select the read/write function of the UART in I2C mode. +the I2C h/w when the transaction is started. The I2C address registers assume the +right shifted (actual address). When writing to a device multiple times, check the data sheet for write times, you -need to give the device time to commit before you write again else the I2CPacket.write -will FAIL. This of course depends on the device. +need to give the device time to commit before you write again else the i2c access +function will FAIL. This of course depends on the device. This failure may or may +not be detected (most likely not) by the local to the cpu USCI h/w. It depends on +the chip that is being interfaced to via the I2C bus. From 077f12948a8d5bb7e6744f4f732d3ca5523ed898 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Nov 2012 12:48:07 -0800 Subject: [PATCH 306/411] msp430 x5: bring in rewritten i2c driver. --- .../x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc | 1371 ++++++++++++----- .../x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc | 627 ++++---- 2 files changed, 1297 insertions(+), 701 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc index 8b20551a08..8e5716efb0 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/i2c-mm/Msp430UsciI2CP.nc @@ -1,11 +1,9 @@ /* * Copyright (c) 2012 Eric B. Decker - * Copyright (c) 2011 John Hopkins University - * Copyright (c) 2011 Redslate Ltd. - * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * * Multi-Master driver. + * (NEEDS TO BE TESTED) * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -40,26 +38,69 @@ * Implement the I2C-related interfaces for a MSP430 USCI module * instance. Multi-Master driver. * - * port of usci gen 1 (john hopkins) implementation of i2c + * Originally started with the Multi-Master i2c driver from John + * Hopkins (Doug Carlson, et. al.). From the USCI gen 1 port. + * + * Completely rewritten to simplify and verified for proper operation + * at 400 KHz. Previous drivers worked at 100 KHz but not at 400 KHz. + * + * This code is based on the single master driver rewrite with multi-master + * additions. + * + * Uses Panic to call out abnormal conditions. These conditions are + * assumed to be out of normal behaviour and aren't recoverable. + * + * Uses Platform to obtain raw timing information for timeout functions. + * + * WARNING: By default, null versions for both Panic and timing modules are + * used. This effectively disables any timeout checks or panic invocations. + * This preserves the original behaviour and doesn't require changing lots + * of things all at once. When a Platform wants to use the new functionality + * it can wire in the required components. This is the recommended + * configuration + * + * To enable Panic signalling and timeout functions, you must wire in + * appropriate routines into Panic and Platform in this module. + * + * WARNING: If you don't wire in platform timing functions, it is possible + * for routines in this module to hang in an infinite loop. If a platform + * has enabled a watchdog timer, it is possible that the watchdog would + * then be invoked. Most platforms don't enable the watchdog. + * + * It is recommended that you define REQUIRE_PLATFORM and REQUIRE_PANIC in + * your platform.h file. This will require that appropriate wiring exists + * for Panic and Platform and is wired in. + * + * @author Eric B. Decker + * + * previous authors... But it has been completely rewritten. * * @author Doug Carlson * @author Marcus Chang * @author Peter A. Bigot * @author Derek Baker - * @author Eric B. Decker */ -#include #include "msp430usci.h" #include +#ifndef PANIC_I2C + +enum { + __panic_i2c = unique(UQ_PANIC_SUBSYS) +}; + +#define PANIC_I2C __panic_i2c +#endif + + generic module Msp430UsciI2CP () @safe() { provides { interface I2CPacket as I2CBasicAddr[uint8_t client]; + interface I2CReg[uint8_t client]; interface I2CSlave[uint8_t client]; interface ResourceConfigure[uint8_t client]; interface Msp430UsciError[uint8_t client]; - interface Panic; } uses { interface HplMsp430Usci as Usci; @@ -68,82 +109,105 @@ generic module Msp430UsciI2CP () @safe() { interface HplMsp430GeneralIO as SCL; interface Msp430UsciConfigure[uint8_t client]; interface ArbiterInfo; - interface LocalTime as LocalTime_bms; + interface Panic; + interface Platform; } } implementation { - enum{ - SLAVE = 0, - MASTER_READ = 1, + + enum { + MASTER_IDLE = 0, + MASTER_READ = 1, MASTER_WRITE = 2, + SLAVE = 3, + + /* + * Time based timeouts. Given 100 KHz, 400 uS should be plenty, but + * this doesn't handle clock stretching. The time out code needs + * to handle this special. And still needs to make sure that we + * don't hang. While still giving the h/w long enough to complete + * its bus transaction. + * + * For the time being we ignore clock stretching. Cross that bridge + * if the troll climbs out from underneath. + * + * Timeout is in either uS or uiS depending on what the base clock + * system is set for. Just set it high enough so it doesn't matter. + */ + I2C_MAX_TIME = 400, /* max allowed, 400 uS (uis) */ }; - norace uint8_t* m_buf; - norace uint8_t m_len; - norace uint8_t m_pos; - norace uint8_t m_action; - norace i2c_flags_t m_flags; - - void showRegisters(); - void nextRead(); - void nextWrite(); - void signalDone( error_t error ); - - void printRegisters(){ - printf("---\n\r"); - printf(" CTL0: %x\n\r", call Usci.getCtl0()); - printf(" CTL1: %x\n\r", call Usci.getCtl1()); +#define __PANIC_I2C(where, x, y, z) do { \ + call Panic.panic(PANIC_I2C, where, call Usci.getModuleIdentifier(), \ + x, y, z); \ + force_idle(); \ + } while (0) - //printf(" CTLW: %x\n\r", call Usci.getCtlw0()); - //printf(" BRw: %x\n\r", call Usci.getBrw()); + norace uint8_t* m_buf; + norace uint8_t m_len; + norace uint8_t m_pos; + norace uint8_t m_left; + norace uint8_t m_action; + /* TRUE if TXSTART issued */ + norace uint8_t m_started; /* 1 if started, 0 otherwise */ + norace i2c_flags_t m_flags; /* START, STOP, RESTART, etc. */ - printf(" OA: %x\n\r", call Usci.getI2Coa()); - printf(" SA: %x\n\r", call Usci.getI2Csa()); - printf(" IE: %x\n\r", call Usci.getIe()); - printf(" IFG: %x\n\r", call Usci.getIfg()); - printf("---\n\r"); - } - error_t configure_(const msp430_usci_config_t* config){ - if(! config){ - return FAIL; - } + error_t configure_(const msp430_usci_config_t* config) { + if (!config) + return FAIL; /* does anyone actually check? */ - //basic config (leave in reset) call Usci.configure(config, TRUE); - - //direction is don't-care in datasheet call SCL.selectModuleFunc(); call SDA.selectModuleFunc(); - - //i2c-specific config call Usci.setI2Coa(config->i2coa); call Usci.leaveResetMode_(); + m_action = SLAVE; - //enable slave-start interrupt, clear the rest - call Usci.setIe((call Usci.getIe() & (BIT7|BIT6)) | UCSTTIE); + /* + * Turn on START interrupt. Used for when we are the slave end + * and someone else is trying to talk to us... + * + * But is anything wired in and ready to receive the incoming? + */ + call Usci.setIe(UCSTTIE); return SUCCESS; } - error_t slaveIdle(){ - - //only reset if we are master: if we are already slave we don't - //want to clear any state flags by accident. - if (call Usci.getCtl0() & UCMST){ + error_t force_idle() { + /* + * force the h/w back to idle. That means take the h/w + * out of master (force back to slave, just in case someone + * is trying to talk to us). + * + * If already a Slave don't reset the beasty, preserve any + * state currently present. + * + * Should this actually leave the h/w in reset? force_idle + * only gets called after something goes wrong. But our + * default state is to be in Slave mode. + */ + if (call Usci.getCtl0() & UCMST) { call Usci.enterResetMode_(); - call Usci.setCtl0(call Usci.getCtl0() & ~UCMST); + call Usci.andCtl0(~UCMST); call Usci.leaveResetMode_(); } - - //enable slave-start, clear the rest - call Usci.setIe((call Usci.getIe() & (BIT7|BIT6)) | UCSTTIE); + call Usci.setIe(UCSTTIE); m_action = SLAVE; return SUCCESS; } - error_t unconfigure_(){ + + /* + * We assume that the pins being used for SCL/SDA have been set up + * or left (initial state) as input (DIR set to 0 for the pin). + * When we deselect the pins from the module, the pins will go + * back to inputs. The module itself is kept in reset. This + * configuration should be reasonable for lowish power. + */ + error_t unconfigure_() { call Usci.enterResetMode_(); call SCL.selectIOFunc(); call SDA.selectIOFunc(); @@ -153,434 +217,488 @@ implementation { async command void ResourceConfigure.configure[ uint8_t client ]() { configure_(call Msp430UsciConfigure.getConfiguration[client]()); } - + async command void ResourceConfigure.unconfigure[ uint8_t client ]() { unconfigure_(); } - - /*************************************************************************/ - async command error_t I2CBasicAddr.read[uint8_t client]( i2c_flags_t flags, - uint16_t addr, uint8_t len, - uint8_t* buf ) { - //According to TI, we can just poll until the start condition - //clears. But we're nervous and want to bail out if it doesn't - //clear fast enough. This is how many times we loop before we - //bail out. - - uint16_t counter = I2C_ONE_BYTE_READ_COUNTER; + /* + * Set up for a transaction. + * + * First, reset the module. This will blow away pending interrupts and + * interrupt enables. Will this also make it impossible for the bus + * to be busy? + * + * Reset and then make sure the bus isn't busy. Since this is the + * multi-master driver we want to set MST as we are preparing to go + * on the bus. + */ + + error_t start_check_busy() { + uint16_t t0, t1; + + call Usci.enterResetMode_(); // blow any cruft away + call Usci.orCtl0(UCMST); // force into master + call Usci.leaveResetMode_(); // trying to talk + + t0 = call Platform.usecsRaw(); + while (call Usci.isBusBusy()) { + t1 = call Platform.usecsRaw(); + if (t1 - t0 > I2C_MAX_TIME) { + __PANIC_I2C(1, t1, t0, 0); + return EBUSY; + } + } + return SUCCESS; + } - m_buf = buf; - m_len = len; - m_flags = flags; - m_pos = 0; - m_action = MASTER_READ; - /* check if this is a new connection or a continuation */ - if (m_flags & I2C_START) { - //TODO: if reset can be removed, can we consolidate this with - //the repeated-start? - call Usci.enterResetMode_(); - call Usci.setCtl0(call Usci.getCtl0() | UCMST); - call Usci.leaveResetMode_(); + /* + * Wait for a CTRL1 signal to deassert. These in particular + * are UCTXNACK (Nack), UCTXSTP (Stop), and UCTXSTT (Start). + * Typically only Stop and Start are actually looked at. + */ + error_t wait_deassert_ctl1(uint8_t code) { + uint16_t t0, t1; - // set slave address - call Usci.setI2Csa(addr); + t0 = call Platform.usecsRaw(); - //check bus status at the latest point possible. - if ( call Usci.getStat() & UCBBUSY ){ - //if the bus is busy, bail out real quick - slaveIdle(); - return EBUSY; + /* wait for code bits to go away */ + while (call Usci.getCtl1() & code) { + t1 = call Platform.usecsRaw(); + if (t1 - t0 > I2C_MAX_TIME) { + __PANIC_I2C(2, t1, t0, 0); + return ETIMEOUT; } - //clear TR bit, set start condition - call Usci.setCtl1( (call Usci.getCtl1()&(~UCTR)) | UCTXSTT); + } + return SUCCESS; + } - //enable i2c arbitration interrupts, rx, clear the rest - call Usci.setIe( (call Usci.getIe() & (BIT7|BIT6)) | UCNACKIE |UCALIE |UCRXIE); - /* - * if only reading 1 byte, STOP bit must be set right after - * START condition is triggered - */ - if ( (m_len == 1) && (m_flags & I2C_STOP) ) { - //this logic seems to work fine - /* wait until START bit has been transmitted */ - while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ - counter--; - } - /* set stop bit */ - //UCB0CTL1 |= UCTXSTP; - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + /* + * wait_ifg: wait for a particlar USCI_IFG bit to pop + * + * uses I2C_MAX_TIME to time out the access + * checks for UCNACKIFG, if it pops abort + * + * UCNAKIFG simply panics which also yields a i2c h/w reset. + * It doesn't send a STOP on the bus which may confuse some + * devices. It is assumed this is a single master system + * and new transactions will start with a TXSTART which + * should reset all devices out there to start looking + * properly. + * + * It may be necessary to change the NACK abort code so + * it issues a STOP prior to panicing just to clean the + * bus up. + */ + error_t wait_ifg(uint8_t code) { + uint16_t t0, t1; + uint8_t ifg; + + t0 = call Platform.usecsRaw(); + while (1) { + ifg = call Usci.getIfg(); + if (ifg & UCNACKIFG) { // didn't respond. + __PANIC_I2C(3, ifg, 0, 0); + return EINVAL; } - } else if (m_flags & I2C_RESTART) { - /* set slave address */ - call Usci.setI2Csa(addr); - - //clear TR bit, start - /* UCTXSTT - generate START condition */ - //UCB0CTL1 |= UCTXSTT; - call Usci.setCtl1((call Usci.getCtl1() & ~UCTR) | UCTXSTT); - - //enable i2c arbitration interrupts, rx, clear the rest - call Usci.setIe( (call Usci.getIe() & (BIT7|BIT6)) | UCNACKIE |UCALIE |UCRXIE); - - /* if only reading 1 byte, STOP bit must be set right after START bit */ - if ( (m_len == 1) && (m_flags & I2C_STOP) ) { - /* wait until START bit has been transmitted */ - while ((call Usci.getCtl1() & UCTXSTT) && (counter > 0x01)){ - counter--; - } - /* set stop bit */ - //UCB0CTL1 |= UCTXSTP; - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + if (ifg & code) break; + t1 = call Platform.usecsRaw(); + if (t1 - t0 > I2C_MAX_TIME) { + __PANIC_I2C(4, t1, t0, 0); + return ETIMEOUT; } - } else { - //TODO: test - nextRead(); - } - if (counter > 0x01){ - return SUCCESS; - } else { - return FAIL; } + return SUCCESS; } - void nextRead() { - uint16_t counter = 0xFFFF; - - if ((m_pos == (m_len - 2)) && m_len > 1) { - //we want to send NACK + STOP in response to the last byte. - //if m_pos == m_len-2 and we get the RX interrupt, that means - // that the slave has already written the next-to-last byte - // and we have acknowledged it--BUT we have not yet read it. - //By setting the stop condition here, we say "send STOP after - //the next byte," which will actually be the last byte. - // - //it is more intuitive to say "read the next-to-last byte and - //set the STOP condition real quick before the last byte gets - //sent so that we can NACK+STOP it". Maybe this would work if - //you slowed down the I2C clock enough? - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); - } - /* read byte from RX buffer */ - m_buf[ m_pos++ ] = call Usci.getRxbuf(); - //TODO: this should check m_flags: if RESTART flag is present, we - //should not send stop condition - if (m_pos == m_len) { + /*************************************************************************/ + /* + * WARNING: The TI I2C implementation is double buffered. One of the + * side effects of this, is any unSTOPPed read will result in one possibly + * two additional bytes being queued up. Depends on timing and what + * other operations the cpu is doing prior to servicing the i2c interrupts. + * + * One needs to be careful when using UNSTOPPED transactions coupled with + * RESTARTs. It is very easy to hang the bus or get confused. Typically + * this will result in a NACK interrupt. See notes below inside of read. + */ + + /* + * I2CBasicAddr.read - interrupt driven I2C read + * + * If we return SUCCESS, an I2CBasicAddr.readDone is guaranteed to be + * signalled. This happens off an interrupt. + * + * Any error return (non-SUCCESS) indicates no signal will be generated. + * Any error leaves the cpu I2C h/w reset and in low power state prior + * to returning. + * + * This implementation closely follows the I2CReg.reg_readBlock code + * without the initial register address write. + */ + async command error_t I2CBasicAddr.read[uint8_t client](i2c_flags_t flags, + uint16_t addr, uint8_t len, uint8_t* buf ) { + error_t rtn; + + if (!len || !buf) + return EINVAL; + + m_buf = buf; + m_len = len; + m_left = len; + m_flags = flags; + m_pos = 0; + m_action = MASTER_READ; - //when we receive the last byte, wait until STP condition is - //cleared, then return. - while( (call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { - counter --; - } - //switch back to slave mode, we're done - slaveIdle(); - - //disable the rx interrupt - call Usci.setIe(call Usci.getIe() & ~UCRXIE); - if (counter > 0x01) { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2Csa(), m_pos, m_buf ); - } else { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2Csa() , m_pos, m_buf ); - } - } - } - - async command error_t I2CBasicAddr.write[uint8_t client]( i2c_flags_t flags, - uint16_t addr, uint8_t len, - uint8_t* buf ) { - m_buf = buf; - m_len = len; - m_flags = flags; - m_pos = 0; - m_action = MASTER_WRITE; + /* + * check if this is a new connection or a continuation + * If RESTARTing, then don't do the start_check_busy. + * RESTART implies START. + */ + if (m_flags & (I2C_START | I2C_RESTART)) { - /* check if this is a new connection or a continuation */ - if (m_flags & I2C_START) { /* - * Original "gen 1" driver was written for the x2 and implements - * i2c as described in x2 User_Manual (slau144, rev H). - * - * x5 i2c master is described in slau208, section 34.3.4.2.1. - * - * Sequence: - * - * - set sa - * - set UCTR - * - set UCTXSTT - * - * (start/address written, then we get an interrupt), for TXIFG - * + * If RESTARTing, assume that we are already in the mode we want (MST or + * SLAVE). Otherwise call start_check_busy to set things up and make sure + * we are in a reasonable state. This will set MST because we are trying + * to talk. */ + if (!(m_flags & I2C_RESTART) && (rtn = start_check_busy())) + return rtn; + + call Usci.setI2Csa(addr); + call Usci.setReceiveMode(); /* clears CTR, reading */ + call Usci.setTxStart(); /* set TXSTT, send Start */ + m_started = 1; /* - * Enter Master mode. + * if only reading 1 byte, STOP bit must be set right after + * START condition has gone (TXSTT deasserts). * - * Reset to make sure it takes properly. + * Normally (more than 1 byte), we assert TXSTT (start) + * and then wait for the 1st RXIFG interrupt. The logic + * in the RX interrupt handler will set TXSTOP at the + * proper time. * - * It would be nice if one didn't have to reset the module. When - * not doing the reset, it was observed that the first bus transaction - * worked but subsequent didn't (Saw UCSTPIFG, stop condition, and first - * byte was dropped). Adding the reset/leavereset sequence fixed this. + * But if we are only doing one byte we must set STOP + * immediately after TXSTT deasserts and it starts + * clocking to receive the 1st byte into the RX SR + * for the STOP condition to be signalled properly. */ + if ((m_left == 1) && (m_flags & I2C_STOP)) { + if ((rtn = wait_deassert_ctl1(UCTXSTT))) + return rtn; + call Usci.setTxStop(); + } - call Usci.enterResetMode_(); - call Usci.setCtl0(call Usci.getCtl0() | UCMST); - call Usci.leaveResetMode_(); + call Usci.setIe(UCNACKIE | UCALIE | UCRXIE); + return SUCCESS; + } - // set slave address - call Usci.setI2Csa(addr); + /* + * Not START or RESTART. Continuing with a read... + * + * This is actually a strange way to access the bus. Typically + * one would do something like (reading a register for example): + * + * I2CBasicAddr.write(I2C_START, DEV_ADDR, len, buf); + * <-- I2CBasicAddr.writeDone(...); + * I2CBasicAddr.read(I2C_RESTART | I2C_STOP, DEV_ADDR, len, buf); + * <-- I2CBasicAddr.readDone(...); + * + * In other words, typically one always touches the bus with a + * bus transaction that causes TXSTART to be asserted. Stalling + * the bus while then getting around to accessing it again isn't + * typical and is what this section of code supports. Also it + * has been observed that stalling the bus for too long causes + * a NACK to get generated. Unless one restarts the bus. + * + * In other words, I've never seen this section actually work. + * + * We have to special case the one byte case. Because of how + * STOP gets set when actually doing a start. + * + * Because we are reading and because the h/w is double buffered, + * we will read one possibly two extra bytes. One byte will be + * sitting in RXBUF while the next byte will be mostly in the + * shift register (SR). Depends on the timing and when STOP is + * set. + */ + + /* + * Must have seen a start prior or abort + */ + + if (!m_started) { + __PANIC_I2C(5, 0, 0, 0); + return EINVAL; + } - //check bus status at the latest point possible. - if ( call Usci.getStat() & UCBBUSY ){ - //if the bus is busy, bail out real quick - slaveIdle(); - return EBUSY; - } + if ((m_left == 1) && (m_flags & I2C_STOP)) + call Usci.setTxStop(); + call Usci.setIe(UCNACKIE | UCALIE | UCRXIE); + return SUCCESS; + } - // UCTXSTT - generate START condition - call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); - //enable relevant state interrupts and TX, clear the rest - //while ( call Usci.getCtl1() & UCTXSTT){} - call Usci.setIe((call Usci.getIe() & (BIT7|BIT6)) | UCNACKIE | UCALIE | UCTXIE); - } - /* is this a restart or a direct continuation */ - else if (m_flags & I2C_RESTART) { - // set slave address - call Usci.setI2Csa(addr); + /*************************************************************************/ - /* UCTR - set transmit */ - /* UCTXSTT - generate START condition */ - call Usci.setCtl1(call Usci.getCtl1() | UCTR | UCTXSTT); - //do we not need to enable any interrupts here? - } else { - // continue writing next byte - nextWrite(); - } - return SUCCESS; - } + /* + * I2CBasicAddr.write - interrupt driven I2C write + * + * If we return SUCCESS, a I2CBasicAddr.writeDone is guaranteed to be + * signalled. This happens off an interrupt. + * + * Any error return (non-SUCCESS) then no signal will be generated. + */ + async command error_t I2CBasicAddr.write[uint8_t client](i2c_flags_t flags, + uint16_t addr, uint8_t len, uint8_t* buf) { + error_t rtn; + + if (!len || !buf) + return EINVAL; + + m_buf = buf; + m_len = len; + m_left = len; + m_flags = flags; + m_pos = 0; + m_action = MASTER_WRITE; - void nextWrite() { - uint16_t counter = 0xFFFF; + /* + * check if this is a new connection or a continuation + * If RESTARTing, then don't do the start_check_busy. + */ + if (m_flags & (I2C_START | I2C_RESTART)) { - //Hey, now here's a fun thing to do: - // It seems like if two masters set START at almost the same - // time, they both get the TX interrupt, so both write their 0th - // byte into the TX buffer. However, only one of them actually - // writes it out, and no arbitration-loss interrupt is raised for - // the "slow" one. When the "fast" one finishes its transaction, - // the slow one gets a second TX interrupt, which would cause us - // to skip over the first byte by accident. This checks for the - // issue and rewinds the buffer position to 0 if it applies. I - // make no guarantees about how stable this behavior is. + if (!(m_flags & I2C_RESTART) && (rtn = start_check_busy())) + return rtn; - if ( call Usci.getCtl1() & UCTXSTT) { - m_pos = 0; + call Usci.setI2Csa(addr); + call Usci.orCtl1(UCTR | UCTXSTT); // writing, Start. + m_started = 1; } - /* all bytes sent */ - if ( m_pos == m_len ) { - /* not setting STOP bit allows restarting transfer */ - if ( m_flags & I2C_STOP ) { - /* set stop bit */ - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); + if (!m_started) { + __PANIC_I2C(6, 0, 0, 0); + return EINVAL; + } + call Usci.setIe(UCNACKIE | UCALIE | UCTXIE); + return SUCCESS; + } - /* wait until STOP bit has been transmitted */ - while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { - counter--; - } - //STOPping and just finished last send, so we should go back - //to slave mode. + /***************************************************************************/ + /* + * Defaults for I2CBasicAddr + */ - slaveIdle(); - } else { - //so, we just don't send the STOP bit. - } + default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, + uint8_t length, uint8_t* data) {} - //disable tx interrupt, we're DONE - call Usci.setIe(call Usci.getIe() & ~UCTXIE ); - /* fail gracefully */ - if (counter > 0x01) { - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( SUCCESS, call Usci.getI2Csa(), m_len, m_buf ); - } else{ - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( FAIL, call Usci.getI2Csa(), m_len, m_buf ); - } - } else { - //send the next char - call Usci.setTxbuf(m_buf[ m_pos++ ]); - } + default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, + uint8_t length, uint8_t* data) {} + + default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client]() { + return &msp430_usci_i2c_default_config; } + /***************************************************************************/ + /* + * Slave Interfaces + */ + async command void I2CSlave.slaveTransmit[uint8_t clientId](uint8_t data) { //TODO: safety //write it, reenable interrupt (if it was disabled) call Usci.setTxbuf(data); - call Usci.setIe(call Usci.getIe() | UCTXIE); + call Usci.enableTxIntr(); } async command uint8_t I2CSlave.slaveReceive[uint8_t client]() { //re-enable rx interrupt, read the byte - call Usci.setIe(call Usci.getIe() | UCRXIE); + call Usci.enableRxIntr(); return call Usci.getRxbuf(); } - - //defaults - default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} - default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} - default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client]() { - return &msp430_usci_i2c_default_config; - } - /***** Slave-mode functions ***/ command error_t I2CSlave.setOwnAddress[uint8_t client](uint16_t addr) { //retain UCGCEN bit - call Usci.setI2Coa( (call Usci.getI2Coa() & UCGCEN) | addr); + call Usci.setI2Coa(addr); return SUCCESS; } + command error_t I2CSlave.enableGeneralCall[uint8_t client]() { - if (UCGCEN & (call Usci.getI2Coa())) { - return EALREADY; - } else { - call Usci.setI2Coa(UCGCEN | (call Usci.getI2Coa())); - return SUCCESS; - } + call Usci.setI2Coa(UCGCEN | (call Usci.getI2Coa())); + return SUCCESS; } + command error_t I2CSlave.disableGeneralCall[uint8_t client]() { - if (UCGCEN & ~(call Usci.getI2Coa())) { - return EALREADY; - } else { - call Usci.setI2Coa(~UCGCEN & (call Usci.getI2Coa())); - return SUCCESS; - } + call Usci.setI2Coa(~UCGCEN & (call Usci.getI2Coa())); + return SUCCESS; } - //END USCI_GEN1 PORTED CODE + default async event bool I2CSlave.slaveReceiveRequested[uint8_t client]() { return FALSE; } default async event bool I2CSlave.slaveTransmitRequested[uint8_t client]() { return FALSE; } default async event void I2CSlave.slaveStart[uint8_t client](bool isGeneralCall) { ; } default async event void I2CSlave.slaveStop[uint8_t client]() { ; } + /***************************************************************************/ + /* + * INTERRUPT HANDLERS + * + */ - void TXInterrupts_interrupted(uint8_t iv); - void RXInterrupts_interrupted(uint8_t iv); - void NACK_interrupt(); - void AL_interrupt(); - void STP_interrupt(); - void STT_interrupt(); + void TXInterrupts_interrupted(uint8_t iv) { + error_t rtn; - async event void Interrupts.interrupted(uint8_t iv) { - switch(iv) { - case USCI_I2C_UCALIFG: - AL_interrupt(); - break; - case USCI_I2C_UCNACKIFG: - NACK_interrupt(); - break; - case USCI_I2C_UCSTTIFG: - STT_interrupt(); - break; - case USCI_I2C_UCSTPIFG: - STP_interrupt(); - break; - case USCI_I2C_UCRXIFG: - RXInterrupts_interrupted(iv); - break; - case USCI_I2C_UCTXIFG: - TXInterrupts_interrupted(iv); - break; - default: - //error - break; + if (m_left) { + call Usci.setTxbuf(m_buf[m_pos++]); + m_left--; + return; } - } - void TXInterrupts_interrupted(uint8_t iv) { - /* if master mode */ - if (call Usci.getCtl0() & UCMST) { - nextWrite(); - } else { - if (signal I2CSlave.slaveTransmitRequested[call ArbiterInfo.userId()]()) { - //true= "I'm responding RIGHT NOW" - // note that when this interrupt context ends, txinterrupt - // will be raised again. - } else { - //false= "I need to pause for a second" - //disable TX interrupt. - call Usci.setIe(call Usci.getIe() & ~UCTXIE); - } + /* + * when m_left is 0, all bytes have been sent. + * + * the last byte has just been transferred to the SR and we have + * taken one last TXIFG interrupt. If stopping we need to set + * STOP now. + */ + rtn = SUCCESS; + if (m_flags & I2C_STOP) { + call Usci.setTxStop(); + rtn = wait_deassert_ctl1(UCTXSTP); + m_started = 0; } + + /* the last byte is still on its way out. we may need to give + * it some time before signalling. But for now just signal. + * + * If STOPing, this isn't an issue because we wait for the STOP + * to be transmitted above. + */ + call Usci.setIe(0); /* turn off all interrupts */ + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( + rtn, call Usci.getI2Csa(), m_len, m_buf); + return; } + void RXInterrupts_interrupted(uint8_t iv) { - /* if master mode */ - if (call Usci.getCtl0() & UCMST) { - nextRead(); - } else { - if (signal I2CSlave.slaveReceiveRequested[call ArbiterInfo.userId()]()) { - //TRUE: they're responding immediately (should have actually - //already responded at this point). - } else { - //FALSE: disable the RX interrupt, since the client needs to - //do some work - call Usci.setIe(call Usci.getIe() & ~UCRXIE); + error_t rtn; + + m_left--; + + /* + * When we are pulling the next to last byte (ie. the SR is + * receiving the last byte), we want to make sure the last + * byte get STOP set which will be asserted after that last + * byte comes in. + */ + if ((m_left == 1) && (m_flags & I2C_STOP)) + call Usci.setTxStop(); + + m_buf[m_pos++] = call Usci.getRxbuf(); + + if (m_left == 0) { + /* + * all done receiving... + */ + call Usci.setIe(0); /* turn off all interrupts */ + rtn = SUCCESS; + + /* if stopping wait for STOP to deassert */ + if (m_flags & I2C_STOP) { + rtn = wait_deassert_ctl1(UCTXSTP); + m_started = 0; } + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( + rtn, call Usci.getI2Csa(), m_pos, m_buf); } } void NACK_interrupt() { - uint8_t counter = 0xff; - - //This occurs during write and read when no ack is received. - /* set stop bit */ - call Usci.setCtl1(call Usci.getCtl1() | UCTXSTP); - - /* wait until STOP bit has been transmitted */ - while ((call Usci.getCtl1() & UCTXSTP) && (counter > 0x01)) { - counter--; - } - call Usci.enterResetMode_(); - call Usci.leaveResetMode_(); - //back to slave idle mode - slaveIdle(); - - //signal appropriate event depending on whether we were - //transmitting or receiving - //Note that TR will be cleared if we lost MM arbitration because - //another master addressed us as a slave. However, this should - //manifest as an AL interrupt, not a NACK interrupt. - if (call Usci.getCtl1() & UCTR) { - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); - } else { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); + bool reading; + error_t rtn; + + /* remember what we were doing... */ + reading = (m_action == MASTER_READ); + + /* + * Nobody home, abort. Read or Write + * + * First close off the transaction. This releases the bus + * properly. Takes into account other masters (yes we are + * single master so who cares, but its the right thing to do.) + */ + call Usci.setTxStop(); + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + goto nack_abort; + + rtn = ENOACK; + + /* + * Throw a PANIC because NACK should never happen. + * Someone did something weird or something broke. + * + * __PANIC_I2C will reset the h/w and will reset m_action. + */ + __PANIC_I2C(98, 0, 0, 0); + + /* + * Panic itself may be a NOP (ie. not wired to anything) so + * we may end up back here. Signal failure to the application. + */ + + /* + * you can't use the h/w (UCTR bit) because it has been reset + * which clears the bit. You can't use m_action because Panic + * forces m_action to MASTER_IDLE. + */ +nack_abort: + m_started = 0; + if (reading) { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( + rtn, call Usci.getI2Csa(), m_len, m_buf); + return; } + + /* we were writing. Signal appropriately */ + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( + rtn, call Usci.getI2Csa(), m_len, m_buf); + return; } + void AL_interrupt() { uint8_t lastAction = m_action; - slaveIdle(); + force_idle(); + + switch (lastAction) { + case MASTER_WRITE: + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()](EBUSY, call Usci.getI2Csa(), m_len, m_buf ); + break; - //clear AL flag - call Usci.setStat(call Usci.getStat() & ~(UCALIFG)); + case MASTER_READ: + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2Csa(), m_len, m_buf); + break; - //TODO: more descriptive error? I guess EBUSY is fair. - if(lastAction == MASTER_WRITE) { - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2Csa(), m_len, m_buf ); - } else if(lastAction == MASTER_READ) { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( EBUSY, call Usci.getI2Csa(), m_len, m_buf); + default: + break; } //once this returns, we should get another interrupt for STT @@ -588,6 +706,7 @@ implementation { //slave mode as per usual. } + void STP_interrupt() { /* disable STOP interrupt, enable START interrupt */ @@ -607,14 +726,9 @@ implementation { } signal I2CSlave.slaveStop[call ArbiterInfo.userId()](); } - - void STT_interrupt() { - //clear start flag, but leave enabled (repeated start) - //enable stop interrupt - //enable RX/TX interrupts - call Usci.setStat(call Usci.getStat() &~ UCSTTIFG); + void STT_interrupt() { //This is the same issue as noted in the STP_interrupt above, but //applied to repeated start conditions. @@ -626,6 +740,481 @@ implementation { signal I2CSlave.slaveStart[call ArbiterInfo.userId()]( call Usci.getStat() & UCGC); } + + async event void Interrupts.interrupted(uint8_t iv) { + switch(iv) { + case USCI_I2C_UCALIFG: + AL_interrupt(); + break; + case USCI_I2C_UCNACKIFG: + NACK_interrupt(); + break; + case USCI_I2C_UCSTTIFG: + STT_interrupt(); + break; + case USCI_I2C_UCSTPIFG: + STP_interrupt(); + break; + case USCI_I2C_UCRXIFG: + RXInterrupts_interrupted(iv); + break; + case USCI_I2C_UCTXIFG: + TXInterrupts_interrupted(iv); + break; + default: + /* very strange */ + __PANIC_I2C(99, 0, 0, 0); + break; + } + } + + + /***************************************************************************/ + /* + * + * I2CReg implementation. + * + * WARNING: DOES NOT SUPPORT MULTI-MASTER. Assumes single-master (us). + * Forces MST mode and doesn't let go. Not sure how to put it back in SLAVE + * in a reasonable fashion. + * + * Does not support lost arbitration. + */ + + + /* + * see if the slave is out there... + * + * 0 if no one home + * 1 well your guess here. + */ + async command bool I2CReg.slave_present[uint8_t client](uint16_t sa) { + error_t rtn; + + if ((rtn = start_check_busy())) + return rtn; + + call Usci.setI2Csa(sa); + call Usci.orCtl1(UCTR | UCTXSTT | UCTXSTP); // Write, Start, Stop + + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + + rtn = call Usci.isNackIntrPending(); // 1 says NACK'd + return (!rtn); // we want the opposite sense + } + + + /* + * reg_read: + * + * START (w/ device addr, in i2csa), transmit + * 1st write the reg addr + * 2nd restart (w/device addr), receive + * read byte (reg contents) + * finish + */ + async command error_t I2CReg.reg_read[uint8_t client_id](uint16_t sa, uint8_t reg, uint8_t *val) { + uint16_t data; + error_t rtn; + + *val = 0; + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can receive the + * byte coming back. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + /* looking for 2nd TxIFG */ + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + /* + * receive one byte + * + * First turn the bus around with a Restart. Wait for the TxStart + * to take and then assert the Stop. This should put the stop + * on the first receive byte. + */ + call Usci.setReceiveMode(); // clears CTR + call Usci.setTxStart(); + + /* wait for the TxStart to go away */ + if ((rtn = wait_deassert_ctl1(UCTXSTT))) + return rtn; + call Usci.setTxStop(); + + /* wait for inbound char to show up, first rx byte */ + if ((rtn = wait_ifg(UCRXIFG))) + return rtn; + + data = call Usci.getRxbuf(); + *val = data; + return SUCCESS; + } + + + /* + * reg_read16 + * + * address slave (sa) + * tx (write) reg addr (reg) to the device + * restart (assert TXStart) to turn bus around + * read two bytes. + */ + async command error_t I2CReg.reg_read16[uint8_t client_id](uint16_t sa, uint8_t reg, uint16_t *val) { + uint16_t data; + error_t rtn; + + *val = 0; + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can receive two + * bytes. (Send a Restart (assert TxSTT again, but this time indicate + * receiving)). This will occur after the current outgoing byte (in + * the outbound serial register) has been ACK'd. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + /* looking for 2nd TxIFG */ + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + /* + * receive two bytes + * + * First turn the bus around with a Restart. + * + * Also double buffered.... When the 1st RxIFG asserts saying + * there is something in RxBUF, the 2nd byte is also being clocked + * into the Rx Shift register. (unless the slave isn't ready in which + * case it will be doing clock stretching, SCLLOW will be asserted). + * + * So if we want to receive two bytes all is good. TxStop needs + * to be asserted while the 2nd byte is being received which + * means after the 1st RxIFG has been seen. We should get one + * more RxIFG and that should complete the transaction. + */ + call Usci.setReceiveMode(); // clears CTR + call Usci.setTxStart(); + + /* wait for the TxStart to go away */ + if ((rtn = wait_deassert_ctl1(UCTXSTT))) + return rtn; + + /* wait for inbound char to show up, first rx byte */ + if ((rtn = wait_ifg(UCRXIFG))) + return rtn; + + /* + * Since we have RxIntr asserted, we have a byte in the RxBuf and its been ack'd. + * The next byte is in progress so set TxStop. It will go on the next byte. + * Then actually read the current byte which will unfreeze the state machine. + * + * This will avoid starting another bus cycle, which can happen if we set + * stop after reading the first byte. Depends on if the bus is stalled. + * Ie. we got backed up and the I2C h/w is ahead of us. + */ + call Usci.setTxStop(); + + data = call Usci.getRxbuf(); + data = data << 8; + if ((rtn = wait_ifg(UCRXIFG))) + return rtn; + data |= call Usci.getRxbuf(); + *val = data; + return SUCCESS; + } + + + async command error_t I2CReg.reg_readBlock[uint8_t client_id]( + uint16_t sa, uint8_t reg, uint8_t num_bytes, uint8_t *buf) { + + uint16_t left; + error_t rtn; + + if (num_bytes == 0 || buf == NULL) + return EINVAL; + + left = num_bytes; + + /* + * special case of left starts out 1, single byte. + * + */ + if (left == 1) + return call I2CReg.reg_read[client_id](sa, reg, &buf[0]); + + if ((rtn = start_check_busy())) + return rtn; + + call Usci.setI2Csa(sa); + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can start to receive + * bytes. (Send a Restart (assert TxSTT again, but this time indicate + * receiving)). This will occur after the current outgoing byte (in + * the outbound serial register) has been ACK'd. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + /* looking for 2nd TxIFG */ + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + /* + * Turn the bus around with a Restart. + */ + call Usci.setReceiveMode(); // clears CTR + call Usci.setTxStart(); + + /* wait for the TxStart to go away */ + if ((rtn = wait_deassert_ctl1(UCTXSTT))) + return rtn; + + /* + * RX is doubled buffered. There is the incoming shift register (SR) + * which feeds the actual RXBUF. When rxbuf is loaded rxifg is asserted. + * + * After rxbuf is loaded, the next byte will start to be clocked into + * SR. If rxbuf hasn't been emptied by the time 7 bit times have gone + * by, the state machine will stop clocking (scl will be low) until + * rxbuf gets emptied. + * + * What happens if we assert TxStop when we are holding off the receiver? + */ + while (left) { + if ((rtn = wait_ifg(UCRXIFG))) + return rtn; + left--; + + /* + * If there is only one more byte left, then set stop. + * The state machine will have already started to receive + * into the SR so the last byte is on the fly. + * + * If the state machine hung (on bit 7, scl low), setting + * TxStop prior to pulling the last byte will issue the + * Stop after this last byte. + * + * The order of setting txStop and pulling the Rxbuf byte + * is important. + */ + if (left == 1) + call Usci.setTxStop(); + *buf++ = call Usci.getRxbuf(); + } + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + return SUCCESS; + } + + + /* + * reg_write: + * + * START (w/ device addr, in i2csa), transmit + * 1st write the reg addr + * write byte (reg contents) + * finish + */ + async command error_t I2CReg.reg_write[uint8_t client_id](uint16_t sa, + uint8_t reg, uint8_t val) { + error_t rtn; + + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can receive the + * byte coming back. + */ + + if ((rtn = wait_ifg(UCTXIFG))) // wait for txstart to finish + return rtn; + + call Usci.setTxbuf(reg); // write register address + if ((rtn = wait_ifg(UCTXIFG))) // says reg addr got ack'd + return rtn; + + /* + * write one byte + * + * We've got an existing TxIFG, so we have room. Write the new value + * and wait until it gets moved into the shift register (TxIfg will come + * up when this happens). Then set TxStop to finish. + */ + call Usci.setTxbuf(val); + if ((rtn = wait_ifg(UCTXIFG))) // says val got ack'd + return rtn; + + call Usci.setTxStop(); + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + return SUCCESS; + } + + + async command error_t I2CReg.reg_write16[uint8_t client_id](uint16_t sa, + uint8_t reg, uint16_t val) { + error_t rtn; + + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + /* We want to write the regAddr, send the SA and then write regAddr */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can receive the + * byte coming back. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + /* looking for 2nd TxIFG */ + if ((rtn = wait_ifg(UCTXIFG))) // says reg addr got ack'd + return rtn; + + /* + * write first byte, we do msb first. + * We've got an existing TxIFG, so we have room. + */ + call Usci.setTxbuf(val >> 8); // msb part + if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + return rtn; + + /* + * send 2nd, but wait until it is in the shift register + * before sending Stop + */ + call Usci.setTxbuf(val & 0xff); // lsb part + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + + call Usci.setTxStop(); + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + return SUCCESS; + } + + + async command error_t I2CReg.reg_writeBlock[uint8_t client_id](uint16_t sa, + uint8_t reg, uint8_t num_bytes, uint8_t *buf) { + uint16_t left; + error_t rtn; + + if (num_bytes == 0 || buf == NULL) + return EINVAL; + + left = num_bytes; + + if ((rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(sa); + + /* writing (will write regAddr), send start */ + call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT + + /* + * get 1st TxIFG + * + * The MSP430 is double buffered. 1st TxIFG will show up shortly after + * TxSTT has been sent (both buffers empty). We write the first byte + * (the reg addr), it gets moved to the output buffer (shift register) and + * will start to be clocked out. 2nd TxIFG will show at this point. + * This is when we want to turn the bus around so we can start to receive + * bytes. (Send a Restart (assert TxSTT again, but this time indicate + * receiving)). This will occur after the current outgoing byte (in + * the outbound serial register) has been ACK'd. + */ + + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxbuf(reg); // write register address + + while (left) { + if ((rtn = wait_ifg(UCTXIFG))) // says previous byte got ack'd + return rtn; + + left--; + call Usci.setTxbuf(*buf++); + } + /* + * we have to wait until the last byte written actually + * makes it into the SR before setting Stop. + */ + if ((rtn = wait_ifg(UCTXIFG))) + return rtn; + call Usci.setTxStop(); + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + return rtn; + return SUCCESS; + } + + #ifndef REQUIRE_PLATFORM default async command uint16_t Platform.usecsRaw() { return 0; } default async command uint16_t Platform.jiffiesRaw() { return 0; } diff --git a/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc index bce2e8ed42..838fe27c35 100644 --- a/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc @@ -46,10 +46,12 @@ * * Following research into how the TI MSP430 x5 i2c implementation really * works, including observation using a logic analyzer, corrected to - * obtain correct bus operation (minimizes extra bytes). + * obtain correct bus operation (minimizes transfer of extra bytes). * * Written explicitly for 400KHz bus operation assuming small register * transactions. Added I2CReg semantics. (100Khz is fine too). + * I2CReg does NOT support multi-master, does not handle lost arbitration. + * The John Hopkins implementation would hang at 400KHz. * * Uses Panic to call out abnormal conditions. These conditions are * assumed to be out of normal behaviour and aren't recoverable. @@ -66,6 +68,11 @@ * To enable Panic signalling and timeout functions, you must wire in * appropriate routines into Panic and Platform in this module. * + * WARNING: If you don't wire in platform timing functions, it is possible + * for routines in this module to hang in an infinite loop. If a platform + * has enabled a watchdog timer, it is possible that the watchdog would + * then be invoked. Most platforms don't enable the watchdog. + * * It is recommended that you define REQUIRE_PLATFORM and REQUIRE_PANIC in * your platform.h file. This will require that appropriate wiring exists * for Panic and Platform and is wired in. @@ -92,23 +99,6 @@ enum { #define PANIC_I2C __panic_i2c #endif -volatile uint8_t bees[32]; -uint16_t bees_idx; - -typedef struct { - uint16_t ts; - uint8_t ctl1; - uint8_t ifg; - uint8_t stat; -} usci_reg_t; - -void get_state(usci_reg_t *p) { - p->ts = TA1R; - p->ctl1 = UCB3CTL1; - p->ifg = UCB3IFG; - p->stat = UCB3STAT; -} - generic module Msp430UsciI2CP () @safe() { provides { @@ -125,15 +115,16 @@ generic module Msp430UsciI2CP () @safe() { interface HplMsp430GeneralIO as SCL; interface Msp430UsciConfigure[uint8_t client]; interface ArbiterInfo; - interface LocalTime as LocalTime_bms; interface Panic; interface Platform; } } implementation { - enum{ - MASTER_READ = 1, + + enum { + MASTER_IDLE = 0, + MASTER_READ = 1, MASTER_WRITE = 2, /* @@ -156,23 +147,23 @@ implementation { call Panic.panic(PANIC_I2C, where, call Usci.getModuleIdentifier(), \ x, y, z); \ call Usci.enterResetMode_(); \ + m_action = MASTER_IDLE; \ } while (0) - norace uint8_t* m_buf; - norace uint8_t m_len; - norace uint8_t m_pos; - norace uint8_t m_action; - norace i2c_flags_t m_flags; + norace uint8_t* m_buf; + norace uint8_t m_len; + norace uint8_t m_pos; + norace uint8_t m_left; + norace uint8_t m_action; + /* TRUE if TXSTART issued */ + norace uint8_t m_started; /* 1 if started, 0 otherwise */ + norace i2c_flags_t m_flags; /* START, STOP, RESTART, etc. */ - void nextRead(); - void nextWrite(); - void signalDone( error_t error ); + error_t configure_(const msp430_usci_config_t* config) { + if (!config) + return FAIL; /* does anyone actually check? */ - error_t configure_(const msp430_usci_config_t* config){ - if(! config){ - return FAIL; - } call Usci.configure(config, TRUE); call SCL.selectModuleFunc(); call SDA.selectModuleFunc(); @@ -182,13 +173,13 @@ implementation { /* - * We assume that the pins begin used for SCL/SDA have been set up + * We assume that the pins being used for SCL/SDA have been set up * or left (initial state) as input (DIR set to 0 for the pin). * When we deselect the pins from the module, the pins will go * back to inputs. The module itself is kept in reset. This * configuration should be reasonable for lowish power. */ - error_t unconfigure_(){ + error_t unconfigure_() { call Usci.enterResetMode_(); call SCL.selectIOFunc(); call SDA.selectIOFunc(); @@ -224,7 +215,7 @@ implementation { while (call Usci.isBusBusy()) { t1 = call Platform.usecsRaw(); if (t1 - t0 > I2C_MAX_TIME) { - __PANIC_I2C(6, t1, t0, 0); + __PANIC_I2C(1, t1, t0, 0); return EBUSY; } } @@ -234,7 +225,8 @@ implementation { /* * Wait for a CTRL1 signal to deassert. These in particular - * are UCTXNACK, UCTXSTP, and UCTXSTT. + * are UCTXNACK (Nack), UCTXSTP (Stop), and UCTXSTT (Start). + * Typically only Stop and Start are actually looked at. */ error_t wait_deassert_ctl1(uint8_t code) { uint16_t t0, t1; @@ -245,7 +237,7 @@ implementation { while (call Usci.getCtl1() & code) { t1 = call Platform.usecsRaw(); if (t1 - t0 > I2C_MAX_TIME) { - __PANIC_I2C(7, t1, t0, 0); + __PANIC_I2C(2, t1, t0, 0); return ETIMEOUT; } } @@ -253,19 +245,23 @@ implementation { } -#ifdef notdef - void send_stop() { // close out current bus transaction... - error_t rtn; - - TELL = 1; - call Usci.setTxStop(); // finish cleaning up - if ((rtn = wait_deassert_ctl1(UCTXSTP))) - return; - TELL = 0; - } -#endif - - + /* + * wait_ifg: wait for a particlar USCI_IFG bit to pop + * + * uses I2C_MAX_TIME to time out the access + * checks for UCNACKIFG, if it pops abort + * + * UCNAKIFG simply panics which also yields a i2c h/w reset. + * It doesn't send a STOP on the bus which may confuse some + * devices. It is assumed this is a single master system + * and new transactions will start with a TXSTART which + * should reset all devices out there to start looking + * properly. + * + * It may be necessary to change the NACK abort code so + * it issues a STOP prior to panicing just to clean the + * bus up. + */ error_t wait_ifg(uint8_t code) { uint16_t t0, t1; uint8_t ifg; @@ -274,13 +270,13 @@ implementation { while (1) { ifg = call Usci.getIfg(); if (ifg & UCNACKIFG) { // didn't respond. - __PANIC_I2C(9, ifg, 0, 0); + __PANIC_I2C(3, ifg, 0, 0); return EINVAL; } if (ifg & code) break; t1 = call Platform.usecsRaw(); if (t1 - t0 > I2C_MAX_TIME) { - __PANIC_I2C(10, t1, t0, 0); + __PANIC_I2C(4, t1, t0, 0); return ETIMEOUT; } } @@ -289,246 +285,318 @@ implementation { /*************************************************************************/ + /* + * WARNING: The TI I2C implementation is double buffered. One of the + * side effects of this, is any unSTOPPed read will result in one possibly + * two additional bytes being queued up. Depends on timing and what + * other operations the cpu is doing prior to servicing the i2c interrupts. + * + * One needs to be careful when using UNSTOPPED transactions coupled with + * RESTARTs. It is very easy to hang the bus or get confused. Typically + * this will result in a NACK interrupt. See notes below inside of read. + */ - async command error_t I2CBasicAddr.read[uint8_t client]( i2c_flags_t flags, - uint16_t addr, uint8_t len, - uint8_t* buf ) { - - /* - * According to TI, we can just poll until the start condition - * clears. But we're nervous and want to bail out if it doesn't - * clear fast enough. This is how many times we loop before we - * bail out. - */ + /* + * I2CBasicAddr.read - interrupt driven I2C read + * + * If we return SUCCESS, an I2CBasicAddr.readDone is guaranteed to be + * signalled. This happens off an interrupt. + * + * Any error return (non-SUCCESS) indicates no signal will be generated. + * Any error leaves the cpu I2C h/w reset and in low power state prior + * to returning. + * + * This implementation closely follows the I2CReg.reg_readBlock code + * without the initial register address write. + */ + async command error_t I2CBasicAddr.read[uint8_t client](i2c_flags_t flags, + uint16_t addr, uint8_t len, uint8_t* buf ) { + error_t rtn; - uint16_t counter = I2C_ONE_BYTE_READ_COUNTER; + if (!len || !buf) + return EINVAL; - m_buf = buf; - m_len = len; - m_flags = flags; - m_pos = 0; + m_buf = buf; + m_len = len; + m_left = len; + m_flags = flags; + m_pos = 0; m_action = MASTER_READ; - /* check if this is a new connection or a continuation */ - if (m_flags & I2C_START) { - call Usci.setI2Csa(addr); + /* + * check if this is a new connection or a continuation + * If RESTARTing, then don't do the start_check_busy. + * RESTART implies START. + */ + if (m_flags & (I2C_START | I2C_RESTART)) { - //check bus status at the latest point possible. - if (call Usci.isBusBusy()) { /* shouldn't be busy */ - __PANIC_I2C(2, call Usci.getStat(), 0, 0); - return EBUSY; - } + if (!(m_flags & I2C_RESTART) && (rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(addr); call Usci.setReceiveMode(); /* clears CTR, reading */ call Usci.setTxStart(); /* set TXSTT, send Start */ - - // enable nack and rx interrupts only - call Usci.setIe(UCNACKIE | UCRXIE); + m_started = 1; /* * if only reading 1 byte, STOP bit must be set right after - * START condition is triggered + * START condition has gone (TXSTT deasserts). + * + * Normally (more than 1 byte), we assert TXSTT (start) + * and then wait for the 1st RXIFG interrupt. The logic + * in the RX interrupt handler will set TXSTOP at the + * proper time. + * + * But if we are only doing one byte we must set STOP + * immediately after TXSTT deasserts and it starts + * clocking to receive the 1st byte into the RX SR + * for the STOP condition to be signalled properly. */ - if ( (m_len == 1) && (m_flags & I2C_STOP) ) { - //this logic seems to work fine - /* wait until START bit has been transmitted */ - while (call Usci.getTxStart()) { - if (!(--counter)) { - __PANIC_I2C(3, 0, 0, 0); - } - } + if ((m_left == 1) && (m_flags & I2C_STOP)) { + if ((rtn = wait_deassert_ctl1(UCTXSTT))) + return rtn; call Usci.setTxStop(); } - } else if (m_flags & I2C_RESTART) { - call Usci.setI2Csa(addr); - /* - * clear TR (receive), generate START - */ - call Usci.setReceiveMode(); /* clears CTR, reading */ - call Usci.setTxStart(); /* set TXSTT, send Start */ - - // enable nack and rx only call Usci.setIe(UCNACKIE | UCRXIE); - - /* if only reading 1 byte, STOP bit must be set right after START bit */ - if ( (m_len == 1) && (m_flags & I2C_STOP) ) { - /* wait until START bit has been transmitted */ - while (call Usci.getCtl1() & UCTXSTT) { - if ((--counter) == 0) { /* went to zero */ - __PANIC_I2C(4, 0, 0, 0); - } - } - call Usci.setTxStop(); - } - } else { - //TODO: test - nextRead(); + return SUCCESS; } - if (counter > 1) - return SUCCESS; + /* + * Not START or RESTART. Continuing with a read... + * + * This is actually a strange way to access the bus. Typically + * one would do something like (reading a register for example): + * + * I2CBasicAddr.write(I2C_START, DEV_ADDR, len, buf); + * <-- I2CBasicAddr.writeDone(...); + * I2CBasicAddr.read(I2C_RESTART | I2C_STOP, DEV_ADDR, len, buf); + * <-- I2CBasicAddr.readDone(...); + * + * In other words, typically one always touches the bus with a + * bus transaction that causes TXSTART to be asserted. Stalling + * the bus while then getting around to accessing it again isn't + * typical and is what this section of code supports. Also it + * has been observed that stalling the bus for too long causes + * a NACK to get generated. Unless one restarts the bus. + * + * In other words, I've never seen this section actually work. + * + * We have to special case the one byte case. Because of how + * STOP gets set when actually doing a start. + * + * Because we are reading and because the h/w is double buffered, + * we will read one possibly two extra bytes. One byte will be + * sitting in RXBUF while the next byte will be mostly in the + * shift register (SR). Depends on the timing and when STOP is + * set. + */ - return FAIL; - } + /* + * Must have seen a start prior or abort + */ - void nextRead() { - uint16_t counter = 0xFFFF; - - if ((m_pos == (m_len - 2)) && m_len > 1) { - //we want to send NACK + STOP in response to the last byte. - //if m_pos == m_len-2 and we get the RX interrupt, that means - // that the slave has already written the next-to-last byte - // and we have acknowledged it--BUT we have not yet read it. - //By setting the stop condition here, we say "send STOP after - //the next byte," which will actually be the last byte. - // - //it is more intuitive to say "read the next-to-last byte and - //set the STOP condition real quick before the last byte gets - //sent so that we can NACK+STOP it". Maybe this would work if - //you slowed down the I2C clock enough? - call Usci.setTxStop(); + if (!m_started) { + __PANIC_I2C(5, 0, 0, 0); + return EINVAL; } - /* read byte from RX buffer */ - m_buf[ m_pos++ ] = call Usci.getRxbuf(); - //TODO: this should check m_flags: if RESTART flag is present, we - //should not send stop condition - if (m_pos == m_len) { + if ((m_left == 1) && (m_flags & I2C_STOP)) + call Usci.setTxStop(); + call Usci.setIe(UCNACKIE | UCRXIE); + return SUCCESS; + } + - //when we receive the last byte, wait until STP condition is - //cleared, then return. - while (call Usci.getTxStop() && (counter > 1)) - counter --; + /*************************************************************************/ - //disable the rx interrupt - call Usci.disableRxIntr(); - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( - (counter > 1) ? SUCCESS : FAIL, - call Usci.getI2Csa(), m_pos, m_buf); - } - } - + /* + * I2CBasicAddr.write - interrupt driven I2C write + * + * If we return SUCCESS, a I2CBasicAddr.writeDone is guaranteed to be + * signalled. This happens off an interrupt. + * + * Any error return (non-SUCCESS) then no signal will be generated. + * Any error leaves the cpu I2C h/w reset and in low power state. + */ async command error_t I2CBasicAddr.write[uint8_t client](i2c_flags_t flags, - uint16_t addr, uint8_t len, - uint8_t* buf) { - m_buf = buf; - m_len = len; - m_flags = flags; - m_pos = 0; + uint16_t addr, uint8_t len, uint8_t* buf) { + error_t rtn; + + if (!len || !buf) + return EINVAL; + + m_buf = buf; + m_len = len; + m_left = len; + m_flags = flags; + m_pos = 0; m_action = MASTER_WRITE; - /* check if this is a new connection or a continuation */ - if (m_flags & I2C_START) { - /* - * Original "gen 1" driver was written for the x2 and implements - * i2c as described in x2 User_Manual (slau144, rev H). - * - * x5 i2c master is described in slau208, section 34.3.4.2.1. - * - * Sequence: - * - * - set sa - * - set UCTR (transmit, write) - * - set UCTXSTT (start) - * - * (start/address written, then we get an interrupt), for TXIFG - * - */ - call Usci.setI2Csa(addr); + /* + * check if this is a new connection or a continuation + * If RESTARTing, then don't do the start_check_busy. + */ + if (m_flags & (I2C_START | I2C_RESTART)) { - //check bus status at the latest point possible. - if (call Usci.isBusBusy()) { /* shouldn't be busy */ - __PANIC_I2C(5, call Usci.getStat(), 0, 0); - return EBUSY; - } + if (!(m_flags & I2C_RESTART) && (rtn = start_check_busy())) + return rtn; + call Usci.setI2Csa(addr); call Usci.orCtl1(UCTR | UCTXSTT); // writing, Start. + m_started = 1; + } - /* - * enable relevant state interrupts and TX, clear the rest - */ - -// while (call Usci.getTxStart()) { } + if (!m_started) { + __PANIC_I2C(6, 0, 0, 0); + return EINVAL; + } + call Usci.setIe(UCNACKIE | UCTXIE); + return SUCCESS; + } - call Usci.setIe(UCNACKIE | UCTXIE); - } else if (m_flags & I2C_RESTART) { - /* is this a restart or a direct continuation */ - call Usci.setI2Csa(addr); + // defaults - call Usci.orCtl1(UCTR | UCTXSTT); // writing, Start. + default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, + uint8_t length, uint8_t* data) {} - //do we not need to enable any interrupts here? + default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, + uint8_t length, uint8_t* data) {} - } else - nextWrite(); - return SUCCESS; + default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client]() { + return &msp430_usci_i2c_default_config; } - void nextWrite() { - uint16_t counter = 0xFFFF; - - //Hey, now here's a fun thing to do: - // It seems like if two masters set START at almost the same - // time, they both get the TX interrupt, so both write their 0th - // byte into the TX buffer. However, only one of them actually - // writes it out, and no arbitration-loss interrupt is raised for - // the "slow" one. When the "fast" one finishes its transaction, - // the slow one gets a second TX interrupt, which would cause us - // to skip over the first byte by accident. This checks for the - // issue and rewinds the buffer position to 0 if it applies. I - // make no guarantees about how stable this behavior is. - - if (call Usci.getTxStart()) - m_pos = 0; - - /* more bytes to do? */ - if (m_pos < m_len) { + + /***************************************************************************/ + /* + * INTERRUPT HANDLERS + * + */ + + void TXInterrupts_interrupted(uint8_t iv) { + error_t rtn; + + if (m_left) { call Usci.setTxbuf(m_buf[m_pos++]); + m_left--; return; } - + /* - * all bytes sent + * when m_left is 0, all bytes have been sent. * - * if STOPPING, set stop bit. Not setting stop let's the master - * to continue with more transactions.... + * the last byte has just been transferred to the SR and we have + * taken one last TXIFG interrupt. If stopping we need to set + * STOP now. */ - if ( m_flags & I2C_STOP ) { + rtn = SUCCESS; + if (m_flags & I2C_STOP) { call Usci.setTxStop(); - - /* wait until STOP bit has been transmitted */ - while (call Usci.getTxStop() && (counter > 1)) - counter--; + rtn = wait_deassert_ctl1(UCTXSTP); + m_started = 0; } - call Usci.disableTxIntr(); // we are done, no more txintrs + /* the last byte is still on its way out. we may need to give + * it some time before signalling. But for now just signal. + * + * If STOPing, this isn't an issue because we wait for the STOP + * to be transmitted above. + */ + call Usci.setIe(0); /* turn off all interrupts */ signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( - (counter > 1) ? SUCCESS : FAIL, - call Usci.getI2Csa(), m_len, m_buf); + rtn, call Usci.getI2Csa(), m_len, m_buf); return; } - // defaults + void RXInterrupts_interrupted(uint8_t iv) { + error_t rtn; - default async event void I2CBasicAddr.readDone[uint8_t client](error_t error, uint16_t addr, - uint8_t length, uint8_t* data) {} + m_left--; - default async event void I2CBasicAddr.writeDone[uint8_t client](error_t error, uint16_t addr, - uint8_t length, uint8_t* data) {} + /* + * When we are pulling the next to last byte (ie. the SR is + * receiving the last byte), we want to make sure the last + * byte get STOP set which will be asserted after that last + * byte comes in. + */ + if ((m_left == 1) && (m_flags & I2C_STOP)) + call Usci.setTxStop(); - default async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client]() { - return &msp430_usci_i2c_default_config; + m_buf[m_pos++] = call Usci.getRxbuf(); + + if (m_left == 0) { + /* + * all done receiving... + */ + call Usci.setIe(0); /* turn off all interrupts */ + rtn = SUCCESS; + + /* if stopping wait for STOP to deassert */ + if (m_flags & I2C_STOP) { + rtn = wait_deassert_ctl1(UCTXSTP); + m_started = 0; + } + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( + rtn, call Usci.getI2Csa(), m_pos, m_buf); + } } - /***************************************************************************/ + void NACK_interrupt() { + bool reading; + error_t rtn; + + /* remember what we were doing... */ + reading = (m_action == MASTER_READ); + + /* + * Nobody home, abort. Read or Write + * + * First close off the transaction. This releases the bus + * properly. Takes into account other masters (yes we are + * single master so who cares, but its the right thing to do.) + */ + call Usci.setTxStop(); + if ((rtn = wait_deassert_ctl1(UCTXSTP))) + goto nack_abort; + + rtn = ENOACK; + + /* + * Throw a PANIC because NACK should never happen. + * Someone did something weird or something broke. + * + * __PANIC_I2C will reset the h/w and will reset m_action. + */ + __PANIC_I2C(98, 0, 0, 0); + + /* + * Panic itself may be a NOP (ie. not wired to anything) so + * we may end up back here. Signal failure to the application. + */ + + /* + * you can't use the h/w (UCTR bit) because it has been reset + * which clears the bit. You can't use m_action because Panic + * forces m_action to MASTER_IDLE. + */ +nack_abort: + m_started = 0; + if (reading) { + signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( + rtn, call Usci.getI2Csa(), m_len, m_buf); + return; + } + + /* we were writing. Signal appropriately */ + signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( + rtn, call Usci.getI2Csa(), m_len, m_buf); + return; + } - void TXInterrupts_interrupted(uint8_t iv); - void RXInterrupts_interrupted(uint8_t iv); - void NACK_interrupt(); async event void Interrupts.interrupted(uint8_t iv) { switch(iv) { @@ -542,48 +610,12 @@ implementation { TXInterrupts_interrupted(iv); break; default: - //error + /* very strange */ + __PANIC_I2C(99, 0, 0, 0); break; } } - void TXInterrupts_interrupted(uint8_t iv) { - nextWrite(); - } - - void RXInterrupts_interrupted(uint8_t iv) { - nextRead(); - } - - void NACK_interrupt() { - uint8_t counter = 0xff; - - /* Nobody home, abort. Read or Write */ - call Usci.setTxStop(); - - /* wait until STOP bit has been transmitted */ - while (call Usci.getTxStop() && (counter > 1)) { - counter--; - } - call Usci.enterResetMode_(); - call Usci.leaveResetMode_(); - - /* - * signal appropriate event depending on whether we were - * transmitting or receiving - * - * Note that UCTR will be cleared if we lost MM arbitration because - * - * another master addressed us as a slave. However, this should - * manifest as an AL interrupt, not a NACK interrupt. - */ - if (call Usci.getTransmitReceiveMode()) { /* 1 if transmitting, UCTR */ - signal I2CBasicAddr.writeDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); - } else { - signal I2CBasicAddr.readDone[call ArbiterInfo.userId()]( ENOACK, call Usci.getI2Csa(), m_len, m_buf ); - } - } - /***************************************************************************/ @@ -609,6 +641,14 @@ implementation { /***************************************************************************/ + /* + * + * I2CReg implementation. + * + * WARNING: DOES NOT SUPPORT MULTI-MASTER. Assumes single-master (us). + * + * Does not support lost arbitration. + */ /* @@ -620,9 +660,6 @@ implementation { async command bool I2CReg.slave_present[uint8_t client](uint16_t sa) { error_t rtn; - nop(); - TOGGLE_TELL; - TOGGLE_TELL; if ((rtn = start_check_busy())) return rtn; @@ -655,10 +692,6 @@ implementation { return rtn; call Usci.setI2Csa(sa); - nop(); - TOGGLE_TELL; - TOGGLE_TELL; - /* We want to write the regAddr, send the SA and then write regAddr */ call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT @@ -702,7 +735,6 @@ implementation { data = call Usci.getRxbuf(); *val = data; - nop(); return SUCCESS; } @@ -724,10 +756,6 @@ implementation { return rtn; call Usci.setI2Csa(sa); - nop(); - TOGGLE_TELL; - TOGGLE_TELL; - /* We want to write the regAddr, send the SA and then write regAddr */ call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT @@ -795,13 +823,13 @@ implementation { return rtn; data |= call Usci.getRxbuf(); *val = data; - nop(); return SUCCESS; } - async command error_t I2CReg.reg_readBlock[uint8_t client_id](uint16_t sa, - uint8_t reg, uint8_t num_bytes, uint8_t *buf) { + async command error_t I2CReg.reg_readBlock[uint8_t client_id]( + uint16_t sa, uint8_t reg, uint8_t num_bytes, uint8_t *buf) { + uint16_t left; error_t rtn; @@ -819,11 +847,8 @@ implementation { if ((rtn = start_check_busy())) return rtn; - call Usci.setI2Csa(sa); - nop(); - TOGGLE_TELL; - TOGGLE_TELL; + call Usci.setI2Csa(sa); /* We want to write the regAddr, send the SA and then write regAddr */ call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT @@ -893,7 +918,6 @@ implementation { } if ((rtn = wait_deassert_ctl1(UCTXSTP))) return rtn; - nop(); return SUCCESS; } @@ -914,10 +938,6 @@ implementation { return rtn; call Usci.setI2Csa(sa); - nop(); - TOGGLE_TELL; - TOGGLE_TELL; - /* We want to write the regAddr, send the SA and then write regAddr */ call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT @@ -953,8 +973,6 @@ implementation { call Usci.setTxStop(); if ((rtn = wait_deassert_ctl1(UCTXSTP))) return rtn; - - nop(); return SUCCESS; } @@ -967,10 +985,6 @@ implementation { return rtn; call Usci.setI2Csa(sa); - nop(); - TOGGLE_TELL; - TOGGLE_TELL; - /* We want to write the regAddr, send the SA and then write regAddr */ call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT @@ -1012,8 +1026,6 @@ implementation { call Usci.setTxStop(); if ((rtn = wait_deassert_ctl1(UCTXSTP))) return rtn; - - nop(); return SUCCESS; } @@ -1032,11 +1044,7 @@ implementation { return rtn; call Usci.setI2Csa(sa); - nop(); - TOGGLE_TELL; - TOGGLE_TELL; - - /* We want to write the regAddr, send the SA and then write regAddr */ + /* writing (will write regAddr), send start */ call Usci.orCtl1(UCTR | UCTXSTT); // TR (write) & STT /* @@ -1057,7 +1065,7 @@ implementation { call Usci.setTxbuf(reg); // write register address while (left) { - if ((rtn = wait_ifg(UCTXIFG))) // says 1st byte got ack'd + if ((rtn = wait_ifg(UCTXIFG))) // says previous byte got ack'd return rtn; left--; @@ -1072,7 +1080,6 @@ implementation { call Usci.setTxStop(); if ((rtn = wait_deassert_ctl1(UCTXSTP))) return rtn; - nop(); return SUCCESS; } From 8cca21f5755f70a83a326c797d627d42853ec2a7 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Nov 2012 12:51:39 -0800 Subject: [PATCH 307/411] i2c: update docs to reflect TI2C{7,10}Bit renaming --- doc/html/tep108.html | 5 ++++- doc/html/tep117.html | 10 ++++++++-- doc/txt/tep108.txt | 3 ++- doc/txt/tep117.txt | 12 +++++++++--- 4 files changed, 23 insertions(+), 7 deletions(-) diff --git a/doc/html/tep108.html b/doc/html/tep108.html index ed65932caa..7f9741aea3 100644 --- a/doc/html/tep108.html +++ b/doc/html/tep108.html @@ -1341,9 +1341,12 @@

3.2 I2C

The interface is typed according to the addressing space the underlying implementation supports. Valid type values are below.

-TI2CExtdAddr - Interfaces uses the extended (10-bit) addressing mode.
-TI2CBasicAddr - Interfaces uses the basic (7-bit) addressing mode.
+TI2C10Bit     - use 10-bit addressing.
+TI2C7Bit      - use 7-bit addressing.
+TI2CExtdAddr  - (same as 10-bit), deprecated.
+TI2CBasicAddr - (same as 7-bit).
+ +

For backward compatibility use TI2CBasicAddr, but new code should use +TI2C7Bit when possible. It's a better name.

+

The i2c_flags_t values are defined below. The flags define the behavior of the operation for the call being made. These values may be ORed together.

diff --git a/doc/txt/tep108.txt b/doc/txt/tep108.txt index 307aa3f8da..f7aa238c17 100644 --- a/doc/txt/tep108.txt +++ b/doc/txt/tep108.txt @@ -1073,4 +1073,5 @@ still provide the same functionality. Take a look in the tinyos-2.x source tree under tinyos-2.x/tos/chips/msp430/usart to see the full implementation of these components along with the corresponding Uart implementation. - +Implementations on more modern TI processors can be found in +tos/chips/msp430/x5xxx/usci-v2. diff --git a/doc/txt/tep117.txt b/doc/txt/tep117.txt index 8ea415c790..4e737b5647 100644 --- a/doc/txt/tep117.txt +++ b/doc/txt/tep117.txt @@ -202,7 +202,8 @@ The I2CPacket interface provides for asynchronous Master mode communication on an I2C with application framed packets. Individual I2C START-STOP events are controllable which allows the using component to do multiple calls within a single I2C transaction and -permits multiple START sequences +permits multiple START sequences. This later is used to turn the +bus around without losing current arbritration. Platforms providing I2C capability MUST provide this interface. :: @@ -216,8 +217,13 @@ Platforms providing I2C capability MUST provide this interface. :: The interface is typed according to the addressing space the underlying implementation supports. Valid type values are below. :: - TI2CExtdAddr - Interfaces uses the extended (10-bit) addressing mode. - TI2CBasicAddr - Interfaces uses the basic (7-bit) addressing mode. + TI2C10Bit - use 10-bit addressing. + TI2C7Bit - use 7-bit addressing. + TI2CExtdAddr - (same as 10-bit), deprecated. + TI2CBasicAddr - (same as 7-bit). + +For backward compatibility use TI2CBasicAddr, but new code should use +TI2C7Bit when possible. Its a better name. The i2c_flags_t values are defined below. The flags define the behavior of the operation for the call being made. These values may be From b35c9678327349df680e987080ec3979f2a7b1f0 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Nov 2012 13:01:40 -0800 Subject: [PATCH 308/411] msp430 x5: rename usci-bf to usci-v2 its new name. --- tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/HplMsp430Usci.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/HplMsp430UsciC.nc | 0 .../msp430/x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterrupts.nc | 0 .../x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterruptsA0P.nc | 0 .../x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterruptsA1P.nc | 0 .../x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterruptsA2P.nc | 0 .../x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterruptsA3P.nc | 0 .../x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterruptsB0P.nc | 0 .../x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterruptsB1P.nc | 0 .../x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterruptsB2P.nc | 0 .../x5xxx/{usci-bf => usci-v2}/HplMsp430UsciInterruptsB3P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/HplMsp430UsciP.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/I2CSlave.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciA0P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciA1P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciA2P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciA3P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciB0P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciB1P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciB2P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciB3P.nc | 0 .../msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciConfigure.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciError.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciI2CB0C.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciI2CB0P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciI2CB1C.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciI2CB1P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciI2CB2C.nc | 0 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usci-v2}/Msp430UsciSpiB1P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciSpiB2C.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciSpiB2P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciSpiB3C.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciSpiB3P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciSpiP.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartA0C.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartA0P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartA1C.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartA1P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartA2C.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartA2P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartA3C.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartA3P.nc | 0 tos/chips/msp430/x5xxx/{usci-bf => usci-v2}/Msp430UsciUartP.nc | 0 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rename from tos/chips/msp430/x5xxx/usci-bf/i2c-sm/Msp430UsciI2CP.nc rename to tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc diff --git a/tos/chips/msp430/x5xxx/usci-bf/msp430usci.h b/tos/chips/msp430/x5xxx/usci-v2/msp430usci.h similarity index 100% rename from tos/chips/msp430/x5xxx/usci-bf/msp430usci.h rename to tos/chips/msp430/x5xxx/usci-v2/msp430usci.h From ce2e1e651c7788b812a89f794fce07567848566a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 17 Nov 2012 13:04:17 -0800 Subject: [PATCH 309/411] Update Release notes. --- 11_Release_Notes | 151 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 115 insertions(+), 36 deletions(-) diff --git a/11_Release_Notes b/11_Release_Notes index 690e97248d..8cf4b5f68b 100644 --- a/11_Release_Notes +++ b/11_Release_Notes @@ -2,15 +2,20 @@ Major Changes to the msp430 core software: (branch: gh:tp-freeforall/prod(msp430-int) -Last Update: 2011-12-18, cire - -msp430-int-next merged into msp430-int. 2011-12-16 +Last Update: 2012-11-11, cire Msp430-Int (msp430 integration branch) is a major rework of the core tinyos -msp430 files. Originally, tinyos msp430 support was for the first generation -msp430 cpus. Later the MSP430X and MSP430XV2 processor chips were released by -TI. As newer cpu chips have been ported to TinyOS the architecture of the -core msp430 s/w has needed changes. +msp430 files. Originally, tinyos supported the first generation msp430 cpus. +Later the MSP430X and MSP430XV2 processor chips were released by TI. As newer +cpu chips have been ported to TinyOS the architecture of the core msp430 s/w +has needed to adapt. + +The evolution of the TI msp430 architecture doesn't evolve gracefully so there +are major inconsistencies between the different major families. The x5 family +is the most reasonable and so is being used as the model. In the future, +we would like to migrate the x1 and x2 families to a common interface with the +x5 so that drivers can be shared across the different cpu families. It is +unclear if that is worth the effort. Major areas of impact include: peripheral register access, clock modules, dma support, usart vs. usci support, and interrupt architecture. In addition the @@ -22,16 +27,16 @@ core has been modified to support toolchains listed below. Test builds have bee done using the following: mspgcc3.2.3: original tinyos 2.1.1 toolchain - mspgcc3.2.3-z1 z1 modified toolchain (supports MSP430X architectural + mspgcc3.2.3-z1 z1 modified toolchain (supports some MSP430X architectural changes, 26xx processors. Does not properly support x5 chips. - mspgcc4.4.5(20110312) Initial mspgcc4 supports x5 chips. experimental. - mspgcc4.5.2 (mspgcc) Uniarch variant supports all chips. experimental. - (20110612) slated to become new main toolchain. - mspgcc4.5.3 (LTS 20110716) long term support of uniarch (pre-20bit) - mspgcc4.5.3 (20111008) later version of LTS20110716 with patches through 1008. - see http://tinyprod.net/repos/debian-dev. + mspgcc4.5.3 (LTS 20110716) long term support of uniarch (pre-20bit). + mspgcc4.5.3 (20111008) later version of LTS20110716 with patches through 1008. + Has problems. Do not use. + + mspgcc4.6.3 (LTS 20120406) long term support (pre-20bit), default + tinyos 2.1.2 toolchain for msp430. It is recommended that all verification work be done using the latest toolchain available. The sooner we get that toolchain squared away the better. @@ -40,36 +45,49 @@ available. The sooner we get that toolchain squared away the better. Families: A family is a group of similar msp430 processor chips that have been instantiated -in TinyOS. The overlap between cpus is not just cpu features but can include clocks -and other peripherals. +in TinyOS. The overlap between cpus involves cpu features as well as +clocks and peripherals. x1: 1st generation MSP430. Supported: msp430f149, msp430f1611 (telosb) x2: 2nd generation MSP430X. Modified cpu ISA, 20 bit addresses. - Supported: msp430f2616, 2617, 2618, 2619 + Supported: msp430f2{4,6}1{6,7,8,9} x5: 3rd generation MSP430X. Modified instruction timings. Peripheral modifications. + modified interrupt structure, modified peripheral access maps. Supported: cc430f5137, msp430f5438, 5438a. Other notable changes: * Revise nesc_{en,dis}able_interrupt to generate better code. Also force - these routines to be inline regardless of the optimization level. + these routines to be inline regardless of the optimization level. Msp430 + platform only currently. + +* Control inlining of nesc_{en,dis}able via a compile time define. The + Platform designer can control how nesc_enable/disable is coded. This + is for the msp430 platform only currently. The platform designer can + control whether to minimize code space or to minimize execution (potentially + lower power). * Remove duplicate files between original x1 and Z1 (x2). Msp430-int has - been fully integrated with the tinyos-main trunk as of 2011-09-30 which + been fully integrated with the tinyos-main trunk as of 2012-11-11 which includes an updated Z1 (x2) core. All duplicated files between x1 and Z1 have been removed. +* Correct various bugs that crept into the Z1 code when integrated into + tinyos main. + * change low level usci port naming back to h/w centric. - ie. Msp430Uart0 -> Msp430UartA0. Better matches what will come in with - the x5 code where there are lots of ports. + ie. Msp430Uart0 -> Msp430UartA0. Better matches the x5 code which + has lots of h/w ports. This is a better naming scheme that + minimizes confusion about what h/w port is actually being talked + about and used by the platform. -* The main cpu clock for the 3 families is defaulted to 4 MiHz. This is done +* The default main cpu clock for the 3 families is 4 MiHz. This is done for a number of reasons. 1) low power and 2) the 5438a starts off in low power mode and doesn't support faster than 8 MHz (note decimal MHz not - binary). + binary, clocking the 5438 at 8MiHz is a definite no-no). * use common clock module for x1 and x2. msp430/clock_bcs. Handles basic_clock and bc2. @@ -88,16 +106,32 @@ Other notable changes: * Change DCO specifications from KHZ to HZ to eliminate confusion with decimal vs. binary frequency specs. Make Z1 use binary clocks. - WARNING: The whole issue of binary vs. decimal clocks needs to revisted. For - various good reasons (32768 = power of two, and is XT1/ACLK which is used to - stabilize the main DCO clock which runs everything else (SMCLK which drives - the peripherals). Anyway, TinyOS wants binary clocks but TI states that upper - limits for the various processors is in decimal (ie. 8MHz). It is generally - dangerous to overclock the TI parts and is asking for flakey behaviour. - -* Revised DCO calibrator to work with both 1611 and Z1 2617/1618. - -* Device configuration blocks by default moved to ROM. This saves start up cpu + WARNING: The whole issue of binary vs. decimal clocks needs to revisited. + Originally binary KHz (ie. KiHz) and binary MegaHz (MiHz) was being used + because the s/w DCO syncronizers worked better when coupled to the 32 KiHz + XTAL stable source (XT1/ACLK). The DCO needs to be stablized because it + is used to generate all the other clocks in the system. Some of these + clocks (ie. UART, SPI clocking) need to be particular frequencies so various + bits of h/w works properly. + + Anyway, TinyOS wants binary clocks but TI states that upper limits for the + various processors is in decimal (ie. 8MHz). It is generally dangerous + to overclock the TI parts and is asking for flakey behaviour. + + In practice going to decimal clocks isn't a big deal. The DCO syncronization + to the 32KiHz XTAL ticker works fine whether or not decimal or binary DCO + tickers are used. + +* Revised DCO calibrator that works with both 1611 and Z1 2617/1618. Add DCO + calibrator that works for the 5438a. + +* Peripheral config block originally were placed in RAM as initialized data. + This is bad for two reasons. 1) its in RAM and RAM is scarce. 2) Initialized + data takes up ROM space and then is copied down into RAM. Not very efficient. + The only reason for config blocks to be in RAM is if the block itself gets + tweaked. But this is done rarely. + + Device configuration blocks by default moved to ROM. This saves start up cpu cycles and space in RAM. Config blocks can still be placed in RAM and modified if needed. @@ -116,20 +150,56 @@ Other notable changes: * DMA rework. - Simplify Hpl and make more easily adaptable cross cpu (handles x1, x2, and x5). + - unified driver for x1, x2 and x5. + - Make module naming clearer. + - simplify interfaces for setTrigger. + - msp430 dma: nuke ABORT. ABORT was used to determine the error return from transferDone. Only comes from NMI abort if ENNMI was on. This doesn't really - buy anything still need to use a timer for DMA hangs. Further there are no + buy anything, still need to use a timer for DMA hangs. Further there are no known users of the error return and it isn't checked. + - make DmaControl.reset do a full reset. Simplifies code in Msp430DmaControlP.reset and makes better sense then doing it piece meal. - - force src/dst addresses to be 16 bits (was void *). Be blatant. + + - force src/dst addresses to be 16 bits (was void *). Be blatant. DMA currently + restricted to low memory (16 bits) which is where RAM always currently lives + on MSP430 processors. This restricts DMA in X2 and X5 processors to RAM + rather than being able to handle DMAing from code space. + + 20 bit support adds the potential for using larger addresses but RAM still lives + in the low 64K and 20 bit support adds significant overhead. The typical + case for DMA on a MSP430 is into and out of RAM. We don't need the additional + overhead of > 16 bits. + - make interrupts be parameterized. This routes dma interrupts to the appropriate channel handler. +* USCI I2C Driver. + + - Started with John Hopkins multi-master I2C driver. Completely rewritten + based on observations of correct I2C bus behaviour observed using + a logic analyzer. + + - Created an optimized single master and multi-master I2C driver. Mulitmaster + preserves the work done at John Hopkins for bidirectional async I2C + communications. + + - Added I2CReg interface and implementation. Single phase non-interrupt + optimized for register access which is the typical I2C device access. + + - New I2C driver included in tos/chips/msp430/x5xxx/usci-v2. These are + the recommended USCI drivers for the X5 cpus. Needs to be back ported + to the X2. + + - Nuked multiple copies of I2C.h. Now use definitions in tos/types/I2C.h + for all I2C drivers. + + * X5 additions: - X5 (T0A, T1A) Msp430Timers. T0A 32KiHz, T1A 1MiHz timebase. @@ -151,6 +221,14 @@ Other notable changes: modules from being included if the cpu being used doesn't have them. This makes figuring out what is happening much easier when adding new processors. + - PANIC infrastructure: Added foundations for PANIC infrastructure. + Used by x5xxx/usci code. + + - PLATFORM raw time infrastructure: Added foundations for PLATFORM + infrastructure. In particular, added hooks for obtaining raw 1usec + (either binary or decimal, you just have to know) timing from the + Platfrom layer. + WARNING: tosthreads hasn't been modified for the new core msp430 structure. TosThreads duplicated files rather than modified in place. This creates @@ -160,4 +238,5 @@ maintanence headache. TosThreads should be modified to place any necessary hooks into the actual device drivers themselves rather than duplicating the files and then shadowing. Kevin Klues at one point evaluated using in place code and for some reason went the other -way. The reasoning wasn't documented. +way. The reasoning wasn't documented. Original implmentation is a major support +headache. From cca8a701d4baaac99dbd90b2e4082b3fe75f5b6e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 3 Dec 2012 00:22:19 -0800 Subject: [PATCH 310/411] bring in gitignore for main msp430-int fork --- .gitignore | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 .gitignore diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000000..642f7253dd --- /dev/null +++ b/.gitignore @@ -0,0 +1,8 @@ +*.[oa] +*~ +*.pyc +build +#*# +.#* +.gdb* +TAGS From a0946f8a440390d0ab1a0690ba93261887c533f9 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 3 Dec 2012 00:23:36 -0800 Subject: [PATCH 311/411] update release notes for 2.1.2.1 --- release-notes.txt | 57 +++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-) diff --git a/release-notes.txt b/release-notes.txt index ddaac0bd84..bc92b83af1 100644 --- a/release-notes.txt +++ b/release-notes.txt @@ -1,6 +1,59 @@ -These release notes are as of: $Date: 2010-01-20 20:00:48 $ +These release notes are as of: 2012-11-27 -2.1.2: +2.1.2.1: 1st post T2.1.2 release patches. (same as development tree, + not cherry picked). + +Summary: + + o updated release notes for T2.1.2 + o revised build scripts for various toolchains. + o Misc buf fixes. + o PPPSniffer + o fix I2CDR in msp430 USART code. + o rf230 bug fixes + o rfa1: fixes. + o msp430 x2/usci: i2c uctxstt fix. + + +0e4829e Added two default command handlers, otherwise MCPS_PURGE will not work in + nonbeacon-enabled mode. This problem was discovered by David Rodenas. +26823b5 removed uisp references from Makefiles (but kept the definable PROGRAMMER) +1c888f0 Removed uisp from tinyos-tools +ee1b931 Use avrdude as default programmer on all platforms (instead of uisp) +50be665 Bug fix from a Michiel Konstapel to fix buffer locking bug. +cf0731b disable route command so application fits with the release version of msp430-gcc +23591e0 Adding new application PPPSniffer. +e4e7402 Various: add overrideable POST_VER to DEB_VER, default to -tinyos +7cf3de8 msp430-46: add 2 patches and move install to /usr +160c035 packaging: removed old avr packaging scripts +36e7f7b Renamed register in I2C driver. The old I2CDR name is no longer defined in the TI headers. +d303730 msp430 packaging: move to packaging directory +60836ab avr packaging: move to packaging location +411b1d3 rf230: for the hardware ack driver also rework the upload logic to make it faster. +04eb28c rfa1: add capabilities for external amplifier switching and antenna switching/diversity +b12646f rf212: update readme file for the new option +faec7cf rf212: rework the upload logic to make it faster and to make it work with slow SPI (based on rf230) +3862465 rf230: rework the upload logic to make it faster and to make it work with slow SPI +11833b0 Forgot to add the UCTXSTT check in USCI B0 +da9e0be rfa1: reworked the timer transformation +e93b9ed rfa1: reimplement busy wait (reduce code size). +f505c3d rename timer components (AtmegaCompare to AtmegaAlarm) +58ab4ed rfa1: renamed hpl timer interfaces +5e1ead9 Fix: UCTXSTT is now checked, fixes I2C_ACK_END implementation +ea9f7d5 packaging: updated the tinyos packaging script to generate rpms +703d9e1 updates to support new commands that enable and disable the dock interrupt +b3a02d7 updates to support new commands that enable and disable the dock interrupt +42bdfb7 Add #def for MAX_PARENT +d5f968b In nonbeacon-enabled mode a device should not answer to an active scan. +5751707 rfxlink: fixed timestamps in the debug message +34ca30a Add note on Z1 support in release notes for 2.1.2 +b1b027d Add note on CoAP implementation to release notes for 2.1.2 +b1a4d30 packaging: moved everything related to packaging out of the tools directory +84e83a2 updated the release-notes.txt +6ccf23b removed all .cvsignore files + + +2.1.2.0: (same as 2.1.2) Supports updated msp430 (4.6.3) and avr (4.1.2) compilers Added RPL stack Support for the ucmini platform and ATmega128RFA1 chip From ac0856a4cdef5552e7e11cebb5e16d3ed56b9d18 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 3 Dec 2012 01:15:00 -0800 Subject: [PATCH 312/411] Initial version of Main_Branches_Tags --- 90_Main_Branches_Tags | 81 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 90_Main_Branches_Tags diff --git a/90_Main_Branches_Tags b/90_Main_Branches_Tags new file mode 100644 index 0000000000..4d0fb50109 --- /dev/null +++ b/90_Main_Branches_Tags @@ -0,0 +1,81 @@ + +This is the main release/development repository for TinyOS. + +These are some initial thoughts on doing maintanence for TinyOS release cycles. + +THIS IS A WORK IN PROGRESS. Input is encouraged. If tinyos-devel@millennium.berkeley.edu +isn't appropriate (should be, but YMMV), send them to me cire831@gmail.com. + +However, it would be prefered if you comment using github by looking at the commit that +brought this file into tp-freeforall. + + + +The mainline of the TinyProd family of repositories is an initial cut at a structure for how +to manage this. The mainline is gh:tinyprod/prod (the main pristine release fork). +gh:tp-freeforall/prod is the development fork where most new work is done. tp-freeforall +(aka. ffa) actively tracks the current SVN tinyos development repository. + +The general form for a repository/branch is: /(branch) +ie. gh:tp-freeforall/prod (svn/current) is the svn/current branch in the +tp-freeforall/prod repository located on github. + + +See the following documents for more details on how this github stuff is put together... + +https://github.com/tp-freeforall/prod/blob/tp-master/ + +00a_Repo_Notes: For a general overview of what the tp-freeforall repo is about. + +00b_Development_Environment: Setting up a development environment for the msp430. + +00c_Getting_Started_Git: Overview of getting started using git, github, and the repo. + +00d_Contribution_Process: Contributing back to the central Repository. Work in Progress. + + + + +In the meantime the following branches and tags are proposed to move us in a reasonable direction. + +Tags are used to denote the main tinyos 2.1.2 releases and its maintanence releases. + +ie. + +tos-2_1_2_0 is the initial release of 2.1.2 (same as release_tinyos_2_1_2). + +tos-2_1_2_1 is the 1st maintanence release of 2.1.2. It contains a batch of +patches from the development trunk so doesn't have the need for any cherry picked +bugs, etc. + + +Branches: + +Currently, the following branches exist between the working TinyOS development +repository and the TinyProd family of repos. + +master: In general, master refers to the default main branch in a GIT repository. +Currently, master refers to the master branch coming from the T2-SVN development +repository. + +tos-maint: the mainline maintanence branch. + +tos-maint-next: a branch holding proposed changes destined for the next maintanence release. + + +svn/current: a tracking branch that tracks master. + + + + +First, why a seperate TinyProd/prod repository for releases? This is to minimize +how much other cruft is held in the repository. If you want to see the cruft and +are okay with dealing with the associated overhead, use the TP-FREEFORALL repository. + +The intent is to keep most ordinary uses from having to pull the other objects that we +as developers are generating. + + +The maintanence branches and tags will in the future all be managed out of the Release +repository (ie. TinyProd/prod). Currently, while gestating these are replicated in both +tp-freeforall as well as tinyprod. From df8da9b2bb1ac73081a9695d1e329179bfffa5b5 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 3 Dec 2012 02:30:58 -0800 Subject: [PATCH 313/411] Initial version of Upstream Maintenance --- 00e_Upstream_Maintenance | 103 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 00e_Upstream_Maintenance diff --git a/00e_Upstream_Maintenance b/00e_Upstream_Maintenance new file mode 100644 index 0000000000..08c668466b --- /dev/null +++ b/00e_Upstream_Maintenance @@ -0,0 +1,103 @@ + +this file documents how to merge the TinyProd trunk with the upstream T2-SVN trunk. + +remote t2-svn points at the svn-git mirror: git://hinrg.cs.jhu.edu/git/tinyos-2.x.svn +remote ffa points at the git repo: gh:tp-freeforall/prod (git@github.com:tp-freeforall/prod.git) + +the tinyprod repository is the main release repository. + +the tp-freeforall repository actively tracks the tinyos development mainline. Via the tp-freeforall +tinyos branches. And also tracks the mainline tinyprod trunk. This forms the main tp-freeforall +mainline that new development is based on. + + +Branches: + +t2-svn/master: master branch from t2-svn, sync'd tip of the svn trunk. +ffa/svn/current: snapshot of t2-svn/master in the ffa repo. Typically becomes the new + upstream-next. +ffa/upstream: last merge point. TinyProd has included all t2-svn changes (from the trunk) + up to this point on the t2-svn trunk. + +ffa/tinyprod-base: minimal base changes forming the TinyProd trunk. ffa/upstream-next is merged + into tinyprod-base to form the new tinyprod-base-next (which will become tinyprod-base). + +ffa/tp-master: working tinyprod master. Tracks tinyprod-base. TinyProd Main (master) + +ffa/msp430-int: integration branch for new msp430 code. Tracks tinyprod-base. Example + integration branch on tp-freeforall. Topic branch. + +Tags: +upstream-: marks state of upstream on said date. +tinyprod-base-: marks state of tinyprod-base on said date. + +tos-2_1_2_: a mainline tinyos maintanence release. ie. 2.1.2.0, 2.1.2.1, etc. +tpm-2_1_2-prod_: a tinyprod main maintanence release. ie. tpm-2.1.2-prod.1 etc. + + +All work is done on a local repository. + +1) Fetch current state of ffa and t2-svn. + + git fetch ffa + git fetch t2-svn + +2) Advance ffa/svn/current <- t2-svn/master + + git checkout -t t2-svn/master + git push ffa master:svn/current (should be a fast-forward) + +3) Determine appropriate upstream-next, typically will be ffa/svn/current. + +4) Create upstream-next branch from merge point. + + git branch upstream-next ffa/svn/current (or appropriate commit, ie. rc_4_tinyos_2_1_2) + +5) Create tinyprod-base-next and merge upstream-next. + + git checkout -b tinyprod-base-next ffa/tinyprod-base + git merge -e upstream-next + + + + + -e makes sure that one can edit the commit message. You want to say something like: + + Move tinyprod-base to new upstream-next + + Merge branch 'upstream-next' into tinyprod-base-next + upstream-next: 0fe5e80 2012-04-17 + +6) Tag the new tinyprod-base and upstream. You want to use an annotated tag so that + it is stored as a full commit. + + git tag -a -m"upstream movement" upstream- upstream-next + git tag -a -m"tinyprod-base movement" tinyprod-base- tinyprod-base-next + +7) Advance any main branches (such as tp-master). + + git checkout -b tp-master-next tp-master + git merge tinyprod-base-next + + + + +8) Advance any appropriate topic branches. ie msp430-int + It is assumed the topic branch is based off tp-master. + + git checkout -b msp430-int-next msp430-int + git merge tp-master-next + + + + + +9) When happy, advance the branches. + ie. upstream, tinyprod-base, msp430-int. + + git branch -M upstream-next upstream + git branch -M tinyprod-base-next tinyprod-base + git branch -M msp430-int-next msp430-int + git push ffa upstream:svn/upstream + git push ffa tinyprod-base + git push ffa msp430-int From ecfc1b3412ba7b74deb300fe1e01702998ed77d7 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 3 Dec 2012 03:40:53 -0800 Subject: [PATCH 314/411] update Docs to reflect msp430-int integrated into tp-master --- 00a_Repo_Notes | 41 ++++++++++++++++++------------------- 00b_Development_Environment | 14 ++++++------- 2 files changed, 27 insertions(+), 28 deletions(-) diff --git a/00a_Repo_Notes b/00a_Repo_Notes index fd9fabc283..5a3d61af0f 100644 --- a/00a_Repo_Notes +++ b/00a_Repo_Notes @@ -1,4 +1,4 @@ -WARNING: Default branch has been switched to *** msp430-int *** +WARNING: Default branch has been switched to *** tp-master *** ============================================================================ @@ -27,23 +27,25 @@ a better release note will be written. This will occur immediately after the TinyOS 2.1.2 release occurs. -** Default (Main working) Branch:** (2011-12-16) msp430-int - Integration cycle. Merging tinyos-main (SVN) -> msp430-int +** Default (Main working) Branch:** (2012-12-03) tp-master + motenet_rel, msp430-int, etc. all merged. -msp430-int: msp430 integration -msp430-int-pu: msp430 integration (proposed updates) (currently collapsed) +msp430-int: msp430 integration (merged). -If in doubt, branch off from msp430-int. +If in doubt, branch off tp-master. -Status: 2011-12-16 +Status: 2012-12-03 -tinyprod-base: integrated with the tip of tinyos-main trunk (82dab04, r5767) +tinyprod-base: integrated with the tip of tinyos-main trunk (0e4829, r6209) msp430-int: integrated with updated tinyprod-base. Merge with Z1 (x2) tinyos-main code complete. +2012-12-03: msp430-int merged into tp-master + motenet_rel merged into tp-master + 2011-12-16: msp430-int-next promoted to msp430-int integration with Z1 x2 tinyos-main (svn) complete. @@ -134,20 +136,17 @@ family) its primary focus is on the newer processors which requires the newer toolchain. The intent is that all processors (original, x1 as well as the newer x2 and x5 families) should be tested with the newer toolchain. -The base msp430 toolchain (4.5.3 and later) is available for Ubuntu Oneric -(11.10). And a complete interium msp430 toolchain is available from -http://tinyprod.net/debian-dev. Just follow the instructions in the README. - -Some testing with the old 3.2.3 toolchain (original tinyos and z1 varient) has -also been done for basic functionality (ie. does it compile). The old tool -chain (3.2.3, tinyos) is available as *legacy* in the same tool repo mentioned above. +The current msp430 toolchain, 4.6.3 should be used. This tool chain is available +for Ubuntu Oneric (11.10) and Debian (6.5) or later. Debian packages are available +from http://tinyprod.net/repos/debian. Follow the instructions in the README. * Repo Structure github.com/tinyprod/prod: main TinyProd repo. - The VeryBlessed repo. Holds the stable mainline (master). Releases - come off this repo and the master branch. + The VeryBlessed repo. Holds the stable mainline (svn/current). Releases + come off this repo and the master branch. Current tinyprod branch is + tp-master. github.com/tp-freeforall/prod: working fork. Blessed repo. Holds consolidated integration branches and @@ -156,7 +155,7 @@ github.com/tp-freeforall/prod: working fork. github.com//prod: user's tinyprod working fork. branched off tp-freeforall/prod. working branches should be branched off the tp-freeforall/prod(branch) - that the user is working on. (ie. msp430-int or msp430-int-pu) + that the user is working on. (ie. msp430-int or msp430-int-pu, topic branches) The general form for a repository/branch is: /(branch) ie. gh:tp-freeforall/prod(msp430-int-pu) is the msp430-int-pu branch in the @@ -176,9 +175,9 @@ svn/upstream: svn tinyos tracking branch. svn/upstream-next: the upstream of the repo is being moved. This is the new proposed upstream position. -master: the main tinyprod release line. -next: integration branch for next release on master. -pu: integration branch for proposed updates. +tp-master: the main tinyprod release line. +tp-next: integration branch for next release on master. +tp-pu: integration branch for proposed updates. -int: integration branch for feature -int-pu: proposed update. diff --git a/00b_Development_Environment b/00b_Development_Environment index 1fad00c8d9..d33fe421d5 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -3,13 +3,13 @@ Installing a development environment for TinyOS (TinyProd). State: -2011-12-16: +2012-12-03: Ubuntu 10.04 - 12.04. Debian Squeeze works as well. Tested directly on 10.04 and 11.10, (12.04 in progress) - T2 (TinyProd) github:tp-freeforall/prod(msp430-int), - mspdebug JTAG debugging. mspgcc-LTS20110716 toolchain with patches - Toolchain from http://tinyprod.net/repos/debian-dev + T2 (TinyProd) github:tp-freeforall/prod(tp-master), + mspdebug JTAG debugging. 4.6.3 based msp430 toolchain + Toolchain from http://tinyprod.net/repos/debian ************************************************************************************** @@ -94,11 +94,11 @@ exit 3) TinyOS 2.x tree checkout -This is a basic check out of the msp430-int branch of the github repository +This is a basic check out of the tp-master branch of the github repository tp-freeforall/prod.git. This repo tracks the main tinyos SVN repository used for development. It has modifications to support newer TI MSP430 processors. -This basic checkout gives you a read-only copy of the msp430-int branch. It +This basic checkout gives you a read-only copy of the tp-master branch. It is a fully functional local repository that can be commited into (locally only). cd ~/top @@ -110,7 +110,7 @@ is a fully functional local repository that can be commited into (locally only). This will create a new branch named and will check you into that branch. It will be branched off of the main branch from the remote, gh:tp-freeforall/prod -(msp430-int). +(tp-master). This will keep your changes locally grouped. You will have a remote named 'origin' that points at the repository that you cloned from namely, From 9b32a58c76cb9cda64109694702a1f8c1939e8cd Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Wed, 12 Dec 2012 00:33:03 -0800 Subject: [PATCH 315/411] Update signing key in Development Environment Docs --- 00b_Development_Environment | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/00b_Development_Environment b/00b_Development_Environment index d33fe421d5..711b3a61f0 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -3,7 +3,7 @@ Installing a development environment for TinyOS (TinyProd). State: -2012-12-03: +2012-12-12: Ubuntu 10.04 - 12.04. Debian Squeeze works as well. Tested directly on 10.04 and 11.10, (12.04 in progress) @@ -77,8 +77,8 @@ The following should be equivilent. With some additions... # # add the keys for Razvan, the package signer # -gpg --keyserver subkeys.pgp.net --recv-keys F99BE531 -gpg -a --export F99BE531 | sudo apt-key add - +gpg --keyserver subkeys.pgp.net --recv-keys 34EC655A +gpg -a --export 34EC655A | sudo apt-key add - sudo -s From ae2c02a1a78fcbb08cf4b4686e34a68e58155f0f Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 14 Dec 2012 10:06:11 -0800 Subject: [PATCH 316/411] Split out Why_Git from Getting_Started --- 00c_Getting_Started_Git | 58 ----------------------------------- 00f_Why_Git | 67 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 67 insertions(+), 58 deletions(-) create mode 100644 00f_Why_Git diff --git a/00c_Getting_Started_Git b/00c_Getting_Started_Git index 4bfb8bbccf..4f7b8123f8 100644 --- a/00c_Getting_Started_Git +++ b/00c_Getting_Started_Git @@ -1,19 +1,8 @@ Getting Started. -Git is great. Git is good. Git is powerful. - -Alas, that makes it a little daunting getting started. This document should -help make it a little less painful. Git is powerful and hopefully you will -find it is worth the effort. - -This document is written assuming that you will be using github to contribute -to the TinyProd TinyOS repository structure. - - Contents: -- Why Git? - GitHub - Set up Git - Set up your working repository @@ -21,53 +10,6 @@ Contents: - Guidelines -* Why Git? - -The main reason behind the selection of GIT is it's fully distributed nature, -fast branching, and associated merge magic. The TinyOS development community -is essentially world wide and we want to make encourage the rate of development -by making the contribution process very easy as well as accessable. - - o Fully distributed. - - o Everything is local. No need of a centralized server for anything. - (note our workflow does require integration repositories but this isn't - implicit in GIT), nor does it impact the contribution process. - - o Cheap local branching. This is important. We want to foster faster - development. Try something out while still staying in touch with what - is happening in the mainline. This is much more difficult with rTinyOS's - (research TinyOS) CVS contrib and SVN based repositories. - - Note, branching in GIT is fundamentally different than pretty much any - other SCM system and is responsbile for much of the productivity of projects - using GIT. - - o GITHUB. When coupled with github, git provides very powerful visibility tools - (what is being changed and by whom). Code review becomes very easy when - using GIT and github. - - o Git is Small - - o Git is Fast - - o Support for any workflow. Although we are using the Integration Manager - Workflow. This also promotes code review. - - o Allows gradual reintegration of currently active contrib source bodies. - Currently the contrib source body is maintained in CVS and is rather - cumbersome to use. Bringing active contrib code into the TinyProd - github realm would provide the same mechanism for accessing and using - active contrib code as the main TinyOS body. - - Using TinyProd hosted contrib code would be as simple as merging two - git branches or possibly two branches in different git repositories. - - o Other DVCS could also have been chosen (SVN is not a DVCS), such as Hg - or Bzr but I happened to be a fan of GIT. And it seems to be working - well for what we are trying to do. - - * GitHub * We use github to host the repository. And they have very good help files diff --git a/00f_Why_Git b/00f_Why_Git new file mode 100644 index 0000000000..7273285e04 --- /dev/null +++ b/00f_Why_Git @@ -0,0 +1,67 @@ + +Getting Started. + +Git is great. Git is good. Git is powerful. + +Alas, that makes it a little daunting getting started. This document should +help make it a little less painful. Git is powerful and hopefully you will +find it is worth the effort. + +This document is written assuming that you will be using github to contribute +to the TinyProd TinyOS repository structure. + + +Contents: + +- Why Git? +- GitHub +- Set up Git +- Set up your working repository +- Further Reading +- Guidelines + + +* Why Git? + +The main reason behind the selection of GIT is it's fully distributed nature, +fast branching, and associated merge magic. The TinyOS development community +is essentially world wide and we want to make encourage the rate of development +by making the contribution process very easy as well as accessable. + + o Fully distributed. + + o Everything is local. No need of a centralized server for anything. + (note our workflow does require integration repositories but this isn't + implicit in GIT), nor does it impact the contribution process. + + o Cheap local branching. This is important. We want to foster faster + development. Try something out while still staying in touch with what + is happening in the mainline. This is much more difficult with rTinyOS's + (research TinyOS) CVS contrib and SVN based repositories. + + Note, branching in GIT is fundamentally different than pretty much any + other SCM system and is responsbile for much of the productivity of projects + using GIT. + + o GITHUB. When coupled with github, git provides very powerful visibility tools + (what is being changed and by whom). Code review becomes very easy when + using GIT and github. + + o Git is Small + + o Git is Fast + + o Support for any workflow. Although we are using the Integration Manager + Workflow and core Lead Developer model for the development tree. + + o Allows gradual reintegration of currently active contrib source bodies. + Currently the contrib source body is maintained in CVS and is rather + cumbersome to use. + + o Other DVCS could also have been chosen (SVN is not a DVCS), such as Hg + or Bzr but I happened to be a fan of GIT. And it seems to be working + well for what we are trying to do. + + Git is explicitly designed for fully distributed version control. It + is currently in use by many major open source projects including Git itself + and the Linux Kernel. From 1b7586f02c0862b541bd075287c038e4e4787c69 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 16 Dec 2012 17:15:39 -0800 Subject: [PATCH 317/411] panic_simple shouldn't have any reference to typed_data.h --- tos/system/panic_simple/PanicP.nc | 1 - 1 file changed, 1 deletion(-) diff --git a/tos/system/panic_simple/PanicP.nc b/tos/system/panic_simple/PanicP.nc index ce5df9afb1..29166327c0 100644 --- a/tos/system/panic_simple/PanicP.nc +++ b/tos/system/panic_simple/PanicP.nc @@ -8,7 +8,6 @@ */ #include "panic.h" -#include "typed_data.h" uint16_t save_sr; bool save_sr_free; From 873e6cffc7ca5d4f111bb1bd090685ea05dbd220 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 17 Dec 2012 02:10:07 -0800 Subject: [PATCH 318/411] update Development Environment instructions - change msp430 toolchain to msp430-46 - change repository key to Eric Decker --- 00b_Development_Environment | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/00b_Development_Environment b/00b_Development_Environment index 711b3a61f0..6842730e93 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -61,21 +61,21 @@ are available from Stanford and TinyProd.net. The toolchain at TinyProd.Net as We want the following packages: nesc - msp430-binutils-tinyos - msp430-gcc-tinyos - msp430-gdb-tinyos - msp430-libc-tinyos - msp430-tinyos - msp430mcu-tinyos - mspdebug-tinyos tinyos-tools + mspdebug + msp430-46 + msp430-binutils-46 + msp430-gcc-46 + msp430-gdb-46 + msp430-libc-46 + msp430mcu-46 You want to follow the instructions at: http://tinyprod.net/repos/debian. The following should be equivilent. With some additions... # -# add the keys for Razvan, the package signer +# add the keys for Eric Decker, the package signer # gpg --keyserver subkeys.pgp.net --recv-keys 34EC655A gpg -a --export 34EC655A | sudo apt-key add - @@ -85,9 +85,10 @@ sudo -s # # teach dpkt/apt-get/aptitude about where to find the tinyprod tools repository # -echo "deb http://tinyprod.net/repos/debian squeeze main" >> /etc/apt/sources.list.d/tinyprod-debian.list +echo "deb http://tinyprod.net/repos/debian squeeze main" >> /etc/apt/sources.list.d/tinyprod-debian.list +echo "deb http://tinyprod.net/repos/debian msp430-46 main" >> /etc/apt/sources.list.d/tinyprod-debian.list apt-get update -apt-get install nesc msp430-tinyos mspdebug-tinyos tinyos-tools +apt-get install nesc tinyos-tools msp430-46 mspdebug exit ************************************************************************************** From 65eca995b0b073501182368d37cf9706c87c80e3 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 2 Jan 2013 01:52:40 -0800 Subject: [PATCH 319/411] shimmer/span: add port drive defines --- tos/platforms/shimmer/chips/msp430/msp430hardware.h | 7 +++++++ tos/platforms/span/chips/msp430/msp430hardware.h | 7 +++++++ 2 files changed, 14 insertions(+) diff --git a/tos/platforms/shimmer/chips/msp430/msp430hardware.h b/tos/platforms/shimmer/chips/msp430/msp430hardware.h index 90ca795018..55f11be669 100644 --- a/tos/platforms/shimmer/chips/msp430/msp430hardware.h +++ b/tos/platforms/shimmer/chips/msp430/msp430hardware.h @@ -496,4 +496,11 @@ enum { MSP430_PORT_RESISTOR_PULLUP, /**< Pullup resistor enabled */ }; +/* support for chips with configurable drive strengths */ +enum { + MSP430_PORT_DRIVE_STRENGTH_INVALID, + MSP430_PORT_DRIVE_STRENGTH_REDUCED, + MSP430_PORT_DRIVE_STRENGTH_FULL, +}; + #endif //_H_msp430hardware_h diff --git a/tos/platforms/span/chips/msp430/msp430hardware.h b/tos/platforms/span/chips/msp430/msp430hardware.h index a651392aa5..09a21b48f5 100644 --- a/tos/platforms/span/chips/msp430/msp430hardware.h +++ b/tos/platforms/span/chips/msp430/msp430hardware.h @@ -326,4 +326,11 @@ enum { MSP430_PORT_RESISTOR_PULLUP, /**< Pullup resistor enabled */ }; +/* support for chips with configurable drive strengths */ +enum { + MSP430_PORT_DRIVE_STRENGTH_INVALID, + MSP430_PORT_DRIVE_STRENGTH_REDUCED, + MSP430_PORT_DRIVE_STRENGTH_FULL, +}; + #endif //_H_msp430hardware_h From e98156842cd04c5fce687621820ce95b04bc528d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 9 Jan 2013 00:10:17 -0700 Subject: [PATCH 320/411] add python to install instructions --- 00b_Development_Environment | 3 +++ 1 file changed, 3 insertions(+) diff --git a/00b_Development_Environment b/00b_Development_Environment index 6842730e93..f334ca9cb7 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -41,12 +41,15 @@ packages: git-core git-daemon-run git-doc git-email git-gui gitk gitmagic openssh-client openssh-server + python3 python3-serial python python-serial + The following will do the trick: sudo -s apt-get install build-essential stow automake autoconf libtool libc6-dev apt-get install git-core git-daemon-run git-doc git-email git-gui gitk gitmagic apt-get install openssh-client openssh-server +apt-get install python3 python3-serial python python-serial exit From 78b546b3806ac4ce1a2ccd33a946e16e3ee05f89 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 9 Jan 2013 00:11:07 -0700 Subject: [PATCH 321/411] add pmm (power management) to gdb_x5 --- tos/chips/msp430/99_gdb/gdb_x5 | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tos/chips/msp430/99_gdb/gdb_x5 b/tos/chips/msp430/99_gdb/gdb_x5 index f1352f1c6d..eb9fb888bb 100644 --- a/tos/chips/msp430/99_gdb/gdb_x5 +++ b/tos/chips/msp430/99_gdb/gdb_x5 @@ -1,3 +1,15 @@ +#display power management module (pmm) +define pmm +set $_pmm_base=0x120 +printf "pmmctl0: %04x pmmctl1: %04x svsmhctl: %04x svsmlctl: %04x svsmio: %04x\n", \ + *((uint16_t *) 0x120), *((uint16_t *) 0x122), *((uint16_t *) 0x124), \ + *((uint16_t *) 0x126), *((uint16_t *) 0x128) +printf "pmmifg: %04x pmmrie: %04x pm5ctl0: %04x\n", \ + *((uint16_t *) 0x12c), *((uint16_t *) 0x12e), *((uint16_t *) 0x130) +end +document pmm +Display msp430 pmm hardware +end #display dma define dma From 46bcba4e24dc208bd2a9358c09206d4f95214712 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Jan 2013 00:54:18 -0700 Subject: [PATCH 322/411] msp430-x5: usci-v2, Only change critical register when in SWRST. In the latest TI x5 manual (SLAU208K) it states that certain critical registers (and bits) should only be changed when in SWRST. Update docs to reflect this and protect places where it makes sense. --- tos/chips/msp430/x5xxx/usci-v2/HplMsp430Usci.nc | 9 +++++++++ tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc | 2 +- .../msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc | 10 ++++++++-- 3 files changed, 18 insertions(+), 3 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-v2/HplMsp430Usci.nc b/tos/chips/msp430/x5xxx/usci-v2/HplMsp430Usci.nc index d322e11211..e9fbcfabbd 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/HplMsp430Usci.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/HplMsp430Usci.nc @@ -57,6 +57,15 @@ * * So we expose both 16 bit and 8 bit interfaces. * + * WARNING WARNING WARNING: TI in a later edition of the Users Guide + * for the x5 processors (SLAU208K - August 2012) documents various + * registers (some just particular bits) as being modified only if + * the module is in reset (UCSWRST = 1). + * + * We could protect every access to these bits by setting and resetting + * UCSWRST but this is very inefficient. It is assumed that the user + * knows what they are doing. + * * @author Peter A. Bigot * @author Derek Baker * @author Doug Carlson diff --git a/tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc index 7c3a9ab6ef..85f01e1d5a 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc @@ -195,7 +195,7 @@ implementation { async command void Usci.configure (const msp430_usci_config_t* config, bool leave_in_reset) { if (! config) { - return; + return; /* panic? */ } UCmxCTL1 = config->ctl1 | UCSWRST; UCmxCTL0 = config->ctl0; diff --git a/tos/chips/msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc index 8e5716efb0..b574e75f5b 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc @@ -158,7 +158,7 @@ implementation { if (!config) return FAIL; /* does anyone actually check? */ - call Usci.configure(config, TRUE); + call Usci.configure(config, TRUE); /* leave in reset */ call SCL.selectModuleFunc(); call SDA.selectModuleFunc(); call Usci.setI2Coa(config->i2coa); @@ -208,7 +208,7 @@ implementation { * configuration should be reasonable for lowish power. */ error_t unconfigure_() { - call Usci.enterResetMode_(); + call Usci.enterResetMode_(); /* leave in reset */ call SCL.selectIOFunc(); call SDA.selectIOFunc(); return SUCCESS; @@ -530,19 +530,25 @@ implementation { command error_t I2CSlave.setOwnAddress[uint8_t client](uint16_t addr) { //retain UCGCEN bit + call Usci.enterResetMode_(); call Usci.setI2Coa(addr); + call Usci.leaveResetMode_(); return SUCCESS; } command error_t I2CSlave.enableGeneralCall[uint8_t client]() { + call Usci.enterResetMode_(); call Usci.setI2Coa(UCGCEN | (call Usci.getI2Coa())); + call Usci.leaveResetMode_(); return SUCCESS; } command error_t I2CSlave.disableGeneralCall[uint8_t client]() { + call Usci.enterResetMode_(); call Usci.setI2Coa(~UCGCEN & (call Usci.getI2Coa())); + call Usci.leaveResetMode_(); return SUCCESS; } From c2a9dd39d3f8cb1579738d6d579b7892db6949af Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Jan 2013 01:37:30 -0700 Subject: [PATCH 323/411] msp430 adc12: If undefined ADC12ENC, assign from ENC. TI's headers are inconsistent and some cpu's that have the ADC12 hardware don't define ADC12ENC. Rather it uses the older unspecific ENC define. This fix defines ADC12ENC from ENC but only for those cpus that explicitly have the ADC12 h/w module. Fixes tp-freeforall/prod #23 --- tos/chips/msp430/adc12/Msp430Adc12.h | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/tos/chips/msp430/adc12/Msp430Adc12.h b/tos/chips/msp430/adc12/Msp430Adc12.h index 581b3289e4..e6d0c5bf18 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12.h +++ b/tos/chips/msp430/adc12/Msp430Adc12.h @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013, Eric B. Decker * Copyright (c) 2011, Eric B. Decker * Copyright (c) 2010, People Power Co. * Copyright (c) 2006, Technische Universitaet Berlin @@ -285,10 +286,18 @@ struct adc12_t { #endif /* __MSP430_HAS_ADC12_PLUS__ */ -#ifdef notdef -#define ENC ADC12ENC -#define CONSEQ0 ADC12CONSEQ0 -#define CONSEQ1 ADC12CONSEQ1 +/* + * TI's headers are not consistent. There are several + * headers for cpus that define __MSP430_HAS_ADC12__ + * but doesn't define ADC12ENC. Rather it defines ENC. + * + * Fix it here. Note that we are protected from picking + * up a wrong value for ENC because we check to see if + * this cpu explicitly has the ADC12 h/w. + */ + +#ifndef ADC12ENC +#define ADC12ENC ENC #endif #endif /* __MSP430_TI_HEADERS__ */ From 6a083d82ce6204c64ee3312f47c7ab72d45e5327 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Thu, 10 Jan 2013 16:29:45 -0700 Subject: [PATCH 324/411] Be explicit about focusing on msp430 based environments --- 00b_Development_Environment | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/00b_Development_Environment b/00b_Development_Environment index f334ca9cb7..83a3c68dd6 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -1,5 +1,11 @@ Installing a development environment for TinyOS (TinyProd). +Focuses on installing a msp430 based development environment but can +easily be adapted to other cpus by changing what toolchain gets +installed. + +Linux only. + State: From c7cf4f10d61caed5fbe75c6d13e24a99b6da0531 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 10 Jan 2013 18:27:56 -0700 Subject: [PATCH 325/411] msp430 adc12: If undefined ADC12CONSEQ{0,1}, assign from CONSEQ{0,1} Similar to c2a9dd3, fix bugs in TI's headers. Fixes #23 --- tos/chips/msp430/adc12/Msp430Adc12.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tos/chips/msp430/adc12/Msp430Adc12.h b/tos/chips/msp430/adc12/Msp430Adc12.h index e6d0c5bf18..7772b1c5d6 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12.h +++ b/tos/chips/msp430/adc12/Msp430Adc12.h @@ -291,6 +291,13 @@ struct adc12_t { * headers for cpus that define __MSP430_HAS_ADC12__ * but doesn't define ADC12ENC. Rather it defines ENC. * + * Same applies to ADC12CONSEQ{0,1}. There are many others + * which aren't currently used, the TI headers are seriously + * confused, something using ENC sometimes ADC12ENC, ADC12ENC + * is correct. If more are used because of changes in the + * driver it is recommended that these tweaks be pulled out + * into their own file which then gets included here. + * * Fix it here. Note that we are protected from picking * up a wrong value for ENC because we check to see if * this cpu explicitly has the ADC12 h/w. @@ -300,6 +307,14 @@ struct adc12_t { #define ADC12ENC ENC #endif +#ifndef ADC12CONSEQ0 +#define ADC12CONSEQ0 CONSEQ0 +#endif + +#ifndef ADC12CONSEQ1 +#define ADC12CONSEQ1 CONSEQ1 +#endif + #endif /* __MSP430_TI_HEADERS__ */ #if __GNUC__ >= 4 From 65d7e43c41038da396ca11b6f9778cb4fec9879b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sat, 12 Jan 2013 16:37:55 -0700 Subject: [PATCH 326/411] bump msp430-47 to 20120911 --- packaging/msp430-47/build.sh | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/packaging/msp430-47/build.sh b/packaging/msp430-47/build.sh index eff2fae4d7..fad8586043 100755 --- a/packaging/msp430-47/build.sh +++ b/packaging/msp430-47/build.sh @@ -9,7 +9,7 @@ # binutils 2.22 # gcc 4.7.0 # gdb 7.2a - disabled -# mspgcc 20120716 +# mspgcc 20120911 # msp430-libc 20120716 # msp430mcu 20120716 # @@ -31,10 +31,11 @@ # BUILD_ROOT=$(pwd) +POST_VER=-expr : ${POST_VER:=-tinyos} -DEB_DEST=opt/msp430-47 -CODENAME=msp430-47 +DEB_DEST=opt/msp430-47-expr +CODENAME=msp430-47-expr REL=EXP MAKE_J=-j8 @@ -61,7 +62,7 @@ GMP=gmp-${GMP_VER} MPFR=mpfr-${MPFR_VER} MPC=mpc-${MPC_VER} -MSPGCC_VER=20120716 +MSPGCC_VER=20120911 MSPGCC=mspgcc-${MSPGCC_VER} MSPGCC_DIR=DEVEL-4.7.x/ @@ -568,7 +569,7 @@ case $1 in test) setup_deb download -# patch_dirs + patch_dirs # build_binutils # package_binutils_deb # build_gcc @@ -579,7 +580,7 @@ case $1 in # package_libc_deb # build_gdb # package_gdb_deb - package_dummy_deb +# package_dummy_deb ;; download) From dff1708187ef3210c073f662611b505a79629134 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Fri, 18 Jan 2013 15:02:46 -0700 Subject: [PATCH 327/411] msp430 x2 usci: getStopBit() and getTransmitReceiveMode duplicate Some how these two functions got duplicated. (probable merge issue from the mainline). Fixes #22. --- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc | 4 ---- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc | 6 +----- tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc | 4 ---- 3 files changed, 1 insertion(+), 13 deletions(-) diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc index 55a0db1602..008a1b3360 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc @@ -185,10 +185,6 @@ interface HplMsp430UsciB { async command void setTransmitMode(); async command void setReceiveMode(); - /* get bits of uctl1 in i2c mode */ - async command bool getStopBit(); - async command bool getTransmitReceiveMode(); - /* h/w bits for controlling what to send next when master */ async command void setTXNACK(); async command void setTXStop(); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc index 280989c520..22176dac37 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc @@ -396,10 +396,6 @@ implementation { async command void Usci.setTransmitMode() { UCB0CTL1 |= UCTR; } async command void Usci.setReceiveMode() { UCB0CTL1 &= ~UCTR; } - /* get stop bit in i2c mode */ - async command bool Usci.getStopBit() { return (UCB0CTL1 & UCTXSTP); } - async command bool Usci.getTransmitReceiveMode() { return (UCB0CTL1 & UCTR); } - /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ async command void Usci.setTXNACK() { UCB0CTL1 |= UCTXNACK; } async command void Usci.setTXStop() { UCB0CTL1 |= UCTXSTP; } @@ -407,7 +403,7 @@ implementation { /* * get/set I2COA, Own Address register - * clears UCGCEN, Genernal Call response enable + * clears UCGCEN, General Call response enable */ async command uint16_t Usci.getOwnAddress() { return (UCB0I2COA & ~UCGCEN); diff --git a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc index 5967d3b513..21f41396bd 100644 --- a/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc +++ b/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc @@ -402,10 +402,6 @@ implementation { async command void Usci.setTransmitMode() { UCB1CTL1 |= UCTR; } async command void Usci.setReceiveMode() { UCB1CTL1 &= ~UCTR; } - /* get stop bit in i2c mode */ - async command bool Usci.getStopBit() { return (UCB1CTL1 & UCTXSTP); } - async command bool Usci.getTransmitReceiveMode() { return (UCB1CTL1 & UCTR); } - /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ async command void Usci.setTXNACK() { UCB1CTL1 |= UCTXNACK; } async command void Usci.setTXStop() { UCB1CTL1 |= UCTXSTP; } From caa38616702024e0ac6bd728b431f524cf67f9b5 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Tue, 22 Jan 2013 22:55:07 -0800 Subject: [PATCH 328/411] msp430 adc12: turn off warning about bitfield code gen adc12, usart, and usci bitfield code effected. Just turn the warnings off. Bitfields work fine. Been using the bitfield code generation in 4.6.3 for some time now. Used in active code for ADC12, the USART in the 1611 code, and the USCI code for the 2618 code. --- tos/chips/msp430/adc12/Msp430Adc12.h | 10 +++++++++- tos/chips/msp430/usart/msp430usart.h | 4 ---- tos/chips/msp430/x2xxx/usci/msp430usci.h | 4 ---- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/tos/chips/msp430/adc12/Msp430Adc12.h b/tos/chips/msp430/adc12/Msp430Adc12.h index 7772b1c5d6..aea3bcd799 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12.h +++ b/tos/chips/msp430/adc12/Msp430Adc12.h @@ -318,7 +318,15 @@ struct adc12_t { #endif /* __MSP430_TI_HEADERS__ */ #if __GNUC__ >= 4 -#warning "ADC12 periph_reg bitfields: mspgcc >= 4 (check bitfield code gen)." +/* + * at one point (3.2.3 timeframe) someone noted that there was problems + * with the bitfield code gen. What exactly wasn't documented. No + * problems have been noticed but you might want to keep an eye out. + * + * As of 4.6.3 and 4.7 do not bitch. + * + * #warning "ADC12 periph_reg bitfields: mspgcc >= 4 (check bitfield code gen)." + */ #else /* Test for GCC bug (bitfield access) - only version 3.2.3 is known to be stable */ #define GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__ * 10 + __GNUC_PATCHLEVEL__) diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h index 147b6b4515..6213c7ebac 100644 --- a/tos/chips/msp430/usart/msp430usart.h +++ b/tos/chips/msp430/usart/msp430usart.h @@ -39,10 +39,6 @@ #error "msp430usart.h: USART0/UART0 not supported on this processor" #endif -#if __GNUC__ >= 4 -#warning "USART periph_reg bitfields: mspgcc >= 4 (check bitfield code gen)." -#endif - #define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource" #define MSP430_SPIO_BUS "Msp430Spi0.Resource" #define MSP430_UARTO_BUS "Msp430Uart0.Resource" diff --git a/tos/chips/msp430/x2xxx/usci/msp430usci.h b/tos/chips/msp430/x2xxx/usci/msp430usci.h index 1bcfd36515..590ab94f15 100644 --- a/tos/chips/msp430/x2xxx/usci/msp430usci.h +++ b/tos/chips/msp430/x2xxx/usci/msp430usci.h @@ -68,10 +68,6 @@ #error "msp430usci: processor not supported, currently only supports x2xxx (HAS_USCI)" #endif -#if __GNUC__ >= 4 -#warning "USCI periph_reg bitfields: mspgcc >= 4 (check bitfield code gen)." -#endif - /* * The x2 family consists of the msp430f261{6,7,8,9} which provides * 2 USCI_As (UART/SPI) and 2 USCI_Bs (SPI/I2C). These are mapped on a pure From 1cfcea6bd84f3be775c90bcb212b80427214e401 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 24 Jan 2013 23:51:27 -0800 Subject: [PATCH 329/411] msp430 x1 dma: update mods for new unified dma driver --- tos/chips/msp430/usart/Msp430SpiDmaP.nc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/usart/Msp430SpiDmaP.nc b/tos/chips/msp430/usart/Msp430SpiDmaP.nc index 5aa805acd3..68f27f5df4 100644 --- a/tos/chips/msp430/usart/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiDmaP.nc @@ -1,4 +1,5 @@ /** + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * @@ -33,9 +34,10 @@ * @author Jonathan Hui * @author Mark Hays * @author Roman Lim - * @version $Revision: 1.6 $ $Date: 2008-02-28 17:28:12 $ + * @author Eric B. Decker */ +#include "Msp430Dma.h" generic module Msp430SpiDmaP( uint16_t IFG_addr, uint16_t TXBUF_addr, @@ -146,7 +148,7 @@ implementation { // if buf inc, else dumping RXTRIG, // specified trigger (uint16_t) RXBUF_addr, - (rx_buf ? rx_buf : &m_dump), + (uint16_t) (rx_buf ? rx_buf : &m_dump), len); call DmaChannel1.enableDma(); From a93ee5ac13b51fe7886ef0f9166f76bafe4ff608 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Thu, 24 Jan 2013 23:52:09 -0800 Subject: [PATCH 330/411] msp430 dma: transferDone has no parameter. --- tos/chips/msp430/usart/Msp430SpiDmaP.nc | 6 +++--- tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc | 7 ++++--- tos/platforms/shimmer/shimmerAnalogSetupP.nc | 9 ++++++--- 3 files changed, 13 insertions(+), 9 deletions(-) diff --git a/tos/chips/msp430/usart/Msp430SpiDmaP.nc b/tos/chips/msp430/usart/Msp430SpiDmaP.nc index 68f27f5df4..03e766ff7a 100644 --- a/tos/chips/msp430/usart/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/usart/Msp430SpiDmaP.nc @@ -178,11 +178,11 @@ implementation { atomic signalDone( SUCCESS ); } - async event void DmaChannel1.transferDone( error_t error ) { - signalDone( error ); + async event void DmaChannel1.transferDone() { + signalDone(SUCCESS); } - async event void DmaChannel2.transferDone( error_t error ) {} + async event void DmaChannel2.transferDone() {} void signalDone( error_t error ) { signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, error ); diff --git a/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc index 636990f147..8bee305d73 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation @@ -178,11 +179,11 @@ implementation { atomic signalDone( SUCCESS ); } - async event void DmaChannel1.transferDone( error_t error ) { - signalDone( error ); + async event void DmaChannel1.transferDone() { + signalDone(SUCCESS); } - async event void DmaChannel2.transferDone( error_t error ) {} + async event void DmaChannel2.transferDone() {} void signalDone( error_t error ) { signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, error ); diff --git a/tos/platforms/shimmer/shimmerAnalogSetupP.nc b/tos/platforms/shimmer/shimmerAnalogSetupP.nc index 66772e75de..667c63d3e5 100644 --- a/tos/platforms/shimmer/shimmerAnalogSetupP.nc +++ b/tos/platforms/shimmer/shimmerAnalogSetupP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2010, Shimmer Research, Ltd. * All rights reserved * @@ -30,9 +31,11 @@ * * @author Steve Ayer * @date March, 2010 - + * * this is going to get duplicated in a million apps, so we gather simple setup - * routines with reasonable defaults here. specific + * routines with reasonable defaults here. specific + * + * Modified for new unified msp430 dma driver, Eric B. Decker */ @@ -259,7 +262,7 @@ implementation { call Msp430DmaChannel.enableDma(); } - async event void Msp430DmaChannel.transferDone(error_t success) { + async event void Msp430DmaChannel.transferDone() { } async event void HplAdc12.conversionDone(uint16_t iv) { From 4eac25f5d8628b722626409e97e00724f043dbc1 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Fri, 25 Jan 2013 01:05:24 -0800 Subject: [PATCH 331/411] 4bitle: return type of Send.cancel should be error_t was uint8_t but should have been error_t to match the interface of AMSend.cancel. --- tos/lib/net/4bitle/LinkEstimatorP.nc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tos/lib/net/4bitle/LinkEstimatorP.nc b/tos/lib/net/4bitle/LinkEstimatorP.nc index 892511d4a8..ce71660761 100644 --- a/tos/lib/net/4bitle/LinkEstimatorP.nc +++ b/tos/lib/net/4bitle/LinkEstimatorP.nc @@ -572,7 +572,7 @@ implementation { } // cascade the calls down - command uint8_t Send.cancel(message_t* msg) { + command error_t Send.cancel(message_t* msg) { return call AMSend.cancel(msg); } From 14a16f46fb4b97238ab91692fdfd3d30c4c942a1 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 18 Feb 2013 00:21:10 -0800 Subject: [PATCH 332/411] msp430: add __TOS_MSP430_CORE__ define to denote what API release it is. --- tos/chips/msp430/msp430hardware.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h index 3c66082351..3b57a9a207 100644 --- a/tos/chips/msp430/msp430hardware.h +++ b/tos/chips/msp430/msp430hardware.h @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2010 People Power Co. * Copyright (c) 2000-2003, 2010 The Regents of the University of California. @@ -43,6 +44,16 @@ #ifndef _H_msp430hardware_h #define _H_msp430hardware_h +/* + * __TOS_MSP430_CORE__ defines the release version of the msp430 core code. + * It can be used when transitioning between major changes in the msp430 + * API. + * + * Ver 1, subver 0 + */ +#define __TOS_MSP430_CORE__ 0100 +#define __TOS_MSP430_CORE_0100__ 0100 + #if defined(__MSPGCC__) /* mspgcc */ #include From 943d9c39c0fb9f4a691b3db3cc68d71b41bc4329 Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Thu, 21 Feb 2013 02:05:52 -0800 Subject: [PATCH 333/411] Add info about different main repositories --- 00b_Development_Environment | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/00b_Development_Environment b/00b_Development_Environment index 83a3c68dd6..672af40068 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -92,7 +92,7 @@ gpg -a --export 34EC655A | sudo apt-key add - sudo -s # -# teach dpkt/apt-get/aptitude about where to find the tinyprod tools repository +# teach dpkg/apt-get/aptitude about where to find the tinyprod tools repository # echo "deb http://tinyprod.net/repos/debian squeeze main" >> /etc/apt/sources.list.d/tinyprod-debian.list echo "deb http://tinyprod.net/repos/debian msp430-46 main" >> /etc/apt/sources.list.d/tinyprod-debian.list @@ -104,9 +104,22 @@ exit 3) TinyOS 2.x tree checkout -This is a basic check out of the tp-master branch of the github repository -tp-freeforall/prod.git. This repo tracks the main tinyos SVN repository used -for development. It has modifications to support newer TI MSP430 processors. +There are several repositories of note for TinyOS 2.1.2+. You should choose the one that makes +the most sense for what you are working on. These repositories are all related and pains have +been taken to track appropriately. + +gh:tp-freeforall/prod (tp-master): This repository contains additional code beyond the current +development core that has been made public. Currently its major feature is an enhanced msp430 +core that supports newer chips. It actively tracks the main tinyos development repo. + +gh:tinyos/tinyos-main(master): This is the main tinyos development repository. + +gh:tinyos/tinyos-release(tinyos-2_1_2): This is the main tinyos release repository. Its +default branch (currently tinyos-2_1_2) will always point at the current release. + + +For example, to check out of the tp-master branch of the github repository +tp-freeforall/prod.git (aka: gh:tp-freeforall/prod(tp-master): This basic checkout gives you a read-only copy of the tp-master branch. It is a fully functional local repository that can be commited into (locally only). From 1105cdd28a775f51fb5e41a9754babecad16b21d Mon Sep 17 00:00:00 2001 From: Eric Decker Date: Thu, 21 Feb 2013 02:11:56 -0800 Subject: [PATCH 334/411] Add note about getting tinyos-release --- 00b_Development_Environment | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/00b_Development_Environment b/00b_Development_Environment index 672af40068..971bb22480 100644 --- a/00b_Development_Environment +++ b/00b_Development_Environment @@ -131,6 +131,14 @@ is a fully functional local repository that can be commited into (locally only). cd tinyos-2.x git checkout -b + +>>>>>>> +Note: To get the current tinyos release (currently, tinyos-2_1_2) you should use the following: + + git clone -v git://github.com/tinyos/tinyos-release tinyos-2.x +<<<<<<< + + This will create a new branch named and will check you into that branch. It will be branched off of the main branch from the remote, gh:tp-freeforall/prod (tp-master). From b5c79ca62832f24b63ac7f5f16e4e4d57f77a58e Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 18 Mar 2013 00:31:15 -0700 Subject: [PATCH 335/411] cc2520: remove various bits of cruft --- tos/chips/cc2520/CC2520DriverLayerP.nc | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/tos/chips/cc2520/CC2520DriverLayerP.nc b/tos/chips/cc2520/CC2520DriverLayerP.nc index bb6494a0ce..b8a648f50f 100644 --- a/tos/chips/cc2520/CC2520DriverLayerP.nc +++ b/tos/chips/cc2520/CC2520DriverLayerP.nc @@ -95,8 +95,6 @@ module CC2520DriverLayerP interface DiagMsg; #endif interface Leds; - interface Draw; - interface CC2520Security; } } @@ -430,10 +428,12 @@ implementation{ return; } +#ifdef notdef inline void UCTR(uint8_t priority, uint8_t key_addr, uint8_t payload_len, uint8_t nonce_addr, uint16_t start_addr, uint16_t dest_addr){ CTR(priority, key_addr, payload_len, nonce_addr, start_addr, dest_addr); return; } +#endif inline void MEMCP(uint8_t priority, uint16_t count, uint16_t start_addr, uint16_t dest_addr){ @@ -1309,8 +1309,6 @@ implementation{ security_header_t* secHdr; ieee154_simple_header_t* ieee154header; - //call Draw.fill(COLOR_WHITE); - //state = STATE_RX_DOWNLOAD; isSpiAcquired(); @@ -1597,7 +1595,6 @@ implementation{ //state = STATE_RX_ON; //cmd = CMD_NONE; - //call Draw.drawInt(80,140,5,1,COLOR_BLUE); endRx(); // ready to receive new message: enable SFD interrupts //call SfdCapture.captureRisingEdge();// JK From 68be62a88b2640d7d1b005807d70e693fb3130ea Mon Sep 17 00:00:00 2001 From: Peter Volgyesi Date: Mon, 18 Mar 2013 21:45:53 -0500 Subject: [PATCH 336/411] Fixes for the msp430 (-46) toolchain targeting Cygwin --- packaging/msp430-46/build.sh | 2 +- packaging/msp430-46/msp430-binutils.spec | 2 ++ packaging/msp430-46/msp430-gcc.spec | 2 ++ packaging/msp430-46/msp430-gdb.spec | 2 ++ packaging/msp430-46/msp430-libc.spec | 2 ++ packaging/msp430-46/msp430mcu.spec | 2 ++ packaging/mspdebug/build.sh | 2 +- packaging/mspdebug/mspdebug.spec | 4 +++- 8 files changed, 15 insertions(+), 3 deletions(-) diff --git a/packaging/msp430-46/build.sh b/packaging/msp430-46/build.sh index 5d36cad1ba..76a3468c27 100755 --- a/packaging/msp430-46/build.sh +++ b/packaging/msp430-46/build.sh @@ -43,7 +43,7 @@ BUILD_ROOT=$(pwd) DEB_DEST=usr CODENAME=msp430-46 REL=LTS -MAKE_J=-j8 +#MAKE_J=-j8 if [[ -z "${TOSROOT}" ]]; then TOSROOT=$(pwd)/../../../.. diff --git a/packaging/msp430-46/msp430-binutils.spec b/packaging/msp430-46/msp430-binutils.spec index f2a3da6258..4cba7c8a37 100644 --- a/packaging/msp430-46/msp430-binutils.spec +++ b/packaging/msp430-46/msp430-binutils.spec @@ -5,6 +5,7 @@ Release: %{release} License: GNU GPL Packager: Razvan Musaloiu-E. Group: Development/Tools +BuildRoot: %{_builddir}/%{name}-%{version}-%{release}.%{_arch} %description @@ -12,4 +13,5 @@ Group: Development/Tools rsync -a %{prefix} %{buildroot} %files +%defattr(-,root,root) /usr diff --git a/packaging/msp430-46/msp430-gcc.spec b/packaging/msp430-46/msp430-gcc.spec index 7d7bded2bb..a34c1fe8f8 100644 --- a/packaging/msp430-46/msp430-gcc.spec +++ b/packaging/msp430-46/msp430-gcc.spec @@ -6,6 +6,7 @@ License: GNU GPL Packager: Razvan Musaloiu-E. Group: Development/Tools Requires: msp430-binutils-46 +BuildRoot: %{_builddir}/%{name}-%{version}-%{release}.%{_arch} %description @@ -20,4 +21,5 @@ rsync -a %{prefix} %{buildroot} %define __strip /bin/true %files +%defattr(-,root,root) /usr diff --git a/packaging/msp430-46/msp430-gdb.spec b/packaging/msp430-46/msp430-gdb.spec index b84271ed0f..4e3ccec049 100644 --- a/packaging/msp430-46/msp430-gdb.spec +++ b/packaging/msp430-46/msp430-gdb.spec @@ -5,6 +5,7 @@ Release: %{release} License: GNU GPL Packager: Razvan Musaloiu-E. Group: Development/Tools +BuildRoot: %{_builddir}/%{name}-%{version}-%{release}.%{_arch} %description @@ -20,4 +21,5 @@ rsync -a %{prefix} %{buildroot} %define __strip /bin/true %files +%defattr(-,root,root) /usr diff --git a/packaging/msp430-46/msp430-libc.spec b/packaging/msp430-46/msp430-libc.spec index 46e5493c7e..3c718ab7fe 100644 --- a/packaging/msp430-46/msp430-libc.spec +++ b/packaging/msp430-46/msp430-libc.spec @@ -6,6 +6,7 @@ License: GNU GPL Packager: Razvan Musaloiu-E. Group: Development/Tools Requires: msp430-binutils-46, msp430-gcc-46 +BuildRoot: %{_builddir}/%{name}-%{version}-%{release}.%{_arch} %description @@ -21,4 +22,5 @@ rsync -a %{prefix} %{buildroot} %define __strip /bin/true %files +%defattr(-,root,root) /usr diff --git a/packaging/msp430-46/msp430mcu.spec b/packaging/msp430-46/msp430mcu.spec index 67b1cfd0df..a2b6cb66fb 100644 --- a/packaging/msp430-46/msp430mcu.spec +++ b/packaging/msp430-46/msp430mcu.spec @@ -5,6 +5,7 @@ Release: %{release} License: GNU GPL Packager: Razvan Musaloiu-E. Group: Development/Tools +BuildRoot: %{_builddir}/%{name}-%{version}-%{release}.%{_arch} %description @@ -18,4 +19,5 @@ rsync -a %{prefix} %{buildroot} ) %files +%defattr(-,root,root) /usr diff --git a/packaging/mspdebug/build.sh b/packaging/mspdebug/build.sh index 2d43d22f5a..8ab793f9d8 100755 --- a/packaging/mspdebug/build.sh +++ b/packaging/mspdebug/build.sh @@ -20,7 +20,7 @@ BUILD_ROOT=$(pwd) DEB_DEST=usr CODENAME=squeeze -MAKE_J=-j8 +#MAKE_J=-j8 if [[ -z "${TOSROOT}" ]]; then TOSROOT=$(pwd)/../../../.. diff --git a/packaging/mspdebug/mspdebug.spec b/packaging/mspdebug/mspdebug.spec index b0aaffbba9..eb6c9fe8a0 100644 --- a/packaging/mspdebug/mspdebug.spec +++ b/packaging/mspdebug/mspdebug.spec @@ -5,6 +5,7 @@ Release: %{release} License: GNU GPL Packager: Eric B. Decker Group: Development/Tools +BuildRoot: %{_builddir}/%{name}-%{version}-%{release}.%{_arch} %description @@ -12,4 +13,5 @@ Group: Development/Tools rsync -a %{prefix} %{buildroot} %files -/usr \ No newline at end of file +%defattr(-,root,root) +/usr From 709fa3fcb6c65a9824808a926c82ca46f020eb63 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 20 Mar 2013 01:28:24 -0700 Subject: [PATCH 337/411] msp430-gdb: teach gdb about cpu rom addresses (caching) --- tos/chips/msp430/99_gdb/00_README | 48 +++++++++++++++++++++++++++++++ tos/chips/msp430/99_gdb/gdb_x1 | 3 ++ tos/chips/msp430/99_gdb/gdb_x2 | 3 ++ tos/chips/msp430/99_gdb/gdb_x5 | 12 ++++++++ tos/chips/msp430/99_gdb/gdbinit | 9 ++++-- 5 files changed, 73 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/99_gdb/00_README b/tos/chips/msp430/99_gdb/00_README index 4c172325f4..9028b9b226 100644 --- a/tos/chips/msp430/99_gdb/00_README +++ b/tos/chips/msp430/99_gdb/00_README @@ -60,3 +60,51 @@ Emacs also has a nice interface to all of this including a source level debugging mechanism. From within emacs use M-x gdb and then Run gdb (like this): msp430-gdb --annotate=3 build/z1/main.exe + + +Slow Debugging: (from David Brown, , thanks David) + +By default, gdb considers all memory areas to be non-cached (i.e., it +reads them from the hardware every time it wants to show them) and uses +native sized accesses. This means that if it wants to read code, such +as to show the disassembly window, it has to do an awful lot of 2-byte +reads from the chip - often reading the same address several times. As +there is a certain latency for each read, this can mean long delays +while everything is read and re-read (you can see this on the output of +mspdebug). + +The way to avoid this is by memory regions. In the gdb setup, include +several lines about memory: + + +set remoteaddresssize 64 +set remotetimeout 999999 +set remote memory-write-packet-size 2048 +set remote memory-write-packet-size fixed +set remote memory-read-packet-size 2048 +set remote memory-read-packet-size fixed + +set mem inaccessible-by-default off +mem 0x2100 0x100000 ro 64 cache + + +The exact range for the "ro 64 cache" memory area will depend on the +chip you use, but it should cover the code flash. gdb will then know +that it can use 64-byte reads in this area, and can remember the results +- substantially cutting down on extra reads. + + +x1 family: 0x0c00 - 0x0fff boot memory (rom) +(1611) 0x1000 - 0x10ff info memory (rom) + 0x1100 - 0x38ff ram (10k) + 0x4000 - 0xffff rom (48k) + +x2 family: 0x00c00 - 0x00fff boot memory (rom) +(2618) 0x01000 - 0x010ff info memory (rom) + 0x01100 - 0x030ff ram (8k) + 0x03100 - 0x1ffff rom (116k) + +x5 family: 0x01000 - 0x017ff boot memory (rom) 2k +(5438a) 0x01800 - 0x019ff info memory (rom) 1k + 0x01c00 - 0x05bff ram (16k) + 0x05c00 - 0x45bff rom (256k) diff --git a/tos/chips/msp430/99_gdb/gdb_x1 b/tos/chips/msp430/99_gdb/gdb_x1 index 4eca6104dc..fe00bc6517 100644 --- a/tos/chips/msp430/99_gdb/gdb_x1 +++ b/tos/chips/msp430/99_gdb/gdb_x1 @@ -1,4 +1,7 @@ +set mem inaccessible-by-default off +mem 0x04000 0x10000 ro 64 cache + # # Define various gdb user commands that let you look at pieces of the CPU. # diff --git a/tos/chips/msp430/99_gdb/gdb_x2 b/tos/chips/msp430/99_gdb/gdb_x2 index b6b397f206..ea467857b3 100644 --- a/tos/chips/msp430/99_gdb/gdb_x2 +++ b/tos/chips/msp430/99_gdb/gdb_x2 @@ -1,4 +1,7 @@ +set mem inaccessible-by-default off +mem 0x03100 0x20000 ro 64 cache + # # Define various gdb user commands that let you look at pieces of the CPU. # diff --git a/tos/chips/msp430/99_gdb/gdb_x5 b/tos/chips/msp430/99_gdb/gdb_x5 index eb9fb888bb..38dadabd28 100644 --- a/tos/chips/msp430/99_gdb/gdb_x5 +++ b/tos/chips/msp430/99_gdb/gdb_x5 @@ -1,3 +1,15 @@ + +set mem inaccessible-by-default off +mem 0x05c00 0x46000 ro 64 cache + +# +# Define various gdb user commands that let you look at pieces of the CPU. +# +# msp430f5438a +# +# author: Eric B. Decker +# + #display power management module (pmm) define pmm set $_pmm_base=0x120 diff --git a/tos/chips/msp430/99_gdb/gdbinit b/tos/chips/msp430/99_gdb/gdbinit index 18eb559ac3..943cffb460 100644 --- a/tos/chips/msp430/99_gdb/gdbinit +++ b/tos/chips/msp430/99_gdb/gdbinit @@ -1,10 +1,15 @@ +set remoteaddresssize 0d64 +set remotetimeout 0d999999 +set remote memory-write-packet-size 2048 +set remote memory-write-packet-size fixed +set remote memory-read-packet-size 2048 +set remote memory-read-packet-size fixed + #source ../../.gdb_x1 source ../../.gdb_x2 #source ../../.gdb_x5 -set remoteaddresssize 0d64 -set remotetimeout 0d999999 target remote localhost:2000 disp/i $pc From 0e44ddddf6840a59e05a9ec5ec4778a4067b669d Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 29 Apr 2013 02:43:11 -0700 Subject: [PATCH 338/411] gdb: change gdb remote packet size from 2048 to 1024 The mspdebug gdb remote server is much happier with 1024 --- tos/chips/msp430/99_gdb/gdbinit | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/99_gdb/gdbinit b/tos/chips/msp430/99_gdb/gdbinit index 943cffb460..dc93570b62 100644 --- a/tos/chips/msp430/99_gdb/gdbinit +++ b/tos/chips/msp430/99_gdb/gdbinit @@ -1,9 +1,9 @@ set remoteaddresssize 0d64 set remotetimeout 0d999999 -set remote memory-write-packet-size 2048 +set remote memory-write-packet-size 1024 set remote memory-write-packet-size fixed -set remote memory-read-packet-size 2048 +set remote memory-read-packet-size 1024 set remote memory-read-packet-size fixed #source ../../.gdb_x1 From 9f45360235c7274a83daaa26be7ee141d8037eee Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 29 Apr 2013 02:50:57 -0700 Subject: [PATCH 339/411] msp430 timer: update timer maps (micro, 32k), documentation, add x5 micro --- tos/chips/msp430/timer/Msp430TimerMicroC.nc | 6 ++ .../msp430/x1x2/timer/Msp430Timer32khzMapC.nc | 4 ++ .../msp430/x1x2/timer/Msp430TimerMicroMapC.nc | 23 ++++--- .../x5xxx/timer/Msp430Timer32khzMapC.nc | 5 ++ .../x5xxx/timer/Msp430TimerMicroMapC.nc | 62 +++++++++++++++++++ 5 files changed, 92 insertions(+), 8 deletions(-) create mode 100644 tos/chips/msp430/x5xxx/timer/Msp430TimerMicroMapC.nc diff --git a/tos/chips/msp430/timer/Msp430TimerMicroC.nc b/tos/chips/msp430/timer/Msp430TimerMicroC.nc index c5ead7ece9..d057d5c9ce 100644 --- a/tos/chips/msp430/timer/Msp430TimerMicroC.nc +++ b/tos/chips/msp430/timer/Msp430TimerMicroC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013, Eric B. Decker * Copyright (c) 2010, Vanderbilt University * All rights reserved. * @@ -30,6 +31,11 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai + * Author: Eric B. Decker + * + * This file interfaces an TimerMicro instance to the underlying h/w + * that presents the actual timer h/w. The first instance (use of + * "new") */ generic configuration Msp430TimerMicroC() diff --git a/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc index 5a36612c6a..8322d6d485 100644 --- a/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc +++ b/tos/chips/msp430/x1x2/timer/Msp430Timer32khzMapC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. @@ -38,6 +39,9 @@ * hardware timers on the MSP430 that are available for compile time allocation * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. * + * x1/x2 processors has two Timer blocks, TA3 and TB7. TA3 is assigned to + * TMicro while TB7 is used by the 32KHiZ clock system that runs TMilli. + * * @author Cory Sharp * @author Eric B. Decker */ diff --git a/tos/chips/msp430/x1x2/timer/Msp430TimerMicroMapC.nc b/tos/chips/msp430/x1x2/timer/Msp430TimerMicroMapC.nc index 980ab83dc2..b82ab63737 100644 --- a/tos/chips/msp430/x1x2/timer/Msp430TimerMicroMapC.nc +++ b/tos/chips/msp430/x1x2/timer/Msp430TimerMicroMapC.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013, Eric B. Decker * Copyright (c) 2010, Vanderbilt University * All rights reserved. * @@ -30,16 +31,24 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai - */ - -configuration Msp430TimerMicroMapC -{ + * + * x1x2 Msp430TimerMicroMapC + * + * The x1/x2 processors have dual timers, TA3 and TB7. + * TimerA is assigned by the platform to TMicro. This module hands + * out control registers for the TA3 control cells. + * + * TimerB is assigned to 32KHiZ which is used by TMilli. See + * Msp430Timer32khzMapC which hands out TimerB controls. + */ + +configuration Msp430TimerMicroMapC { provides interface Msp430Timer[ uint8_t id ]; provides interface Msp430TimerControl[ uint8_t id ]; provides interface Msp430Compare[ uint8_t id ]; } -implementation -{ + +implementation { components Msp430TimerC; Msp430Timer[0] = Msp430TimerC.TimerA; @@ -53,6 +62,4 @@ implementation Msp430Timer[2] = Msp430TimerC.TimerA; Msp430TimerControl[2] = Msp430TimerC.ControlA2; Msp430Compare[2] = Msp430TimerC.CompareA2; - } - diff --git a/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc index 0263b96e5c..a25f941bfe 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430Timer32khzMapC.nc @@ -57,6 +57,11 @@ * for the 32KHz timer suite. If you clone this to a platform area, * remember to also clone Msp430Counter32khzC if you change to a * different timer. + * + * x5 processors have various block of timers. The 5137 and 5438 have T0A5 + * and T1A3. The 5438 also has the T0B7 timer block. + * + * 32KiHz timing is assigned to T0An. TMicro is assigned to T1An. */ configuration Msp430Timer32khzMapC { diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerMicroMapC.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerMicroMapC.nc new file mode 100644 index 0000000000..ac16ba1181 --- /dev/null +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerMicroMapC.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2013, Eric B. Decker + * Copyright (c) 2010, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Eric B. Decker + * + * x5 Msp430TimerMicroMapC + * + * The x5 processors have at least two timer blocks, T0An and T1An. + * T0An is assigned to 32KHiZ timing (TMilli) and T1An is assigned + * to TMicro. This module hands out control registers for the T1An + * control cells. + */ + +configuration Msp430TimerMicroMapC { + provides interface Msp430Timer[ uint8_t id ]; + provides interface Msp430TimerControl[ uint8_t id ]; + provides interface Msp430Compare[ uint8_t id ]; +} +implementation { + components Msp430TimerC; + + Msp430Timer[0] = Msp430TimerC.Timer1_A; + Msp430TimerControl[0] = Msp430TimerC.Control1_A0; + Msp430Compare[0] = Msp430TimerC.Compare1_A0; + + Msp430Timer[1] = Msp430TimerC.Timer1_A; + Msp430TimerControl[1] = Msp430TimerC.Control1_A1; + Msp430Compare[1] = Msp430TimerC.Compare1_A1; + + Msp430Timer[2] = Msp430TimerC.Timer1_A; + Msp430TimerControl[2] = Msp430TimerC.Control1_A2; + Msp430Compare[2] = Msp430TimerC.Compare1_A2; +} From f683e715e139a279957e15e6984961fbe8e35e07 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Mon, 29 Apr 2013 02:54:59 -0700 Subject: [PATCH 340/411] msp430 adc: update docs, PLUS works (x5). --- tos/chips/msp430/00_Chip_Notes | 14 +++++++++---- tos/chips/msp430/01_Dependencies | 6 ++++-- tos/chips/msp430/adc12/HplAdc12P.nc | 2 +- tos/chips/msp430/adc12/Msp430Adc12ImplP.nc | 6 ++---- .../tosthreads/chips/msp430/Msp430Adc12P.nc | 21 +++++++++++++++---- 5 files changed, 34 insertions(+), 15 deletions(-) diff --git a/tos/chips/msp430/00_Chip_Notes b/tos/chips/msp430/00_Chip_Notes index 11b5383e43..4cfe52a8be 100644 --- a/tos/chips/msp430/00_Chip_Notes +++ b/tos/chips/msp430/00_Chip_Notes @@ -34,9 +34,9 @@ files that provide various TinyOS interfaces. It is also useful for the sake of discussion to be able to talk about chips that have roughly the same functionally. TI talks about the MSP430, MSP430X, and MSP430X2 but it is more useful to denote families in a more practical sense. The families being defined are denoted x1 (x1xxx) for -1000 seris parts (typically first generation), x2 (x2xxx) for 2000 series parts (2nd generation), -and x5 (x5xxx). A given chip isn't given a family designation until it is actually understood and -supported. +1000 series parts (typically first generation), x2 (x2xxx) for 2000 series parts (2nd generation), +and x5 for the MSP430X2 parts (x5xxx). A given chip isn't given a family designation until it is +actually understood and supported. The following families and their associated cpus are listed below. When a new cpu is added to TinyOS, it can first be isolated and supported independently. When commonalities are understood, any @@ -58,6 +58,8 @@ x1x2: contains low level cpu interfaces shared between the x1 and x2 familie x5xxx (x5): cc430f5137, msp430f5438{,a} surf (cc430f5137), ev430-5137, ev430-5438, mm5 (mam-mark mote, msp430f5438a) + note that the non-A variants of the 5437 and 5438 shouldn't be used (they + have many bugs). @@ -93,7 +95,11 @@ adc12: Most MSP430 chips include a 12 bit analog to digital converter. Driver c the basic 1st gen ADC12 (derived for the x1 family). __MSP430_HAS_ADC12__ original 12 bit. (x1, x2) - __MSP430_HAS_ADC12_PLUS__ on x5 processors, probably easy mod from ADC12. + __MSP430_HAS_ADC12_PLUS__ on x5 processors, probably easy mod from ADC12. From inspection + the _PLUS_ variant has a pre-divider, TempSensor, Resolution + (default 12 bits), sampling rate (default 200 Ksps), RefOut + (default off), ref burst (default always on). Should be backward + compatible with the ADC12 driver. clock_bcs: low level interface to on board clocking. BASIC CLOCK SYSTEM (x1, x2) 1st gen and 2nd clock support. diff --git a/tos/chips/msp430/01_Dependencies b/tos/chips/msp430/01_Dependencies index 009dc3cab0..2acc8fcc9c 100644 --- a/tos/chips/msp430/01_Dependencies +++ b/tos/chips/msp430/01_Dependencies @@ -102,7 +102,9 @@ ADC12: The adc12 module is supported on x1xxx, x2xxx, and x5xxx parts. ADC12_VECTOR is defined and the module behaves the same for all supported families. No special support needs to be -provided. +provided. The _PLUS_ functionality provided by the x5 parts is a superset of the ADC12 +functionality. The defaults for the additional functions should provide for correct operation +with the ADC12 driver (needs to be tested). DMA: @@ -148,7 +150,7 @@ Clocks: The x1xxx family has the original basic clock system (BCS) and has a 3 bit range select field. The x2xxx family has revision 2 of this system (BC2) with a 4 bit range field but is essentially - mostly compatable with the x1xxx clock. + mostly compatable with the x1xxx clock. Both are supported by the bcs clock driver. The x5xxx family has the Unified Clock System which is different (__MSP430_HAS_UCS__). diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc index d87681c4df..2708ca0182 100644 --- a/tos/chips/msp430/adc12/HplAdc12P.nc +++ b/tos/chips/msp430/adc12/HplAdc12P.nc @@ -52,7 +52,7 @@ #endif #if defined(__MSP430_HAS_ADC12_PLUS__) -#warning "HplAdc12P: processor uses ADC12_PLUS (may not work correctly)" +#warning "HplAdc12P: processor uses ADC12_PLUS (may need review)" #endif module HplAdc12P { diff --git a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc index 1315254c13..67bdf17bb9 100644 --- a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc +++ b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc @@ -45,8 +45,7 @@ #endif /* P6PIN auto configure without PlatformAdcC */ #include -module Msp430Adc12ImplP @safe() -{ +module Msp430Adc12ImplP @safe() { provides { interface Init; interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; @@ -84,8 +83,7 @@ module Msp430Adc12ImplP @safe() #endif /* ADC12_PINS_AVAILABLE : 6 */ } } -implementation -{ +implementation { #ifdef ADC12_TIMERA_ENABLED #warning Accessing TimerA for ADC12 diff --git a/tos/lib/tosthreads/chips/msp430/Msp430Adc12P.nc b/tos/lib/tosthreads/chips/msp430/Msp430Adc12P.nc index bbb7e490a0..9841c34f3b 100644 --- a/tos/lib/tosthreads/chips/msp430/Msp430Adc12P.nc +++ b/tos/lib/tosthreads/chips/msp430/Msp430Adc12P.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013, Eric B. Decker * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * @@ -26,14 +27,26 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * - Revision ------------------------------------------------------------- - * $Revision: 1.1 $ - * $Date: 2008-06-12 14:02:26 $ * @author: Jan Hauer + * @author: Eric B. Decker + * + * TosThreads has the nasty habit of copying whole files at the time of creation + * to make somekind of modification. This doesn't work very well as the low + * level code base changes. + * + * TosThreads implementation of the Msp430 ADC code has diverged significantly + * from what is now implemented for the x1, x2, and x5 msp430 families. + * + * You are welcome to try to fix it, but I'd recommend that instead you + * figure out a better way to make tosthreads work that doesn't require + * wholesale copying of source modules. + * * ======================================================================== */ -#include +#include +#warning TosThreads version of Msp430Adc12P no longer current. Review. + configuration Msp430Adc12P { provides { From b76acaeedac021050892ff21afd3e693913b324c Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 5 May 2013 02:12:33 -0700 Subject: [PATCH 341/411] msp430 usci: add DEFINABLE atomic protection for low level x5 usci-v2 --- .../msp430/x5xxx/usci-v2/HplMsp430UsciP.nc | 80 +++++++++++++------ 1 file changed, 54 insertions(+), 26 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc b/tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc index 85f01e1d5a..e7b73d3ceb 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/HplMsp430UsciP.nc @@ -1,12 +1,10 @@ /* - * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2012-2013 Eric B. Decker * Copyright (c) 2011 John Hopkins University * Copyright (c) 2011 Redslate Ltd. * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * - * This open source code was developed with funding from People Power Company - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -53,13 +51,40 @@ * @author Marcus Chang * @author Eric B. Decker * - * WARNING: This code makes the assumption that access to the various - * registers occurs with single instructions and thus is atomic. It - * has been verified that with -Os optimization, that indeed register - * access is via single instructions. Other optimizations may not - * result in single instructions. + * Depending on the optimization level of the toolchain and which toolchain, + * access may or may not be single instructions (ie. atomic). When not sure + * of exactly what instructions are being used one should use the default + * which is to surround accesses with "atomic". + * + * The define MSP430_USCI_ATOMIC_LOWLEVEL is used to control whether accesses + * are protected from interrupts (via "atomic"). If not defined, it will + * default to "atomic". To generated optimized accesses, define it to be + * empty. From your Makefile, you can do "CFLAGS += -DMSP430_USCI_ATOMIC_LOWLEVEL=". + * + * Any override will typically be done either in the platform's hardware.h + * or in the applications "Makefile". + * + * WARNING: When MSP430_USCI_ATOMIC_LOWLEVEL is blank, this code makes the + * assumption that access to the various registers occurs with single + * instructions and thus is atomic. It has been verified that with -Os + * optimization, that indeed register access is via single instructions. + * Other optimizations may not result in single instructions. In those + * cases, you should use the default value which causes "atomics" to protect + * access from interrupts. + * + * If you turn off the atomic protection it is assumed that you know + * what you are doing and will make sure the machine state is reasonable + * for what you are doing. + * + * Also note that many of the fields in various registers shouldn't be + * set unless the device is in reset. See the Users guide for details + * ie. SLAU208M for the x5 family cpus. */ +#ifndef MSP430_USCI_ATOMIC_LOWLEVEL +#define MSP430_USCI_ATOMIC_LOWLEVEL atomic +#endif + generic module HplMsp430UsciP( /** Identifier for this USCI module, unique across (type, instance) pairs */ uint8_t USCI_ID, @@ -109,13 +134,13 @@ implementation { async command void Usci.setCtl0(uint8_t v) { UCmxCTL0 = v; } async command void Usci.setCtl1(uint8_t v) { UCmxCTL1 = v; } - async command void Usci.orCtlw0(uint16_t v) { UCmxCTLW0 |= v; } - async command void Usci.orCtl0(uint8_t v) { UCmxCTL0 |= v; } - async command void Usci.orCtl1(uint8_t v) { UCmxCTL1 |= v; } + async command void Usci.orCtlw0(uint16_t v) { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTLW0 |= v; } + async command void Usci.orCtl0(uint8_t v) { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL0 |= v; } + async command void Usci.orCtl1(uint8_t v) { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL1 |= v; } - async command void Usci.andCtlw0(uint16_t v) { UCmxCTLW0 &= v; } - async command void Usci.andCtl0(uint8_t v) { UCmxCTL0 &= v; } - async command void Usci.andCtl1(uint8_t v) { UCmxCTL1 &= v; } + async command void Usci.andCtlw0(uint16_t v) { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTLW0 &= v; } + async command void Usci.andCtl0(uint8_t v) { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL0 &= v; } + async command void Usci.andCtl1(uint8_t v) { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL1 &= v; } async command uint16_t Usci.getBrw() { return UCmxBRW; } async command uint8_t Usci.getBr0() { return UCmxBR0; } @@ -156,14 +181,14 @@ implementation { async command void Usci.setIfg(uint8_t v) { UCmxIFG = v; } async command bool Usci.isRxIntrPending() { return (UCmxIFG & UCRXIFG); } - async command void Usci.clrRxIntr() { UCmxIFG &= ~UCRXIFG; } - async command void Usci.disableRxIntr() { UCmxIE &= ~UCRXIE; } - async command void Usci.enableRxIntr() { UCmxIE |= UCRXIE; } + async command void Usci.clrRxIntr() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxIFG &= ~UCRXIFG; } + async command void Usci.disableRxIntr() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxIE &= ~UCRXIE; } + async command void Usci.enableRxIntr() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxIE |= UCRXIE; } async command bool Usci.isTxIntrPending() { return (UCmxIFG & UCTXIFG); } - async command void Usci.clrTxIntr() { UCmxIFG &= ~UCTXIFG; } - async command void Usci.disableTxIntr() { UCmxIE &= ~UCTXIE; } - async command void Usci.enableTxIntr() { UCmxIE |= UCTXIE; } + async command void Usci.clrTxIntr() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxIFG &= ~UCTXIFG; } + async command void Usci.disableTxIntr() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxIE &= ~UCTXIE; } + async command void Usci.enableTxIntr() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxIE |= UCTXIE; } async command bool Usci.isBusy() { return (UCmxSTAT & UCBUSY); } @@ -174,14 +199,14 @@ implementation { * * set direction of the bus */ - async command void Usci.setTransmitMode() { UCmxCTL1 |= UCTR; } - async command void Usci.setReceiveMode() { UCmxCTL1 &= ~UCTR; } + async command void Usci.setTransmitMode() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL1 |= UCTR; } + async command void Usci.setReceiveMode() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL1 &= ~UCTR; } async command bool Usci.getTransmitReceiveMode() { return (UCmxCTL1 & UCTR); } /* NACK, Stop condition, or Start condition, automatically cleared */ - async command void Usci.setTxNack() { UCmxCTL1 |= UCTXNACK; } - async command void Usci.setTxStop() { UCmxCTL1 |= UCTXSTP; } - async command void Usci.setTxStart() { UCmxCTL1 |= UCTXSTT; } + async command void Usci.setTxNack() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL1 |= UCTXNACK; } + async command void Usci.setTxStop() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL1 |= UCTXSTP; } + async command void Usci.setTxStart() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxCTL1 |= UCTXSTT; } async command bool Usci.getTxNack() { return (UCmxCTL1 & UCTXNACK); } async command bool Usci.getTxStop() { return (UCmxCTL1 & UCTXSTP); } @@ -190,8 +215,11 @@ implementation { async command bool Usci.isBusBusy() { return (UCmxSTAT & UCBBUSY); } async command bool Usci.isNackIntrPending() { return (UCmxIFG & UCNACKIFG); } - async command void Usci.clrNackIntr() { UCmxIFG &= ~UCNACKIFG; } + async command void Usci.clrNackIntr() { MSP430_USCI_ATOMIC_LOWLEVEL UCmxIFG &= ~UCNACKIFG; } + /* + * Caller should disable interrupts. + */ async command void Usci.configure (const msp430_usci_config_t* config, bool leave_in_reset) { if (! config) { From c3675ff32a5daffdf5c7e06f2258a58c809b4e1b Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Sun, 5 May 2013 02:24:00 -0700 Subject: [PATCH 342/411] msp430 usci: put atomic block around configuration. --- .../msp430/x5xxx/usci-v2/Msp430UsciSpiP.nc | 34 ++++++------ .../msp430/x5xxx/usci-v2/Msp430UsciUartP.nc | 42 ++++++++++----- .../x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc | 54 +++++++++++-------- .../x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc | 22 +++++--- 4 files changed, 93 insertions(+), 59 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciSpiP.nc b/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciSpiP.nc index ac557a6c05..e19dcca799 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciSpiP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciSpiP.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, Eric B. Decker + * Copyright (c) 2012-2013, Eric B. Decker * Copyright (c) 2011-2012 João Gonçalves * Copyright (c) 2009-2010 People Power Co. * All rights reserved. @@ -115,14 +115,14 @@ implementation { * IO function rather than module role. * * The USCI is left in software reset mode to avoid power drain. - * Errata UCS6 doesn't apply. + * Errata UCS6 doesn't apply as UCS6 only hits when in UART mode. */ void unconfigure_ () { while (UCBUSY & (call Usci.getStat())) { ;/* busy-wait */ } - call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); + /* going into reset, clears all interrupt enables */ call Usci.enterResetMode_(); call SIMO.makeOutput(); call SIMO.selectIOFunc(); @@ -149,19 +149,21 @@ implementation { * Do basic configuration, leaving USCI in reset mode. Configure * the SPI pins, enable the USCI, and leave interrupts off. */ - call Usci.configure(config, TRUE); - call SIMO.makeOutput(); - call SIMO.selectModuleFunc(); - call SOMI.makeInput(); - call SOMI.selectModuleFunc(); - call CLK.makeOutput(); - call CLK.selectModuleFunc(); - - /* - * The IE bits are cleared when the USCI is reset, so there is no need - * to clear the IE bits. - */ - call Usci.leaveResetMode_(); + atomic { + call Usci.configure(config, TRUE); + call SIMO.makeOutput(); + call SIMO.selectModuleFunc(); + call SOMI.makeInput(); + call SOMI.selectModuleFunc(); + call CLK.makeOutput(); + call CLK.selectModuleFunc(); + + /* + * The IE bits are cleared when the USCI is reset, so there is no need + * to clear the IE bits. + */ + call Usci.leaveResetMode_(); + } return SUCCESS; } diff --git a/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc b/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc index 6a0d02d8ba..e96ec53ef5 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -72,6 +73,7 @@ * UartByte.receive() method. * * @author Peter A. Bigot + * @author Eric B. Decker */ generic module Msp430UsciUartP () @safe() { @@ -136,13 +138,16 @@ implementation { * to their IO rather than module role. * * The USCI is left in software reset mode to avoid power drain per - * CC430 errata UCS6. + * errata UCS6. */ void unconfigure_ () { while (UCBUSY & (call Usci.getStat())) { - ;/* busy-wait */ + ;/* busy-wait, FIX-ME */ } - call Usci.setIe(call Usci.getIe() & ~ (UCTXIE | UCRXIE)); + /* + * formerly, first thing we turned off the interrupt enables + * but kicking reset turns off the interrupt enables. + */ call Usci.enterResetMode_(); call URXD.makeOutput(); call URXD.selectIOFunc(); @@ -166,17 +171,30 @@ implementation { /* * Do basic configuration, leaving USCI in reset mode. Configure - * the UART pins, enable the USCI, and turn on the interrupts. + * the UART pins, enable the USCI, and turn on the rx interrupt. */ - call Usci.configure(config, TRUE); - call URXD.makeInput(); - call URXD.selectModuleFunc(); - call UTXD.makeOutput(); - call UTXD.selectModuleFunc(); - call Usci.leaveResetMode_(); - call Usci.setIe((UCRXIE | call Usci.getIe()) & (~ UCTXIE)); - m_tx_buf = m_rx_buf = 0; + atomic { + call Usci.configure(config, TRUE); + call URXD.makeInput(); + call URXD.selectModuleFunc(); + call UTXD.makeOutput(); + call UTXD.selectModuleFunc(); + /* + * all configured. before leaving reset and turning on interrupts + * reset the state variables about where we are in the buffer. + */ + m_tx_buf = m_rx_buf = 0; + call Usci.leaveResetMode_(); + + /* + * The IE bits are cleared when the USCI is reset. + * + * UCmxIE only contains two bits, TXIE and RXIE. Force to just + * RXIE on. + */ + call Usci.setIe(UCRXIE); + } return SUCCESS; } diff --git a/tos/chips/msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc index b574e75f5b..95a865b4fe 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/i2c-mm/Msp430UsciI2CP.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2012-2013 Eric B. Decker * All rights reserved. * * Multi-Master driver. @@ -158,20 +158,24 @@ implementation { if (!config) return FAIL; /* does anyone actually check? */ - call Usci.configure(config, TRUE); /* leave in reset */ - call SCL.selectModuleFunc(); - call SDA.selectModuleFunc(); - call Usci.setI2Coa(config->i2coa); - call Usci.leaveResetMode_(); - m_action = SLAVE; + atomic { + call Usci.configure(config, TRUE); /* leave in reset */ + call SCL.selectModuleFunc(); + call SDA.selectModuleFunc(); + call Usci.setI2Coa(config->i2coa); - /* - * Turn on START interrupt. Used for when we are the slave end - * and someone else is trying to talk to us... - * - * But is anything wired in and ready to receive the incoming? - */ - call Usci.setIe(UCSTTIE); + /* + * Turn on START interrupt. Used for when we are the slave end + * and someone else is trying to talk to us... + * + * But is anything wired in and ready to receive the incoming? + * hopefully should be statically wired in. And it should be + * ready to deal with immediate interrupts. + */ + m_action = SLAVE; + call Usci.leaveResetMode_(); + call Usci.setIe(UCSTTIE); + } return SUCCESS; } @@ -189,13 +193,15 @@ implementation { * only gets called after something goes wrong. But our * default state is to be in Slave mode. */ - if (call Usci.getCtl0() & UCMST) { - call Usci.enterResetMode_(); - call Usci.andCtl0(~UCMST); - call Usci.leaveResetMode_(); + atomic { + if (call Usci.getCtl0() & UCMST) { + call Usci.enterResetMode_(); + call Usci.andCtl0(~UCMST); + call Usci.leaveResetMode_(); + } + call Usci.setIe(UCSTTIE); + m_action = SLAVE; } - call Usci.setIe(UCSTTIE); - m_action = SLAVE; return SUCCESS; } @@ -208,9 +214,11 @@ implementation { * configuration should be reasonable for lowish power. */ error_t unconfigure_() { - call Usci.enterResetMode_(); /* leave in reset */ - call SCL.selectIOFunc(); - call SDA.selectIOFunc(); + atomic { + call Usci.enterResetMode_(); /* leave in reset */ + call SCL.selectIOFunc(); + call SDA.selectIOFunc(); + } return SUCCESS; } diff --git a/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc index 838fe27c35..863497e618 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012 Eric B. Decker + * Copyright (c) 2012-2013 Eric B. Decker * All rights reserved. * * Single Master driver. @@ -164,10 +164,13 @@ implementation { if (!config) return FAIL; /* does anyone actually check? */ - call Usci.configure(config, TRUE); - call SCL.selectModuleFunc(); - call SDA.selectModuleFunc(); - call Usci.leaveResetMode_(); + atomic { + call Usci.configure(config, TRUE); + call SCL.selectModuleFunc(); + call SDA.selectModuleFunc(); + m_action = MASTER_IDLE; + call Usci.leaveResetMode_(); + } return SUCCESS; } @@ -180,9 +183,11 @@ implementation { * configuration should be reasonable for lowish power. */ error_t unconfigure_() { - call Usci.enterResetMode_(); - call SCL.selectIOFunc(); - call SDA.selectIOFunc(); + atomic { + call Usci.enterResetMode_(); + call SCL.selectIOFunc(); + call SDA.selectIOFunc(); + } return SUCCESS; } @@ -208,6 +213,7 @@ implementation { error_t start_check_busy() { uint16_t t0, t1; + /* reset will also clear any interrupt enables. be aware. */ call Usci.enterResetMode_(); // blow any cruft away call Usci.leaveResetMode_(); From d13cefbc6ea0c42f6b4b5750f0420727b7bbdd4a Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 8 May 2013 01:52:56 -0700 Subject: [PATCH 343/411] add UartByte.{send,receive}Avail definitions for UartByte interface --- tos/chips/atm128/Atm128UartP.nc | 28 ++++-- .../m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc | 10 ++ tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc | 24 ++++- tos/chips/m16c60/uart/M16c60UartP.nc | 61 +++++------- tos/chips/msp430/usart/Msp430UartP.nc | 29 ++++-- .../msp430/usart/SerialDemux/SerialDemuxP.nc | 51 +++++++++- .../msp430/x2xxx/usci-bf/Msp430UsciUartP.nc | 19 ++++ tos/chips/msp430/x2xxx/usci/Msp430UartP.nc | 13 +++ .../msp430/x5xxx/usci-v2/Msp430UsciUartP.nc | 32 +++++++ .../msp430/x5xxx/usci/Msp430UsciUartP.nc | 30 ++++++ tos/chips/pxa27x/uart/HalPXA27xSerialP.nc | 92 ++++++++----------- tos/interfaces/UartByte.nc | 38 ++++++-- tos/platforms/null/PlatformSerialC.nc | 8 ++ 13 files changed, 311 insertions(+), 124 deletions(-) diff --git a/tos/chips/atm128/Atm128UartP.nc b/tos/chips/atm128/Atm128UartP.nc index 44550a2b1a..f08eb07360 100644 --- a/tos/chips/atm128/Atm128UartP.nc +++ b/tos/chips/atm128/Atm128UartP.nc @@ -1,39 +1,43 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Alec Woo * @author Jonathan Hui - * @author Philip Levis (maintainer) - * @version $Revision: 1.7 $ $Date: 2008-06-23 20:25:15 $ + * @author Philip Levis + * @author Eric B. Decker * * Modification @ 11/27 (pal): Folded in Alec's reimplementation * from the -devel branch. Fixed bug in RX interrupts, where @@ -194,6 +198,10 @@ implementation{ return SUCCESS; } + async command bool UartByte.sendAvail() { + return (call HplUart.isTxEmpty()); + } + async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout){ uint16_t timeout_micro = m_byte_time * timeout + 1; @@ -213,6 +221,10 @@ implementation{ } + async command bool UartByte.receiveAvail() { + return (!call HplUart.isRxEmpty()); + } + async event void Counter.overflow() {} default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ){} diff --git a/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc b/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc index 460456725b..5ac1bb3c9a 100644 --- a/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc +++ b/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2010 CSIRO Australia * All rights reserved. * @@ -34,6 +35,7 @@ * High Speed USB to Serial implementation * * @author Kevin Klues + * @author Eric B. Decker */ #include @@ -85,10 +87,18 @@ implementation { return FAIL; } + async command bool UartByte.sendAvail() { + return FALSE; + } + async command error_t UartByte.receive( uint8_t* byte, uint8_t timeout ) { return FAIL; } + async command bool UartByte.receiveAvail() { + return FALSE; + } + // Take a look in HdlcTranslateC to understand the logic here // on determining whether this is the last byte or not bool lastByte(uint8_t byte) { diff --git a/tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc b/tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc index 4de569af76..2d258e6b05 100644 --- a/tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc +++ b/tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc @@ -1,26 +1,30 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Stanford University nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD - * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, @@ -34,6 +38,7 @@ * point, but does use IRQs for operation. * * @author Wanja Hofer + * @author Eric B. Decker */ #include "sam3uarthardware.h" @@ -258,6 +263,11 @@ implementation return SUCCESS; } + /* true if space for outgoing tx byte */ + async command bool UartByte.sendAvail() { + return (call HplSam3UartStatus.isTransmitterReady()); + } + async command error_t UartByte.receive(uint8_t *byte, uint8_t timeout) { // FIXME timeout currently ignored @@ -272,6 +282,10 @@ implementation return SUCCESS; } + async command bool UartByte.receiveAvail() { + return (call HplSam3UartStatus.isReceiverReady()); + } + default async event void UartStream.sendDone(uint8_t *buffer, uint16_t length, error_t error) {} default async event void UartStream.receivedByte(uint8_t byte) {} default async event void UartStream.receiveDone(uint8_t *buffer, uint16_t length, error_t error) {} diff --git a/tos/chips/m16c60/uart/M16c60UartP.nc b/tos/chips/m16c60/uart/M16c60UartP.nc index 3ccc3f131f..17f60e205b 100755 --- a/tos/chips/m16c60/uart/M16c60UartP.nc +++ b/tos/chips/m16c60/uart/M16c60UartP.nc @@ -1,69 +1,40 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2009 Communication Group and Eislab at - * Lulea University of Technology - * + * Lulea University of Technology * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - Neither the name of Communication Group at Lulea University of Technology - * nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD - * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* * Copyright (c) 2006 Arch Rock Corporation - * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE - * + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @@ -73,6 +44,7 @@ * @author Alec Woo * @author Jonathan Hui * @author Philip Levis + * @author Eric B. Decker */ #include @@ -238,6 +210,10 @@ implementation while ( !call HplUart.isTxEmpty() ); return SUCCESS; } + + async command bool UartByte.sendAvail() { + return (call HplUart.isTxEmpty()); + } async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout) { @@ -280,6 +256,11 @@ implementation } + async command bool UartByte.receiveAvail() { + return (!call HplUart.isRxEmpty()); + } + + async command error_t UartControl.setSpeed(uart_speed_t s) { if (mode != TOS_UART_OFF) diff --git a/tos/chips/msp430/usart/Msp430UartP.nc b/tos/chips/msp430/usart/Msp430UartP.nc index ec6c369018..e10aa3744a 100644 --- a/tos/chips/msp430/usart/Msp430UartP.nc +++ b/tos/chips/msp430/usart/Msp430UartP.nc @@ -1,39 +1,42 @@ /** + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui * @author Vlado Handziski * @author Eric B. Decker - * @version $Revision: 1.7 $ $Date: 2008-06-04 05:31:15 $ */ #include @@ -186,6 +189,12 @@ implementation { return SUCCESS; } + async command bool UartByte.sendAvail[ uint8_t id ]() { + if (call UsartResource.isOwner[id]() == FALSE) + return FALSE; + return (call Usart.isTxIntrPending()); + } + async command error_t UartByte.receive[ uint8_t id ]( uint8_t* byte, uint8_t timeout ) { uint16_t timeout_micro = m_byte_time * timeout + 1; @@ -204,6 +213,12 @@ implementation { } + async command bool UartByte.receiveAvail[ uint8_t id ]() { + if (call UsartResource.isOwner[id]() == FALSE) + return FALSE; + return (call Usart.isRxIntrPending()); + } + async event void Counter.overflow() {} default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } diff --git a/tos/chips/msp430/usart/SerialDemux/SerialDemuxP.nc b/tos/chips/msp430/usart/SerialDemux/SerialDemuxP.nc index 0a39d38d36..918e377ab8 100644 --- a/tos/chips/msp430/usart/SerialDemux/SerialDemuxP.nc +++ b/tos/chips/msp430/usart/SerialDemux/SerialDemuxP.nc @@ -1,6 +1,37 @@ /** - * Copyright @ 2008-2010 Eric B. Decker - * @author Eric B. Decker + * Copyright (c) 2013 Eric B. Decker + * Copyright (c) 2008-2010 Eric B. Decker + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Eric B. Decker */ #include "serial_demux.h" @@ -37,6 +68,14 @@ implementation { return call UartByte.send(data); } + async command error_t SerialClientUartByte.sendAvail[ uint8_t client_id ]() { + if (serial_defowner != client_id) { + sdm_warn(1, client_id); + return FALSE; + } + return call UartByte.sendAvail(); + } + async command error_t SerialClientUartByte.receive[ uint8_t client_id ]( uint8_t* byte, uint8_t timeout ) { if (serial_defowner != client_id) { sdm_warn(2, client_id); @@ -45,6 +84,14 @@ implementation { return call UartByte.receive(byte, timeout); } + async command error_t SerialClientUartByte.receiveAvail[ uint8_t client_id ]() { + if (serial_defowner != client_id) { + sdm_warn(2, client_id); + return FALSE; + } + return call UartByte.receiveAvail(); + } + async event void UartStream.receivedByte(uint8_t byte) { signal SerialClientUartStream.receivedByte[serial_defowner](byte); } diff --git a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartP.nc b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartP.nc index ef0a290be6..649361c566 100644 --- a/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartP.nc +++ b/tos/chips/msp430/x2xxx/usci-bf/Msp430UsciUartP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -70,6 +71,7 @@ * UartByte.receive() method. * * @author Peter A. Bigot + * @author Eric B. Decker */ #include "msp430usci.h" @@ -337,6 +339,15 @@ generic module Msp430UsciUartP (uint8_t TXIE_MASK, uint8_t RXIE_MASK, uint8_t TX } + async command bool UartByte.sendAvail[uint8_t client]() { + error_t rv; + + if ((rv = checkIsOwner(client))) + return rv; + return (TXIFG_MASK & call Usci.getIfg()); + } + + enum { /** The timeout for UartByte.receive is specified in "byte times", * which we can't know without reverse engineering the clock @@ -379,6 +390,14 @@ generic module Msp430UsciUartP (uint8_t TXIE_MASK, uint8_t RXIE_MASK, uint8_t TX return SUCCESS; } + async command bool UartByte.receiveAvail[uint8_t client]() { + error_t rv; + + if ((rv = checkIsOwner(client))) + return rv; + return (RXIFG_MASK & call Usci.getIfg()); + } + async event void RXInterrupts.interrupted(uint8_t iv) { uint8_t current_client = call ArbiterInfo.userId(); uint8_t stat; diff --git a/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc b/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc index 97854094a9..26e4f18d5b 100644 --- a/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc +++ b/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation @@ -193,6 +194,12 @@ implementation { return SUCCESS; } + async command bool UartByte.sendAvail[ uint8_t id ]() { + if (call UsciResource.isOwner[id]() == FALSE) + return FALSE; + return (call Usci.isTxIntrPending()); + } + async command error_t UartByte.receive[ uint8_t id ]( uint8_t* byte, uint8_t timeout ) { uint16_t timeout_micro = m_byte_time * timeout + 1; uint16_t start; @@ -208,6 +215,12 @@ implementation { return SUCCESS; } + async command bool UartByte.receiveAvail[ uint8_t id ]() { + if (call UsciResource.isOwner[id]() == FALSE) + return FALSE; + return (call Usci.isRxIntrPending()); + } + async event void Counter.overflow() {} default async command bool UsciResource.isOwner[ uint8_t id ]() { return FALSE; } diff --git a/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc b/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc index e96ec53ef5..f7f247f726 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc @@ -348,6 +348,22 @@ implementation { } + /* + * Check to see if space is available for another transmit byte to go out. + * + * If something goes wrong, just return FALSE (no space is available). + */ + async command bool UartByte.sendAvail[uint8_t client]() { + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ + return FALSE; + + /* isTxIntrPending returns TRUE if space is available */ + return (call Usci.isTxIntrPending()); + } + + enum { /** * The timeout for UartByte.receive is specified in "byte times", @@ -394,6 +410,22 @@ implementation { return SUCCESS; } + /* + * Check to see if another Rx byte is available. + * + * If something goes wrong, just return FALSE (no byte is available). + */ + async command bool UartByte.receiveAvail[uint8_t client]() { + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ + return FALSE; + + /* isRxIntrPending returns TRUE if another rx byte is available */ + return (call Usci.isRxIntrPending()); + } + + async event void Interrupts.interrupted (uint8_t iv) { uint8_t current_client = call ArbiterInfo.userId(); if (0xFF == current_client) { diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc index 609e991e2c..14c3ea034f 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartP.nc @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2009-2010 People Power Co. * All rights reserved. * @@ -72,6 +73,7 @@ * UartByte.receive() method. * * @author Peter A. Bigot + * @author Eric B. Decker */ generic module Msp430UsciUartP () @safe() { @@ -325,6 +327,20 @@ implementation { } + /* + * Check to see if space is available for another transmit byte to go out. + * + * If something goes wrong, just return FALSE (no space is available). + */ + async command bool UartByte.sendAvail[uint8_t client]() { + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ + return FALSE; + return (UCTXIFG & call Usci.getIfg()); + } + + enum { /** * The timeout for UartByte.receive is specified in "byte times", @@ -371,6 +387,20 @@ implementation { return SUCCESS; } + /* + * Check to see if another Rx byte is available. + * + * If something goes wrong, just return FALSE (no byte is available). + */ + async command bool UartByte.receiveAvail[uint8_t client]() { + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ + return FALSE; + return (UCRXIFG & call Usci.getIfg()); + } + + async event void Interrupts.interrupted (uint8_t iv) { uint8_t current_client = call ArbiterInfo.userId(); if (0xFF == current_client) { diff --git a/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc b/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc index 419afb0f9b..e31d55b17d 100644 --- a/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc +++ b/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc @@ -1,65 +1,40 @@ -/* $Id: HalPXA27xSerialP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* + * Copyright (c) 2013 Eric B. Decker * Copyright (c) 2005 Arched Rock Corporation - * All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * Neither the name of the Arched Rock Corporation nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED - * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - */ -/* - * Intel Open Source License + * Copyright (c) 2002 Intel Corporation + * Intel Open Source License + * All rights reserved. * - * Copyright (c) 2002 Intel Corporation - * All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * Neither the name of the Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ + /** * Implements the UartByte, UartStream and HalPXA27xSerialPacket interface * for a PXA27x UART. @@ -145,6 +120,10 @@ implementation return SUCCESS; } + async command bool UartByte.sendAvail() { + return ((call UART.getLSR() & LSR_TEMT) != 0); + } + async command error_t UartByte.receive( uint8_t *data, uint8_t timeout) { error_t error = FAIL; uint8_t t; @@ -158,6 +137,11 @@ implementation return error; } + /* true if incoming data available */ + async command bool UartByte.receiveAvail() { + return (call UART.getLSR() & LSR_DR); + } + async command error_t UartStream.send( uint8_t* buf, uint16_t len ) { error_t error; atomic gbUsingUartStreamSendIF = TRUE; diff --git a/tos/interfaces/UartByte.nc b/tos/interfaces/UartByte.nc index 4263917b97..2d8d0195fd 100644 --- a/tos/interfaces/UartByte.nc +++ b/tos/interfaces/UartByte.nc @@ -1,37 +1,41 @@ /* + * Copyright (c) 2013, Eric B. Decker * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui - * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:35 $ + * @author Eric B. Decker */ interface UartByte { @@ -45,9 +49,18 @@ interface UartByte { */ async command error_t send( uint8_t byte ); + /** + * sendAvail: is space available for another TX byte. + * + * @return TRUE the TX subsystem can take another byte. ie. + * UartByte.send() would not block if called. + * FALSE TX pipeline is full, UartByte.send() would block. + */ + async command bool sendAvail(); + /** * Receive a single uart byte. The call blocks until a byte is - * received. + * received or the timeout occurs. * * @param 'uint8_t* ONE byte' Where to place received byte. * @param timeout How long in byte times to wait. @@ -55,4 +68,13 @@ interface UartByte { */ async command error_t receive( uint8_t* byte, uint8_t timeout ); + /** + * sendAvail: is space available for another TX byte. + * + * @return TRUE the RX subsystem has another byte to receive. ie. + * UartByte.receive() would not block if called. + * FALSE RX pipeline is empty, UartByte.receive() would block + * waiting for a byte and/or the timeout. + */ + async command bool receiveAvail(); } diff --git a/tos/platforms/null/PlatformSerialC.nc b/tos/platforms/null/PlatformSerialC.nc index 05a79614ef..d75517a7c0 100644 --- a/tos/platforms/null/PlatformSerialC.nc +++ b/tos/platforms/null/PlatformSerialC.nc @@ -30,10 +30,18 @@ implementation { return SUCCESS; } + async command bool UartByte.sendAvail() { + return FALSE; + } + async command error_t UartByte.receive( uint8_t* byte, uint8_t timeout ) { return SUCCESS; } + async command bool UartByte.receiveAvail() { + return FALSE; + } + async command error_t UartStream.send( uint8_t* buf, uint16_t len ) { return SUCCESS; } From 58d18bc10f005c2a6c511e7c17754550414b7d25 Mon Sep 17 00:00:00 2001 From: "Eric B. Decker" Date: Wed, 8 May 2013 01:55:13 -0700 Subject: [PATCH 344/411] msp430/x5/usci-v2: cleanup Msp430UsciUartP - clean up comments - replace various register access with direct calls for the function Usci.setIe(UCRXIE) -> Usci.enableRxIntr - reorganize some of the code. Easier to read. --- .../msp430/x5xxx/usci-v2/Msp430UsciUartP.nc | 206 ++++++++++-------- 1 file changed, 114 insertions(+), 92 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc b/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc index f7f247f726..3005d5bc28 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/Msp430UsciUartP.nc @@ -51,7 +51,8 @@ * state managed by cooperation between the TX interrupt handler and * the send code, we leave the TX interrupt disabled and rely on the * UCTXIFG flag to indicate that single-byte transmission is - * permitted. + * permitted. It is better and simpler to let the h/w maintain the + * state. * * An exception to this is in support of the UartSerial.send() * function. The transmit interrupt is enabled when the outgoing @@ -65,7 +66,8 @@ * receive operation is active, received characters will be stored and * no notification provided until the full packet has been received. * If no buffered receive operation is active, the receivedByte() - * event will be signaled for each received character. + * event will be signaled for each received character. Per byte + * signal per each byte interrupt. * * As with the transmit interrupt, MCU execution of the receive * interrupt clears the UCRXIFG flag, making interrupt-driven @@ -105,10 +107,10 @@ implementation { * there is an active buffered I/O operation. */ bool isBusy () { - while (UCBUSY & (call Usci.getStat())) { + while (call Usci.isBusy()) { ;/* busy-wait */ } - return (0 != m_tx_buf) || (0 != m_rx_buf); + return (m_tx_buf || m_rx_buf); } /** @@ -119,12 +121,12 @@ implementation { /* Ensure the USCI is in UART mode and we're the owning client */ const uint8_t current_client = call ArbiterInfo.userId(); - if (0xFF == current_client) { + if (0xFF == current_client) return EOFF; - } - if (current_client != client) { + + if (current_client != client) return EBUSY; - } + return SUCCESS; } @@ -134,11 +136,10 @@ implementation { * Assumes the USCI is currently in UART mode. This will busy-wait * until any characters being actively transmitted or received are * out of their shift register. It disables the interrupts, puts - * the USCI into software resent, and returns the UART-related pins - * to their IO rather than module role. + * the USCI into reset, and returns the UART-related pins back to + * IO mode. * - * The USCI is left in software reset mode to avoid power drain per - * errata UCS6. + * The USCI is left in reset mode to avoid power drain per UCS6. */ void unconfigure_ () { while (UCBUSY & (call Usci.getStat())) { @@ -165,9 +166,8 @@ implementation { * enabled, and TX is disabled.. */ error_t configure_ (const msp430_usci_config_t* config) { - if (! config) { + if (! config) return FAIL; - } /* * Do basic configuration, leaving USCI in reset mode. Configure @@ -184,16 +184,11 @@ implementation { * all configured. before leaving reset and turning on interrupts * reset the state variables about where we are in the buffer. */ - m_tx_buf = m_rx_buf = 0; + m_tx_buf = m_rx_buf = 0; /* really? do we want to do this? */ call Usci.leaveResetMode_(); - /* - * The IE bits are cleared when the USCI is reset. - * - * UCmxIE only contains two bits, TXIE and RXIE. Force to just - * RXIE on. - */ - call Usci.setIe(UCRXIE); + /* any IE bits are cleared on reset, turn on RX interrupt */ + call Usci.enableRxIntr(); } return SUCCESS; } @@ -207,17 +202,19 @@ implementation { * ready to receive a new character. */ void nextStreamTransmit (uint8_t client) { + uint8_t ch; + bool last_char; + atomic { - uint8_t ch = m_tx_buf[m_tx_pos++]; - bool last_char = (m_tx_pos == m_tx_len); + ch = m_tx_buf[m_tx_pos++]; + last_char = (m_tx_pos >= m_tx_len); if (last_char) { /* - * Disable interrupts and release hold on UART before we - * transmit the character; this ensures that UCTXIFG remains - * set for subsequent byte transfers + * Disable TX interrupt, UCTXIFG will still be asserted + * once the next char going out finishes. */ - call Usci.setIe(call Usci.getIe() & (~ UCTXIE)); + call Usci.disableTxIntr(); } call Usci.setTxbuf(ch); @@ -226,8 +223,11 @@ implementation { * signaling completion. */ if (last_char) { - uint8_t* tx_buf = m_tx_buf; - uint16_t tx_len = m_tx_len; + uint8_t* tx_buf; + uint16_t tx_len; + + tx_buf = m_tx_buf; + tx_len = m_tx_len; m_tx_buf = 0; signal UartStream.sendDone[client](tx_buf, tx_len, SUCCESS); } @@ -235,30 +235,33 @@ implementation { } async command error_t UartStream.send[uint8_t client]( uint8_t* buf, uint16_t len ) { - error_t rv = checkIsOwner(client); - if (SUCCESS != rv) { + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero -> error */ return rv; - } - if (isBusy()) { + + if (isBusy()) return EBUSY; - } - if ((0 == len) || (0 == buf)) { + + if (!len || !buf) return FAIL; - } + m_tx_buf = buf; m_tx_len = len; m_tx_pos = 0; /* - * Enabling the interrupt causes the ISR to be invoked which - * transmits the first character. + * On start up UCTXIFG should be asserted, so enabling the TX interrupt + * should cause the ISR to get invoked. */ - call Usci.setIe((call Usci.getIe()) | UCTXIE); + call Usci.enableTxIntr(); return SUCCESS; } + default async event void UartStream.sendDone[uint8_t client] (uint8_t* buf, uint16_t len, error_t error ) { } + /* * The behavior of UartStream during reception is not well defined. * In the original Msp430UartP implementation, both transmit and @@ -267,7 +270,7 @@ implementation { * simplify control flow, but we do enable the receive interrupt for * backwards compatibility. * - * If receive(uint8_t*,uint16_t) is called, then subsequent received + * If Usci.receive(uint8_t*,uint16_t) is called, then subsequent received * characters will be stored into the buffer until completion, and * the receivedByte(uint8_t) event will not be signaled. If no * buffered receive is active, then receivedByte(uint8_t) will be @@ -281,39 +284,44 @@ implementation { * register. * * When the UART client releases control (unconfigures the UART), - * all interrupts are disabled. + * the UART is left in reset which also disables all interrupt enables. */ async command error_t UartStream.enableReceiveInterrupt[uint8_t client]() { - error_t rv = checkIsOwner(client); - if (SUCCESS == rv) { - call Usci.setIe((call Usci.getIe()) | UCRXIE); - } - return rv; + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ + return rv; + + call Usci.enableRxIntr(); + return rv; /* SUCCESS */ } async command error_t UartStream.disableReceiveInterrupt[uint8_t client]() { - error_t rv = checkIsOwner(client); - if (SUCCESS == rv) { - call Usci.setIe((call Usci.getIe()) & (~ UCRXIE)); - } - return rv; + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ + return rv; + + call Usci.disableRxIntr(); + return rv; /* SUCCESS */ } default async event void UartStream.receivedByte[uint8_t client]( uint8_t byte ) { } async command error_t UartStream.receive[uint8_t client]( uint8_t* buf, uint16_t len ) { - error_t rv = checkIsOwner(client); - if (SUCCESS != rv) { + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ return rv; - } - if ((0 == len) || (0 == buf)) { + + if (!len || !buf) return FAIL; - } + atomic { - if (m_rx_buf) { + if (m_rx_buf) return EBUSY; - } + m_rx_buf = buf; m_rx_len = len; m_rx_pos = 0; @@ -321,28 +329,35 @@ implementation { return SUCCESS; } + default async event void UartStream.receiveDone[uint8_t client] (uint8_t* buf, uint16_t len, error_t error) { } + async command error_t UartByte.send[uint8_t client]( uint8_t byte ) { - error_t rv = checkIsOwner(client); - if (SUCCESS != rv) { + error_t rv; + + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ return rv; - } - if (m_tx_buf) { + + if (m_tx_buf) return EBUSY; - } /* Wait for TXBUF to become available */ - while (! (UCTXIFG & call Usci.getIfg())) { + while (!(call Usci.isTxIntrPending())) { } - /* Transmit the character. Note that it hasn't actually gone out - * over the wire until UCBUSY on UCmxSTAT is cleared. */ + + /* + * Transmit the character. Note that it hasn't actually gone out + * over the wire until UCBUSY (see UCmxSTAT) is cleared. + */ call Usci.setTxbuf(byte); - // wait until it's actually sent. This kills the pipeline and sucks - // performancewise. - while(call Usci.getStat() & UCBUSY){ + /* + * wait until it's actually sent. This kills the pipeline and sucks + * performancewise. + */ + while(call Usci.isBusy()) { } return SUCCESS; } @@ -371,6 +386,10 @@ implementation { * subsystem. Assuming a 57600 baud system, one byte takes * roughly 170usec to transmit (ten bits per byte), or about five * byte times per (binary) millisecond. + * + * This is seriously wedged because it is platform dependent. + * The platform interface should specify a byte time in number + * of microseconds (of whatever flavor the platform is providing). */ ByteTimesPerMillisecond = 5, @@ -385,25 +404,24 @@ implementation { }; async command error_t UartByte.receive[uint8_t client]( uint8_t* byte, uint8_t timeout_bt ) { - uint32_t startTime_bms; - uint32_t timeout_bms = ByteTimeScaleFactor * ((ByteTimesPerMillisecond + timeout_bt - 1) / ByteTimesPerMillisecond); + error_t rv; + uint32_t startTime_bms, timeout_bms; - error_t rv = checkIsOwner(client); - if (SUCCESS != rv) { - return rv; - } - if (! byte) { + if ((rv = checkIsOwner(client))) /* non-zero, error bail out */ + return FALSE; + + if (! byte) return FAIL; - } - if (m_rx_buf) { + + if (m_rx_buf) return EBUSY; - } startTime_bms = call LocalTime_bms.get(); - while (! (UCRXIFG & (call Usci.getIfg()))) { - if((call LocalTime_bms.get() - startTime_bms) > timeout_bms) { + timeout_bms = ByteTimeScaleFactor * ((ByteTimesPerMillisecond + timeout_bt - 1) / ByteTimesPerMillisecond); + + while (! call Usci.isRxIntrPending()) { + if((call LocalTime_bms.get() - startTime_bms) > timeout_bms) return FAIL; - } } *byte = call Usci.getRxbuf(); @@ -427,10 +445,13 @@ implementation { async event void Interrupts.interrupted (uint8_t iv) { - uint8_t current_client = call ArbiterInfo.userId(); - if (0xFF == current_client) { + uint8_t current_client; + + current_client = call ArbiterInfo.userId(); + + if (0xFF == current_client) return; - } + if (USCI_UCRXIFG == iv) { uint8_t stat = call Usci.getStat(); uint8_t data = call Usci.getRxbuf(); @@ -443,9 +464,9 @@ implementation { * any left on notify somebody. */ stat = MSP430_USCI_ERR_UCxySTAT & (stat | (call Usci.getStat())); - if (stat) { + if (stat) signal Msp430UsciError.condition[current_client](stat); - } + if (m_rx_buf) { m_rx_buf[m_rx_pos++] = data; if (m_rx_len == m_rx_pos) { @@ -454,12 +475,13 @@ implementation { m_rx_buf = 0; signal UartStream.receiveDone[current_client](rx_buf, rx_len, SUCCESS); } - } else { + } else signal UartStream.receivedByte[current_client](data); - } - } else if (USCI_UCTXIFG == iv) { - nextStreamTransmit(current_client); + return; } + + if (USCI_UCTXIFG == iv) + nextStreamTransmit(current_client); } default async command const msp430_usci_config_t* From 23ed90560b0ffb4899b18ac6639943876c163193 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 24 May 2013 13:01:33 -0500 Subject: [PATCH 345/411] Added platform support for the MSP-ESP430F5529 Expermenter board. Most of the code was taken from the mm5s platform files. The main changes so far were pin definitions for LEDs and XTALs --- support/make/exp430.target | 9 + tos/platforms/exp430/.platform | 77 +++ tos/platforms/exp430/Ieee154MessageC.nc | 70 +++ tos/platforms/exp430/LocalIeeeEui64C.nc | 63 +++ tos/platforms/exp430/PlatformC.nc | 66 +++ tos/platforms/exp430/PlatformP.nc | 90 ++++ tos/platforms/exp430/hardware.h | 81 +++ .../exp430/hardware/adc/DemoSensorC.nc | 56 +++ .../exp430/hardware/adc/DemoSensorNowC.nc | 60 +++ .../exp430/hardware/adc/DemoSensorStreamC.nc | 56 +++ .../exp430/hardware/adc/PlatformAdcC.nc | 75 +++ tos/platforms/exp430/hardware/adc/VoltageC.nc | 55 ++ .../exp430/hardware/buttons/HplUserButtonC.nc | 55 ++ .../exp430/hardware/buttons/SwitchToggleC.nc | 94 ++++ .../exp430/hardware/buttons/UserButton.h | 46 ++ .../exp430/hardware/buttons/UserButtonC.nc | 65 +++ .../exp430/hardware/buttons/UserButtonP.nc | 78 +++ .../exp430/hardware/clock/PlatformClockC.nc | 49 ++ .../exp430/hardware/clock/PlatformClockP.nc | 475 ++++++++++++++++++ tos/platforms/exp430/hardware/leds/LedsC.nc | 47 ++ tos/platforms/exp430/hardware/leds/LedsP.nc | 51 ++ .../exp430/hardware/leds/PlatformLedsC.nc | 66 +++ .../exp430/hardware/leds/PlatformLedsP.nc | 148 ++++++ .../exp430/hardware/pins/PlatformPinsC.nc | 49 ++ .../exp430/hardware/pins/PlatformPinsP.nc | 67 +++ .../exp430/hardware/usci/PlatformSerialC.nc | 74 +++ .../exp430/hardware/usci/PlatformSerialP.nc | 58 +++ .../exp430/hardware/usci/PlatformSpiC.nc | 29 ++ .../exp430/hardware/usci/PlatformSpiP.nc | 17 + .../exp430/hardware/usci/PlatformUsciMapC.nc | 60 +++ tos/platforms/exp430/platform.h | 0 tos/platforms/exp430/platform_message.h | 59 +++ 32 files changed, 2345 insertions(+) create mode 100644 support/make/exp430.target create mode 100644 tos/platforms/exp430/.platform create mode 100644 tos/platforms/exp430/Ieee154MessageC.nc create mode 100644 tos/platforms/exp430/LocalIeeeEui64C.nc create mode 100644 tos/platforms/exp430/PlatformC.nc create mode 100644 tos/platforms/exp430/PlatformP.nc create mode 100644 tos/platforms/exp430/hardware.h create mode 100644 tos/platforms/exp430/hardware/adc/DemoSensorC.nc create mode 100644 tos/platforms/exp430/hardware/adc/DemoSensorNowC.nc create mode 100644 tos/platforms/exp430/hardware/adc/DemoSensorStreamC.nc create mode 100644 tos/platforms/exp430/hardware/adc/PlatformAdcC.nc create mode 100644 tos/platforms/exp430/hardware/adc/VoltageC.nc create mode 100644 tos/platforms/exp430/hardware/buttons/HplUserButtonC.nc create mode 100644 tos/platforms/exp430/hardware/buttons/SwitchToggleC.nc create mode 100644 tos/platforms/exp430/hardware/buttons/UserButton.h create mode 100644 tos/platforms/exp430/hardware/buttons/UserButtonC.nc create mode 100644 tos/platforms/exp430/hardware/buttons/UserButtonP.nc create mode 100644 tos/platforms/exp430/hardware/clock/PlatformClockC.nc create mode 100644 tos/platforms/exp430/hardware/clock/PlatformClockP.nc create mode 100644 tos/platforms/exp430/hardware/leds/LedsC.nc create mode 100644 tos/platforms/exp430/hardware/leds/LedsP.nc create mode 100644 tos/platforms/exp430/hardware/leds/PlatformLedsC.nc create mode 100644 tos/platforms/exp430/hardware/leds/PlatformLedsP.nc create mode 100644 tos/platforms/exp430/hardware/pins/PlatformPinsC.nc create mode 100644 tos/platforms/exp430/hardware/pins/PlatformPinsP.nc create mode 100644 tos/platforms/exp430/hardware/usci/PlatformSerialC.nc create mode 100644 tos/platforms/exp430/hardware/usci/PlatformSerialP.nc create mode 100644 tos/platforms/exp430/hardware/usci/PlatformSpiC.nc create mode 100644 tos/platforms/exp430/hardware/usci/PlatformSpiP.nc create mode 100644 tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc create mode 100644 tos/platforms/exp430/platform.h create mode 100644 tos/platforms/exp430/platform_message.h diff --git a/support/make/exp430.target b/support/make/exp430.target new file mode 100644 index 0000000000..9d2a272e7c --- /dev/null +++ b/support/make/exp430.target @@ -0,0 +1,9 @@ +#-*-Makefile-*- vim:syntax=make + +PLATFORM = exp430 +MSP_MCU = msp430f5529 + +$(call TOSMake_include_platform,msp) + +exp430: $(BUILD_DEPS) + @: diff --git a/tos/platforms/exp430/.platform b/tos/platforms/exp430/.platform new file mode 100644 index 0000000000..80c521409b --- /dev/null +++ b/tos/platforms/exp430/.platform @@ -0,0 +1,77 @@ +# Includes that should take precedence come first. Platforms come before +# chips because they may override files. These must be specified as +# @includes instead of -I's to @opts, otherwise the %T won't be processed +# by ncc. + +for (split(/\n/, <<'EOText' + + %P/hardware/adc + %P/hardware/buttons + %P/hardware/clock + %P/hardware/leds + %P/hardware/pins + #%P/hardware/usci + + %T/chips/msp430/x5xxx + %T/chips/msp430/x5xxx/lpm + %T/chips/msp430/x5xxx/timer + #%T/chips/msp430/x5xxx/usci + %T/chips/msp430 + %T/chips/msp430/pins + %T/chips/msp430/timer + + %T/chips/msp430/pmm + %T/chips/msp430/adc12 + + %T/chips/tmp112 + %T/chips/lis3dh + + %T/lib/timer + %T/lib/serial + %T/lib/power + %T/lib/printf + +EOText +)) { + s/\#.*$//; + s/^\s*//g; + s/\s*$//g; + push(@includes, $_) if $_; +} + +@opts = qw( + -gcc=msp430-gcc + -mmcu=msp430f5529 + -fnesc-target=msp430 + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask +); + + + +#push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; +#push @opts, "-mingw-gcc" if $cygwin; + +$ENV{'CIL_MACHINE'} = + "version_major=3 " . + "version_minor=2 " . + "version=msp430-3.2.3 " . + "short=2,2 " . + "int=2,2 " . + "long=4,2 " . + "long_long=8,2 " . + "pointer=2,2 " . + "enum=2,2 " . + "float=4,2 " . + "double=4,2 " . + "long_double=4,2 " . + "void=1,1 " . + "fun=1,2 " . + "wchar_size_size=2,2 " . + "alignof_string=1 " . + "max_alignment=1 " . + "char_wchar_signed=true,true " . + "const_string_literals=true " . + "big_endian=false " . + "underscore_name=false " . + "__builtin_va_list=true " . + "__thread_is_keyword=true"; diff --git a/tos/platforms/exp430/Ieee154MessageC.nc b/tos/platforms/exp430/Ieee154MessageC.nc new file mode 100644 index 0000000000..306c3ab3cf --- /dev/null +++ b/tos/platforms/exp430/Ieee154MessageC.nc @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2008 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Stephen Dawson-Haggerty + */ + +configuration Ieee154MessageC { + provides { + interface SplitControl; + + interface Resource as SendResource[uint8_t clientId]; + interface Ieee154Send; + interface Receive as Ieee154Receive; + + interface Ieee154Packet; + interface Packet; + + interface PacketAcknowledgements; + interface LinkPacketMetadata; + interface LowPowerListening; + interface PacketLink; + } + +} implementation { + components CC2420Ieee154MessageC as Msg; + + SplitControl = Msg; + SendResource = Msg; + Ieee154Send = Msg; + Ieee154Receive = Msg; + Ieee154Packet = Msg; + Packet = Msg; + + PacketAcknowledgements = Msg; + LinkPacketMetadata = Msg; + LowPowerListening = Msg; + PacketLink = Msg; +} diff --git a/tos/platforms/exp430/LocalIeeeEui64C.nc b/tos/platforms/exp430/LocalIeeeEui64C.nc new file mode 100644 index 0000000000..20e7d020d3 --- /dev/null +++ b/tos/platforms/exp430/LocalIeeeEui64C.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE.* All rights reserved. + */ + + /** + * Stephen Dawson-Haggerty + * Dummy Extended Address + */ + +#include "IeeeEui64.h" + +module LocalIeeeEui64C { + provides interface LocalIeeeEui64; +} implementation { + command ieee_eui64_t LocalIeeeEui64.getId() { + ieee_eui64_t id; + /* this is UCB's OUI */ + id.data[0] = 0x00; + id.data[1] = 0x12; + id.data[2] = 0x6d; + + /* UCB will let anyone use this OUI so long as these two octets + are 'LO' -- "local". All other octets are reserved. */ + /* SDH -- 9/10/2010 */ + id.data[3] = 'L'; + id.data[4] = 'O'; + + id.data[5] = 0; + id.data[6] = TOS_NODE_ID >> 8; + id.data[7] = TOS_NODE_ID & 0xff; + return id; + } +} diff --git a/tos/platforms/exp430/PlatformC.nc b/tos/platforms/exp430/PlatformC.nc new file mode 100644 index 0000000000..a001659cea --- /dev/null +++ b/tos/platforms/exp430/PlatformC.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author Joe Polastre + * @author Cory Sharp + * @author David Moss + */ + +#include "hardware.h" + +configuration PlatformC { + provides interface Init as PlatformInit; + uses interface Init as PeripheralInit; +} + +implementation { + + components PlatformP; + PlatformInit = PlatformP; + PeripheralInit = PlatformP.PeripheralInit; + + components PlatformPinsC; + PlatformP.PlatformPins -> PlatformPinsC; + + components PlatformLedsC; + PlatformP.PlatformLeds -> PlatformLedsC; + + /*components PlatformUsciMapC;*/ + // No code initialization required; just connect the pins + + components PlatformClockC; + PlatformP.PlatformClock -> PlatformClockC; +} diff --git a/tos/platforms/exp430/PlatformP.nc b/tos/platforms/exp430/PlatformP.nc new file mode 100644 index 0000000000..8b3387a316 --- /dev/null +++ b/tos/platforms/exp430/PlatformP.nc @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2010-2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Warning: many of these routines directly touch cpu registers + * it is assumed that this is initilization code and interrupts are + * off. + * + * @author Eric B. Decker + */ + +#ifdef notdef +#include "hardware.h" +#include "platform_version.h" + +const uint8_t _major = MAJOR; +const uint8_t _minor = MINOR; +const uint8_t _build = _BUILD; + + +#define BOOT_MAJIK 0x01021910 +noinit uint32_t boot_majik; +noinit uint16_t boot_count; + +#endif + + +module PlatformP { + provides interface Init; + uses { + interface Init as PlatformPins; + interface Init as PlatformLeds; + interface Init as Msp430Pmm; + interface Init as PlatformClock; + interface Init as MoteInit; + interface Init as PeripheralInit; + } +} + +implementation { + + void uwait(uint16_t u) { + uint16_t t0 = TA0R; + while((TA0R - t0) <= u); + } + + command error_t Init.init() { + WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer + + call PlatformPins.init(); // Initializes the GIO pins + call PlatformLeds.init(); // Initializes the Leds + call PlatformClock.init(); // Initializes UCS + call PeripheralInit.init(); + return SUCCESS; + } + + /***************** Defaults ***************/ + default command error_t PeripheralInit.init() { + return SUCCESS; + } +} diff --git a/tos/platforms/exp430/hardware.h b/tos/platforms/exp430/hardware.h new file mode 100644 index 0000000000..3c1d7688f0 --- /dev/null +++ b/tos/platforms/exp430/hardware.h @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter Bigot + */ + +#ifndef _H_hardware_h +#define _H_hardware_h + +#include "msp430hardware.h" + +// enum so components can override power saving, +// as per TEP 112. +enum { + TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, +}; + +/* Use the PlatformAdcC component, and enable 8 pins */ +//#define ADC12_USE_PLATFORM_ADC 1 +//#define ADC12_PIN_AUTO_CONFIGURE 1 +//#define ADC12_PINS_AVAILABLE 8 + +/* @TODO@ Disable probe for XT1 support until the anomaly observed in + * apps/bootstrap/LocalTime is resolved. */ +#ifndef PLATFORM_MSP430_HAS_XT1 +#define PLATFORM_MSP430_HAS_XT1 1 +#endif /* PLATFORM_MSP430_HAS_XT1 */ + +// LEDs +TOSH_ASSIGN_PIN(RED_LED, 1, 0); +TOSH_ASSIGN_PIN(GREEN_LED, 1, 1); +TOSH_ASSIGN_PIN(YELLOW_LED, 4, 6); + +// CC2420 RADIO #defines +TOSH_ASSIGN_PIN(RADIO_CSN, 3, 0); +TOSH_ASSIGN_PIN(RADIO_VREF, 2, 6); +TOSH_ASSIGN_PIN(RADIO_RESET, 2, 5); +TOSH_ASSIGN_PIN(RADIO_FIFOP, 2, 3); +TOSH_ASSIGN_PIN(RADIO_SFD, 2, 1); +TOSH_ASSIGN_PIN(RADIO_GIO0, 5, 0); +TOSH_ASSIGN_PIN(RADIO_FIFO, 2, 2); +TOSH_ASSIGN_PIN(RADIO_GIO1, 5, 1); +TOSH_ASSIGN_PIN(RADIO_CCA, 2, 4); + +TOSH_ASSIGN_PIN(CC_FIFOP, 2, 3); +TOSH_ASSIGN_PIN(CC_FIFO, 2, 2); +TOSH_ASSIGN_PIN(CC_SFD, 2, 1); +TOSH_ASSIGN_PIN(CC_VREN, 2, 6); +TOSH_ASSIGN_PIN(CC_RSTN, 2, 5); + +#endif // _H_hardware_h diff --git a/tos/platforms/exp430/hardware/adc/DemoSensorC.nc b/tos/platforms/exp430/hardware/adc/DemoSensorC.nc new file mode 100644 index 0000000000..31dfb7dab7 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/DemoSensorC.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular DemoSensorC on the telosb platform provides a + * voltage reading, using VoltageC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorC() { + provides interface Read; +} +implementation { + components new VoltageC() as DemoSensor; + Read = DemoSensor; +} diff --git a/tos/platforms/exp430/hardware/adc/DemoSensorNowC.nc b/tos/platforms/exp430/hardware/adc/DemoSensorNowC.nc new file mode 100644 index 0000000000..7f3b5d16a1 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/DemoSensorNowC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE.x + */ + +/** + * DemoSensorNowC is a generic sensor device that provides a 16-bit + * value that can be read from async context. The platform author + * chooses which sensor actually sits behind DemoSensorNowC, and + * though it's probably Voltage, Light, or Temperature, there are no + * guarantees. + * + * This particular DemoSensorNowC on the telosb platform provides a + * voltage reading, using VoltageC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorNowC() { + provides interface Resource; + provides interface ReadNow; +} +implementation { + components new Msp430InternalVoltageC() as DemoSensorNow; + + Resource = DemoSensorNow; + ReadNow = DemoSensorNow; +} diff --git a/tos/platforms/exp430/hardware/adc/DemoSensorStreamC.nc b/tos/platforms/exp430/hardware/adc/DemoSensorStreamC.nc new file mode 100644 index 0000000000..4f476b2412 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/DemoSensorStreamC.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * DemoSensorStreamC is a generic sensor device that provides a 16-bit + * value. The platform author chooses which sensor actually sits + * behind DemoSensorStreamC, and though it's probably Voltage, Light, or + * Temperature, there are no guarantees. + * + * This particular DemoSensorStreamC on the telosb platform provides a + * voltage reading, using VoltageStreamC. + * + * To convert from ADC counts to actual voltage, divide this reading + * by 4096 and multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration DemoSensorStreamC() { + provides interface ReadStream; +} +implementation { + components new VoltageC() as DemoSensor; + ReadStream = DemoSensor; +} diff --git a/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc b/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc new file mode 100644 index 0000000000..e5ea8d4e38 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +configuration PlatformAdcC { + provides { + interface HplMsp430GeneralIO as A0; + interface HplMsp430GeneralIO as A1; + interface HplMsp430GeneralIO as A2; + interface HplMsp430GeneralIO as A3; + interface HplMsp430GeneralIO as A4; + interface HplMsp430GeneralIO as A5; + interface HplMsp430GeneralIO as A6; + interface HplMsp430GeneralIO as A7; + + interface Msp430Timer as TimerA; + interface Msp430TimerControl as ControlA0; + interface Msp430TimerControl as ControlA1; + interface Msp430Compare as CompareA0; + interface Msp430Compare as CompareA1; + } +} + +implementation { + + components HplMsp430GeneralIOC; + A0 = HplMsp430GeneralIOC.Port20; + A1 = HplMsp430GeneralIOC.Port21; + A2 = HplMsp430GeneralIOC.Port22; + A3 = HplMsp430GeneralIOC.Port23; + A4 = HplMsp430GeneralIOC.Port24; + A5 = HplMsp430GeneralIOC.Port25; + A6 = HplMsp430GeneralIOC.Port26; + A7 = HplMsp430GeneralIOC.Port27; + + components Msp430TimerC; + TimerA = Msp430TimerC.Timer0_A; + ControlA0 = Msp430TimerC.Control0_A0; + ControlA1 = Msp430TimerC.Control0_A1; + CompareA0 = Msp430TimerC.Compare0_A0; + CompareA1 = Msp430TimerC.Compare0_A1; + +} diff --git a/tos/platforms/exp430/hardware/adc/VoltageC.nc b/tos/platforms/exp430/hardware/adc/VoltageC.nc new file mode 100644 index 0000000000..e9086fa754 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/VoltageC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * VoltageC is a common name for the Msp430InternalVoltageC voltage + * sensor available on the telosb platform. + * + * To convert from ADC counts to actual voltage, divide by 4096 and + * multiply by 3. + * + * @author Gilman Tolle + */ + +generic configuration VoltageC() { + provides { + interface Read; + interface ReadStream; + } +} +implementation { + components new Msp430InternalVoltageC(); + Read = Msp430InternalVoltageC.Read; + ReadStream = Msp430InternalVoltageC.ReadStream; +} diff --git a/tos/platforms/exp430/hardware/buttons/HplUserButtonC.nc b/tos/platforms/exp430/hardware/buttons/HplUserButtonC.nc new file mode 100644 index 0000000000..a9cce13afb --- /dev/null +++ b/tos/platforms/exp430/hardware/buttons/HplUserButtonC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the em430 platform + * + * @author Gilman Tolle + * @author Peter A. Bigot + */ + +configuration HplUserButtonC { + provides interface HplMsp430GeneralIO; + provides interface GpioInterrupt; +} +implementation { + components HplMsp430GeneralIOC as GeneralIOC; + components HplMsp430InterruptC as InterruptC; + + HplMsp430GeneralIO = GeneralIOC.Port17; + + components new Msp430InterruptC() as InterruptUserButtonC; + InterruptUserButtonC.HplInterrupt -> InterruptC.Port17; + GpioInterrupt = InterruptUserButtonC.Interrupt; +} diff --git a/tos/platforms/exp430/hardware/buttons/SwitchToggleC.nc b/tos/platforms/exp430/hardware/buttons/SwitchToggleC.nc new file mode 100644 index 0000000000..b7dfa1bce4 --- /dev/null +++ b/tos/platforms/exp430/hardware/buttons/SwitchToggleC.nc @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Not quite generic layer to translate a GIO into a toggle switch + * (Newer MSP430 chips require configuring pull-up resistor) + * + * @author Gilman Tolle + * @author Peter A. Bigot + */ + +#include + +generic module SwitchToggleC() { + provides interface Get; + provides interface Notify; + + uses interface HplMsp430GeneralIO; + uses interface GpioInterrupt; +} +implementation { + norace bool m_pinHigh; + + task void sendEvent(); + + command bool Get.get() { return call HplMsp430GeneralIO.get(); } + + command error_t Notify.enable() { + error_t rv; + + call HplMsp430GeneralIO.makeInput(); + call HplMsp430GeneralIO.setResistor(MSP430_PORT_RESISTOR_PULLUP); + if ( call HplMsp430GeneralIO.get() ) { + m_pinHigh = TRUE; + return call GpioInterrupt.enableFallingEdge(); + } else { + m_pinHigh = FALSE; + return call GpioInterrupt.enableRisingEdge(); + } + } + + command error_t Notify.disable() { + return call GpioInterrupt.disable(); + } + + async event void GpioInterrupt.fired() { + call GpioInterrupt.disable(); + + m_pinHigh = !m_pinHigh; + + post sendEvent(); + } + + task void sendEvent() { + bool pinHigh; + pinHigh = m_pinHigh; + signal Notify.notify( pinHigh ); + if ( pinHigh ) + call GpioInterrupt.enableFallingEdge(); + else + call GpioInterrupt.enableRisingEdge(); + } +} diff --git a/tos/platforms/exp430/hardware/buttons/UserButton.h b/tos/platforms/exp430/hardware/buttons/UserButton.h new file mode 100644 index 0000000000..bb0065fbdb --- /dev/null +++ b/tos/platforms/exp430/hardware/buttons/UserButton.h @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + */ + +#ifndef USERBUTTON_H +#define USERBUTTON_H + +typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t; + +#endif diff --git a/tos/platforms/exp430/hardware/buttons/UserButtonC.nc b/tos/platforms/exp430/hardware/buttons/UserButtonC.nc new file mode 100644 index 0000000000..f208b8638f --- /dev/null +++ b/tos/platforms/exp430/hardware/buttons/UserButtonC.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform. Get + * returns the current state of the button by reading the pin, + * regardless of whether enable() or disable() has been called on the + * Interface. Notify.enable() and Notify.disable() modify the + * underlying interrupt state of the pin, and have the effect of + * enabling or disabling notifications that the button has changed + * state. + * + * @author Gilman Tolle + */ + +#include + +configuration UserButtonC { + provides interface Get; + provides interface Notify; +} +implementation { + components HplUserButtonC; + components new SwitchToggleC(); + SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt; + SwitchToggleC.HplMsp430GeneralIO -> HplUserButtonC.HplMsp430GeneralIO; + + components UserButtonP; + Get = UserButtonP; + Notify = UserButtonP; + + UserButtonP.GetLower -> SwitchToggleC.Get; + UserButtonP.NotifyLower -> SwitchToggleC.Notify; +} diff --git a/tos/platforms/exp430/hardware/buttons/UserButtonP.nc b/tos/platforms/exp430/hardware/buttons/UserButtonP.nc new file mode 100644 index 0000000000..a25838de6f --- /dev/null +++ b/tos/platforms/exp430/hardware/buttons/UserButtonP.nc @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2007 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Implementation of the user button for the telosb platform + * + * @author Gilman Tolle + */ + +#include + +module UserButtonP { + provides interface Get; + provides interface Notify; + + uses interface Get as GetLower; + uses interface Notify as NotifyLower; +} +implementation { + + command button_state_t Get.get() { + if ( call GetLower.get() ) { + return BUTTON_PRESSED; + } else { + return BUTTON_RELEASED; + } + } + + command error_t Notify.enable() { + return call NotifyLower.enable(); + } + + command error_t Notify.disable() { + return call NotifyLower.disable(); + } + + event void NotifyLower.notify( bool val ) { + // telosb user button pin is high when released - invert state + if ( val ) { + signal Notify.notify( BUTTON_RELEASED ); + } else { + signal Notify.notify( BUTTON_PRESSED ); + } + } + + default event void Notify.notify( button_state_t val ) { } +} diff --git a/tos/platforms/exp430/hardware/clock/PlatformClockC.nc b/tos/platforms/exp430/hardware/clock/PlatformClockC.nc new file mode 100644 index 0000000000..3cff253d46 --- /dev/null +++ b/tos/platforms/exp430/hardware/clock/PlatformClockC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Top-level initialization of anything to do with the clock + * subsystem. + * + * @author Peter A. Bigot + */ + +configuration PlatformClockC { + provides interface Init; +} implementation { + components PlatformClockP; + Init = PlatformClockP; +} diff --git a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc new file mode 100644 index 0000000000..76c3507108 --- /dev/null +++ b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc @@ -0,0 +1,475 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * + * Initilization of the Clock system for the MM5 series motes. + * + * MM5s are based on msp430f5438 series cpus. + * + * The 5438 runs at 2.2V and can clock up to 18MHz. The 5438a + * can run at 1.8V (up to 8 MHz), and its core can be tweaked to + * enable faster clocking. We default to using 8MHz so allow + * low power execution on the 5438a. + * + * Previous ports of TinyOS to msp430 cpus, would set the cpu to + * clock at a power of 2 (MiHz). This was to facilitate syncronizing + * with the 32768 (32 KiHz) XT1 crystal. The Timer TEP talks about + * time in TinyOS being binary time. 1 mis (binary millisec = 1/1024) + * is provided by TMilli and 1 uis (binary microsec = 1/1024/1024) + * is provided by TMicro. + * + * It is very desireable to run the 5438a at 1.8V for power conservation + * (the specs are quite good). We also want to run it at 8MHz (decimal). + * Clocking at 8MiHz is not recommended (out of spec). It might work but + * it is unclear how flakey behaviour would manifest. Not recommended. + * + * So for power performance reasons we want to configure for 8MHz and 1.8V. + * (Yes the 5438 is different but we are using it to simulate set up for + * the 5438a which has the tasty power performance specs.) Note, we ignore + * the 5438. It is quite buggy and has a pin for pin replacement (the 5438a) + * that behaves mor better. So why bother supporting the 5438. + * + * The TMicro timer (TA1) is run off DCOCLK/8 which yields 1us (not 1uis) + * ticks. However, TMilli is the long term timer that runs when the system + * is sleeping. It is clocked off XT1 at 32KiHz. This is a power of 2 + * and TMilli is defined by TEP to be in terms of 1mis. + * + * However, this then means that TMicro is in terms of 1us and TMilli is + * in terms of 1mis (essentially different units). This is not a good situation. + * It is better to be consistent in terms of units for both TMilli and TMicro. + * The constrant is on TMicro because of the 8MHz restriction forcing 1us. + * This argues for TMilli also being in decimal time (1ms). This is what + * we are doing. Both TMilli and TMicro decimal units. + * + * We want the following set up to be true when we are complete: + * + * 8 MHz clock. The 5438a is spec'd for a max of 8MHz when + * running at 1.8V. So that is what we use. Acutally 7995392 Hz + * (.0576% error, it'll do). + * + * DCOCLK -> MCLK, SMCLK. Also drives high speed timer that + * provides TMicro. 1us (note, decimal microsecs). DCOCLK + * sync'd to FLL/XT1/32KiHz. + * + * MCLK /1: main cpu clock. Off DCOCLK. + * + * SMCLK /1: used for timers and peripherals. We want to run the + * SPI (SD, GPS, subsystems, etc.) quickly and this gives us the + * option. Off DCOCLK. May want to divide it down because it isn't + * needed to be full speed. Dividing it down should save some energy + * because we won't be clocking downstream parts as fast. + * + * ACLK: 32 KiHz. Primarily used for slow speed timer that + * provides TMilli. + * + * FLL: in use and clocked off the 32 KiHz XT1 input. + * + * Much of the system relies on the 32KiHz XT1 xtal working correctly. + * We bring that up first and let it stabilize. + * + * The code loops up to 625ms waiting for XT1 stability. If stability + * is not achieved, the XT1 functionality is disabled. This should + * cause a hcf_panic which results in writing a panic block in slow + * mode. Should never happen. Famous last words (right before the + * rocket blows up). + * + * Stabilization appears to take roughly 150ms. + * + * @author Eric B. Decker + */ + +#define noinit __attribute__ ((section(".noinit"))) + +uint16_t xt1_ctr; +noinit uint16_t xt1_stop; + +#define XT1_DELTAS 10 +uint16_t xt1_idx; +uint16_t xt1_deltas[XT1_DELTAS]; +uint16_t xt1_cap; +bool cap; +uint16_t xt1_read; +uint16_t last_xt1, last_dco; + +/* + * debugging code for tracing how the FLL homes in on the + * target frequency. We only nab those values which change. + */ + +#define STUFF_SIZE 128 + +noinit uint16_t ucsctl0[STUFF_SIZE]; + +noinit bool clear_stuff; +noinit uint16_t nxt; + +void set_stuff() { + if (clear_stuff) { + memset(ucsctl0, 0, sizeof(ucsctl0)); + clear_stuff = 0; + nxt = 0; + } + if (nxt >= STUFF_SIZE) + nxt = 0; + ucsctl0[nxt] = UCSCTL0; + nxt++; +} + + +module PlatformClockP { + provides interface Init; +} implementation { + + /* + * wait_for_32K() + * + * The 32KiHz Xtal provides a stable low power time base for everything + * else needing time in the system. It drives the FLL which provides + * syncronization for the DCO and ACLK which provides the time base + * for low power time (TMilli). + * + * The h/w has provisions for detecting XT1 oscillator faults but we + * don't know if that takes into account frequency stability. We have + * observed on the msp430f2618 that the XT1 oscillator takes a considerable + * amount of time to actual home to its base frequency. And that + * is where we want it before we do anything else. So we need to + * give it time to stabilize before using it. This should only be true + * coming out of reset. Anytime we reset P7.0 and P7.1 (XT1IN, XT1OUT) + * are reset to inputs and Pin Control and this shuts down the oscillator. + * So we need to bring it back up. + * + * On reset the 5438/5438a UCS is set to a configuration much like the + * following: (all values in hex). + * + * ucsctl0: 13e8 0020 101f 0000 0044 0000 c1cd 0403 0307 + * + * dco: 13, mod: 1e, rsel: 2, flld: 1 (f_dcoclk/2), flln: 1f + * selref: 0 (XT1CLK), fllrefdiv: 0 (f_fllrefclk/1) + * sela: 0 (xt1clk), sels: 4 (dcoclkdiv), selm: 4 (dcoclkdiv) + * diva = divs = divm = 0 (/1) + * xt2off, xt1off + * + * xt1 is off so clocking from REFO (32KiHz), XT1 pins set to Port/In. + * FLL is comparing 32KiHz * 32 = 1MiHz vs. dcoclk/2 => dcoclk 2MiHz + * SMCLK, MCLK => 1MiHz. + * + * We wait about a second for the 32KHz to stablize. + * + * PWR_UP_SEC is the number of times we need to wait for + * TimerA to cycle (16 bits) when clocked at the default + * msp430f5438 dco (about 2MHz). + */ + +#define PWR_UP_SEC 16 + + uint16_t maj_xt1() { + uint16_t a, b, c; + + a = TA0R; b = TA0R; c = TA0R; + if (a == b) return a; + if (a == c) return a; + if (b == c) return b; + while (1) + nop(); + return 0; + } + + + void wait_for_32K() __attribute__ ((noinline)) { + uint16_t left; + + /* + * TA0 -> XT1 32768 (just for fun and to compare against TA1 (1uis ticker) + * TA1 -> SMCLK/1 (should be 1uis ticker) + */ + TA0CTL = TACLR; // also zeros out control bits + TA1CTL = TACLR; + TA0CTL = TASSEL__ACLK | MC__CONTINOUS; // ACLK/1, continuous + TA1CTL = TASSEL__SMCLK | MC__CONTINOUS; // SMCLK/1, continuous + + /* + * wait for about a sec for the 32KHz to come up and + * stabilize. We are guessing that it is stable and + * on frequency after about a second but this needs + * to be verified. + * + * FIX ME. Need to verify stability of 32KHz. It definitely + * has a good looking waveform but what about its frequency + * stability. Needs to be measured. + * + * One thing to try is watching successive edges (ticks, TA0R, changing + * by one) and seeing how many TA1 (1 uis) ticks have gone by. When it is + * around 30-31 ticks then we are in the right neighborhood. + * + * We should see about PWR_UP_SEC (16) * 64Ki * 1/1024/1024 seconds which just + * happens to majikly equal 1 second. whew! + */ + + xt1_cap = 16; + left = PWR_UP_SEC; + while (1) { + if (TA1CTL & TAIFG) { + /* + * wrapped, clear IFG, and decrement major count + */ + TA1CTL &= ~TAIFG; + if (--left == 0) + break; + if (left <= xt1_cap) { + cap = TRUE; + xt1_cap = 0; /* disable future capture triggers */ + xt1_idx = 0; + last_xt1 = maj_xt1(); + last_dco = TA1R; + } + } + if (cap) { + xt1_read = maj_xt1(); + if (last_xt1 == xt1_read) + continue; + if (last_xt1 != xt1_read) { + xt1_deltas[xt1_idx++] = TA1R - last_dco; + last_xt1 = xt1_read; + last_dco = TA1R; + if (xt1_idx >= XT1_DELTAS) { + cap = FALSE; + nop(); + } + } + } + } + nop(); + } + + + command error_t Init.init () { + /* + * Enable XT1, lowest capacitance. + * + * XT1 pins (5.4 and 5.5) default to Pins/In. For the XT1 + * to function these have to be swithed to Module control. + * + * Surf code mumbles something about P5.0 and 1 must be clear + * in P5DIR. Shouldn't have any effect (the pins get kicked + * over to the Module for the Xtal and so the direction should + * be a don't care). Regardless we don't change the P5DIR + * from its power up value so will be cleared (IN). + * + * The surf code also talks about SMCLK being 4 per-mil faster + * if XCAP_3 is retained. Not sure what effect XCAP setting + * should have on SMCLK because XCAP effects the LF osc in LF mode, + * XTS=0 (which it will be). So a strange comment. + * + * Surf found XCAP=0 worked nice. We do the same thing but it should + * be checked. FIXME. + */ + + P5SEL |= (BIT4 | BIT5); + UCSCTL6 &= ~(XT1OFF | XCAP_3); + + /* + * From comments in Surf code. + * + * Spin waiting for a stable signal. This loop runs somewhere + * between 10K and 20K times; if it gets to 65536 without success, + * assume the crystal's absent or broken. At the power-up DCO + * (RSEL: 2, DCO: 19, MOD: 27) rate of ~2MHz and no crystal, the + * loop takes 625ms to complete. + * + * @note The UCS module will fall back to REFOCLK if configured + * for LF-mode XT1 and XT1 is not stable. It does not, however, + * revert to XT1 upon stabilization: the UCS module documentation + * implies that OFIFG must be cleared for this to occur. + * Consequently, we have to wait for stabilization even if we + * "know" a crystal is present. + */ + + /* + * xt1_ctr is initialized to 0 and counts up, if it hits zero + * again because it wrapped then we bail and panic. + */ + xt1_ctr = 0; + do { + xt1_ctr++; + UCSCTL7 &= ~(XT1LFOFFG | DCOFFG); + SFRIFG1 &= ~OFIFG; + nop(); + nop(); + if ((SFRIFG1 & OFIFG) == 0) + break; + } while (xt1_ctr); + + /* + * If the XT1 signal is still not valid, disable it. + * + * This is a major failure as we assume we have an XT1 xtal for + * timing stability. Flag it and try again? + * FIXME + */ + if (UCSCTL7 & XT1LFOFFG) { + P5SEL &= ~(BIT4 | BIT5); + UCSCTL6 |= XT1OFF; + while (1) + nop(); + return FAIL; + } + + /* + * XT1 up, lower the drive as suggested by TI. + * + * TI example code suggests clearing XT1DRIVE to reduce power. + * Current measurement does not indicate any value in doing so, + * at least not in LPM4, but it doesn't seem to hurt either. + * + * Note: we don't ever go into LPM4, LPM3 is required for the + * low speed timer to run (clocked from XT1). + */ + UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive + + /* + * We are no longer faulting, but we should still wait for the frequency to + * stabilize. Use wait_for_32k(). + */ + + wait_for_32K(); + + /* + * ACLK is to be set to XT1CLK, assumed to be 32KiHz (2^15Hz). + * This drives TA0 for TMilli. + * + * We run DCO into the integrator as /1 (FLLD_0). This also makes + * DCOCLKDIV = DCO. FLLN gets set to 243. 32768 * (243 + 1) + * = 7,995,392 Hz. The 32768 XT1 REFCLK is not divided down + * (/1, REFDIV). + */ + + /* Disable FLL control */ + __bis_SR_register(SR_SCG0); + + /* + * Use XT1CLK as the FLL input: if it isn't valid, the module + * will fall back to REFOCLK. Use FLLREFDIV value 1 (selected + * by bits 000) + */ + UCSCTL3 = SELREF__XT1CLK; + + /* + * The appropriate value for DCORSEL is obtained from the DCO + * Frequency table of the device datasheet. Find the DCORSEL + * value from that table where the maximum frequency with DCOx=31 + * is closest to your desired DCO frequency. (Where did this + * come from?) I've chosen next range up, don't want to run out + * of head room. + */ + + UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx + UCSCTL1 = DCORSEL_4; + UCSCTL2 = FLLD_0 + 243; + __bic_SR_register(SR_SCG0); // Enable the FLL control loop + + /* + * Worst-case settling time for the DCO when the DCO range bits have been + * changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx + * UG for optimization. + * + * n x 32 x 32 x 8 MHz / 32,768 Hz = 256000 = MCLK cycles for DCO to settle. + * but we don't know what n is (depends on how the FLL integrator works). + * + * Now this seems like a strange way to do this. This of course assumes + * that we are going to home on an arbritrary frequency so need to start + * from dco:0/mod:0. But even that doesn't make a whole boat load of sense. + * If going to an arbritary frequency, seems to make sense to start in the + * middle and either move up or down. + * + * Now that said, we have a pretty good idea of where we are going. To take + * into account temperature variance and dies we start below our target. But + * not that far. ie. we know we are going to ~8MHz and dco:x/mod:y is one + * such result. So starting ~25% below that should work just fine and greatly + * reduces potential start up time. This eliminates the need for the maximum + * delay waiting for the FLL to lock in. We can simply run, checking dco/mod + * looking for the maximum value we allow. Or just let it run to dco: 31, mod: 0. + * If it hits 31 we be done. + */ + + xt1_ctr = 0; + clear_stuff = 1; + do { + xt1_ctr++; + set_stuff(); + if (xt1_ctr == xt1_stop) + nop(); + } while (xt1_ctr); + + /* + * Loop until DCO fault flag is cleared. Ignore OFIFG, since it + * incorporates XT1 and XT2 fault detection. + * + * But XT2 is off so shouldn't be generating a fault and XT1 better + * be running we are assuming it drives the FLL. Yes if it fails + * then we auto switch over to the internal 32KiHz REFO. But this + * would be counter productive so looking for XT1 fault makes + * some sense. But it would be an error bail. Shouldn't happen. + */ + + do { + UCSCTL7 &= ~(XT1LFOFFG | DCOFFG); + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while (UCSCTL7 & DCOFFG); // Test DCO fault flag + + /* + * ACLK is XT1/1, 32KiHz. + * MCLK is set to DCOCLK/1. 8 MHz + * SMCLK is set to DCOCLK/1. 8 MHz. + * DCO drives TA1 for TMicro and is set to provide 1us ticks. + * ACLK drives TA0 for TMilli. + */ + UCSCTL4 = SELA__XT1CLK | SELS__DCOCLK | SELM__DCOCLK; + UCSCTL5 = DIVA__1 | DIVS__1 | DIVM__1; + + /* + * TA0 clocked off XT1, used for TMilli, 32KiHz. + */ + TA0CTL = TASSEL__ACLK | TACLR | MC__CONTINOUS | TAIE; + TA0R = 0; + + /* + * TA1 clocked off SMCLK off DCO, /8, 1us tick + */ + TA1CTL = TASSEL__SMCLK | ID__8 | TACLR | MC__CONTINOUS | TAIE; + TA1R = 0; + + return SUCCESS; + } +} diff --git a/tos/platforms/exp430/hardware/leds/LedsC.nc b/tos/platforms/exp430/hardware/leds/LedsC.nc new file mode 100644 index 0000000000..8f5da66904 --- /dev/null +++ b/tos/platforms/exp430/hardware/leds/LedsC.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * EM430 has only two LEDs. + * @author Peter A. Bigot + */ + +configuration LedsC { + provides interface Leds; +} +implementation { + components PlatformLedsC; + + Leds = PlatformLedsC; +} diff --git a/tos/platforms/exp430/hardware/leds/LedsP.nc b/tos/platforms/exp430/hardware/leds/LedsP.nc new file mode 100644 index 0000000000..f595c8e8c0 --- /dev/null +++ b/tos/platforms/exp430/hardware/leds/LedsP.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** +* 3 LED implementation + * + * @author Peter A. Bigot + * @author João Gonçalves + */ + +module LedsP @safe() { + provides interface Leds; + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} +implementation { +} diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc new file mode 100644 index 0000000000..e575f5edfc --- /dev/null +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter A. Bigot + */ + +#include "hardware.h" + +configuration PlatformLedsC { + provides { + interface Init; + interface Leds; + } +} +implementation { + components PlatformLedsP; + Leds = PlatformLedsP; + Init = PlatformLedsP; + + components HplMsp430GeneralIOC as GeneralIOC; + + /* RED LED (D1) at P1.0 */ + components new Msp430GpioC() as Led0Impl; + Led0Impl -> GeneralIOC.Port10; + PlatformLedsP.Led0 -> Led0Impl; + + /* Yellow LED (D2) at P8.1 */ + components new Msp430GpioC() as Led1Impl; + Led1Impl -> GeneralIOC.Port81; + PlatformLedsP.Led1 -> Led1Impl; + + /* Green LED (D1) at P8.2 */ + components new Msp430GpioC() as Led2Impl; + Led2Impl -> GeneralIOC.Port82; + PlatformLedsP.Led2 -> Led2Impl; +} diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc new file mode 100644 index 0000000000..b344001a7f --- /dev/null +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc @@ -0,0 +1,148 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This module provides the general Led interface. + * + * The advantage to doing it this way is we can now create a platforms + * that provide more or less than 3 LED's, and the LED's can be pull-up or + * pull-down enabled. + * + * @author David Moss + */ + +module PlatformLedsP { + provides { + interface Init; + interface Leds; + } + + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} + +implementation { + + /***************** Init Commands ****************/ + command error_t Init.init() { + atomic { + call Led0.makeOutput(); + call Led1.makeOutput(); + call Led2.makeOutput(); + call Led0.clr(); + call Led1.clr(); + call Led2.clr(); + } + return SUCCESS; + } + + /***************** Leds Commands ****************/ + async command void Leds.led0On() { + call Led0.set(); + } + + async command void Leds.led0Off() { + call Led0.clr(); + } + + async command void Leds.led0Toggle() { + call Led0.toggle(); + } + + async command void Leds.led1On() { + call Led1.set(); + } + + async command void Leds.led1Off() { + call Led1.clr(); + } + + async command void Leds.led1Toggle() { + call Led1.toggle(); + } + + async command void Leds.led2On() { + call Led2.set(); + } + + async command void Leds.led2Off() { + call Led2.clr(); + } + + async command void Leds.led2Toggle() { + call Led2.toggle(); + } + + async command uint8_t Leds.get() { + uint8_t rval; + atomic { + rval = 0; + if (!call Led0.get()) { + rval |= LEDS_LED0; + } + if (!call Led1.get()) { + rval |= LEDS_LED1; + } + if (!call Led2.get()) { + rval |= LEDS_LED2; + } + } + return rval; + } + + async command void Leds.set(uint8_t val) { + atomic { + if (val & LEDS_LED0) { + call Leds.led0On(); + } else { + call Leds.led0Off(); + } + if (val & LEDS_LED1) { + call Leds.led1On(); + } else { + call Leds.led1Off(); + } +#ifdef notdef + if (val & LEDS_LED2) { + call Leds.led2On(); + } else { + call Leds.led2Off(); + } +#endif + } + } +} diff --git a/tos/platforms/exp430/hardware/pins/PlatformPinsC.nc b/tos/platforms/exp430/hardware/pins/PlatformPinsC.nc new file mode 100644 index 0000000000..5a77232299 --- /dev/null +++ b/tos/platforms/exp430/hardware/pins/PlatformPinsC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author David Moss + * @author Peter A. Bigot + */ + +configuration PlatformPinsC { + provides { + interface Init; + } +} + +implementation { + components PlatformPinsP; + Init = PlatformPinsP; +} diff --git a/tos/platforms/exp430/hardware/pins/PlatformPinsP.nc b/tos/platforms/exp430/hardware/pins/PlatformPinsP.nc new file mode 100644 index 0000000000..aac55fcf1a --- /dev/null +++ b/tos/platforms/exp430/hardware/pins/PlatformPinsP.nc @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformPinsP { + provides interface Init; +} + +implementation { + int i; + + command error_t Init.init() { + atomic { + /* + * for now, just leave it all as the reset state. + * + * 5438, all input, with OUT/IN left alone. + */ + +#if 0 /* Disabled: these specific setting sare defaults, but others might not be */ + PMAPPWD = PMAPPW; // Get write-access to port mapping regs + P1MAP5 = PM_UCA0RXD; // Map UCA0RXD output to P1.5 + P1MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6 + PMAPPWD = 0; // Lock port mapping registers +#endif // + + } + return SUCCESS; + } +} diff --git a/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc b/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc new file mode 100644 index 0000000000..9c471defbd --- /dev/null +++ b/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/** + * De-facto standard component for platform independent access to a serial port. + * + * This implementation supports the TI EM430 and other MSP430XV2-based boards. + * + * Note that, since the standard practice is to use StdControl to + * start and stop this module (which requests and releases the + * corresponding USCI UART module), inclusion of this into an + * application is incompatible with sharing the UART among multiple + * clients in the TEP108 sense of resource sharing. + * + * @author David Moss + * @author Peter A. Bigot + */ + +configuration PlatformSerialC { + provides { + interface StdControl; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSerialP; + StdControl = PlatformSerialP; + + components new Msp430UsciUartA0C() as UartC; + + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + PlatformSerialP.Resource -> UartC.Resource; + +} diff --git a/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc b/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc new file mode 100644 index 0000000000..50fcd72fe4 --- /dev/null +++ b/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformSerialP { + provides interface StdControl; + uses interface Resource; +} + +implementation { + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop(){ + return call Resource.release(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/exp430/hardware/usci/PlatformSpiC.nc b/tos/platforms/exp430/hardware/usci/PlatformSpiC.nc new file mode 100644 index 0000000000..231bbab782 --- /dev/null +++ b/tos/platforms/exp430/hardware/usci/PlatformSpiC.nc @@ -0,0 +1,29 @@ + +configuration PlatformSpiC { + provides { + interface SpiByte; + interface Resource; + interface SpiPacket; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSpiP; + +// components MainC; +// MainC.SoftwareInit -> PlatformSpiP; + + components new Msp430UsciSpiB0C() as SpiC; + + SpiByte = SpiC; + Resource = SpiC; + SpiPacket = SpiC; + + Msp430UsciError = SpiC; + PlatformSpiP.Resource -> SpiC.Resource; + + components PlatformLedsC; + PlatformSpiP.Leds -> PlatformLedsC; +} diff --git a/tos/platforms/exp430/hardware/usci/PlatformSpiP.nc b/tos/platforms/exp430/hardware/usci/PlatformSpiP.nc new file mode 100644 index 0000000000..aa2bc846f3 --- /dev/null +++ b/tos/platforms/exp430/hardware/usci/PlatformSpiP.nc @@ -0,0 +1,17 @@ + +module PlatformSpiP { + provides interface Init; + uses { + interface Resource; + interface Leds; + } +} + +implementation { + + command error_t Init.init() { + return call Resource.immediateRequest(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc new file mode 100644 index 0000000000..53ea18488e --- /dev/null +++ b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Connect the appropriate pins for USCI support on a CC430. + * + * @author Peter A. Bigot + */ + +configuration PlatformUsciMapC { +} implementation { + components HplMsp430GeneralIOC as GIO; + + components Msp430UsciUartA0P as UartA0C; + UartA0C.URXD -> GIO.UCA0RXD; + UartA0C.UTXD -> GIO.UCA0TXD; + + components Msp430UsciSpiB0P as SpiB0C; + SpiB0C.SIMO -> GIO.UCB0SIMO; + SpiB0C.SOMI -> GIO.UCB0SOMI; + SpiB0C.CLK -> GIO.UCB0CLK; + + components Msp430UsciSpiA3P as SpiA3C; + SpiA3C.SIMO -> GIO.UCA3SIMO; + SpiA3C.SOMI -> GIO.UCA3SOMI; + SpiA3C.CLK -> GIO.UCA3CLK; +} diff --git a/tos/platforms/exp430/platform.h b/tos/platforms/exp430/platform.h new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tos/platforms/exp430/platform_message.h b/tos/platforms/exp430/platform_message.h new file mode 100644 index 0000000000..e3d24e69ee --- /dev/null +++ b/tos/platforms/exp430/platform_message.h @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005 The Regents of the University of California. + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Defining the platform-independently named packet structures to be the + * chip-specific CC1000 packet structures. + * + * @author Philip Levis + */ + +#ifndef PLATFORM_MESSAGE_H +#define PLATFORM_MESSAGE_H + +#include +#include + +typedef union message_header { + serial_header_t serial; +} message_header_t; + +typedef union TOSRadioFooter { +} message_footer_t; + +typedef union TOSRadioMetadata { +} message_metadata_t; + +#endif From f2427d9b624c0d21db78c45bb0eca8eeb5b918ea Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 24 May 2013 16:53:18 -0500 Subject: [PATCH 346/411] Reverted some changes merged from tp-freeforall/prod(tp-master) This is to keep this code compatible with the mainline tinyos --- tos/interfaces/UartByte.nc | 38 +-- tos/lib/mac/tkn154/SimpleTransferArbiterP.nc | 25 +- tos/lib/serial/Serial.h | 1 - tos/lib/serial/SerialActiveMessageP.nc | 2 - tos/system/AMQueueImplP.nc | 66 ++--- tos/system/ArbiterP.nc | 263 +++++-------------- tos/system/FcfsArbiterC.nc | 45 +++- tos/system/FcfsPriorityArbiterC.nc | 2 +- tos/system/SimpleArbiterP.nc | 6 +- tos/types/I2C.h | 24 -- tos/types/Ieee154.h | 64 +---- tos/types/TinyError.h | 25 +- 12 files changed, 166 insertions(+), 395 deletions(-) diff --git a/tos/interfaces/UartByte.nc b/tos/interfaces/UartByte.nc index 2d8d0195fd..4263917b97 100644 --- a/tos/interfaces/UartByte.nc +++ b/tos/interfaces/UartByte.nc @@ -1,41 +1,37 @@ /* - * Copyright (c) 2013, Eric B. Decker * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - * - Neither the name of the copyright holders nor the names of + * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. + * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui - * @author Eric B. Decker + * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:35 $ */ interface UartByte { @@ -49,18 +45,9 @@ interface UartByte { */ async command error_t send( uint8_t byte ); - /** - * sendAvail: is space available for another TX byte. - * - * @return TRUE the TX subsystem can take another byte. ie. - * UartByte.send() would not block if called. - * FALSE TX pipeline is full, UartByte.send() would block. - */ - async command bool sendAvail(); - /** * Receive a single uart byte. The call blocks until a byte is - * received or the timeout occurs. + * received. * * @param 'uint8_t* ONE byte' Where to place received byte. * @param timeout How long in byte times to wait. @@ -68,13 +55,4 @@ interface UartByte { */ async command error_t receive( uint8_t* byte, uint8_t timeout ); - /** - * sendAvail: is space available for another TX byte. - * - * @return TRUE the RX subsystem has another byte to receive. ie. - * UartByte.receive() would not block if called. - * FALSE RX pipeline is empty, UartByte.receive() would block - * waiting for a byte and/or the timeout. - */ - async command bool receiveAvail(); } diff --git a/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc b/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc index bdfcd5f1a3..32d58b7615 100644 --- a/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc +++ b/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc @@ -144,23 +144,16 @@ implementation { } /** - * Returns the current user of the Resource. - * - * formerly check state, but now relies on current - * owner, ie. resId. Just return resId. If the - * default owner owns the resource then the resId will - * be one higher than the max client id. - * - * This was originally part of ResourceDefaultOwner - * (SerialDemux) changes. It is needed if a DefaultOwner - * actually needs to do something with the hardware. Ie. - * interrupts need to be steared to the ResourceDefaultOwner - * demultiplexer. In which case the client id (resId) is - * used to do the signal and needs to be a real number and not - * 0xff. - */ + Returns the current user of the Resource. + If there is no current user, the return value + will be 0xFF + */ async command uint8_t ArbiterInfo.userId() { - atomic return resId; + atomic { + if(state != RES_BUSY) + return NO_RES; + return resId; + } } /** diff --git a/tos/lib/serial/Serial.h b/tos/lib/serial/Serial.h index b3ada3db18..4821dbbba0 100644 --- a/tos/lib/serial/Serial.h +++ b/tos/lib/serial/Serial.h @@ -92,7 +92,6 @@ enum { // message_t type dispatch enum { - AM_SERIAL_PACKET = 0, TOS_SERIAL_ACTIVE_MESSAGE_ID = 0, TOS_SERIAL_CC1000_ID = 1, TOS_SERIAL_802_15_4_ID = 2, diff --git a/tos/lib/serial/SerialActiveMessageP.nc b/tos/lib/serial/SerialActiveMessageP.nc index 0cced49c2a..0f9b6bef0f 100644 --- a/tos/lib/serial/SerialActiveMessageP.nc +++ b/tos/lib/serial/SerialActiveMessageP.nc @@ -116,8 +116,6 @@ implementation { command void Packet.clear(message_t* msg) { memset(getHeader(msg), 0, sizeof(serial_header_t)); - /* no footer */ - memset(getMetadata(msg), 0, sizeof(serial_metadata_t)); return; } diff --git a/tos/system/AMQueueImplP.nc b/tos/system/AMQueueImplP.nc index c40a179fe0..055f1de6ba 100644 --- a/tos/system/AMQueueImplP.nc +++ b/tos/system/AMQueueImplP.nc @@ -1,7 +1,7 @@ +// $Id: AMQueueImplP.nc,v 1.11 2010-06-29 22:07:56 scipio Exp $ /* - * Copyright (c) 2011 Eric B. Decker - * Copyright (c) 2005 Stanford University. All rights reserved. - * +* Copyright (c) 2005 Stanford University. All rights reserved. +* * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -37,16 +37,13 @@ * clients. * * @author Philip Levis - * @author Eric B. Decker (cire831@gmail.com) + * @date Jan 16 2006 */ #include "AM.h" generic module AMQueueImplP(int numClients) @safe() { - provides { - interface Send[uint8_t client]; - interface SendBusy[uint8_t client]; - } + provides interface Send[uint8_t client]; uses{ interface AMSend[am_id_t id]; interface AMPacket; @@ -58,37 +55,25 @@ implementation { typedef struct { message_t* ONE_NOK msg; } queue_entry_t; - + uint8_t current = numClients; // mark as empty queue_entry_t queue[numClients]; uint8_t cancelMask[numClients/8 + 1]; - command bool SendBusy.busy[uint8_t clientId]() { - if (clientId >= numClients) return TRUE; - if (queue[clientId].msg) return TRUE; - return FALSE; - } - void tryToSend(); - + void nextPacket() { uint8_t i; - - /* current = (current + 1) % numClients; - * which uses mult math and is expensive. Replaced with the following - * which is much more efficient. - */ - current++; - if (current >= numClients) - current = 0; - for(i = 0; i < numClients; i++) { - if((queue[current].msg == NULL) || - (cancelMask[current/8] & (1 << current%8))) { - current++; - if (current >= numClients) - current = 0; - } else - break; + current = (current + 1) % numClients; + for(i = 0; i < numClients; i++) { + if((queue[current].msg == NULL) || + (cancelMask[current/8] & (1 << current%8))) + { + current = (current + 1) % numClients; + } + else { + break; + } } if(i >= numClients) current = numClients; } @@ -111,23 +96,24 @@ implementation { return EBUSY; } dbg("AMQueue", "AMQueue: request to send from %hhu (%p): passed checks\n", clientId, msg); - + queue[clientId].msg = msg; call Packet.setPayloadLength(msg, len); - + if (current >= numClients) { // queue empty error_t err; am_id_t amId = call AMPacket.type(msg); am_addr_t dest = call AMPacket.destination(msg); - + dbg("AMQueue", "%s: request to send from %hhu (%p): queue empty\n", __FUNCTION__, clientId, msg); current = clientId; - + err = call AMSend.send[amId](dest, msg, len); if (err != SUCCESS) { dbg("AMQueue", "%s: underlying send failed.\n", __FUNCTION__); current = numClients; queue[clientId].msg = NULL; + } return err; } @@ -140,7 +126,6 @@ implementation { task void CancelTask() { uint8_t i,j,mask,last; message_t *msg; - for(i = 0; i < numClients/8 + 1; i++) { if(cancelMask[i]) { for(mask = 1, j = 0; j < 8; j++) { @@ -156,7 +141,7 @@ implementation { } } } - + command error_t Send.cancel[uint8_t clientId](message_t* msg) { if (clientId >= numClients || // Not a valid client queue[clientId].msg == NULL || // No packet pending @@ -200,7 +185,7 @@ implementation { } } } - + event void AMSend.sendDone[am_id_t id](message_t* msg, error_t err) { // Bug fix from John Regehr: if the underlying radio mixes things // up, we don't want to read memory incorrectly. This can occur @@ -218,7 +203,7 @@ implementation { __FUNCTION__, msg, queue[current].msg); } } - + command uint8_t Send.maxPayloadLength[uint8_t id]() { return call AMSend.maxPayloadLength[0](); } @@ -230,7 +215,6 @@ implementation { default event void Send.sendDone[uint8_t id](message_t* msg, error_t err) { // Do nothing } - default command error_t AMSend.send[uint8_t id](am_addr_t am_id, message_t* msg, uint8_t len) { return FAIL; } diff --git a/tos/system/ArbiterP.nc b/tos/system/ArbiterP.nc index d817763635..7d6f734787 100644 --- a/tos/system/ArbiterP.nc +++ b/tos/system/ArbiterP.nc @@ -1,5 +1,4 @@ /* - * Copyright (c) 2011, Eric B. Decker * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * @@ -35,7 +34,6 @@ * This component provides the Resource, ResourceRequested, ArbiterInfo, * and ResourceDefaultOwner interfaces and uses the ResourceConfigure interface as * described in TEP 108. It provides arbitration to a shared resource. - * * A Queue is used to keep track of which users have put * in requests for the resource. Upon the release of the resource by one * of these users, the queue is checked and the next user @@ -49,50 +47,8 @@ * * @author Kevin Klues (klues@tkn.tu-berlin.de) * @author Philip Levis - * @author Eric B. Decker (cire831@gmail.com) - * - * WARNING: This Arbiter differs from the main TinyOS trunk Arbiter!..... It - * has the following features/bug fixes: - * - * ResourceRequested can be used to allow a holder of a resource to release - * and request upon an incoming request from another client. - * - * The previous arbiter (if no other resources queued up) would always immediately - * grant to the original holder (ie. the new requester would be starved). And other - * strange, out of order behaviour. - * - * The following is the sequence we are talking about: - * - * Client 1: Client 2: - * Holding resource - * new request comes up - * Sees ResourceRequested - * releases (this should let the new resource (or any other queued client) get the resource) - * requests - * client 2 gains control. - * - * There does need to be a mechanism to let a holder of the resource to check to see - * if (and possibly how many) other clients are waiting for the resource. There are - * cases where using the event (ResourceRequested) doesn't work because the clients - * have already posted their requests prior to the eventual resource holder gaining - * control. IT IS VERY EASY TO HANG THE ARBITER BECAUSE OF MISSED EVENTS. Use - * Request/Release at your own risk. - * - * - * Protection has been put in to insure that a given client can not end up with - * multiple requests queued up. This would give the client an unfair advantage - * and also would occur non-uniformly (depends on the sequence of execution). This - * problem could occur because while the Queueing mechanism does protect against multiple - * instances of the id in the queue, there is also the reqResId cell which is effectively - * the head of the queue. This must also be properly handled to prevent a client from - * getting into the queue multiple times. - * - * - * Provisions have been made to support DefaultOwners actually doing something with the - * hardware vs. just handling power. PREGRANT helps with this. Also the resId being - * default_owner_id indicates that h/w events should be steered to the DefaultOwner. */ - + generic module ArbiterP(uint8_t default_owner_id) @safe() { provides { interface Resource[uint8_t id]; @@ -101,7 +57,6 @@ generic module ArbiterP(uint8_t default_owner_id) @safe() { interface ArbiterInfo; } uses { - interface ResourceDefaultOwnerInfo; interface ResourceConfigure[uint8_t id]; interface ResourceQueue as Queue; interface Leds; @@ -109,91 +64,27 @@ generic module ArbiterP(uint8_t default_owner_id) @safe() { } implementation { - /* - * States: - * - * DEF_OWNED: (formely CONTROLLED), indicates that the DefaultOwner of the - * resource has control. Typically this will power down the resource, but can - * also be used to hook a default driver that runs when ever othe clients are - * not used the resource. - * - * PREGRANT denotes the resource state where a client has requested but the default - * owner still owns, vs GRANTING where the default owner has released the resource - * and will no longer receive resource event (such as data delivery). GRANTING vs. - * PREGRANT means the client will definitely be owning the resource soon. This was - * needed because of the DefaultOwner changes, where a DefaultOwner can really own - * the hardware rather than just handling power state. - * - * GRANTING: the resource ownership is in the process of switching to a new owner. - * - * IMM_GRANTING: same as GRANTING but indicates an immediate grant (from an immediate - * request). - * - * BUSY: the resource is owned by the client indicated in resId. - * - * - * state RES_DEF_OWNED means the default owner owns the resource rather than any - * client. Its value needs to be 0 so that when uninitilized memory (bss) is - * hit, state gets set to RES_DEF_OWNED. - */ - - typedef enum {RES_DEF_OWNED = 0, RES_PREGRANT, RES_GRANTING, - RES_IMM_GRANTING, RES_BUSY} - arb_state_t; - + enum {RES_CONTROLLED, RES_GRANTING, RES_IMM_GRANTING, RES_BUSY}; enum {default_owner_id = default_owner_id}; enum {NO_RES = 0xFF}; - uint8_t state; /* init'd to 0, RES_DEF_OWNED */ + uint8_t state = RES_CONTROLLED; norace uint8_t resId = default_owner_id; - norace uint8_t reqResId = NO_RES; + norace uint8_t reqResId; task void grantedTask(); async command error_t Resource.request[uint8_t id]() { - error_t rval; - - /* - * make sure that we respect queue order, determined by the queuing discipline. - */ - atomic { - /* - * Queue.enqueue should check for the id already being in the list. - * I don't think we want to have multiple instances of any id in the list - * of folks waiting for the arbiter (multiple requests for the same client?) - * - * We also need to check to see if this client is already waiting for the - * resource (ie. it is the next one to get it, reqResId). - */ - if (reqResId == id) /* already waiting for the resource. */ - return EBUSY; - if ((rval = call Queue.enqueue(id))) - return rval; /* failed */ - } - signal ResourceRequested.requested[resId](); - - /* - * ResourceRequested.requested yanks on the current owner so that it may if desired - * take into account that others want the resource. As a consequence, requested may - * change state of the arbiter. - */ - atomic { - /* - * if the resource owned by a client or will be then the current - * request just gets queued. In other words, we are done at this point. - * * This is also the most likely case, so bailing early is good. */ - if (state != RES_DEF_OWNED) - return SUCCESS; - - /* - * Default owner has the resource, this client will be next once - * the def_owner releases. Change state to PREGRANT, set reqResId, - * and tell the def_owner that the resource has been requested. - */ - state = RES_PREGRANT; - reqResId = call Queue.dequeue(); + if(state == RES_CONTROLLED) { + state = RES_GRANTING; + reqResId = id; + } + else if (reqResId == id) { + return SUCCESS; + } + else return call Queue.enqueue(id); } signal ResourceDefaultOwner.requested(); return SUCCESS; @@ -202,55 +93,37 @@ implementation { async command error_t Resource.immediateRequest[uint8_t id]() { signal ResourceRequested.immediateRequested[resId](); atomic { - /* - * Make sure that the default owner has it. Otherwise some other - * client owns the resource and immediateRequested has to fail. - */ - if (state != RES_DEF_OWNED) - return FAIL; - state = RES_IMM_GRANTING; - reqResId = id; + if(state == RES_CONTROLLED) { + state = RES_IMM_GRANTING; + reqResId = id; + } + else return FAIL; } signal ResourceDefaultOwner.immediateRequested(); if(resId == id) { call ResourceConfigure.configure[resId](); return SUCCESS; } - - /* - * We returned from immediateRequested and the requester - * still doesn't own the resource. The DefaultOwner has - * decided to keep it? So force back to DEF_OWNED. - */ - atomic state = RES_DEF_OWNED; + atomic state = RES_CONTROLLED; return FAIL; } async command error_t Resource.release[uint8_t id]() { atomic { if(state == RES_BUSY && resId == id) { - if(call Queue.isEmpty()) { - /* - * queue empty, no more client requests, give back to the - * default owner. - */ - resId = default_owner_id; - state = RES_DEF_OWNED; - call ResourceConfigure.unconfigure[id](); - signal ResourceDefaultOwner.granted(); - } else { - /* - * queue not empty, take next client from the queue - * and give the resource to them. Go immediately to - * GRANTING, which says the default owner doesn't - * need to release, already released. - */ + if(call Queue.isEmpty() == FALSE) { reqResId = call Queue.dequeue(); resId = NO_RES; state = RES_GRANTING; post grantedTask(); call ResourceConfigure.unconfigure[id](); } + else { + resId = default_owner_id; + state = RES_CONTROLLED; + call ResourceConfigure.unconfigure[id](); + signal ResourceDefaultOwner.granted(); + } return SUCCESS; } } @@ -260,14 +133,12 @@ implementation { async command error_t ResourceDefaultOwner.release() { atomic { if(resId == default_owner_id) { - if(state == RES_GRANTING || state == RES_PREGRANT) { - state = RES_GRANTING; + if(state == RES_GRANTING) { post grantedTask(); return SUCCESS; } else if(state == RES_IMM_GRANTING) { resId = reqResId; - reqResId = NO_RES; state = RES_BUSY; return SUCCESS; } @@ -278,78 +149,72 @@ implementation { /** Check if the Resource is currently in use - - DefaultOwner maybe busy using the resourse. Need extra level of check. */ async command bool ArbiterInfo.inUse() { atomic { - if (state == RES_DEF_OWNED) - return call ResourceDefaultOwnerInfo.inUse(); - return TRUE; + if (state == RES_CONTROLLED) + return FALSE; } + return TRUE; } /** - * Returns the current user of the Resource. - * - * formerly checked state, but now relies solely on current - * owner, ie. resId. Just return resId. If the - * default owner owns the resource then the resId will - * be one higher than the max client id. - * - * This was originally part of ResourceDefaultOwner - * (SerialDemux) changes. It is needed if a DefaultOwner - * actually needs to do something with the hardware. Ie. - * interrupts need to be steered to the ResourceDefaultOwner - * demultiplexer. In which case the client id (resId) is - * used to do the signal and needs to be a real number and not - * 0xff (NO_RES). - */ + Returns the current user of the Resource. + If there is no current user, the return value + will be 0xFF + */ async command uint8_t ArbiterInfo.userId() { - return resId; + atomic { + if(state != RES_BUSY) + return NO_RES; + return resId; + } } - /** - * Is this client the owner of the resource. + /** + * Returns my user id. */ async command bool Resource.isOwner[uint8_t id]() { - atomic return (resId == id && state == RES_BUSY); + atomic { + if(resId == id && state == RES_BUSY) return TRUE; + else return FALSE; + } } async command bool ResourceDefaultOwner.isOwner() { - atomic return (state == RES_DEF_OWNED || state == RES_PREGRANT); + atomic return (state == RES_CONTROLLED + || (resId == default_owner_id + && (state == RES_GRANTING || state == RES_IMM_GRANTING))); } - + task void grantedTask() { atomic { resId = reqResId; - reqResId = NO_RES; state = RES_BUSY; } call ResourceConfigure.configure[resId](); signal Resource.granted[resId](); } - -// Default event/command handlers for all of the other -// potential users/providers of the parameterized interfaces -// that have not been connected to. - - default event void Resource.granted[uint8_t id]() { } - default async event void ResourceRequested.requested[uint8_t id]() { } - default async event void ResourceRequested.immediateRequested[uint8_t id]() { } - default async event void ResourceDefaultOwner.granted() { } - default async command void ResourceConfigure.configure[uint8_t id]() { } - default async command void ResourceConfigure.unconfigure[uint8_t id]() { } - + + //Default event/command handlers for all of the other + //potential users/providers of the parameterized interfaces + //that have not been connected to. + default event void Resource.granted[uint8_t id]() { + } + default async event void ResourceRequested.requested[uint8_t id]() { + } + default async event void ResourceRequested.immediateRequested[uint8_t id]() { + } + default async event void ResourceDefaultOwner.granted() { + } default async event void ResourceDefaultOwner.requested() { call ResourceDefaultOwner.release(); } - default async event void ResourceDefaultOwner.immediateRequested() { - call ResourceDefaultOwner.release(); + call ResourceDefaultOwner.release(); } - - default async command bool ResourceDefaultOwnerInfo.inUse() { - return FALSE; + default async command void ResourceConfigure.configure[uint8_t id]() { + } + default async command void ResourceConfigure.unconfigure[uint8_t id]() { } } diff --git a/tos/system/FcfsArbiterC.nc b/tos/system/FcfsArbiterC.nc index 75b80b128b..3674108980 100644 --- a/tos/system/FcfsArbiterC.nc +++ b/tos/system/FcfsArbiterC.nc @@ -1,7 +1,5 @@ /* - * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2005 Washington University in St. Louis. - * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -32,6 +30,42 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/* + * - Revision ------------------------------------------------------------- + * $Revision: 1.7 $ + * $Date: 2010-06-29 22:07:56 $ + * ======================================================================== + */ + /** * Please refer to TEP 108 for more information about this component and its * intended use.

@@ -50,7 +84,6 @@ * @param resourceName -- The name of the Resource being shared * * @author Kevin Klues (klues@tkn.tu-berlin.de) - * @author Eric B. Decker (cire831@gmail.com) */ generic configuration FcfsArbiterC(char resourceName[]) { @@ -60,10 +93,7 @@ generic configuration FcfsArbiterC(char resourceName[]) { interface ResourceDefaultOwner; interface ArbiterInfo; } - uses { - interface ResourceConfigure[uint8_t id]; - interface ResourceDefaultOwnerInfo; - } + uses interface ResourceConfigure[uint8_t id]; } implementation { components MainC; @@ -77,7 +107,6 @@ implementation { ResourceDefaultOwner = Arbiter; ArbiterInfo = Arbiter; ResourceConfigure = Arbiter; - ResourceDefaultOwnerInfo = Arbiter; Arbiter.Queue -> Queue; } diff --git a/tos/system/FcfsPriorityArbiterC.nc b/tos/system/FcfsPriorityArbiterC.nc index 349f271007..3f5e09888c 100644 --- a/tos/system/FcfsPriorityArbiterC.nc +++ b/tos/system/FcfsPriorityArbiterC.nc @@ -299,7 +299,7 @@ implementation { will be 0xFF */ async command uint8_t ArbiterInfo.userId() { - return resId; + atomic return resId; } /** diff --git a/tos/system/SimpleArbiterP.nc b/tos/system/SimpleArbiterP.nc index cac2a430bd..05c7dcec8e 100644 --- a/tos/system/SimpleArbiterP.nc +++ b/tos/system/SimpleArbiterP.nc @@ -129,7 +129,11 @@ implementation { will be 0xFF */ async command uint8_t ArbiterInfo.userId() { - return resId; + atomic { + if(state != RES_BUSY) + return NO_RES; + return resId; + } } /** diff --git a/tos/types/I2C.h b/tos/types/I2C.h index c0286f4e9c..bf4bdf1599 100644 --- a/tos/types/I2C.h +++ b/tos/types/I2C.h @@ -39,39 +39,15 @@ #ifndef _I2C_H #define _I2C_H -/* - * It would be nice to deprecate TI2CExtdAddr and TI2CBasicAddr - * and replace them with TI2C7Bit and TI2C10Bit. - * - * But there is way too much code that uses TI2CBasicAddr and BasicAddr - * and it would be a pain to fix all that. Also adding a backward - * compatible interface to code providing BasicAddr is a pain because - * of the signalling. More trouble than it is worth. - * - * So keep in mind that TI2CBasicAddr is really TI2C7Bit. - */ - -/* nobody uses ExtdAddr (10 bit) address but define it anyway */ typedef struct { } TI2CExtdAddr; - -/* - * BasicAddr (7 bit addresses) is used all over the place. - * so back filling isn't recommended. New code should use - * TI2C7Bit. But that is also problematic. If so stick with - * TI2CBasicAddr. - */ typedef struct { } TI2CBasicAddr; -typedef struct { } TI2C7Bit; -typedef struct { } TI2C10Bit; - typedef uint8_t i2c_flags_t; enum { I2C_START = 0x01, I2C_STOP = 0x02, I2C_ACK_END = 0x04, - I2C_RESTART = 0x08, }; diff --git a/tos/types/Ieee154.h b/tos/types/Ieee154.h index b9d1493bb9..d46ef06604 100644 --- a/tos/types/Ieee154.h +++ b/tos/types/Ieee154.h @@ -61,46 +61,9 @@ typedef struct { #define i_saddr ieee_addr.saddr #define i_laddr ieee_addr.laddr -#ifdef notdef -/* - * The intent was to consolidate all ieee154 packet definitions - * in this file. However a couple of things got in the way. - * - * 1) when compiling with blip, for some reason the compile blows - * up on the nx_struct ieee154_simple_header_t definition below. - * Did look at the resultant C code generated and wasn't able to - * figure it out. - * - * 2) Miklos is starting a new addressing mechanism for both 16 and - * 64 bit ieee154 addresses using accessors and packer routines. - * That renders this whole thing moot so why bother changing code - * to consolidate. - */ -typedef nx_struct ieee154_simple_header_t { - nxle_uint16_t fcf; - nxle_uint8_t dsn; - nxle_uint16_t destpan; - nxle_uint16_t dest; - nxle_uint16_t src; -} ieee154_simple_header_t; - -typedef nx_struct ieee154_fcf_t { - nxle_uint16_t frame_type: 3; - nxle_uint16_t security_enabled: 1; - nxle_uint16_t frame_pending: 1; - nxle_uint16_t ack_request: 1; - nxle_uint16_t pan_id_compression: 1; - nxle_uint16_t _reserved: 3; - nxle_uint16_t dest_addr_mode: 2; - nxle_uint16_t frame_version: 2; - nxle_uint16_t src_addr_mode: 2; -} ieee154_fcf_t; -#endif - enum { IEEE154_BROADCAST_ADDR = 0xffff, - IEEE154_BROADCAST_PAN = 0xffff, - IEEE154_LINK_MTU = 127, + IEEE154_LINK_MTU = 127, }; struct ieee154_frame_addr { @@ -113,17 +76,15 @@ enum { IEEE154_MIN_HDR_SZ = 6, }; -#ifdef notdef - -// deprecated (does anyone use these?) - +#if 0 struct ieee154_header_base { uint8_t length; uint16_t fcf; uint8_t dsn; uint16_t destpan; } __attribute__((packed)); -#endif /* notdef */ +#else +#endif enum ieee154_fcf_enums { IEEE154_FCF_FRAME_TYPE = 0, @@ -150,19 +111,4 @@ enum ieee154_fcf_addr_mode_enums { IEEE154_ADDR_MASK = 3, }; -#ifndef DEFINED_TOS_IEEE154_PAN_ID -// NB: Matches default ActiveMessage group -#define DEFINED_TOS_IEEE154_PAN_ID 22 -#endif // DEFINED_TOS_IEEE154_PAN_ID - -#ifndef DEFINED_TOS_IEEE154_SHORT_ADDRESS -// NB: Matches default ActiveMessage address -#define DEFINED_TOS_IEEE154_SHORT_ADDRESS 1 -#endif // DEFINED_TOS_IEEE154_SHORT_ADDRESS - -enum { - TOS_IEEE154_SHORT_ADDRESS = DEFINED_TOS_IEEE154_SHORT_ADDRESS, - TOS_IEEE154_PAN_ID = DEFINED_TOS_IEEE154_PAN_ID, -}; - -#endif /* __IEEE154_H__ */ +#endif diff --git a/tos/types/TinyError.h b/tos/types/TinyError.h index ded1e6cfa2..6d3acc67ec 100644 --- a/tos/types/TinyError.h +++ b/tos/types/TinyError.h @@ -48,8 +48,8 @@ #define NESC_COMBINE(x) #endif -typedef enum { - SUCCESS = 0, +enum { + SUCCESS = 0, FAIL = 1, // Generic condition: backwards compatible ESIZE = 2, // Parameter passed in was too big. ECANCEL = 3, // Operation cancelled by a call. @@ -61,18 +61,17 @@ typedef enum { EALREADY = 9, // The device state you are requesting is already set ENOMEM = 10, // Memory required not available ENOACK = 11, // A packet was not acknowledged - ETIMEOUT = 12, // operation timed out - ELAST = 12 // Last enum value -} error_t NESC_COMBINE("ecombine"); + ELAST = 11 // Last enum value +}; -/* - * Returns: r1 if r1 == r2, FAIL otherwise. - * - * This is the standard error combination function: two successes, or - * two identical errors are preserved, while conflicting errors are - * represented by FAIL. - */ -error_t ecombine(error_t r1, error_t r2) @safe() { +typedef uint8_t error_t NESC_COMBINE("ecombine"); + +error_t ecombine(error_t r1, error_t r2) @safe() +/* Returns: r1 if r1 == r2, FAIL otherwise. This is the standard error + combination function: two successes, or two identical errors are + preserved, while conflicting errors are represented by FAIL. +*/ +{ return r1 == r2 ? r1 : FAIL; } From 5ad2b14ad99c0b79cd2553251b47e6646cd5d3ca Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Sat, 25 May 2013 11:51:06 -0500 Subject: [PATCH 347/411] Added support calling mspdebug through 'make exp430 install' --- support/make/exp430.target | 1 + support/make/msp/msp.rules | 7 +++++-- support/make/msp/mspdebug.extra | 26 ++++++++++++++++++++++++++ 3 files changed, 32 insertions(+), 2 deletions(-) create mode 100644 support/make/msp/mspdebug.extra diff --git a/support/make/exp430.target b/support/make/exp430.target index 9d2a272e7c..8e27b5fe8f 100644 --- a/support/make/exp430.target +++ b/support/make/exp430.target @@ -2,6 +2,7 @@ PLATFORM = exp430 MSP_MCU = msp430f5529 +DEFAULT_PROGRAM = mspdebug $(call TOSMake_include_platform,msp) diff --git a/support/make/msp/msp.rules b/support/make/msp/msp.rules index 9e3ab7f42d..b10c4ca557 100644 --- a/support/make/msp/msp.rules +++ b/support/make/msp/msp.rules @@ -5,14 +5,17 @@ define MSP_HELP MSP extras: - debug : compile with minimal optimization and debug symbols - debugopt : compile with debug symbols + debug : compile with minimal optimization and debug symbols + debugopt : compile with debug symbols + debug_noopt : compile with no size optimization (-O0) Programmer options: bsl,auto : (default) use BSL programmer on the first mote found bsl, : use BSL programmer on serial port bsl,ref, : use BSL programmer on the mote with reference + jtag : Use msp430-jtag + mspdebug : Use mspdebug The dev or host parameter for the programmer option need not be specified, in which case it is expected to be defined as in an environment variable of diff --git a/support/make/msp/mspdebug.extra b/support/make/msp/mspdebug.extra new file mode 100644 index 0000000000..b3372428b4 --- /dev/null +++ b/support/make/msp/mspdebug.extra @@ -0,0 +1,26 @@ +#-*-Makefile-*- vim:ft=make + +PROGRAM = mspdebug # Not sure if this is needed + +# MSP_DEBUG_FLAGS can be used to specify the type of device mspdebug is connected to +MSP_DEBUG_FLAGS ?= rf2500 + +ifndef MSP_DEBUG +MSP_DEBUG = mspdebug +endif + +program: FORCE + @echo " installing $(PLATFORM) binary using mspdebug" + $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) "prog $(INSTALL_IHEX)" + +program_no_e: FORCE + @echo " installing $(PLATFORM) binary mspdebug (without mass erase)" + $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) "load $(INSTALL_IHEX)" + +program_bl: FORCE + @echo " installing $(PLATFORM) bootloader using mspdebug" + $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) "prog $(BOOTLOADER_IMG)" + +program_input: ihex + @: + From 2d2da5ad5b47acb4a37495a3d90a9664fe36f3a4 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Sat, 25 May 2013 17:49:51 -0500 Subject: [PATCH 348/411] Updated pin definitions for UART functionality --- tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 182 ++++++++++++++++++ tos/interfaces/UartByte.nc | 38 +++- tos/platforms/exp430/.platform | 4 +- tos/platforms/exp430/PlatformC.nc | 2 +- .../exp430/hardware/usci/PlatformSerialC.nc | 2 +- .../exp430/hardware/usci/PlatformUsciMapC.nc | 22 +-- 6 files changed, 227 insertions(+), 23 deletions(-) diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index f756c6adb7..fc3a1e4102 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -452,6 +452,100 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as ADC15; #endif /* msp430x54x || msp430x54xA */ +/* + * x5 family: msp430f5529 + */ +#if defined(__MSP430F5529) + provides interface HplMsp430GeneralIO as TA0CCR0; + provides interface HplMsp430GeneralIO as TA0CCR1; + provides interface HplMsp430GeneralIO as TA0CCR2; + provides interface HplMsp430GeneralIO as TA0CCR3; + provides interface HplMsp430GeneralIO as TA0CCR4; + provides interface HplMsp430GeneralIO as TA0CLK; + + provides interface HplMsp430GeneralIO as TA1CCR0; + provides interface HplMsp430GeneralIO as TA1CCR1; + provides interface HplMsp430GeneralIO as TA1CCR2; + provides interface HplMsp430GeneralIO as TA1CLK; + + provides interface HplMsp430GeneralIO as TA2CCR0; + provides interface HplMsp430GeneralIO as TA2CCR1; + provides interface HplMsp430GeneralIO as TA2CCR2; + provides interface HplMsp430GeneralIO as TA2CLK; + + provides interface HplMsp430GeneralIO as TB0CCR0; + provides interface HplMsp430GeneralIO as TB0CCR1; + provides interface HplMsp430GeneralIO as TB0CCR2; + provides interface HplMsp430GeneralIO as TB0CCR3; + provides interface HplMsp430GeneralIO as TB0CCR4; + provides interface HplMsp430GeneralIO as TB0CCR5; + provides interface HplMsp430GeneralIO as TB0CCR6; + provides interface HplMsp430GeneralIO as TB0CLK; + provides interface HplMsp430GeneralIO as TB0OUTH; + + provides interface HplMsp430GeneralIO as RTCCLK; + provides interface HplMsp430GeneralIO as MCLK; + provides interface HplMsp430GeneralIO as SMCLK; + provides interface HplMsp430GeneralIO as ACLK; + /*provides interface HplMsp430GeneralIO as ADC12CLK;*/ + provides interface HplMsp430GeneralIO as DMAE0; + + provides interface HplMsp430GeneralIO as UCA0CLK; + provides interface HplMsp430GeneralIO as UCA0STE; + provides interface HplMsp430GeneralIO as UCA0TXD; + provides interface HplMsp430GeneralIO as UCA0RXD; + provides interface HplMsp430GeneralIO as UCA0SIMO; + provides interface HplMsp430GeneralIO as UCA0SOMI; + + provides interface HplMsp430GeneralIO as UCB0CLK; + provides interface HplMsp430GeneralIO as UCB0STE; + provides interface HplMsp430GeneralIO as UCB0SIMO; + provides interface HplMsp430GeneralIO as UCB0SOMI; + provides interface HplMsp430GeneralIO as UCB0SDA; + provides interface HplMsp430GeneralIO as UCB0SCL; + + provides interface HplMsp430GeneralIO as UCA1CLK; + provides interface HplMsp430GeneralIO as UCA1STE; + provides interface HplMsp430GeneralIO as UCA1TXD; + provides interface HplMsp430GeneralIO as UCA1RXD; + provides interface HplMsp430GeneralIO as UCA1SIMO; + provides interface HplMsp430GeneralIO as UCA1SOMI; + + provides interface HplMsp430GeneralIO as UCB1CLK; + provides interface HplMsp430GeneralIO as UCB1STE; + provides interface HplMsp430GeneralIO as UCB1SIMO; + provides interface HplMsp430GeneralIO as UCB1SOMI; + provides interface HplMsp430GeneralIO as UCB1SDA; + provides interface HplMsp430GeneralIO as UCB1SCL; + + provides interface HplMsp430GeneralIO as ADC0; + provides interface HplMsp430GeneralIO as ADC1; + provides interface HplMsp430GeneralIO as ADC2; + provides interface HplMsp430GeneralIO as ADC3; + provides interface HplMsp430GeneralIO as ADC4; + provides interface HplMsp430GeneralIO as ADC5; + provides interface HplMsp430GeneralIO as ADC6; + provides interface HplMsp430GeneralIO as ADC7; + +// A8 and A9 can either be external inputs or connected to Vref/Veref +// Check your chip for more details. + + provides interface HplMsp430GeneralIO as ADC8; + provides interface HplMsp430GeneralIO as ADC9; + +// A10 connects internally to Ref_x and A11 (INCHx = 0xB) +// measures AVcc through a divider network. There are +// no external pins associated with ADC10 or ADC11. + + provides interface HplMsp430GeneralIO as ADC12; + provides interface HplMsp430GeneralIO as ADC13; + provides interface HplMsp430GeneralIO as ADC14; + provides interface HplMsp430GeneralIO as ADC15; + + // Supply voltage monitoring + provides interface HplMsp430GeneralIO as SVMOUT; + +#endif /* MSP430F5529 */ } implementation { @@ -1097,4 +1191,92 @@ implementation { #endif #endif /* __msp430x54x || __msp430x54xA */ + +#if defined(__MSP430F5529) + + TA0CCR0 = P11; + TA0CCR1 = P12; + TA0CCR2 = P13; + TA0CCR3 = P14; + TA0CCR4 = P15; + TA0CLK = P10; + + TA1CCR0 = P17; + TA1CCR1 = P20; + TA1CCR2 = P21; + TA1CLK = P16; + + TA2CCR0 = P23; + TA2CCR1 = P24; + TA2CCR2 = P25; + TA2CLK = P22; + + TB0CCR0 = P56; + TB0CCR1 = P57; + TB0CCR2 = P74; + TB0CCR3 = P75; + TB0CCR4 = P76; + TB0CCR5 = P35; + TB0CCR6 = P36; + TB0CLK = P77; + TB0OUTH = P37; + + RTCCLK = P26; + MCLK = P77; + SMCLK = P22; + ACLK = P10; + // ADC12CLK is on accessable via the Port Mapping Controller + //ADC12CLK = ; + DMAE0 = P26; + + UCA0TXD = P33; + UCA0RXD = P34; + UCA0SIMO = P33; + UCA0SOMI = P34; + UCA0CLK = P27; + UCA0STE = P32; + + UCB0STE = P27; + UCB0SIMO = P30; + UCB0SOMI = P31; + UCB0SDA = P30; + UCB0SCL = P31; + UCB0CLK = P32; + + UCA1TXD = P44; + UCA1RXD = P45; + UCA1SIMO = P44; + UCA1SOMI = P45; + UCA1CLK = P40; + UCA1STE = P43; + + UCB1STE = P40; + UCB1SIMO = P41; + UCB1SOMI = P42; + UCB1SDA = P41; + UCB1SCL = P42; + UCB1CLK = P43; + + ADC0 = P60; + ADC1 = P61; + ADC2 = P62; + ADC3 = P63; + ADC4 = P64; + ADC5 = P65; + ADC6 = P66; + ADC7 = P67; + ADC8 = P50; + ADC9 = P51; + + // there are no ADC's 10 and 11 according to datasheet + + ADC12 = P70; + ADC13 = P71; + ADC14 = P72; + ADC15 = P73; + + SVMOUT = P37; + +#endif /* __MSP430F5529 */ + } diff --git a/tos/interfaces/UartByte.nc b/tos/interfaces/UartByte.nc index 4263917b97..2d8d0195fd 100644 --- a/tos/interfaces/UartByte.nc +++ b/tos/interfaces/UartByte.nc @@ -1,37 +1,41 @@ /* + * Copyright (c) 2013, Eric B. Decker * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: + * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. + * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. - * - Neither the name of the Arch Rock Corporation nor the names of + * + * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui - * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:35 $ + * @author Eric B. Decker */ interface UartByte { @@ -45,9 +49,18 @@ interface UartByte { */ async command error_t send( uint8_t byte ); + /** + * sendAvail: is space available for another TX byte. + * + * @return TRUE the TX subsystem can take another byte. ie. + * UartByte.send() would not block if called. + * FALSE TX pipeline is full, UartByte.send() would block. + */ + async command bool sendAvail(); + /** * Receive a single uart byte. The call blocks until a byte is - * received. + * received or the timeout occurs. * * @param 'uint8_t* ONE byte' Where to place received byte. * @param timeout How long in byte times to wait. @@ -55,4 +68,13 @@ interface UartByte { */ async command error_t receive( uint8_t* byte, uint8_t timeout ); + /** + * sendAvail: is space available for another TX byte. + * + * @return TRUE the RX subsystem has another byte to receive. ie. + * UartByte.receive() would not block if called. + * FALSE RX pipeline is empty, UartByte.receive() would block + * waiting for a byte and/or the timeout. + */ + async command bool receiveAvail(); } diff --git a/tos/platforms/exp430/.platform b/tos/platforms/exp430/.platform index 80c521409b..57e02bfb53 100644 --- a/tos/platforms/exp430/.platform +++ b/tos/platforms/exp430/.platform @@ -10,12 +10,12 @@ for (split(/\n/, <<'EOText' %P/hardware/clock %P/hardware/leds %P/hardware/pins - #%P/hardware/usci + %P/hardware/usci %T/chips/msp430/x5xxx %T/chips/msp430/x5xxx/lpm %T/chips/msp430/x5xxx/timer - #%T/chips/msp430/x5xxx/usci + %T/chips/msp430/x5xxx/usci %T/chips/msp430 %T/chips/msp430/pins %T/chips/msp430/timer diff --git a/tos/platforms/exp430/PlatformC.nc b/tos/platforms/exp430/PlatformC.nc index a001659cea..0ba4edbb5a 100644 --- a/tos/platforms/exp430/PlatformC.nc +++ b/tos/platforms/exp430/PlatformC.nc @@ -58,7 +58,7 @@ implementation { components PlatformLedsC; PlatformP.PlatformLeds -> PlatformLedsC; - /*components PlatformUsciMapC;*/ + components PlatformUsciMapC; // No code initialization required; just connect the pins components PlatformClockC; diff --git a/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc b/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc index 9c471defbd..d253fce3ab 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc @@ -64,7 +64,7 @@ implementation { components PlatformSerialP; StdControl = PlatformSerialP; - components new Msp430UsciUartA0C() as UartC; + components new Msp430UsciUartA1C() as UartC; UartStream = UartC; UartByte = UartC; diff --git a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc index 53ea18488e..68e9a60a97 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc @@ -44,17 +44,17 @@ configuration PlatformUsciMapC { } implementation { components HplMsp430GeneralIOC as GIO; - components Msp430UsciUartA0P as UartA0C; - UartA0C.URXD -> GIO.UCA0RXD; - UartA0C.UTXD -> GIO.UCA0TXD; + components Msp430UsciUartA1P as UartA1C; + UartA1C.URXD -> GIO.UCA1RXD; + UartA1C.UTXD -> GIO.UCA1TXD; - components Msp430UsciSpiB0P as SpiB0C; - SpiB0C.SIMO -> GIO.UCB0SIMO; - SpiB0C.SOMI -> GIO.UCB0SOMI; - SpiB0C.CLK -> GIO.UCB0CLK; + /*components Msp430UsciSpiB0P as SpiB0C;*/ + /*SpiB0C.SIMO -> GIO.UCB0SIMO;*/ + /*SpiB0C.SOMI -> GIO.UCB0SOMI;*/ + /*SpiB0C.CLK -> GIO.UCB0CLK;*/ - components Msp430UsciSpiA3P as SpiA3C; - SpiA3C.SIMO -> GIO.UCA3SIMO; - SpiA3C.SOMI -> GIO.UCA3SOMI; - SpiA3C.CLK -> GIO.UCA3CLK; + /*components Msp430UsciSpiA3P as SpiA3C;*/ + /*SpiA3C.SIMO -> GIO.UCA3SIMO;*/ + /*SpiA3C.SOMI -> GIO.UCA3SOMI;*/ + /*SpiA3C.CLK -> GIO.UCA3CLK;*/ } From 217f9c373f503e811045eb7548282feb823c33ae Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 29 May 2013 15:38:22 -0500 Subject: [PATCH 349/411] Provided a way to set the serial port baud rate. By letting PlatformSerialP provide the Msp430UsciConfigure interface and implement the getConfiguration method, we can now pass a different msp430_usci_config_t variable instead of using the default. This is necessary for the EXP430 because the default baud rate table (msp430usci.h) assumes the UART clock input(SMCLK) to be 1MiHz instead of the correct value of 8MHz. --- .../msp430/x5xxx/usci/Msp430UsciUartA0C.nc | 2 ++ .../msp430/x5xxx/usci/Msp430UsciUartA1C.nc | 2 ++ .../msp430/x5xxx/usci/Msp430UsciUartA2C.nc | 2 ++ .../msp430/x5xxx/usci/Msp430UsciUartA3C.nc | 2 ++ .../exp430/hardware/clock/PlatformClockP.nc | 1 + .../exp430/hardware/usci/PlatformSerialC.nc | 2 ++ .../exp430/hardware/usci/PlatformSerialP.nc | 18 ++++++++++++++++++ tos/platforms/exp430/platform_message.h | 2 +- 8 files changed, 30 insertions(+), 1 deletion(-) diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc index 1fed90eaa6..ff2f8cb8b0 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA0C.nc @@ -46,6 +46,7 @@ generic configuration Msp430UsciUartA0C() { interface UartByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure[uint8_t client]; } implementation { enum { @@ -59,6 +60,7 @@ implementation { UartStream = UartC.UartStream[CLIENT_ID]; UartByte = UartC.UartByte[CLIENT_ID]; Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartC.Msp430UsciConfigure; UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc index b28d5aef09..f5ebbda92d 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA1C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciUartA1C() { interface UartByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure[uint8_t client]; } implementation { enum { @@ -61,6 +62,7 @@ implementation { UartStream = UartC.UartStream[CLIENT_ID]; UartByte = UartC.UartByte[CLIENT_ID]; Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartC.Msp430UsciConfigure; UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc index 8b42664b74..4a6a50b78a 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA2C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciUartA2C() { interface UartByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure[uint8_t client]; } implementation { enum { @@ -61,6 +62,7 @@ implementation { UartStream = UartC.UartStream[CLIENT_ID]; UartByte = UartC.UartByte[CLIENT_ID]; Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartC.Msp430UsciConfigure; UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc index f20d33fbe7..83e04d3ec0 100644 --- a/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc +++ b/tos/chips/msp430/x5xxx/usci/Msp430UsciUartA3C.nc @@ -48,6 +48,7 @@ generic configuration Msp430UsciUartA3C() { interface UartByte; interface Msp430UsciError; } + uses interface Msp430UsciConfigure[uint8_t client]; } implementation { enum { @@ -61,6 +62,7 @@ implementation { UartStream = UartC.UartStream[CLIENT_ID]; UartByte = UartC.UartByte[CLIENT_ID]; Msp430UsciError = UartC.Msp430UsciError[CLIENT_ID]; + Msp430UsciConfigure = UartC.Msp430UsciConfigure; UsciC.ResourceConfigure[CLIENT_ID] -> UartC.ResourceConfigure[CLIENT_ID]; } diff --git a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc index 76c3507108..def5533ddd 100644 --- a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc +++ b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc @@ -108,6 +108,7 @@ * Stabilization appears to take roughly 150ms. * * @author Eric B. Decker + * @author Addisu Z. Taddese */ #define noinit __attribute__ ((section(".noinit"))) diff --git a/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc b/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc index d253fce3ab..6c711ccbf4 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformSerialC.nc @@ -48,6 +48,7 @@ * * @author David Moss * @author Peter A. Bigot + * @author Addisu Z. Taddese */ configuration PlatformSerialC { @@ -70,5 +71,6 @@ implementation { UartByte = UartC; Msp430UsciError = UartC; PlatformSerialP.Resource -> UartC.Resource; + UartC.Msp430UsciConfigure -> PlatformSerialP.Msp430UsciConfigure; } diff --git a/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc b/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc index 50fcd72fe4..86719e22af 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc @@ -37,10 +37,24 @@ /** * @author David Moss * @author Peter A. Bigot + * @author Addisu Z. Taddese */ +/* + * This table assumes UART clock input (SMCLK) is 8MHz + */ +msp430_usci_config_t msp430_usci_uart_exp430_config = { + /* N81 UART mode driven by SMCLK */ + ctlw0 : (0 << 8) | UCSSEL__SMCLK, + + /* SLAU208 Table 34-4 8MHz 9600: UBR=833, BRS=2, BRF=0 */ + brw : 833, // 9600 + mctl : UCBRF_0 + UCBRS_2 +}; + module PlatformSerialP { provides interface StdControl; + provides interface Msp430UsciConfigure[ uint8_t client ]; uses interface Resource; } @@ -55,4 +69,8 @@ implementation { } event void Resource.granted() { } + + async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client] (){ + return &msp430_usci_uart_exp430_config; + } } diff --git a/tos/platforms/exp430/platform_message.h b/tos/platforms/exp430/platform_message.h index e3d24e69ee..305541c09f 100644 --- a/tos/platforms/exp430/platform_message.h +++ b/tos/platforms/exp430/platform_message.h @@ -43,7 +43,7 @@ #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H -#include +//#include #include typedef union message_header { From b17e8546fe12cc7cfc58ddecd6cb09650686ed79 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 29 May 2013 15:39:28 -0500 Subject: [PATCH 350/411] Removed a #ifdef block that disabled LED2. --- tos/platforms/exp430/hardware/leds/PlatformLedsC.nc | 3 ++- tos/platforms/exp430/hardware/leds/PlatformLedsP.nc | 2 -- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc index e575f5edfc..c1c4d495c2 100644 --- a/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc @@ -32,6 +32,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Peter A. Bigot + * @author Addisu Z. Taddese */ #include "hardware.h" @@ -59,7 +60,7 @@ implementation { Led1Impl -> GeneralIOC.Port81; PlatformLedsP.Led1 -> Led1Impl; - /* Green LED (D1) at P8.2 */ + /* Green LED (D1) at P8.2 */ components new Msp430GpioC() as Led2Impl; Led2Impl -> GeneralIOC.Port82; PlatformLedsP.Led2 -> Led2Impl; diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc index b344001a7f..6671574020 100644 --- a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc @@ -136,13 +136,11 @@ implementation { } else { call Leds.led1Off(); } -#ifdef notdef if (val & LEDS_LED2) { call Leds.led2On(); } else { call Leds.led2Off(); } -#endif } } } From 60abe94cde0f77a2fd0c12ad368b46e173c9ab79 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 29 May 2013 15:40:31 -0500 Subject: [PATCH 351/411] Updated gitignore --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index 9ff1e3d668..c1432bd30e 100644 --- a/.gitignore +++ b/.gitignore @@ -7,3 +7,4 @@ build .#* .gdb* TAGS +tags From f3bd64ac5d208fe100978b1b6e1c48d1730c8827 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Thu, 30 May 2013 10:16:49 -0500 Subject: [PATCH 352/411] Inverted Leds.get logic. I don't know why it was done this way where the ON bits were zeros. I found the bug when I called call Leds.set(call Leds.get() ^ 0x7). The expected result was that the three LEDs will toggle. Instead nothing happens. This commit fixes this by changing the bitwise logic. --- .../exp430/hardware/leds/PlatformLedsP.nc | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc index 6671574020..87dafc21fc 100644 --- a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc @@ -111,14 +111,14 @@ implementation { uint8_t rval; atomic { rval = 0; - if (!call Led0.get()) { - rval |= LEDS_LED0; + if (call Led0.get()) { + rval |= LEDS_LED0; } - if (!call Led1.get()) { - rval |= LEDS_LED1; + if (call Led1.get()) { + rval |= LEDS_LED1; } - if (!call Led2.get()) { - rval |= LEDS_LED2; + if (call Led2.get()) { + rval |= LEDS_LED2; } } return rval; @@ -127,19 +127,19 @@ implementation { async command void Leds.set(uint8_t val) { atomic { if (val & LEDS_LED0) { - call Leds.led0On(); + call Leds.led0On(); } else { - call Leds.led0Off(); + call Leds.led0Off(); } if (val & LEDS_LED1) { - call Leds.led1On(); + call Leds.led1On(); } else { - call Leds.led1Off(); + call Leds.led1Off(); } if (val & LEDS_LED2) { - call Leds.led2On(); + call Leds.led2On(); } else { - call Leds.led2Off(); + call Leds.led2Off(); } } } From c463ab45ebe93d06bdcfd8c58c0c44228a61bd13 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 31 May 2013 15:48:30 -0500 Subject: [PATCH 353/411] Added support for programming the EXP430 using bsl via USB The f5xx family of chips are capable of being bootloaded via USB. The python-msp430-tools provides the necessary tools to accomplish this. Unfortunetly, some of command line flags are incompattible with the tos-bsl, thus, a new bsl5.extra file is necessary. --- support/make/exp430.target | 2 +- support/make/msp/bsl5.extra | 29 +++++++++++++++++++++++++++++ support/make/msp/mspdebug.extra | 4 +--- 3 files changed, 31 insertions(+), 4 deletions(-) create mode 100644 support/make/msp/bsl5.extra diff --git a/support/make/exp430.target b/support/make/exp430.target index 8e27b5fe8f..49dc9a827b 100644 --- a/support/make/exp430.target +++ b/support/make/exp430.target @@ -2,7 +2,7 @@ PLATFORM = exp430 MSP_MCU = msp430f5529 -DEFAULT_PROGRAM = mspdebug +DEFAULT_PROGRAM ?= mspdebug $(call TOSMake_include_platform,msp) diff --git a/support/make/msp/bsl5.extra b/support/make/msp/bsl5.extra new file mode 100644 index 0000000000..6d024f5d31 --- /dev/null +++ b/support/make/msp/bsl5.extra @@ -0,0 +1,29 @@ +# bsl5.extra +# +# Uses the python-msp430-tools package to program f5xx family of chips using USB. +# It installs to the first usb device with 2047:0200 vendor and device ids. +# +# Use pip to install python-msp430-tools +# pip install python-msp430-tools +# + +PROGRAM = bsl5 + +MSP_BSL ?= python -m msp430.bsl5.hid + +program: FORCE + @echo " installing $(PLATFORM) binary using bsl" + $(MSP_BSL) $(MSP_BSL_FLAGS) -r -e -i ihex -P $(INSTALL_IHEX) + rm -f $(subst .ihex.,.exe.,$(INSTALL_IHEX)) $(INSTALL_IHEX) + +program_no_e:FORCE + @echo " installing $(PLATFORM) binary using bsl (without mass erase)" + $(MSP_BSL) $(MSP_BSL_FLAGS) -r -i ihex -P $(INSTALL_IHEX) + rm -f $(subst .ihex.,.exe.,$(INSTALL_IHEX)) $(INSTALL_IHEX) + +program_bl: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE + @echo " installing $(PLATFORM) bootloader using bsl" + $(MSP_BSL) $(MSP_BSL_FLAGS) -r -e -i ihex -P $(BOOTLOADER_IMG) + +program_input: ihex + @: diff --git a/support/make/msp/mspdebug.extra b/support/make/msp/mspdebug.extra index b3372428b4..ba42d06dc6 100644 --- a/support/make/msp/mspdebug.extra +++ b/support/make/msp/mspdebug.extra @@ -5,9 +5,7 @@ PROGRAM = mspdebug # Not sure if this is needed # MSP_DEBUG_FLAGS can be used to specify the type of device mspdebug is connected to MSP_DEBUG_FLAGS ?= rf2500 -ifndef MSP_DEBUG -MSP_DEBUG = mspdebug -endif +MSP_DEBUG ?= mspdebug program: FORCE @echo " installing $(PLATFORM) binary using mspdebug" From 3f64276c6f8c1ceb4f7ce434a8fa5f83d552db26 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 4 Jun 2013 10:18:42 -0500 Subject: [PATCH 354/411] Corrected LED and ADC pin assignments --- tos/platforms/exp430/hardware.h | 38 +++++++++---------- .../exp430/hardware/adc/PlatformAdcC.nc | 16 ++++---- 2 files changed, 27 insertions(+), 27 deletions(-) diff --git a/tos/platforms/exp430/hardware.h b/tos/platforms/exp430/hardware.h index 3c1d7688f0..4195c89fd9 100644 --- a/tos/platforms/exp430/hardware.h +++ b/tos/platforms/exp430/hardware.h @@ -46,9 +46,9 @@ enum { }; /* Use the PlatformAdcC component, and enable 8 pins */ -//#define ADC12_USE_PLATFORM_ADC 1 -//#define ADC12_PIN_AUTO_CONFIGURE 1 -//#define ADC12_PINS_AVAILABLE 8 +#define ADC12_USE_PLATFORM_ADC 1 +#define ADC12_PIN_AUTO_CONFIGURE 1 +#define ADC12_PINS_AVAILABLE 8 /* @TODO@ Disable probe for XT1 support until the anomaly observed in * apps/bootstrap/LocalTime is resolved. */ @@ -58,24 +58,24 @@ enum { // LEDs TOSH_ASSIGN_PIN(RED_LED, 1, 0); -TOSH_ASSIGN_PIN(GREEN_LED, 1, 1); -TOSH_ASSIGN_PIN(YELLOW_LED, 4, 6); +TOSH_ASSIGN_PIN(GREEN_LED, 8, 1); +TOSH_ASSIGN_PIN(YELLOW_LED, 8, 2); // CC2420 RADIO #defines -TOSH_ASSIGN_PIN(RADIO_CSN, 3, 0); -TOSH_ASSIGN_PIN(RADIO_VREF, 2, 6); -TOSH_ASSIGN_PIN(RADIO_RESET, 2, 5); -TOSH_ASSIGN_PIN(RADIO_FIFOP, 2, 3); -TOSH_ASSIGN_PIN(RADIO_SFD, 2, 1); -TOSH_ASSIGN_PIN(RADIO_GIO0, 5, 0); -TOSH_ASSIGN_PIN(RADIO_FIFO, 2, 2); -TOSH_ASSIGN_PIN(RADIO_GIO1, 5, 1); -TOSH_ASSIGN_PIN(RADIO_CCA, 2, 4); +//TOSH_ASSIGN_PIN(RADIO_CSN, 3, 0); +//TOSH_ASSIGN_PIN(RADIO_VREF, 2, 6); +//TOSH_ASSIGN_PIN(RADIO_RESET, 2, 5); +//TOSH_ASSIGN_PIN(RADIO_FIFOP, 2, 3); +//TOSH_ASSIGN_PIN(RADIO_SFD, 2, 1); +//TOSH_ASSIGN_PIN(RADIO_GIO0, 5, 0); +//TOSH_ASSIGN_PIN(RADIO_FIFO, 2, 2); +//TOSH_ASSIGN_PIN(RADIO_GIO1, 5, 1); +//TOSH_ASSIGN_PIN(RADIO_CCA, 2, 4); -TOSH_ASSIGN_PIN(CC_FIFOP, 2, 3); -TOSH_ASSIGN_PIN(CC_FIFO, 2, 2); -TOSH_ASSIGN_PIN(CC_SFD, 2, 1); -TOSH_ASSIGN_PIN(CC_VREN, 2, 6); -TOSH_ASSIGN_PIN(CC_RSTN, 2, 5); +//TOSH_ASSIGN_PIN(CC_FIFOP, 2, 3); +//TOSH_ASSIGN_PIN(CC_FIFO, 2, 2); +//TOSH_ASSIGN_PIN(CC_SFD, 2, 1); +//TOSH_ASSIGN_PIN(CC_VREN, 2, 6); +//TOSH_ASSIGN_PIN(CC_RSTN, 2, 5); #endif // _H_hardware_h diff --git a/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc b/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc index e5ea8d4e38..f953c45c95 100644 --- a/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc +++ b/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc @@ -56,14 +56,14 @@ configuration PlatformAdcC { implementation { components HplMsp430GeneralIOC; - A0 = HplMsp430GeneralIOC.Port20; - A1 = HplMsp430GeneralIOC.Port21; - A2 = HplMsp430GeneralIOC.Port22; - A3 = HplMsp430GeneralIOC.Port23; - A4 = HplMsp430GeneralIOC.Port24; - A5 = HplMsp430GeneralIOC.Port25; - A6 = HplMsp430GeneralIOC.Port26; - A7 = HplMsp430GeneralIOC.Port27; + A0 = HplMsp430GeneralIOC.ADC0; + A1 = HplMsp430GeneralIOC.ADC1; + A2 = HplMsp430GeneralIOC.ADC2; + A3 = HplMsp430GeneralIOC.ADC3; + A4 = HplMsp430GeneralIOC.ADC4; + A5 = HplMsp430GeneralIOC.ADC5; + A6 = HplMsp430GeneralIOC.ADC6; + A7 = HplMsp430GeneralIOC.ADC7; components Msp430TimerC; TimerA = Msp430TimerC.Timer0_A; From 3e9a0e89ae4dca271f5a0bb38521412c29a758d2 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 4 Jun 2013 18:51:51 -0500 Subject: [PATCH 355/411] Set lastCount to length in order to get Adc Streaming to work pos and buffer are always the same so lastCount was always 0. --- tos/chips/msp430/adc12/AdcStreamP.nc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tos/chips/msp430/adc12/AdcStreamP.nc b/tos/chips/msp430/adc12/AdcStreamP.nc index 18d499dae4..f7a11b4d6b 100644 --- a/tos/chips/msp430/adc12/AdcStreamP.nc +++ b/tos/chips/msp430/adc12/AdcStreamP.nc @@ -293,7 +293,8 @@ implementation { else { lastBuffer = buffer; - lastCount = pos - buffer; + /*lastCount = pos - buffer;*/ + lastCount = length; } } post bufferDone(); From 4abc5f18692d7be7e1ec5b777415eab51f27c6eb Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 11 Jun 2013 13:52:06 -0500 Subject: [PATCH 356/411] Changed port mapping for P4.0 to be a TimerB peripheral --- tos/platforms/exp430/hardware.h | 6 ------ tos/platforms/exp430/hardware/clock/PlatformClockP.nc | 6 +++--- tos/platforms/exp430/hardware/pins/PlatformPinsP.nc | 11 ++--------- 3 files changed, 5 insertions(+), 18 deletions(-) diff --git a/tos/platforms/exp430/hardware.h b/tos/platforms/exp430/hardware.h index 4195c89fd9..7a48fab387 100644 --- a/tos/platforms/exp430/hardware.h +++ b/tos/platforms/exp430/hardware.h @@ -50,12 +50,6 @@ enum { #define ADC12_PIN_AUTO_CONFIGURE 1 #define ADC12_PINS_AVAILABLE 8 -/* @TODO@ Disable probe for XT1 support until the anomaly observed in - * apps/bootstrap/LocalTime is resolved. */ -#ifndef PLATFORM_MSP430_HAS_XT1 -#define PLATFORM_MSP430_HAS_XT1 1 -#endif /* PLATFORM_MSP430_HAS_XT1 */ - // LEDs TOSH_ASSIGN_PIN(RED_LED, 1, 0); TOSH_ASSIGN_PIN(GREEN_LED, 8, 1); diff --git a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc index def5533ddd..cafd10cf1f 100644 --- a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc +++ b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc @@ -34,11 +34,11 @@ /** * - * Initilization of the Clock system for the MM5 series motes. + * Initilization of the Clock system for the EXP430 Experimenter board. * - * MM5s are based on msp430f5438 series cpus. + * The EXP430 based on msp430f5529 series cpus. * - * The 5438 runs at 2.2V and can clock up to 18MHz. The 5438a + * The 5529 runs at 2.2V and can clock up to 18MHz. The 5438a * can run at 1.8V (up to 8 MHz), and its core can be tweaked to * enable faster clocking. We default to using 8MHz so allow * low power execution on the 5438a. diff --git a/tos/platforms/exp430/hardware/pins/PlatformPinsP.nc b/tos/platforms/exp430/hardware/pins/PlatformPinsP.nc index aac55fcf1a..583375309a 100644 --- a/tos/platforms/exp430/hardware/pins/PlatformPinsP.nc +++ b/tos/platforms/exp430/hardware/pins/PlatformPinsP.nc @@ -48,18 +48,11 @@ implementation { command error_t Init.init() { atomic { - /* - * for now, just leave it all as the reset state. - * - * 5438, all input, with OUT/IN left alone. - */ -#if 0 /* Disabled: these specific setting sare defaults, but others might not be */ PMAPPWD = PMAPPW; // Get write-access to port mapping regs - P1MAP5 = PM_UCA0RXD; // Map UCA0RXD output to P1.5 - P1MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6 + P4MAP0 = PM_TB0CCR1A; // Map Timer_B CCR1 capture/compare + /*P4MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6*/ PMAPPWD = 0; // Lock port mapping registers -#endif // } return SUCCESS; From dd222ccd10cbfaf94056997631d51b19a077d97c Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 17 Jun 2013 14:34:17 -0500 Subject: [PATCH 357/411] Modified to get SPI to work. Use usci-v2. --- tos/platforms/exp430/.platform | 2 +- .../exp430/hardware/usci/PlatformSerialP.nc | 13 ++++++++----- .../exp430/hardware/usci/PlatformUsciMapC.nc | 5 +++++ 3 files changed, 14 insertions(+), 6 deletions(-) diff --git a/tos/platforms/exp430/.platform b/tos/platforms/exp430/.platform index 57e02bfb53..4f7b2409c9 100644 --- a/tos/platforms/exp430/.platform +++ b/tos/platforms/exp430/.platform @@ -15,7 +15,7 @@ for (split(/\n/, <<'EOText' %T/chips/msp430/x5xxx %T/chips/msp430/x5xxx/lpm %T/chips/msp430/x5xxx/timer - %T/chips/msp430/x5xxx/usci + %T/chips/msp430/x5xxx/usci-v2 %T/chips/msp430 %T/chips/msp430/pins %T/chips/msp430/timer diff --git a/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc b/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc index 86719e22af..29a8d11632 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc @@ -45,16 +45,19 @@ */ msp430_usci_config_t msp430_usci_uart_exp430_config = { /* N81 UART mode driven by SMCLK */ - ctlw0 : (0 << 8) | UCSSEL__SMCLK, + ctl0 : 0, + ctl1 : UCSSEL__SMCLK, /* SLAU208 Table 34-4 8MHz 9600: UBR=833, BRS=2, BRF=0 */ - brw : 833, // 9600 - mctl : UCBRF_0 + UCBRS_2 + /*brw : 833, // 9600*/ + br0 : 65, + br1 : 3, + mctl : UCBRF_0 | UCBRS_2 }; module PlatformSerialP { provides interface StdControl; - provides interface Msp430UsciConfigure[ uint8_t client ]; + provides interface Msp430UsciConfigure; uses interface Resource; } @@ -70,7 +73,7 @@ implementation { event void Resource.granted() { } - async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration[uint8_t client] (){ + async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration(){ return &msp430_usci_uart_exp430_config; } } diff --git a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc index 68e9a60a97..32484b4c56 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc @@ -48,6 +48,11 @@ configuration PlatformUsciMapC { UartA1C.URXD -> GIO.UCA1RXD; UartA1C.UTXD -> GIO.UCA1TXD; + components Msp430UsciSpiA0P as SpiA0C; + SpiA0C.SIMO -> GIO.UCA0SIMO; + SpiA0C.SOMI -> GIO.UCA0SOMI; + SpiA0C.CLK -> GIO.UCA0CLK; + /*components Msp430UsciSpiB0P as SpiB0C;*/ /*SpiB0C.SIMO -> GIO.UCB0SIMO;*/ /*SpiB0C.SOMI -> GIO.UCB0SOMI;*/ From aabad3f461482a5c09560d72191772664ab766f4 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 9 Jul 2013 15:02:50 -0500 Subject: [PATCH 358/411] Added support for the CC1101 radio using the Blaze radio stack The Blaze radio stack is an effort to support various CCxx00 type radios in one stack. The project page can be found at http://docs.tinyos.net/tinywiki/index.php/CC1100/CC2500. The code has been integrated into this repository from tinyos-2.x-contrib/blaze --- tos/chips/ccxx00_single/Blaze.h | 248 ++++++++ tos/chips/ccxx00_single/BlazeC.nc | 184 ++++++ tos/chips/ccxx00_single/Fcf.h | 98 +++ tos/chips/ccxx00_single/README.txt | 38 ++ tos/chips/ccxx00_single/RadioStackPacket.h | 11 + .../acks/DynamicAcks/Acknowledgements.h | 48 ++ .../acks/DynamicAcks/AcknowledgementsC.nc | 86 +++ .../acks/DynamicAcks/AcknowledgementsP.nc | 271 ++++++++ .../acks/StaticAcks/Acknowledgements.h | 48 ++ .../acks/StaticAcks/AcknowledgementsC.nc | 87 +++ .../acks/StaticAcks/AcknowledgementsP.nc | 225 +++++++ .../ccxx00_single/alarm/AlarmMultiplexC.nc | 55 ++ .../ccxx00_single/am/BlazeActiveMessageC.nc | 87 +++ .../ccxx00_single/am/BlazeActiveMessageP.nc | 229 +++++++ .../ccxx00_single/am/queue/AMQueueEntryP.nc | 69 ++ .../ccxx00_single/am/queue/AMQueueImplP.nc | 171 +++++ tos/chips/ccxx00_single/am/queue/AMQueueP.nc | 51 ++ .../ccxx00_single/am/queue/AMReceiverC.nc | 49 ++ tos/chips/ccxx00_single/am/queue/AMSenderC.nc | 59 ++ .../ccxx00_single/am/queue/AMSnooperC.nc | 50 ++ .../am/queue/AMSnoopingReceiverC.nc | 51 ++ tos/chips/ccxx00_single/crc/PacketCrc.nc | 59 ++ tos/chips/ccxx00_single/crc/PacketCrcC.nc | 50 ++ tos/chips/ccxx00_single/crc/PacketCrcP.nc | 80 +++ tos/chips/ccxx00_single/csma/README.txt | 29 + .../ccxx00_single/csma/continuoussense/Csma.h | 62 ++ .../csma/continuoussense/CsmaC.nc | 123 ++++ .../csma/continuoussense/CsmaP.nc | 586 +++++++++++++++++ .../ccxx00_single/csma/singlesense/Csma.h | 49 ++ .../ccxx00_single/csma/singlesense/CsmaC.nc | 97 +++ .../ccxx00_single/csma/singlesense/CsmaP.nc | 399 ++++++++++++ tos/chips/ccxx00_single/init/BlazeInit.h | 43 ++ tos/chips/ccxx00_single/init/BlazeInitC.nc | 94 +++ tos/chips/ccxx00_single/init/BlazeInitP.nc | 311 +++++++++ .../ccxx00_single/init/Ccxx00PlatformInitC.nc | 66 ++ .../ccxx00_single/init/Ccxx00PlatformInitP.nc | 121 ++++ tos/chips/ccxx00_single/init/ReceiveMode.h | 43 ++ tos/chips/ccxx00_single/init/ReceiveMode.nc | 61 ++ tos/chips/ccxx00_single/init/ReceiveModeC.nc | 58 ++ .../ccxx00_single/interfaces/AckDetails.nc | 35 ++ .../ccxx00_single/interfaces/AckReceive.nc | 44 ++ .../interfaces/AckSendNotifier.nc | 12 + .../ccxx00_single/interfaces/AsyncSend.nc | 69 ++ tos/chips/ccxx00_single/interfaces/Backoff.nc | 71 +++ .../ccxx00_single/interfaces/BlazeCommit.nc | 49 ++ .../ccxx00_single/interfaces/BlazeConfig.nc | 137 ++++ .../ccxx00_single/interfaces/BlazeFifo.nc | 95 +++ .../ccxx00_single/interfaces/BlazePacket.nc | 66 ++ .../interfaces/BlazePacketBody.nc | 53 ++ .../interfaces/BlazeRegSettings.nc | 49 ++ .../ccxx00_single/interfaces/BlazeRegister.nc | 60 ++ .../interfaces/BlazeSpiPacket.nc | 74 +++ .../ccxx00_single/interfaces/BlazeStrobe.nc | 47 ++ .../ccxx00_single/interfaces/BlazeTransmit.nc | 99 +++ .../interfaces/ChipSpiResource.nc | 71 +++ tos/chips/ccxx00_single/interfaces/Csma.nc | 56 ++ .../interfaces/LowPowerListening.nc | 18 + .../ccxx00_single/interfaces/PacketLink.nc | 72 +++ .../ccxx00_single/interfaces/PowerNotifier.nc | 16 + .../ccxx00_single/interfaces/RadioInit.nc | 47 ++ .../ccxx00_single/interfaces/RadioSelect.nc | 59 ++ .../ccxx00_single/interfaces/RadioStatus.nc | 44 ++ .../ccxx00_single/interfaces/SendNotifier.nc | 61 ++ .../interfaces/SplitControlManager.nc | 63 ++ .../interfaces/SystemLowPowerListening.nc | 13 + .../interfaces/TrafficControl.nc | 57 ++ .../interfaces/TrafficPriority.nc | 58 ++ tos/chips/ccxx00_single/link/PacketLinkC.nc | 59 ++ .../ccxx00_single/link/PacketLinkDummyP.nc | 93 +++ tos/chips/ccxx00_single/link/readme.txt | 6 + .../ccxx00_single/lpl/alwayson/AlwaysOn.h | 49 ++ tos/chips/ccxx00_single/lpl/alwayson/LplC.nc | 71 +++ tos/chips/ccxx00_single/lpl/alwayson/LplP.nc | 84 +++ tos/chips/ccxx00_single/lpl/bmac/Lpl.h | 55 ++ tos/chips/ccxx00_single/lpl/bmac/LplC.nc | 82 +++ tos/chips/ccxx00_single/lpl/bmac/LplP.nc | 86 +++ tos/chips/ccxx00_single/lpl/bmac/PowerCycle.h | 57 ++ .../ccxx00_single/lpl/bmac/PowerCycle.nc | 51 ++ .../ccxx00_single/lpl/bmac/PowerCycleC.nc | 102 +++ .../ccxx00_single/lpl/bmac/PowerCycleP.nc | 594 ++++++++++++++++++ tos/chips/ccxx00_single/lpl/bmac/README.txt | 12 + tos/chips/ccxx00_single/lpl/boxmac/Boxmac.h | 15 + tos/chips/ccxx00_single/lpl/boxmac/BoxmacC.nc | 49 ++ tos/chips/ccxx00_single/lpl/boxmac/BoxmacP.nc | 63 ++ tos/chips/ccxx00_single/lpl/boxmac/README.txt | 88 +++ tos/chips/ccxx00_single/lpl/enddevice/LplC.nc | 81 +++ tos/chips/ccxx00_single/lpl/enddevice/LplP.nc | 267 ++++++++ .../ccxx00_single/packet/BlazePacketC.nc | 53 ++ .../ccxx00_single/packet/BlazePacketP.nc | 100 +++ .../powermanager/Ccxx00PowerManagerC.nc | 64 ++ .../powermanager/Ccxx00PowerManagerP.nc | 193 ++++++ .../ccxx00_single/radios/cc1100/CC1100.h | 370 +++++++++++ .../radios/cc1100/CC1100ControlC.nc | 82 +++ .../radios/cc1100/CC1100ControlP.nc | 370 +++++++++++ .../cc1100/CC1100_1.2kBaud_manchester.h | 357 +++++++++++ .../cc1100/CC1100_100kBaud_manchester.h | 357 +++++++++++ .../radios/cc1100/CC1100_10kBaud_MSK.h | 371 +++++++++++ .../radios/cc1100/CC1100_10kBaud_manchester.h | 371 +++++++++++ .../cc1100/CC1100_250kBaud_manchester.h | 359 +++++++++++ .../radios/cc1100/CC1100_26kBaud_MSK_915.h | 367 +++++++++++ .../cc1100/CC1100_38.4kBaud_manchester.h | 357 +++++++++++ .../radios/cc1100/CC1100_433MHz_150kBaud.h | 377 +++++++++++ .../CC1100_433MHz_2.4kBaud_manchester.h | 248 ++++++++ .../radios/cc1100/CC1100_500kBaud.h | 359 +++++++++++ .../cc1100/CC1100_76.8kBaud_manchester.h | 357 +++++++++++ .../CC1100_915MHz_10kBaud_FccCompliant.h | 248 ++++++++ .../ccxx00_single/radios/cc1100/README.txt | 5 + .../ccxx00_single/radios/cc2500/CC2500.h | 221 +++++++ .../radios/cc2500/CC2500ControlC.nc | 82 +++ .../radios/cc2500/CC2500ControlP.nc | 370 +++++++++++ .../cc2500/CC2500_1.2kBaud_manchester.h | 223 +++++++ .../radios/cc2500/CC2500_250kBaud.h | 223 +++++++ .../cc2500/CC2500_250kBaud_manchester.h | 223 +++++++ .../radios/cc2500/CC2500_500kBaud.h | 223 +++++++ .../ccxx00_single/radios/cc2500/README.txt | 5 + .../ccxx00_single/receive/BlazeReceiveC.nc | 107 ++++ .../ccxx00_single/receive/BlazeReceiveP.nc | 468 ++++++++++++++ .../ccxx00_single/select/RadioSelectC.nc | 77 +++ .../ccxx00_single/select/RadioSelectDummyP.nc | 65 ++ .../ccxx00_single/spi/BlazeCentralWiringC.nc | 85 +++ tos/chips/ccxx00_single/spi/BlazeSpiC.nc | 231 +++++++ tos/chips/ccxx00_single/spi/BlazeSpiP.nc | 376 +++++++++++ .../ccxx00_single/spi/BlazeSpiResource.h | 42 ++ .../ccxx00_single/spi/BlazeSpiResourceC.nc | 59 ++ tos/chips/ccxx00_single/spi/BlazeSpiWireC.nc | 71 +++ .../splitcontrolmanager/SplitControlManager.h | 43 ++ .../SplitControlManagerC.nc | 82 +++ .../SplitControlManagerP.nc | 160 +++++ .../ccxx00_single/traffic/TrafficControl.h | 62 ++ .../ccxx00_single/traffic/TrafficControlC.nc | 59 ++ .../traffic/TrafficControlDummyP.nc | 62 ++ .../ccxx00_single/transmit/BlazeTransmit.h | 38 ++ .../ccxx00_single/transmit/BlazeTransmitC.nc | 101 +++ .../ccxx00_single/transmit/BlazeTransmitP.nc | 366 +++++++++++ .../ccxx00_single/unique/DummyReceiveP.nc | 44 ++ .../ccxx00_single/unique/UniqueReceive.h | 48 ++ .../ccxx00_single/unique/UniqueReceiveC.nc | 77 +++ .../ccxx00_single/unique/UniqueReceiveP.nc | 161 +++++ tos/lib/crcx/Crc16C.nc | 47 ++ tos/lib/crcx/Crc16P.nc | 133 ++++ tos/lib/crcx/Crc32C.nc | 45 ++ tos/lib/crcx/Crc32P.nc | 307 +++++++++ tos/lib/crcx/CrcX.nc | 45 ++ tos/lib/crcx/Makefile | 6 + tos/lib/crcx/TestC.nc | 48 ++ tos/lib/crcx/TestP.nc | 65 ++ tos/lib/crcx/crc.py | 183 ++++++ tos/platforms/exp430/.platform | 30 +- tos/platforms/exp430/ActiveMessageC.nc | 52 ++ tos/platforms/exp430/chips/ccxx00/DummyIoP.nc | 44 ++ .../exp430/chips/ccxx00/HplCC1100PinsC.nc | 109 ++++ .../exp430/chips/ccxx00/HplRadioAlarmC.nc | 17 + .../exp430/chips/ccxx00/HplRadioSpiC.nc | 21 + .../exp430/chips/ccxx00/HplRadioSpiP.nc | 19 + .../exp430/hardware/usci/PlatformUsciMapC.nc | 16 +- tos/platforms/exp430/platform_message.h | 60 +- 156 files changed, 19131 insertions(+), 40 deletions(-) create mode 100644 tos/chips/ccxx00_single/Blaze.h create mode 100644 tos/chips/ccxx00_single/BlazeC.nc create mode 100644 tos/chips/ccxx00_single/Fcf.h create mode 100644 tos/chips/ccxx00_single/README.txt create mode 100644 tos/chips/ccxx00_single/RadioStackPacket.h create mode 100644 tos/chips/ccxx00_single/acks/DynamicAcks/Acknowledgements.h create mode 100644 tos/chips/ccxx00_single/acks/DynamicAcks/AcknowledgementsC.nc create mode 100644 tos/chips/ccxx00_single/acks/DynamicAcks/AcknowledgementsP.nc create mode 100644 tos/chips/ccxx00_single/acks/StaticAcks/Acknowledgements.h create mode 100644 tos/chips/ccxx00_single/acks/StaticAcks/AcknowledgementsC.nc create mode 100644 tos/chips/ccxx00_single/acks/StaticAcks/AcknowledgementsP.nc create mode 100644 tos/chips/ccxx00_single/alarm/AlarmMultiplexC.nc create mode 100644 tos/chips/ccxx00_single/am/BlazeActiveMessageC.nc create mode 100644 tos/chips/ccxx00_single/am/BlazeActiveMessageP.nc create mode 100644 tos/chips/ccxx00_single/am/queue/AMQueueEntryP.nc create mode 100644 tos/chips/ccxx00_single/am/queue/AMQueueImplP.nc create mode 100644 tos/chips/ccxx00_single/am/queue/AMQueueP.nc create mode 100644 tos/chips/ccxx00_single/am/queue/AMReceiverC.nc create mode 100644 tos/chips/ccxx00_single/am/queue/AMSenderC.nc create mode 100644 tos/chips/ccxx00_single/am/queue/AMSnooperC.nc create mode 100644 tos/chips/ccxx00_single/am/queue/AMSnoopingReceiverC.nc create mode 100644 tos/chips/ccxx00_single/crc/PacketCrc.nc create mode 100644 tos/chips/ccxx00_single/crc/PacketCrcC.nc create mode 100644 tos/chips/ccxx00_single/crc/PacketCrcP.nc create mode 100644 tos/chips/ccxx00_single/csma/README.txt create mode 100644 tos/chips/ccxx00_single/csma/continuoussense/Csma.h create mode 100644 tos/chips/ccxx00_single/csma/continuoussense/CsmaC.nc create mode 100644 tos/chips/ccxx00_single/csma/continuoussense/CsmaP.nc create mode 100644 tos/chips/ccxx00_single/csma/singlesense/Csma.h create mode 100644 tos/chips/ccxx00_single/csma/singlesense/CsmaC.nc create mode 100644 tos/chips/ccxx00_single/csma/singlesense/CsmaP.nc create mode 100644 tos/chips/ccxx00_single/init/BlazeInit.h create mode 100644 tos/chips/ccxx00_single/init/BlazeInitC.nc create mode 100644 tos/chips/ccxx00_single/init/BlazeInitP.nc create mode 100644 tos/chips/ccxx00_single/init/Ccxx00PlatformInitC.nc create mode 100644 tos/chips/ccxx00_single/init/Ccxx00PlatformInitP.nc create mode 100644 tos/chips/ccxx00_single/init/ReceiveMode.h create mode 100644 tos/chips/ccxx00_single/init/ReceiveMode.nc create mode 100644 tos/chips/ccxx00_single/init/ReceiveModeC.nc create mode 100644 tos/chips/ccxx00_single/interfaces/AckDetails.nc create mode 100644 tos/chips/ccxx00_single/interfaces/AckReceive.nc create mode 100644 tos/chips/ccxx00_single/interfaces/AckSendNotifier.nc create mode 100644 tos/chips/ccxx00_single/interfaces/AsyncSend.nc create mode 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tos/chips/ccxx00_single/interfaces/PacketLink.nc create mode 100644 tos/chips/ccxx00_single/interfaces/PowerNotifier.nc create mode 100644 tos/chips/ccxx00_single/interfaces/RadioInit.nc create mode 100644 tos/chips/ccxx00_single/interfaces/RadioSelect.nc create mode 100644 tos/chips/ccxx00_single/interfaces/RadioStatus.nc create mode 100644 tos/chips/ccxx00_single/interfaces/SendNotifier.nc create mode 100644 tos/chips/ccxx00_single/interfaces/SplitControlManager.nc create mode 100644 tos/chips/ccxx00_single/interfaces/SystemLowPowerListening.nc create mode 100644 tos/chips/ccxx00_single/interfaces/TrafficControl.nc create mode 100644 tos/chips/ccxx00_single/interfaces/TrafficPriority.nc create mode 100644 tos/chips/ccxx00_single/link/PacketLinkC.nc create mode 100644 tos/chips/ccxx00_single/link/PacketLinkDummyP.nc create mode 100644 tos/chips/ccxx00_single/link/readme.txt create mode 100644 tos/chips/ccxx00_single/lpl/alwayson/AlwaysOn.h create mode 100644 tos/chips/ccxx00_single/lpl/alwayson/LplC.nc create mode 100644 tos/chips/ccxx00_single/lpl/alwayson/LplP.nc create mode 100644 tos/chips/ccxx00_single/lpl/bmac/Lpl.h create mode 100644 tos/chips/ccxx00_single/lpl/bmac/LplC.nc create mode 100644 tos/chips/ccxx00_single/lpl/bmac/LplP.nc create mode 100644 tos/chips/ccxx00_single/lpl/bmac/PowerCycle.h create mode 100644 tos/chips/ccxx00_single/lpl/bmac/PowerCycle.nc create mode 100644 tos/chips/ccxx00_single/lpl/bmac/PowerCycleC.nc create mode 100644 tos/chips/ccxx00_single/lpl/bmac/PowerCycleP.nc create mode 100644 tos/chips/ccxx00_single/lpl/bmac/README.txt create mode 100644 tos/chips/ccxx00_single/lpl/boxmac/Boxmac.h create mode 100644 tos/chips/ccxx00_single/lpl/boxmac/BoxmacC.nc create mode 100644 tos/chips/ccxx00_single/lpl/boxmac/BoxmacP.nc create mode 100644 tos/chips/ccxx00_single/lpl/boxmac/README.txt create mode 100644 tos/chips/ccxx00_single/lpl/enddevice/LplC.nc create mode 100644 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tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManager.h create mode 100644 tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManagerC.nc create mode 100644 tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManagerP.nc create mode 100644 tos/chips/ccxx00_single/traffic/TrafficControl.h create mode 100644 tos/chips/ccxx00_single/traffic/TrafficControlC.nc create mode 100644 tos/chips/ccxx00_single/traffic/TrafficControlDummyP.nc create mode 100644 tos/chips/ccxx00_single/transmit/BlazeTransmit.h create mode 100644 tos/chips/ccxx00_single/transmit/BlazeTransmitC.nc create mode 100644 tos/chips/ccxx00_single/transmit/BlazeTransmitP.nc create mode 100644 tos/chips/ccxx00_single/unique/DummyReceiveP.nc create mode 100644 tos/chips/ccxx00_single/unique/UniqueReceive.h create mode 100644 tos/chips/ccxx00_single/unique/UniqueReceiveC.nc create mode 100644 tos/chips/ccxx00_single/unique/UniqueReceiveP.nc create mode 100644 tos/lib/crcx/Crc16C.nc create mode 100644 tos/lib/crcx/Crc16P.nc create mode 100644 tos/lib/crcx/Crc32C.nc create mode 100644 tos/lib/crcx/Crc32P.nc create mode 100644 tos/lib/crcx/CrcX.nc create mode 100644 tos/lib/crcx/Makefile create mode 100644 tos/lib/crcx/TestC.nc create mode 100644 tos/lib/crcx/TestP.nc create mode 100644 tos/lib/crcx/crc.py create mode 100644 tos/platforms/exp430/ActiveMessageC.nc create mode 100644 tos/platforms/exp430/chips/ccxx00/DummyIoP.nc create mode 100644 tos/platforms/exp430/chips/ccxx00/HplCC1100PinsC.nc create mode 100644 tos/platforms/exp430/chips/ccxx00/HplRadioAlarmC.nc create mode 100644 tos/platforms/exp430/chips/ccxx00/HplRadioSpiC.nc create mode 100644 tos/platforms/exp430/chips/ccxx00/HplRadioSpiP.nc diff --git a/tos/chips/ccxx00_single/Blaze.h b/tos/chips/ccxx00_single/Blaze.h new file mode 100644 index 0000000000..ca6a57196c --- /dev/null +++ b/tos/chips/ccxx00_single/Blaze.h @@ -0,0 +1,248 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#ifndef __BLAZE_H__ +#define __BLAZE_H__ + + +#ifndef BLAZE_ENABLE_WHILE_LOOP_PRINTF +#define BLAZE_ENABLE_WHILE_LOOP_PRINTF 0 +#endif + +#ifndef BLAZE_ENABLE_WHILE_LOOP_LEDS +#define BLAZE_ENABLE_WHILE_LOOP_LEDS 0 +#endif + +#ifndef BLAZE_ENABLE_TIMING_LEDS +#define BLAZE_ENABLE_TIMING_LEDS 0 +#endif + +#ifndef BLAZE_CSMA_LEDS +#define BLAZE_CSMA_LEDS 0 +#endif + +#ifndef BLAZE_ENABLE_SPI_WOR_RX_LEDS +#define BLAZE_ENABLE_SPI_WOR_RX_LEDS 0 +#endif + +#ifndef BLAZE_ENABLE_LPL_LEDS +#define BLAZE_ENABLE_LPL_LEDS 0 +#endif + +#ifndef BLAZE_ENABLE_CRC_32 +#define BLAZE_ENABLE_CRC_32 1 +#endif + +#ifndef PRINTF_DUTY_CYCLE +#define PRINTF_DUTY_CYCLE 0 +#endif + +#ifndef PRINTF_ACKS +#define PRINTF_ACKS 0 +#endif + +typedef uint8_t blaze_status_t; +typedef uint8_t radio_id_t; + +/** + * Note that the first 8 bytes of the header are identical to the + * 8 bytes found in blaze_ack_t + */ +typedef nx_struct blaze_header_t { + nxle_uint8_t length; + nxle_uint16_t fcf; + nxle_uint8_t dsn; + nxle_uint16_t dest; + nxle_uint16_t src; + nxle_uint8_t destpan; + nxle_uint8_t type; +} blaze_header_t; + +typedef nx_struct blaze_footer_t { +#if BLAZE_ENABLE_CRC_32 + nx_uint32_t crc; +#endif +} blaze_footer_t; + +typedef nx_struct blaze_metadata_t { + nx_uint8_t rssi; + nx_uint8_t lqi; + nx_uint8_t radio; + nx_uint8_t maxRetries; + nx_uint16_t retryDelay; + nx_uint16_t rxInterval; +} blaze_metadata_t; + + +/** + * Acknowledgement frame structure. + */ +typedef nx_struct blaze_ack_t { + nxle_uint8_t length; + nxle_uint16_t fcf; + nxle_uint8_t dsn; + nxle_uint16_t dest; + nxle_uint16_t src; +} blaze_ack_t; + +enum { + // size of the header not including the length byte + MAC_HEADER_SIZE = sizeof( blaze_header_t ) - 1, + + // size of the footer + MAC_FOOTER_SIZE = sizeof( blaze_footer_t ), + + // size of the acknowledgement frame, not including the length byte + ACK_FRAME_LENGTH = sizeof( blaze_ack_t ) - 1, +}; + + +enum blaze_cmd_strobe_enums { + + BLAZE_SRES = 0x30, + BLAZE_SFSTXON = 0x31, + BLAZE_SXOFF = 0x32, + BLAZE_SCAL = 0x33, + BLAZE_SRX = 0x34, + BLAZE_STX = 0x35, + BLAZE_SIDLE = 0x36, + BLAZE_SWOR = 0x38, + BLAZE_SPWD = 0x39, + BLAZE_SFRX = 0x3A, + BLAZE_SFTX = 0x3B, + BLAZE_SWORRST = 0x3C, + BLAZE_SNOP = 0x3D, + +}; + +enum blaze_addr_enums { + + BLAZE_PATABLE = 0x3E, + BLAZE_TXFIFO = 0x3F, + BLAZE_RXFIFO = 0xBF, + +}; + +enum blaze_state_enums{ + + BLAZE_S_IDLE = 0x00, + BLAZE_S_RX = 0x01, + BLAZE_S_TX = 0x02, + BLAZE_S_FSTXON = 0x03, + BLAZE_S_CALIBRATE = 0x04, + BLAZE_S_SETTLING = 0x05, + BLAZE_S_RXFIFO_OVERFLOW = 0x06, + BLAZE_S_TXFIFO_UNDERFLOW = 0x07, + +}; + +enum blaze_mask_enums { + + BLAZE_WRITE = 0x00, + BLAZE_READ = 0x80, + BLAZE_SINGLE = 0x00, + BLAZE_BURST = 0x40, +}; + +enum blaze_config_reg_addr_enums { + + BLAZE_IOCFG2 = 0x00, + BLAZE_IOCFG1 = 0x01, + BLAZE_IOCFG0 = 0x02, + BLAZE_FIFOTHR = 0x03, + BLAZE_SYNC1 = 0x04, + BLAZE_SYNC0 = 0x05, + BLAZE_PKTLEN = 0x06, + BLAZE_PKTCTRL1 = 0x07, + BLAZE_PKTCTRL0 = 0x08, + BLAZE_ADDR = 0x09, + BLAZE_CHANNR = 0x0A, + BLAZE_FSCTRL1 = 0x0B, + BLAZE_FSCTRL0 = 0x0C, + BLAZE_FREQ2 = 0x0D, + BLAZE_FREQ1 = 0x0E, + BLAZE_FREQ0 = 0x0F, + BLAZE_MDMCFG4 = 0x10, + BLAZE_MDMCFG3 = 0x11, + BLAZE_MDMCFG2 = 0x12, + BLAZE_MDMCFG1 = 0x13, + BLAZE_MDMCFG0 = 0x14, + BLAZE_DEVIATN = 0x15, + BLAZE_MCSM2 = 0x16, + BLAZE_MCSM1 = 0x17, + BLAZE_MCSM0 = 0x18, + BLAZE_FOCCFG = 0x19, + BLAZE_BSCFG = 0x1A, + BLAZE_AGCTRL2 = 0x1B, + BLAZE_AGCTRL1 = 0x1C, + BLAZE_AGCTRL0 = 0x1D, + BLAZE_WOREVT1 = 0x1E, + BLAZE_WOREVT0 = 0x1F, + BLAZE_WORCTRL = 0x20, + BLAZE_FREND1 = 0x21, + BLAZE_FREND0 = 0x22, + BLAZE_FSCAL3 = 0x23, + BLAZE_FSCAL2 = 0x24, + BLAZE_FSCAL1 = 0x25, + BLAZE_FSCAL0 = 0x26, + BLAZE_RCCTRL1 = 0x27, + BLAZE_RCCTRL0 = 0x28, + BLAZE_FSTEST = 0x29, + BLAZE_PTEST = 0x2A, + BLAZE_AGCTEST = 0x2B, + BLAZE_TEST2 = 0x2C, + BLAZE_TEST1 = 0x2D, + BLAZE_TEST0 = 0x2E, + BLAZE_PARTNUM = 0x30 | BLAZE_BURST, + BLAZE_VERSION = 0x31 | BLAZE_BURST, + BLAZE_FREQEST = 0x32 | BLAZE_BURST, + BLAZE_LQI = 0x33 | BLAZE_BURST, + BLAZE_RSSI = 0x34 | BLAZE_BURST, + BLAZE_MARCSTATE = 0x35 | BLAZE_BURST, + BLAZE_WORTIME1 = 0x36 | BLAZE_BURST, + BLAZE_WORTIME0 = 0x37 | BLAZE_BURST, + BLAZE_PKSTATUS = 0x38 | BLAZE_BURST, + BLAZE_VCO_VC_DAC = 0x39 | BLAZE_BURST, + BLAZE_TXBYTES = 0x3A | BLAZE_BURST, + BLAZE_RXBYTES = 0x3B | BLAZE_BURST, + +}; + + +#ifndef UQ_BLAZE_RADIO +#define UQ_BLAZE_RADIO "Unique_Blaze_Radio" +#endif + + +#endif + + + diff --git a/tos/chips/ccxx00_single/BlazeC.nc b/tos/chips/ccxx00_single/BlazeC.nc new file mode 100644 index 0000000000..c18959037a --- /dev/null +++ b/tos/chips/ccxx00_single/BlazeC.nc @@ -0,0 +1,184 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Main entry point and wiring of all layers for the Blaze Radio. + * The platform's ActiveMessageC.nc should define at least one primary radio the + * platform contains. Radios can be added in by including either + * CC1100ControlC or CC2500ControlC in any configuration file included + * at compile time. + * @author David Moss + */ + +#include "Blaze.h" +#include "message.h" +#include "RadioStackPacket.h" + + +configuration BlazeC { + + provides { + /** Turn the default radio on and off, backwards compatible */ + interface SplitControl; + + /** Send a packet */ + interface AMSend[am_id_t amId]; + + /** Notification that a packet is about to be transmitted */ + interface SendNotifier[am_id_t amId]; + + /** Receive a packet */ + interface Receive[am_id_t amId]; + + /** Sniff packets that don't belong to our node */ + interface Receive as Snoop[am_id_t amId]; + + /** Get source / destination / etc. properties for a packet */ + interface AMPacket; + + /** Get payload information about a packet */ + interface Packet; + + /** Access internal Blaze-specific properties of a packet */ + interface BlazePacket; + + /** Layer 2 packet link functionality, more reliable transmissions */ + interface PacketLink; + + /** Request and check acknowledgements */ + interface PacketAcknowledgements; + + /** Configure CSMA properties, like backoff and clear channel assessments */ + interface Csma[am_id_t amId]; + + /** Configure the initial backoff for CSMA */ + interface Backoff as InitialBackoff[am_id_t amId]; + + /** Configure the congestion backoff for CSMA */ + interface Backoff as CongestionBackoff[am_id_t amId]; + + /** Configure low power listening settings */ + interface LowPowerListening; + + /** Configure the system-wide low power listening settings */ + interface SystemLowPowerListening; + + /** Traffic Control to avoid network congestion */ + interface TrafficControl; + + /** Traffic Priority to give some packets faster access to the channel */ + interface TrafficPriority[am_id_t amId]; + + /** CTP Required Interface */ + interface LinkPacketMetadata; + + /** AckSendNotifier Interface to change the ack being sent */ + interface AckSendNotifier[am_addr_t destination]; + + + /***************** Multiple Radio Options ****************/ + /** Multiple Radio Split Control */ + interface SplitControl as BlazeSplitControl[radio_id_t radioId]; + + /** Radio Select, used for a multiple radio CCxx00 driver option */ + interface RadioSelect; + } +} + +implementation { + + components BlazeActiveMessageC; + AMPacket = BlazeActiveMessageC; + Packet = BlazeActiveMessageC; + SendNotifier = BlazeActiveMessageC; + LinkPacketMetadata = BlazeActiveMessageC; + + components RadioSelectC; + BlazeSplitControl = RadioSelectC; + RadioSelect = RadioSelectC; + + components BlazePacketC; + BlazePacket = BlazePacketC; + + components PacketLinkC; + PacketLink = PacketLinkC; + + components LplC; + LowPowerListening = LplC; + SystemLowPowerListening = LplC; + + components AcknowledgementsC; + PacketAcknowledgements = AcknowledgementsC; + + components CsmaC; + Csma = CsmaC; + InitialBackoff = CsmaC.InitialBackoff; + CongestionBackoff = CsmaC.CongestionBackoff; + + components BlazeReceiveC; + AckSendNotifier = BlazeReceiveC.AckSendNotifier; + + components TrafficControlC; + TrafficControl = TrafficControlC; + TrafficPriority = TrafficControlC; + + components SplitControlManagerC; + components Ccxx00PowerManagerC; + components UniqueReceiveC; + components BlazeInitC; + components BlazeTransmitC; + components Ccxx00PlatformInitC; + + /***************** Send Layers ****************/ + AMSend = BlazeActiveMessageC; + BlazeActiveMessageC.SubSend -> TrafficControlC.Send; + TrafficControlC.SubSend -> RadioSelectC.Send; + RadioSelectC.SubSend -> SplitControlManagerC.Send; + SplitControlManagerC.SubSend -> PacketLinkC.Send; + PacketLinkC.SubSend -> LplC.Send; + LplC.SubSend -> AcknowledgementsC.Send; + AcknowledgementsC.SubSend -> CsmaC; + + /***************** Receive Layers ****************/ + Receive = BlazeActiveMessageC.Receive; + Snoop = BlazeActiveMessageC.Snoop; + BlazeActiveMessageC.SubReceive -> RadioSelectC.Receive; + RadioSelectC.SubReceive -> UniqueReceiveC.Receive; + UniqueReceiveC.SubReceive -> LplC.Receive; + LplC.SubReceive -> BlazeReceiveC.Receive; + + /***************** SplitControl Layers ****************/ + SplitControl = RadioSelectC.SplitControl; + RadioSelectC.SubControl -> SplitControlManagerC.SplitControl; + SplitControlManagerC.SubControl -> LplC.SplitControl; + LplC.SubControl -> Ccxx00PowerManagerC.SplitControl; + +} diff --git a/tos/chips/ccxx00_single/Fcf.h b/tos/chips/ccxx00_single/Fcf.h new file mode 100644 index 0000000000..d6bb1e5b4d --- /dev/null +++ b/tos/chips/ccxx00_single/Fcf.h @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Jonathan Hui + * @author David Moss + */ + +#ifndef FCF_H +#define FCF_H + +/** + * FCF 2006 + * bits: 0-1 2 3 4 5 6 7 8-9 10-11 12-13 14-15 + * Frame Type sFCF=0 Security Frame Pending ACK request PANId Compression Reserved Reserved Dest. Addressing Mode Frame Version Source Addressing Mode + */ + +/** + * sFCF + * bits: 0-1 2 3 4 5 6 7 + * Frame Type sFCF=1 Security Frame Pending ACK request Reserved Reserved + */ + + +typedef struct fcf_t { + uint8_t frameType : 2; + bool sFcf : 1; + bool security : 1; + bool framePending : 1; + bool ackRequest : 1; + bool panIdCompression : 1; + bool reserved0 : 1; + uint8_t reserved1 : 2; + uint8_t destAddressMode : 2; + uint8_t frameVersion : 2; + uint8_t srcAddressMode : 2; +} fcf_t; + +typedef struct sfcf_t { + uint8_t frameType : 2; + bool sFcf : 1; + bool security : 1; + bool framePending : 1; + bool ackRequest : 1; + bool reserved : 1; + bool frameVersion : 1; +} sfcf_t; + +/** + * This defines the bit-fields of our CCxx00 FCF byte + */ +enum fcf_enums { + FCF_FRAME_TYPE = 0, + FCF_SECURITY_ENABLED = 2, + FCF_FRAME_PENDING = 3, + FCF_ACK_REQ = 4, +}; + +enum frame_type_enums { + FRAME_TYPE_DATA = 0, + FRAME_TYPE_ACK = 1, +}; + +enum iee154_fcf_addr_mode_enums { + IEEE154_ADDR_NONE = 0, + IEEE154_ADDR_SHORT = 2, + IEEE154_ADDR_EXT = 3, +}; + +#endif diff --git a/tos/chips/ccxx00_single/README.txt b/tos/chips/ccxx00_single/README.txt new file mode 100644 index 0000000000..a28fa677c7 --- /dev/null +++ b/tos/chips/ccxx00_single/README.txt @@ -0,0 +1,38 @@ +This Radio stack was obtained from tinyox-2.x-contrib/blaze + +Documentation is located in the TinyOS documentation website: +http://docs.tinyos.net/index.php/CC1100/CC2500 + +This radio stack requires fast SPI bus access. For MSP430 platforms, that +means compiling your applications with: + + CFLAGS+=-DENABLE_SPI0_DMA + +This radio stack was developed and funded by Rincon Research Corporation. + + +________________________________________________________________________________ +Notes on Throughput: + +Throughput is limited by a few elements in the radio stack, the most notable of +which is the CSMA layer. The continuous CSMA and acknowledgment layers have been +carefully constructed to support fair channel utilization in a BMAC type low +power strategy. + +If your application requires very fast throughput: + * Modify Csma.h: + >> Decrease BLAZE_MIN_INITIAL_BACKOFF to something like 100 + >> Decrease BLAZE_MIN_BACKOFF to something like 10 + >> We used a logic analyzer and several nodes to make sure there were + no collisions and the channel was being shared fairly. + + * Modify AcknowledgmentsP: + >> In AckReceive.receive(), uncomment the code that stops the AckWaitTimer. + This will allow the acknowledgment layer to exit as soon as an ack is + available. + +Making these types of changes will increase throughput at the expense of a +single node possibly capturing the channel for longer periods of time than it +should. Experimentation is necessary in all cases. +________________________________________________________________________________ + diff --git a/tos/chips/ccxx00_single/RadioStackPacket.h b/tos/chips/ccxx00_single/RadioStackPacket.h new file mode 100644 index 0000000000..c972ea1cf3 --- /dev/null +++ b/tos/chips/ccxx00_single/RadioStackPacket.h @@ -0,0 +1,11 @@ + +#ifndef RADIOSTACKPACKET_H +#define RADIOSTACKPACKET_H + +#include "message.h" + +/** The message pointer passed around every layer in the radio stack */ +message_t *RADIO_STACK_PACKET; + + +#endif diff --git a/tos/chips/ccxx00_single/acks/DynamicAcks/Acknowledgements.h b/tos/chips/ccxx00_single/acks/DynamicAcks/Acknowledgements.h new file mode 100644 index 0000000000..efb62fb8c7 --- /dev/null +++ b/tos/chips/ccxx00_single/acks/DynamicAcks/Acknowledgements.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ +#ifndef ACKNOWLEDGEMENTS_H +#define ACKNOWLEDGEMENTS_H + +/** + * This number was determined in a network of 3 transmitters sending + * packets a maximum speed to a single receiver. + * Acknowledgement success rate was found to be between 79-89%. + */ +#ifndef BLAZE_ACK_WAIT +#define BLAZE_ACK_WAIT 1500 +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/acks/DynamicAcks/AcknowledgementsC.nc b/tos/chips/ccxx00_single/acks/DynamicAcks/AcknowledgementsC.nc new file mode 100644 index 0000000000..2e880c251d --- /dev/null +++ b/tos/chips/ccxx00_single/acks/DynamicAcks/AcknowledgementsC.nc @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Blaze.h" + +/** + * This layer combines the Send command with the SubAckReceive event + * from the asynchronous portion of the receive stack. It also provides + * the PacketAcknowledgement interface + * + * Above this layer, nothing should be asynchronous context + * Below this layer should be CSMA + * + * 'Acknowledgment' is how it's spelled in the U.S. + * 'Acknowledgement' is British. + * Since TinyOS has a PacketAcknowledgement interface, this will be the + * Acknowledgement component to keep things consistent. + * + * @author David Moss + */ +configuration AcknowledgementsC { + provides { + interface Send; + interface AckReceive; + interface AckDetails; + interface PacketAcknowledgements; + } + + uses { + interface Send as SubSend; + } +} + +implementation { + + components AcknowledgementsP; + Send = AcknowledgementsP; + PacketAcknowledgements = AcknowledgementsP; + SubSend = AcknowledgementsP; + AckReceive = AcknowledgementsP; + AckDetails = AcknowledgementsP; + + components BlazeSpiC; + AcknowledgementsP.ChipSpiResource -> BlazeSpiC; + + components BlazePacketC; + AcknowledgementsP.BlazePacketBody -> BlazePacketC; + + components new AlarmMultiplexC(); + AcknowledgementsP.AckWaitTimer -> AlarmMultiplexC; + + components BlazeReceiveC; + AcknowledgementsP.SubAckReceive -> BlazeReceiveC; + + components LedsC; + AcknowledgementsP.Leds -> LedsC; + +} diff --git a/tos/chips/ccxx00_single/acks/DynamicAcks/AcknowledgementsP.nc b/tos/chips/ccxx00_single/acks/DynamicAcks/AcknowledgementsP.nc new file mode 100644 index 0000000000..8cb8439ef7 --- /dev/null +++ b/tos/chips/ccxx00_single/acks/DynamicAcks/AcknowledgementsP.nc @@ -0,0 +1,271 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Blaze.h" +#include "Acknowledgements.h" +#include "Fcf.h" + +/** + * This module takes care of manipulating the FCF byte to specify the + * type of outbound packet. It also manipulates the FCF byte to include + * acknowledgements, and waits for an acknowledgement before signaling + * sendDone() if it needs to. + * + * Acknowledgments MUST be checked immediately at sendDone() before + * the next packet is sent since we don't allocate space in the message_t + * to store the wasAcked boolean. If we need to store each ack response + * in the message, the FCF byte would be the place to do it. + * + * @author David Moss + */ + +module AcknowledgementsP { + provides { + interface Send; + interface AckDetails; + interface PacketAcknowledgements; + interface AckReceive; + } + + uses { + interface BlazePacketBody; + interface Send as SubSend; + interface ChipSpiResource; + interface Alarm as AckWaitTimer; + interface AckReceive as SubAckReceive; + + interface Leds; + } +} + +implementation { + + enum { + S_IDLE, + S_SENDING_ACK, + S_SENDING_NOACK, + S_ACK_WAIT, + S_SEND_DONE, + }; + + + /** Need a state to know if the timer fire is ours, and for Chip SPI abort */ + uint8_t state = S_IDLE; + + /** TRUE if the current message was acknowledged */ + bool wasAcked; + + + /***************** Prototypes ****************/ + task void sendDone(); + + /***************** Send Commands ****************/ + /** + * By this point, the length should already be set in the message itself. + * @param msg the message to send + * @param len IGNORED + * @return SUCCESS if we're going to try to send the message. + * FAIL if you need to reevaluate your code + */ + command error_t Send.send(message_t* msg, uint8_t len) { + error_t error; + uint8_t myState; + atomic myState = state; + + if(myState != S_IDLE) { + // Still waiting for the last ack + return EBUSY; + } + + if(((call BlazePacketBody.getHeader(msg))->fcf >> FCF_ACK_REQ) & 0x1) { + atomic state = S_SENDING_ACK; + + } else { + atomic state = S_SENDING_NOACK; + } + + (call BlazePacketBody.getHeader(msg))->fcf |= + ( FRAME_TYPE_DATA << FCF_FRAME_TYPE ); + + wasAcked = FALSE; + + error = call SubSend.send(RADIO_STACK_PACKET, len); + + if(error != SUCCESS) { + atomic state = S_IDLE; + } + + return error; + } + + command error_t Send.cancel(message_t* msg) { + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { + return call SubSend.maxPayloadLength(); + } + + command void *Send.getPayload(message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + + /***************** PacketAcknowledgements Commands ****************/ + async command error_t PacketAcknowledgements.requestAck( message_t *msg ) { + (call BlazePacketBody.getHeader( msg ))->fcf |= 1 << FCF_ACK_REQ; + return SUCCESS; + } + + async command error_t PacketAcknowledgements.noAck( message_t *msg ) { + (call BlazePacketBody.getHeader( msg ))->fcf &= ~(1 << FCF_ACK_REQ); + return SUCCESS; + } + + /** + * Note we do not store the acknowledgment inside the message_t struct. + * You must call wasAcked() during sendDone() before the next message is + * sent for it to be valid. + */ + async command bool PacketAcknowledgements.wasAcked(message_t *msg) { + return wasAcked; + //return (((call BlazePacketBody.getHeader( msg ))->fcf) >> FCF_ACK_RETRIEVED) & 0x1; + } + + /***************** AckDetails Commands ***************/ + async command bool AckDetails.shouldAck(message_t *msg) { + blaze_header_t *header = call BlazePacketBody.getHeader(msg); + return ((( header->fcf >> FCF_ACK_REQ ) & 0x01) == 1) + && (header->dest != AM_BROADCAST_ADDR); + } + + /***************** BackoffTimer Events ****************/ + async event void AckWaitTimer.fired() { + uint8_t myState; + atomic myState = state; + if(myState == S_ACK_WAIT) { + // Our ack wait period expired with no luck... + atomic state = S_SEND_DONE; + call ChipSpiResource.attemptRelease(); + post sendDone(); + } + } + + + /***************** SubSend Events ****************/ + event void SubSend.sendDone(message_t *msg, error_t error) { + uint8_t myState; + atomic myState = state; + if(myState == S_SENDING_NOACK) { + post sendDone(); + + } else if(myState == S_SENDING_ACK) { + atomic state = S_ACK_WAIT; + call AckWaitTimer.start(BLAZE_ACK_WAIT); + + } + } + + /***************** SubAckReceive Events ****************/ + async event void SubAckReceive.receive( blaze_ack_t *ack ) { + blaze_header_t *header = call BlazePacketBody.getHeader(RADIO_STACK_PACKET); + + if(state == S_ACK_WAIT) { + if((ack->dest == header->src || ack->dest == AM_BROADCAST_ADDR) && + ack->src == header->dest && + ack->dsn == header->dsn) { + + wasAcked = TRUE; + + signal AckReceive.receive(ack); + + /** + * The rest of this would speed up the amount of time it takes to send + * the next packet. But it also makes channel sharing unfair, because + * other nodes are waiting to use the channel. You can put this back in + * and let one node capture the channel for a short period of time, + * but I'll take it out to let the nodes share the channel fairly. + + atomic state = S_SEND_DONE; + call AckWaitTimer.stop(); + call ChipSpiResource.attemptRelease(); + post sendDone(); + */ + + } + } + } + + /***************** ChipSpiResource Events ***************/ + /** + * The SPI bus is about to be automatically released. Modules that aren't + * using the SPI bus but still want the SPI bus to stick around must call + * abortRelease() within the event. + */ + async event void ChipSpiResource.releasing() { + uint8_t myState; + atomic myState = state; + + if(myState == S_SENDING_ACK || myState == S_ACK_WAIT) { + // Csma is trying to release the SPI bus. Let the chip own the SPI bus + // so it's immediately available when Receive needs it. + call ChipSpiResource.abortRelease(); + } + } + + /***************** Tasks ****************/ + task void sendDone() { + atomic state = S_IDLE; + signal Send.sendDone(RADIO_STACK_PACKET, SUCCESS); + } + + /***************** Defaults ****************/ + default command error_t SubSend.send(message_t* msg, uint8_t len) { + return EINVAL; + } + + default command error_t SubSend.cancel(message_t* msg) { + return EINVAL; + } + + default command uint8_t SubSend.maxPayloadLength() { + return 0; + } + + default command void *SubSend.getPayload(message_t* msg, uint8_t len) { + return NULL; + } + + default event void Send.sendDone(message_t *msg, error_t error) { + } + + default async event void AckReceive.receive( blaze_ack_t *ack) { } + +} diff --git a/tos/chips/ccxx00_single/acks/StaticAcks/Acknowledgements.h b/tos/chips/ccxx00_single/acks/StaticAcks/Acknowledgements.h new file mode 100644 index 0000000000..efb62fb8c7 --- /dev/null +++ b/tos/chips/ccxx00_single/acks/StaticAcks/Acknowledgements.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ +#ifndef ACKNOWLEDGEMENTS_H +#define ACKNOWLEDGEMENTS_H + +/** + * This number was determined in a network of 3 transmitters sending + * packets a maximum speed to a single receiver. + * Acknowledgement success rate was found to be between 79-89%. + */ +#ifndef BLAZE_ACK_WAIT +#define BLAZE_ACK_WAIT 1500 +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/acks/StaticAcks/AcknowledgementsC.nc b/tos/chips/ccxx00_single/acks/StaticAcks/AcknowledgementsC.nc new file mode 100644 index 0000000000..c81dc1930d --- /dev/null +++ b/tos/chips/ccxx00_single/acks/StaticAcks/AcknowledgementsC.nc @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Blaze.h" + +/** + * This layer combines the Send command with the SubAckReceive event + * from the asynchronous portion of the receive stack. It also provides + * the PacketAcknowledgement interface + * + * Above this layer, nothing should be asynchronous context + * Below this layer should be CSMA + * + * 'Acknowledgment' is how it's spelled in the U.S. + * 'Acknowledgement' is British. + * Since TinyOS has a PacketAcknowledgement interface, this will be the + * Acknowledgement component to keep things consistent. + * + * @author David Moss + */ +configuration AcknowledgementsC { + provides { + interface Send; + interface AckDetails; + interface AckReceive; + interface PacketAcknowledgements; + + } + + uses { + interface Send as SubSend; + } +} + +implementation { + + components AcknowledgementsP; + Send = AcknowledgementsP; + PacketAcknowledgements = AcknowledgementsP; + SubSend = AcknowledgementsP; + AckReceive = AcknowledgementsP; + AckDetails = AcknowledgementsP; + + components BlazeSpiC; + AcknowledgementsP.ChipSpiResource -> BlazeSpiC; + + components BlazePacketC; + AcknowledgementsP.BlazePacketBody -> BlazePacketC; + + components new AlarmMultiplexC(); + AcknowledgementsP.AckWaitTimer -> AlarmMultiplexC; + + components BlazeReceiveC; + AcknowledgementsP.SubAckReceive -> BlazeReceiveC; + + components LedsC; + AcknowledgementsP.Leds -> LedsC; + +} diff --git a/tos/chips/ccxx00_single/acks/StaticAcks/AcknowledgementsP.nc b/tos/chips/ccxx00_single/acks/StaticAcks/AcknowledgementsP.nc new file mode 100644 index 0000000000..5dd63124e5 --- /dev/null +++ b/tos/chips/ccxx00_single/acks/StaticAcks/AcknowledgementsP.nc @@ -0,0 +1,225 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Blaze.h" +#include "Acknowledgements.h" +#include "Fcf.h" +#include "RadioStackPacket.h" + +/** + * This module takes care of manipulating the FCF byte to specify the + * type of outbound packet. It also manipulates the FCF byte to include + * acknowledgements, and waits for an acknowledgement before signaling + * sendDone() if it needs to. + * + * Acknowledgments MUST be checked immediately at sendDone() before + * the next packet is sent since we don't allocate space in the message_t + * to store the wasAcked boolean. If we need to store each ack response + * in the message, the FCF byte would be the place to do it. + * + * @author David Moss + */ + +module AcknowledgementsP { + provides { + interface Send; + interface AckDetails; + interface PacketAcknowledgements; + interface AckReceive; + } + + uses { + interface BlazePacketBody; + interface Send as SubSend; + interface ChipSpiResource; + interface Alarm as AckWaitTimer; + interface AckReceive as SubAckReceive; + + interface Leds; + } +} + +implementation { + + enum { + S_IDLE, + S_SENDING_ACK, + S_ACK_WAIT, + S_SEND_DONE, + }; + + + /** Need a state to know if the timer fire is ours, and for Chip SPI abort */ + norace uint8_t state = S_IDLE; + + /** TRUE if the current message was acknowledged */ + bool wasAcked; + + + /***************** Prototypes ****************/ + task void sendDone(); + + /***************** Send Commands ****************/ + /** + * By this point, the length should already be set in the message itself. + * @param msg the message to send + * @param len IGNORED + * @return SUCCESS if we're going to try to send the message. + * FAIL if you need to reevaluate your code + */ + command error_t Send.send(message_t* msg, uint8_t len) { + error_t error; + + if(state != S_IDLE) { + // Still waiting for the last ack + return EBUSY; + } + + call PacketAcknowledgements.requestAck(RADIO_STACK_PACKET); + + (call BlazePacketBody.getHeader(msg))->fcf |= ( FRAME_TYPE_DATA << FCF_FRAME_TYPE ); + + wasAcked = FALSE; + + if((error = call SubSend.send(RADIO_STACK_PACKET, len)) != SUCCESS) { + atomic state = S_IDLE; + } + + return error; + } + + command error_t Send.cancel(message_t* msg) { + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { + return call SubSend.maxPayloadLength(); + } + + command void *Send.getPayload(message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + + /***************** PacketAcknowledgements Commands ****************/ + async command error_t PacketAcknowledgements.requestAck( message_t *msg ) { + (call BlazePacketBody.getHeader( msg ))->fcf |= 1 << FCF_ACK_REQ; + return SUCCESS; + } + + async command error_t PacketAcknowledgements.noAck( message_t *msg ) { + return FAIL; + } + + async command bool PacketAcknowledgements.wasAcked(message_t *msg) { + return wasAcked; + } + + + /***************** AckDetails Commands ****************/ + async command bool AckDetails.shouldAck(message_t *msg) { + blaze_header_t *header = call BlazePacketBody.getHeader(msg); + return ((( header->fcf >> FCF_ACK_REQ ) & 0x01) == 1) + && (header->dest != AM_BROADCAST_ADDR); + } + + + /***************** BackoffTimer Events ****************/ + async event void AckWaitTimer.fired() { + // Our ack wait period expired with no luck... + atomic state = S_SEND_DONE; + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led1Off(); +#endif + + call ChipSpiResource.attemptRelease(); + post sendDone(); + } + + + /***************** SubSend Events ****************/ + event void SubSend.sendDone(message_t *msg, error_t error) { + atomic state = S_ACK_WAIT; + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led1On(); +#endif + + call AckWaitTimer.start(BLAZE_ACK_WAIT); + } + + /***************** SubAckReceive Events ****************/ + async event void SubAckReceive.receive( blaze_ack_t *ack ) { + blaze_header_t *header = call BlazePacketBody.getHeader(RADIO_STACK_PACKET); + + if(state == S_ACK_WAIT) { + if((ack->dest == header->src || ack->dest == AM_BROADCAST_ADDR) && + ack->src == header->dest && + ack->dsn == header->dsn) { + + // This is our acknowledgement + wasAcked = TRUE; + + signal AckReceive.receive(ack); + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led1Toggle(); + call Leds.led1Toggle(); +#endif + + } + } + } + + /***************** ChipSpiResource Events ***************/ + /** + * The SPI bus is about to be automatically released. Modules that aren't + * using the SPI bus but still want the SPI bus to stick around must call + * abortRelease() within the event. + */ + async event void ChipSpiResource.releasing() { + if(state == S_SENDING_ACK || state == S_ACK_WAIT) { + // Csma is trying to release the SPI bus. Let the chip own the SPI bus + // so it's immediately available when Receive needs it. + call ChipSpiResource.abortRelease(); + } + } + + /***************** Tasks ****************/ + task void sendDone() { + atomic state = S_IDLE; + signal Send.sendDone(RADIO_STACK_PACKET, SUCCESS); + } + + + /***************** Defaults ****************/ + default async event void AckReceive.receive( blaze_ack_t *ack) { } +} diff --git a/tos/chips/ccxx00_single/alarm/AlarmMultiplexC.nc b/tos/chips/ccxx00_single/alarm/AlarmMultiplexC.nc new file mode 100644 index 0000000000..260fd68495 --- /dev/null +++ b/tos/chips/ccxx00_single/alarm/AlarmMultiplexC.nc @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * A component that multiplexes the use of an alarm. The assumption is + * that its use is mutually exclusive and users check whether the + * events are for them. + * + * @author Jonathan Hui + * @author David Moss + */ + +#include "Timer.h" + +generic configuration AlarmMultiplexC() { + provides interface Alarm as Alarm32khz16; +} + +implementation { + + components new HplRadioAlarmC() as Alarm; + components MainC; + + MainC.SoftwareInit -> Alarm; + Alarm32khz16 = Alarm; + +} diff --git a/tos/chips/ccxx00_single/am/BlazeActiveMessageC.nc b/tos/chips/ccxx00_single/am/BlazeActiveMessageC.nc new file mode 100644 index 0000000000..4e7b29247c --- /dev/null +++ b/tos/chips/ccxx00_single/am/BlazeActiveMessageC.nc @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +#include "Blaze.h" + +/** + * Active Message Layer + * @author David Moss + */ + +configuration BlazeActiveMessageC { + provides { + interface AMSend[am_id_t id]; + interface SendNotifier[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface AMPacket; + interface Packet; + interface LinkPacketMetadata; + } + + uses { + interface Send as SubSend; + interface Receive as SubReceive; + } +} + +implementation { + + components BlazeActiveMessageP; + AMSend = BlazeActiveMessageP.AMSend; + SendNotifier = BlazeActiveMessageP.SendNotifier; + Receive = BlazeActiveMessageP.Receive; + Snoop = BlazeActiveMessageP.Snoop; + AMPacket = BlazeActiveMessageP.AMPacket; + Packet = BlazeActiveMessageP.Packet; + + SubSend = BlazeActiveMessageP.SubSend; + SubReceive = BlazeActiveMessageP.SubReceive; + + components BlazePacketC; + BlazeActiveMessageP.BlazePacket -> BlazePacketC; + BlazeActiveMessageP.BlazePacketBody -> BlazePacketC; + LinkPacketMetadata = BlazePacketC; + + components AcknowledgementsC; + BlazeActiveMessageP.PacketAcknowledgements -> AcknowledgementsC; + + components ActiveMessageAddressC; + BlazeActiveMessageP.ActiveMessageAddress -> ActiveMessageAddressC; + + components RandomC; + BlazeActiveMessageP.Random -> RandomC; + + components LedsC; + BlazeActiveMessageP.Leds -> LedsC; + +} diff --git a/tos/chips/ccxx00_single/am/BlazeActiveMessageP.nc b/tos/chips/ccxx00_single/am/BlazeActiveMessageP.nc new file mode 100644 index 0000000000..642e7a9118 --- /dev/null +++ b/tos/chips/ccxx00_single/am/BlazeActiveMessageP.nc @@ -0,0 +1,229 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Active message implementation on top of the Blaze radio. This + * implementation uses the 16-bit addressing mode of 802.15.4: the + * only additional byte it adds is the AM id byte, as the first byte + * of the data payload. + * + * @author Philip Levis + * @author David Moss + */ + +#include "Blaze.h" +#include "RadioStackPacket.h" + +module BlazeActiveMessageP { + provides { + interface AMSend[am_id_t id]; + interface SendNotifier[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface AMPacket; + interface Packet; + } + + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface BlazePacket; + interface BlazePacketBody; + interface ActiveMessageAddress; + interface PacketAcknowledgements; + interface Random; + interface Leds; + } +} + +implementation { + + enum { + BLAZE_SIZE = MAC_HEADER_SIZE + MAC_FOOTER_SIZE, + }; + + /***************** AMSend Commands ****************/ + command error_t AMSend.send[am_id_t id](am_addr_t addr, + message_t* msg, + uint8_t len) { + + blaze_header_t *header = call BlazePacketBody.getHeader( msg ); + + header->length = len + BLAZE_SIZE; + header->type = id; + header->dest = addr; + header->destpan = call ActiveMessageAddress.amGroup(); + header->src = call ActiveMessageAddress.amAddress(); + header->dsn += (call Random.rand16() % 10) + 1; + + signal SendNotifier.aboutToSend[id](addr, msg); + + RADIO_STACK_PACKET = msg; + + return call SubSend.send( msg, header->length + 1); + } + + command error_t AMSend.cancel[am_id_t id](message_t* msg) { + return FAIL; + } + + command uint8_t AMSend.maxPayloadLength[am_id_t id]() { + return call Packet.maxPayloadLength(); + } + + command void *AMSend.getPayload[am_id_t id](message_t *msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + + /***************** AMPacket Commands ****************/ + command am_addr_t AMPacket.address() { + return call ActiveMessageAddress.amAddress(); + } + + command am_addr_t AMPacket.destination(message_t* amsg) { + return (call BlazePacketBody.getHeader(amsg))->dest; + } + + command am_addr_t AMPacket.source(message_t* amsg) { + return (call BlazePacketBody.getHeader(amsg))->src; + } + + command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { + (call BlazePacketBody.getHeader(amsg))->dest = addr; + } + + command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { + (call BlazePacketBody.getHeader(amsg))->src = addr; + } + + command bool AMPacket.isForMe(message_t* amsg) { + return (call AMPacket.destination(amsg) == call AMPacket.address() || + call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); + } + + command am_id_t AMPacket.type(message_t* amsg) { + return (call BlazePacketBody.getHeader(amsg))->type; + } + + command void AMPacket.setType(message_t* amsg, am_id_t type) { + (call BlazePacketBody.getHeader(amsg))->type = type; + } + + command am_group_t AMPacket.group(message_t* amsg) { + return (call BlazePacketBody.getHeader(amsg))->destpan; + } + + command void AMPacket.setGroup(message_t* amsg, am_group_t grp) { + // Overridden intentionally when we send() + (call BlazePacketBody.getHeader(amsg))->destpan = grp; + } + + command am_group_t AMPacket.localGroup() { + return call ActiveMessageAddress.amGroup(); + } + + + /***************** Packet Commands ****************/ + command void Packet.clear(message_t* msg) { + memset(call BlazePacketBody.getHeader(msg), sizeof(blaze_header_t), 0); + memset(call BlazePacketBody.getMetadata(msg), sizeof(blaze_metadata_t), 0); + } + + command uint8_t Packet.payloadLength(message_t* msg) { + return (call BlazePacketBody.getHeader(msg))->length - BLAZE_SIZE; + } + + command void Packet.setPayloadLength(message_t* msg, uint8_t len) { + (call BlazePacketBody.getHeader(msg))->length = len + BLAZE_SIZE; + } + + command uint8_t Packet.maxPayloadLength() { + return TOSH_DATA_LENGTH; + } + + command void *Packet.getPayload(message_t* msg, uint8_t len) { + if (len <= TOSH_DATA_LENGTH) { + return msg->data; + } else { + return NULL; + } + } + + + /***************** SubSend Events ****************/ + event void SubSend.sendDone(message_t* msg, error_t result) { +#if PRINTF_ACKS + if(call AMPacket.destination(msg) != AM_BROADCAST_ADDR) { + if(call PacketAcknowledgements.wasAcked(msg)) { + printf(">> Ack'd\n\r"); + } else { + printf(">> No Ack\n\r"); + } + } +#endif + + signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); + } + + + /***************** SubReceive Events ****************/ + event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { + if (call AMPacket.isForMe(msg)) { + return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len - BLAZE_SIZE); + } else { + signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len - BLAZE_SIZE); + } + + return msg; + } + + + /***************** ActiveMessageAddress Events ****************/ + async event void ActiveMessageAddress.changed() { + } + + + /***************** Defaults ****************/ + default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { + return msg; + } + + default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { + return msg; + } + + default event void AMSend.sendDone[am_id_t id](message_t* msg, error_t err) { + } + + default event void SendNotifier.aboutToSend[am_id_t amId](am_addr_t addr, message_t *msg) { + } + +} diff --git a/tos/chips/ccxx00_single/am/queue/AMQueueEntryP.nc b/tos/chips/ccxx00_single/am/queue/AMQueueEntryP.nc new file mode 100644 index 0000000000..2f96c39417 --- /dev/null +++ b/tos/chips/ccxx00_single/am/queue/AMQueueEntryP.nc @@ -0,0 +1,69 @@ +// $Id$ +/* + * "Copyright (c) 2005 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * Internal AM component that fills in needed packet fields for the + * AMSend -> Send transformation. + * + * @author Philip Levis + * @date Jan 16 2006 + */ + +#include "AM.h" + +generic module AMQueueEntryP(am_id_t amId) { + provides interface AMSend; + uses{ + interface Send; + interface AMPacket; + } +} + +implementation { + + command error_t AMSend.send(am_addr_t dest, + message_t* msg, + uint8_t len) { + call AMPacket.setDestination(msg, dest); + call AMPacket.setType(msg, amId); + return call Send.send(msg, len); + } + + command error_t AMSend.cancel(message_t* msg) { + return call Send.cancel(msg); + } + + event void Send.sendDone(message_t* m, error_t err) { + signal AMSend.sendDone(m, err); + } + + command uint8_t AMSend.maxPayloadLength() { + return call Send.maxPayloadLength(); + } + + command void* AMSend.getPayload(message_t* m, uint8_t len) { + return call Send.getPayload(m, len); + } + +} diff --git a/tos/chips/ccxx00_single/am/queue/AMQueueImplP.nc b/tos/chips/ccxx00_single/am/queue/AMQueueImplP.nc new file mode 100644 index 0000000000..f769fed557 --- /dev/null +++ b/tos/chips/ccxx00_single/am/queue/AMQueueImplP.nc @@ -0,0 +1,171 @@ +// $Id$ +/* +* "Copyright (c) 2005 Stanford University. All rights reserved. +* +* Permission to use, copy, modify, and distribute this software and +* its documentation for any purpose, without fee, and without written +* agreement is hereby granted, provided that the above copyright +* notice, the following two paragraphs and the author appear in all +* copies of this software. +* +* IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR +* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES +* ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN +* IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH +* DAMAGE. +* +* STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE +* PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY +* HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, +* ENHANCEMENTS, OR MODIFICATIONS." +*/ + +/** + * An AM send queue that provides a Service Instance pattern for + * formatted packets and calls an underlying AMSend in a round-robin + * fashion. Used to share L2 bandwidth between different communication + * clients. + * + * @author Philip Levis + * @author David Moss + * @date Aug 14, 2009 + */ + +#include "AM.h" + +generic module AMQueueImplP(int TOTAL_QUEUE_MESSAGES) { + provides { + interface Send[uint8_t client]; + } + + uses { + interface AMSend[am_id_t id]; + interface AMPacket; + interface Packet; + } +} + +implementation { + + uint8_t currentMsgId = TOTAL_QUEUE_MESSAGES; + + message_t *msgQueue[TOTAL_QUEUE_MESSAGES]; + + + /***************** Prototypes ****************/ + void tryToSend(); + task void errorTask(); + void nextPacket(); + void tryToSend(); + void sendDone(uint8_t last, message_t *msg, error_t err); + + /***************** Send Commands ****************/ + /** + * Accepts a properly formatted AM packet for later sending. + * Assumes that someone has filled in the AM packet fields + * (destination, AM type). + * + * @param msg - the message to send + * @param len - the length of the payload + * + */ + command error_t Send.send[uint8_t id](message_t* msg, uint8_t len) { + error_t error = SUCCESS; + + if (id >= TOTAL_QUEUE_MESSAGES || msgQueue[id] != NULL) { + return FAIL; + } + + msgQueue[id] = msg; + call Packet.setPayloadLength(msg, len); + + if (currentMsgId >= TOTAL_QUEUE_MESSAGES) { // queue empty + currentMsgId = id; + + if ((error = call AMSend.send[call AMPacket.type(msg)](call AMPacket.destination(msg), msg, len)) != SUCCESS) { + currentMsgId = TOTAL_QUEUE_MESSAGES; + msgQueue[id] = NULL; + } + } + + return error; + } + + command error_t Send.cancel[uint8_t id](message_t* msg) { + return FAIL; + } + + + event void AMSend.sendDone[am_id_t id](message_t* msg, error_t err) { + // Bug fix from John Regehr: if the underlying radio mixes things + // up, we don't want to read memory incorrectly. This can occur + // on the mica2. + // Note that since all AM packets go through this queue, this + // means that the radio has a problem. -pal + if (currentMsgId >= TOTAL_QUEUE_MESSAGES) { + return; + } + + if(msgQueue[currentMsgId] == msg) { + sendDone(currentMsgId, msg, err); + } + } + + command uint8_t Send.maxPayloadLength[uint8_t id]() { + return call AMSend.maxPayloadLength[0](); + } + + command void* Send.getPayload[uint8_t id](message_t* m, uint8_t len) { + return call AMSend.getPayload[0](m, len); + } + + /***************** Functions ****************/ + task void errorTask() { + sendDone(currentMsgId, msgQueue[currentMsgId], FAIL); + } + + void nextPacket() { + uint8_t i = 0; + + do { + currentMsgId++; + currentMsgId %= TOTAL_QUEUE_MESSAGES; + + if(msgQueue[currentMsgId] != NULL) { + return; + } + + i++; + } while(i < TOTAL_QUEUE_MESSAGES); + + currentMsgId = TOTAL_QUEUE_MESSAGES; + } + + + // NOTE: Increments currentMsgId! + void tryToSend() { + nextPacket(); + if (currentMsgId < TOTAL_QUEUE_MESSAGES) { // queue not empty + if((call AMSend.send[call AMPacket.type(msgQueue[currentMsgId])]( + call AMPacket.destination(msgQueue[currentMsgId]), + msgQueue[currentMsgId], + call Packet.payloadLength(msgQueue[currentMsgId]))) != SUCCESS) { + post errorTask(); + } + } + } + + void sendDone(uint8_t last, message_t *msg, error_t err) { + msgQueue[last] = NULL; + tryToSend(); + signal Send.sendDone[last](msg, err); + } + + + /***************** Defaults ****************/ + default event void Send.sendDone[uint8_t id](message_t* msg, error_t err) { + // Do nothing + } +} diff --git a/tos/chips/ccxx00_single/am/queue/AMQueueP.nc b/tos/chips/ccxx00_single/am/queue/AMQueueP.nc new file mode 100644 index 0000000000..415168ed1d --- /dev/null +++ b/tos/chips/ccxx00_single/am/queue/AMQueueP.nc @@ -0,0 +1,51 @@ +// $Id$ +/* + * "Copyright (c) 2005 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * The fair-share send queue for AM radio communication. + * + * @author Philip Levis + * @date Jan 16 2006 + */ + +#include "AM.h" + +configuration AMQueueP { + provides interface Send[uint8_t client]; +} + +implementation { + enum { + NUM_CLIENTS = uniqueCount(UQ_AMQUEUE_SEND) + }; + + components new AMQueueImplP(NUM_CLIENTS), ActiveMessageC; + + Send = AMQueueImplP; + AMQueueImplP.AMSend -> ActiveMessageC; + AMQueueImplP.AMPacket -> ActiveMessageC; + AMQueueImplP.Packet -> ActiveMessageC; + +} + diff --git a/tos/chips/ccxx00_single/am/queue/AMReceiverC.nc b/tos/chips/ccxx00_single/am/queue/AMReceiverC.nc new file mode 100644 index 0000000000..b4e6e2504b --- /dev/null +++ b/tos/chips/ccxx00_single/am/queue/AMReceiverC.nc @@ -0,0 +1,49 @@ +// $Id$ +/* + * "Copyright (c) 2005 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * The virtualized AM reception abstraction. + * + * @author Philip Levis + * @date Jan 16 2006 + * @see TEP 116: Packet Protocols + */ + +#include "AM.h" + +generic configuration AMReceiverC(am_id_t amId) { + provides { + interface Receive; + interface Packet; + interface AMPacket; + } +} + +implementation { + components ActiveMessageC; + + Receive = ActiveMessageC.Receive[amId]; + Packet = ActiveMessageC; + AMPacket = ActiveMessageC; +} diff --git a/tos/chips/ccxx00_single/am/queue/AMSenderC.nc b/tos/chips/ccxx00_single/am/queue/AMSenderC.nc new file mode 100644 index 0000000000..eba17537e5 --- /dev/null +++ b/tos/chips/ccxx00_single/am/queue/AMSenderC.nc @@ -0,0 +1,59 @@ +// $Id$ +/* + * "Copyright (c) 2006 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * The virtualized active message send abstraction. Each instantiation + * of AMSenderC has its own queue of depth one. Therefore, it does not + * have to contend with other AMSenderC instantiations for queue space. + * The underlying implementation schedules the packets in these queues + * using some form of fair-share queueing. + * + * @author Philip Levis + * @date Jan 16 2006 + * @see TEP 116: Packet Protocols + */ + +#include "AM.h" + +generic configuration AMSenderC(am_id_t AMId) { + provides { + interface AMSend; + interface Packet; + interface AMPacket; + interface PacketAcknowledgements as Acks; + } +} + +implementation { + components new AMQueueEntryP(AMId) as AMQueueEntryP; + components AMQueueP, ActiveMessageC; + + AMQueueEntryP.Send -> AMQueueP.Send[unique(UQ_AMQUEUE_SEND)]; + AMQueueEntryP.AMPacket -> ActiveMessageC; + + AMSend = AMQueueEntryP; + Packet = ActiveMessageC; + AMPacket = ActiveMessageC; + Acks = ActiveMessageC; +} diff --git a/tos/chips/ccxx00_single/am/queue/AMSnooperC.nc b/tos/chips/ccxx00_single/am/queue/AMSnooperC.nc new file mode 100644 index 0000000000..19ba8358e2 --- /dev/null +++ b/tos/chips/ccxx00_single/am/queue/AMSnooperC.nc @@ -0,0 +1,50 @@ +// $Id$ +/* + * "Copyright (c) 2006 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * The virtualization of snooping on overheard packets that are not + * destined to this node. + * + * @author Philip Levis + * @date Jan 16 2006 + * @see TEP 116: Packet Protocols + */ + +#include "AM.h" + +generic configuration AMSnooperC(am_id_t AMId) { + provides { + interface Receive; + interface Packet; + interface AMPacket; + } +} + +implementation { + components ActiveMessageC; + + Receive = ActiveMessageC.Snoop[AMId]; + Packet = ActiveMessageC; + AMPacket = ActiveMessageC; +} diff --git a/tos/chips/ccxx00_single/am/queue/AMSnoopingReceiverC.nc b/tos/chips/ccxx00_single/am/queue/AMSnoopingReceiverC.nc new file mode 100644 index 0000000000..f5ac6c16e0 --- /dev/null +++ b/tos/chips/ccxx00_single/am/queue/AMSnoopingReceiverC.nc @@ -0,0 +1,51 @@ +// $Id$ +/* + * "Copyright (c) 2005 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * The virtualized abstraction to hearing all packets of a given AM type, + * whether destined for this node or not. + * + * @author Philip Levis + * @date Jan 16 2006 + * @see TEP 116: Packet Protocols + */ + +#include "AM.h" + +generic configuration AMSnoopingReceiverC(am_id_t AMId) { + provides { + interface Receive; + interface Packet; + interface AMPacket; + } +} + +implementation { + components ActiveMessageC; + + Receive = ActiveMessageC.Snoop[AMId]; + Receive = ActiveMessageC.Receive[AMId]; + Packet = ActiveMessageC; + AMPacket = ActiveMessageC; +} diff --git a/tos/chips/ccxx00_single/crc/PacketCrc.nc b/tos/chips/ccxx00_single/crc/PacketCrc.nc new file mode 100644 index 0000000000..79b0a61107 --- /dev/null +++ b/tos/chips/ccxx00_single/crc/PacketCrc.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + * @author Mark Siner + */ + +interface PacketCrc { + + /** + * Append a CRC to the end of the message. The first byte of the + * message MUST be the length byte of the full packet (header + payload + footer) + * minus the length byte itself. + * + * @param msg the packet to calculate a CRC for. + */ + async command void computeCrc(void *msg); + + + /** + * Verify a CRC at the end of a message. The first byte of the + * message MUST be exactly as received - the full packet, including the + * 32-bit CRC at the end, minus the length byte itself. + * + * @param msg the packet to verify the CRC. + * @return TRUE if the CRC check passed and the data is most likely ok + */ + async command bool verifyCrc(void *msg); + +} diff --git a/tos/chips/ccxx00_single/crc/PacketCrcC.nc b/tos/chips/ccxx00_single/crc/PacketCrcC.nc new file mode 100644 index 0000000000..41317d6fe0 --- /dev/null +++ b/tos/chips/ccxx00_single/crc/PacketCrcC.nc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +configuration PacketCrcC { + provides { + interface PacketCrc; + } +} + +implementation { + + components PacketCrcP; + PacketCrc = PacketCrcP; + + components Crc32C; + PacketCrcP.CrcX -> Crc32C; + +} diff --git a/tos/chips/ccxx00_single/crc/PacketCrcP.nc b/tos/chips/ccxx00_single/crc/PacketCrcP.nc new file mode 100644 index 0000000000..ec267995b6 --- /dev/null +++ b/tos/chips/ccxx00_single/crc/PacketCrcP.nc @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + * @author Mark Siner + */ + +module PacketCrcP { + provides { + interface PacketCrc; + } + + uses { + interface CrcX; + } +} + +implementation { + + /** + * Append a CRC to the end of the message. The first byte of the + * message MUST be the length byte of the full packet (header + payload + footer) + * minus the length byte itself. + * + * @param msg the packet to calculate and append a CRC. + */ + async command void PacketCrc.computeCrc(void *msg) { + uint8_t footerlessLength = *((uint8_t *)msg) + 1 - sizeof(blaze_footer_t); + blaze_footer_t *footer = (blaze_footer_t *)(msg + footerlessLength); + + footer->crc = call CrcX.crc((uint8_t *) msg, footerlessLength); + } + + + /** + * Verify a CRC at the end of a message. The first byte of the + * message MUST be exactly as received - the full packet, including the + * 32-bit CRC at the end, minus the length byte itself. + * + * @param msg the packet to verify the CRC. + * @return TRUE if the CRC check passed and the data is most likely ok + */ + async command bool PacketCrc.verifyCrc(void *msg) { + uint8_t footerlessLength = *((uint8_t *)msg) + 1 - sizeof(blaze_footer_t); + blaze_footer_t *footer = (blaze_footer_t *)(msg + footerlessLength); + + return (footer->crc == call CrcX.crc((uint8_t *) msg, footerlessLength)); + } + +} + diff --git a/tos/chips/ccxx00_single/csma/README.txt b/tos/chips/ccxx00_single/csma/README.txt new file mode 100644 index 0000000000..6e7318b97b --- /dev/null +++ b/tos/chips/ccxx00_single/csma/README.txt @@ -0,0 +1,29 @@ + +Summary: I recommend using the continuoussense CSMA implementation. + + +The singlesense CSMA is the type of CSMA originally implemented in TinyOS for +radios like the CC1000, CC2420, etc. At the end of each backoff period, it +samples the channel a single time to determine if it's ok to talk. If the +channel is clear, the talking begins. The problem is, in some low power +communications strategies, you might be talking in the middle of another +transmitter's packetized wake-up transmission. + +The continuoussense CSMA must see a clear channel throughout an entire backoff +period before sending. If the channel is ever not clear during a backoff +period, then the congestion backoffs start over again. These backoff periods +begin long in duration and gradually get more rapid as the transmitter +becomes more frantic trying to get its message out. This is a very fair method +of sharing the channel while maintaining compatibility with low power +communication strategies. + +I also noticed that with a manually duty cycling CC1100 radio waking up in +the middle of another node's transmission, the carrier-sense line and RSSI +will remain high even after the transmitter is gone (and I verified this with +a spectrum analyzer). This prevents you from transmitting for a *long* time. +The continuous sense implementation takes care of this by kicking the radio +in and out of RX mode between backoffs, but only when a packet is not being +received. + +-David Moss + diff --git a/tos/chips/ccxx00_single/csma/continuoussense/Csma.h b/tos/chips/ccxx00_single/csma/continuoussense/Csma.h new file mode 100644 index 0000000000..885dd76ea5 --- /dev/null +++ b/tos/chips/ccxx00_single/csma/continuoussense/Csma.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#ifndef CSMA_H +#define CSMA_H + +#ifndef BLAZE_CSMA_DEFINED +#define BLAZE_CSMA_DEFINED +#else +#warning "You are attempting to include multiple CSMA paths at compile time." +#error "Choose a single CSMA directory in your compiler path and recompile." +#endif + +#ifndef BLAZE_BACKOFF_PERIOD +#define BLAZE_BACKOFF_PERIOD 100 +#endif + +#ifndef BLAZE_MIN_INITIAL_BACKOFF +#define BLAZE_MIN_INITIAL_BACKOFF 5000 +#endif + +#ifndef BLAZE_MIN_BACKOFF +#define BLAZE_MIN_BACKOFF 500 +#endif + +#ifndef BLAZE_CSMA_TIMEOUT +#define BLAZE_CSMA_TIMEOUT 5120 +#endif + +#endif diff --git a/tos/chips/ccxx00_single/csma/continuoussense/CsmaC.nc b/tos/chips/ccxx00_single/csma/continuoussense/CsmaC.nc new file mode 100644 index 0000000000..4cf4d50db8 --- /dev/null +++ b/tos/chips/ccxx00_single/csma/continuoussense/CsmaC.nc @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Csma.h" +#include "Blaze.h" + +/** + * The CSMA layer sits directly above the asynchronous portion of the + * transmit branch. It is responsible for loading the TX FIFO with data + * to send, then sending the data by either forcing it (no CCA) or using + * backoffs to avoid collisions. + * + * The CSMA interface is provided to determine the properties of CCA + * and backoff durations. The use of call-backs is done very deliberately, + * described below. + * + * If you signal out an *event* to request an initial backoff and + * several components happen to be listening, then those components + * would be required to return a backoff value, regardless of whether or not + * those components are interested in affecting the backoff for the given + * AM type. We don't want that behavior. + * + * With a call back strategy, components can listen for the requests and then + * decide if they want to affect the behavior. If the component wants to + * affect the behavior, it calls back using the setXYZBackoff(..) command. + * If several components call back, then the last component to get its + * word in has the final say. + * + * With a manually duty cycling CC1100 radio waking up in + * the middle of another node's transmission, the carrier-sense line and RSSI + * will remain high even after the transmitter is gone (and I verified this with + * a spectrum analyzer). This prevents you from transmitting for a *long* time. + * The continuous sense implementation takes care of this by kicking the radio + * in and out of RX mode between backoffs, but only when a packet is not being + * received. + * + * @author David Moss + */ +configuration CsmaC { + provides { + interface Send; + interface Csma[am_id_t amId]; + interface Backoff as InitialBackoff[am_id_t amId]; + interface Backoff as CongestionBackoff[am_id_t amId]; + interface SplitControl; + } +} + +implementation { + + components CsmaP; + Send = CsmaP; + Csma = CsmaP; + InitialBackoff = CsmaP.InitialBackoff; + CongestionBackoff = CsmaP.CongestionBackoff; + SplitControl = CsmaP; + + components new BlazeSpiResourceC(); + CsmaP.Resource -> BlazeSpiResourceC; + + components BlazeCentralWiringC; + CsmaP.BlazeRegSettings -> BlazeCentralWiringC; + CsmaP.Csn -> BlazeCentralWiringC.Csn; + CsmaP.EnergyIo -> BlazeCentralWiringC.Gdo2_io; + CsmaP.EnergyInterrupt -> BlazeCentralWiringC.Gdo2_int; + CsmaP.RxInterrupt -> BlazeCentralWiringC.Gdo0_int; + + components BlazeSpiC; + CsmaP.IOCFG2 -> BlazeSpiC.IOCFG2; + CsmaP.PKTSTATUS -> BlazeSpiC.PKTSTATUS; + CsmaP.SIDLE -> BlazeSpiC.SIDLE; + + components BlazeTransmitC; + CsmaP.AsyncSend -> BlazeTransmitC.AsyncSend; + + components new ReceiveModeC(); + CsmaP.ReceiveMode -> ReceiveModeC; + + components BlazePacketC; + CsmaP.BlazePacketBody -> BlazePacketC; + CsmaP.BlazePacket -> BlazePacketC; + + components new AlarmMultiplexC(); + CsmaP.BackoffTimer -> AlarmMultiplexC; + + components RandomC; + CsmaP.Random -> RandomC; + + components new TimerMilliC(); + CsmaP.TimeoutTimer -> TimerMilliC; + + components LedsC; + CsmaP.Leds -> LedsC; + +} diff --git a/tos/chips/ccxx00_single/csma/continuoussense/CsmaP.nc b/tos/chips/ccxx00_single/csma/continuoussense/CsmaP.nc new file mode 100644 index 0000000000..26a068dd7c --- /dev/null +++ b/tos/chips/ccxx00_single/csma/continuoussense/CsmaP.nc @@ -0,0 +1,586 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Carrier Sense Multiple Access implementation + * Rather than use an IO line to measure CCA, we rely directly on the radio + * hardware to sample the CCA for us when attempting to transmit. + * + * @author David Moss + */ + +#include "Blaze.h" +#include "Csma.h" +#include "BlazeInit.h" +#include "RadioStackPacket.h" + +module CsmaP { + provides { + interface Send; + interface Csma[am_id_t amId]; + interface Backoff as InitialBackoff[am_id_t amId]; + interface Backoff as CongestionBackoff[am_id_t amId]; + interface SplitControl; + } + + uses { + interface Resource; + interface AsyncSend; + interface Alarm as BackoffTimer; + + interface GpioInterrupt as EnergyInterrupt; + interface GpioInterrupt as RxInterrupt; + interface GeneralIO as EnergyIo; + interface GeneralIO as Csn; + + interface BlazeRegister as IOCFG2; + + interface BlazeRegister as PKTSTATUS; + interface BlazeStrobe as SIDLE; + + interface BlazePacket; + interface BlazePacketBody; + interface BlazeRegSettings; + + interface ReceiveMode; + + interface Timer as TimeoutTimer; + + interface Random; + interface Leds; + } +} + +implementation { + + /** The amount of time to backoff */ + norace uint16_t myBackoff; + + /** TRUE if the current packet should use clear channel assessments */ + bool useCca; + + /** Error to pass back in sendDone */ + error_t myError; + + /** TRUE if the energy interrupt fired */ + bool energyInterruptFired; + + /** TRUE if the energy detection is turned on */ + bool energyDetectEnabled; + + /** Total number of congestion backoffs on the current transmission */ + uint16_t totalCongestionBackoffs; + + /** State of this component */ + uint8_t state; + + enum { + S_IDLE, + S_SENDING, + S_START_INITIAL_BACKOFF, + S_BACKOFF, + S_FORCING, + S_CANCEL, + S_STOPPING, + }; + + /***************** Tasks ****************/ + task void forceSend(); + task void sendDone(); + task void delayedRequestResource(); + + void runSpiOperations(); + void enableEnergyDetect(); + void disableEnergyDetect(); + + void requestCca(); + void requestInitialBackoff(); + void requestCongestionBackoff(); + + void initialBackoff(); + void congestionBackoff(); + + /***************** SplitControl Commands ****************/ + command error_t SplitControl.start() { + signal SplitControl.startDone(SUCCESS); + return SUCCESS; + } + + /** + * If we're busy, stop being busy so we can shut off this radio. + * Assume that if we're sending, we're trying to shut off the radio that + * we're sending to. Also assume that there's a SplitControlManager + * on top that will prevent the application layer from trying to send + * another packet after we've shut down. + */ + command error_t SplitControl.stop() { + if(state) { + state = S_STOPPING; + + } else { + signal SplitControl.stopDone(SUCCESS); + } + + return SUCCESS; + } + + /***************** Send Commands ****************/ + /** + * By this point, the length should already be set in the message itself. + * @param msg the message to send + * @param len IGNORED + * @return SUCCESS if we're going to try to send the message. + * FAIL if you need to reevaluate your code + */ + command error_t Send.send(message_t* msg, uint8_t len) { + if(state) { + return FAIL; + } + + state = S_START_INITIAL_BACKOFF; + + requestCca(); + + if(!useCca) { + state = S_FORCING; + + } else { + call TimeoutTimer.startOneShot(BLAZE_CSMA_TIMEOUT); + } + + call Resource.request(); + return SUCCESS; + } + + command error_t Send.cancel(message_t* msg) { + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { + return TOSH_DATA_LENGTH; + } + + command void *Send.getPayload(message_t* msg, uint8_t len) { + if(len <= TOSH_DATA_LENGTH) { + return msg->data; + } else { + return NULL; + } + } + + /***************** Resource Events ****************/ + event void Resource.granted() { + atomic { + runSpiOperations(); + } + } + + /***************** Interrupt Events ****************/ + async event void RxInterrupt.fired() { + atomic { + if(state == S_BACKOFF || state == S_START_INITIAL_BACKOFF) { + if(energyDetectEnabled) { + call BackoffTimer.stop(); + disableEnergyDetect(); + call Resource.release(); + post delayedRequestResource(); + } + } + } + } + + async event void EnergyInterrupt.fired() { + atomic energyInterruptFired = TRUE; + } + + + /***************** AsyncSend Events ****************/ + async event void AsyncSend.sendDone(error_t error) { +#if BLAZE_CSMA_LEDS + call Leds.led2Off(); +#endif + + atomic myError = error; + post sendDone(); + } + + async event void AsyncSend.sending() { + } + + /***************** Backoff Commands ****************/ + /** + * Must be called within a requestInitialBackoff event + * @param backoffTime the amount of time in some unspecified units to backoff + */ + async command void InitialBackoff.setBackoff[am_id_t amId](uint16_t backoffTime) { + myBackoff = backoffTime + 1; + } + + /** + * Must be called within a requestCongestionBackoff event + * @param backoffTime the amount of time in some unspecified units to backoff + */ + async command void CongestionBackoff.setBackoff[am_id_t amId](uint16_t backoffTime) { + myBackoff = backoffTime + 1; + } + + /***************** CSMA Commands ****************/ + /** + * Must be called within a requestCca event + * @param cca TRUE to use cca for the outbound packet, FALSE to not use CCA + */ + async command void Csma.setCca[am_id_t amId](bool cca) { + atomic useCca = cca; + } + + + /***************** BackoffTimer Events ****************/ + async event void BackoffTimer.fired() { + atomic { + +#if BLAZE_CSMA_LEDS + call Leds.led0Off(); + call Leds.led1Off(); +#endif + + if(call Resource.isOwner()) { + runSpiOperations(); + + } else { + call Resource.request(); + } + } + } + + /***************** TimeoutTimer Events ****************/ + event void TimeoutTimer.fired() { + state = S_CANCEL; + } + + + /***************** ReceiveMode Events ****************/ + event void ReceiveMode.srxDone() { + } + + /***************** Tasks ****************/ + /** + * The radio is programmed up to only Tx on CCA, which we're not going + * to change. Plus, it would be pointless to try to transmit while something + * is talking on the channel anyway. So we keep trying repetitively until + * the message sends. + * + * If what you're interested in is a jammer, then you need to edit + * some of the default register settings for this radio to disable the + * hardware CCA. + */ + task void forceSend() { + call Csn.set(); + call Csn.clr(); + + if(call AsyncSend.send(RADIO_STACK_PACKET, TRUE, (call BlazePacketBody.getMetadata(RADIO_STACK_PACKET))->rxInterval) != SUCCESS) { + + call Csn.set(); + + if(state == S_CANCEL || state == S_STOPPING) { + atomic myError = ECANCEL; + post sendDone(); + + } else { + call Csn.clr(); + call SIDLE.strobe(); + call ReceiveMode.blockingSrx(); + call Csn.set(); + post forceSend(); + } + } + } + + task void sendDone() { + error_t atomicError; + atomic atomicError = myError; + + call TimeoutTimer.stop(); + + if(energyDetectEnabled) { + disableEnergyDetect(); + } + + call Resource.release(); + + if(state == S_STOPPING) { + signal SplitControl.stopDone(SUCCESS); + } + + state = S_IDLE; + signal Send.sendDone(RADIO_STACK_PACKET, atomicError); + } + + task void delayedRequestResource() { + if(call Resource.request() != SUCCESS) { + post delayedRequestResource(); + } + } + + /***************** Functions ****************/ + void runSpiOperations() { + uint8_t pktstatus; + + switch(state) { + case S_START_INITIAL_BACKOFF: + state = S_BACKOFF; + enableEnergyDetect(); + initialBackoff(); + break; + + case S_BACKOFF: + if(!energyDetectEnabled) { + enableEnergyDetect(); + congestionBackoff(); + + } else if(energyInterruptFired) { + disableEnergyDetect(); + + call Csn.clr(); + call PKTSTATUS.read(&pktstatus); + if(!(pktstatus & 0x20) && !(pktstatus & 0x08)) { + // Make sure our carrier-sense line is really valid by kicking in + // and out of RX mode, as long as we aren't receiving a packet. + // We have to do this because of a hardware carrier-sense problem + // related to manually duty cycling the radio in the presence of + // nearby transmitters. + call SIDLE.strobe(); + call ReceiveMode.blockingSrx(); + } + + call Csn.set(); + + call Resource.release(); + call Resource.request(); + + } else { + // Energy detects were enabled and the energy interrupt didn't fire. + // Attempt to send the message + disableEnergyDetect(); + +#if BLAZE_CSMA_LEDS + call Leds.led2On(); +#endif + + if(call AsyncSend.send(RADIO_STACK_PACKET, FALSE, (call BlazePacketBody.getMetadata(RADIO_STACK_PACKET))->rxInterval) != SUCCESS) { + +#if BLAZE_CSMA_LEDS + call Leds.led2Off(); +#endif + + call SIDLE.strobe(); + call ReceiveMode.blockingSrx(); + + call Csn.set(); + + call Resource.release(); + call Resource.request(); + } + } + break; + + case S_FORCING: + if(energyDetectEnabled) { + disableEnergyDetect(); + } + + post forceSend(); + break; + + case S_CANCEL: + /** Fall Through */ + + case S_STOPPING: + if(energyDetectEnabled) { + disableEnergyDetect(); + } + + myError = ECANCEL; + post sendDone(); + break; + + default: + break; + } + + } + + + /** + * You must own the SPI bus resource before beginning energy detects. + */ + void enableEnergyDetect() { + energyInterruptFired = FALSE; + energyDetectEnabled = TRUE; + + call Csn.clr(); + // The EnergyIo right now represents CHIP_RDY. + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(7); +#endif + + while(call EnergyIo.get()); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(0); +#endif + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led3On(); +#endif + + call EnergyInterrupt.enableRisingEdge(); + + // Carrier sense + call IOCFG2.write(0x0E); // Carrier-Sense + + if(call EnergyIo.get()) { + atomic energyInterruptFired = TRUE; + } + + call Csn.set(); + } + + /** + * You must own the SPI bus resource before ending energy detects + */ + void disableEnergyDetect() { + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led3Off(); +#endif + + energyInterruptFired = FALSE; + energyDetectEnabled = FALSE; + call Csn.clr(); + call EnergyInterrupt.disable(); + call IOCFG2.write(0x29); + call Csn.set(); + } + + + /** + * Decide whether or not to use CCA for this transmission. + * When complete, the useCca variable will read TRUE to use CCA and FALSE + * to not use software CCA. + */ + void requestCca() { + atomic useCca = TRUE; + signal Csma.requestCca[(call BlazePacketBody.getHeader(RADIO_STACK_PACKET))->type](RADIO_STACK_PACKET); + } + + /** + * Obtain an inital backoff amount. + * When complete, the variable myBackoff will be filled with the + * correct amount of initial backoff time to use + */ + void requestInitialBackoff() { + myBackoff = call Random.rand16() % (0x1F * BLAZE_BACKOFF_PERIOD) + + BLAZE_MIN_INITIAL_BACKOFF; + + signal InitialBackoff.requestBackoff[(call BlazePacketBody.getHeader(RADIO_STACK_PACKET))->type](RADIO_STACK_PACKET); + } + + /** + * Obtain a congestion backoff amount + * When complete, the variable myBackoff will be filled with the + * correct amount of congestion backoff time to use. + */ + void requestCongestionBackoff() { + uint16_t fairnessBackoff; + /* + * As more congestion backoffs occur, we are waiting longer. This node + * should have a higher priority on the channel than nodes that + * haven't been waiting as long + */ + if(BLAZE_MIN_INITIAL_BACKOFF > (totalCongestionBackoffs * BLAZE_BACKOFF_PERIOD)) { + fairnessBackoff = BLAZE_MIN_INITIAL_BACKOFF - (totalCongestionBackoffs * BLAZE_BACKOFF_PERIOD); + + } else { + fairnessBackoff = 0; + } + + myBackoff = call Random.rand16() % (0x7 * BLAZE_BACKOFF_PERIOD) + + BLAZE_MIN_BACKOFF + fairnessBackoff; + + signal CongestionBackoff.requestBackoff[(call BlazePacketBody.getHeader(RADIO_STACK_PACKET))->type](RADIO_STACK_PACKET); + } + + + /** + * Backoff for the initial backoff period of time + */ + void initialBackoff() { + energyInterruptFired = FALSE; + totalCongestionBackoffs = 0; + requestInitialBackoff(); + +#if BLAZE_CSMA_LEDS + call Leds.led0On(); +#endif + + call BackoffTimer.start( myBackoff ); + } + + /** + * Backoff because of a congested channel + */ + void congestionBackoff() { + energyInterruptFired = FALSE; + totalCongestionBackoffs++; + + if(totalCongestionBackoffs > 1024) { + totalCongestionBackoffs = 1024; + } + + requestCongestionBackoff(); + +#if BLAZE_CSMA_LEDS + call Leds.led1On(); +#endif + + call BackoffTimer.start( myBackoff ); + } + + + /***************** Defaults ****************/ + default async event void InitialBackoff.requestBackoff[am_id_t amId](message_t *msg) { } + default async event void CongestionBackoff.requestBackoff[am_id_t amId](message_t *msg) { } + default async event void Csma.requestCca[am_id_t amId](message_t *msg) { } + +} + + diff --git a/tos/chips/ccxx00_single/csma/singlesense/Csma.h b/tos/chips/ccxx00_single/csma/singlesense/Csma.h new file mode 100644 index 0000000000..eff992aaf2 --- /dev/null +++ b/tos/chips/ccxx00_single/csma/singlesense/Csma.h @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#ifndef CSMA_H +#define CSMA_H + +// 10 for high data rates +#ifndef BLAZE_BACKOFF_PERIOD +#define BLAZE_BACKOFF_PERIOD 100 +#endif + +// 10 for high data rates +#ifndef BLAZE_MIN_BACKOFF +#define BLAZE_MIN_BACKOFF 2000 +#endif + +#endif diff --git a/tos/chips/ccxx00_single/csma/singlesense/CsmaC.nc b/tos/chips/ccxx00_single/csma/singlesense/CsmaC.nc new file mode 100644 index 0000000000..a523286dd8 --- /dev/null +++ b/tos/chips/ccxx00_single/csma/singlesense/CsmaC.nc @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Csma.h" +#include "Blaze.h" + +/** + * The CSMA layer sits directly above the asynchronous portion of the + * transmit branch. It is responsible for loading the TX FIFO with data + * to send, then sending the data by either forcing it (no CCA) or using + * backoffs to avoid collisions. + * + * The CSMA interface is provided to determine the properties of CCA + * and backoff durations. The use of call-backs is done very deliberately, + * described below. + * + * If you signal out an *event* to request an initial backoff and + * several components happen to be listening, then those components + * would be required to return a backoff value, regardless of whether or not + * those components are interested in affecting the backoff for the given + * AM type. We don't want that behavior. + * + * With a call back strategy, components can listen for the requests and then + * decide if they want to affect the behavior. If the component wants to + * affect the behavior, it calls back using the setXYZBackoff(..) command. + * If several components call back, then the last component to get its + * word in has the final say. + * + * @author David Moss + */ +configuration CsmaC { + provides { + interface Send; + interface Csma[am_id_t amId]; + interface Backoff as InitialBackoff[am_id_t amId]; + interface Backoff as CongestionBackoff[am_id_t amId]; + interface SplitControl; + } +} + +implementation { + + components CsmaP; + Send = CsmaP; + Csma = CsmaP; + InitialBackoff = CsmaP.InitialBackoff; + CongestionBackoff = CsmaP.CongestionBackoff; + SplitControl = CsmaP; + + components new BlazeSpiResourceC(); + CsmaP.Resource -> BlazeSpiResourceC; + + components BlazeTransmitC; + CsmaP.AsyncSend -> BlazeTransmitC.AsyncSend; + + components BlazePacketC; + CsmaP.BlazePacketBody -> BlazePacketC; + CsmaP.BlazePacket -> BlazePacketC; + + components new AlarmMultiplexC(); + CsmaP.BackoffTimer -> AlarmMultiplexC; + + components RandomC; + CsmaP.Random -> RandomC; + + components LedsC; + CsmaP.Leds -> LedsC; + +} diff --git a/tos/chips/ccxx00_single/csma/singlesense/CsmaP.nc b/tos/chips/ccxx00_single/csma/singlesense/CsmaP.nc new file mode 100644 index 0000000000..14a88ed913 --- /dev/null +++ b/tos/chips/ccxx00_single/csma/singlesense/CsmaP.nc @@ -0,0 +1,399 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Carrier Sense Multiple Access implementation + * Rather than use an IO line to measure CCA, we rely directly on the radio + * hardware to sample the CCA for us when attempting to transmit. + * + * @author David Moss + */ + +#include "Blaze.h" +#include "Csma.h" +#include "BlazeInit.h" + +module CsmaP { + provides { + interface Send; + interface Csma[am_id_t amId]; + interface Backoff as InitialBackoff[am_id_t amId]; + interface Backoff as CongestionBackoff[am_id_t amId]; + interface SplitControl; + } + + uses { + interface Resource; + interface AsyncSend; + interface Alarm as BackoffTimer; + interface BlazePacket; + interface BlazePacketBody; + interface Random; + interface Leds; + } +} + +implementation { + + /** The message we're sending */ + message_t *myMsg; + + + /** The amount of time to currently backoff initially */ + uint16_t myBackoff; + + /** Error to pass back in sendDone */ + error_t myError; + + /** State of this component */ + uint8_t state; + + enum { + MAXIMUM_PROGRESSIVE_BACKOFF = 0x400, + }; + + + enum { + S_IDLE, + S_SENDING, + S_BACKOFF, + S_FORCING, + S_CANCEL, + S_STOPPING, + }; + + /***************** Tasks ****************/ + task void forceSend(); + task void sendDone(); + + void requestCca(); + void requestInitialBackoff(); + void requestCongestionBackoff(); + + void initialBackoff(); + void congestionBackoff(); + + /***************** SplitControl Commands ****************/ + command error_t SplitControl.start() { + signal SplitControl.startDone(SUCCESS); + return SUCCESS; + } + + /** + * If we're busy, stop being busy so we can shut off this radio. + * Assume that if we're sending, we're trying to shut off the radio that + * we're sending to. Also assume that there's a SplitControlManager + * on top that will prevent the application layer from trying to send + * another packet after we've shut down. + */ + command error_t SplitControl.stop() { + if(state != S_IDLE) { + state = S_STOPPING; + + } else { + signal SplitControl.stopDone(SUCCESS); + } + + return SUCCESS; + } + + /***************** Send Commands ****************/ + /** + * By this point, the length should already be set in the message itself. + * @param msg the message to send + * @param len IGNORED + * @return SUCCESS if we're going to try to send the message. + * FAIL if you need to reevaluate your code + */ + command error_t Send.send(message_t* msg, uint8_t len) { + if(state != S_IDLE) { + return FAIL; + } + + state = S_BACKOFF; + + atomic { + myMsg = msg; + } + + requestCca(); + + if(!myBackoff) { + state = S_FORCING; + call Resource.request(); + + } else { + initialBackoff(); + } + + return SUCCESS; + } + + command error_t Send.cancel(message_t* msg) { + message_t *atomicMsg; + atomic atomicMsg = myMsg; + + if(state != S_IDLE && (msg == atomicMsg)) { + state = S_CANCEL; + return SUCCESS; + } + + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { + return TOSH_DATA_LENGTH; + } + + command void *Send.getPayload(message_t* msg, uint8_t len) { + if(len <= TOSH_DATA_LENGTH) { + return msg->data; + } else { + return NULL; + } + } + + /***************** Resource Events ****************/ + event void Resource.granted() { + if(state == S_BACKOFF) { + +#if BLAZE_CSMA_LEDS + call Leds.led2On(); +#endif + + if(call AsyncSend.send(myMsg, FALSE, (call BlazePacketBody.getMetadata(myMsg))->rxInterval) != SUCCESS) { + +#if BLAZE_CSMA_LEDS + call Leds.led2Off(); +#endif + + call Resource.release(); + congestionBackoff(); + } + + } else if(state == S_FORCING) { + post forceSend(); + + } else if(state == S_CANCEL || state == S_STOPPING) { + atomic myError = ECANCEL; + post sendDone(); + } + } + + /***************** AsyncSend Events ****************/ + + async event void AsyncSend.sendDone(error_t error) { + +#if BLAZE_CSMA_LEDS + call Leds.led2Off(); +#endif + + atomic myError = error; + post sendDone(); + } + + async event void AsyncSend.sending() { + } + + /***************** Backoff Commands ****************/ + /** + * Must be called within a requestInitialBackoff event + * @param backoffTime the amount of time in some unspecified units to backoff + */ + async command void InitialBackoff.setBackoff[am_id_t amId](uint16_t backoffTime) { + atomic myBackoff = backoffTime + 1; + } + + /** + * Must be called within a requestCongestionBackoff event + * @param backoffTime the amount of time in some unspecified units to backoff + */ + async command void CongestionBackoff.setBackoff[am_id_t amId](uint16_t backoffTime) { + atomic myBackoff = backoffTime + 1; + } + + /***************** CSMA Commands ****************/ + /** + * Must be called within a requestCca event + * @param cca TRUE to use cca for the outbound packet, FALSE to not use CCA + */ + async command void Csma.setCca[am_id_t amId](bool cca) { + atomic myBackoff = cca; + } + + + /***************** BackoffTimer Events ****************/ + async event void BackoffTimer.fired() { + +#if BLAZE_CSMA_LEDS + if((state == S_CANCEL) + || (state == S_STOPPING) + || (state == S_BACKOFF)) { + call Leds.led0Off(); + call Leds.led1Off(); + } +#endif + + if((state == S_CANCEL) || (state == S_STOPPING)) { + atomic myError = ECANCEL; + post sendDone(); + return; + } + + if(!(state == S_BACKOFF)) { + // not my event to handle + return; + } + + call Resource.request(); + } + + + /***************** Tasks ****************/ + /** + * The radio is programmed up to only Tx on CCA, which we're not going + * to change. Plus, it would be pointless to try to transmit while something + * is talking on the channel anyway. So we keep trying repetitively until + * the message sends. + * + * If what you're interested in is a jammer, then you need to edit + * some of the default register settings for this radio to disable the + * hardware CCA. + */ + task void forceSend() { + if(call AsyncSend.send(myMsg, TRUE, (call BlazePacketBody.getMetadata(myMsg))->rxInterval) != SUCCESS) { + if((state == S_CANCEL) || (state == S_STOPPING)) { + atomic myError = ECANCEL; + post sendDone(); + + } else { + post forceSend(); + } + } + } + + task void sendDone() { + error_t atomicError; + atomic atomicError = myError; + + call Resource.release(); + + if((state == S_STOPPING)) { + signal SplitControl.stopDone(SUCCESS); + } + + state = S_IDLE; + signal Send.sendDone(myMsg, atomicError); + } + + + /** + * Decide whether or not to use CCA for this transmission. + * When complete, the myBackoff variable will read TRUE to use CCA and FALSE + * to not use software CCA. + */ + void requestCca() { + atomic myBackoff = TRUE; + signal Csma.requestCca[(call BlazePacketBody.getHeader(myMsg))->type](myMsg); + } + + /** + * Obtain an inital backoff amount. + * When complete, the variable myBackoff will be filled with the + * correct amount of initial backoff time to use + */ + void requestInitialBackoff() { + atomic myBackoff = ( call Random.rand16() % + (0x1F * BLAZE_BACKOFF_PERIOD) + BLAZE_MIN_BACKOFF); + + signal InitialBackoff.requestBackoff[(call BlazePacketBody.getHeader(myMsg))->type](myMsg); + } + + /** + * Obtain a congestion backoff amount + * When complete, the variable myBackoff will be filled with the + * correct amount of congestion backoff time to use. + */ + void requestCongestionBackoff() { + atomic myBackoff = ( call Random.rand16() % + (0x7 * BLAZE_BACKOFF_PERIOD) + BLAZE_MIN_BACKOFF); + + signal CongestionBackoff.requestBackoff[(call BlazePacketBody.getHeader(myMsg))->type](myMsg); + } + + + /** + * Backoff for the initial backoff period of time + */ + void initialBackoff() { + uint16_t atomicBackoff; + requestInitialBackoff(); + atomic atomicBackoff = myBackoff; + +#if BLAZE_CSMA_LEDS + call Leds.led0On(); +#endif + + call BackoffTimer.start( atomicBackoff ); + } + + /** + * Backoff because of a congested channel + */ + void congestionBackoff() { + uint16_t atomicBackoff; + + requestCongestionBackoff(); + atomic atomicBackoff = myBackoff; + +#if BLAZE_CSMA_LEDS + call Leds.led1On(); +#endif + + call BackoffTimer.start( atomicBackoff ); + } + + + /***************** Defaults ****************/ + default event void Send.sendDone(message_t* msg, error_t error) { } + + default async command error_t AsyncSend.send(void *msg, bool force, uint16_t preamble) { } + + default async event void InitialBackoff.requestBackoff[am_id_t amId](message_t *msg) { } + default async event void CongestionBackoff.requestBackoff[am_id_t amId](message_t *msg) { } + default async event void Csma.requestCca[am_id_t amId](message_t *msg) { } + + default event void SplitControl.startDone(error_t error) { } + default event void SplitControl.stopDone(error_t error) { } + +} + + diff --git a/tos/chips/ccxx00_single/init/BlazeInit.h b/tos/chips/ccxx00_single/init/BlazeInit.h new file mode 100644 index 0000000000..4fb7ea8c0d --- /dev/null +++ b/tos/chips/ccxx00_single/init/BlazeInit.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ +#ifndef BLAZEINIT_H +#define BLAZEINIT_H + +#define blaze_init_t uint8_t + +#define BLAZE_TOTAL_INIT_REGISTERS 46 + +#endif + diff --git a/tos/chips/ccxx00_single/init/BlazeInitC.nc b/tos/chips/ccxx00_single/init/BlazeInitC.nc new file mode 100644 index 0000000000..f355cb3ba4 --- /dev/null +++ b/tos/chips/ccxx00_single/init/BlazeInitC.nc @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Initialize a CC1100 or CC2500 radio + * Note we combine both radios' I/O and interrupt lines here, providing + * them for other modules to access freely. + * + * @author David Moss + */ + +configuration BlazeInitC { + provides { + interface SplitControl; + interface BlazeCommit; + interface PowerNotifier; + } + + uses { + interface StdControl as RadioBootstrapStdControl; + } +} + +implementation { + + components + BlazeInitP, + BlazeSpiC, + BlazeCentralWiringC, + new BlazeSpiResourceC() as InitResourceC, + new BlazeSpiResourceC() as DeepSleepResourceC; + + SplitControl = BlazeInitP; + BlazeCommit = BlazeInitP; + PowerNotifier = BlazeInitP; + RadioBootstrapStdControl = BlazeInitP; + + BlazeInitP.Csn -> BlazeCentralWiringC.Csn; + BlazeInitP.Gdo0_io -> BlazeCentralWiringC.Gdo0_io; + BlazeInitP.Gdo2_io -> BlazeCentralWiringC.Gdo2_io; + BlazeInitP.Gdo0_int -> BlazeCentralWiringC.Gdo0_int; + BlazeInitP.Gdo2_int -> BlazeCentralWiringC.Gdo2_int; + BlazeInitP.BlazeRegSettings -> BlazeCentralWiringC.BlazeRegSettings; + + BlazeInitP.InitResource -> InitResourceC; + BlazeInitP.DeepSleepResource -> DeepSleepResourceC; + + BlazeInitP.SIDLE -> BlazeSpiC.SIDLE; + BlazeInitP.SXOFF -> BlazeSpiC.SXOFF; + BlazeInitP.SFRX -> BlazeSpiC.SFRX; + BlazeInitP.SFTX -> BlazeSpiC.SFTX; + BlazeInitP.SRX -> BlazeSpiC.SRX; + BlazeInitP.SPWD -> BlazeSpiC.SPWD; + BlazeInitP.RadioStatus -> BlazeSpiC.RadioStatus; + BlazeInitP.SNOP -> BlazeSpiC.SNOP; + BlazeInitP.SRES -> BlazeSpiC.SRES; + + BlazeInitP.RadioInit -> BlazeSpiC; + + BlazeInitP.PaReg -> BlazeSpiC.PA; + + components LedsC; + BlazeInitP.Leds -> LedsC; + +} + diff --git a/tos/chips/ccxx00_single/init/BlazeInitP.nc b/tos/chips/ccxx00_single/init/BlazeInitP.nc new file mode 100644 index 0000000000..4f8512a8ab --- /dev/null +++ b/tos/chips/ccxx00_single/init/BlazeInitP.nc @@ -0,0 +1,311 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * Due to hardware design and battery considerations, we can only have one radio + * on at a time. BlazeInit will protect this rule by storing and checking + * the enabled radio's ID. + * + * Also, some platforms might support the Power pin, which controls a FET + * switch that turns off the radio. For platforms that don't have a Power pin, + * the radio should go into a deep sleep mode. On platforms that do have a + * power pin, the radio will enter deep sleep then turn off completely. + * + * @author Jared Hill + * @author David Moss + */ + +#include "Blaze.h" +#include "BlazeInit.h" + +module BlazeInitP { + + provides { + interface SplitControl; + interface BlazeCommit; + interface PowerNotifier; + + interface ReceiveMode[uint8_t clientId]; + } + + uses { + interface StdControl as RadioBootstrapStdControl; + + interface Resource as InitResource; + interface Resource as DeepSleepResource; + + interface GeneralIO as Csn; + interface GeneralIO as Gdo0_io; + interface GeneralIO as Gdo2_io; + interface GpioInterrupt as Gdo0_int; + interface GpioInterrupt as Gdo2_int; + + interface BlazeRegSettings; + interface RadioStatus; + + interface RadioInit as RadioInit; + interface BlazeStrobe as SIDLE; + interface BlazeStrobe as SXOFF; + interface BlazeStrobe as SPWD; + interface BlazeStrobe as SFRX; + interface BlazeStrobe as SFTX; + interface BlazeStrobe as SRX; + interface BlazeStrobe as SNOP; + interface BlazeStrobe as SRES; + + interface BlazeRegister as PaReg; + + interface Leds; + } +} + +implementation { + + uint8_t currentOperation; + + uint8_t srxClient; + + enum { + S_STARTING, + S_COMMITTING, + S_RX, + }; + + /***************** Prototypes ****************/ + void deepSleep(); + + /************** SplitControl Commands**************/ + /** + * Power on and initialize the radio. + * It is up to higher layers to make sure this operation will be safe + * and will not conflict with another radio in the system + */ + command error_t SplitControl.start() { + atomic currentOperation = S_STARTING; + + call RadioBootstrapStdControl.start(); + + call InitResource.request(); + + return SUCCESS; + } + + /** + * Power down and shut off the radio + * It is up to higher layers to make sure this operation will be safe + * and will not conflict with another radio in the system + */ + command error_t SplitControl.stop() { + call Gdo0_int.disable(); + call Gdo2_int.disable(); + + if(call DeepSleepResource.immediateRequest() != SUCCESS) { + call DeepSleepResource.request(); + } else { + deepSleep(); + } + + call RadioBootstrapStdControl.stop(); + + return SUCCESS; + } + + /***************** BlazeCommit Commands ****************/ + /** + * Commit register changes in RAM to hardware. + * Note that this is not parameterized by radio to save footprint. + * The only radio we can commit changes to is the one that's currently + * turned on + * + * It is up to higher layers to make sure we aren't trying to commit + * registers to a different radio than the one currently turned on + */ + command error_t BlazeCommit.commit() { + currentOperation = S_COMMITTING; + call InitResource.request(); + return SUCCESS; + } + + + /***************** ReceiveMode Commands ****************/ + command void ReceiveMode.srx[uint8_t clientId]() { + srxClient = clientId; + currentOperation = S_RX; + + call SIDLE.strobe(); + call SRES.strobe(); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(4); +#endif + + while(call Gdo2_io.get()); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(0); +#endif + + call SIDLE.strobe(); + + call RadioInit.init(BLAZE_IOCFG2, + call BlazeRegSettings.getDefaultRegisters(), + BLAZE_TOTAL_INIT_REGISTERS); + } + + command void ReceiveMode.blockingSrx[uint8_t clientId]() { + uint8_t status; + uint8_t fail = 0; + call SRX.strobe(); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(5); +#endif + + while((status = call RadioStatus.getRadioStatus()) != BLAZE_S_RX) { + fail++; + if(fail == 0) { + break; + } + + call Csn.set(); + call Csn.clr(); + + if ((status == BLAZE_S_RXFIFO_OVERFLOW) || (status == BLAZE_S_TXFIFO_UNDERFLOW)) { + call SFRX.strobe(); + call SRX.strobe(); + + } else if ((status == BLAZE_S_CALIBRATE) || (status == BLAZE_S_SETTLING)) { + // do nothing but don't quit the loop + + } else { + call SRX.strobe(); + } + } + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(0); +#endif + + } + + + /***************** RadioInit Events ****************/ + event void RadioInit.initDone() { + + call Csn.set(); + call Csn.clr(); + call PaReg.write(call BlazeRegSettings.getPa()); + call Gdo0_int.enableRisingEdge(); + call ReceiveMode.blockingSrx[0](); + call Csn.set(); + + signal PowerNotifier.on(); + + call InitResource.release(); + + if(currentOperation == S_STARTING) { + signal SplitControl.startDone(SUCCESS); + + } else if(currentOperation == S_RX) { + signal ReceiveMode.srxDone[srxClient](); + + } else { + signal BlazeCommit.commitDone(); + } + } + + /***************** Resource Events ****************/ + event void InitResource.granted() { + call Gdo0_io.makeInput(); + call Gdo2_io.makeInput(); + + call Csn.set(); + call Csn.clr(); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(6); +#endif + + while(call Gdo2_io.get()); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(0); +#endif + + call SIDLE.strobe(); + + call RadioInit.init(BLAZE_IOCFG2, + call BlazeRegSettings.getDefaultRegisters(), + BLAZE_TOTAL_INIT_REGISTERS); + // Hang onto the InitResource until RadioInit has completed + } + + event void DeepSleepResource.granted() { + deepSleep(); + } + + /***************** Interrupts ****************/ + async event void Gdo0_int.fired() { + } + + async event void Gdo2_int.fired() { + } + + /***************** Functions ****************/ + void deepSleep() { + call Csn.clr(); + call SIDLE.strobe(); + call SPWD.strobe(); + call Csn.set(); + call DeepSleepResource.release(); + + signal PowerNotifier.off(); + + signal SplitControl.stopDone(SUCCESS); + } + + /***************** Tasks ****************/ + + /***************** Defaults ******************/ + default command blaze_init_t *BlazeRegSettings.getDefaultRegisters() { return NULL; } + default command uint8_t BlazeRegSettings.getPa() { return 0xC0; } + default event void BlazeCommit.commitDone() {} + + default event void ReceiveMode.srxDone[uint8_t clientId]() {} + + default event void PowerNotifier.on() {} + default event void PowerNotifier.off() {} + + default command error_t RadioBootstrapStdControl.start() { return SUCCESS; } + default command error_t RadioBootstrapStdControl.stop() { return SUCCESS; } + +} diff --git a/tos/chips/ccxx00_single/init/Ccxx00PlatformInitC.nc b/tos/chips/ccxx00_single/init/Ccxx00PlatformInitC.nc new file mode 100644 index 0000000000..94b8d9eb5e --- /dev/null +++ b/tos/chips/ccxx00_single/init/Ccxx00PlatformInitC.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Responsible for putting all radios into power down mode during PlatformInit. + * Simply reference this component from the ActiveMessageC configuration, + * and it will do its job. + * @author David Moss + */ + +configuration Ccxx00PlatformInitC { + uses { + interface Init as RadioPlatformInit; + } +} + +implementation { + components RealMainP, + Ccxx00PlatformInitP, + BlazeSpiC, + HplRadioSpiC, + BlazeCentralWiringC; + + RadioPlatformInit = Ccxx00PlatformInitP.RadioPlatformInit; + + RealMainP.PlatformInit -> Ccxx00PlatformInitP.PlatformInit; + + Ccxx00PlatformInitP.Resource -> HplRadioSpiC; + Ccxx00PlatformInitP.SIDLE -> BlazeSpiC.SIDLE; + Ccxx00PlatformInitP.SPWD -> BlazeSpiC.SPWD; + Ccxx00PlatformInitP.SRES -> BlazeSpiC.SRES; + + Ccxx00PlatformInitP.Csn -> BlazeCentralWiringC.Csn; + Ccxx00PlatformInitP.ChipRdy -> BlazeCentralWiringC.Gdo2_io; + Ccxx00PlatformInitP.Gdo0 -> BlazeCentralWiringC.Gdo0_io; + +} + diff --git a/tos/chips/ccxx00_single/init/Ccxx00PlatformInitP.nc b/tos/chips/ccxx00_single/init/Ccxx00PlatformInitP.nc new file mode 100644 index 0000000000..2960349d23 --- /dev/null +++ b/tos/chips/ccxx00_single/init/Ccxx00PlatformInitP.nc @@ -0,0 +1,121 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Blaze.h" + +/** + * @author David Moss + */ + +module Ccxx00PlatformInitP { + provides { + interface Init as PlatformInit; + } + + uses { + interface Resource; + + interface Init as RadioPlatformInit; + + interface BlazeStrobe as SIDLE; + interface BlazeStrobe as SPWD; + interface BlazeStrobe as SRES; + + interface GeneralIO as Csn; + interface GeneralIO as ChipRdy; + interface GeneralIO as Gdo0; + } +} + +implementation { + + /** + * Reset the radio + */ + void reset() { + call Csn.set(); + call Csn.clr(); + call SRES.strobe(); + call Csn.set(); + } + + /***************** PlatformInit Commands ****************/ + command error_t PlatformInit.init() { + uint16_t timeout; + + call Resource.immediateRequest(); + + call ChipRdy.makeInput(); + call Gdo0.makeInput(); + call Csn.makeOutput(); + call Csn.clr(); + + // First, wait for the chip to be ready to use. + timeout = 0; + while(call ChipRdy.get()) { + timeout++; + if(timeout > 10000) { + // Many times the ChipRdy line never drops low, causing our platform + // init to lock up completely. As usual, reset and pray. + reset(); + continue; + } + } + + // Second, do another reset. Yes, this is mandatory. + reset(); + call Csn.clr(); + while(call ChipRdy.get()); + + // Finally, put the radio to sleep. + call Csn.clr(); + + // Bootstrap any other radio things while CSN is low. + call RadioPlatformInit.init(); + + call SIDLE.strobe(); + call SPWD.strobe(); + call Csn.set(); + + call Resource.release(); + return SUCCESS; + } + + /***************** Resource Events ****************/ + event void Resource.granted() { + } + + /***************** Defaults ****************/ + default command error_t RadioPlatformInit.init() { + return SUCCESS; + } +} + diff --git a/tos/chips/ccxx00_single/init/ReceiveMode.h b/tos/chips/ccxx00_single/init/ReceiveMode.h new file mode 100644 index 0000000000..0e4a4c073d --- /dev/null +++ b/tos/chips/ccxx00_single/init/ReceiveMode.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#ifndef RECEIVEMODE_H +#define RECEIVEMODE_H + +#ifndef UQ_RECEIVE_MODE +#define UQ_RECEIVE_MODE "Unique.Receive.Mode" +#endif + +#endif diff --git a/tos/chips/ccxx00_single/init/ReceiveMode.nc b/tos/chips/ccxx00_single/init/ReceiveMode.nc new file mode 100644 index 0000000000..da1bcca8fb --- /dev/null +++ b/tos/chips/ccxx00_single/init/ReceiveMode.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * This interface was created in response to bad state logic on the CCxx00 + * radios. Advice from TI: reset the radio using SRES everytime before you + * put the radio into RX mode. + * @author David Moss + */ + +#include "Blaze.h" + +interface ReceiveMode { + + /** + * This is like a split-phase SRX.strobe() command: you must own the SPI + * bus resource and have set CSn low before calling this. + */ + command void srx(); + + /** + * Spinning while loop blocking everything until the radio has reached RX mode + * This does not reset the radio. + */ + command void blockingSrx(); + + /** + * The radio is now in RX mode. + */ + event void srxDone(); + +} + diff --git a/tos/chips/ccxx00_single/init/ReceiveModeC.nc b/tos/chips/ccxx00_single/init/ReceiveModeC.nc new file mode 100644 index 0000000000..da0a91c084 --- /dev/null +++ b/tos/chips/ccxx00_single/init/ReceiveModeC.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "ReceiveMode.h" + +/** + * Created in response to bad state logic on the CCxx00 + * radios. Advice from TI: reset the radio using SRES everytime before you + * put the radio into RX mode. To do this, we modify BlazeInitP to do an + * SRES followed by burst init, then an SRX and signal an event out to the + * proper client. Our SRX strobes become split-phase by doing this, so having + * each client parameterized makes state handling in the other modules easier. + * + * It is assumed that you own the SPI bus resource and have set the CSn pin + * low before attempting to call the ReceiveMode.srx() command. + * + * @author David Moss + */ +generic configuration ReceiveModeC() { + provides { + interface ReceiveMode; + } +} + +implementation { + + components BlazeInitP; + ReceiveMode = BlazeInitP.ReceiveMode[unique(UQ_RECEIVE_MODE)]; + +} diff --git a/tos/chips/ccxx00_single/interfaces/AckDetails.nc b/tos/chips/ccxx00_single/interfaces/AckDetails.nc new file mode 100644 index 0000000000..ef236a33c0 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/AckDetails.nc @@ -0,0 +1,35 @@ +/* tab:4 + * "Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + */ + +/** + * @author David Moss + */ + +interface AckDetails { + + /** + * @return TRUE if this packet should be acked, i.e. if the request ack + * bit is set and the destination is not the broadcast address + */ + async command bool shouldAck(message_t *msg); + +} diff --git a/tos/chips/ccxx00_single/interfaces/AckReceive.nc b/tos/chips/ccxx00_single/interfaces/AckReceive.nc new file mode 100644 index 0000000000..c9a718526e --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/AckReceive.nc @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Asynchronous acknowledgement receive interface. + * @author David Moss + */ + +#include "Blaze.h" + +interface AckReceive { + + async event void receive( blaze_ack_t *ackMsg ); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/AckSendNotifier.nc b/tos/chips/ccxx00_single/interfaces/AckSendNotifier.nc new file mode 100644 index 0000000000..0449904486 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/AckSendNotifier.nc @@ -0,0 +1,12 @@ + +/** + * @author David Moss + */ + +#include "Blaze.h" + +interface AckSendNotifier { + + async event void aboutToSend(blaze_ack_t *ack); + +} diff --git a/tos/chips/ccxx00_single/interfaces/AsyncSend.nc b/tos/chips/ccxx00_single/interfaces/AsyncSend.nc new file mode 100644 index 0000000000..d4fb8aa2c8 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/AsyncSend.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "message.h" + +interface AsyncSend { + + + /** + * Attempt to transmit a message. The first byte of *msg must be the length + * of the rest of the packet, not including the length byte. + * + * @param msg The first byte is the length byte of the rest of the packet, + * not including the length byte itself. + * @param force TRUE to force this packet to be sent, i.e. an acknowledgment + * @param preambleDurationMs The duration of the preamble in milliseconds, + * 0 to send to a full power listener. + * + * @return SUCCESS if the transmission will occur + * EBUSY if the channel is already in use + * FAIL if something else is already using the transmit module + */ + async command error_t send(void *msg, bool force, uint16_t preambleDurationMs); + + + /** + * This signal is a great time to take a battery reading if we have SVS + * built in. + */ + async event void sending(); + + /** + * Send is complete. + * @param error SUCCESS if the message was sent + * ESIZE if there was a TX or RX FIFO underflow + * EBUSY if the channel wasn't clear. + */ + async event void sendDone(error_t error); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/Backoff.nc b/tos/chips/ccxx00_single/interfaces/Backoff.nc new file mode 100644 index 0000000000..65fa103831 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/Backoff.nc @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Interface to request and specify backoff periods for messages + * + * We use a call back method for setting the backoff as opposed to + * events that return backoff values. + * + * This is because of fan-out issues with multiple components wanting to + * affect backoffs for whatever they're interested in: + * If you signal out an *event* to request an initial backoff and + * several components happen to be listening, then those components + * would be required to return a backoff value. We don't want that + * behavior. + + * With this strategy, components can listen for the requests and then + * decide if they want to affect the behavior. If the component wants to + * affect the behavior, it calls back using the setXYZBackoff(..) command. + * If several components call back, then the last component to get its + * word in has the final say. + * + * @author David Moss + */ + +interface Backoff { + + /** + * Set the backoff of the particular event. This must be called + * within the requestBackoff() event, otherwise it will be ignored. + * @param backoffTime the amount of time to backoff, in a uint32_t + * alarm. + */ + async command void setBackoff(uint16_t backoffTime); + + /** + * Request for input on the backoff + * Reply using setBackoff(..) + * @param msg pointer to the message being sent + */ + async event void requestBackoff(message_t *msg); + +} diff --git a/tos/chips/ccxx00_single/interfaces/BlazeCommit.nc b/tos/chips/ccxx00_single/interfaces/BlazeCommit.nc new file mode 100644 index 0000000000..7aedf48f1a --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazeCommit.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Used to notify BlazeInit to commit register changes for a particular radio + * to hardware + * @author David Moss + */ + +interface BlazeCommit { + + /** + * Commit changes made to a radio's registers stored in RAM on the + * microcontroller to the radio. + */ + command error_t commit(); + + event void commitDone(); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/BlazeConfig.nc b/tos/chips/ccxx00_single/interfaces/BlazeConfig.nc new file mode 100644 index 0000000000..04cd2b18e4 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazeConfig.nc @@ -0,0 +1,137 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ +/** + * @author Jared Hill + * @author David Moss + */ + +interface BlazeConfig { + + /** + * If changes have been made to the chip's configuration, those changes are + * currently stored in the microcontroller. This command will commit those + * changes to hardware. It must be called before any changes made by calling + * "set" functions within the BlazeConfig interface will take effect. + * @return SUCCESS if the changes will be committed. + */ + command error_t commit(); + + /** + * The hardware has been loaded with the currently defined configuration + */ + event void commitDone(); + + + /** + * @param on TRUE to turn address recognition on, FALSE to turn it off + * You must call sync() after this to propagate changes to hardware + */ + command void setAddressRecognition(bool on); + + /** + * @return TRUE if address recognition is enabled + */ + async command bool isAddressRecognitionEnabled(); + + /** + * @param on TRUE if we should only accept packets from other nodes in our PAN + */ + command void setPanRecognition(bool on); + + /** + * @return TRUE if PAN address recognition is enabled + */ + async command bool isPanRecognitionEnabled(); + + /** + * Sync must be called for acknowledgement changes to take effect + * @param enableAutoAck TRUE to enable auto acknowledgements + * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to + * default to software auto acknowledgements + */ + command void setAutoAck(bool enableAutoAck); + + /** + * @return TRUE if auto acks are enabled + */ + async command bool isAutoAckEnabled(); + + /** + * Set the base frequency. The unit depends on the type of chip you're using: + * > CC2500 is in MHz, so you'd say "2145" for 2145 MHz. + * > CC1100 is in Hz, so you'd say "315000000" for 315 MHz. + * + * You'll need to commit these changes when you're done. + * + * @param freq The desired frequency + * @return EINVAL if there's a problem + */ + command error_t setBaseFrequency(uint32_t freq); + + /** + * Get the base frequency, in whatever unit the radio uses. + * > CC2500 uses MHz + * > CC1100 uses Hz + * @return the base frequency + */ + command uint32_t getBaseFrequency(); + + /** + * This command is used to set the (approximate) frequency the radio. + * It uses the assumed base frequency, the assumed channel width and the changes the + * value in the channel register. + * @param freqKhz - the desired frequency in Khz to set the radio to + * @reutrn - EINVAL if desired frequency is not in range, else SUCCESS + */ + command error_t setChannelFrequencyKhz( uint32_t freqKhz ); + + /** + * This command is used to get the current (approximate) frequency the radio is set to in KHz. + * It uses the assumed base frequency, the assumed channel width and the current value in the + * channel register to calculate this. + * @return approx. frequency in KHz + */ + command uint32_t getChannelFrequencyKhz(); + + /** + * This command sets the value of the channel register on the radio + * @param chan - the value of the channel + * @return EINVAL if the desired channel is not in range, else SUCCESS + */ + command error_t setChannel( uint8_t chan ); + + /** + * This command returns the value of the channel register on the radio + * @return the value of the channel register + */ + command uint8_t getChannel(); + +} diff --git a/tos/chips/ccxx00_single/interfaces/BlazeFifo.nc b/tos/chips/ccxx00_single/interfaces/BlazeFifo.nc new file mode 100644 index 0000000000..c856a6e025 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazeFifo.nc @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * HAL abstraction for accessing the FIFO registers of a ChipCon + * CC2420 radio. + * + * @author Jonathan Hui + * @version $Revision$ $Date$ + */ + +#include "Blaze.h" + +interface BlazeFifo { + + /** + * Start reading from the FIFO. The readDone event will + * be signalled upon completion. + * + * @param data a pointer to the receive buffer. + * @param length number of bytes to read. + * @return status byte returned when sending the last address byte + * of the SPI transaction. + */ + async command blaze_status_t beginRead( uint8_t* data, uint8_t length ); + + /** + * Continue reading from the FIFO without having to send the address + * byte again. The readDone event will be signalled + * upon completion. + * + * @param data a pointer to the receive buffer. + * @param length number of bytes to read. + * @return SUCCESS always. + */ + async command error_t continueRead( uint8_t* data, uint8_t length ); + + /** + * Signals the completion of a read operation. + * + * @param data a pointer to the receive buffer. + * @param length number of bytes read. + * @param error notification of how the operation went + */ + async event void readDone( uint8_t* data, uint8_t length, error_t error ); + + /** + * Start writing the FIFO. The writeDone event will be + * signalled upon completion. + * + * @param data a pointer to the send buffer. + * @param length number of bytes to write. + * @return status byte returned when sending the last address byte + * of the SPI transaction. + */ + async command blaze_status_t write( uint8_t* data, uint8_t length ); + + /** + * Signals the completion of a write operation. + * + * @param data a pointer to the send buffer. + * @param length number of bytes written. + * @param error notification of how the operation went + */ + async event void writeDone( uint8_t* data, uint8_t length, error_t error ); + +} diff --git a/tos/chips/ccxx00_single/interfaces/BlazePacket.nc b/tos/chips/ccxx00_single/interfaces/BlazePacket.nc new file mode 100644 index 0000000000..42fb89d427 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazePacket.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Jonathan Hui + * @version $Revision$ $Date$ + */ + + #include "Blaze.h" + +interface BlazePacket { + + /** + * Get rssi value for a given packet. For received packets, it is + * the received signal strength when receiving that packet. For sent + * packets, it is the received signal strength of the ack if an ack + * was received. + */ + async command int8_t getRssi( message_t* p_msg ); + + /** + * Get lqi value for a given packet. For received packets, it is the + * link quality indicator value when receiving that packet. For sent + * packets, it is the link quality indicator value of the ack if an + * ack was received. + */ + async command uint8_t getLqi( message_t* p_msg ); + + /** + * Set the Packet Pending bit in the header + */ + async command void setPacketPending(message_t *msg, bool packetPending); + + /** + * @return TRUE if the packet pending bit is set in the given packet + */ + async command bool isPacketPending(message_t *msg); +} diff --git a/tos/chips/ccxx00_single/interfaces/BlazePacketBody.nc b/tos/chips/ccxx00_single/interfaces/BlazePacketBody.nc new file mode 100644 index 0000000000..70bc94687f --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazePacketBody.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * Internal interface for Blaze to get portions of a packet. + * @author David Moss + */ + +#include "Blaze.h" + +interface BlazePacketBody { + + /** + * @return pointer to the blaze_header_t of the given message + */ + async command blaze_header_t *getHeader(message_t *msg); + + /** + * @return pointer to the blaze_metadata_t of the given message + */ + async command blaze_metadata_t *getMetadata(message_t *msg); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/BlazeRegSettings.nc b/tos/chips/ccxx00_single/interfaces/BlazeRegSettings.nc new file mode 100644 index 0000000000..b5b6dea8ef --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazeRegSettings.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "BlazeInit.h" + +/** + * Obtain the default register values for radio initialization + * @author David Moss + */ + +interface BlazeRegSettings { + + command uint8_t *getDefaultRegisters(); + + /** + * @return the power amplifier register setting + */ + command uint8_t getPa(); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/BlazeRegister.nc b/tos/chips/ccxx00_single/interfaces/BlazeRegister.nc new file mode 100644 index 0000000000..b34537b912 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazeRegister.nc @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * @author Philip Levis + * @author Jared Hill + * @author David Moss + */ + +#include "Blaze.h" + +interface BlazeRegister { + + /** + * Read a 8-bit data word from the register. + * + * @param data pointer to place the register value. + * @return status byte from the read. + */ + async command blaze_status_t read(uint8_t* data); + + /** + * Write a 8-bit data word to the register. + * + * @param data value to write to register. + * @return status byte from the write. + */ + async command blaze_status_t write(uint8_t data); + + +} diff --git a/tos/chips/ccxx00_single/interfaces/BlazeSpiPacket.nc b/tos/chips/ccxx00_single/interfaces/BlazeSpiPacket.nc new file mode 100644 index 0000000000..eed974e66b --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazeSpiPacket.nc @@ -0,0 +1,74 @@ +// $Id$ + +/* tab:2 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ + +/** + * SPI Packet/buffer interface for sending data over an SPI bus. This + * interface provides a split-phase send command which can be used for + * sending, receiving or both. It is a "send" command because reading + * from the SPI requires writing bytes. The send call allows NULL + * parameters for receive or send only operations. This interface is + * for buffer based transfers where the microcontroller is the master + * (clocking) device. + * + * Often, an SPI bus must first be acquired using a Resource interface + * before sending commands with SPIPacket. In the case of multiple + * devices attached to a single SPI bus, chip select pins are often also + * used. + * + * @author Philip Levis + * @author Jonathan Hui + * @author Joe Polastre + * Revision: $Revision$ + */ +interface BlazeSpiPacket { + + /** + * Send a message over the SPI bus. + * + * @param txBuf A pointer to the buffer to send over the bus. If this + * parameter is NULL, then the SPI will send zeroes. + * @param rxBuf A pointer to the buffer where received data should + * be stored. If this parameter is NULL, then the SPI will + * discard incoming bytes. + * @param len Length of the message. Note that non-NULL rxBuf and txBuf + * parameters must be AT LEAST as large as len, or the SPI + * will overflow a buffer. + * + * @return SUCCESS if the request was accepted for transfer + */ + async command error_t send( uint8_t address, uint8_t* txBuf, uint8_t* rxBuf, uint16_t len ); + + /** + * Notification that the send command has completed. + * + * @param txBuf The buffer used for transmission + * @param rxBuf The buffer used for reception + * @param len The request length of the transfer, but not necessarily + * the number of bytes that were actually transferred + * @param error SUCCESS if the operation completed successfully, FAIL + * otherwise + */ + async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, + error_t error ); + +} diff --git a/tos/chips/ccxx00_single/interfaces/BlazeStrobe.nc b/tos/chips/ccxx00_single/interfaces/BlazeStrobe.nc new file mode 100644 index 0000000000..c1c34c4b9a --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazeStrobe.nc @@ -0,0 +1,47 @@ +/* tab:4 + * "Copyright (c) 2005 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + * + */ + +/** + * Interface representing one of the CC2420 command strobe registers. + * Writing to one of these registers enacts a command on the CC2420, + * such as power-up, transmission, or clear a FIFO. + * + * @author Philip Levis + * @version $Revision$ $Date$ + */ + +#include "Blaze.h" + +interface BlazeStrobe { + + /** + * Send a command strobe to the register. The return value is the + * Blaze status register. Table 5 on page 27 of the CC2420 + * datasheet (v1.2) describes the contents of this register. + * + * @return Status byte from the Blaze. + */ + async command blaze_status_t strobe(); + +} diff --git a/tos/chips/ccxx00_single/interfaces/BlazeTransmit.nc b/tos/chips/ccxx00_single/interfaces/BlazeTransmit.nc new file mode 100644 index 0000000000..71a800a2d1 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/BlazeTransmit.nc @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2005-2006 Arch Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arch Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Low-level abstraction for the transmit path implementaiton of the + * ChipCon CC2420 radio. + * + * @author Jonathan Hui + * @version $Revision$ $Date$ + */ + +interface BlazeTransmit { + + /** + * Send a message with CCA enabled. + * + * @param p_msg message to send. + * @return SUCCESS if the request was accepted, FAIL otherwise. + */ + async command error_t sendCCA( message_t* p_msg ); + + /** + * Send a message with CCA disabled. + * + * @param p_msg message to send. + * @return SUCCESS if the request was accepted, FAIL otherwise. + */ + async command error_t send( message_t* p_msg ); + + /** + * Send the previous message again with CCA enabled. + * + * @return SUCCESS if the request was accepted, FAIL otherwise. + */ + async command error_t resendCCA(); + + /** + * Send the previous message again with CCA disabled. + * + * @return SUCCESS if the request was accepted, FAIL otherwise. + */ + async command error_t resend(); + + /** + * Cancel sending of the message. + * + * @return SUCCESS if the request was accepted, FAIL otherwise. + */ + async command error_t cancel(); + + /** + * Signal that a message has been sent + * + * @param p_msg message to send. + * @param error notifaction of how the operation went. + */ + async event void sendDone( message_t* p_msg, error_t error ); + + /** + * Modify the contents of a packet. This command can only be used + * when an SFD capture event for the sending packet is signalled. + * + * @param offset in the message to start modifying. + * @param buf to data to write + * @param len of bytes to write + * @return SUCCESS if the request was accepted, FAIL otherwise. + */ + async command error_t modify( uint8_t offset, uint8_t* buf, uint8_t len ); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/ChipSpiResource.nc b/tos/chips/ccxx00_single/interfaces/ChipSpiResource.nc new file mode 100644 index 0000000000..1c83ebb42f --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/ChipSpiResource.nc @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Interface for the SPI resource for an entire chip. The chip accesses + * the platform SPI resource one time, but can have multiple clients + * using the SPI bus on top. When all of the clients are released, the + * chip will normally try to release itself from the platforms SPI bus. + * In some cases, this isn't desirable - so even though upper components + * aren't actively using the SPI bus, they can tell the chip to hold onto + * it so they can have immediate access when they need. + * + * Any component that aborts a release MUST attempt the release at a later + * time if they don't acquire and release the SPI bus naturally after the + * abort. + * + * @author David Moss + */ +interface ChipSpiResource { + + /** + * The SPI bus is about to be automatically released. Modules that aren't + * using the SPI bus but still want the SPI bus to stick around must call + * abortRelease() within the event. + */ + async event void releasing(); + + + /** + * Abort the release of the SPI bus. This must be called only with the + * releasing() event + */ + async command void abortRelease(); + + /** + * Release the SPI bus if there are no objections + * @return SUCCESS if the SPI bus is released from the chip. + * FAIL if the SPI bus is already in use. + * EBUSY if some component aborted the release. + */ + async command error_t attemptRelease(); + +} diff --git a/tos/chips/ccxx00_single/interfaces/Csma.nc b/tos/chips/ccxx00_single/interfaces/Csma.nc new file mode 100644 index 0000000000..e14d5570c4 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/Csma.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * Enable or disable clear channel assessments on a per-packet basis + * for CSMA + * @author David Moss + */ + +interface Csma { + + /** + * Enable CCA for the outbound packet. Must be called within a requestCca + * event + * @param ccaOn TRUE to enable CCA, which is the default. + */ + async command void setCca(bool ccaOn); + + /** + * Request for input on whether or not to use CCA on the outbound packet. + * Replies should come in the form of setCca(..) + * @param msg pointer to the message being sent + */ + async event void requestCca(message_t *msg); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/LowPowerListening.nc b/tos/chips/ccxx00_single/interfaces/LowPowerListening.nc new file mode 100644 index 0000000000..bf4aa81b32 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/LowPowerListening.nc @@ -0,0 +1,18 @@ + +/** + * @author David Moss + * @author Razvan Musaloiu-E. + */ + +interface LowPowerListening { + + command void setLocalWakeupInterval(uint16_t intervalMs); + + command uint16_t getLocalWakeupInterval(); + + command void setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs); + + command uint16_t getRemoteWakeupInterval(message_t *msg); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/PacketLink.nc b/tos/chips/ccxx00_single/interfaces/PacketLink.nc new file mode 100644 index 0000000000..c94215d513 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/PacketLink.nc @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + * @author Jon Wyant + */ + +interface PacketLink { + + /** + * Set the maximum number of times attempt message delivery + * Default is 0 + * @param msg + * @param maxRetries the maximum number of attempts to deliver + * the message + */ + command void setRetries(message_t *msg, uint8_t maxRetries); + + /** + * Set a delay between each retry attempt + * @param msg + * @param retryDelay the delay betweeen retry attempts, in bms + */ + command void setRetryDelay(message_t *msg, uint16_t retryDelay); + + /** + * @return the maximum number of retry attempts for this message + */ + command uint8_t getRetries(message_t *msg); + + /** + * @return the delay between retry attempts in bms for this message + */ + command uint16_t getRetryDelay(message_t *msg); + + /** + * @return TRUE if the message was delivered. + */ + command bool wasDelivered(message_t *msg); + +} + + diff --git a/tos/chips/ccxx00_single/interfaces/PowerNotifier.nc b/tos/chips/ccxx00_single/interfaces/PowerNotifier.nc new file mode 100644 index 0000000000..ed74cad297 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/PowerNotifier.nc @@ -0,0 +1,16 @@ + + +/** + * Interface to indicate when the radio is actually powered on and powered off, + * to be used by an external module that might care to keep track of the + * actual radio duty cycle and on-time. + * @author David Moss + */ + +interface PowerNotifier { + + event void on(); + + event void off(); + +} diff --git a/tos/chips/ccxx00_single/interfaces/RadioInit.nc b/tos/chips/ccxx00_single/interfaces/RadioInit.nc new file mode 100644 index 0000000000..5880adc697 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/RadioInit.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * Initialize some registers on the radio + * @author Jared Hill + * @author David Moss + */ + +interface RadioInit { + + command error_t init(uint8_t startAddr, uint8_t* initValues, uint8_t len); + + event void initDone(); + +} + + diff --git a/tos/chips/ccxx00_single/interfaces/RadioSelect.nc b/tos/chips/ccxx00_single/interfaces/RadioSelect.nc new file mode 100644 index 0000000000..ce53ec68aa --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/RadioSelect.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#include "Blaze.h" + +interface RadioSelect{ + + /** + * Select the radio to be used to send this message + * @param msg The message to configure that will be sent in the future + * @param radioId The radio ID to use when sending this message. + * See CC1100.h or CC2500.h for definitions, the ID is either + * CC1100_RADIO_ID or CC2500_RADIO_ID. + * @return SUCCESS if the radio ID was set. EINVAL if you have selected + * an invalid radio + */ + command error_t selectRadio(message_t *msg, radio_id_t radioId); + + /** + * Get the radio ID this message will use to transmit when it is sent + * @param msg The message to extract the radio ID from + * @return The ID of the radio selected for this message + */ + command radio_id_t getRadio(message_t *msg); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/RadioStatus.nc b/tos/chips/ccxx00_single/interfaces/RadioStatus.nc new file mode 100644 index 0000000000..da31ad140e --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/RadioStatus.nc @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Get the state of the radio hardware + * @author David Moss + */ + +#include "Blaze.h" + +interface RadioStatus { + + async command blaze_status_t getRadioStatus(); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/SendNotifier.nc b/tos/chips/ccxx00_single/interfaces/SendNotifier.nc new file mode 100644 index 0000000000..4f28397213 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/SendNotifier.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * The radio stack notifies the entire system that it is about to send + * a packet. Other modules in the system can call back within this event + * to modify the packet's metadata. For example, we can setup a module + * in the system to make every CTP data packet send with low power listening + * enabled: + * + * event void SendNotifier.aboutToSend[am_id_t amId](uint8_t dest, + * message_t *msg) { + * call LowPowerListening.setRxSleepInterval(msg, 512); + * } + * + * @author David Moss + */ + +#include "message.h" +#include "AM.h" + +interface SendNotifier { + + /** + * The system is about to send this message. Fill in any last modifications + * and the message will be sent. + * + * @param dest The destination address of the messsage + * @param msg The message about to be transmitted + */ + event void aboutToSend(am_addr_t dest, message_t *msg); + +} diff --git a/tos/chips/ccxx00_single/interfaces/SplitControlManager.nc b/tos/chips/ccxx00_single/interfaces/SplitControlManager.nc new file mode 100644 index 0000000000..1967b3aa74 --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/SplitControlManager.nc @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * It allows other areas of the system to see what the current status is of + * any radio. + * + * @author David Moss + */ + +#include "SplitControlManager.h" +#include "Blaze.h" + +interface SplitControlManager { + + /** + * @return TRUE if the radio is currently enabled + */ + command bool isOn(); + + /** + * @return the state of the radio + */ + command radio_state_t getState(); + + + /** + * Notification that this radio is undergoing a state change. + * The state will either be CCXX00_TURNING_ON or CCXX00_TURNING_OFF + * as defined in SplitControlManager.h + */ + event void stateChange(); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/SystemLowPowerListening.nc b/tos/chips/ccxx00_single/interfaces/SystemLowPowerListening.nc new file mode 100644 index 0000000000..6a696f1bad --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/SystemLowPowerListening.nc @@ -0,0 +1,13 @@ + +interface SystemLowPowerListening { + + command void setDefaultRemoteWakeupInterval(uint16_t intervalMs); + + command void setDelayAfterReceive(uint16_t intervalMs); + + command uint16_t getDefaultRemoteWakeupInterval(); + + command uint16_t getDelayAfterReceive(); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/TrafficControl.nc b/tos/chips/ccxx00_single/interfaces/TrafficControl.nc new file mode 100644 index 0000000000..1e7e4bd00f --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/TrafficControl.nc @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +interface TrafficControl { + + /** + * TrafficControl is disabled by default, which is the behavior + * users normally expect. + * @param active TRUE to enable TrafficControl, FALSE to disable it. + */ + command void enable(bool active); + + /** + * @param delay the amount of time to place between packets. This delay + * will adapt to channel conditions. + */ + command void setDelay(uint16_t delay); + + /** + * @return The current delay between transmissions + */ + command uint16_t getDelay(); + +} + diff --git a/tos/chips/ccxx00_single/interfaces/TrafficPriority.nc b/tos/chips/ccxx00_single/interfaces/TrafficPriority.nc new file mode 100644 index 0000000000..40c01a3b7c --- /dev/null +++ b/tos/chips/ccxx00_single/interfaces/TrafficPriority.nc @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +interface TrafficPriority { + + /** + * Users must call back using the setPriority() command within the event. + * + * @param msg The message being sent + * @param destination The destination address of the message + */ + event void requestPriority(am_addr_t destination, message_t *msg); + + /** + * This may only be called within the requestPriority() event, otherwise + * it has no effect. If you do not call it, the packet will be sent with + * default low priority, which is 0. The highest priority is 5. + * In most cases, 0 represents a normal packet and anything above 0 represents + * the highest priority packet. + * @param priority The priority of the packet between 0 (lowest) and 5 + * (highest) + */ + command void setPriority(uint8_t priority); + +} + diff --git a/tos/chips/ccxx00_single/link/PacketLinkC.nc b/tos/chips/ccxx00_single/link/PacketLinkC.nc new file mode 100644 index 0000000000..4e64f9a2d4 --- /dev/null +++ b/tos/chips/ccxx00_single/link/PacketLinkC.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Dummy configuration for PacketLink Layer + * @author David Moss + * @author Jon Wyant + */ + +configuration PacketLinkC { + provides { + interface Send; + interface PacketLink; + } + + uses { + interface Send as SubSend; + } +} + +implementation { + components PacketLinkDummyP, + AcknowledgementsC; + + PacketLink = PacketLinkDummyP; + Send = SubSend; + + PacketLinkDummyP.PacketAcknowledgements -> AcknowledgementsC; + +} + diff --git a/tos/chips/ccxx00_single/link/PacketLinkDummyP.nc b/tos/chips/ccxx00_single/link/PacketLinkDummyP.nc new file mode 100644 index 0000000000..2a31414345 --- /dev/null +++ b/tos/chips/ccxx00_single/link/PacketLinkDummyP.nc @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Dummy module for Packet Link layer + * @author David Moss + * @author Jon Wyant + */ + +#warning "Stubbing out PacketLink" + +module PacketLinkDummyP { + provides { + interface PacketLink; + } + + uses { + interface PacketAcknowledgements; + } +} + +implementation { + + /***************** PacketLink Commands ***************/ + /** + * Set the maximum number of times attempt message delivery + * Default is 0 + * @param msg + * @param maxRetries the maximum number of attempts to deliver + * the message + */ + command void PacketLink.setRetries(message_t *msg, uint8_t maxRetries) { + } + + /** + * Set a delay between each retry attempt + * @param msg + * @param retryDelay the delay betweeen retry attempts, in bms + */ + command void PacketLink.setRetryDelay(message_t *msg, uint16_t retryDelay) { + } + + /** + * @return the maximum number of retry attempts for this message + */ + command uint8_t PacketLink.getRetries(message_t *msg) { + return 0; + } + + /** + * @return the delay between retry attempts in bms for this message + */ + command uint16_t PacketLink.getRetryDelay(message_t *msg) { + return 0; + } + + /** + * @return TRUE if the message was delivered. + */ + command bool PacketLink.wasDelivered(message_t *msg) { + return call PacketAcknowledgements.wasAcked(msg); + } + +} + diff --git a/tos/chips/ccxx00_single/link/readme.txt b/tos/chips/ccxx00_single/link/readme.txt new file mode 100644 index 0000000000..6793e1d100 --- /dev/null +++ b/tos/chips/ccxx00_single/link/readme.txt @@ -0,0 +1,6 @@ +PacketLink is used for link-layer retransmissions guided by your own +application requirements. It will fail if it receives false-acknowledgements, +which is completely possible in 802.15.4. + +See TEP 127 for more details. + diff --git a/tos/chips/ccxx00_single/lpl/alwayson/AlwaysOn.h b/tos/chips/ccxx00_single/lpl/alwayson/AlwaysOn.h new file mode 100644 index 0000000000..b6494ef1fb --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/alwayson/AlwaysOn.h @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Make sure we aren't trying to compile multiple LPL directories into the + * radio stack + */ + +#ifndef ALWAYSON_H +#define ALWAYSON_H + +#ifndef BLAZE_LPL_DEFINED +#define BLAZE_LPL_DEFINED +#else +#warning "You are attempting to include multiple LPL paths at compile time." +#error "Choose a single LPL directory in your compiler path and recompile." +#endif + + +#endif + diff --git a/tos/chips/ccxx00_single/lpl/alwayson/LplC.nc b/tos/chips/ccxx00_single/lpl/alwayson/LplC.nc new file mode 100644 index 0000000000..0e370285a6 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/alwayson/LplC.nc @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Dummy low power listening interface used when LowPowerListening is not + * compiled in with the application. + * Sleep interval is always 0, and duty cycle is always 100% + * @author David Moss + */ + +#include "Blaze.h" +#include "AlwaysOn.h" + +configuration LplC { + provides { + interface Send; + interface Receive; + interface LowPowerListening; + interface SystemLowPowerListening; + interface SplitControl; + interface State as SendState; + } + + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface SplitControl as SubControl; + } +} + +implementation { + components LplP; + components new StateC(); + + Send = SubSend; + Receive = SubReceive; + SplitControl = SubControl; + LowPowerListening = LplP; + SystemLowPowerListening = LplP; + SendState = StateC; + +} + diff --git a/tos/chips/ccxx00_single/lpl/alwayson/LplP.nc b/tos/chips/ccxx00_single/lpl/alwayson/LplP.nc new file mode 100644 index 0000000000..c9634a329f --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/alwayson/LplP.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Dummy low power listening interface used when LowPowerListening is not + * compiled in with the application. + * Wakeup interval is always 0, and duty cycle is always 100% + * @author David Moss + */ + +#include "AlwaysOn.h" + +module LplP { + provides { + interface LowPowerListening; + interface SystemLowPowerListening; + } +} + +implementation { + + + /***************** SystemLowPowerListening Commands ***************/ + command void SystemLowPowerListening.setDefaultRemoteWakeupInterval(uint16_t intervalMs) { + } + + command void SystemLowPowerListening.setDelayAfterReceive(uint16_t intervalMs) { + } + + command uint16_t SystemLowPowerListening.getDefaultRemoteWakeupInterval() { + return 0; + } + + command uint16_t SystemLowPowerListening.getDelayAfterReceive() { + return 0; + } + + /***************** LowPowerListening Commands ****************/ + command void LowPowerListening.setLocalWakeupInterval(uint16_t wakeupIntervalMs) { + } + + command uint16_t LowPowerListening.getLocalWakeupInterval() { + return 0; + } + + command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t wakeupIntervalMs) { + } + + command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { + return 0; + } + + + +} + diff --git a/tos/chips/ccxx00_single/lpl/bmac/Lpl.h b/tos/chips/ccxx00_single/lpl/bmac/Lpl.h new file mode 100644 index 0000000000..faa235d37b --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/bmac/Lpl.h @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#ifndef BMACLPL_H +#define BMACLPL_H + +#ifndef BLAZE_LPL_DEFINED +#define BLAZE_LPL_DEFINED +#else +#warning "You are attempting to include multiple LPL paths at compile time." +#error "Choose a single LPL directory in your compiler path and recompile." +#endif + +/** + * Not measured + */ +#ifndef DUTY_ON_TIME +#define DUTY_ON_TIME 11 +#endif + + +#endif + diff --git a/tos/chips/ccxx00_single/lpl/bmac/LplC.nc b/tos/chips/ccxx00_single/lpl/bmac/LplC.nc new file mode 100644 index 0000000000..1b22102f67 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/bmac/LplC.nc @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#include "Lpl.h" +#include "Blaze.h" + +configuration LplC { + provides { + interface LowPowerListening; + interface SystemLowPowerListening; + interface Send; + interface Receive; + interface SplitControl; + } + + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface SplitControl as SubControl; + } +} + +implementation { + components MainC, + LplP, + PowerCycleC, + BlazePacketC; + + + /** SplitControl */ + SplitControl = PowerCycleC.SplitControl; + SubControl = PowerCycleC.SubControl; + + /** Receive */ + Receive = PowerCycleC.Receive; + PowerCycleC.SubReceive = SubReceive; + + /** Send */ + Send = PowerCycleC.Send; + SubSend = PowerCycleC.SubSend; + + /** LowPowerListening */ + LowPowerListening = LplP.LowPowerListening; + SystemLowPowerListening = PowerCycleC; + + + LplP.PowerCycle -> PowerCycleC; + LplP.BlazePacketBody -> BlazePacketC; + +} diff --git a/tos/chips/ccxx00_single/lpl/bmac/LplP.nc b/tos/chips/ccxx00_single/lpl/bmac/LplP.nc new file mode 100644 index 0000000000..08dc0cd880 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/bmac/LplP.nc @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#include "Lpl.h" +#include "AM.h" +#include "Blaze.h" + +module LplP { + provides { + interface LowPowerListening; + } + + uses { + interface PowerCycle; + interface BlazePacketBody; + } +} + +implementation { + + enum { + STATIC_WAKEUP_INCREASE = 5, + }; + + /***************** LowPowerListening Commands ***************/ + command void LowPowerListening.setLocalWakeupInterval( + uint16_t sleepIntervalMs) { + call PowerCycle.setSleepInterval(sleepIntervalMs); + } + + command uint16_t LowPowerListening.getLocalWakeupInterval() { + return call PowerCycle.getSleepInterval(); + } + + command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, + uint16_t sleepIntervalMs) { + if(sleepIntervalMs > 0) { + (call BlazePacketBody.getMetadata(msg))->rxInterval = sleepIntervalMs + STATIC_WAKEUP_INCREASE; + } + } + + command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { + uint16_t currentRxInterval = (call BlazePacketBody.getMetadata(msg))->rxInterval; + + if(currentRxInterval > 0) { + return currentRxInterval - STATIC_WAKEUP_INCREASE; + } + + return 0; + } + + +} + diff --git a/tos/chips/ccxx00_single/lpl/bmac/PowerCycle.h b/tos/chips/ccxx00_single/lpl/bmac/PowerCycle.h new file mode 100644 index 0000000000..009b8f1d3a --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/bmac/PowerCycle.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + + +#ifndef POWERCYCLE_H +#define POWERCYCLE_H + +#ifndef DELAY_AFTER_ACTIVITY +#define DELAY_AFTER_ACTIVITY 1 +#endif + +/** + * Every time a transmitter is detected, the transmitterQualityThreshold + * is increased, to a maximum of TRANSMITTER_QUALITY_THRESHOLD. Every time + * a transmitter is not found, the variable is decreased until it reaches 0. + * When it reaches 0 (even on the first detect attempt), we turn off the radio. + * + * This lets us miss a single energy detect if the transmission is a little + * flakey, without turning off the radio immediately. It adds hysteresis. + */ +#ifndef TRANSMITTER_QUALITY_THRESHOLD +#define TRANSMITTER_QUALITY_THRESHOLD 4 +#endif + +#endif diff --git a/tos/chips/ccxx00_single/lpl/bmac/PowerCycle.nc b/tos/chips/ccxx00_single/lpl/bmac/PowerCycle.nc new file mode 100644 index 0000000000..5e4eb6b454 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/bmac/PowerCycle.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Manage the CC2420's duty cycle and power management + * @author David Moss + */ + +interface PowerCycle { + + /** + * Set the sleep interval, in binary milliseconds + * @param sleepIntervalMs the sleep interval in [ms] + */ + command void setSleepInterval(uint16_t sleepIntervalMs); + + /** + * @return the sleep interval in [ms] + */ + command uint16_t getSleepInterval(); + +} + diff --git a/tos/chips/ccxx00_single/lpl/bmac/PowerCycleC.nc b/tos/chips/ccxx00_single/lpl/bmac/PowerCycleC.nc new file mode 100644 index 0000000000..d1b941a656 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/bmac/PowerCycleC.nc @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Use this component to duty cycle the radio. When a message is heard, + * disable DutyCycling. + * + * @author David Moss dmm@rincon.com + */ + +configuration PowerCycleC { + provides { + interface PowerCycle; + interface SplitControl; + interface Receive; + interface Send; + interface SystemLowPowerListening; + } + + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface SplitControl as SubControl; + } +} + +implementation { + components PowerCycleP, + MainC, + LedsC, + new TimerMilliC() as OnTimerC, + //PeriodicTimerC as OnTimerC, + new TimerMilliC() as OffTimerC; + + /** PowerCycle */ + PowerCycle = PowerCycleP; + SystemLowPowerListening = PowerCycleP; + + /** SplitControl */ + SplitControl = PowerCycleP.SplitControl; + SubControl = PowerCycleP.SubControl; + + /** Receive */ + Receive = PowerCycleP.Receive; + SubReceive = PowerCycleP.SubReceive; + + /** Send */ + Send = PowerCycleP.Send; + PowerCycleP.SubSend = SubSend; + + + MainC.SoftwareInit -> PowerCycleP; + + PowerCycleP.OnTimer -> OnTimerC; + PowerCycleP.OffTimer -> OffTimerC; + PowerCycleP.Leds -> LedsC; + + components BlazeC; + PowerCycleP.LowPowerListening -> BlazeC; + PowerCycleP.PacketAcknowledgements -> BlazeC; + PowerCycleP.AMPacket -> BlazeC; + + components BlazeCentralWiringC; + PowerCycleP.RxInterrupt -> BlazeCentralWiringC.Gdo0_int; + PowerCycleP.Csn -> BlazeCentralWiringC.Csn; + + components new BlazeSpiResourceC(), + BlazeSpiC; + PowerCycleP.Resource -> BlazeSpiResourceC; + PowerCycleP.PKTSTATUS -> BlazeSpiC.PKTSTATUS; + +} + + diff --git a/tos/chips/ccxx00_single/lpl/bmac/PowerCycleP.nc b/tos/chips/ccxx00_single/lpl/bmac/PowerCycleP.nc new file mode 100644 index 0000000000..59b4ff9c4f --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/bmac/PowerCycleP.nc @@ -0,0 +1,594 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * This module performs energy-based receive checks, and manages when the + * radio is on and off to keep it duty cycling while performing system + * functions. + * + * @author David Moss + */ + +#include "PowerCycle.h" +#include "Blaze.h" + +module PowerCycleP { + provides { + interface Init; + interface PowerCycle; + interface SplitControl; + interface Receive; + interface Send; + interface SystemLowPowerListening; + } + + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface SplitControl as SubControl; + interface LowPowerListening; + interface PacketAcknowledgements; + interface AMPacket; + + interface Timer as OnTimer; + interface Timer as OffTimer; + + interface State as SendState; + + interface GpioInterrupt as RxInterrupt; + interface GeneralIO as Csn; + interface Resource; + interface BlazeRegister as PKTSTATUS; + + interface Leds; + } +} + +implementation { + + + /** + * Radio Power, Check State, and Duty Cycling State + */ + enum { + S_OFF, // off by default + S_TURNING_ON, + S_ON, + S_TURNING_OFF, + }; + + enum { + NO_RADIO = 0xFF, + }; + + + /** The current period of the duty cycle, equivalent of wakeup interval */ + uint16_t sleepInterval; + + /** TRUE if we just received a message (?) */ + bool received; + + /** TRUE if this module is sending a message */ + bool sending; + + /** Tracks some number of times we've seen a transmitter, or not */ + uint8_t transmitterQuality; + + /** TRUE if we are to perform preamble quality detects on out */ + bool testPreambleQuality; + + /** State of the radio power */ + uint8_t radioPowerState; + + /** State of the split control interface */ + uint8_t splitControlState; + + /** Programmable time the radio is on after a valid packet reception */ + uint16_t delayAfterActivity; + + /** Storage for the system-wide wakeup interval */ + uint16_t systemWakeupInterval; + + /***************** Prototypes ****************/ + task void carrierSense(); + + void startOffTimer(); + + bool finishSplitControlRequests(); + bool isDutyCycling(); + + void receiveCheck(); + + void beginStart(); + void beginStop(); + void startDone(); + void stopDone(); + + bool transmitterFound(); + void attemptToTurnOff(); + + /***************** Init Commands *****************/ + command error_t Init.init() { + sleepInterval = 0; + + splitControlState = S_OFF; + received = FALSE; + sending = FALSE; + delayAfterActivity = DELAY_AFTER_ACTIVITY; + + return SUCCESS; + } + + /***************** PowerCycle Commands ****************/ + /** + * Set the sleep interval, in binary milliseconds + * @param sleepIntervalMs the sleep interval in [ms] + */ + command void PowerCycle.setSleepInterval(uint16_t sleepIntervalMs) { + uint16_t originalSleepInterval = sleepInterval; + sleepInterval = sleepIntervalMs; + + if(splitControlState == S_ON) { + if(!originalSleepInterval && sleepIntervalMs) { + // We were always on, now lets duty cycle + beginStop(); + return; + } + + if(!sleepInterval && (radioPowerState == S_OFF)) { + /* + * Leave the radio on permanently if sleepInterval == 0 and the radio is + * supposed to be enabled + */ + beginStart(); + } + } + } + + /** + * @return the sleep interval in [ms] + */ + command uint16_t PowerCycle.getSleepInterval() { + return sleepInterval; + } + + /***************** SystemLowPowerListening Commands ***************/ + command void SystemLowPowerListening.setDefaultRemoteWakeupInterval(uint16_t intervalMs) { + systemWakeupInterval = intervalMs; + } + + command void SystemLowPowerListening.setDelayAfterReceive(uint16_t intervalMs) { + delayAfterActivity = intervalMs; + } + + command uint16_t SystemLowPowerListening.getDefaultRemoteWakeupInterval() { + return systemWakeupInterval; + } + + command uint16_t SystemLowPowerListening.getDelayAfterReceive() { + return delayAfterActivity; + } + + /***************** SplitControl Commands ****************/ + command error_t SplitControl.start() { + if(splitControlState != S_OFF) { + return FAIL; + } + + // Radio was off, now has been told to turn on or duty cycle. + splitControlState = S_TURNING_ON; + + beginStart(); + + return SUCCESS; + } + + command error_t SplitControl.stop() { + if(splitControlState != S_ON) { + return FAIL; + } + + splitControlState = S_TURNING_OFF; + + beginStop(); + return SUCCESS; + } + + /***************** Send Commands ****************/ + /** + * Each call to this send command gives the message a single + * DSN that does not change for every copy of the message + * sent out. For messages that are not acknowledged, such as + * a broadcast address message, the receiving end does not + * signal receive() more than once for that message. + */ + command error_t Send.send(message_t *msg, uint8_t len) { + if(sending) { + return FAIL; + } + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led2On(); +#endif + + sending = TRUE; + + beginStart(); + + return SUCCESS; + } + + command error_t Send.cancel(message_t *msg) { + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { + return call SubSend.maxPayloadLength(); + } + + command void *Send.getPayload(message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + + /***************** SubSend Events ****************/ + event void SubSend.sendDone(message_t *msg, error_t error) { +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led2Off(); +#endif + startOffTimer(); + sending = FALSE; + signal Send.sendDone(msg, error); + } + + /***************** SubReceive Events ****************/ + event message_t *SubReceive.receive(message_t *msg, void *payload, uint8_t len) { +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led0Toggle(); +#endif + + if(isDutyCycling()) { + if(radioPowerState != S_ON) { + beginStart(); + } + + startOffTimer(); + } + + return signal Receive.receive(msg, payload, len); + } + + /***************** Timer Events ****************/ + event void OnTimer.fired() { + if(isDutyCycling()) { + if(radioPowerState == S_OFF && !sending) { + beginStart(); + received = FALSE; + + } else { + // Someone else turned on the radio, try again in awhile + call OnTimer.startOneShot(sleepInterval); + } + } + } + + /** + * We are done with the short delay following any activity. Perform + * another receive check, and if the channel is free, go back to sleep. + */ + event void OffTimer.fired() { + receiveCheck(); + } + + /***************** SubControl Events ****************/ + event void SubControl.startDone(error_t error) { + startDone(); + } + + event void SubControl.stopDone(error_t error) { + stopDone(); + } + + /***************** RxInterrupt Events ****************/ + async event void RxInterrupt.fired() { + atomic received = TRUE; + } + + /***************** Resource Events *****************/ + event void Resource.granted() { + post carrierSense(); + } + + + /***************** Tasks ****************/ + task void carrierSense() { + if(sending || received) { + // Keep the radio on for a bit. The system is doing something. + // A send will trigger a sendDone which will continue with startOffTimer() + call Resource.release(); + + if(received) { + // Leave it on for awhile and then turn off. + startOffTimer(); + } + + } else if(!transmitterFound()) { + if(transmitterQuality == 0) { + call Resource.release(); + attemptToTurnOff(); + + } else { + transmitterQuality--; + post carrierSense(); + } + + } else { + transmitterQuality++; + call Resource.release(); + if(transmitterQuality > TRANSMITTER_QUALITY_THRESHOLD) { + transmitterQuality = TRANSMITTER_QUALITY_THRESHOLD; + testPreambleQuality = TRUE; + } + + // Keep doing checks until the anomaly goes away. + call Resource.request(); + } + + } + + /***************** Functions ****************/ + /** + * Start the off timer, leaving the radio on for a short period of time + * before doing another receive check and possibly going back to sleep. + */ + void startOffTimer() { + if(isDutyCycling()) { + received = FALSE; + if(!delayAfterActivity) { + receiveCheck(); + } else { + call OffTimer.startOneShot(delayAfterActivity); + } + } + } + + /** + * @return TRUE if the radio should be actively duty cycling + */ + bool isDutyCycling() { + return (sleepInterval > 0) && (splitControlState == S_ON); + } + + + /** + * @return TRUE if we successfully handled a SplitControl request + */ + bool finishSplitControlRequests() { + if(splitControlState == S_TURNING_OFF) { + if(radioPowerState != S_OFF) { + beginStop(); + return TRUE; + } + + splitControlState = S_OFF; + signal SplitControl.stopDone(SUCCESS); + return TRUE; + + } else if(splitControlState == S_TURNING_ON) { + if(radioPowerState != S_ON) { + beginStart(); + return TRUE; + } + + // Starting while we're duty cycling first turns off the radio + splitControlState = S_ON; + signal SplitControl.startDone(SUCCESS); + return TRUE; + } + + return FALSE; + } + + /** + * Entry point for starting the radio + */ + void beginStart() { + error_t error; + + call OffTimer.stop(); + + error = call SubControl.start(); + + if(error == EALREADY) { + startDone(); + } + } + + /** + * Entry point for stopping the radio + */ + void beginStop() { + if(sending) { + // Don't turn the radio off + return; + } + + call OnTimer.stop(); + + if(call SubControl.stop() == EALREADY) { + stopDone(); + } + } + + /** + * The radio started + */ + void startDone() { + error_t error; + + radioPowerState = S_ON; + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led3On(); +#endif + + if(isDutyCycling() && !sending) { + receiveCheck(); + } + + if(sending) { + error = call SubSend.send(RADIO_STACK_PACKET, 0); + if(error != SUCCESS) { + startOffTimer(); + sending = FALSE; + signal Send.sendDone(RADIO_STACK_PACKET, error); + } + } + + // Trying to increase receive check speed by skipping this function. + if(splitControlState != S_ON) { + finishSplitControlRequests(); + } + } + + /** + * The radio stopped + */ + void stopDone() { + radioPowerState = S_OFF; + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led3Off(); + call Leds.set(0); +#endif + + if(finishSplitControlRequests()) { + // Don't duty cycle anymore. + return; + + } else if(sending) { + // Not sure if or why we turn off intermittently when we're sending, but + // make sure CSMA exits properly and turn that radio back on. + call SubSend.cancel(RADIO_STACK_PACKET); + beginStart(); + + } else if(isDutyCycling()) { + call OnTimer.startOneShot(sleepInterval); + } + } + + + /** + * Attempt to perform a receive check. + */ + void receiveCheck() { + received = FALSE; + transmitterQuality = 0; + testPreambleQuality = FALSE; + + if(call Resource.immediateRequest() != SUCCESS) { + call Resource.request(); + } else { + post carrierSense(); + } + } + + /** + * Call this only when we own the SPI bus + * @return TRUE if there there is a transmitter on the channel + */ + bool transmitterFound() { + uint8_t pktstatus; + uint8_t fail = 0; + + call Csn.clr(); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(8); +#endif + + // Wait for RSSI to be valid. We have seen the radio get stuck here + // saying CS and CCA are both invalid => RSSI is invalid. + do { + fail++; + call PKTSTATUS.read(&pktstatus); + } while(!(pktstatus & 0x50) && fail != 0); + + if(fail == 0) { + return FALSE; + } + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(0); +#endif + + call Csn.set(); + + // CS = 0x40 + // PQT_REACHED = 0x20 + // CCA = 0x10 + + if(testPreambleQuality) { + // Byte Detect + return (pktstatus & 0x20); + + } else { + // Energy Detect + return (pktstatus & 0x40); + } + } + + + /** + * Attempt to turn the radio off, but make sure it's safe to do so first. + * If we can't turn the radio off, then we're busy doing something, and + * we should back off and try again later. + */ + void attemptToTurnOff() { + if(call OffTimer.isRunning()) { + return; + } + + if(splitControlState == S_ON && isDutyCycling()) { + + if(!sending && !received) { + beginStop(); + return; + } + + startOffTimer(); + } + } + + /**************** Defaults ****************/ + +} + + diff --git a/tos/chips/ccxx00_single/lpl/bmac/README.txt b/tos/chips/ccxx00_single/lpl/bmac/README.txt new file mode 100644 index 0000000000..4a473b9964 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/bmac/README.txt @@ -0,0 +1,12 @@ +BMAC uses a long preamble transmission, with a carrier sense receive check. + +When a carrier is detected using some method, the radio remains awake +for a short time to see if a packet will be received. If a packet is not +received within the time frame, another receive check is performed to see if +the channel is still in use. The radio goes back to sleep when the channel +is not in use, nothing has been received recently, and nothing is being sent. + +The advantage over the WoR plug-in is the radio duty cycling is done in +software, allowing us control over radio power. The disadvantage is each +receive check uses a bit more energy. + diff --git a/tos/chips/ccxx00_single/lpl/boxmac/Boxmac.h b/tos/chips/ccxx00_single/lpl/boxmac/Boxmac.h new file mode 100644 index 0000000000..fc5ca7d202 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/boxmac/Boxmac.h @@ -0,0 +1,15 @@ + +#ifndef BOXMAC_H +#define BOXMAC_H + +/** + * This is what we divide the original wake-up transmission by. The more + * divisions, the more efficient your wake-up transmission with less time + * on-air, but your receptions will become less reliable. + * See the readme.txt file. + */ +#ifndef BOXMAC_WAKEUP_TRANSMISSION_DIVISIONS +#define BOXMAC_WAKEUP_TRANSMISSION_DIVISIONS 4 +#endif + +#endif diff --git a/tos/chips/ccxx00_single/lpl/boxmac/BoxmacC.nc b/tos/chips/ccxx00_single/lpl/boxmac/BoxmacC.nc new file mode 100644 index 0000000000..ff31b6cddb --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/boxmac/BoxmacC.nc @@ -0,0 +1,49 @@ + +/** + * Reference this file in the application layer and you can acheive + * shorter wake-up transmissions for a given receive check interval. + * This library makes your BMAC implementation more efficient by turning it + * into BoX-MAC (short energy based BMAC receive checks + semi-packetized + * wake-up transmissions). + * + * The original wake-up transmission is divided by WAKEUP_TRANSMISSION_DIVISIONS + * defined in the Boxmac.h header file. The PacketLink layer is + * accessed to perform automatic retries of the packet, and the CSMA layer + * is tapped to remove clear channel assessments on subsequent retries. + * + * Your application layer must supply the SendNotifier interface which allows + * this library to function. The reason you supply the interface is so your + * system can setup an initial default packet configuration before letting + * the boxmac hybrid work its energy saving magic. + * + * Your packet delivery success rate will decrease slightly because of the + * gaps introduced in the modulation of the wake-up transmission. + * + * @author David Moss. + */ + +#ifndef BMACLPL_H +// Be sure to reference BMAC before attempting to compile in this library. +#warning "Out-of-order compile error?" +#error "You must be using BMAC with the BoX-MAC Hybrid implementation." +#endif + +configuration BoxmacC { + uses { + interface SendNotifier[am_id_t amId]; + } +} + +implementation { + + components BlazeC; + components BoxmacP; + + SendNotifier = BoxmacP; + + BoxmacP.PacketLink -> BlazeC; + BoxmacP.LowPowerListening -> BlazeC; + BoxmacP.Csma -> BlazeC; + BoxmacP.AMSend -> BlazeC; + +} diff --git a/tos/chips/ccxx00_single/lpl/boxmac/BoxmacP.nc b/tos/chips/ccxx00_single/lpl/boxmac/BoxmacP.nc new file mode 100644 index 0000000000..19419baeb7 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/boxmac/BoxmacP.nc @@ -0,0 +1,63 @@ + +#include "Boxmac.h" +#include "AM.h" + +/** + * See the description in the configuration file. + * @author David Moss + */ + +module BoxmacP { + uses { + interface SendNotifier[am_id_t amId]; + interface LowPowerListening; + interface Csma[am_id_t amId]; + interface PacketLink; + interface AMSend[am_id_t amId]; + } +} + +implementation { + + /** The packet we're sending */ + norace message_t *myMsg = NULL; + + /** TRUE if the initial backoff has already completed */ + norace bool initialBackoffComplete; + + /***************** SendNotifier Events ****************/ + event void SendNotifier.aboutToSend[am_id_t amId](am_addr_t dest, message_t *msg) { + uint16_t sleepInterval; + initialBackoffComplete = FALSE; + + if((sleepInterval = call LowPowerListening.getRemoteWakeupInterval(msg)) > 0) { + call LowPowerListening.setRemoteWakeupInterval(msg, (sleepInterval / BOXMAC_WAKEUP_TRANSMISSION_DIVISIONS)); + call PacketLink.setRetries(msg, (call PacketLink.getRetries(msg) + 1) * BOXMAC_WAKEUP_TRANSMISSION_DIVISIONS); + call PacketLink.setRetryDelay(msg, 0); + + myMsg = msg; + } + } + + /***************** CSMA Events ****************/ + async event void Csma.requestCca[am_id_t amId](message_t *msg) { + if(msg == myMsg) { + if(initialBackoffComplete) { + call Csma.setCca[amId](FALSE); + return; + } + + initialBackoffComplete = TRUE; + } + } + + /***************** AMSend Events ****************/ + event void AMSend.sendDone[am_id_t amId](message_t *msg, error_t error) { + if(msg == myMsg) { + call LowPowerListening.setRemoteWakeupInterval(msg, ((call LowPowerListening.getRemoteWakeupInterval(msg)) * BOXMAC_WAKEUP_TRANSMISSION_DIVISIONS)); + call PacketLink.setRetries(msg, (call PacketLink.getRetries(msg) / BOXMAC_WAKEUP_TRANSMISSION_DIVISIONS) - 1); + myMsg = NULL; + } + } + +} diff --git a/tos/chips/ccxx00_single/lpl/boxmac/README.txt b/tos/chips/ccxx00_single/lpl/boxmac/README.txt new file mode 100644 index 0000000000..0558f3a141 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/boxmac/README.txt @@ -0,0 +1,88 @@ +This was designed for real world deployments. + +If you are using BMAC, you should consider adding this library in through +your application as well. It will convert your BMAC wake-up transmission +into a BoX-MAC wake-up transmission, which means lower power. You're trading +a few dropped packets for a lot of energy savings. Theory of operation is +at the bottom of this readme. + +TO USE: +1. Make sure this directory is accessible by your platform. i.e. reference it + in your .platform file just like every other directory in the radio stack. + +2. Make sure you're also using bmac. Boxmac relies on the existence of bmac. + +3. Somewhere in your application, make a reference to BoxmacC. It won't include + itself. + +4. Wire the radio stack's SendNotifier event to BoxmacC. YES, you must + do this yourself, because we don't know how your application layer + is using the SendNotifier interface. If you're using it yourself to + modify packets somewhere, you would signal BoxmacC's + SendNotifier.aboutToSend() event manually after you have made your own + modifications to the outbound packet. + +5. Compile. + + +We did some experiments to see how much more efficient this is than straight BMAC. + + +Experimental Setup: +* 2 nodes, CC1100 radios, one node transmitting and the other receiving + +* Random TX packet periods - transmissions not sent on a periodic timer. + In a sendDone() event, + call Timer.startOneShot(50 + (call Random.rand16() % 1024)); + sends the next packet. + +* Original BMAC wake-up transmission was 1024 bms (local duty cycle = 1024) + +Wake-up Divisions | Total Pkts | Tx Duty % | Rx Duty % | Ack Success % | Pkt/Sec +-------------------------------------------------------------------------------- + 1 (BMAC) | 100 | 66.76% | 35.67% | 100.0% | 0.63 + 2 | 100 | 64.94% | 26.80% | 100.0% | 0.74 + 4 | 100 | 58.41% | 14.64% | 94.0% | 0.80 + 8 | 100 | 55.58% | 8.13% | 91.0% | 0.85 + 16 | 100 | 58.43% | 7.74% | 91.0% | 0.83 + 32 | 100 | 60.30% | 5.16% | 91.8% | 0.78 + 64 | 100 | 67.71% | 2.22% | 72.0% | 0.62 + + +From the results above, we see the throughput peaks at 8 wake-up divisions, +which is exactly where the TX duty cycle is at a minimum. The RX duty cycle +continues to fall off, but 8.13% is already 22.79% less than the original BMAC! +This is a huge increase in savings. We see higher throughput with less energy +wasted. The penatly is a few 9% more dropped packets, which is tolerable. +The dropped packets are a result of the receiver performing a receive check +in the acknowledgment gap in modulation between packets from the transmitter. + +Now the problem is... in a real world application with several nodes around, +you'll have other nodes try to jump in in the middle of another node's +wake-up transmission. To improve delivery success rate, I recommend 4 +wake-up divisions at 1024 bms sleep interval. It may vary with different +sleep intervals though. + + +THEORY OF OPERATION: +BMAC is a long preamble with a little packet at the end. You're wasting time +on air sending useless preamble bytes, which what you really want to be sending +is data. + +This layer will modify the operation of BMAC by tapping into other elements +of the radio stack, mainly PacketLink and CSMA. It will divide up the BMAC +wake-up preamble into several divisions, and then use PacketLink to transmit +several smaller BMAC packets. It taps into the CSMA layer to prevent back-offs +between subsequent packet transmissions, which increases packet delivery. + +The result is a decrease in transmission length because destination receivers +can acknowledge reception in the middle of the wake-up transmission. +This is unlike a standard BMAC packet. Also, non-destination receivers can +go back to sleep sooner because the wake-up transmission has a destination +address associated with it, whereas a standard BMAC wake-up preamble does not. +Everyone wins. + +It's kind of a hybrid between BMAC and XMAC, using a BMAC style extremely +efficient receive check (single energy check on the channel) and an XMAC style +of packetized delivery, but modified to use a BMAC style longer preamble. + diff --git a/tos/chips/ccxx00_single/lpl/enddevice/LplC.nc b/tos/chips/ccxx00_single/lpl/enddevice/LplC.nc new file mode 100644 index 0000000000..f093e500fe --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/enddevice/LplC.nc @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#include "Blaze.h" +#include "message.h" + +configuration LplC { + provides { + interface LowPowerListening; + interface SystemLowPowerListening; + interface Send; + interface Receive; + interface SplitControl; + } + + uses { + interface Send as SubSend; + interface Receive as SubReceive; + interface SplitControl as SubControl; + } +} + +implementation { + + components LplP; + Send = LplP.Send; + Receive = LplP.Receive; + SplitControl = LplP.SplitControl; + LowPowerListening = LplP.LowPowerListening; + SystemLowPowerListening = LplP.SystemLowPowerListening; + + LplP.SubSend = SubSend; + LplP.SubReceive = SubReceive; + LplP.SubControl = SubControl; + + components new TimerMilliC(); + LplP.Timer -> TimerMilliC; + + components BlazePacketC; + LplP.BlazePacket -> BlazePacketC; + LplP.BlazePacketBody -> BlazePacketC; + + components AcknowledgementsC; + LplP.AckReceive -> AcknowledgementsC; + + components LedsC; + LplP.Leds -> LedsC; + +} diff --git a/tos/chips/ccxx00_single/lpl/enddevice/LplP.nc b/tos/chips/ccxx00_single/lpl/enddevice/LplP.nc new file mode 100644 index 0000000000..77ea750476 --- /dev/null +++ b/tos/chips/ccxx00_single/lpl/enddevice/LplP.nc @@ -0,0 +1,267 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#include "Blaze.h" + +module LplP { + provides { + interface LowPowerListening; + interface SystemLowPowerListening; + interface Send; + interface Receive; + interface SplitControl; + } + + uses { + interface AckReceive; + interface Send as SubSend; + interface Receive as SubReceive; + interface SplitControl as SubControl; + interface BlazePacket; + interface BlazePacketBody; + interface Timer; + interface Leds; + } +} + +implementation { + + /* + * This is for compatibility with other duty cycling receivers + */ + enum { + STATIC_WAKEUP_INCREASE = 5, + }; + + /** TRUE if this layer is sending a message */ + bool sending; + + /** TRUE if the radio is on */ + bool on; + + /** TRUE if SplitControl is on */ + bool splitControlOn; + + /** TRUE if the radio should turn off when it can by default */ + bool savePower; + + + /***************** Send Commands ****************/ + command error_t Send.send(message_t *msg, uint8_t len) { + sending = TRUE; + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led2On(); +#endif + + + if(!on) { + call SubControl.start(); + + } else { + call SubSend.send(RADIO_STACK_PACKET, 0); + } + + return SUCCESS; + } + + command error_t Send.cancel(message_t *msg) { + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { + return call SubSend.maxPayloadLength(); + } + + command void *Send.getPayload(message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + + /***************** AckReceive Events ****************/ + async event void AckReceive.receive( blaze_ack_t *ackMsg ) { + if(call BlazePacket.isPacketPending((message_t *) ackMsg)) { + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led1On(); +#endif + + call Timer.startOneShot(5120); + } + } + + /***************** Send Events ****************/ + event void SubSend.sendDone(message_t *msg, error_t error) { + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led2Off(); +#endif + + signal Send.sendDone(msg, error); + + /* + * The AckReceive event would have indicated if the packet pending bit + * is set, and started the Timer before this sendDone event fires. + */ + if(!call Timer.isRunning()) { + call SubControl.stop(); + } + } + + /***************** SubReceive Events ****************/ + event message_t *SubReceive.receive(message_t *msg, void *payload, uint8_t len) { + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led0Toggle(); +#endif + + if(call BlazePacket.isPacketPending(msg)) { + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led1On(); +#endif + + call Timer.startOneShot(5120); + } + + signal Receive.receive(msg, payload, len); + return msg; + } + + /***************** SplitControl Commands ****************/ + command error_t SplitControl.start() { + splitControlOn = TRUE; + if(!savePower) { + call SubControl.start(); + } + + signal SplitControl.startDone(SUCCESS); + + return SUCCESS; + } + + command error_t SplitControl.stop() { + splitControlOn = FALSE; + signal SplitControl.stopDone(SUCCESS); + return SUCCESS; + } + + /***************** SubControl Events ****************/ + event void SubControl.startDone(error_t error) { + on = TRUE; + +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led3On(); +#endif + + if(sending) { + if(call SubSend.send(RADIO_STACK_PACKET, 0) != SUCCESS) { + signal Send.sendDone(RADIO_STACK_PACKET, FAIL); + call SubControl.stop(); + } + } + } + + event void SubControl.stopDone(error_t error) { +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led3Off(); +#endif + + on = FALSE; + } + + /***************** Timer Events ****************/ + event void Timer.fired() { +#if BLAZE_ENABLE_LPL_LEDS + call Leds.led1Off(); +#endif + + if(!sending) { + call SubControl.stop(); + } + } + + /***************** SystemLowPowerListening Commands ***************/ + command void SystemLowPowerListening.setDefaultRemoteWakeupInterval(uint16_t intervalMs) { + } + + command void SystemLowPowerListening.setDelayAfterReceive(uint16_t intervalMs) { + } + + command uint16_t SystemLowPowerListening.getDefaultRemoteWakeupInterval() { + return 0; + } + + command uint16_t SystemLowPowerListening.getDelayAfterReceive() { + return 0; + } + + /***************** LowPowerListening Commands ***************/ + command void LowPowerListening.setLocalWakeupInterval( + uint16_t sleepIntervalMs) { + + savePower = (sleepIntervalMs > 0); + + if(savePower && !sending) { + call SubControl.stop(); + + } else if(!savePower && splitControlOn) { + call Timer.stop(); + call SubControl.start(); + } + } + + command uint16_t LowPowerListening.getLocalWakeupInterval() { + return savePower; + } + + command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, + uint16_t sleepIntervalMs) { + if(sleepIntervalMs > 0) { + (call BlazePacketBody.getMetadata(msg))->rxInterval = sleepIntervalMs + STATIC_WAKEUP_INCREASE; + } + } + + command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { + uint16_t currentRxInterval = (call BlazePacketBody.getMetadata(msg))->rxInterval; + + if(currentRxInterval > 0) { + return currentRxInterval - STATIC_WAKEUP_INCREASE; + } + + return 0; + } + + +} diff --git a/tos/chips/ccxx00_single/packet/BlazePacketC.nc b/tos/chips/ccxx00_single/packet/BlazePacketC.nc new file mode 100644 index 0000000000..04245d3ace --- /dev/null +++ b/tos/chips/ccxx00_single/packet/BlazePacketC.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Get access to internals of a packet used in the Blaze radio stack + * @author David Moss + */ + +configuration BlazePacketC { + provides { + interface BlazePacket; + interface BlazePacketBody; + interface LinkPacketMetadata; + } +} + +implementation { + + components BlazePacketP; + BlazePacket = BlazePacketP; + BlazePacketBody = BlazePacketP; + LinkPacketMetadata = BlazePacketP; + +} + diff --git a/tos/chips/ccxx00_single/packet/BlazePacketP.nc b/tos/chips/ccxx00_single/packet/BlazePacketP.nc new file mode 100644 index 0000000000..6ebef1dbf4 --- /dev/null +++ b/tos/chips/ccxx00_single/packet/BlazePacketP.nc @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Blaze.h" +#include "Fcf.h" + +/** + * @author David Moss + */ +module BlazePacketP { + + provides { + interface BlazePacket; + interface BlazePacketBody; + interface LinkPacketMetadata; + } + +} + +implementation { + + /***************** Functions ****************/ + blaze_header_t *getHeader( message_t *msg ) { + return (blaze_header_t *) ( msg->data - sizeof( blaze_header_t )); + } + + blaze_metadata_t *getMetadata( message_t *msg ) { + return (blaze_metadata_t *) msg->metadata; + } + + /***************** BlazePacket Commands ****************/ + async command int8_t BlazePacket.getRssi( message_t* p_msg ) { + return getMetadata( p_msg )->rssi; + } + + async command error_t BlazePacket.getLqi( message_t* p_msg ) { + return getMetadata( p_msg )->lqi; + } + + async command void BlazePacket.setPacketPending(message_t *msg, bool packetPending) { + getHeader(msg)->fcf = ((getHeader(msg)->fcf) & ~(1 << FCF_FRAME_PENDING)) | (packetPending << FCF_FRAME_PENDING); + } + + async command bool BlazePacket.isPacketPending(message_t *msg) { + return ((getHeader(msg)->fcf) >> FCF_FRAME_PENDING) & 0x1; + } + + /***************** BlazePacketBody Commands ****************/ + async command blaze_header_t *BlazePacketBody.getHeader( message_t* msg ){ + return getHeader( msg ); + } + + async command blaze_metadata_t *BlazePacketBody.getMetadata( message_t* msg ){ + return getMetadata( msg ); + } + + /**************** LinkPacketMetadata Commands **************/ + /** + * From the CC1101 Datasheet: + * LQI is best used as a relative measurement of the link quality (a low + * value indicates a better link than what a high value does), since the value + * is dependent on the modulation format. + */ + async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { + // Measured experimentally probably using MSK modulation, 0 dBm TX power. + // After the LQI went up above it's good value of 12-13, it reached into + // the 20's and the packet reception rate went way down. + return call BlazePacket.getLqi(msg) < 16; + } + + +} diff --git a/tos/chips/ccxx00_single/powermanager/Ccxx00PowerManagerC.nc b/tos/chips/ccxx00_single/powermanager/Ccxx00PowerManagerC.nc new file mode 100644 index 0000000000..7e488e8cad --- /dev/null +++ b/tos/chips/ccxx00_single/powermanager/Ccxx00PowerManagerC.nc @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * This component is responsible for properly powering the radio on and off. + * @author David Moss + */ + +#include "Blaze.h" + +configuration Ccxx00PowerManagerC { + provides { + interface SplitControl; + } +} + +implementation { + components MainC, + Ccxx00PowerManagerP, + CsmaC, + BlazeReceiveC, + LplC, + BlazeInitC; + + MainC.SoftwareInit -> Ccxx00PowerManagerP; + + SplitControl = Ccxx00PowerManagerP; + + Ccxx00PowerManagerP.CsmaSplitControl -> CsmaC; + Ccxx00PowerManagerP.ReceiveSplitControl -> BlazeReceiveC; + Ccxx00PowerManagerP.InitSplitControl -> BlazeInitC; + + components LedsC; + Ccxx00PowerManagerP.Leds -> LedsC; + +} diff --git a/tos/chips/ccxx00_single/powermanager/Ccxx00PowerManagerP.nc b/tos/chips/ccxx00_single/powermanager/Ccxx00PowerManagerP.nc new file mode 100644 index 0000000000..31200f0374 --- /dev/null +++ b/tos/chips/ccxx00_single/powermanager/Ccxx00PowerManagerP.nc @@ -0,0 +1,193 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * This turns the radio stack on and off in the right order + * @author David Moss + */ + +#include "Blaze.h" + +module Ccxx00PowerManagerP { + provides { + interface Init; + interface SplitControl; + } + + uses { + interface SplitControl as CsmaSplitControl; + interface SplitControl as ReceiveSplitControl; + interface SplitControl as InitSplitControl; + + interface Leds; + } +} + +implementation { + + /** State of this component in powering the radios on or off */ + uint8_t myState; + + /** + * Define the order in which components get turned on + */ + enum { + S_START_BEGIN, + + S_START_RECEIVE, + S_START_INIT, + + S_START_END, + + + /** Define the order in which components get turned off */ + S_STOP_BEGIN, + + S_STOP_CSMA, + S_STOP_RECEIVE, + S_STOP_INIT, + + S_STOP_END, + }; + + /***************** Prototypes ****************/ + void startRadios(); + void stopRadios(); + + /***************** Init Commands ****************/ + command error_t Init.init() { + myState = S_STOP_END; + return SUCCESS; + } + + /***************** SplitControl Commands ****************/ + command error_t SplitControl.start() { + // if myState == S_STOP_END continue on. + if(myState < S_STOP_BEGIN) { + return EALREADY; + + } else if(myState < S_STOP_END) { + return EBUSY; + } + + myState = S_START_BEGIN; + startRadios(); + return SUCCESS; + } + + command error_t SplitControl.stop() { + // if myState == S_START_END continue on. + if(myState < S_START_END) { + return EBUSY; + + } else if(myState > S_START_END) { + return EALREADY; + } + + myState = S_STOP_BEGIN; + stopRadios(); + return SUCCESS; + } + + + /***************** CsmaSplitControl Events ****************/ + event void CsmaSplitControl.startDone(error_t error) { + startRadios(); + } + + event void CsmaSplitControl.stopDone(error_t error) { + stopRadios(); + } + + /***************** ReceiveSplitControl Events ****************/ + event void ReceiveSplitControl.startDone(error_t error) { + startRadios(); + } + + event void ReceiveSplitControl.stopDone(error_t error) { + stopRadios(); + } + + /***************** InitSplitControl Events ****************/ + event void InitSplitControl.startDone(error_t error) { + startRadios(); + } + + event void InitSplitControl.stopDone(error_t error) { + stopRadios(); + } + + /***************** Tasks ****************/ + void startRadios() { + myState++; + switch(myState) { + case S_START_RECEIVE: + call ReceiveSplitControl.start(); + break; + + case S_START_INIT: + call InitSplitControl.start(); + break; + + case S_START_END: + signal SplitControl.startDone(SUCCESS); + break; + + default: + break; + } + } + + void stopRadios() { + myState++; + switch(myState) { + case S_STOP_CSMA: + call CsmaSplitControl.stop(); + break; + + case S_STOP_RECEIVE: + call ReceiveSplitControl.stop(); + break; + + case S_STOP_INIT: + call InitSplitControl.stop(); + break; + + case S_STOP_END: + signal SplitControl.stopDone(SUCCESS); + break; + + default: + break; + } + } + +} diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100.h new file mode 100644 index 0000000000..41a89ac145 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100.h @@ -0,0 +1,370 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 10 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +enum { + CC1100_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + +/** SLOW THINGS DOWN FOR THIS DATA RATE */ +#define TRANSMITTER_QUALITY_THRESHOLD 200 +#define BLAZE_MIN_INITIAL_BACKOFF 5000 +#define BLAZE_MIN_BACKOFF 500 +#define BLAZE_BACKOFF_PERIOD 100 + + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#define CC1100_MATCHING_NETWORK CC1100_433_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 317.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 100 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, + CC1100_PA_MINUS_15 = 0x1C, + CC1100_PA_MINUS_20 = 0x0D, + CC1100_PA_MINUS_30 = 0x12, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts at the end of a received packet */ + CC1100_CONFIG_IOCFG0 = 0x01, + + /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ + CC1100_CONFIG_FIFOTHR = 0x0F, + + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xC8, + CC1100_CONFIG_MDMCFG3 = 0x93, + CC1100_CONFIG_MDMCFG2 = 0x1B, // GFSK. 0x13 = no manchester / 0x1B = with manch. + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x34, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x43, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100ControlC.nc b/tos/chips/ccxx00_single/radios/cc1100/CC1100ControlC.nc new file mode 100644 index 0000000000..fb9419d320 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100ControlC.nc @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Blaze.h" +#include "BlazeInit.h" +#include "CC1100.h" + +/** + * This configuration is responsible for wiring in the CC1100 pins to the + * BlazeCentralWiringC component, and provides register values for the CC1100. + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + + +configuration CC1100ControlC { + provides { + interface BlazeConfig; + } +} + +implementation { + + components MainC, + CC1100ControlP, + ActiveMessageAddressC, + HplCC1100PinsC as Pins; + + MainC.SoftwareInit -> CC1100ControlP; + + BlazeConfig = CC1100ControlP; + + components BlazeInitC; + CC1100ControlP.BlazeCommit -> BlazeInitC.BlazeCommit; + + components BlazeCentralWiringC; + BlazeCentralWiringC.ChipCsn[ CC1100_RADIO_ID ] -> Pins.Csn; + BlazeCentralWiringC.ChipRegSettings[ CC1100_RADIO_ID ] -> CC1100ControlP; + BlazeCentralWiringC.ChipGdo0_io[ CC1100_RADIO_ID ] -> Pins.Gdo0_io; + BlazeCentralWiringC.ChipGdo2_io[ CC1100_RADIO_ID ] -> Pins.Gdo2_io; + BlazeCentralWiringC.ChipGdo0_int[ CC1100_RADIO_ID ] -> Pins.Gdo0_int; + BlazeCentralWiringC.ChipGdo2_int[ CC1100_RADIO_ID ] -> Pins.Gdo2_int; + BlazeCentralWiringC.ChipConfig[ CC1100_RADIO_ID ] -> CC1100ControlP.BlazeConfig; + + components SplitControlManagerC; + CC1100ControlP.SplitControlManager -> SplitControlManagerC; + + components LedsC; + CC1100ControlP.Leds -> LedsC; + +} + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100ControlP.nc b/tos/chips/ccxx00_single/radios/cc1100/CC1100ControlP.nc new file mode 100644 index 0000000000..fb65861c0b --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100ControlP.nc @@ -0,0 +1,370 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Manage the CC1100 SPI connection + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#include "Blaze.h" +#include "CC1100.h" +#include "AM.h" + +module CC1100ControlP { + + provides { + interface Init as SoftwareInit; + interface BlazeRegSettings; + interface BlazeConfig; + } + + uses { + interface SplitControlManager; + interface BlazeCommit; + interface Leds; + } +} + +implementation { + + /** TRUE if address recognition is enabled */ + norace bool addressRecognition; + + /** TRUE if PAN recognition is enabled */ + norace bool panRecognition; + + /** TRUE if we should auto-acknowledge packets if an ack is requested */ + norace bool autoAck; + + + /** Default register values. Change the configuration by editing CC1100.h */ + uint8_t regValues[] = { + CC1100_CONFIG_IOCFG2, + CC1100_CONFIG_IOCFG1, + CC1100_CONFIG_IOCFG0, + CC1100_CONFIG_FIFOTHR, + CC1100_CONFIG_SYNC1, + CC1100_CONFIG_SYNC0, + CC1100_CONFIG_PKTLEN, + CC1100_CONFIG_PKTCTRL1, + CC1100_CONFIG_PKTCTRL0, + CC1100_CONFIG_ADDR, + CC1100_CONFIG_CHANNR, + CC1100_CONFIG_FSCTRL1, + CC1100_CONFIG_FSCTRL0, + CC1100_CONFIG_FREQ2, + CC1100_CONFIG_FREQ1, + CC1100_CONFIG_FREQ0, + CC1100_CONFIG_MDMCFG4, + CC1100_CONFIG_MDMCFG3, + CC1100_CONFIG_MDMCFG2, + CC1100_CONFIG_MDMCFG1, + CC1100_CONFIG_MDMCFG0, + CC1100_CONFIG_DEVIATN, + CC1100_CONFIG_MCSM2, + CC1100_CONFIG_MCSM1, + CC1100_CONFIG_MCSM0, + CC1100_CONFIG_FOCCFG, + CC1100_CONFIG_BSCFG, + CC1100_CONFIG_AGCTRL2, + CC1100_CONFIG_AGCTRL1, + CC1100_CONFIG_AGCTRL0, + CC1100_CONFIG_WOREVT1, + CC1100_CONFIG_WOREVT0, + CC1100_CONFIG_WORCTRL, + CC1100_CONFIG_FREND1, + CC1100_CONFIG_FREND0, + CC1100_CONFIG_FSCAL3, + CC1100_CONFIG_FSCAL2, + CC1100_CONFIG_FSCAL1, + CC1100_CONFIG_FSCAL0, + CC1100_CONFIG_RCCTRL1, + CC1100_CONFIG_RCCTRL0, + CC1100_CONFIG_FSTEST, + CC1100_CONFIG_PTEST, + CC1100_CONFIG_AGCTST, + CC1100_CONFIG_TEST2, + CC1100_CONFIG_TEST1, + CC1100_CONFIG_TEST0, + }; + + + + /***************** Prototypes ****************/ + uint8_t freqToChannel( uint32_t freq ); + uint32_t channelToFreq( uint8_t chan ); + uint32_t toFreqRegValues(float desiredFrequencyHz); + uint32_t getFreqReg(); + void putFreqReg(uint32_t freqx); + + /***************** SoftwareInit Commands ****************/ + command error_t SoftwareInit.init() { +#if defined(NO_ACKNOWLEDGEMENTS) + autoAck = FALSE; +#else + autoAck = TRUE; +#endif + +#if defined(NO_ADDRESS_RECOGNITION) + call BlazeConfig.setAddressRecognition(FALSE); +#else + call BlazeConfig.setAddressRecognition(TRUE); +#endif + + +#if defined(NO_PAN_RECOGNITION) + panRecognition = FALSE; +#else + panRecognition = TRUE; +#endif + + return SUCCESS; + } + + /***************** BlazeInit Commands ****************/ + command uint8_t *BlazeRegSettings.getDefaultRegisters() { + return regValues; + } + + command uint8_t BlazeRegSettings.getPa() { + return CC1100_PA; + } + + /***************** BlazeConfig Commands ****************/ + /** + * If changes have been made to the chip's configuration, those changes are + * currently stored in the microcontroller. This command will commit those + * changes to hardware. It must be called for the changes to take effect. + * @return SUCCESS if the changes will be committed. + */ + command error_t BlazeConfig.commit() { + if(call SplitControlManager.isOn()) { + return call BlazeCommit.commit(); + + } else { + // These changes will be automatically committed next time you turn it on. + return EOFF; + } + } + + /** + * @param on TRUE to turn address recognition on, FALSE to turn it off + * You must call sync() after this to propagate changes to hardware + */ + command void BlazeConfig.setAddressRecognition(bool on) { + atomic addressRecognition = on; + } + + /** + * @return TRUE if address recognition is enabled + */ + async command bool BlazeConfig.isAddressRecognitionEnabled() { + return addressRecognition; + } + + /** + * @param on TRUE if we should only accept packets from other nodes in our PAN + */ + command void BlazeConfig.setPanRecognition(bool on) { + panRecognition = on; + } + + /** + * @return TRUE if PAN address recognition is enabled + */ + async command bool BlazeConfig.isPanRecognitionEnabled() { + return panRecognition; + } + + /** + * Sync must be called for acknowledgement changes to take effect + * @param enableAutoAck TRUE to enable auto acknowledgements + * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to + * default to software auto acknowledgements + */ + command void BlazeConfig.setAutoAck(bool enableAutoAck) { + atomic autoAck = enableAutoAck; + } + + /** + * @return TRUE if auto acks are enabled + */ + async command bool BlazeConfig.isAutoAckEnabled() { + bool atomicAckEnabled; + atomic atomicAckEnabled = autoAck; + return atomicAckEnabled; + } + + /** + * Set the base frequency. The unit depends on the type of chip you're using: + * > CC2500 is in MHz, so you'd say "2145" for 2145 MHz. + * > CC1100 is in Hz, so you'd say "315000000" for 315 MHz. + * + * You'll need to commit these changes when you're done. + * + * @param freq The desired frequency + * @return EINVAL if there's a problem + */ + command error_t BlazeConfig.setBaseFrequency(uint32_t freq) { + if(freq < 300000000 || freq > 950000000) { + return EINVAL; + } + + putFreqReg(toFreqRegValues((float) freq)); + return SUCCESS; + } + + /** + * Get the base frequency, in whatever unit the radio uses. + * > CC2500 uses MHz + * > CC1100 uses Hz + * @return the base frequency + */ + command uint32_t BlazeConfig.getBaseFrequency() { + uint32_t freqReg = getFreqReg(); + float multiplier = ((float) CC1100_CRYSTAL_HZ / (float) 65536); + return (uint32_t) (multiplier * freqReg); + } + + /** + * This command is used to set the (approximate) frequency the radio. + * It uses the assumed base frequency, the assumed channel width and the changes the + * value in the channel register. + * @param freqKhz - the desired frequency in Khz to set the radio to + * @reutrn - FAIL if desired frequency is not in range, else SUCCESS + */ + command error_t BlazeConfig.setChannelFrequencyKhz( uint32_t freqKhz ) { + // We have to convert our base frequency in Hz to kHz + if((freqKhz > (call BlazeConfig.getBaseFrequency() / 1000) + (CC1100_CHANNEL_WIDTH * 255)) + || (freqKhz < (call BlazeConfig.getBaseFrequency() / 1000))){ + return EINVAL; + } + + regValues[BLAZE_CHANNR] = freqToChannel(freqKhz); + return SUCCESS; + } + + /** + * This command is used to get the current (approximate) frequency the radio is set to in KHz. + * It uses the assumed base frequency, the assumed channel width and the current value in the + * channel register to calculate this. + * @return approx. frequency in KHz + */ + command uint32_t BlazeConfig.getChannelFrequencyKhz() { + return channelToFreq(regValues[BLAZE_CHANNR]); + } + + /** + * This command sets the value of the channel register on the radio + * @param chan - the value of the channel + * @return EINVAL if the channel is out of bounds + */ + command error_t BlazeConfig.setChannel( uint8_t chan ) { + if(chan < CC1100_CHANNEL_MIN || chan > CC1100_CHANNEL_MAX) { + return EINVAL; + } + + regValues[BLAZE_CHANNR] = chan; + return SUCCESS; + } + + /** + * This command returns the value of the channel register on the radio + * @return the value of the channel register + */ + command uint8_t BlazeConfig.getChannel() { + return regValues[BLAZE_CHANNR]; + } + + + /***************** BlazeCommit Events ****************/ + event void BlazeCommit.commitDone() { + signal BlazeConfig.commitDone(); + } + + /***************** SplitControlManager Events ****************/ + event void SplitControlManager.stateChange() { + } + + /***************** Functions ****************/ + uint8_t freqToChannel( uint32_t freq ) { + uint32_t offset; + uint32_t rem; + uint8_t chann; + offset = freq - (call BlazeConfig.getBaseFrequency() / 1000); // Hz->kHz + rem = offset % CC1100_CHANNEL_WIDTH; + chann = (uint8_t)(offset / CC1100_CHANNEL_WIDTH); + if(rem > (CC1100_CHANNEL_WIDTH >> 1)){ + chann++; + } + return chann; + } + + uint32_t channelToFreq( uint8_t chan ){ + uint32_t offset; + offset = (uint32_t)(((uint32_t)chan) * CC1100_CHANNEL_WIDTH); + return offset + (call BlazeConfig.getBaseFrequency() / 1000); // Hz->kHz + } + + /** + * Calculate the FREQx registers based on a desired frequency. + * Your crystal must be specified correctly in the CC1100.h file. + * @param desiredFrequencyHz something like 315000000 + * @return the contents of the FREQ2,1,0 registers all combined + */ + uint32_t toFreqRegValues(float desiredFrequencyHz) { + float divisor = ((float) CC1100_CRYSTAL_HZ / (float) 65536); + return (uint32_t) (desiredFrequencyHz / divisor); + } + + /** + * @return the contents of the FREQx registers combined + */ + uint32_t getFreqReg() { + return (((uint32_t) regValues[BLAZE_FREQ2]) << 16) + | (((uint32_t) regValues[BLAZE_FREQ1]) << 8) + | (((uint32_t) regValues[BLAZE_FREQ0])); + } + + /** + * Fill the FREQx registers with the given frequency register setting. + */ + void putFreqReg(uint32_t freqx) { + regValues[BLAZE_FREQ2] = freqx >> 16; + regValues[BLAZE_FREQ1] = freqx >> 8; + regValues[BLAZE_FREQ0] = freqx; + } + + /***************** Defaults ****************/ + default event void BlazeConfig.commitDone() {} +} diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_1.2kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_1.2kBaud_manchester.h new file mode 100644 index 0000000000..dbe7e94ad1 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_1.2kBaud_manchester.h @@ -0,0 +1,357 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 1.2 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 315 MHz" +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 314.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 70 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xF5, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x03, // 0x03 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x15, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_100kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_100kBaud_manchester.h new file mode 100644 index 0000000000..abb5f3de17 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_100kBaud_manchester.h @@ -0,0 +1,357 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 100 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 315 MHz" +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 314.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 70 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0x5B, + CC1100_CONFIG_MDMCFG3 = 0xF8, + CC1100_CONFIG_MDMCFG2 = 0x1B, // 0x13 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x47, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x1D, + CC1100_CONFIG_BSCFG = 0x1C, + CC1100_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0xB2, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0xB6, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xEA, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_10kBaud_MSK.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_10kBaud_MSK.h new file mode 100644 index 0000000000..638dec26ef --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_10kBaud_MSK.h @@ -0,0 +1,371 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 10 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** SLOW THINGS DOWN FOR THIS DATA RATE */ +#define BLAZE_ACK_WAIT 2000 +#define TRANSMITTER_QUALITY_THRESHOLD 200 +#define BLAZE_MIN_INITIAL_BACKOFF 5000 +#define BLAZE_MIN_BACKOFF 500 +#define BLAZE_BACKOFF_PERIOD 100 + + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 315 MHz" +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 317.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#warning "317 MHz non-production channel" +#define CC1100_DEFAULT_CHANNEL 100 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, + CC1100_PA_MINUS_15 = 0x1C, + CC1100_PA_MINUS_20 = 0x0D, + CC1100_PA_MINUS_30 = 0x12, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts at the end of a received packet */ + CC1100_CONFIG_IOCFG0 = 0x01, + + /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ + CC1100_CONFIG_FIFOTHR = 0x0F, + + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xC8, + CC1100_CONFIG_MDMCFG3 = 0x93, + CC1100_CONFIG_MDMCFG2 = 0x73, // GFSK. 0x13 = no manchester / 0x1B = with manch. + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x00, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x43, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_10kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_10kBaud_manchester.h new file mode 100644 index 0000000000..93688d9994 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_10kBaud_manchester.h @@ -0,0 +1,371 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 10 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +enum { + CC1100_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + +/** SLOW THINGS DOWN FOR THIS DATA RATE */ +#define BLAZE_ACK_WAIT 2000 +#define TRANSMITTER_QUALITY_THRESHOLD 200 +#define BLAZE_MIN_INITIAL_BACKOFF 5000 +#define BLAZE_MIN_BACKOFF 500 +#define BLAZE_BACKOFF_PERIOD 100 + + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 317.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 100 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, + CC1100_PA_MINUS_15 = 0x1C, + CC1100_PA_MINUS_20 = 0x0D, + CC1100_PA_MINUS_30 = 0x12, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts at the end of a received packet */ + CC1100_CONFIG_IOCFG0 = 0x01, + + /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ + CC1100_CONFIG_FIFOTHR = 0x0F, + + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xC8, + CC1100_CONFIG_MDMCFG3 = 0x93, + CC1100_CONFIG_MDMCFG2 = 0x1B, // GFSK. 0x13 = no manchester / 0x1B = with manch. + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x34, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x43, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_250kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_250kBaud_manchester.h new file mode 100644 index 0000000000..3192b9a009 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_250kBaud_manchester.h @@ -0,0 +1,359 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 250 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 315 MHz" +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 314.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 70 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x0C, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0x2D, + CC1100_CONFIG_MDMCFG3 = 0x3B, + CC1100_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x62, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x1D, + CC1100_CONFIG_BSCFG = 0x1C, + CC1100_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0xB0, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0xB6, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xEA, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x88, + CC1100_CONFIG_TEST1 = 0x31, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + + + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_26kBaud_MSK_915.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_26kBaud_MSK_915.h new file mode 100644 index 0000000000..4f50283f1f --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_26kBaud_MSK_915.h @@ -0,0 +1,367 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 10 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** SLOW THINGS DOWN FOR THIS DATA RATE */ +#define BLAZE_ACK_WAIT 2000 +#define TRANSMITTER_QUALITY_THRESHOLD 200 +#define BLAZE_MIN_INITIAL_BACKOFF 5000 +#define BLAZE_MIN_BACKOFF 500 +#define BLAZE_BACKOFF_PERIOD 100 + + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 315 MHz" +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts at the end of a received packet */ + CC1100_CONFIG_IOCFG0 = 0x01, + + /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ + CC1100_CONFIG_FIFOTHR = 0x0F, + + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xFA, + CC1100_CONFIG_MDMCFG3 = 0x06, + CC1100_CONFIG_MDMCFG2 = 0x73, + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x00, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x09, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_38.4kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_38.4kBaud_manchester.h new file mode 100644 index 0000000000..412d8558a4 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_38.4kBaud_manchester.h @@ -0,0 +1,357 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 38.4 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 315 MHz" +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 314.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 70 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xCA, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester / 0x0B = with manch. + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x34, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x43, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_433MHz_150kBaud.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_433MHz_150kBaud.h new file mode 100644 index 0000000000..e1dc790e31 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_433MHz_150kBaud.h @@ -0,0 +1,377 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +enum { + CC1100_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#define CC1100_CRYSTAL_HZ 26000000 +#define CC1100_433_MHZ 1 +#define CC1100_MATCHING_NETWORK CC1100_433_MHZ + +// NOTE: these are used for calculating channels at runtime +#define CC1100_LOWEST_FREQ 400998 +#define CC1100_CHANNEL_WIDTH 199 +#define CC1100_DEFAULT_CHANNEL 161 +#define CC1100_CHANNEL_MIN 0 +#define CC1100_CHANNEL_MAX 255 + + +/* register settings, many of which calculated by RF Smart Studio */ +/* Reset changes registers to Default values */ + +enum CC1100_config_reg_state_enums { + + /* Registers preserve programming values in SLEEP */ + CC1100_CONFIG_IOCFG2 = 0x29, // 0x00, GDO2 Output Pin Config + // 7, RO, not used + // 6, R/W, GDO2_INV, Invert output. Default active high = 0x0. + // 5:0, R/W, GDO2_CFG, Default CHP_RDYn = 0x29. + + CC1100_CONFIG_IOCFG1 = 0x2E, // 0x01, GDO1 Output Pin Config + // 7, R/W, GDO_DS, Output drive strength on GD0 pins. Default low = 0x0. + // 6, R/W, GDO1_INV, Invert output. Default active high = 0x0. + // 5:0, R/W, GDO2_CFG, Default Tri-state = 0x2E. + + CC1100_CONFIG_IOCFG0 = 0x01, // 0x02, GDO0 Output Pin Config + // 7, R/W, TEMP_SENSOR_ENABLE, Enable analog temp sensor. Default disable = 0x0. write 0 in all other bits if enabled + // 6, R/W, GDO0_INV, Invert output. default active high = 0x0. + // 5:0, R/W, GDO0_CFG, Default CLK_XOSC/192 = 0x3F. + // 0x01 = Associated to RX_FIFO + + CC1100_CONFIG_FIFOTHR = 0x0F, // 0x03, RX FIFO and TX FIFO Thresholds + // 7, RO, reserved, write 0 for future compatability + // 6, R/W, ADC_RETENTION, Waking from SLEEP default = 0x0, TEST1 = 0x31 and TEST2 = 0x88. + // Set = 0x1, TEST1 = 0x35 and TEST2 = 0x81. + // 5:4, R/W, CLOSE_IN_RX, RX Attenuation, Default 0dB = 0x0. + // 3:0, R/W, FIFO_THR, FIFO threshold in bytes. Default = 0x7, TX = 33 and RX = 32. + // Set = 0xF, TX = 1 and RX = 64. + + CC1100_CONFIG_SYNC1 = 0xD3, // 0x04, Sync Word, High Byte + // 7:0, R/W, SYNC_H, 8 MSB of 16 bit sync word. Default 0xD3 + + CC1100_CONFIG_SYNC0 = 0x91, // 0x05, Sync Word, Low Byte + // 7:0, R/W, SYNC_L, 8 LSB of 16 bit sync word. Default 0x91 + + CC1100_CONFIG_PKTLEN = 0x3D, // 0x06, Packet Length + // 7:0, R/W, PACKET_LENGTH, Maximum variable packet length is 61 per Errata + + CC1100_CONFIG_PKTCTRL1 = 0x24, // 0x07, Packet Automation Control + // 7:5, R/W, PQT, Preamble quality estimator threshold, Default = 0x0 + // 4, RO, not used + // 3, R/W, CRC_AUTOFLUSH, Enable automatic flush of RX FIFO when CRC is not OK. Default disable = 0x0 + // 2, R/W, APPEND_STATUS, Default enabled = 0x1, CRC OK + LQI byte and RSSI byte appended to payload. + // 1:0, R/W, ADR_CHK, Received packets address check config. Default No address check = 0x0. + + CC1100_CONFIG_PKTCTRL0 = 0x45, // 0x08, Packet Automation Control + // 7, RO, not used + // 6, R/W, WHITE_BIT, Turn data whitening on/off. Default on = 0x1. + // 5:4, R/W, PKT_FORMAT, Format of RX/TX data, Default normal = 0x0. + // 2, R/W, CRC_EN, CRC check. Default on = 0x1 + // 1:0, R/W, LENGTH_CONFIG, Config packet length, Default variable packet length mode = 0x1. + + CC1100_CONFIG_ADDR = 0x00, // 0x09, Device Address + // 7:0, R/W, DEVICE_ADDR, Address used for packet filtration. Default 0x00 + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, // 0x0A, Channel Number + // 7:0, R/W, CHAN, 8bit usigned channel number. Default = 0x00 + + CC1100_CONFIG_FSCTRL1 = 0x0E, // 0x0B, Frequency Synthesizer Control + // 7:6, RO, not used + // 5, R/W, reserved, write 0 for future compatability. + // 4:0, R/W, FREQ_IF, Desired IF Frequency to employ in RX. Default = 0x0F + + CC1100_CONFIG_FSCTRL0 = 0x00, // 0x0C, Frequency Synthesizer Control + // 7:0, R/W, FREQOFF, Offset added to base Frequency for synthesizer. Default = 0x00 + + CC1100_CONFIG_FREQ2 = 0x0F, // 0x0D, Frequency Control Word, High + // 7:6, RO, FREQ, not used + // 5:0, R/W, FREQ_H, Base frequency for synthesizer. Default = 0x1E + + CC1100_CONFIG_FREQ1 = 0x6C, // 0x0E, Frequency Control Word, Middle + // 7:0, R/W, FREQ_M, Ref FREQ2 register. Default = 0xC4 + + CC1100_CONFIG_FREQ0 = 0x4E, // 0x0F, Frequency Control Word, Low + // 7:0, R/W, FREQ_L, Ref FREQ2 register. Default 0xEC + + CC1100_CONFIG_MDMCFG4 = 0x0C, // 0x10, Modem Config + // 7:6, R/W. CHANBW_E, channel bandwidth decimation ratio exponent. Default = 0x2 + // 5:4, R/W, CHANBW_M, channel bandwidth decimation ratio mantissa. Default = 0x0 + // 3:0, R/W, DRATE_E, User specified symbol rate exponent. Default = 0xC + + CC1100_CONFIG_MDMCFG3 = 0x3B, // 0x11, Modem Config + // 7:0, R/W. DRATE_M, User specified symbol rate mantissa. Default enable = 0x22 + + CC1100_CONFIG_MDMCFG2 = 0x73, // 0x12, Modem Config + // 7, R/W. DEM_DCFILT_OFF, Disable digital DC blocking filter. Default enable = 0x0 + // 6:4, R/W, MOD_FORMAT, Modulation format. Default 2-FSK = 0x0 + // 0x7 = MSK + // 3, R/W, MANCHESTER_EN, . Enable Manchester. Default disable = 0x0 + // 2:0, R/W, SYNC_MODE, Combined sync-word qualifier mode. Default 16bit TX/RX sync word = 0x2 + // 0x3 = repeated sync word TX, 30 of 32bit sync word bits detected RX + + CC1100_CONFIG_MDMCFG1 = 0x42, // 0x13, Modem Config + // 7, R/W. FEC_EN, Enable forward error correction. Default disabled = 0x0 + // 6:4, R/W, NUM_PREAMBLE, Minimum number of preable bytes. Default 4 preamble bytes = 0x2 + // 0x4 = 8 preamble bytes + // 3:2, RO, not used + // 1:0, R/W, CHANSPC_E, Channel spacing exponent. Default = 0x2 + + CC1100_CONFIG_MDMCFG0 = 0xF8, // 0x14, Modem Config + // 7:0, R/W. CHANSPC_M, Channel spacing mantissa. Default = 0xF8 + + CC1100_CONFIG_DEVIATN = 0x00, // 0x15, Modem Deviation Setting + // 7, RO, not used + // 6:4, R/W, DEVIATION_E, Deviation exponent, Default = 0x4 + // 3, RO, not used + // 2:1, R/W, DEVIATION_M, Depends on modulation format. Default mantissa for 2-FSK = 0x7 + // For MSK specifies fraction of sample period when phase change occurs. + + CC1100_CONFIG_MCSM2 = 0x07, // 0x16, Main Radio Control State Machine Config + // 7:5, RO, not used + // 4, R/W, RX_TIME_RSSI, RX termination based on RSSI (carrier sense). Default off = 0x0 + // 3, R/W, RX_TIME_QUAL, When RX_TIME expires: Default checks if sync word found = 0x0. if = 0x1 checks sync word or PQI. + // 2:0, R/W, RX_TIME, Timeout for sync word search in RX for both WOR mode and normal RX operation. Default = 0x7 + + CC1100_CONFIG_MCSM1 = 0x3F, // 0x17, Main Radio Control State Machine Config + // 7:6, RO, not used + // 5:4, R/W, CCA_MODE, Selects CCA mode. Default channel indication if RSSI below threshold = 0x3. + // 3:2, R/W, RXOFF_MODE, When packet RX'ed Default IDLE = 0x0. + // 0x3 = stay in RX. + // 1:0, R/W, TXOFF_MODE, When packet TX'd Default IDLE = 0x0. + // 0x3 = RX + + CC1100_CONFIG_MCSM0 = 0x18, // 0x18, Main Radio Control State Machine Config + // 7:6, RO, not used + // 5:4, R/W, FS_AUTOCAL, Auto calibrate. Default never = 0x0. + // 0x1 = when going from IDLE to RX or TX. + // 3:2, R/W, PO_TIMEOUT, Number of times 6bit ripple counter expires after stable XOSC, before CHP_RDYn goes low. Default 16 = 0x1 + // 1, R/W, PIN_CTRL_EN, Enables pin radio control option. Default disable = 0x0 + // 0, R/W, XOSC_FPRCE_ON, Force the XOSC to stay on in SLEEP state. Default off = 0x0 + + CC1100_CONFIG_FOCCFG = 0x1D, // 0x19, Frequency Offset Compensation Config + // 7:6, RO, not used + // 5, R/W, FOC_BS_CS_GATE, Default set = 0x1, demodulator freezes FOC and clock feedback until CS goes high. + // 4:3, R/W, FOC_PRE_K, Freq comp loog gain used before sync word detected. Default 0x2 = 3K + // 0x3 = 4K. + // 2, R/W, FOC_POST_K, Freq comp loop gain used after sync word detected. Default 0x1 = K/2 + // 1:0, R/W, FOC_LIMIT, Saturation point for FOC algorithm. Default 0x2 = BW_CHAN/4 + // 0x1 = BW_CHAN/8 + + CC1100_CONFIG_BSCFG = 0x1C, // 0x1A, Bit Sync Config + // 7:6, R/W, BS_PRE_KI, Clock recovery feedback loop integral gain before sync word. Default 2Ki = 0x1. + // 0x0 = Ki + // 5:4, R/W, BS_PRE_KP, Clock recovery feedback loop proportional gain before syn word. Default 3Kp = 0x2. + // 3, R/W, BS_POST_KI, Clock recovery feedback loop integral gain after sync word. Default Ki/2 = 0x1 + // 2, R/W, BS_POST_KP, Clock recovery feedback loop proportional gain after sync word. Default Kp = 0x1 + // 1:0, R/W, BS_LIMIT, Saturation point for the data rate offset compensation algorithm. Default none = 0x0 + + CC1100_CONFIG_AGCTRL2 = 0xC7, // 0x1B, AGC Control + // 7:6, R/W, MAX_DVGA_GAIN, Reduces max allowable DVGA gain. Default all gain can be used = 0x0 + // 0x3 = 3 highest gain settings can not be used + // 5:3, R/W, MAX_LNA_GAIN, Set max allowable LNA+LNA2 gain. Default max = 0x0 + // 2:0, R/W, MAGN_TARGET, Set digital channel filter average amplitude target. Default 33 dB = 0x3 + // 0x7 = 42 dB + + CC1100_CONFIG_AGCTRL1 = 0x00, // 0x1C, AGC Control + // 7, RO, not used + // 6, R/W, AGC_LNA_PRIORITY, LNA gain adjustment. Default 0x1 = decrease LNA first. + // 0x0 = LNA 2 decreased to min then LNA decreased. + // 5:4, R/W, CARRIER_SENSE_REL_THR, Set relative change threshold for asserting carrier sense. Default disabled = 0x0. + // 3:0, R/W, CARRIER_SENSE_ABS_THR, Set absolute RSSI threshold for asserting carrier sense. Default disabled = 0x0. + + CC1100_CONFIG_AGCTRL0 = 0xB0, // 0x1D, AGC Control + // 7:6, R/W, HYST_LEVEL, Set magnitude deviation hysteresis level. Default medium = 0x2 + // 5:4, R/W, WAIT_TIME, Set number of channel filter samples before AGC starts new samples. Default 16 = 0x1 + // 0x3 = 32 + // 3:2, R/W, AGC_FREEZE, Set when to freeze AGC gain. Default normal = 0x0. + // 1:0, R/W, FILTER_LENGTH, Set channel filter amplitude average length. + // Default 0x1 set length = 16, boundary = 8 dB. + // 0x0 set length = 8, boundary = 4 dB + + CC1100_CONFIG_WOREVT1 = 0x87, // 0x1E, High Byte Event0 Timeout + // 7:0, R/W, EVENT0, High byte of EVENT0 timeout register. Default = 0x87 + + CC1100_CONFIG_WOREVT0 = 0x6B, // 0x1F, Low Byte Event0 Timeout + // 7:0, R/W, EVENT0, Low byte of EVENT0 timeout register. Default = 0x6B + + CC1100_CONFIG_WORCTRL = 0xF8, // 0x20, Wake On Radio Control + // 7, R/W, RC_PD, Power down signal to RC osc. When 0x0 auto cal will be performed. Default = 0x1 + // 6:4, R/W, EVENT1, Timeout setting from register block. Decoded to EVENT1 timeout. Default 48 = 0x7. + // 3, R/W, RC_CAL, Default enables = 0x1 or disables RC osc calibration. + // 2, RO, not used. + // 1:0, R/W, WOR_RES, Controls EVENT0 resolution, WOR max timeout and RX normal operation max timeout. + // Default 0x0 set resolution = 1 period, timeout = 1.8 - 1.9 sec. + + CC1100_CONFIG_FREND1 = 0xB6, // 0x21, Front End RX Config + // 7:6, R/W, LNA_CURRENT, Adjust front-end LNA PTAT current output. Default = 0x1 + // 5:4, R/W, LNA2MIX_CURRENT, Adjust front-end PTAT outputs. Default = 0x1 + // 3:2, R/W, LODIC_BUF_CURRENT_RX, Adjust current in RX LO buffer. Default = 0x1 + // 1:0, R/W, MIX_CURRENT, Adjusts current in mixer. Default = 0x2 + + CC1100_CONFIG_FREND0 = 0x10, // 0x22, Front End TX Config + // 7:6, RO, not used + // 5:4, R/W, LODIV_BUF_CURRENT_TX, Adjsut current in TX LO buffer. Default = 0x1 + // 3:2, RO, not used. + // 1:0, R/W, Selects PA power setting. Default = 0x0 + + CC1100_CONFIG_FSCAL3 = 0xEA, // 0x23, Frequency Synthesizer Calibration + // 7:6, R/W, FSCAL3, Frequency synthesizer calibration config. Default = 0x2 + // 5:4, R/W, CHP_CURR_CAL_EN, when 0x0 disable charge pump calibration stage. Default = 0x2 + // 3:0, R/W, FSCAL3, Frequency synthesizer calibration result register. Default = 0x9 + + CC1100_CONFIG_FSCAL2 = 0x2A, // 0x24, Frequency Synthesizer Calibration + // 7:6, RO, not used + // 5, R/W, VCO_CORE_H_EN, Choose high/low VCO. Default low = 0x0 + // 4:0, R/W, FSCAL2, Frequency synthesizer calibration result register. Default = 0x0A + + CC1100_CONFIG_FSCAL1 = 0x00, // 0x25, Frequency Synthesizer Calibration + // 7, RO, not used + // 6:0, R/W, FSCAL1, Frequency synthesizer calibration result register. Default = 0x20 + + CC1100_CONFIG_FSCAL0 = 0x1F, // 0x26, Frequency Synthesizer Calibration + // 7, RO, not used + // 6:0, R/W, FSCAL0, Frequency synthesizer calibration control. Default = 0x13 + + CC1100_CONFIG_RCCTRL1 = 0x41, // 0x27, RC Oscillator Config + // 7, RO, not used + // 6:0, R/W, RCCTRL1, RC osc config. Default = 0x41 + + CC1100_CONFIG_RCCTRL0 = 0x00, // 0x28, RC Oscillator Config + // 7, RO, not used + // 6:0, R/W, RCCTRL0, RC osc config. Default = 0x00 + + + /* Registers loose programming values in SLEEP */ + CC1100_CONFIG_FSTEST = 0x59, // 0x29, Frequency Synthesizer Calibration Control + // 7:0, R/W, FSTEST, For test only. DO NOT WRITE TO THIS REGISTER. Default 0x59 + + CC1100_CONFIG_PTEST = 0x7F, // 0x2A, Production Test + // 7:0, R/W, PTEST, For test mostly. Write 0xBF to make temperature sensor available in IDLE. + // Write 0x7F back before leaving IDLE. Default 0x7F + + CC1100_CONFIG_AGCTST = 0x3F, // 0x2B, AGC Test + // 7:0, R/W, AGCTEST, For test only. DO NOT WRITE TO THIS REGISTER. Default 0x3F + + CC1100_CONFIG_TEST2 = 0x88, // 0x2D, Varoius Test Setting + // 7:0, R/W, TEST2, Value to write in register determined by SmartRF. Default 0x88 + + CC1100_CONFIG_TEST1 = 0x31, // 0x2E, Varoius Test Setting + // 7:0, R/W, TEST1, Value to write in register determined by SmartRF. Default 0x31 + + CC1100_CONFIG_TEST0 = 0x0B // 0x2F, Varoius Test Setting + // 7:2, R/W, TEST0, Value to write in register determined by SmartRF. Default 0x02 + // 1, R/W, VCO_SEL_CAL_EN, Enable VCO selection calibration stage. Default enable = 0x1 + // 0, R/W, TEST0, Value to write in register determined by SmartRF. Default 0x1 +}; + + +/** + * Power Amp Values: calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_433MHz_2.4kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_433MHz_2.4kBaud_manchester.h new file mode 100644 index 0000000000..513e3e3c27 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_433MHz_2.4kBaud_manchester.h @@ -0,0 +1,248 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 433MHz 2.4 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +enum { + CC1100_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + +/** SLOW THINGS DOWN FOR THIS DATA RATE */ +#define BLAZE_ACK_WAIT 5000 +#define TRANSMITTER_QUALITY_THRESHOLD 200 +#define BLAZE_MIN_INITIAL_BACKOFF 2500 +#define BLAZE_MIN_BACKOFF 200 + + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_433_MHZ 0 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 433 MHz" +#define CC1100_MATCHING_NETWORK CC1100_433_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 Matching Network ****************/ + +// Default channel is at 432.999817 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 0 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x10, + CC1100_DEFAULT_FREQ1 = 0xA7, + CC1100_DEFAULT_FREQ0 = 0x62, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_7 = 0xC8, + CC1100_PA_PLUS_5 = 0x84, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_5 +#endif + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xF6, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x1B, // 0x03 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x15, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x09, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_500kBaud.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_500kBaud.h new file mode 100644 index 0000000000..a230db3cbe --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_500kBaud.h @@ -0,0 +1,359 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 500 kBaud + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 315 MHz" +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 314.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 70 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x0E, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0x0E, + CC1100_CONFIG_MDMCFG3 = 0x3B, + CC1100_CONFIG_MDMCFG2 = 0x73, + CC1100_CONFIG_MDMCFG1 = 0x42, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x00, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x1D, + CC1100_CONFIG_BSCFG = 0x1C, + CC1100_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0xB0, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0xB6, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xEA, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x88, + CC1100_CONFIG_TEST1 = 0x31, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + + + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_76.8kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_76.8kBaud_manchester.h new file mode 100644 index 0000000000..e991628aeb --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_76.8kBaud_manchester.h @@ -0,0 +1,357 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 76.8 kBaud Manchester + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 315 MHz" +#define CC1100_MATCHING_NETWORK CC1100_315_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) +/***************** 315 Matching Network ****************/ + +// Default channel is at 314.996490 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 70 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 240 +#endif + +enum { + CC1100_LOWEST_FREQ = 300998, // kHz + CC1100_DEFAULT_FREQ2 = 0x0B, + CC1100_DEFAULT_FREQ1 = 0x93, + CC1100_DEFAULT_FREQ0 = 0xB1, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 400998, + CC1100_DEFAULT_FREQ2 = 0x0F, + CC1100_DEFAULT_FREQ1 = 0x6C, + CC1100_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x60, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) +/***************** 868 MHz Matching Network ****************/ + +// Default channel is at 868.192749 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 255 +#endif + +enum { + CC1100_LOWEST_FREQ = 839998, + CC1100_DEFAULT_FREQ2 = 0x20, + CC1100_DEFAULT_FREQ1 = 0x4E, + CC1100_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC3, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#else +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0x7B, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester / 0x0B = with manch. + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x42, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x1D, + CC1100_CONFIG_BSCFG = 0x1C, + CC1100_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0xB2, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0xB6, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xEA, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100_915MHz_10kBaud_FccCompliant.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100_915MHz_10kBaud_FccCompliant.h new file mode 100644 index 0000000000..51d16cf3ba --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100_915MHz_10kBaud_FccCompliant.h @@ -0,0 +1,248 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 10 kBaud FCC Compliant (TI design note DN006) + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC1100_H +#define CC1100_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC1100 RADIO ***" + +/** SLOW THINGS DOWN FOR THIS DATA RATE */ +#define BLAZE_ACK_WAIT 1000 +#define TRANSMITTER_QUALITY_THRESHOLD 200 +#define BLAZE_MIN_INITIAL_BACKOFF 1500 +#define BLAZE_MIN_BACKOFF 200 + + +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1100_CRYSTAL_HZ 26000000 + +#define CC1100_315_MHZ 0 +#define CC1100_433_MHZ 1 +#define CC1100_868_MHZ 2 +#define CC1100_915_MHZ 3 + +/** + * You can change the matching network at compile time + */ +#ifndef CC1100_MATCHING_NETWORK +#warning "Using CC1100 default matching network at 915 MHz" +#define CC1100_MATCHING_NETWORK CC1100_915_MHZ +#endif + + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1100 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1100_CHANNEL_MIN = [(310000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1100_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1100_CHANNEL_WIDTH + * + * CC1100_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1100_CHANNEL_MAX = [(320000 desired kHz) - (CC1100_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1100_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1100 radio defined in the + * datasheet. + */ + + +#if (CC1100_MATCHING_NETWORK == CC1100_915_MHZ) + +/***************** 915 MHz Matching Network ****************/ + +// Default channel is at 914.996796 MHz +#ifndef CC1100_DEFAULT_CHANNEL +#define CC1100_DEFAULT_CHANNEL 65 +#endif + +#ifndef CC1100_CHANNEL_MIN +#define CC1100_CHANNEL_MIN 0 +#endif + +#ifndef CC1100_CHANNEL_MAX +#define CC1100_CHANNEL_MAX 135 +#endif + +enum { + CC1100_LOWEST_FREQ = 901998, + CC1100_DEFAULT_FREQ2 = 0x22, + CC1100_DEFAULT_FREQ1 = 0xB1, + CC1100_DEFAULT_FREQ0 = 0x3B, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1100_PA_PLUS_10 = 0xC0, + CC1100_PA_PLUS_5 = 0x85, + CC1100_PA_PLUS_0 = 0x8E, + CC1100_PA_MINUS_5 = 0x57, + CC1100_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1100_PA +#define CC1100_PA CC1100_PA_PLUS_10 +#endif + + +#endif + +/** + * These are used for calculating channels at runtime + */ +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xC7, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x13, // 0x03 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x40, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x43, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x09, + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/radios/cc1100/README.txt b/tos/chips/ccxx00_single/radios/cc1100/README.txt new file mode 100644 index 0000000000..048aabf962 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc1100/README.txt @@ -0,0 +1,5 @@ +To select a lower baud rate, overwrite the CC1100.h file with the baud +rate file of your choice. Then you might need to look at BlazeTransmitP +in the TXFIFO.writeDone() event to make sure the kill switch in there, 'count', +doesn't cause your transmittion to fail prematurely. + diff --git a/tos/chips/ccxx00_single/radios/cc2500/CC2500.h b/tos/chips/ccxx00_single/radios/cc2500/CC2500.h new file mode 100644 index 0000000000..d2aed3324c --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc2500/CC2500.h @@ -0,0 +1,221 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 250 kBaud Manchester (2-FSK) + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC2500_H +#define CC2500_H + +#include "Blaze.h" + +enum { + CC2500_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + +/** + * This helps calculate new FREQx register settings at runtime. + * The frequency is in MHz. + */ +#define CC2500_CRYSTAL_MHZ 26 + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC2500 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 20 MHz around 2442.4 MHz + * You want your center frequency to be 2442.4 MHz, and your lower edge to be + * 2422.4 MHz and your upper edge to be 2462.4 MHz. + * + * Lower Channel Calculation: + * CC2500_CHANNEL_MIN = [(2422400 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * Where CC2500_LOWEST_FREQ is 2400998 kHz and 324 kHz is + * approximately the channel spacing, CC2500_CHANNEL_WIDTH + * + * CC2500_CHANNEL_MIN ~= 66 + * + * + * Upper Channel Calculation: + * CC2500_CHANNEL_MAX = [(320000 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * CC2500_CHANNEL_MAX ~= 189 + * + * Incidentally, (189+66)/2 ~= 128, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the channel spacing below so all channels from 0 to 255 fit + * within the 2.400 - 2.483 GHz band. + */ + + +/***************** 2.4 GHz Matching Network ****************/ +// Default channel is at 2441.565277 MHz +#ifndef CC2500_DEFAULT_CHANNEL +#define CC2500_DEFAULT_CHANNEL 125 +#endif + +#ifndef CC2500_CHANNEL_MIN +#define CC2500_CHANNEL_MIN 0 +#endif + +#ifndef CC2500_CHANNEL_MAX +#define CC2500_CHANNEL_MAX 255 +#endif + +enum { + CC2500_LOWEST_FREQ = 2400998, // kHz + CC2500_DEFAULT_FREQ2 = 0x5C, + CC2500_DEFAULT_FREQ1 = 0x58, + CC2500_DEFAULT_FREQ0 = 0x9D, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC2500_PA_PLUS_1 = 0xFF, + CC2500_PA_MINUS_4 = 0xA9, + CC2500_PA_MINUS_10 = 0x97, +}; + +#ifndef CC2500_PA +#define CC2500_PA CC2500_PA_PLUS_1 +#endif + + +/** + * These are used for calculating channels at runtime + */ +#define CC2500_CHANNEL_WIDTH 324 // kHz : Do not edit + +enum cc2500_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC2500_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC2500_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC2500_CONFIG_IOCFG0 = 0x01, + + CC2500_CONFIG_FIFOTHR = 0xE, + CC2500_CONFIG_SYNC1 = 0xD3, + CC2500_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC2500_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC2500_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC2500_CONFIG_PKTCTRL0 = 0x45, + + CC2500_CONFIG_ADDR = 0x00, + + CC2500_CONFIG_CHANNR = CC2500_DEFAULT_CHANNEL, + + CC2500_CONFIG_FSCTRL1 = 0x10, + CC2500_CONFIG_FSCTRL0 = 0x00, + + CC2500_CONFIG_FREQ2 = CC2500_DEFAULT_FREQ2, + CC2500_CONFIG_FREQ1 = CC2500_DEFAULT_FREQ1, + CC2500_CONFIG_FREQ0 = CC2500_DEFAULT_FREQ0, + + CC2500_CONFIG_MDMCFG4 = 0x2D, + CC2500_CONFIG_MDMCFG3 = 0x3B, + CC2500_CONFIG_MDMCFG2 = 0x0B, + CC2500_CONFIG_MDMCFG1 = 0x22, + CC2500_CONFIG_MDMCFG0 = 0xF8, + CC2500_CONFIG_DEVIATN = 0x44, + CC2500_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC2500_CONFIG_MCSM1 = 0x3F, + CC2500_CONFIG_MCSM0 = 0x18, + CC2500_CONFIG_FOCCFG = 0x1D, + CC2500_CONFIG_BSCFG = 0x1C, + CC2500_CONFIG_AGCTRL2 = 0xC7, // LNA's + CC2500_CONFIG_AGCTRL1 = 0x00, // CCA threshold definition + CC2500_CONFIG_AGCTRL0 = 0xB0, + + CC2500_CONFIG_WOREVT1 = 0x87, + CC2500_CONFIG_WOREVT0 = 0x6B, + CC2500_CONFIG_WORCTRL = 0xF8, + CC2500_CONFIG_FREND1 = 0xB6, + CC2500_CONFIG_FREND0 = 0x10, + CC2500_CONFIG_FSCAL3 = 0xEA, + CC2500_CONFIG_FSCAL2 = 0x0A, + CC2500_CONFIG_FSCAL1 = 0x00, + CC2500_CONFIG_FSCAL0 = 0x11, + + CC2500_CONFIG_RCCTRL1 = 0x41, + CC2500_CONFIG_RCCTRL0 = 0x00, + CC2500_CONFIG_FSTEST = 0x59, + CC2500_CONFIG_PTEST = 0x7F, + CC2500_CONFIG_AGCTST = 0x3F, + CC2500_CONFIG_TEST2 = 0x88, + CC2500_CONFIG_TEST1 = 0x31, + CC2500_CONFIG_TEST0 = 0x0B, + + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + + + diff --git a/tos/chips/ccxx00_single/radios/cc2500/CC2500ControlC.nc b/tos/chips/ccxx00_single/radios/cc2500/CC2500ControlC.nc new file mode 100644 index 0000000000..cfa043f886 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc2500/CC2500ControlC.nc @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "Blaze.h" +#include "BlazeInit.h" +#include "CC2500.h" + +/** + * This configuration is responsible for wiring in the CC2500 pins to the + * BlazeCentralWiringC component, and provides register values for the CC2500. + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + + +configuration CC2500ControlC { + provides { + interface BlazeConfig; + } +} + +implementation { + + components MainC, + CC2500ControlP, + ActiveMessageAddressC, + HplCC2500PinsC as Pins; + + MainC.SoftwareInit -> CC2500ControlP; + + BlazeConfig = CC2500ControlP; + + components BlazeInitC; + CC2500ControlP.BlazeCommit -> BlazeInitC.BlazeCommit; + + components BlazeCentralWiringC; + BlazeCentralWiringC.ChipCsn[ CC2500_RADIO_ID ] -> Pins.Csn; + BlazeCentralWiringC.ChipRegSettings[ CC2500_RADIO_ID ] -> CC2500ControlP; + BlazeCentralWiringC.ChipGdo0_io[ CC2500_RADIO_ID ] -> Pins.Gdo0_io; + BlazeCentralWiringC.ChipGdo2_io[ CC2500_RADIO_ID ] -> Pins.Gdo2_io; + BlazeCentralWiringC.ChipGdo0_int[ CC2500_RADIO_ID ] -> Pins.Gdo0_int; + BlazeCentralWiringC.ChipGdo2_int[ CC2500_RADIO_ID ] -> Pins.Gdo2_int; + BlazeCentralWiringC.ChipConfig[ CC2500_RADIO_ID ] -> CC2500ControlP.BlazeConfig; + + components SplitControlManagerC; + CC2500ControlP.SplitControlManager -> SplitControlManagerC; + + components LedsC; + CC2500ControlP.Leds -> LedsC; + +} + diff --git a/tos/chips/ccxx00_single/radios/cc2500/CC2500ControlP.nc b/tos/chips/ccxx00_single/radios/cc2500/CC2500ControlP.nc new file mode 100644 index 0000000000..ec955387b2 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc2500/CC2500ControlP.nc @@ -0,0 +1,370 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Manage the CC1100 SPI connection + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#include "Blaze.h" +#include "CC2500.h" +#include "AM.h" + +module CC2500ControlP { + + provides { + interface Init as SoftwareInit; + interface BlazeRegSettings; + interface BlazeConfig; + } + + uses { + interface SplitControlManager; + interface BlazeCommit; + interface Leds; + } +} + +implementation { + + /** TRUE if address recognition is enabled */ + norace bool addressRecognition; + + /** TRUE if PAN recognition is enabled */ + norace bool panRecognition; + + /** TRUE if we should auto-acknowledge packets if an ack is requested */ + norace bool autoAck; + + + /** Default register values. Change the configuration by editing CC2500.h */ + uint8_t regValues[] = { + CC2500_CONFIG_IOCFG2, + CC2500_CONFIG_IOCFG1, + CC2500_CONFIG_IOCFG0, + CC2500_CONFIG_FIFOTHR, + CC2500_CONFIG_SYNC1, + CC2500_CONFIG_SYNC0, + CC2500_CONFIG_PKTLEN, + CC2500_CONFIG_PKTCTRL1, + CC2500_CONFIG_PKTCTRL0, + CC2500_CONFIG_ADDR, + CC2500_CONFIG_CHANNR, + CC2500_CONFIG_FSCTRL1, + CC2500_CONFIG_FSCTRL0, + CC2500_CONFIG_FREQ2, + CC2500_CONFIG_FREQ1, + CC2500_CONFIG_FREQ0, + CC2500_CONFIG_MDMCFG4, + CC2500_CONFIG_MDMCFG3, + CC2500_CONFIG_MDMCFG2, + CC2500_CONFIG_MDMCFG1, + CC2500_CONFIG_MDMCFG0, + CC2500_CONFIG_DEVIATN, + CC2500_CONFIG_MCSM2, + CC2500_CONFIG_MCSM1, + CC2500_CONFIG_MCSM0, + CC2500_CONFIG_FOCCFG, + CC2500_CONFIG_BSCFG, + CC2500_CONFIG_AGCTRL2, + CC2500_CONFIG_AGCTRL1, + CC2500_CONFIG_AGCTRL0, + CC2500_CONFIG_WOREVT1, + CC2500_CONFIG_WOREVT0, + CC2500_CONFIG_WORCTRL, + CC2500_CONFIG_FREND1, + CC2500_CONFIG_FREND0, + CC2500_CONFIG_FSCAL3, + CC2500_CONFIG_FSCAL2, + CC2500_CONFIG_FSCAL1, + CC2500_CONFIG_FSCAL0, + CC2500_CONFIG_RCCTRL1, + CC2500_CONFIG_RCCTRL0, + CC2500_CONFIG_FSTEST, + CC2500_CONFIG_PTEST, + CC2500_CONFIG_AGCTST, + CC2500_CONFIG_TEST2, + CC2500_CONFIG_TEST1, + CC2500_CONFIG_TEST0, + }; + + + + /***************** Prototypes ****************/ + uint8_t freqToChannel( uint32_t freq ); + uint32_t channelToFreq( uint8_t chan ); + uint32_t toFreqRegValues(float desiredFrequencyHz); + uint32_t getFreqReg(); + void putFreqReg(uint32_t freqx); + + /***************** SoftwareInit Commands ****************/ + command error_t SoftwareInit.init() { +#if defined(NO_ACKNOWLEDGEMENTS) + autoAck = FALSE; +#else + autoAck = TRUE; +#endif + +#if defined(NO_ADDRESS_RECOGNITION) + call BlazeConfig.setAddressRecognition(FALSE); +#else + call BlazeConfig.setAddressRecognition(TRUE); +#endif + + +#if defined(NO_PAN_RECOGNITION) + panRecognition = FALSE; +#else + panRecognition = TRUE; +#endif + + return SUCCESS; + } + + /***************** BlazeInit Commands ****************/ + command uint8_t *BlazeRegSettings.getDefaultRegisters() { + return regValues; + } + + command uint8_t BlazeRegSettings.getPa() { + return CC2500_PA; + } + + /***************** BlazeConfig Commands ****************/ + /** + * If changes have been made to the chip's configuration, those changes are + * currently stored in the microcontroller. This command will commit those + * changes to hardware. It must be called for the changes to take effect. + * @return SUCCESS if the changes will be committed. + */ + command error_t BlazeConfig.commit() { + if(call SplitControlManager.isOn()) { + return call BlazeCommit.commit(); + + } else { + // These changes will be automatically committed next time you turn it on. + return EOFF; + } + } + + /** + * @param on TRUE to turn address recognition on, FALSE to turn it off + * You must call sync() after this to propagate changes to hardware + */ + command void BlazeConfig.setAddressRecognition(bool on) { + atomic addressRecognition = on; + } + + /** + * @return TRUE if address recognition is enabled + */ + async command bool BlazeConfig.isAddressRecognitionEnabled() { + return addressRecognition; + } + + /** + * @param on TRUE if we should only accept packets from other nodes in our PAN + */ + command void BlazeConfig.setPanRecognition(bool on) { + panRecognition = on; + } + + /** + * @return TRUE if PAN address recognition is enabled + */ + async command bool BlazeConfig.isPanRecognitionEnabled() { + return panRecognition; + } + + /** + * Sync must be called for acknowledgement changes to take effect + * @param enableAutoAck TRUE to enable auto acknowledgements + * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to + * default to software auto acknowledgements + */ + command void BlazeConfig.setAutoAck(bool enableAutoAck) { + atomic autoAck = enableAutoAck; + } + + /** + * @return TRUE if auto acks are enabled + */ + async command bool BlazeConfig.isAutoAckEnabled() { + bool atomicAckEnabled; + atomic atomicAckEnabled = autoAck; + return atomicAckEnabled; + } + + /** + * Set the base frequency. The unit depends on the type of chip you're using: + * > CC2500 is in MHz, so you'd say "2145" for 2145 MHz. + * > CC2500 is in Hz, so you'd say "315000000" for 315 MHz. + * + * You'll need to commit these changes when you're done. + * + * @param freq The desired frequency + * @return EINVAL if there's a problem + */ + command error_t BlazeConfig.setBaseFrequency(uint32_t freq) { + if(freq < 300000000 || freq > 950000000) { + return EINVAL; + } + + putFreqReg(toFreqRegValues((float) freq)); + return SUCCESS; + } + + /** + * Get the base frequency, in whatever unit the radio uses. + * > CC2500 uses MHz + * > CC2500 uses Hz + * @return the base frequency + */ + command uint32_t BlazeConfig.getBaseFrequency() { + uint32_t freqReg = getFreqReg(); + float multiplier = ((float) CC2500_CRYSTAL_MHZ / (float) 65536); + return (uint32_t) (multiplier * freqReg); + } + + /** + * This command is used to set the (approximate) frequency the radio. + * It uses the assumed base frequency, the assumed channel width and the changes the + * value in the channel register. + * @param freqKhz - the desired frequency in Khz to set the radio to + * @reutrn - FAIL if desired frequency is not in range, else SUCCESS + */ + command error_t BlazeConfig.setChannelFrequencyKhz( uint32_t freqKhz ) { + // We have to convert our base frequency in Hz to kHz + if((freqKhz > (call BlazeConfig.getBaseFrequency() / 1000) + (CC2500_CHANNEL_WIDTH * 255)) + || (freqKhz < (call BlazeConfig.getBaseFrequency() / 1000))){ + return EINVAL; + } + + regValues[BLAZE_CHANNR] = freqToChannel(freqKhz); + return SUCCESS; + } + + /** + * This command is used to get the current (approximate) frequency the radio is set to in KHz. + * It uses the assumed base frequency, the assumed channel width and the current value in the + * channel register to calculate this. + * @return approx. frequency in KHz + */ + command uint32_t BlazeConfig.getChannelFrequencyKhz() { + return channelToFreq(regValues[BLAZE_CHANNR]); + } + + /** + * This command sets the value of the channel register on the radio + * @param chan - the value of the channel + * @return EINVAL if the channel is out of bounds + */ + command error_t BlazeConfig.setChannel( uint8_t chan ) { + if(chan < CC2500_CHANNEL_MIN || chan > CC2500_CHANNEL_MAX) { + return EINVAL; + } + + regValues[BLAZE_CHANNR] = chan; + return SUCCESS; + } + + /** + * This command returns the value of the channel register on the radio + * @return the value of the channel register + */ + command uint8_t BlazeConfig.getChannel() { + return regValues[BLAZE_CHANNR]; + } + + + /***************** BlazeCommit Events ****************/ + event void BlazeCommit.commitDone() { + signal BlazeConfig.commitDone(); + } + + /***************** SplitControlManager Events ****************/ + event void SplitControlManager.stateChange() { + } + + /***************** Functions ****************/ + uint8_t freqToChannel( uint32_t freq ) { + uint32_t offset; + uint32_t rem; + uint8_t chann; + offset = freq - (call BlazeConfig.getBaseFrequency() / 1000); // Hz->kHz + rem = offset % CC2500_CHANNEL_WIDTH; + chann = (uint8_t)(offset / CC2500_CHANNEL_WIDTH); + if(rem > (CC2500_CHANNEL_WIDTH >> 1)){ + chann++; + } + return chann; + } + + uint32_t channelToFreq( uint8_t chan ){ + uint32_t offset; + offset = (uint32_t)(((uint32_t)chan) * CC2500_CHANNEL_WIDTH); + return offset + (call BlazeConfig.getBaseFrequency() / 1000); // Hz->kHz + } + + /** + * Calculate the FREQx registers based on a desired frequency. + * Your crystal must be specified correctly in the CC2500.h file. + * @param desiredFrequencyHz something like 315000000 + * @return the contents of the FREQ2,1,0 registers all combined + */ + uint32_t toFreqRegValues(float desiredFrequencyHz) { + float divisor = ((float) CC2500_CRYSTAL_MHZ / (float) 65536); + return (uint32_t) (desiredFrequencyHz / divisor); + } + + /** + * @return the contents of the FREQx registers combined + */ + uint32_t getFreqReg() { + return (((uint32_t) regValues[BLAZE_FREQ2]) << 16) + | (((uint32_t) regValues[BLAZE_FREQ1]) << 8) + | (((uint32_t) regValues[BLAZE_FREQ0])); + } + + /** + * Fill the FREQx registers with the given frequency register setting. + */ + void putFreqReg(uint32_t freqx) { + regValues[BLAZE_FREQ2] = freqx >> 16; + regValues[BLAZE_FREQ1] = freqx >> 8; + regValues[BLAZE_FREQ0] = freqx; + } + + /***************** Defaults ****************/ + default event void BlazeConfig.commitDone() {} +} diff --git a/tos/chips/ccxx00_single/radios/cc2500/CC2500_1.2kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc2500/CC2500_1.2kBaud_manchester.h new file mode 100644 index 0000000000..0131afc88e --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc2500/CC2500_1.2kBaud_manchester.h @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 1.2 kBaud Manchester (2-FSK) + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC2500_H +#define CC2500_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC2500 RADIO ***" + +enum { + CC2500_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + +/** + * This helps calculate new FREQx register settings at runtime. + * The frequency is in MHz. + */ +#define CC2500_CRYSTAL_MHZ 26 + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC2500 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 20 MHz around 2442.4 MHz + * You want your center frequency to be 2442.4 MHz, and your lower edge to be + * 2422.4 MHz and your upper edge to be 2462.4 MHz. + * + * Lower Channel Calculation: + * CC2500_CHANNEL_MIN = [(2422400 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * Where CC2500_LOWEST_FREQ is 2400998 kHz and 324 kHz is + * approximately the channel spacing, CC2500_CHANNEL_WIDTH + * + * CC2500_CHANNEL_MIN ~= 66 + * + * + * Upper Channel Calculation: + * CC2500_CHANNEL_MAX = [(320000 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * CC2500_CHANNEL_MAX ~= 189 + * + * Incidentally, (189+66)/2 ~= 128, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the channel spacing below so all channels from 0 to 255 fit + * within the 2.400 - 2.483 GHz band. + */ + + +/***************** 2.4 GHz Matching Network ****************/ +// Default channel is at 2441.565277 MHz +#ifndef CC2500_DEFAULT_CHANNEL +#define CC2500_DEFAULT_CHANNEL 125 +#endif + +#ifndef CC2500_CHANNEL_MIN +#define CC2500_CHANNEL_MIN 0 +#endif + +#ifndef CC2500_CHANNEL_MAX +#define CC2500_CHANNEL_MAX 255 +#endif + +enum { + CC2500_LOWEST_FREQ = 2400998, // kHz + CC2500_DEFAULT_FREQ2 = 0x5C, + CC2500_DEFAULT_FREQ1 = 0x58, + CC2500_DEFAULT_FREQ0 = 0x9D, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC2500_PA_PLUS_1 = 0xFF, + CC2500_PA_MINUS_4 = 0xA9, + CC2500_PA_MINUS_10 = 0x97, +}; + +#ifndef CC2500_PA +#define CC2500_PA CC2500_PA_PLUS_1 +#endif + + +/** + * These are used for calculating channels at runtime + */ +#define CC2500_CHANNEL_WIDTH 324 // kHz : Do not edit + +enum cc2500_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC2500_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC2500_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC2500_CONFIG_IOCFG0 = 0x01, + + CC2500_CONFIG_FIFOTHR = 0xE, + CC2500_CONFIG_SYNC1 = 0xD3, + CC2500_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC2500_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC2500_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC2500_CONFIG_PKTCTRL0 = 0x45, + + CC2500_CONFIG_ADDR = 0x00, + + CC2500_CONFIG_CHANNR = CC2500_DEFAULT_CHANNEL, + + CC2500_CONFIG_FSCTRL1 = 0x10, + CC2500_CONFIG_FSCTRL0 = 0x00, + + CC2500_CONFIG_FREQ2 = CC2500_DEFAULT_FREQ2, + CC2500_CONFIG_FREQ1 = CC2500_DEFAULT_FREQ1, + CC2500_CONFIG_FREQ0 = CC2500_DEFAULT_FREQ0, + + CC2500_CONFIG_MDMCFG4 = 0x85, + CC2500_CONFIG_MDMCFG3 = 0x83, + CC2500_CONFIG_MDMCFG2 = 0x0B, + CC2500_CONFIG_MDMCFG1 = 0x22, + CC2500_CONFIG_MDMCFG0 = 0xF8, + CC2500_CONFIG_DEVIATN = 0x44, + CC2500_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC2500_CONFIG_MCSM1 = 0x3F, + CC2500_CONFIG_MCSM0 = 0x18, + CC2500_CONFIG_FOCCFG = 0x16, + CC2500_CONFIG_BSCFG = 0x6C, + CC2500_CONFIG_AGCTRL2 = 0x03, // LNA's + CC2500_CONFIG_AGCTRL1 = 0x40, // CCA threshold definition + CC2500_CONFIG_AGCTRL0 = 0x91, + + CC2500_CONFIG_WOREVT1 = 0x87, + CC2500_CONFIG_WOREVT0 = 0x6B, + CC2500_CONFIG_WORCTRL = 0xF8, + CC2500_CONFIG_FREND1 = 0x56, + CC2500_CONFIG_FREND0 = 0x10, + CC2500_CONFIG_FSCAL3 = 0xA9, + CC2500_CONFIG_FSCAL2 = 0x0A, + CC2500_CONFIG_FSCAL1 = 0x00, + CC2500_CONFIG_FSCAL0 = 0x11, + + CC2500_CONFIG_RCCTRL1 = 0x41, + CC2500_CONFIG_RCCTRL0 = 0x00, + CC2500_CONFIG_FSTEST = 0x59, + CC2500_CONFIG_PTEST = 0x7F, + CC2500_CONFIG_AGCTST = 0x3F, + CC2500_CONFIG_TEST2 = 0x88, + CC2500_CONFIG_TEST1 = 0x31, + CC2500_CONFIG_TEST0 = 0x0B, + + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + + + diff --git a/tos/chips/ccxx00_single/radios/cc2500/CC2500_250kBaud.h b/tos/chips/ccxx00_single/radios/cc2500/CC2500_250kBaud.h new file mode 100644 index 0000000000..bd3052fe2a --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc2500/CC2500_250kBaud.h @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 250 kBaud (MSK) + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC2500_H +#define CC2500_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC2500 RADIO ***" + +enum { + CC2500_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + +/** + * This helps calculate new FREQx register settings at runtime. + * The frequency is in MHz. + */ +#define CC2500_CRYSTAL_MHZ 26 + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC2500 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 20 MHz around 2442.4 MHz + * You want your center frequency to be 2442.4 MHz, and your lower edge to be + * 2422.4 MHz and your upper edge to be 2462.4 MHz. + * + * Lower Channel Calculation: + * CC2500_CHANNEL_MIN = [(2422400 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * Where CC2500_LOWEST_FREQ is 2400998 kHz and 324 kHz is + * approximately the channel spacing, CC2500_CHANNEL_WIDTH + * + * CC2500_CHANNEL_MIN ~= 66 + * + * + * Upper Channel Calculation: + * CC2500_CHANNEL_MAX = [(320000 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * CC2500_CHANNEL_MAX ~= 189 + * + * Incidentally, (189+66)/2 ~= 128, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the channel spacing below so all channels from 0 to 255 fit + * within the 2.400 - 2.483 GHz band. + */ + + +/***************** 2.4 GHz Matching Network ****************/ +// Default channel is at 2441.565277 MHz +#ifndef CC2500_DEFAULT_CHANNEL +#define CC2500_DEFAULT_CHANNEL 125 +#endif + +#ifndef CC2500_CHANNEL_MIN +#define CC2500_CHANNEL_MIN 0 +#endif + +#ifndef CC2500_CHANNEL_MAX +#define CC2500_CHANNEL_MAX 255 +#endif + +enum { + CC2500_LOWEST_FREQ = 2400998, // kHz + CC2500_DEFAULT_FREQ2 = 0x5C, + CC2500_DEFAULT_FREQ1 = 0x58, + CC2500_DEFAULT_FREQ0 = 0x9D, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC2500_PA_PLUS_1 = 0xFF, + CC2500_PA_MINUS_4 = 0xA9, + CC2500_PA_MINUS_10 = 0x97, +}; + +#ifndef CC2500_PA +#define CC2500_PA CC2500_PA_PLUS_1 +#endif + + +/** + * These are used for calculating channels at runtime + */ +#define CC2500_CHANNEL_WIDTH 324 // kHz : Do not edit + +enum cc2500_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC2500_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC2500_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC2500_CONFIG_IOCFG0 = 0x01, + + CC2500_CONFIG_FIFOTHR = 0xE, + CC2500_CONFIG_SYNC1 = 0xD3, + CC2500_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC2500_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC2500_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC2500_CONFIG_PKTCTRL0 = 0x45, + + CC2500_CONFIG_ADDR = 0x00, + + CC2500_CONFIG_CHANNR = CC2500_DEFAULT_CHANNEL, + + CC2500_CONFIG_FSCTRL1 = 0x10, + CC2500_CONFIG_FSCTRL0 = 0x00, + + CC2500_CONFIG_FREQ2 = CC2500_DEFAULT_FREQ2, + CC2500_CONFIG_FREQ1 = CC2500_DEFAULT_FREQ1, + CC2500_CONFIG_FREQ0 = CC2500_DEFAULT_FREQ0, + + CC2500_CONFIG_MDMCFG4 = 0x2D, + CC2500_CONFIG_MDMCFG3 = 0x3B, + CC2500_CONFIG_MDMCFG2 = 0x7B, + CC2500_CONFIG_MDMCFG1 = 0x22, + CC2500_CONFIG_MDMCFG0 = 0xF8, + CC2500_CONFIG_DEVIATN = 0x01, + CC2500_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC2500_CONFIG_MCSM1 = 0x3F, + CC2500_CONFIG_MCSM0 = 0x18, + CC2500_CONFIG_FOCCFG = 0x1D, + CC2500_CONFIG_BSCFG = 0x1C, + CC2500_CONFIG_AGCTRL2 = 0xC7, // LNA's + CC2500_CONFIG_AGCTRL1 = 0x00, // CCA threshold definition + CC2500_CONFIG_AGCTRL0 = 0xB0, + + CC2500_CONFIG_WOREVT1 = 0x87, + CC2500_CONFIG_WOREVT0 = 0x6B, + CC2500_CONFIG_WORCTRL = 0xF8, + CC2500_CONFIG_FREND1 = 0xB6, + CC2500_CONFIG_FREND0 = 0x10, + CC2500_CONFIG_FSCAL3 = 0xEA, + CC2500_CONFIG_FSCAL2 = 0x0A, + CC2500_CONFIG_FSCAL1 = 0x00, + CC2500_CONFIG_FSCAL0 = 0x11, + + CC2500_CONFIG_RCCTRL1 = 0x41, + CC2500_CONFIG_RCCTRL0 = 0x00, + CC2500_CONFIG_FSTEST = 0x59, + CC2500_CONFIG_PTEST = 0x7F, + CC2500_CONFIG_AGCTST = 0x3F, + CC2500_CONFIG_TEST2 = 0x88, + CC2500_CONFIG_TEST1 = 0x31, + CC2500_CONFIG_TEST0 = 0x0B, + + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + + + diff --git a/tos/chips/ccxx00_single/radios/cc2500/CC2500_250kBaud_manchester.h b/tos/chips/ccxx00_single/radios/cc2500/CC2500_250kBaud_manchester.h new file mode 100644 index 0000000000..c852124ee1 --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc2500/CC2500_250kBaud_manchester.h @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 250 kBaud Manchester (2-FSK) + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC2500_H +#define CC2500_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC2500 RADIO ***" + +enum { + CC2500_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + +/** + * This helps calculate new FREQx register settings at runtime. + * The frequency is in MHz. + */ +#define CC2500_CRYSTAL_MHZ 26 + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC2500 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 20 MHz around 2442.4 MHz + * You want your center frequency to be 2442.4 MHz, and your lower edge to be + * 2422.4 MHz and your upper edge to be 2462.4 MHz. + * + * Lower Channel Calculation: + * CC2500_CHANNEL_MIN = [(2422400 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * Where CC2500_LOWEST_FREQ is 2400998 kHz and 324 kHz is + * approximately the channel spacing, CC2500_CHANNEL_WIDTH + * + * CC2500_CHANNEL_MIN ~= 66 + * + * + * Upper Channel Calculation: + * CC2500_CHANNEL_MAX = [(320000 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * CC2500_CHANNEL_MAX ~= 189 + * + * Incidentally, (189+66)/2 ~= 128, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the channel spacing below so all channels from 0 to 255 fit + * within the 2.400 - 2.483 GHz band. + */ + + +/***************** 2.4 GHz Matching Network ****************/ +// Default channel is at 2441.565277 MHz +#ifndef CC2500_DEFAULT_CHANNEL +#define CC2500_DEFAULT_CHANNEL 125 +#endif + +#ifndef CC2500_CHANNEL_MIN +#define CC2500_CHANNEL_MIN 0 +#endif + +#ifndef CC2500_CHANNEL_MAX +#define CC2500_CHANNEL_MAX 255 +#endif + +enum { + CC2500_LOWEST_FREQ = 2400998, // kHz + CC2500_DEFAULT_FREQ2 = 0x5C, + CC2500_DEFAULT_FREQ1 = 0x58, + CC2500_DEFAULT_FREQ0 = 0x9D, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC2500_PA_PLUS_1 = 0xFF, + CC2500_PA_MINUS_4 = 0xA9, + CC2500_PA_MINUS_10 = 0x97, +}; + +#ifndef CC2500_PA +#define CC2500_PA CC2500_PA_PLUS_1 +#endif + + +/** + * These are used for calculating channels at runtime + */ +#define CC2500_CHANNEL_WIDTH 324 // kHz : Do not edit + +enum cc2500_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC2500_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC2500_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC2500_CONFIG_IOCFG0 = 0x01, + + CC2500_CONFIG_FIFOTHR = 0xE, + CC2500_CONFIG_SYNC1 = 0xD3, + CC2500_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC2500_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC2500_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC2500_CONFIG_PKTCTRL0 = 0x45, + + CC2500_CONFIG_ADDR = 0x00, + + CC2500_CONFIG_CHANNR = CC2500_DEFAULT_CHANNEL, + + CC2500_CONFIG_FSCTRL1 = 0x10, + CC2500_CONFIG_FSCTRL0 = 0x00, + + CC2500_CONFIG_FREQ2 = CC2500_DEFAULT_FREQ2, + CC2500_CONFIG_FREQ1 = CC2500_DEFAULT_FREQ1, + CC2500_CONFIG_FREQ0 = CC2500_DEFAULT_FREQ0, + + CC2500_CONFIG_MDMCFG4 = 0x2D, + CC2500_CONFIG_MDMCFG3 = 0x3B, + CC2500_CONFIG_MDMCFG2 = 0x0B, + CC2500_CONFIG_MDMCFG1 = 0x22, + CC2500_CONFIG_MDMCFG0 = 0xF8, + CC2500_CONFIG_DEVIATN = 0x44, + CC2500_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC2500_CONFIG_MCSM1 = 0x3F, + CC2500_CONFIG_MCSM0 = 0x18, + CC2500_CONFIG_FOCCFG = 0x1D, + CC2500_CONFIG_BSCFG = 0x1C, + CC2500_CONFIG_AGCTRL2 = 0xC7, // LNA's + CC2500_CONFIG_AGCTRL1 = 0x00, // CCA threshold definition + CC2500_CONFIG_AGCTRL0 = 0xB0, + + CC2500_CONFIG_WOREVT1 = 0x87, + CC2500_CONFIG_WOREVT0 = 0x6B, + CC2500_CONFIG_WORCTRL = 0xF8, + CC2500_CONFIG_FREND1 = 0xB6, + CC2500_CONFIG_FREND0 = 0x10, + CC2500_CONFIG_FSCAL3 = 0xEA, + CC2500_CONFIG_FSCAL2 = 0x0A, + CC2500_CONFIG_FSCAL1 = 0x00, + CC2500_CONFIG_FSCAL0 = 0x11, + + CC2500_CONFIG_RCCTRL1 = 0x41, + CC2500_CONFIG_RCCTRL0 = 0x00, + CC2500_CONFIG_FSTEST = 0x59, + CC2500_CONFIG_PTEST = 0x7F, + CC2500_CONFIG_AGCTST = 0x3F, + CC2500_CONFIG_TEST2 = 0x88, + CC2500_CONFIG_TEST1 = 0x31, + CC2500_CONFIG_TEST0 = 0x0B, + + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + + + diff --git a/tos/chips/ccxx00_single/radios/cc2500/CC2500_500kBaud.h b/tos/chips/ccxx00_single/radios/cc2500/CC2500_500kBaud.h new file mode 100644 index 0000000000..1ea5c104ce --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc2500/CC2500_500kBaud.h @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * 500 kBaud (MSK) + */ + +/** + * All frequency settings assume a 26 MHz crystal. + * If you have a 27 MHz crystal, you'll need to fix the defined FREQ registers + * + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#ifndef CC2500_H +#define CC2500_H + +#include "Blaze.h" + +#warning "*** INCLUDING CC2500 RADIO ***" + +enum { + CC2500_RADIO_ID = unique( UQ_BLAZE_RADIO ), +}; + +/** + * This helps calculate new FREQx register settings at runtime. + * The frequency is in MHz. + */ +#define CC2500_CRYSTAL_MHZ 26 + +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC2500 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 20 MHz around 2442.4 MHz + * You want your center frequency to be 2442.4 MHz, and your lower edge to be + * 2422.4 MHz and your upper edge to be 2462.4 MHz. + * + * Lower Channel Calculation: + * CC2500_CHANNEL_MIN = [(2422400 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * Where CC2500_LOWEST_FREQ is 2400998 kHz and 324 kHz is + * approximately the channel spacing, CC2500_CHANNEL_WIDTH + * + * CC2500_CHANNEL_MIN ~= 66 + * + * + * Upper Channel Calculation: + * CC2500_CHANNEL_MAX = [(320000 desired kHz) - (CC2500_LOWEST_FREQ)] + * --------------------------------------------- + * 324 kHz channel spacing + * + * CC2500_CHANNEL_MAX ~= 189 + * + * Incidentally, (189+66)/2 ~= 128, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the channel spacing below so all channels from 0 to 255 fit + * within the 2.400 - 2.483 GHz band. + */ + + +/***************** 2.4 GHz Matching Network ****************/ +// Default channel is at 2441.565277 MHz +#ifndef CC2500_DEFAULT_CHANNEL +#define CC2500_DEFAULT_CHANNEL 125 +#endif + +#ifndef CC2500_CHANNEL_MIN +#define CC2500_CHANNEL_MIN 0 +#endif + +#ifndef CC2500_CHANNEL_MAX +#define CC2500_CHANNEL_MAX 255 +#endif + +enum { + CC2500_LOWEST_FREQ = 2400998, // kHz + CC2500_DEFAULT_FREQ2 = 0x5C, + CC2500_DEFAULT_FREQ1 = 0x58, + CC2500_DEFAULT_FREQ0 = 0x9D, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC2500_PA_PLUS_1 = 0xFF, + CC2500_PA_MINUS_4 = 0xA9, + CC2500_PA_MINUS_10 = 0x97, +}; + +#ifndef CC2500_PA +#define CC2500_PA CC2500_PA_PLUS_1 +#endif + + +/** + * These are used for calculating channels at runtime + */ +#define CC2500_CHANNEL_WIDTH 324 // kHz : Do not edit + +enum cc2500_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC2500_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC2500_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC2500_CONFIG_IOCFG0 = 0x01, + + CC2500_CONFIG_FIFOTHR = 0xE, + CC2500_CONFIG_SYNC1 = 0xD3, + CC2500_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC2500_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC2500_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC2500_CONFIG_PKTCTRL0 = 0x45, + + CC2500_CONFIG_ADDR = 0x00, + + CC2500_CONFIG_CHANNR = CC2500_DEFAULT_CHANNEL, + + CC2500_CONFIG_FSCTRL1 = 0x10, + CC2500_CONFIG_FSCTRL0 = 0x00, + + CC2500_CONFIG_FREQ2 = CC2500_DEFAULT_FREQ2, + CC2500_CONFIG_FREQ1 = CC2500_DEFAULT_FREQ1, + CC2500_CONFIG_FREQ0 = CC2500_DEFAULT_FREQ0, + + CC2500_CONFIG_MDMCFG4 = 0x2D, + CC2500_CONFIG_MDMCFG3 = 0x3B, + CC2500_CONFIG_MDMCFG2 = 0xF3, + CC2500_CONFIG_MDMCFG1 = 0x43, + CC2500_CONFIG_MDMCFG0 = 0x99, + CC2500_CONFIG_DEVIATN = 0x00, + CC2500_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC2500_CONFIG_MCSM1 = 0x3F, + CC2500_CONFIG_MCSM0 = 0x1C, + CC2500_CONFIG_FOCCFG = 0x1D, + CC2500_CONFIG_BSCFG = 0x1C, + CC2500_CONFIG_AGCTRL2 = 0xC7, // LNA's + CC2500_CONFIG_AGCTRL1 = 0x50, // CCA threshold definition + CC2500_CONFIG_AGCTRL0 = 0xB0, + + CC2500_CONFIG_WOREVT1 = 0x87, + CC2500_CONFIG_WOREVT0 = 0x6B, + CC2500_CONFIG_WORCTRL = 0xF8, + CC2500_CONFIG_FREND1 = 0xB6, + CC2500_CONFIG_FREND0 = 0x10, + CC2500_CONFIG_FSCAL3 = 0xEA, + CC2500_CONFIG_FSCAL2 = 0x0A, + CC2500_CONFIG_FSCAL1 = 0x00, + CC2500_CONFIG_FSCAL0 = 0x19, + + CC2500_CONFIG_RCCTRL1 = 0x41, + CC2500_CONFIG_RCCTRL0 = 0x00, + CC2500_CONFIG_FSTEST = 0x59, + CC2500_CONFIG_PTEST = 0x7F, + CC2500_CONFIG_AGCTST = 0x3F, + CC2500_CONFIG_TEST2 = 0x88, + CC2500_CONFIG_TEST1 = 0x31, + CC2500_CONFIG_TEST0 = 0x0B, + + +}; + + +#ifndef CCXX00_RADIO_DEFINED +#define CCXX00_RADIO_DEFINED +#endif + +#endif + + + diff --git a/tos/chips/ccxx00_single/radios/cc2500/README.txt b/tos/chips/ccxx00_single/radios/cc2500/README.txt new file mode 100644 index 0000000000..3eb170b6ff --- /dev/null +++ b/tos/chips/ccxx00_single/radios/cc2500/README.txt @@ -0,0 +1,5 @@ +To select a lower baud rate, overwrite the CC2500.h file with the baud +rate file of your choice. Then you might need to look at BlazeTransmitP +in the TXFIFO.writeDone() event to make sure the kill switch in there, 'count', +doesn't cause your transmittion to fail prematurely. + diff --git a/tos/chips/ccxx00_single/receive/BlazeReceiveC.nc b/tos/chips/ccxx00_single/receive/BlazeReceiveC.nc new file mode 100644 index 0000000000..0912eb3917 --- /dev/null +++ b/tos/chips/ccxx00_single/receive/BlazeReceiveC.nc @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * Lowest level implementation on the receive branch. + * + * SplitControl.stop() must put this component in a state where it is + * safe to turn off the radio before signalling stopDone() + * + * @author Jared Hill + * @author David Moss + */ + + +configuration BlazeReceiveC { + provides { + interface Receive; + interface AckReceive; + interface AckSendNotifier[am_addr_t destination]; + interface SplitControl; + } +} + +implementation { + + components BlazeReceiveP; + Receive = BlazeReceiveP.Receive; + AckReceive = BlazeReceiveP; + SplitControl = BlazeReceiveP.SplitControl; + AckSendNotifier = BlazeReceiveP.AckSendNotifier; + + components BlazeCentralWiringC; + BlazeReceiveP.Csn -> BlazeCentralWiringC.Csn; + BlazeReceiveP.RxIo -> BlazeCentralWiringC.Gdo0_io; + BlazeReceiveP.BlazeConfig -> BlazeCentralWiringC.BlazeConfig; + BlazeReceiveP.RxInterrupt -> BlazeCentralWiringC.Gdo0_int; + BlazeReceiveP.ChipRdy -> BlazeCentralWiringC.Gdo2_io; + BlazeReceiveP.BlazeRegSettings -> BlazeCentralWiringC.BlazeRegSettings; + + components MainC; + MainC.SoftwareInit -> BlazeReceiveP; + + components BlazePacketC, + BlazeSpiC as Spi, + new BlazeSpiResourceC(); + + BlazeReceiveP.Resource -> BlazeSpiResourceC; + BlazeReceiveP.RXFIFO -> Spi.RXFIFO; + BlazeReceiveP.SFRX -> Spi.SFRX; + + BlazeReceiveP.RadioStatus -> Spi.RadioStatus; + + BlazeReceiveP.BlazePacket -> BlazePacketC; + BlazeReceiveP.BlazePacketBody -> BlazePacketC; + + components new ReceiveModeC(); + BlazeReceiveP.ReceiveMode -> ReceiveModeC; + + components BlazeTransmitC; + BlazeReceiveP.AckSend -> BlazeTransmitC.AckSend; + + components ActiveMessageAddressC; + BlazeReceiveP.ActiveMessageAddress -> ActiveMessageAddressC; + + components new AlarmMultiplexC(); + BlazeReceiveP.AckGap -> AlarmMultiplexC; + + components RandomC; + BlazeReceiveP.Random -> RandomC; + + components LedsC; + BlazeReceiveP.Leds -> LedsC; + +#if BLAZE_ENABLE_CRC_32 + components PacketCrcC; + BlazeReceiveP.PacketCrc -> PacketCrcC; +#endif +} diff --git a/tos/chips/ccxx00_single/receive/BlazeReceiveP.nc b/tos/chips/ccxx00_single/receive/BlazeReceiveP.nc new file mode 100644 index 0000000000..b20b17c20a --- /dev/null +++ b/tos/chips/ccxx00_single/receive/BlazeReceiveP.nc @@ -0,0 +1,468 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * This module assumes it already has full access to the SPI Bus + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ + +#include "Blaze.h" +#include "Acknowledgements.h" +#include "Csma.h" +#include "Fcf.h" + +module BlazeReceiveP { + + provides { + interface Init; + interface SplitControl; + interface Receive; + interface AckReceive; + interface AckSendNotifier[am_addr_t destination]; + } + + uses { + interface AsyncSend as AckSend; + interface GeneralIO as Csn; + interface GeneralIO as RxIo; + interface GeneralIO as ChipRdy; + interface GpioInterrupt as RxInterrupt; + interface BlazeConfig; + interface BlazeRegSettings; + + interface BlazeFifo as RXFIFO; + + interface BlazeStrobe as SFRX; + + interface Resource; + interface ReceiveMode; + interface Alarm as AckGap; + + interface BlazePacket; + interface BlazePacketBody; + interface RadioStatus; + interface ActiveMessageAddress; + interface Random; + interface Leds; + +#if BLAZE_ENABLE_CRC_32 + interface PacketCrc; +#endif + } + +} + +implementation { + + /** Acknowledgement frame */ + blaze_ack_t acknowledgement; + + /** Default message buffer */ + message_t myMsg; + + /** TRUE if SplitControl.stop() was called */ + bool stopping; + + /** State of this component */ + uint8_t state; + + + enum receive_states { + S_IDLE, + S_RX_LENGTH, + S_RX_PAYLOAD, + + S_OFF, + }; + + enum { + /** Add 2 because of RSSI and LQI hidden at the end */ + MAC_PACKET_SIZE = MAC_HEADER_SIZE + TOSH_DATA_LENGTH + MAC_FOOTER_SIZE + 2, + + /** The location of the CRC bit in the LQI byte */ + CRC_BIT = 0x80, + }; + + + /***************** Prototypes ****************/ + task void receiveDone(); + + void receive(); + void failReceive(); + void cleanUp(); + + bool isAckPacket(blaze_header_t *header); + bool passesAddressFilter(blaze_header_t *header); + bool passesPanFilter(blaze_header_t *header); + bool shouldAck(blaze_header_t *header); + bool passesCrcFilter(void *header); + + uint16_t requestAckBackoff(); + + /***************** Init Commands ****************/ + command error_t Init.init() { + acknowledgement.length = ACK_FRAME_LENGTH; + + state = S_OFF; + + return SUCCESS; + } + + + /***************** SplitControl Commands ****************/ + command error_t SplitControl.start() { + state = S_IDLE; + signal SplitControl.startDone(SUCCESS); + return SUCCESS; + } + + command error_t SplitControl.stop() { + atomic { + if(!state || state == S_OFF) { + state = S_OFF; + call RxInterrupt.disable(); + signal SplitControl.stopDone(SUCCESS); + + } else { + stopping = TRUE; + } + } + + return SUCCESS; + } + + /***************** PacketCount Commands ****************/ + + /***************** RxInterrupt Events ****************/ + async event void RxInterrupt.fired() { + if((call BlazeRegSettings.getDefaultRegisters())[BLAZE_IOCFG0] != 0x01) { + return; + } + +#if BLAZE_ENABLE_SPI_WOR_RX_LEDS + call Leds.led0On(); +#endif + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led0On(); +#endif + + if(state != S_IDLE) { + return; + } + state = S_RX_LENGTH; + + call RxInterrupt.disable(); + + if(call Resource.isOwner()) { + receive(); + + } else { + call Resource.request(); + } + } + + /***************** Resource Events ****************/ + event void Resource.granted() { + receive(); + } + + + /***************** AckSend Events ****************/ + async event void AckSend.sendDone(error_t error) { +#if BLAZE_CSMA_LEDS + call Leds.led3Off(); +#endif + + call Csn.set(); + post receiveDone(); + } + + async event void AckSend.sending() { + } + + /***************** RXFIFO Events ****************/ + async event void RXFIFO.readDone( uint8_t* rx_buf, uint8_t rx_len, + error_t error ) { + + blaze_header_t *header = call BlazePacketBody.getHeader( &myMsg ); + + //toggle csn to show done reading + call Csn.set(); + + switch (state) { + case S_RX_LENGTH: + state = S_RX_PAYLOAD; + + if(header->length <= MAC_PACKET_SIZE) { + if(header->length > 0) { + // Add 2 for the status bytes + call Csn.clr(); + call RXFIFO.beginRead(((uint8_t *) header) + 1, header->length + 2); + return; + } + } + + failReceive(); + break; + + case S_RX_PAYLOAD: + + // The FCF_FRAME_TYPE bit in the FCF byte tells us if this is an ack or + // data. If it's data, make sure it meets the minimum size requirement. + if (isAckPacket(header)) { + // This is a valid ACK packet. + // Note that ACK packets aren't currently undergoing a CRC check, + // and BlazeTransmitP isn't appending a CRC for ack packets. + signal AckReceive.receive( (blaze_ack_t *) &myMsg ); + + /** Fall through and cleanUp() */ + + } else if(header->length >= sizeof(blaze_header_t) - 1) { + // The amount of data in this packet is at least a valid header size + if(passesAddressFilter(header)) { + if(passesPanFilter(header)) { + if(passesCrcFilter(header)) { + + if(shouldAck(header)) { + // Send an ack and then receive the packet in AckSend.sendDone() + atomic { + acknowledgement.fcf = FRAME_TYPE_ACK; + acknowledgement.dest = header->src; + acknowledgement.dsn = header->dsn; + acknowledgement.src = call ActiveMessageAddress.amAddress(); + + signal AckSendNotifier.aboutToSend[header->dest](&acknowledgement); + } + + call Csn.clr(); + + #if BLAZE_CSMA_LEDS + call Leds.led3On(); + #endif + + if(call AckSend.send(&acknowledgement, TRUE, 0) != SUCCESS) { + + #if BLAZE_CSMA_LEDS + call Leds.led3Off(); + #endif + + post receiveDone(); + } + + + // else, drop the ack and continue at AckSend.sendDone()... + return; + + } else { + // Do not send an acknowledgement, just receive this packet + post receiveDone(); + return; + } + } + } + } + + // Allow the real destination node time to acknowledge the packet + // without interruption from this node's transmit branch. + call AckGap.start( requestAckBackoff() ); + return; + } + + // Didn't pass through our filters + cleanUp(); + break; + + default: + break; + } + } + + async event void RXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) { + } + + + /***************** AckGap Alarm Events ****************/ + async event void AckGap.fired() { + cleanUp(); + } + + /***************** ActiveMessageAddress Events ****************/ + async event void ActiveMessageAddress.changed() { + } + + /***************** BlazeConfig Events ****************/ + event void BlazeConfig.commitDone() { + } + + /***************** ReceiveMode Events ****************/ + event void ReceiveMode.srxDone() { + cleanUp(); + } + + /***************** Tasks ****************/ + task void receiveDone() { + blaze_metadata_t *metadata = call BlazePacketBody.getMetadata( &myMsg ); + uint8_t *buf = (uint8_t *) call BlazePacketBody.getHeader( &myMsg ); + uint8_t myRssi; + uint8_t myLqi; + + // Remove the CRC bit from the LQI byte (0x80) + myRssi = buf[ *buf + 1 ]; + myLqi = buf[ *buf + 2 ] & 0x7F; + + metadata->lqi = myLqi; + metadata->rssi = myRssi; + + signal Receive.receive( &myMsg, (&myMsg)->data, *buf ); + + cleanUp(); + } + + /** + * Get out of async context + */ + task void stopDone() { + signal SplitControl.stopDone(SUCCESS); + } + + + /***************** Functions ****************/ + /** + * Receive the packet by first reading in the length byte. The SPI + * bus should already be allocated. + */ + void receive() { + call Csn.clr(); + + // Read in the length byte + call RXFIFO.beginRead((uint8_t *) &myMsg, 1); + } + + void failReceive() { + call Csn.clr(); + call ReceiveMode.srx(); + } + + + /** + * Clean up after a receive + */ + void cleanUp() { + bool stop; + atomic { + stop = stopping; + } + + call Csn.set(); + + if(stop) { + // Do not re-enable interrupts + atomic stopping = FALSE; + state = S_OFF; + call RxInterrupt.disable(); + call Resource.release(); + post stopDone(); + return; + } + + atomic { + state = S_IDLE; + call RxInterrupt.enableRisingEdge(); + call Resource.release(); + + if(call RxIo.get()) { + if(!state) { + state = S_RX_LENGTH; + call RxInterrupt.disable(); + call Resource.request(); + return; + } + } + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led0Off(); +#endif + +#if BLAZE_ENABLE_SPI_WOR_RX_LEDS + call Leds.led0Off(); +#endif + + } + } + + + bool isAckPacket(blaze_header_t *header) { + return ((header->fcf >> FCF_FRAME_TYPE ) & 7) == FRAME_TYPE_ACK; + } + + bool passesAddressFilter(blaze_header_t *header) { + return (((header->dest == call ActiveMessageAddress.amAddress()) + || (header->dest == AM_BROADCAST_ADDR))) + || !(call BlazeConfig.isAddressRecognitionEnabled()); + } + + bool passesPanFilter(blaze_header_t *header) { + return ((header->destpan == call ActiveMessageAddress.amGroup()) + || !(call BlazeConfig.isPanRecognitionEnabled())); + } + + bool shouldAck(blaze_header_t *header) { + return (call BlazeConfig.isAutoAckEnabled()) + && ((( header->fcf >> FCF_ACK_REQ ) & 0x01) == 1) + && (header->dest != AM_BROADCAST_ADDR); + } + + bool passesCrcFilter(void *header) { +#if BLAZE_ENABLE_CRC_32 + return call PacketCrc.verifyCrc( header ); +#else + return TRUE; +#endif + } + + /** + * Setup a default acknowledgment gap backoff, and then request any + * an override from a higher layer. + */ + uint16_t requestAckBackoff() { + return call Random.rand16() % (0x7 * BLAZE_BACKOFF_PERIOD) + (BLAZE_ACK_WAIT); + } + + + /***************** Defaults ****************/ + default async event void AckSendNotifier.aboutToSend[am_addr_t destination](blaze_ack_t *ack) { } + +} + diff --git a/tos/chips/ccxx00_single/select/RadioSelectC.nc b/tos/chips/ccxx00_single/select/RadioSelectC.nc new file mode 100644 index 0000000000..60a34b60ef --- /dev/null +++ b/tos/chips/ccxx00_single/select/RadioSelectC.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Above this layer, the Send and Receive interfaces are radio-agnostic + * and not parameterized. The SplitControl interface remains parameterized + * because there is no metadata associated with it. + * + * This layer selects which radio to use based on packet properties, and + * everything below it is parameterized by radio ID. + * It also the logical place to intersect Send and SplitControl. It queues up a + * SplitControl.stop request when we're in the middle of sending, and blocks + * send requests when the radio is off. + * + * Use the RadioSelect interface to change the radio a particular message + * uses to send. + * + * @author David Moss + */ + +configuration RadioSelectC { + provides { + interface SplitControl as BlazeSplitControl[radio_id_t radioId]; + interface SplitControl; + interface Send; + interface Receive; + interface RadioSelect; + } + + uses { + interface SplitControl as SubControl; + interface Send as SubSend; + interface Receive as SubReceive; + } +} + +implementation { + + SplitControl = SubControl; + BlazeSplitControl[0] = SubControl; + Send = SubSend; + Receive = SubReceive; + + components RadioSelectDummyP; + RadioSelect = RadioSelectDummyP; + BlazeSplitControl = RadioSelectDummyP; + +} + diff --git a/tos/chips/ccxx00_single/select/RadioSelectDummyP.nc b/tos/chips/ccxx00_single/select/RadioSelectDummyP.nc new file mode 100644 index 0000000000..895a519b6e --- /dev/null +++ b/tos/chips/ccxx00_single/select/RadioSelectDummyP.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Select which radio to use for a given message, and parameterize + * the Send and Receive interfaces below this point by radio id + * + * @author David Moss + */ + +module RadioSelectDummyP { + provides { + interface RadioSelect; + interface SplitControl as BlazeSplitControl[radio_id_t radioId]; + } +} + +implementation { + + command error_t BlazeSplitControl.start[radio_id_t radioId]() { + return FAIL; + } + + command error_t BlazeSplitControl.stop[radio_id_t radioId]() { + return FAIL; + } + + command error_t RadioSelect.selectRadio(message_t *msg, radio_id_t radioId) { + return SUCCESS; + } + + command radio_id_t RadioSelect.getRadio(message_t *msg) { + return 0; + } + +} + diff --git a/tos/chips/ccxx00_single/spi/BlazeCentralWiringC.nc b/tos/chips/ccxx00_single/spi/BlazeCentralWiringC.nc new file mode 100644 index 0000000000..4bd2b6e2c9 --- /dev/null +++ b/tos/chips/ccxx00_single/spi/BlazeCentralWiringC.nc @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Collect all GPIO and interrupts from any compiled-in radios and provide + * them here. + * + * [ CC2500 ] [ CC1100 ] + * |||||| |||||| + * vvvvvv vvvvvv + * [ CENTRAL WIRING COMPONENT ] + * |||||| + * vvvvvv + * [ Blaze SubSystems ] + * + * @author David Moss + */ + +#include "Blaze.h" + +configuration BlazeCentralWiringC { + provides { + interface GeneralIO as Csn; + interface GeneralIO as Gdo0_io; + interface GeneralIO as Gdo2_io; + interface GeneralIO as Power; + interface GpioInterrupt as Gdo0_int; + interface GpioInterrupt as Gdo2_int; + interface BlazeConfig; + interface BlazeRegSettings; + } + + uses { + interface GeneralIO as ChipCsn[radio_id_t radioId]; + interface GeneralIO as ChipGdo0_io[radio_id_t radioId]; + interface GeneralIO as ChipGdo2_io[radio_id_t radioId]; + interface GeneralIO as ChipPower[radio_id_t radioId]; + interface GpioInterrupt as ChipGdo0_int[radio_id_t radioId]; + interface GpioInterrupt as ChipGdo2_int[radio_id_t radioId]; + interface BlazeConfig as ChipConfig[radio_id_t radioId]; + interface BlazeRegSettings as ChipRegSettings[radio_id_t radioId]; + } +} + +implementation { + + Csn = ChipCsn[0]; + Gdo0_io = ChipGdo0_io[0]; + Gdo2_io = ChipGdo2_io[0]; + Gdo0_int = ChipGdo0_int[0]; + Gdo2_int = ChipGdo2_int[0]; + Power = ChipPower[0]; + BlazeConfig = ChipConfig[0]; + BlazeRegSettings = ChipRegSettings[0]; + +} + diff --git a/tos/chips/ccxx00_single/spi/BlazeSpiC.nc b/tos/chips/ccxx00_single/spi/BlazeSpiC.nc new file mode 100644 index 0000000000..8142b0e74a --- /dev/null +++ b/tos/chips/ccxx00_single/spi/BlazeSpiC.nc @@ -0,0 +1,231 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +#include "Blaze.h" + +/** + * CCxx00 SPI bus wiring + * @author Jared Hill + * @author David Moss + */ + +configuration BlazeSpiC { + + provides interface RadioInit; + provides interface ChipSpiResource; + + // commands + provides interface BlazeStrobe as SIDLE; + provides interface BlazeStrobe as SNOP; + provides interface BlazeStrobe as STX; + provides interface BlazeStrobe as SFTX; + provides interface BlazeStrobe as SRX; + provides interface BlazeStrobe as SFRX; + provides interface BlazeStrobe as SRES; + provides interface BlazeStrobe as SFSTXON; + provides interface BlazeStrobe as SXOFF; + provides interface BlazeStrobe as SCAL; + provides interface BlazeStrobe as SWOR; + provides interface BlazeStrobe as SPWD; + provides interface BlazeStrobe as SWORRST; + + // registers + provides interface BlazeRegister as IOCFG2; + provides interface BlazeRegister as IOCFG1; + provides interface BlazeRegister as IOCFG0; + provides interface BlazeRegister as FIFOTHR; + provides interface BlazeRegister as SYNC1; + provides interface BlazeRegister as SYNC0; + provides interface BlazeRegister as PKTLEN; + provides interface BlazeRegister as PKTCTRL1; + provides interface BlazeRegister as PKTCTRL0; + provides interface BlazeRegister as ADDR; + provides interface BlazeRegister as CHANNR; + provides interface BlazeRegister as FSCTRL1; + provides interface BlazeRegister as FSCTRL0; + provides interface BlazeRegister as FREQ2; + provides interface BlazeRegister as FREQ1; + provides interface BlazeRegister as FREQ0; + provides interface BlazeRegister as MDMCFG4; + provides interface BlazeRegister as MDMCFG3; + provides interface BlazeRegister as MDMCFG2; + provides interface BlazeRegister as MDMCFG1; + provides interface BlazeRegister as MDMCFG0; + provides interface BlazeRegister as DEVIATN; + provides interface BlazeRegister as MCSM2; + provides interface BlazeRegister as MCSM1; + provides interface BlazeRegister as MCSM0; + provides interface BlazeRegister as FOCCFG; + provides interface BlazeRegister as BSCFG; + provides interface BlazeRegister as AGCTRL2; + provides interface BlazeRegister as AGCTRL1; + provides interface BlazeRegister as AGCTRL0; + provides interface BlazeRegister as WOREVT1; + provides interface BlazeRegister as WOREVT0; + provides interface BlazeRegister as WORCTRL; + provides interface BlazeRegister as FREND1; + provides interface BlazeRegister as FREND0; + provides interface BlazeRegister as FSCAL3; + provides interface BlazeRegister as FSCAL2; + provides interface BlazeRegister as FSCAL1; + provides interface BlazeRegister as FSCAL0; + provides interface BlazeRegister as RCCTRL1; + provides interface BlazeRegister as RCCTRL0; + provides interface BlazeRegister as FSTEST; + provides interface BlazeRegister as PTEST; + provides interface BlazeRegister as AGCTEST; + provides interface BlazeRegister as TEST2; + provides interface BlazeRegister as TEST1; + provides interface BlazeRegister as TEST0; + provides interface BlazeRegister as PARTNUM; + provides interface BlazeRegister as VERSION; + provides interface BlazeRegister as FREQEST; + provides interface BlazeRegister as LQI; + provides interface BlazeRegister as RSSI; + provides interface BlazeRegister as MARCSTATE; + provides interface BlazeRegister as WORTIME1; + provides interface BlazeRegister as WORTIME0; + provides interface BlazeRegister as PKTSTATUS; + provides interface BlazeRegister as VCO_VC_DAC; + provides interface BlazeRegister as TXBYTES; + provides interface BlazeRegister as RXBYTES; + provides interface BlazeRegister as RXREG; + provides interface BlazeRegister as TXREG; + provides interface BlazeRegister as PA; + + // fifos + provides interface BlazeFifo as RXFIFO; + provides interface BlazeFifo as TXFIFO; + provides interface BlazeFifo as PATABLE; + + //radio control + provides interface RadioStatus; + +} + +implementation { + + components BlazeSpiP, + BlazeSpiWireC; + + RadioInit = BlazeSpiWireC; + ChipSpiResource = BlazeSpiWireC; + + // commands + SIDLE = BlazeSpiWireC.Strobe[ BLAZE_SIDLE ]; + SNOP = BlazeSpiWireC.Strobe[ BLAZE_SNOP ]; + SFRX = BlazeSpiWireC.Strobe[ BLAZE_SFRX ]; + SFTX = BlazeSpiWireC.Strobe[ BLAZE_SFTX ]; + SRX = BlazeSpiWireC.Strobe[ BLAZE_SRX ]; + STX = BlazeSpiWireC.Strobe[ BLAZE_STX ]; + SRES = BlazeSpiWireC.Strobe[ BLAZE_SRES ]; + SFSTXON = BlazeSpiWireC.Strobe[ BLAZE_SFSTXON ]; + SXOFF = BlazeSpiWireC.Strobe[ BLAZE_SXOFF ]; + SCAL = BlazeSpiWireC.Strobe[ BLAZE_SCAL ]; + SWOR = BlazeSpiWireC.Strobe[ BLAZE_SWOR ]; + SPWD = BlazeSpiWireC.Strobe[ BLAZE_SPWD ]; + SWORRST = BlazeSpiWireC.Strobe[ BLAZE_SWORRST ]; + + // registers + IOCFG2 = BlazeSpiWireC.Reg[ BLAZE_IOCFG2]; + IOCFG1 = BlazeSpiWireC.Reg[ BLAZE_IOCFG1 ]; + IOCFG0 = BlazeSpiWireC.Reg[ BLAZE_IOCFG0 ]; + FIFOTHR = BlazeSpiWireC.Reg[ BLAZE_FIFOTHR ]; + SYNC1 = BlazeSpiWireC.Reg[ BLAZE_SYNC1 ]; + SYNC0 = BlazeSpiWireC.Reg[ BLAZE_SYNC0 ]; + PKTLEN = BlazeSpiWireC.Reg[ BLAZE_PKTLEN ]; + PKTCTRL1 = BlazeSpiWireC.Reg[ BLAZE_PKTCTRL1 ]; + PKTCTRL0 = BlazeSpiWireC.Reg[ BLAZE_PKTCTRL0 ]; + ADDR = BlazeSpiWireC.Reg[ BLAZE_ADDR ]; + CHANNR = BlazeSpiWireC.Reg[ BLAZE_CHANNR ]; + FSCTRL1 = BlazeSpiWireC.Reg[ BLAZE_FSCTRL1 ]; + FSCTRL0 = BlazeSpiWireC.Reg[ BLAZE_FSCTRL0 ]; + FREQ2 = BlazeSpiWireC.Reg[ BLAZE_FREQ2 ]; + FREQ1 = BlazeSpiWireC.Reg[ BLAZE_FREQ1 ]; + FREQ0 = BlazeSpiWireC.Reg[ BLAZE_FREQ0 ]; + MDMCFG4 = BlazeSpiWireC.Reg[ BLAZE_MDMCFG4 ]; + MDMCFG3 = BlazeSpiWireC.Reg[ BLAZE_MDMCFG3 ]; + MDMCFG2 = BlazeSpiWireC.Reg[ BLAZE_MDMCFG2 ]; + MDMCFG1 = BlazeSpiWireC.Reg[ BLAZE_MDMCFG1 ]; + MDMCFG0 = BlazeSpiWireC.Reg[ BLAZE_MDMCFG0 ]; + DEVIATN = BlazeSpiWireC.Reg[ BLAZE_DEVIATN ]; + MCSM2 = BlazeSpiWireC.Reg[ BLAZE_MCSM2 ]; + MCSM1 = BlazeSpiWireC.Reg[ BLAZE_MCSM1 ]; + MCSM0 = BlazeSpiWireC.Reg[ BLAZE_MCSM0 ]; + FOCCFG = BlazeSpiWireC.Reg[ BLAZE_FOCCFG ]; + BSCFG = BlazeSpiWireC.Reg[ BLAZE_BSCFG ]; + AGCTRL2 = BlazeSpiWireC.Reg[ BLAZE_AGCTRL2 ]; + AGCTRL1 = BlazeSpiWireC.Reg[ BLAZE_AGCTRL1 ]; + AGCTRL0 = BlazeSpiWireC.Reg[ BLAZE_AGCTRL0 ]; + WOREVT1 = BlazeSpiWireC.Reg[ BLAZE_WOREVT1 ]; + WOREVT0 = BlazeSpiWireC.Reg[ BLAZE_WOREVT0 ]; + WORCTRL = BlazeSpiWireC.Reg[ BLAZE_WORCTRL ]; + FREND1 = BlazeSpiWireC.Reg[ BLAZE_FREND1 ]; + FREND0 = BlazeSpiWireC.Reg[ BLAZE_FREND0 ]; + FSCAL3 = BlazeSpiWireC.Reg[ BLAZE_FSCAL3 ]; + FSCAL2 = BlazeSpiWireC.Reg[ BLAZE_FSCAL2 ]; + FSCAL1 = BlazeSpiWireC.Reg[ BLAZE_FSCAL1 ]; + FSCAL0 = BlazeSpiWireC.Reg[ BLAZE_FSCAL0 ]; + RCCTRL1 = BlazeSpiWireC.Reg[ BLAZE_RCCTRL1 ]; + RCCTRL0 = BlazeSpiWireC.Reg[ BLAZE_RCCTRL0 ]; + FSTEST = BlazeSpiWireC.Reg[ BLAZE_FSTEST ]; + PTEST = BlazeSpiWireC.Reg[ BLAZE_PTEST ]; + AGCTEST = BlazeSpiWireC.Reg[ BLAZE_AGCTEST ]; + TEST2 = BlazeSpiWireC.Reg[ BLAZE_TEST2 ]; + TEST1 = BlazeSpiWireC.Reg[ BLAZE_TEST1 ]; + TEST0 = BlazeSpiWireC.Reg[ BLAZE_TEST0 ]; + PARTNUM = BlazeSpiWireC.Reg[ BLAZE_PARTNUM ]; + VERSION = BlazeSpiWireC.Reg[ BLAZE_VERSION ]; + FREQEST = BlazeSpiWireC.Reg[ BLAZE_FREQEST ]; + LQI = BlazeSpiWireC.Reg[ BLAZE_LQI ]; + RSSI = BlazeSpiWireC.Reg[ BLAZE_RSSI ]; + MARCSTATE = BlazeSpiWireC.Reg[ BLAZE_MARCSTATE ]; + WORTIME1 = BlazeSpiWireC.Reg[ BLAZE_WORTIME1 ]; + WORTIME0 = BlazeSpiWireC.Reg[ BLAZE_WORTIME0 ]; + PKTSTATUS = BlazeSpiWireC.Reg[ BLAZE_PKSTATUS ]; + VCO_VC_DAC = BlazeSpiWireC.Reg[ BLAZE_VCO_VC_DAC ]; + TXBYTES = BlazeSpiWireC.Reg[ BLAZE_TXBYTES ]; + RXBYTES = BlazeSpiWireC.Reg[ BLAZE_RXBYTES ]; + RXREG = BlazeSpiWireC.Reg[ BLAZE_RXFIFO ]; + TXREG = BlazeSpiWireC.Reg[ BLAZE_TXFIFO ]; + PA = BlazeSpiWireC.Reg[ BLAZE_PATABLE ]; + + // fifos + RXFIFO = BlazeSpiWireC.Fifo[ BLAZE_RXFIFO ]; + TXFIFO = BlazeSpiWireC.Fifo[ BLAZE_TXFIFO ]; + PATABLE = BlazeSpiWireC.Fifo[ BLAZE_PATABLE ]; + + //radio control + RadioStatus = BlazeSpiWireC.RadioStatus; + +} + diff --git a/tos/chips/ccxx00_single/spi/BlazeSpiP.nc b/tos/chips/ccxx00_single/spi/BlazeSpiP.nc new file mode 100644 index 0000000000..c365edbb38 --- /dev/null +++ b/tos/chips/ccxx00_single/spi/BlazeSpiP.nc @@ -0,0 +1,376 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +#include "Blaze.h" +#include "BlazeSpiResource.h" + +/** + * @author Jared Hill + * @author David Moss + */ +module BlazeSpiP { + + provides { + interface Resource[ uint8_t id ]; + interface BlazeFifo as Fifo[ uint8_t id ]; + interface BlazeRegister as Reg[ uint8_t id ]; + interface BlazeStrobe as Strobe[ uint8_t id ]; + interface ChipSpiResource; + interface RadioInit; + interface RadioStatus; + } + + uses { + interface Resource as SpiResource; + interface SpiByte; + interface SpiPacket; + interface Leds; + } +} + +implementation { + + enum { + RESOURCE_COUNT = uniqueCount( UQ_BLAZE_SPI_RESOURCE ), + NO_HOLDER = 0xFF, + }; + + enum { + S_IDLE, + S_BUSY, + + S_READ_FIFO, + S_INIT, + S_WRITE_FIFO, + }; + + /** Address to read / write */ + uint16_t m_addr; + + /** Each bit represents a client ID that is requesting SPI bus access */ + uint32_t m_requests = 0; + + /** The current client that owns the SPI bus */ + uint8_t m_holder = NO_HOLDER; + + /** TRUE if it is safe to release the SPI bus after all users say ok */ + bool release; + + /** State of the SPI bus resource */ + uint8_t spiResourceState; + + /** State of this overall component */ + uint8_t state; + + /***************** Prototypes ****************/ + uint8_t getRadioStatus(); + error_t attemptRelease(); + task void grant(); + task void radioInitDone(); + + /***************** RadioInit Commands ****************/ + command error_t RadioInit.init(uint8_t startAddr, uint8_t* regs, + uint8_t len) { + + if(!call SpiResource.isOwner()) { + return ERESERVE; + } + + if(state) { + return FAIL; + } + state = S_INIT; + + call SpiByte.write(startAddr | BLAZE_BURST | BLAZE_WRITE); + call SpiPacket.send(regs, NULL, len); + + return SUCCESS; + } + + + /***************** ChipSpiResource Commands ****************/ + /** + * Abort the release of the SPI bus. This must be called only with the + * releasing() event + */ + async command void ChipSpiResource.abortRelease() { + atomic release = FALSE; + } + + /** + * Release the SPI bus if there are no objections + */ + async command error_t ChipSpiResource.attemptRelease() { + return attemptRelease(); + } + + /***************** Resource Commands *****************/ + async command error_t Resource.request[ uint8_t id ]() { + + atomic { + if ( !spiResourceState ) { + spiResourceState = S_BUSY; + m_holder = id; + if(call SpiResource.isOwner()) { + post grant(); + + } else { + return call SpiResource.request(); + } + + } else { + m_requests |= 1 << id; + } + } + return SUCCESS; + } + + async command error_t Resource.immediateRequest[ uint8_t id ]() { + error_t error; + + atomic { + if ( spiResourceState ) { + return EBUSY; + } + spiResourceState = S_BUSY; + + if(call SpiResource.isOwner()) { + m_holder = id; + error = SUCCESS; + + } else if ((error = call SpiResource.immediateRequest()) == SUCCESS ) { + m_holder = id; + + } else { + spiResourceState = S_IDLE; + } + } + +#if BLAZE_ENABLE_SPI_WOR_RX_LEDS + if(!error) { + /*call Leds.led0On();*/ + } +#endif + + return error; + } + + async command error_t Resource.release[ uint8_t id ]() { + uint8_t i; + + atomic { + if ( m_holder != id ) { + return FAIL; + } + + m_holder = NO_HOLDER; + if ( !m_requests ) { + spiResourceState = S_IDLE; + attemptRelease(); + + } else { + for ( i = m_holder + 1; ; i++ ) { + i %= RESOURCE_COUNT; + + if ( m_requests & ( 1 << i ) ) { + m_holder = i; + m_requests &= ~( 1 << i ); + post grant(); + return SUCCESS; + } + } + } + } + + return SUCCESS; + } + + async command uint8_t Resource.isOwner[ uint8_t id ]() { + atomic return (m_holder == id); + } + + /***************** SpiResource Events ****************/ + event void SpiResource.granted() { + post grant(); + } + + /***************** Fifo Commands ****************/ + async command blaze_status_t Fifo.beginRead[ uint8_t addr ]( uint8_t* data, + uint8_t len ) { + + blaze_status_t status; + state = S_READ_FIFO; + status = call SpiByte.write( addr | BLAZE_BURST | BLAZE_READ ); + call Fifo.continueRead[ addr ]( data, len ); + + return status; + } + + async command error_t Fifo.continueRead[ uint8_t addr ]( uint8_t* data, + uint8_t len ) { + + atomic m_addr = addr; + call SpiPacket.send( NULL, data, len ); + return SUCCESS; + } + + async command blaze_status_t Fifo.write[ uint8_t addr ]( uint8_t* data, + uint8_t len ) { + + uint8_t status; + + state = S_WRITE_FIFO; + atomic m_addr = addr; + status = call SpiByte.write( addr | BLAZE_BURST | BLAZE_WRITE ); + call SpiPacket.send( data, NULL, len ); + + return status; + } + + /***************** SpiPacket Events ****************/ + async event void SpiPacket.sendDone( uint8_t* tx_buf, uint8_t* rx_buf, + uint16_t len, error_t error ) { + + uint8_t status = state; + state = S_IDLE; + + if(status == S_INIT) { + // Because we're in async context... + post radioInitDone(); + + } else if ( status == S_READ_FIFO ) { + signal Fifo.readDone[ m_addr ]( rx_buf, len, error ); + + } else if( status == S_WRITE_FIFO) { + signal Fifo.writeDone[ m_addr ]( tx_buf, len, error ); + } + } + + /***************** Reg Commands ****************/ + async command blaze_status_t Reg.read[ uint8_t addr ](uint8_t* data ) { + blaze_status_t status; + status = call SpiByte.write(addr | BLAZE_READ | BLAZE_SINGLE); + *data = call SpiByte.write(BLAZE_SNOP); + return status; + } + + async command blaze_status_t Reg.write[ uint8_t addr ]( uint8_t data ) { + call SpiByte.write(addr | BLAZE_WRITE | BLAZE_SINGLE); + return call SpiByte.write(data); + } + + /***************** Strobe Commands ****************/ + async command blaze_status_t Strobe.strobe[ uint8_t addr ]() { + return call SpiByte.write( addr ); + } + + /***************** RadioStatus Commands ****************/ + async command uint8_t RadioStatus.getRadioStatus() { + uint8_t ret; + uint8_t chk; + ret = getRadioStatus(); + /*** wait 'til we read the same value twice, a feature of these radios */ + while ((chk = getRadioStatus()) != ret) { + ret = chk; + } + + return ret; + } + + + /***************** Tasks ***************/ + task void radioInitDone() { + signal RadioInit.initDone(); + } + + task void grant() { + uint8_t holder; + atomic { + holder = m_holder; + } + +#if BLAZE_ENABLE_SPI_WOR_RX_LEDS + /*call Leds.led0On();*/ +#endif + + signal Resource.granted[ holder ](); + } + + + /***************** Functions ****************/ + uint8_t getRadioStatus(){ + //return BLAZE_S_RX; + return ((call SpiByte.write(BLAZE_SNOP) >> 4) & 0x07); + } + + error_t attemptRelease() { + uint8_t atomicRequests; + uint8_t atomicHolder; + + atomic { + atomicRequests = m_requests; + atomicHolder = m_holder; + } + + if(atomicRequests > 0 + || atomicHolder != NO_HOLDER + || spiResourceState) { + return FAIL; + } + + atomic release = TRUE; + // Users call back with ChipSpiResource.abortRelease() if needed: + signal ChipSpiResource.releasing(); + atomic { + if(release) { + +#if BLAZE_ENABLE_SPI_WOR_RX_LEDS + /*call Leds.led0Off();*/ +#endif + + call SpiResource.release(); + return SUCCESS; + } + } + + return EBUSY; + } + + /***************** Defaults ****************/ + default event void Resource.granted[ uint8_t id ]() { + call SpiResource.release(); + } + + default async event void Fifo.readDone[ uint8_t addr ]( uint8_t* rx_buf, uint8_t rx_len, error_t error ) {} + default async event void Fifo.writeDone[ uint8_t addr ]( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {} + default async event void ChipSpiResource.releasing() {} +} diff --git a/tos/chips/ccxx00_single/spi/BlazeSpiResource.h b/tos/chips/ccxx00_single/spi/BlazeSpiResource.h new file mode 100644 index 0000000000..4d32c952c8 --- /dev/null +++ b/tos/chips/ccxx00_single/spi/BlazeSpiResource.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#ifndef BLAZESPIRESOURCE_H +#define BLAZESPIRESOURCE_H + +#define UQ_BLAZE_SPI_RESOURCE "BlazeSpi.Resource" + +#endif + diff --git a/tos/chips/ccxx00_single/spi/BlazeSpiResourceC.nc b/tos/chips/ccxx00_single/spi/BlazeSpiResourceC.nc new file mode 100644 index 0000000000..00da833314 --- /dev/null +++ b/tos/chips/ccxx00_single/spi/BlazeSpiResourceC.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "BlazeSpiResource.h" + +/** + * Share the Blaze chips' platform SPI resource with all the different + * Blaze components that needs it. + * @author David Moss + */ +generic configuration BlazeSpiResourceC() { + + provides interface Resource; + provides interface ChipSpiResource; + +} + +implementation { + + + enum { + CLIENT_ID = unique( UQ_BLAZE_SPI_RESOURCE ), + }; + + components BlazeSpiWireC, + BlazeSpiP; + Resource = BlazeSpiP.Resource[ CLIENT_ID ]; + ChipSpiResource = BlazeSpiWireC; + +} + diff --git a/tos/chips/ccxx00_single/spi/BlazeSpiWireC.nc b/tos/chips/ccxx00_single/spi/BlazeSpiWireC.nc new file mode 100644 index 0000000000..508c4f395e --- /dev/null +++ b/tos/chips/ccxx00_single/spi/BlazeSpiWireC.nc @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +#include "Blaze.h" + +/** + * Originally, BlazeSpiC was generic because of Resource so we had to have this + * Consider folding this back into the BlazeSpiC configuration. + * + * @author Jared Hill + * @author David Moss + */ +configuration BlazeSpiWireC { + + provides interface BlazeFifo as Fifo[ uint8_t id ]; + provides interface BlazeRegister as Reg[ uint8_t id ]; + provides interface BlazeStrobe as Strobe[ uint8_t id ]; + provides interface RadioInit; + provides interface ChipSpiResource; + provides interface RadioStatus; + +} + +implementation { + + components BlazeSpiP; + ChipSpiResource = BlazeSpiP; + Fifo = BlazeSpiP; + Reg = BlazeSpiP; + Strobe = BlazeSpiP; + RadioInit = BlazeSpiP; + RadioStatus = BlazeSpiP; + + components HplRadioSpiC; + BlazeSpiP.SpiResource -> HplRadioSpiC; + BlazeSpiP.SpiByte -> HplRadioSpiC; + BlazeSpiP.SpiPacket -> HplRadioSpiC; + + components LedsC; + BlazeSpiP.Leds -> LedsC; + +} diff --git a/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManager.h b/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManager.h new file mode 100644 index 0000000000..56202f2b39 --- /dev/null +++ b/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManager.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#ifndef SPLITCONTROLMANAGER_H +#define SPLITCONTROLMANAGER_H + +typedef enum { + CCXX00_OFF, + CCXX00_TURNING_ON, + CCXX00_ON, + CCXX00_TURNING_OFF, +} radio_state_t; + + +#endif diff --git a/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManagerC.nc b/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManagerC.nc new file mode 100644 index 0000000000..cefdcd9e1d --- /dev/null +++ b/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManagerC.nc @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * The SplitControlManager makes sure we do not try to turn both radios + * on at the same time, and ensures we aren't trying to Send to a radio + * that is currently turned off. + * + * When a radio is on, its power may be duty cycling underneath via LPL + * functionality + * + * If a SplitControl.stop() command comes in during a Send, the stop() + * command will proceed into deeper areas of the radio stack where + * the Transmit branch must abort the send attempt. No further sends will + * be allowed until the radio is turned back on by the application layer. + * + * The SplitControlManager interface will allow other areas of the system + * to see if a particular radio is on, off, or in a state of change. + * + * @author David Moss + */ + +#include "SplitControlManager.h" +#include "Blaze.h" + +configuration SplitControlManagerC { + provides { + interface SplitControl; + interface Send; + interface SplitControlManager; + } + + uses { + interface SplitControl as SubControl; + interface Send as SubSend; + } +} + +implementation { + + components SplitControlManagerP; + SplitControl = SplitControlManagerP.SplitControl; + Send = SplitControlManagerP.Send; + SplitControlManager = SplitControlManagerP; + + SubControl = SplitControlManagerP.SubControl; + SubSend = SplitControlManagerP.SubSend; + + components LedsC; + SplitControlManagerP.Leds -> LedsC; + +} + + diff --git a/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManagerP.nc b/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManagerP.nc new file mode 100644 index 0000000000..ad4504649b --- /dev/null +++ b/tos/chips/ccxx00_single/splitcontrolmanager/SplitControlManagerP.nc @@ -0,0 +1,160 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * See the documentation in SplitControlManagerC.nc + * @author David Moss + */ + +#include "SplitControlManager.h" +#include "Blaze.h" +#include "RadioStackPacket.h" + +module SplitControlManagerP { + provides { + interface SplitControl; + interface Send; + interface SplitControlManager; + } + + uses { + interface SplitControl as SubControl; + interface Send as SubSend; + interface Leds; + } +} + +implementation { + + /** State of all the radios compiled into our system */ + uint8_t radioState; + + /** TRUE if we're waiting for the radio to turn on before we send */ + bool delayedSend; + + /***************** SplitControl Commands ****************/ + /** + * All radios must be off in order to start up one of the radios + */ + command error_t SplitControl.start() { + if(radioState != CCXX00_OFF) { + return EALREADY; + } + + radioState = CCXX00_TURNING_ON; + + signal SplitControlManager.stateChange(); + return call SubControl.start(); + } + + /** + * The radio must be on in order to turn it off. + */ + command error_t SplitControl.stop() { + if(radioState != CCXX00_ON) { + return EALREADY; + } + + radioState = CCXX00_TURNING_OFF; + + signal SplitControlManager.stateChange(); + return call SubControl.stop(); + } + + + /***************** Send Commands ****************/ + command error_t Send.send(message_t* msg, uint8_t len) { + if(radioState != CCXX00_ON) { + return call SplitControl.start(); + + } else { + return call SubSend.send(msg, len); + } + } + + command error_t Send.cancel(message_t* msg) { + return FAIL; + } + + command uint8_t Send.maxPayloadLength() { + return call SubSend.maxPayloadLength(); + } + + command void* Send.getPayload(message_t* msg, uint8_t len) { + return call SubSend.getPayload(msg, len); + } + + /***************** SplitControlManager Commands ****************/ + /** + * @return TRUE if the radio is currently enabled + */ + command bool SplitControlManager.isOn() { + return (radioState == CCXX00_ON); + } + + /** + * @return the state of the radio + */ + command radio_state_t SplitControlManager.getState() { + return radioState; + } + + + /***************** SubControl Events ****************/ + event void SubControl.startDone(error_t error) { + radioState = CCXX00_ON; + signal SplitControl.startDone(error); + + if(delayedSend) { + delayedSend = FALSE; + if(call SubSend.send(RADIO_STACK_PACKET, 0) != SUCCESS) { + signal Send.sendDone(RADIO_STACK_PACKET, FAIL); + } + } + } + + event void SubControl.stopDone(error_t error) { + radioState = CCXX00_OFF; + signal SplitControl.stopDone(error); + } + + + /***************** SubSend Events ****************/ + event void SubSend.sendDone(message_t *msg, error_t error) { + delayedSend = FALSE; + signal Send.sendDone(msg, error); + } + + + /***************** Defaults ****************/ + +} + diff --git a/tos/chips/ccxx00_single/traffic/TrafficControl.h b/tos/chips/ccxx00_single/traffic/TrafficControl.h new file mode 100644 index 0000000000..42476b54e5 --- /dev/null +++ b/tos/chips/ccxx00_single/traffic/TrafficControl.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#ifndef TRAFFICCONTROL_H +#define TRAFFICCONTROL_H + +/** + * Default traffic control delay is 4 seconds between transmissions + */ +#ifndef DEFAULT_TRAFFIC_CONTROL_DELAY +#define DEFAULT_TRAFFIC_CONTROL_DELAY 4096U +#endif + +/** + * Longest delay between packets is 10240U + */ +#ifndef LONGEST_TRAFFIC_DELAY +#define LONGEST_TRAFFIC_DELAY 10240U +#endif + +/** + * Shortest delay between packets is 1024U + */ +#ifndef SHORTEST_TRAFFIC_DELAY +#define SHORTEST_TRAFFIC_DELAY 1024U +#endif + + +#endif + diff --git a/tos/chips/ccxx00_single/traffic/TrafficControlC.nc b/tos/chips/ccxx00_single/traffic/TrafficControlC.nc new file mode 100644 index 0000000000..756b3ef19d --- /dev/null +++ b/tos/chips/ccxx00_single/traffic/TrafficControlC.nc @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#include "AM.h" + +/** + * Traffic Control prevents too many packets from being transmitted too quickly, + * which helps prevent congestion and improves acknowledgment success rate. + * @author David Moss + */ +configuration TrafficControlC { + provides { + interface Send; + interface TrafficControl; + interface TrafficPriority[am_id_t amId]; + } + + uses { + interface Send as SubSend; + } +} + +implementation { + + components TrafficControlDummyP; + TrafficControl = TrafficControlDummyP.TrafficControl; + TrafficPriority = TrafficControlDummyP.TrafficPriority; + + Send = SubSend; + +} diff --git a/tos/chips/ccxx00_single/traffic/TrafficControlDummyP.nc b/tos/chips/ccxx00_single/traffic/TrafficControlDummyP.nc new file mode 100644 index 0000000000..8f78ca4781 --- /dev/null +++ b/tos/chips/ccxx00_single/traffic/TrafficControlDummyP.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#warning "Stubbing out Traffic Control" + +module TrafficControlDummyP { + provides { + interface TrafficControl; + interface TrafficPriority[am_id_t amId]; + } +} + +implementation { + + /***************** TrafficControl Commands ****************/ + command void TrafficControl.enable(bool active) { + } + + command void TrafficControl.setDelay(uint16_t delay) { + } + + command uint16_t TrafficControl.getDelay() { + return 0; + } + + /***************** TrafficPriority Commands ****************/ + command void TrafficPriority.setPriority[am_id_t amId](uint8_t priority) { + } + +} diff --git a/tos/chips/ccxx00_single/transmit/BlazeTransmit.h b/tos/chips/ccxx00_single/transmit/BlazeTransmit.h new file mode 100644 index 0000000000..dabb9ea405 --- /dev/null +++ b/tos/chips/ccxx00_single/transmit/BlazeTransmit.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +#ifndef BLAZETRANSMIT_H +#define BLAZETRANSMIT_H + +#define MAX_FORCE_ATTEMPTS 2048 + +#endif + diff --git a/tos/chips/ccxx00_single/transmit/BlazeTransmitC.nc b/tos/chips/ccxx00_single/transmit/BlazeTransmitC.nc new file mode 100644 index 0000000000..f7bc71f509 --- /dev/null +++ b/tos/chips/ccxx00_single/transmit/BlazeTransmitC.nc @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * Transmit large packets (> 64 bytes) + * To use this on the MSP430, DMA MUST be enabled. Also, it is highly + * recommended the SMCLK used for SPI is increased above its default minimum. + * The microcontroller must access the SPI bus at a minimum of 500 kbps or the + * node will lock up. + * + * Point your TransmitArbiterC to the BlazeTransmit instead of BlazeTransmit. + * This will be a change specific to your workspace until we find this + * module can work without changes to the TinyOS baseline SPI bus. + * + * This module differs from BlazeTransmit in that packets are not pre-loaded + * into the radio. Instead, the radio is kicked into TX mode and then + * the packet is shot over the SPI bus. The radio transmits the packet + * directly as it's coming across the SPI bus, hence the need for at least + * a 500 kbps SPI bus clock. + * + * The parameterized ID is, of course, a unique value of UQ_BLAZE_RADIO + * which you'll find in each individual radio's header file (CC1100.h or + * CC2500.h). + * + * @author Jared Hill + * @author David Moss + */ + +#include "Blaze.h" + +configuration BlazeTransmitC { + provides { + interface AsyncSend; + interface AsyncSend as AckSend; + } +} + +implementation { + + components BlazeTransmitP; + AsyncSend = BlazeTransmitP.AsyncSend; + AckSend = BlazeTransmitP.AckSend; + + components BlazeCentralWiringC; + BlazeTransmitP.Csn -> BlazeCentralWiringC.Csn; + BlazeTransmitP.ChipRdy -> BlazeCentralWiringC.Gdo2_io; + BlazeTransmitP.RxIo -> BlazeCentralWiringC.Gdo0_io; + + components BlazeSpiC as Spi; + + BlazeTransmitP.RadioStatus -> Spi.RadioStatus; + BlazeTransmitP.TXFIFO -> Spi.TXFIFO; + BlazeTransmitP.STX -> Spi.STX; + BlazeTransmitP.SFRX -> Spi.SFRX; + + components new TimerMilliC(); + BlazeTransmitP.Timer -> TimerMilliC; + + components BlazePacketC; + BlazeTransmitP.BlazePacketBody -> BlazePacketC; + + components new ReceiveModeC(); + BlazeTransmitP.ReceiveMode -> ReceiveModeC; + + components LedsC; + BlazeTransmitP.Leds -> LedsC; + +#if BLAZE_ENABLE_CRC_32 + components PacketCrcC; + BlazeTransmitP.PacketCrc -> PacketCrcC; +#endif + +} diff --git a/tos/chips/ccxx00_single/transmit/BlazeTransmitP.nc b/tos/chips/ccxx00_single/transmit/BlazeTransmitP.nc new file mode 100644 index 0000000000..8a328ed11b --- /dev/null +++ b/tos/chips/ccxx00_single/transmit/BlazeTransmitP.nc @@ -0,0 +1,366 @@ + +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + + +/** + * To use this on the MSP430, DMA MUST be enabled. Also, it is highly + * recommended the SMCLK used for SPI is increased above its default minimum. + * The microcontroller must access the SPI bus at a minimum of 500 kbps or the + * node will lock up. + * + * Point your TransmitArbiterC to the BlazeTransmit instead of BlazeTransmit. + * This will be a change specific to your workspace until we find this + * module can work without changes to the TinyOS baseline SPI bus. + * + * The radio is kicked into TX mode and then + * the packet is shot over the SPI bus. The radio transmits the packet + * directly as it's coming across the SPI bus, hence the need for at least + * a 500 kbps SPI bus clock. + * + * The parameterized ID is, of course, a unique value of UQ_BLAZE_RADIO + * which you'll find in each individual radio's header file (CC1100.h or + * CC2500.h). + * + * @author Jared Hill + * @author David Moss + */ + +#include "Blaze.h" +#include "AM.h" +#include "BlazeTransmit.h" + +module BlazeTransmitP { + + provides { + interface AsyncSend; + interface AsyncSend as AckSend; + } + + uses { + interface GeneralIO as Csn; + interface GeneralIO as ChipRdy; + interface GeneralIO as RxIo; + interface BlazePacketBody; + interface BlazeRegSettings; + interface ReceiveMode; + + interface BlazeFifo as TXFIFO; + + interface BlazeStrobe as STX; + interface BlazeStrobe as SFRX; + + interface Timer; + interface RadioStatus; + interface Leds; + +#if BLAZE_ENABLE_CRC_32 + interface PacketCrc; +#endif + } +} + + +implementation { + + /** + * Transmit States + */ + enum { + S_TX_IDLE, + + S_TX_PACKET, + S_TX_ACK, + }; + + /***************** Global Variables ****************/ + norace void *myMsg; + bool force; + uint8_t state; + uint16_t duration; + + /***************** Prototypes ****************/ + error_t transmit(); + void finishTx(); + + task void startTimer(); + + /***************** AsyncSend Commands ****************/ + async command error_t AsyncSend.send(void *msg, bool forcePkt, uint16_t preambleDurationMs) { + if(state != S_TX_IDLE) { + return FAIL; + } + + state = S_TX_PACKET; + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led2On(); +#endif + + atomic myMsg = msg; + atomic force = forcePkt; + atomic duration = preambleDurationMs; + +#if BLAZE_ENABLE_CRC_32 + call PacketCrc.computeCrc( myMsg ); +#endif + + return transmit(); + } + + /***************** AckSend Commands ****************/ + /** + * Note that ack packets aren't currently undergoing a CRC check. + */ + async command error_t AckSend.send(void *msg, bool forcePkt, uint16_t preambleDurationMs) { + if(state != S_TX_IDLE) { + return FAIL; + } + + state = S_TX_ACK; + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led1On(); +#endif + + atomic myMsg = msg; + atomic force = forcePkt; + atomic duration = preambleDurationMs; + + return transmit(); + } + + + /***************** TXFIFO Events ****************/ + async event void TXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, + error_t error ) { + + uint16_t count = 0; + + if(state != S_TX_IDLE) { + + call Csn.set(); + call Csn.clr(); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(1); +#endif + + while(call RadioStatus.getRadioStatus() != BLAZE_S_RX) { + count++; + call Csn.set(); + call Csn.clr(); + + if(count == 0) { + call ReceiveMode.srx(); + return; + } + } + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(0); +#endif + + finishTx(); + } + } + + + async event void TXFIFO.readDone( uint8_t* tx_buf, uint8_t tx_len, + error_t error ) { + } + + /***************** ReceiveMode Events ****************/ + event void ReceiveMode.srxDone() { + finishTx(); + } + + /***************** Local Functions ****************/ + /** + * Transmit the given message through the given radio ID + * @param id the radio id + * @param force TRUE to force the packet to go through, even if CCA fails the + * first few times + */ + error_t transmit() { + uint8_t status; + bool forcing; + uint16_t transmitDelay; + uint16_t killSwitch; + + atomic { + forcing = force; + transmitDelay = duration; + } + + /* + * The following code was originally here to prevent the node from + * transmitting when it's supposed to be receiving, to increase the + * acknowledgment success rate. + * + * This block of code locks up a transceiver that is rapidly + * receiving packets (like XMAC) while responding to some of them. + * Although this code isn't needed here, it shows that the RxIo line is + * high and the receive branch isn't doing anything about it. + * + * I'll leave this code available for now if someone wants to experiment + * with making the BlazeReceiveP more reliable. + * + * For now, the RXFIFO fills up and is flushed in the next while loop, + * which clears the RxIo line and gets the receive branch moving again. + * + if(state == S_TX_PACKET && call RxIo.get()) { +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led2Off(); +#endif + state = S_TX_IDLE; + call Leds.led1Off(); + return FAIL; + } + */ + + call Csn.clr(); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(2); +#endif + + while(call ChipRdy.get()); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(0); +#endif + + call ReceiveMode.blockingSrx(); + + + /* + * Attempt to transmit. If the radio goes into TX mode, then our transmit + * is occurring. Otherwise, there was something on the channel that + * prevented CCA from passing + */ + + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(3); +#endif + + killSwitch = 0; + do { + killSwitch++; + call STX.strobe(); + status = call RadioStatus.getRadioStatus(); + + if(!forcing && status == BLAZE_S_RX) { + break; + } + + } while((status != BLAZE_S_TX) && killSwitch < MAX_FORCE_ATTEMPTS); + +#if BLAZE_ENABLE_WHILE_LOOP_LEDS + call Leds.set(0); +#endif + + + if(status != BLAZE_S_TX) { + // CCA failed + call Csn.set(); + state = S_TX_IDLE; + +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led2Off(); + call Leds.led1Off(); +#endif + + return EBUSY; + } + + // CCA Passed + if(transmitDelay > 0) { + post startTimer(); + + } else { + call TXFIFO.write(myMsg, (call BlazePacketBody.getHeader(myMsg))->length + 1); + } + + return SUCCESS; + } + + /** + * Finish up the transmission process + */ + void finishTx() { + uint8_t myState = state; + state = S_TX_IDLE; + + call Csn.set(); + + if(myState == S_TX_PACKET) { +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led2Off(); +#endif + + signal AsyncSend.sendDone(SUCCESS); + + } else { +#if BLAZE_ENABLE_TIMING_LEDS + call Leds.led1Off(); +#endif + signal AckSend.sendDone(SUCCESS); + } + } + + /***************** Timer Events ****************/ + event void Timer.fired() { + call TXFIFO.write(myMsg, (call BlazePacketBody.getHeader(myMsg))->length + 1); + } + + + /***************** Tasks ****************/ + /** + * Move out of async context + */ + task void startTimer() { + uint16_t transmitDelay; + atomic transmitDelay = duration; + signal AsyncSend.sending(); + call Timer.startOneShot(transmitDelay + 1); + } + + + /***************** Defaults ****************/ + default async event void AsyncSend.sendDone(error_t error) {} + default async event void AsyncSend.sending() {} + default async event void AckSend.sendDone(error_t error) {} + +} + + diff --git a/tos/chips/ccxx00_single/unique/DummyReceiveP.nc b/tos/chips/ccxx00_single/unique/DummyReceiveP.nc new file mode 100644 index 0000000000..3d2f1d9874 --- /dev/null +++ b/tos/chips/ccxx00_single/unique/DummyReceiveP.nc @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +module DummyReceiveP { + provides { + interface Receive; + } +} + +implementation { + + default event message_t *Receive.receive(message_t *msg, + void *payload, uint8_t len) { + } + +} diff --git a/tos/chips/ccxx00_single/unique/UniqueReceive.h b/tos/chips/ccxx00_single/unique/UniqueReceive.h new file mode 100644 index 0000000000..177673b4e6 --- /dev/null +++ b/tos/chips/ccxx00_single/unique/UniqueReceive.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author David Moss + */ + +#ifndef UNIQUERECEIVE_H +#define UNIQUERECEIVE_H + +/** + * Ideally, your receive history size should be equal to the number of + * RF neighbors your node will have + */ +#ifndef RECEIVE_HISTORY_SIZE +#define RECEIVE_HISTORY_SIZE 4 +#endif + +#endif + diff --git a/tos/chips/ccxx00_single/unique/UniqueReceiveC.nc b/tos/chips/ccxx00_single/unique/UniqueReceiveC.nc new file mode 100644 index 0000000000..967156f974 --- /dev/null +++ b/tos/chips/ccxx00_single/unique/UniqueReceiveC.nc @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * This layer keeps a history of the past RECEIVE_HISTORY_SIZE received messages + * If the source address and dsn number of a newly received message matches + * our recent history, we drop the message because we've already seen it. + * This should sit at the bottom of the stack + * @author David Moss + */ + +#include "UniqueReceive.h" + +configuration UniqueReceiveC { + provides { + interface Receive; + interface Receive as DuplicateReceive; + } + + uses { + interface Receive as SubReceive; + } +} + +implementation { + +#if (RECEIVE_HISTORY_SIZE > 0) + components UniqueReceiveP, + BlazePacketC, + MainC; + + Receive = UniqueReceiveP.Receive; + DuplicateReceive = UniqueReceiveP.DuplicateReceive; + SubReceive = UniqueReceiveP.SubReceive; + + MainC.SoftwareInit -> UniqueReceiveP; + + UniqueReceiveP.BlazePacketBody -> BlazePacketC; + +#else + components DummyReceiveP; + DuplicateReceive = DummyReceiveP; + + Receive = SubReceive; + +#endif + +} + diff --git a/tos/chips/ccxx00_single/unique/UniqueReceiveP.nc b/tos/chips/ccxx00_single/unique/UniqueReceiveP.nc new file mode 100644 index 0000000000..f246441ace --- /dev/null +++ b/tos/chips/ccxx00_single/unique/UniqueReceiveP.nc @@ -0,0 +1,161 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * This layer keeps a history of the past RECEIVE_HISTORY_SIZE received messages + * If the source address and dsn number of a newly received message matches + * our recent history, we drop the message because we've already seen it. + * @author David Moss + */ + +#include "UniqueReceive.h" + +module UniqueReceiveP { + provides { + interface Receive; + interface Receive as DuplicateReceive; + interface Init; + } + + uses { + interface Receive as SubReceive; + interface BlazePacketBody; + } +} + +implementation { + + struct { + am_addr_t source; + uint8_t dsn; + } receivedMessages[RECEIVE_HISTORY_SIZE]; + + uint8_t writeIndex = 0; + + /** History element containing info on a source previously received from */ + uint8_t recycleSourceElement; + + enum { + INVALID_ELEMENT = 0xFF, + }; + + /***************** Init Commands *****************/ + command error_t Init.init() { + int i; + for(i = 0; i < RECEIVE_HISTORY_SIZE; i++) { + receivedMessages[i].source = (am_addr_t) 0xFFFF; + } + return SUCCESS; + } + + /***************** Prototypes Commands ***************/ + bool hasSeen(uint16_t msgSource, uint8_t msgDsn); + void insert(uint16_t msgSource, uint8_t msgDsn); + + /***************** SubReceive Events *****************/ + event message_t *SubReceive.receive(message_t* msg, void* payload, + uint8_t len) { + uint16_t msgSource = (call BlazePacketBody.getHeader(msg))->src; + uint8_t msgDsn = (call BlazePacketBody.getHeader(msg))->dsn; + + if(hasSeen(msgSource, msgDsn)) { + return signal DuplicateReceive.receive(msg, payload, len); + + } else { + insert(msgSource, msgDsn); + return signal Receive.receive(msg, payload, len); + } + } + + /****************** Functions ****************/ + /** + * This function does two things: + * 1. It loops through our entire receive history and detects if we've + * seen this DSN before from the given source (duplicate packet) + * 2. It detects if we've seen messages from this source before, so we know + * where to update our history if it turns out this is a new message. + * + * The global recycleSourceElement variable stores the location of the next insert + * if we've received a packet from that source before. Otherwise, it's up + * to the insert() function to decide who to kick out of our history. + */ + bool hasSeen(uint16_t msgSource, uint8_t msgDsn) { + int i; + recycleSourceElement = INVALID_ELEMENT; + + atomic { + for(i = 0; i < RECEIVE_HISTORY_SIZE; i++) { + if(receivedMessages[i].source == msgSource) { + if(receivedMessages[i].dsn == msgDsn) { + // Only exit this loop if we found a duplicate packet + return TRUE; + } + + recycleSourceElement = i; + } + } + } + + return FALSE; + } + + /** + * Insert the message into the history. If we received a message from this + * source before, insert it into the same location as last time and verify + * that the "writeIndex" is not pointing to that location. Otherwise, + * insert it into the "writeIndex" location. + */ + void insert(uint16_t msgSource, uint8_t msgDsn) { + uint8_t element = recycleSourceElement; + bool increment = FALSE; + + atomic { + if(element == INVALID_ELEMENT || writeIndex == element) { + // Use the writeIndex element to insert this new message into + element = writeIndex; + increment = TRUE; + } + + receivedMessages[element].source = msgSource; + receivedMessages[element].dsn = msgDsn; + if(increment) { + writeIndex++; + writeIndex %= RECEIVE_HISTORY_SIZE; + } + } + } + + /***************** Defaults ****************/ + default event message_t *DuplicateReceive.receive(message_t *msg, void *payload, uint8_t len) { + return msg; + } +} + diff --git a/tos/lib/crcx/Crc16C.nc b/tos/lib/crcx/Crc16C.nc new file mode 100644 index 0000000000..0e39ad49ca --- /dev/null +++ b/tos/lib/crcx/Crc16C.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Mark Hays + */ + +configuration Crc16C { + provides { + interface CrcX; + } +} + +implementation { + components Crc16P; + + CrcX = Crc16P; +} + diff --git a/tos/lib/crcx/Crc16P.nc b/tos/lib/crcx/Crc16P.nc new file mode 100644 index 0000000000..b1a379ea38 --- /dev/null +++ b/tos/lib/crcx/Crc16P.nc @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Mark Hays + */ + +// See Crc32P.nc for references + +module Crc16P { + provides { + interface CrcX as CRC; + } +} + +implementation { + + async command uint16_t CRC.crc(void* buf, uint8_t len) { + return call CRC.seededCrc(0, buf, len); + } + +#ifdef __MSP430__ + +#warning "Using MSP430 assembly implementation of CRC16" + + // This is a bit faster than the C implementation because it + // doesn't include the bizarre and knuckleheaded stuff that + // mspgcc generates. For example, mspgcc generates a long + // and weird+pointless insn sequence for the first "swpb %[crc]" + // below. + // + // 31 clocks per byte -- 7.75us @ 4 MHz + // + // GCC bug: things break if you don't include the noinline attribute! + // + async command __attribute__((noinline)) + uint16_t CRC.seededCrc(uint16_t crc, void *buf, uint8_t len) { + atomic { + __asm__ __volatile__(";---------------\n" + "; CRC16\n" + ";\n" + "; %0: crc\n" + "; %2: buf\n" + "; %3: len\n" + "; r10: scratch\n" + "1:\n" + "cmp.b #0, %[len]\n" + "jeq 2f\n" + "dec %[len]\n" + "swpb %[crc]\n" + "mov.b @%[buf]+, r10\n" + "xor r10, %[crc]\n" + "mov.b %[crc], r10\n" + "clrc\n" + "rrc.b r10\n" + "rra.b r10\n" + "rra.b r10\n" + "rra.b r10\n" + "xor r10, %[crc]\n" + "mov.b %[crc], r10\n" + "swpb r10\n" + "rla r10\n" + "rla r10\n" + "rla r10\n" + "rla r10\n" + "xor r10, %[crc]\n" + "mov.b %[crc], r10\n" + "rla r10\n" + "rla r10\n" + "rla r10\n" + "rla r10\n" + "rla r10\n" + "xor r10, %[crc]\n" + "jmp 1b\n" + "2:\n" + : [crc] "=r" (crc) + : "0" (crc), + [buf] "r" (buf), + [len] "r" (len) + : "r10"); + }; + return crc; + } + +#else +#warning "Using slow C implementation of CRC16" + + async command uint16_t CRC.seededCrc(uint16_t crc, void *buf, uint8_t len) { + atomic { + uint8_t *p = (uint8_t *) buf; + + while (len--) { + crc = (uint8_t) (crc >> 8) | (crc << 8); + crc ^= *p++; + crc ^= (uint8_t) (crc & 0xff) >> 4; + crc ^= crc << 12; + crc ^= (crc & 0xff) << 5; + } + } + return crc; + } + +#endif +} + diff --git a/tos/lib/crcx/Crc32C.nc b/tos/lib/crcx/Crc32C.nc new file mode 100644 index 0000000000..001f81ed62 --- /dev/null +++ b/tos/lib/crcx/Crc32C.nc @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Mark Hays + */ + +configuration Crc32C { + provides interface CrcX; +} + +implementation { + components Crc32P; + + CrcX = Crc32P; +} + diff --git a/tos/lib/crcx/Crc32P.nc b/tos/lib/crcx/Crc32P.nc new file mode 100644 index 0000000000..828af73a8b --- /dev/null +++ b/tos/lib/crcx/Crc32P.nc @@ -0,0 +1,307 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Mark Hays + */ + +//////////////////////////////////////////////////////////////////////// +// Crc32P.nc -- a couple of CRC32 implementations +// +// REFERENCE: +// http://www.ece.cmu.edu/~koopman/pubs/ray06_crcalgorithms.pdf +// +// Preprint, Dependable Systems and Networks (DSN), June 25-28 +// 2006, Philadelphia PA +// +// Efficient High Hamming Distance CRCs for Embedded Networks +// +// Justin Ray, Phillip Koopman, Department of Electrical +// Enginerring, Carnegie Mellon University, Pittsburgh PA +// +// NOTES: +// See crc.py for more readable implementations. For documentation, +// read the above reference (crc.py isn't well commented). +// +// Also, tos/system/crc.h mentions the need for a reference for its +// fast CRC16 algorithm (see Crc16P.nc for a ~sane version). +// +// Turns out that this implementation is the OVTA for CCR16. The +// above reference and references therein document the OVTA +// algorithm. +// + +module Crc32P { + provides { + interface CrcX as Crc; + } +} + +implementation { + async command uint32_t Crc.crc(void* buf, uint8_t len) { + return call Crc.seededCrc(0, buf, len); + } + +#ifdef __MSP430__ +#warning "Using MSP430 assembly implementation of CRC32" + +#ifdef FAST_CRC32 + +#warning "Using fast 0xE5 CRC polynomial" + + // This is the OVTA implementation of the CRC32sub8 polynomial + // 0xE5 from the cited reference above. It is very fast. For + // example, it is 1us/byte faster than OVTA for CRC16 given in + // Crc16P.nc! + // + // 27 clocks per byte -- 6.75us @ 4MHz + // + // Given the GCC bug seen in Crc16P, it's safest + // to make this be a proper function. + // + async command __attribute__((noinline)) + uint32_t Crc.seededCrc(uint32_t crc, void *buf, uint8_t len) { + atomic { + __asm__ __volatile__(";---------------\n" + "; 0xE5 CRC32\n" + ";\n" + "; %0: crc\n" + "; %2: buf\n" + "; %3: len\n" + "; r10: ndx\n" + "; r11: t\n" + "1:\n" + "cmp.b #0, %[len]\n" + "jeq 2f\n" + "dec %[len]\n" + "swpb %B[crc]\n" + "mov.b %B[crc], r10\n" + "xor r10, %B[crc]\n" + "xor.b @%[buf]+, r10\n" + "swpb %A[crc]\n" + "mov.b %A[crc], r11\n" + "bis r11, %B[crc]\n" + "xor r11, %A[crc]\n" + "xor r10, %A[crc]\n" + "add r10, r10\n" + "add r10, r10\n" + "xor r10, %A[crc]\n" + "add r10, r10\n" + "add r10, r10\n" + "add r10, r10\n" + "xor r10, %A[crc]\n" + "add r10, r10\n" + "xor r10, %A[crc]\n" + "add r10, r10\n" + "xor r10, %A[crc]\n" + "jmp 1b\n" + "2:\n" + : [crc] "=r" (crc) + : "0" (crc), + [buf] "r" (buf), + [len] "r" (len) + : "r10", "r11"); + }; + return crc; + } +#else + +#warning "Using slower IEEE CRC32 polynomial" + + // This is the VTA version of IEEE CRC32. It has to loop + // eight times per byte, but avoids shifts of 32-bit + // quantities inside the loop. Requires a 16 word table. + // + // Cannot be reduced to a faster OVTA implementation, per + // the cited reference (table bits are too dense to be + // reduced). + + const uint16_t __attribute__((C)) crcTable[16] = { + 0x1db7, + 0x04c1, + 0x3b6e, + 0x0982, + 0x76dc, + 0x1304, + 0xedb8, + 0x2608, + 0xdb70, + 0x4c11, + 0xb6e0, + 0x9823, + 0x7077, + 0x3486, + 0xe0ee, + 0x690c, + }; + + // nesC won't let crcTable be declared spontaneous. + // Trick nesC. + uint16_t __attribute__((noinline, spontaneous)) zagnut(int ndx) { + return crcTable[ndx]; + } + + // 96-144 clocks per byte -- 24-36 us @ 4 MHz + // + // Given the GCC bug seen in Crc16P, it's safest + // to make this be a proper function. + // + async command __attribute__((noinline)) + uint32_t Crc.seededCrc(uint32_t crc, void *buf, uint8_t len) { + atomic { + __asm__ __volatile__("; %0: crc\n" + "; %2: buf\n" + "; %3: len\n" + "; r10: ndx\n" + "; r11: t\n" + "1:\n" + "cmp.b #0, %[len]\n" + "jeq 4f\n" + "dec %[len]\n" + "swpb %B[crc]\n" + "mov.b %B[crc], r10\n" + "xor r10, %B[crc]\n" + "xor.b @%[buf]+, r10\n" + "swpb %A[crc]\n" + "mov.b %A[crc], r11\n" + "bis r11, %B[crc]\n" + "xor r11, %A[crc]\n" + "mov #0, r11\n" + "2:\n" + "bit #1, r10\n" + "jz 3f\n" + "xor crcTable(r11), %A[crc]\n" + "xor crcTable+2(r11), %B[crc]\n" + "3:\n" + "add #4, r11\n" + "; clrc ; NB unnecessary\n" + "rrc r10\n" + "cmp #32, r11\n" + "jne 2b\n" + "jmp 1b\n" + "4:\n" + : [crc] "=r" (crc) + : "0" (crc), + [buf] "r" (buf), + [len] "r" (len) + : "r10", "r11"); + }; + return crc; + } +#endif + +#else + +#warning "Using slow C implementation of CRC32" + +#ifdef FAST_CRC32 +#warning "Using fast 0xE5 CRC32 polynomial" + + async command uint32_t Crc.seededCrc(uint32_t crc, void *buf, uint8_t len) { + atomic { + uint8_t *p = (uint8_t *) buf; + uint16_t ndx; + + while (len--) { + ndx = (crc >> 24) ^ *p++; + crc <<= 8; + crc ^= ndx; + ndx <<= 2; + crc ^= ndx; + ndx <<= 3; + crc ^= ndx; + ndx <<= 1; + crc ^= ndx; + ndx <<= 1; + crc ^= ndx; + } + }; + return crc; + } + +#else + +#if 0 +#warning "Using slow IEEE CRC32 polynomial and glacial CRC algorithm" + async command uint32_t Crc.seededCrc(uint32_t crc, void *buf, uint8_t len) { + atomic { + uint8_t *p = (uint8_t *) buf, i; + + while (len--) { + crc ^= (((uint32_t) (*p++)) << 24); + for (i = 0; i < 8; i++) { + if (crc & (((uint32_t) 0x80) << 24)) + crc = (crc << 1) ^ 0x04C11DB7UL; + else + crc = (crc << 1); + } + } + } + return crc; + } +#else +#warning "Using slow IEEE CRC32 polynomial and VTA CRC algorithm" + + const uint32_t ctcTable[8] = { + 0x04c11db7UL, + 0x09823b6eUL, + 0x130476dcUL, + 0x2608edb8UL, + 0x4c11db70UL, + 0x9823b6e0UL, + 0x34867077UL, + 0x690ce0eeUL, + }; + + async command uint32_t Crc.seededCrc(uint32_t crc, void *buf, uint8_t len) { + atomic { + uint8_t *p = (uint8_t *) buf, i, ndx; + + while (len--) { + ndx = (crc >> 24) ^ *p++; + crc <<= 8; + for (i = 0; i < 8; i++) { + if (ndx & 1) + crc ^= crcTable[i]; + ndx >>= 1; + } + } + } + return crc; + } +#endif + +#endif + +#endif + +} + diff --git a/tos/lib/crcx/CrcX.nc b/tos/lib/crcx/CrcX.nc new file mode 100644 index 0000000000..d239ce44f5 --- /dev/null +++ b/tos/lib/crcx/CrcX.nc @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Mark Hays + */ + +//////////////////////////////////////////////////////////////////////// +// CrcX.nc -- typedef-ed CRC interface +// + +interface CrcX { + async command t crc(void* buf, uint8_t len); + + async command t seededCrc(t startCrc, void *buf, uint8_t len); +} + diff --git a/tos/lib/crcx/Makefile b/tos/lib/crcx/Makefile new file mode 100644 index 0000000000..0610956875 --- /dev/null +++ b/tos/lib/crcx/Makefile @@ -0,0 +1,6 @@ +COMPONENT = TestC + +#CFLAGS += -DFAST_CRC32 + +include $(MAKERULES) + diff --git a/tos/lib/crcx/TestC.nc b/tos/lib/crcx/TestC.nc new file mode 100644 index 0000000000..bbd4e2c131 --- /dev/null +++ b/tos/lib/crcx/TestC.nc @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Mark Hays + */ + +configuration TestC { } + +implementation { + components TestP, MainC, LedsC; + components Crc16C; + components Crc32C; + + TestP.Boot -> MainC; + TestP.Leds -> LedsC; + TestP.Crc16 -> Crc16C; + TestP.Crc32 -> Crc32C; +} + diff --git a/tos/lib/crcx/TestP.nc b/tos/lib/crcx/TestP.nc new file mode 100644 index 0000000000..e852d631a1 --- /dev/null +++ b/tos/lib/crcx/TestP.nc @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Mark Hays + */ + +module TestP { + uses { + interface Boot; + interface Leds; + interface CrcX as Crc16; + interface CrcX as Crc32; + } +} + +implementation { + char *s = "hello"; + +#ifdef FAST_CRC32 +#define EXP32 0xb0604465UL +#else +#define EXP32 0xa1de215eUL +#endif + + event void Boot.booted() { + uint16_t s16 = call Crc16.crc(s, 5); + uint32_t s32 = call Crc32.crc(s, 5); + + if ((s16 == 0xc362) && + (s32 == EXP32)) + call Leds.set(2); + else + call Leds.set(1); + } +} + diff --git a/tos/lib/crcx/crc.py b/tos/lib/crcx/crc.py new file mode 100644 index 0000000000..96bf70ed88 --- /dev/null +++ b/tos/lib/crcx/crc.py @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Mark Hays + */ + +######################################################################## +### crc.py -- dinking around with CRC algorithms +### +### see Crc32P.nc for reference +### + +def crc16_(crc, b): + for i in xrange(8): + f = (b & 0x80) << 8 + f = ((crc ^ f) & 0x8000) and 0x1021 or 0 + crc = ((crc << 1) ^ f) & 0xffff + b = b << 1 + return crc + +T = [crc16_(0, 1 << i) for i in xrange(8)] + +def bin(x, N=32): + l = [] + for i in xrange(N): + if i and not i & 7: + l.insert(0, "_") + l.insert(0, (x & 1) and "1" or "0") + x >>= 1 + l.insert(0, "0b_") + return "".join(l) + +def dT(t, N=32): + for i in xrange(len(t)): + j = 1 << i + print i, bin(j, N), bin(t[i], N) + print + +dT(T, 16) + +def crc32_(crc, b): + M = 0x04c11db7 + for i in xrange(8): + f = (b & 0x80) << 24 + f = ((crc ^ f) & 0x80000000) and M or 0 + crc = ((crc << 1) ^ f) & 0xffffffff + b = b << 1 + return crc + +def crc32_(crc, b): + M = 0x04c11db7 + #M = 0xe5 + crc ^= b << 24 + for i in xrange(8): + f = (crc & 0x80000000) and M or 0 + crc = ((crc << 1) ^ f) & 0xffffffff + return crc + +T = [crc32_(0, 1 << i) for i in xrange(8)] + +dT(T, 32) +for t in T: + print "0x%08x" % t +print + +def crc32_(crc, b): + ndx = (crc >> 24) ^ b + crc <<= 8 + for i in xrange(8): + if ndx & 1: + crc ^= T[i] + ndx >>= 1 + return crc & 0xffffffff + +def crc(s, f=crc32_): + r = 0 + for c in s: + r = f(r, ord(c)) + return r + +def swpb(w): + w = (w >> 8) | (w << 8) + w &= 0xffff + return w + +U = [ ] +for t in T: + U.append(t & 0xffff) + U.append(t >> 16) +T = U +#del t, U +#for i in xrange(len(T)): +# print ".word 0x%04x" % T[i] + +def crc32_((h, l), b): + # need 2 (byte) temps: ndx and t + # + h = swpb(h) # hl,hh [1] + ndx = h & 0xff # hh [1] USE mov.b h,ndx -- crc>>24 + h ^= ndx # hl,0 [1] + ndx ^= b # ndx [2] USE xor.b @ptr+, ndx + l = swpb(l) # ll,lh [1] + t = l & 0xff # 0,lh [1] USE mov.b l, t + h |= t # hl,lh [1] + l ^= t # ll,0 [1] crc = hl,lh,ll,0 -- crc<<8 + t = 0 # [1] + # <10> + while t < 16: + if ndx & 1: # [3] bit+jz + l ^= T[t] # [3] USE xor #T(t), l + h ^= T[t+1] # [3] USE xor #T+2(t), h OMIT for 0xe5 + t += 2 # [1] USE add #4, t + ndx >>= 1 # [1] + # <5/11> [8] + # <40/88> [68] + # avg 74 clk/byte -- ~19 us/byte, worst case: 98 clk, ~25 us/byte + # + # sub8 0xe5 + # <5/8> [6.5] -> [52] -> [62] -> ~16 us/byte + return (h, l) + +def crc32_sub((h, l), b): + # need 2 (byte) temps: ndx and t + # + h = swpb(h) # hl,hh [1] + ndx = h & 0xff # hh [1] USE mov.b h,ndx -- crc>>24 + h ^= ndx # hl,0 [1] + ndx ^= b # ndx [2] USE xor.b @ptr+, ndx + l = swpb(l) # ll,lh [1] + t = l & 0xff # 0,lh [1] USE mov.b l, t + h |= t # hl,lh [1] + l ^= t # ll,0 [1] crc = hl,lh,ll,0 -- crc<<8 + # <9> + l ^= ndx # [1] + ndx <<= 2 # [2] + l ^= ndx # [1] + ndx <<= 3 # [3] + l ^= ndx # [1] + ndx <<= 1 # [1] + l ^= ndx # [1] + ndx <<= 1 # [1] + l ^= ndx # [1] + # <21> + return (h, l) + +def crc(s, f=crc32_sub): + r = (0, 0) + for c in s: + r = f(r, ord(c)) + return (r[0] << 16) | r[1] + +print "0x%08x" % crc("hello") +assert crc("hello") == 0xb0604465, hex(crc("hello")) + diff --git a/tos/platforms/exp430/.platform b/tos/platforms/exp430/.platform index 4f7b2409c9..900bccd1a6 100644 --- a/tos/platforms/exp430/.platform +++ b/tos/platforms/exp430/.platform @@ -23,8 +23,34 @@ for (split(/\n/, <<'EOText' %T/chips/msp430/pmm %T/chips/msp430/adc12 - %T/chips/tmp112 - %T/chips/lis3dh + # Rincon CCxx00 Dual Radio Stack + %P/chips/ccxx00 + + %T/lib/crcx + + %T/chips/ccxx00_single/ + %T/chips/ccxx00_single/acks + %T/chips/ccxx00_single/acks/StaticAcks + %T/chips/ccxx00_single/alarm + %T/chips/ccxx00_single/am + %T/chips/ccxx00_single/crc + %T/chips/ccxx00_single/csma + %T/chips/ccxx00_single/csma/continuoussense + %T/chips/ccxx00_single/init + %T/chips/ccxx00_single/interfaces + %T/chips/ccxx00_single/link + %T/chips/ccxx00_single/lpl + %T/chips/ccxx00_single/lpl/alwayson + %T/chips/ccxx00_single/packet + %T/chips/ccxx00_single/powermanager + %T/chips/ccxx00_single/radios/cc1100 + %T/chips/ccxx00_single/receive + %T/chips/ccxx00_single/select + %T/chips/ccxx00_single/spi + %T/chips/ccxx00_single/splitcontrolmanager + %T/chips/ccxx00_single/traffic + %T/chips/ccxx00_single/transmit + %T/chips/ccxx00_single/unique %T/lib/timer %T/lib/serial diff --git a/tos/platforms/exp430/ActiveMessageC.nc b/tos/platforms/exp430/ActiveMessageC.nc new file mode 100644 index 0000000000..0432842714 --- /dev/null +++ b/tos/platforms/exp430/ActiveMessageC.nc @@ -0,0 +1,52 @@ +/** + * This is a naming wrapper around the Blaze Radio Stack. + * It also defines at least one default radio this platform uses by + * including CC2500ControlC and/or CC1100ControlC + * + * @author Philip Levis + * @author David Moss + */ + +#include "CC1100.h" +#include "Blaze.h" + +configuration ActiveMessageC { + provides { + interface SplitControl; + interface SplitControl as BlazeSplitControl[radio_id_t id]; + + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; + + interface RadioSelect; + interface PacketLink; + interface BlazePacket; + interface Csma[am_id_t id]; + } +} + +implementation { + + components BlazeC; + components CC1100ControlC; + + SplitControl = BlazeC.SplitControl; + BlazeSplitControl = BlazeC.BlazeSplitControl; + AMSend = BlazeC; + Receive = BlazeC.Receive; + Snoop = BlazeC.Snoop; + Packet = BlazeC; + AMPacket = BlazeC; + PacketAcknowledgements = BlazeC; + RadioSelect = BlazeC; + PacketLink = BlazeC; + BlazePacket = BlazeC; + Csma = BlazeC; + +} + diff --git a/tos/platforms/exp430/chips/ccxx00/DummyIoP.nc b/tos/platforms/exp430/chips/ccxx00/DummyIoP.nc new file mode 100644 index 0000000000..50bc5ad8c3 --- /dev/null +++ b/tos/platforms/exp430/chips/ccxx00/DummyIoP.nc @@ -0,0 +1,44 @@ + +/** + * Dummy pin implementation for platforms that don't have a pin/FET switch to + * turn the power on and off to the radio. + * @author David Moss + */ + +module DummyIoP { + provides { + interface GeneralIO; + } +} + +implementation { + + async command void GeneralIO.set() { + } + + async command void GeneralIO.clr() { + } + + async command void GeneralIO.toggle() { + } + + async command bool GeneralIO.get() { + return FALSE; + } + + async command void GeneralIO.makeInput() { + } + + async command bool GeneralIO.isInput() { + return FALSE; + } + + async command void GeneralIO.makeOutput() { + } + + async command bool GeneralIO.isOutput() { + return FALSE; + } + +} + diff --git a/tos/platforms/exp430/chips/ccxx00/HplCC1100PinsC.nc b/tos/platforms/exp430/chips/ccxx00/HplCC1100PinsC.nc new file mode 100644 index 0000000000..abe1e0e498 --- /dev/null +++ b/tos/platforms/exp430/chips/ccxx00/HplCC1100PinsC.nc @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +configuration HplCC1100PinsC { + provides { + interface Resource as SpiResource; + /*interface FastSpiByte;*/ + interface SpiByte as FastSpiByte; + interface GeneralIO as CSN; + interface GeneralIO as GDO0; + interface GeneralIO as GDO2; + /*interface GpioCapture as Gdo0Capture;*/ + /*interface GpioCapture as Gdo2Capture;*/ + + // For ccxx00 driver, in case we use that + interface GeneralIO as Power; + interface GeneralIO as Csn; + interface GeneralIO as Gdo0_io; + interface GeneralIO as Gdo2_io; + interface GpioInterrupt as Gdo0_int; + interface GpioInterrupt as Gdo2_int; + + /*interface LocalTime as LocalTimeRadio;*/ + /*interface Init;*/ + /*interface Alarm;*/ + } +} +implementation { + + components HplMsp430GeneralIOC as IO, new Msp430UsciSpiB0C() as SpiC; + + // pins + components new Msp430GpioC() as CSNM; + components new Msp430GpioC() as GDO0M; + components new Msp430GpioC() as GDO2M; + + CSNM -> IO.Port26; + GDO0M -> IO.Port23; + GDO2M -> IO.Port24; + + CSN = CSNM; + GDO0 = GDO0M; + GDO2 = GDO2M; + + Csn = CSNM; + Gdo0_io = GDO0M; + Gdo2_io = GDO2M; + + components DummyIoP; + Power = DummyIoP; + + // spi + SpiResource = SpiC.Resource; + FastSpiByte = SpiC; + + // capture +/* + * components Msp430TimerC as TimerC; + * components new GpioCaptureC(); + * GpioCaptureC.Msp430TimerControl -> TimerC.ControlA1; + * GpioCaptureC.Msp430Capture -> TimerC.CaptureA1; + * GpioCaptureC.GeneralIO -> IO.Port12; + * SfdCapture = GpioCaptureC; + * + */ + // interrupts + components HplMsp430InterruptC; + components new Msp430InterruptC() as Gdo0_intm; + Gdo0_intm.HplInterrupt -> HplMsp430InterruptC.Port23; + Gdo0_int = Gdo0_intm.Interrupt; + + components new Msp430InterruptC() as Gdo2_intm; + Gdo2_intm.HplInterrupt -> HplMsp430InterruptC.Port24; + Gdo2_int = Gdo2_intm.Interrupt; + + + // alarm +/* + * components new Alarm32khz16C() as AlarmC; + * Alarm = AlarmC; + * Init = AlarmC; + * + * // localTime + * components LocalTime32khzC; + * LocalTimeRadio = LocalTime32khzC.LocalTime; + */ + +} diff --git a/tos/platforms/exp430/chips/ccxx00/HplRadioAlarmC.nc b/tos/platforms/exp430/chips/ccxx00/HplRadioAlarmC.nc new file mode 100644 index 0000000000..8f4d00bdf9 --- /dev/null +++ b/tos/platforms/exp430/chips/ccxx00/HplRadioAlarmC.nc @@ -0,0 +1,17 @@ + + +generic configuration HplRadioAlarmC() { + + provides interface Init; + provides interface Alarm as Alarm32khz16; + +} + +implementation { + + components new Alarm32khz16C(); + + Init = Alarm32khz16C; + Alarm32khz16 = Alarm32khz16C; + +} diff --git a/tos/platforms/exp430/chips/ccxx00/HplRadioSpiC.nc b/tos/platforms/exp430/chips/ccxx00/HplRadioSpiC.nc new file mode 100644 index 0000000000..a603e1f52a --- /dev/null +++ b/tos/platforms/exp430/chips/ccxx00/HplRadioSpiC.nc @@ -0,0 +1,21 @@ + + + +configuration HplRadioSpiC { + + provides interface Resource; + provides interface SpiByte; + provides interface SpiPacket; + +} + +implementation { + + components new Msp430UsciSpiB0C() as SpiC; + components HplRadioSpiP; + Resource = SpiC; + SpiByte = SpiC; + SpiPacket = SpiC; + SpiC.Msp430UsciConfigure -> HplRadioSpiP; +} + diff --git a/tos/platforms/exp430/chips/ccxx00/HplRadioSpiP.nc b/tos/platforms/exp430/chips/ccxx00/HplRadioSpiP.nc new file mode 100644 index 0000000000..c5cb26d4a5 --- /dev/null +++ b/tos/platforms/exp430/chips/ccxx00/HplRadioSpiP.nc @@ -0,0 +1,19 @@ +module HplRadioSpiP { + provides interface Msp430UsciConfigure; +} +implementation { + const msp430_usci_config_t msp430_usci_spi_cc1101 = { + /* Inactive high MSB-first 8-bit 3-pin master driven by SMCLK */ + + ctl0 : UCCKPH | UCMSB | UCMST | UCSYNC, + ctl1 : UCSSEL__SMCLK, + br0 : 2, /* 2x Prescale, 1*2^19 (512 KiHz) */ + br1 : 0, + mctl : 0, + i2coa: 0 + }; + async command const msp430_usci_config_t* + Msp430UsciConfigure.getConfiguration () { + return &msp430_usci_spi_cc1101; + } +} diff --git a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc index 32484b4c56..2ddbc6b1fb 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc @@ -48,15 +48,15 @@ configuration PlatformUsciMapC { UartA1C.URXD -> GIO.UCA1RXD; UartA1C.UTXD -> GIO.UCA1TXD; - components Msp430UsciSpiA0P as SpiA0C; - SpiA0C.SIMO -> GIO.UCA0SIMO; - SpiA0C.SOMI -> GIO.UCA0SOMI; - SpiA0C.CLK -> GIO.UCA0CLK; + /*components Msp430UsciSpiA0P as SpiA0C;*/ + /*SpiA0C.SIMO -> GIO.UCA0SIMO;*/ + /*SpiA0C.SOMI -> GIO.UCA0SOMI;*/ + /*SpiA0C.CLK -> GIO.UCA0CLK;*/ - /*components Msp430UsciSpiB0P as SpiB0C;*/ - /*SpiB0C.SIMO -> GIO.UCB0SIMO;*/ - /*SpiB0C.SOMI -> GIO.UCB0SOMI;*/ - /*SpiB0C.CLK -> GIO.UCB0CLK;*/ + components Msp430UsciSpiB0P as SpiB0C; + SpiB0C.SIMO -> GIO.UCB0SIMO; + SpiB0C.SOMI -> GIO.UCB0SOMI; + SpiB0C.CLK -> GIO.UCB0CLK; /*components Msp430UsciSpiA3P as SpiA3C;*/ /*SpiA3C.SIMO -> GIO.UCA3SIMO;*/ diff --git a/tos/platforms/exp430/platform_message.h b/tos/platforms/exp430/platform_message.h index 305541c09f..c5885c4d80 100644 --- a/tos/platforms/exp430/platform_message.h +++ b/tos/platforms/exp430/platform_message.h @@ -1,36 +1,31 @@ -/* - * Copyright (c) 2005 The Regents of the University of California. - * Copyright (c) 2002-2005 Intel Corporation + +/* $Id$ + * "Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. */ /** @@ -38,22 +33,27 @@ * chip-specific CC1000 packet structures. * * @author Philip Levis + * @version $Revision$ $Date$ */ + #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H -//#include +#include #include typedef union message_header { + blaze_header_t blaze; serial_header_t serial; } message_header_t; typedef union TOSRadioFooter { + blaze_footer_t blaze; } message_footer_t; typedef union TOSRadioMetadata { + blaze_metadata_t blaze; } message_metadata_t; #endif From 6271da7b9c67497cd56bdaf61967f8fd83fabe6f Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 10 Jul 2013 15:07:03 -0500 Subject: [PATCH 359/411] Put all parameters for the CC1101 in one header file The CC1100.h file now contains only settings for 433 MHz option. Baud rates can be selected by setting CC1100_BAUD to one of 10 options. --- .../ccxx00_single/radios/cc1100/CC1100.h | 820 +++++++++++++++--- 1 file changed, 694 insertions(+), 126 deletions(-) diff --git a/tos/chips/ccxx00_single/radios/cc1100/CC1100.h b/tos/chips/ccxx00_single/radios/cc1100/CC1100.h index 41a89ac145..ebde911821 100644 --- a/tos/chips/ccxx00_single/radios/cc1100/CC1100.h +++ b/tos/chips/ccxx00_single/radios/cc1100/CC1100.h @@ -51,11 +51,6 @@ enum { CC1100_RADIO_ID = unique( UQ_BLAZE_RADIO ), }; -/** SLOW THINGS DOWN FOR THIS DATA RATE */ -#define TRANSMITTER_QUALITY_THRESHOLD 200 -#define BLAZE_MIN_INITIAL_BACKOFF 5000 -#define BLAZE_MIN_BACKOFF 500 -#define BLAZE_BACKOFF_PERIOD 100 /** @@ -76,6 +71,21 @@ enum { #define CC1100_MATCHING_NETWORK CC1100_433_MHZ #endif +#define CC1100_1_2K 1 +#define CC1100_2_4K 2 +#define CC1100_10K 3 +#define CC1100_26K 4 +#define CC1100_38_4K 5 +#define CC1100_76_8K 6 +#define CC1100_100K 7 +#define CC1100_150K 8 +#define CC1100_250K 9 +#define CC1100_500K 10 + +#ifndef CC1100_BAUD +#define CC1100_BAUD CC1100_250K +#endif + /** * All default channels and FREQx registers obtained from SmartRF studio. We @@ -118,49 +128,7 @@ enum { */ -#if (CC1100_MATCHING_NETWORK == CC1100_315_MHZ) -/***************** 315 Matching Network ****************/ - -// Default channel is at 317.996490 MHz -#ifndef CC1100_DEFAULT_CHANNEL -#define CC1100_DEFAULT_CHANNEL 100 -#endif - -#ifndef CC1100_CHANNEL_MIN -#define CC1100_CHANNEL_MIN 0 -#endif - -#ifndef CC1100_CHANNEL_MAX -#define CC1100_CHANNEL_MAX 240 -#endif - -enum { - CC1100_LOWEST_FREQ = 300998, // kHz - CC1100_DEFAULT_FREQ2 = 0x0B, - CC1100_DEFAULT_FREQ1 = 0x93, - CC1100_DEFAULT_FREQ0 = 0xB1, -}; - -/** - * These values calculated using TI smart RF studio - */ -enum{ - CC1100_PA_PLUS_10 = 0xC0, - CC1100_PA_PLUS_5 = 0x85, - CC1100_PA_PLUS_0 = 0x60, - CC1100_PA_MINUS_5 = 0x57, - CC1100_PA_MINUS_10 = 0x26, - CC1100_PA_MINUS_15 = 0x1C, - CC1100_PA_MINUS_20 = 0x0D, - CC1100_PA_MINUS_30 = 0x12, -}; - -#ifndef CC1100_PA -#define CC1100_PA CC1100_PA_PLUS_10 -#endif - -#elif (CC1100_MATCHING_NETWORK == CC1100_433_MHZ) /***************** 433 MHz Matching Network ****************/ // Default channel is at 433.191833 MHz @@ -195,94 +163,176 @@ enum{ }; #ifndef CC1100_PA -#define CC1100_PA CC1100_PA_PLUS_10 -#endif - - -#elif (CC1100_MATCHING_NETWORK == CC1100_868_MHZ) -/***************** 868 MHz Matching Network ****************/ - -// Default channel is at 868.192749 MHz -#ifndef CC1100_DEFAULT_CHANNEL -#define CC1100_DEFAULT_CHANNEL 141 -#endif - -#ifndef CC1100_CHANNEL_MIN -#define CC1100_CHANNEL_MIN 0 -#endif - -#ifndef CC1100_CHANNEL_MAX -#define CC1100_CHANNEL_MAX 255 +#define CC1100_PA CC1100_PA_PLUS_0 #endif -enum { - CC1100_LOWEST_FREQ = 839998, - CC1100_DEFAULT_FREQ2 = 0x20, - CC1100_DEFAULT_FREQ1 = 0x4E, - CC1100_DEFAULT_FREQ0 = 0xC4, -}; -/** - * These values calculated using TI smart RF studio +/** + * These are used for calculating channels at runtime */ -enum{ - CC1100_PA_PLUS_10 = 0xC3, - CC1100_PA_PLUS_5 = 0x85, - CC1100_PA_PLUS_0 = 0x8E, - CC1100_PA_MINUS_5 = 0x57, - CC1100_PA_MINUS_10 = 0x34, -}; - -#ifndef CC1100_PA -#define CC1100_PA CC1100_PA_PLUS_10 -#endif - - -#else -/***************** 915 MHz Matching Network ****************/ - -// Default channel is at 914.996796 MHz -#ifndef CC1100_DEFAULT_CHANNEL -#define CC1100_DEFAULT_CHANNEL 65 -#endif - -#ifndef CC1100_CHANNEL_MIN -#define CC1100_CHANNEL_MIN 0 -#endif - -#ifndef CC1100_CHANNEL_MAX -#define CC1100_CHANNEL_MAX 135 -#endif +#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit -enum { - CC1100_LOWEST_FREQ = 901998, - CC1100_DEFAULT_FREQ2 = 0x22, - CC1100_DEFAULT_FREQ1 = 0xB1, - CC1100_DEFAULT_FREQ0 = 0x3B, -}; +/** SLOW THINGS DOWN FOR THIS DATA RATE */ +#define TRANSMITTER_QUALITY_THRESHOLD 200 +#define BLAZE_MIN_INITIAL_BACKOFF 5000 +#define BLAZE_MIN_BACKOFF 500 +#define BLAZE_BACKOFF_PERIOD 100 -/** - * These values calculated using TI smart RF studio - */ -enum{ - CC1100_PA_PLUS_10 = 0xC0, - CC1100_PA_PLUS_5 = 0x85, - CC1100_PA_PLUS_0 = 0x8E, - CC1100_PA_MINUS_5 = 0x57, - CC1100_PA_MINUS_10 = 0x26, -}; +#if (CC1100_BAUD == CC1100_1_2K) -#ifndef CC1100_PA -#define CC1100_PA CC1100_PA_PLUS_10 -#endif +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xF5, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x03, // 0x03 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x15, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; // end 1.2 +#elif (CC1100_BAUD == CC1100_2_4K) -#endif +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xF5, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x03, // 0x03 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x15, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; // end 2.4 -/** - * These are used for calculating channels at runtime - */ -#define CC1100_CHANNEL_WIDTH 199 // kHz : Do not edit +#elif (CC1100_BAUD == CC1100_10K) enum CC1100_config_reg_state_enums { /** GDO2 is CHIP_RDY, even when the chip is first powered */ @@ -359,8 +409,526 @@ enum CC1100_config_reg_state_enums { CC1100_CONFIG_TEST1 = 0x35, CC1100_CONFIG_TEST0 = 0x0B, -}; +}; // end 10k baud + +#elif (CC1100_BAUD == CC1100_26K) +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts at the end of a received packet */ + CC1100_CONFIG_IOCFG0 = 0x01, + + /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ + CC1100_CONFIG_FIFOTHR = 0x0F, + + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xFA, + CC1100_CONFIG_MDMCFG3 = 0x06, + CC1100_CONFIG_MDMCFG2 = 0x73, + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x00, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x09, + +}; // end 26 + +#elif (CC1100_BAUD == CC1100_38_4K) + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0xCA, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester / 0x0B = with manch. + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x34, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x16, + CC1100_CONFIG_BSCFG = 0x6C, + CC1100_CONFIG_AGCTRL2 = 0x43, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0x91, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0x56, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xE9, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; // end 38.4 + +#elif (CC1100_BAUD == CC1100_76_8K) + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0x7B, + CC1100_CONFIG_MDMCFG3 = 0x83, + CC1100_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester / 0x0B = with manch. + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x42, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x1D, + CC1100_CONFIG_BSCFG = 0x1C, + CC1100_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0xB2, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0xB6, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xEA, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; // end 76.8 + +#elif (CC1100_BAUD == CC1100_100K) + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x06, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0x5B, + CC1100_CONFIG_MDMCFG3 = 0xF8, + CC1100_CONFIG_MDMCFG2 = 0x1B, // 0x13 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x47, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x1D, + CC1100_CONFIG_BSCFG = 0x1C, + CC1100_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0xB2, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0xB6, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xEA, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x81, + CC1100_CONFIG_TEST1 = 0x35, + CC1100_CONFIG_TEST0 = 0x0B, + +}; // end 100 + +#elif (CC1100_BAUD == CC1100_150K) + +enum CC1100_config_reg_state_enums { + CC1100_CONFIG_IOCFG2 = 0x29, // 0x00, GDO2 Output Pin Config + CC1100_CONFIG_IOCFG1 = 0x2E, // 0x01, GDO1 Output Pin Config + CC1100_CONFIG_IOCFG0 = 0x01, // 0x02, GDO0 Output Pin Config + CC1100_CONFIG_FIFOTHR = 0x0F, // 0x03, RX FIFO and TX FIFO Thresholds + CC1100_CONFIG_SYNC1 = 0xD3, // 0x04, Sync Word, High Byte + CC1100_CONFIG_SYNC0 = 0x91, // 0x05, Sync Word, Low Byte + CC1100_CONFIG_PKTLEN = 0x3D, // 0x06, Packet Length + CC1100_CONFIG_PKTCTRL1 = 0x24, // 0x07, Packet Automation Control + CC1100_CONFIG_PKTCTRL0 = 0x45, // 0x08, Packet Automation Control + CC1100_CONFIG_ADDR = 0x00, // 0x09, Device Address + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, // 0x0A, Channel Number + CC1100_CONFIG_FSCTRL1 = 0x0E, // 0x0B, Frequency Synthesizer Control + CC1100_CONFIG_FSCTRL0 = 0x00, // 0x0C, Frequency Synthesizer Control + CC1100_CONFIG_FREQ2 = 0x0F, // 0x0D, Frequency Control Word, High + CC1100_CONFIG_FREQ1 = 0x6C, // 0x0E, Frequency Control Word, Middle + CC1100_CONFIG_FREQ0 = 0x4E, // 0x0F, Frequency Control Word, Low + CC1100_CONFIG_MDMCFG4 = 0x0C, // 0x10, Modem Config + CC1100_CONFIG_MDMCFG3 = 0x3B, // 0x11, Modem Config + CC1100_CONFIG_MDMCFG2 = 0x73, // 0x12, Modem Config + CC1100_CONFIG_MDMCFG1 = 0x42, // 0x13, Modem Config + CC1100_CONFIG_MDMCFG0 = 0xF8, // 0x14, Modem Config + CC1100_CONFIG_DEVIATN = 0x00, // 0x15, Modem Deviation Setting + CC1100_CONFIG_MCSM2 = 0x07, // 0x16, Main Radio Control State Machine Config + CC1100_CONFIG_MCSM1 = 0x3F, // 0x17, Main Radio Control State Machine Config + CC1100_CONFIG_MCSM0 = 0x18, // 0x18, Main Radio Control State Machine Config + CC1100_CONFIG_FOCCFG = 0x1D, // 0x19, Frequency Offset Compensation Config + CC1100_CONFIG_BSCFG = 0x1C, // 0x1A, Bit Sync Config + CC1100_CONFIG_AGCTRL2 = 0xC7, // 0x1B, AGC Control + CC1100_CONFIG_AGCTRL1 = 0x00, // 0x1C, AGC Control + CC1100_CONFIG_AGCTRL0 = 0xB0, // 0x1D, AGC Control + CC1100_CONFIG_WOREVT1 = 0x87, // 0x1E, High Byte Event0 Timeout + CC1100_CONFIG_WOREVT0 = 0x6B, // 0x1F, Low Byte Event0 Timeout + CC1100_CONFIG_WORCTRL = 0xF8, // 0x20, Wake On Radio Control + CC1100_CONFIG_FREND1 = 0xB6, // 0x21, Front End RX Config + CC1100_CONFIG_FREND0 = 0x10, // 0x22, Front End TX Config + CC1100_CONFIG_FSCAL3 = 0xEA, // 0x23, Frequency Synthesizer Calibration + CC1100_CONFIG_FSCAL2 = 0x2A, // 0x24, Frequency Synthesizer Calibration + CC1100_CONFIG_FSCAL1 = 0x00, // 0x25, Frequency Synthesizer Calibration + CC1100_CONFIG_FSCAL0 = 0x1F, // 0x26, Frequency Synthesizer Calibration + CC1100_CONFIG_RCCTRL1 = 0x41, // 0x27, RC Oscillator Config + CC1100_CONFIG_RCCTRL0 = 0x00, // 0x28, RC Oscillator Config + CC1100_CONFIG_FSTEST = 0x59, // 0x29, Frequency Synthesizer Calibration Control + CC1100_CONFIG_PTEST = 0x7F, // 0x2A, Production Test + CC1100_CONFIG_AGCTST = 0x3F, // 0x2B, AGC Test + CC1100_CONFIG_TEST2 = 0x88, // 0x2D, Varoius Test Setting + CC1100_CONFIG_TEST1 = 0x31, // 0x2E, Varoius Test Setting + CC1100_CONFIG_TEST0 = 0x0B // 0x2F, Varoius Test Setting +}; // end 150 + +#elif (CC1100_BAUD == CC1100_250K) + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x0C, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0x2D, + CC1100_CONFIG_MDMCFG3 = 0x3B, + CC1100_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester + CC1100_CONFIG_MDMCFG1 = 0x22, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x62, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x1D, + CC1100_CONFIG_BSCFG = 0x1C, + CC1100_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0xB0, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0xB6, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xEA, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x88, + CC1100_CONFIG_TEST1 = 0x31, + CC1100_CONFIG_TEST0 = 0x0B, + +}; // end 250 + +#elif (CC1100_BAUD == CC1100_500K) + +enum CC1100_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1100_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1100_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1100_CONFIG_IOCFG0 = 0x01, + + CC1100_CONFIG_FIFOTHR = 0x0F, + CC1100_CONFIG_SYNC1 = 0xD3, + CC1100_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1100_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1100_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1100_CONFIG_PKTCTRL0 = 0x45, + + CC1100_CONFIG_ADDR = 0x00, + + CC1100_CONFIG_CHANNR = CC1100_DEFAULT_CHANNEL, + + CC1100_CONFIG_FSCTRL1 = 0x0E, + CC1100_CONFIG_FSCTRL0 = 0x00, + + CC1100_CONFIG_FREQ2 = CC1100_DEFAULT_FREQ2, + CC1100_CONFIG_FREQ1 = CC1100_DEFAULT_FREQ1, + CC1100_CONFIG_FREQ0 = CC1100_DEFAULT_FREQ0, + + CC1100_CONFIG_MDMCFG4 = 0x0E, + CC1100_CONFIG_MDMCFG3 = 0x3B, + CC1100_CONFIG_MDMCFG2 = 0x73, + CC1100_CONFIG_MDMCFG1 = 0x42, + CC1100_CONFIG_MDMCFG0 = 0xF8, + CC1100_CONFIG_DEVIATN = 0x00, + CC1100_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1100_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1100_CONFIG_MCSM0 = 0x18, + + CC1100_CONFIG_FOCCFG = 0x1D, + CC1100_CONFIG_BSCFG = 0x1C, + CC1100_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1100_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1100_CONFIG_AGCTRL0 = 0xB0, + + CC1100_CONFIG_WOREVT1 = 0x87, + CC1100_CONFIG_WOREVT0 = 0x6B, + CC1100_CONFIG_WORCTRL = 0xF8, + CC1100_CONFIG_FREND1 = 0xB6, + CC1100_CONFIG_FREND0 = 0x10, + CC1100_CONFIG_FSCAL3 = 0xEA, + CC1100_CONFIG_FSCAL2 = 0x2A, + CC1100_CONFIG_FSCAL1 = 0x00, + CC1100_CONFIG_FSCAL0 = 0x1F, + + CC1100_CONFIG_RCCTRL1 = 0x41, + CC1100_CONFIG_RCCTRL0 = 0x00, + CC1100_CONFIG_FSTEST = 0x59, + CC1100_CONFIG_PTEST = 0x7F, + CC1100_CONFIG_AGCTST = 0x3F, + CC1100_CONFIG_TEST2 = 0x88, + CC1100_CONFIG_TEST1 = 0x31, + CC1100_CONFIG_TEST0 = 0x0B, + +}; +#else +#error "Baud rate not defined" +#endif #ifndef CCXX00_RADIO_DEFINED #define CCXX00_RADIO_DEFINED From 9a582e25871271e9d7869e1fbc805ae7f125dd1c Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 12 Jul 2013 11:44:53 -0500 Subject: [PATCH 360/411] Added initial files for rfxlink based cc1101 radio stack --- tos/chips/cc1101/CC1101ActiveMessageC.nc | 105 ++ tos/chips/cc1101/CC1101DriverConfig.nc | 56 + tos/chips/cc1101/CC1101DriverLayer.h | 230 ++++ tos/chips/cc1101/CC1101DriverLayerC.nc | 140 ++ tos/chips/cc1101/CC1101DriverLayerP.nc | 1408 ++++++++++++++++++++ tos/chips/cc1101/CC1101Radio.h | 68 + tos/chips/cc1101/CC1101RadioC.nc | 284 ++++ tos/chips/cc1101/CC1101RadioP.nc | 338 +++++ tos/chips/cc1101/CC1101TimeSyncMessageC.nc | 76 ++ tos/chips/cc1101/README.txt | 1 + 10 files changed, 2706 insertions(+) create mode 100644 tos/chips/cc1101/CC1101ActiveMessageC.nc create mode 100644 tos/chips/cc1101/CC1101DriverConfig.nc create mode 100644 tos/chips/cc1101/CC1101DriverLayer.h create mode 100644 tos/chips/cc1101/CC1101DriverLayerC.nc create mode 100644 tos/chips/cc1101/CC1101DriverLayerP.nc create mode 100644 tos/chips/cc1101/CC1101Radio.h create mode 100644 tos/chips/cc1101/CC1101RadioC.nc create mode 100644 tos/chips/cc1101/CC1101RadioP.nc create mode 100644 tos/chips/cc1101/CC1101TimeSyncMessageC.nc create mode 100644 tos/chips/cc1101/README.txt diff --git a/tos/chips/cc1101/CC1101ActiveMessageC.nc b/tos/chips/cc1101/CC1101ActiveMessageC.nc new file mode 100644 index 0000000000..926065bf90 --- /dev/null +++ b/tos/chips/cc1101/CC1101ActiveMessageC.nc @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai, Miklos Maroti + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +#include + +#ifdef IEEE154FRAMES_ENABLED +#error "You cannot use CC1101ActiveMessageC with IEEE154FRAMES_ENABLED defined" +#endif + +configuration CC1101ActiveMessageC +{ + provides + { + interface SplitControl; + + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface SendNotifier[am_id_t id]; + + // for TOSThreads + interface Receive as ReceiveDefault[am_id_t id]; + interface Receive as SnoopDefault[am_id_t id]; + + interface Packet; + interface AMPacket; + + interface PacketAcknowledgements; + interface LowPowerListening; + interface PacketLink; + + interface RadioChannel; + + interface PacketField as PacketLinkQuality; + interface PacketField as PacketTransmitPower; + interface PacketField as PacketRSSI; + interface LinkPacketMetadata; + + interface LocalTime as LocalTimeRadio; + interface PacketTimeStamp as PacketTimeStampRadio; + interface PacketTimeStamp as PacketTimeStampMilli; + + interface PacketTimeStamp as PacketTimeStamp32khz; + } + + uses + { + interface PacketTimeStamp as UnimplementedPacketTimeStamp32khz; + } +} + +implementation +{ + components CC1101RadioC as RadioC; + + SplitControl = RadioC; + + AMSend = RadioC; + Receive = RadioC.Receive; + Snoop = RadioC.Snoop; + SendNotifier = RadioC; + + ReceiveDefault = RadioC.ReceiveDefault; + SnoopDefault = RadioC.SnoopDefault; + + Packet = RadioC.PacketForActiveMessage; + AMPacket = RadioC; + + PacketAcknowledgements = RadioC; + LowPowerListening = RadioC; + PacketLink = RadioC; + RadioChannel = RadioC; + + PacketLinkQuality = RadioC.PacketLinkQuality; + PacketTransmitPower = RadioC.PacketTransmitPower; + PacketRSSI = RadioC.PacketRSSI; + LinkPacketMetadata = RadioC; + + LocalTimeRadio = RadioC; + PacketTimeStampMilli = RadioC; + PacketTimeStampRadio = RadioC; + + PacketTimeStamp32khz = UnimplementedPacketTimeStamp32khz; +} diff --git a/tos/chips/cc1101/CC1101DriverConfig.nc b/tos/chips/cc1101/CC1101DriverConfig.nc new file mode 100644 index 0000000000..065fcaec47 --- /dev/null +++ b/tos/chips/cc1101/CC1101DriverConfig.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai, Miklos Maroti + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +interface CC1101DriverConfig +{ + /** + * Returns the length of a dummy header to align the payload properly. + */ + async command uint8_t headerLength(message_t* msg); + + /** + * Returns the maximum length of the PHY payload including the + * length field but not counting the FCF field. + */ + async command uint8_t maxPayloadLength(); + + /** + * Returns the length of a dummy metadata section to align the + * metadata section properly. + */ + async command uint8_t metadataLength(message_t* msg); + + /** + * Gets the number of bytes we should read before the RadioReceive.header + * event is fired. If the length of the packet is less than this amount, + * then that event is fired earlier. The header length must be at least one. + */ + async command uint8_t headerPreloadLength(); + + /** + * Returns TRUE if before sending this message we should make sure that + * the channel is clear via a very basic (and quick) RSSI check. + */ + async command bool requiresRssiCca(message_t* msg); +} diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h new file mode 100644 index 0000000000..887b7a9673 --- /dev/null +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -0,0 +1,230 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +#ifndef __CC1101DRIVERLAYER_H__ +#define __CC1101DRIVERLAYER_H__ + + +typedef nx_struct cc1101_header_t +{ + nxle_uint8_t length; +} cc1101_header_t; + +typedef struct cc1101_metadata_t +{ + uint8_t lqi; + union + { + uint8_t power; + uint8_t rssi; + }; +} cc1101_metadata_t; + +enum cc1101_timing_enums { + CC1101_SYMBOL_TIME = 16, // 16us + IDLE_2_RX_ON_TIME = 12 * CC1101_SYMBOL_TIME, + PD_2_IDLE_TIME = 860, // .86ms + STROBE_TO_TX_ON_TIME = 12 * CC1101_SYMBOL_TIME, + // TX SFD delay is computed as follows: + // a.) STROBE_TO_TX_ON_TIME is required for preamble transmission to + // start after TX strobe is issued + // b.) the SFD byte is the 5th byte transmitted (10 symbol periods) + // c.) there's approximately a 25us delay between the strobe and reading + // the timer register + TX_SFD_DELAY = STROBE_TO_TX_ON_TIME + 10 * CC1101_SYMBOL_TIME - 25, + // TX SFD is captured in hardware + RX_SFD_DELAY = 0, +}; + +enum cc1101_reg_access_enums { + CC1101_CMD_REGISTER_MASK = 0x3f, + CC1101_CMD_REGISTER_READ = 0x40, + CC1101_CMD_REGISTER_WRITE = 0x00, + CC1101_CMD_TXRAM_WRITE = 0x80, +}; + +typedef union cc1101_status { + uint16_t value; + struct { + unsigned reserved0:1; + unsigned rssi_valid:1; + unsigned lock:1; + unsigned tx_active:1; + + unsigned enc_busy:1; + unsigned tx_underflow:1; + unsigned xosc16m_stable:1; + unsigned reserved7:1; + }; +} cc1101_status_t; + +typedef union cc1101_iocfg0 { + uint16_t value; + struct { + unsigned fifop_thr:7; + unsigned cca_polarity:1; + unsigned sfd_polarity:1; + unsigned fifop_polarity:1; + unsigned fifo_polarity:1; + unsigned bcn_accept:1; + unsigned reserved:4; // write as 0 + } f; +} cc1101_iocfg0_t; + +// TODO: make sure that we avoid wasting RAM +static const cc1101_iocfg0_t cc1101_iocfg0_default = {.f.fifop_thr = 64, .f.cca_polarity = 0, .f.sfd_polarity = 0, .f.fifop_polarity = 0, .f.fifo_polarity = 0, .f.bcn_accept = 0, .f.reserved = 0}; + +typedef union cc1101_iocfg1 { + uint16_t value; + struct { + unsigned ccamux:5; + unsigned sfdmux:5; + unsigned hssd_src:3; + unsigned reserved:3; // write as 0 + } f; +} cc1101_iocfg1_t; + +static const cc1101_iocfg1_t cc1101_iocfg1_default = {.value = 0}; + +typedef union cc1101_fsctrl { + uint16_t value; + struct { + unsigned freq:10; + unsigned lock_status:1; + unsigned lock_length:1; + unsigned cal_running:1; + unsigned cal_done:1; + unsigned lock_thr:2; + } f; +} cc1101_fsctrl_t; + +static const cc1101_fsctrl_t cc1101_fsctrl_default = {.f.lock_thr = 1, .f.freq = 357, .f.lock_status = 0, .f.lock_length = 0, .f.cal_running = 0, .f.cal_done = 0}; + +typedef union cc1101_mdmctrl0 { + uint16_t value; + struct { + unsigned preamble_length:4; + unsigned autoack:1; + unsigned autocrc:1; + unsigned cca_mode:2; + unsigned cca_hyst:3; + unsigned adr_decode:1; + unsigned pan_coordinator:1; + unsigned reserved_frame_mode:1; + unsigned reserved:2; + } f; +} cc1101_mdmctrl0_t; + +static const cc1101_mdmctrl0_t cc1101_mdmctrl0_default = {.f.preamble_length = 2, .f.autocrc = 1, .f.cca_mode = 3, .f.cca_hyst = 2, .f.adr_decode = 1}; + +typedef union cc1101_txctrl { + uint16_t value; + struct { + unsigned pa_level:5; + unsigned reserved:1; + unsigned pa_current:3; + unsigned txmix_current:2; + unsigned txmix_caparray:2; + unsigned tx_turnaround:1; + unsigned txmixbuf_cur:2; + } f; +} cc1101_txctrl_t; + +static const cc1101_txctrl_t cc1101_txctrl_default = {.f.pa_level = 31, .f.reserved = 1, .f.pa_current = 3, .f.tx_turnaround = 1, .f.txmixbuf_cur = 2}; + + +#ifndef CC1101_DEF_CHANNEL +#define CC1101_DEF_CHANNEL 11 +#endif + +#ifndef CC1101_DEF_RFPOWER +#define CC1101_DEF_RFPOWER 31 +#endif + +enum { + CC1101_TX_PWR_MASK = 0x1f, + CC1101_CHANNEL_MASK = 0x1f, +}; + +enum cc1101_config_reg_enums { + CC1101_SRES = 0x30, + CC1101_SNOP = 0x3d, + //---------------------- not modified after copying ---- + CC1101_SXOSCON = 0x01, + CC1101_STXCAL = 0x02, + CC1101_SRXON = 0x03, + CC1101_STXON = 0x04, + CC1101_STXONCCA = 0x05, + CC1101_SRFOFF = 0x06, + CC1101_SXOSCOFF = 0x07, + CC1101_SFLUSHRX = 0x08, + CC1101_SFLUSHTX = 0x09, + CC1101_SACK = 0x0a, + CC1101_SACKPEND = 0x0b, + CC1101_SRXDEC = 0x0c, + CC1101_STXENC = 0x0d, + CC1101_SAES = 0x0e, + CC1101_MAIN = 0x10, + CC1101_MDMCTRL0 = 0x11, + CC1101_MDMCTRL1 = 0x12, + CC1101_RSSI = 0x13, + CC1101_SYNCWORD = 0x14, + CC1101_TXCTRL = 0x15, + CC1101_RXCTRL0 = 0x16, + CC1101_RXCTRL1 = 0x17, + CC1101_FSCTRL = 0x18, + CC1101_SECCTRL0 = 0x19, + CC1101_SECCTRL1 = 0x1a, + CC1101_BATTMON = 0x1b, + CC1101_IOCFG0 = 0x1c, + CC1101_IOCFG1 = 0x1d, + CC1101_MANFIDL = 0x1e, + CC1101_MANFIDH = 0x1f, + CC1101_FSMTC = 0x20, + CC1101_MANAND = 0x21, + CC1101_MANOR = 0x22, + CC1101_AGCCTRL = 0x23, + CC1101_AGCTST0 = 0x24, + CC1101_AGCTST1 = 0x25, + CC1101_AGCTST2 = 0x26, + CC1101_FSTST0 = 0x27, + CC1101_FSTST1 = 0x28, + CC1101_FSTST2 = 0x29, + CC1101_FSTST3 = 0x2a, + CC1101_RXBPFTST = 0x2b, + CC1101_FSMSTATE = 0x2c, + CC1101_ADCTST = 0x2d, + CC1101_DACTST = 0x2e, + CC1101_TOPTST = 0x2f, + CC1101_TXFIFO = 0x3e, + CC1101_RXFIFO = 0x3f, +}; + +// CC1101 Initial Configuration + +uint8_t cc1101_init_config[] { + +} + +#endif // __CC1101DRIVERLAYER_H__ diff --git a/tos/chips/cc1101/CC1101DriverLayerC.nc b/tos/chips/cc1101/CC1101DriverLayerC.nc new file mode 100644 index 0000000000..cc5723003d --- /dev/null +++ b/tos/chips/cc1101/CC1101DriverLayerC.nc @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai, Miklos Maroti + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +#include +#include + +configuration CC1101DriverLayerC +{ + provides + { + interface RadioState; + interface RadioSend; + interface RadioReceive; + interface RadioCCA; + interface RadioPacket; + + interface PacketField as PacketTransmitPower; + interface PacketField as PacketRSSI; + interface PacketField as PacketTimeSyncOffset; + interface PacketField as PacketLinkQuality; + interface LinkPacketMetadata; + + interface LocalTime as LocalTimeRadio; + interface Alarm; + } + + uses + { + interface CC1101DriverConfig as Config; + interface PacketTimeStamp; + + interface PacketFlag as TransmitPowerFlag; + interface PacketFlag as RSSIFlag; + interface PacketFlag as TimeSyncFlag; + interface RadioAlarm; + } +} + +implementation +{ + components CC1101DriverLayerP as DriverLayerP, + BusyWaitMicroC, + TaskletC, + MainC, + HplCC1101C as HplC; + + MainC.SoftwareInit -> DriverLayerP.SoftwareInit; + MainC.SoftwareInit -> HplC.Init; + + RadioState = DriverLayerP; + RadioSend = DriverLayerP; + RadioReceive = DriverLayerP; + RadioCCA = DriverLayerP; + RadioPacket = DriverLayerP; + + LocalTimeRadio = HplC; + Config = DriverLayerP; + + DriverLayerP.CSN -> HplC.CSN; + DriverLayerP.GDO0 -> HplC.GDO0; + DriverLayerP.GDO2 -> HplC.GDO2; + + PacketTransmitPower = DriverLayerP.PacketTransmitPower; + TransmitPowerFlag = DriverLayerP.TransmitPowerFlag; + + PacketRSSI = DriverLayerP.PacketRSSI; + RSSIFlag = DriverLayerP.RSSIFlag; + + PacketTimeSyncOffset = DriverLayerP.PacketTimeSyncOffset; + TimeSyncFlag = DriverLayerP.TimeSyncFlag; + + PacketLinkQuality = DriverLayerP.PacketLinkQuality; + PacketTimeStamp = DriverLayerP.PacketTimeStamp; + LinkPacketMetadata = DriverLayerP; + + Alarm = HplC.Alarm; + RadioAlarm = DriverLayerP.RadioAlarm; + + DriverLayerP.SpiResource -> HplC.SpiResource; + DriverLayerP.FastSpiByte -> HplC; + + DriverLayerP.GDO0Capture -> HplC; + + DriverLayerP.Tasklet -> TaskletC; + DriverLayerP.BusyWait -> BusyWaitMicroC; + + DriverLayerP.LocalTime-> HplC.LocalTimeRadio; + +#ifdef RADIO_DEBUG + components DiagMsgC; + DriverLayerP.DiagMsg -> DiagMsgC; +#endif + +#ifdef PPPSNIFFER + /* Serial stack */ + components PppDaemonC; + DriverLayerP.PppSplitControl -> PppDaemonC; + +#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) + components PlatformHdlcUartC as HdlcUartC; +#else + components DefaultHdlcUartC as HdlcUartC; +#endif + PppDaemonC.HdlcUart -> HdlcUartC; + PppDaemonC.UartControl -> HdlcUartC; + + /* Link in RFC5072 support for both the control and network protocols */ + components PppIpv6C; + PppDaemonC.PppProtocol[PppIpv6C.ControlProtocol] -> PppIpv6C.PppControlProtocol; + PppDaemonC.PppProtocol[PppIpv6C.Protocol] -> PppIpv6C.PppProtocol; + PppIpv6C.Ppp -> PppDaemonC; + PppIpv6C.LowerLcpAutomaton -> PppDaemonC; + DriverLayerP.Ipv6LcpAutomaton -> PppIpv6C; + DriverLayerP.PppIpv6 -> PppIpv6C; +#endif + + components LedsC; + DriverLayerP.Leds -> LedsC; +} diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc new file mode 100644 index 0000000000..4b56ba612f --- /dev/null +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -0,0 +1,1408 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +#include +#include +#include +#include +#include +module CC1101DriverLayerP +{ + provides + { + interface Init as SoftwareInit @exactlyonce(); + + interface RadioState; + interface RadioSend; + interface RadioReceive; + interface RadioCCA; + interface RadioPacket; + + interface PacketField as PacketTransmitPower; + interface PacketField as PacketRSSI; + interface PacketField as PacketTimeSyncOffset; + interface PacketField as PacketLinkQuality; + interface LinkPacketMetadata; + } + + uses + { + interface Resource as SpiResource; + interface BusyWait; + interface LocalTime; + interface CC1101DriverConfig as Config; + + interface SpiByte; + interface GeneralIO as CSN; + interface GeneralIO as GDO0; + interface GeneralIO as GDO2; + interface GpioCapture as GDO0Capture; + + interface PacketFlag as TransmitPowerFlag; + interface PacketFlag as RSSIFlag; + interface PacketFlag as TimeSyncFlag; + + interface PacketTimeStamp; + + interface Tasklet; + interface RadioAlarm; + +#ifdef RADIO_DEBUG + interface DiagMsg; +#endif + //for apps/PPPSniffer: +#ifdef PPPSNIFFER + interface SplitControl as PppSplitControl; + interface LcpAutomaton as Ipv6LcpAutomaton; + interface PppIpv6; +#endif + interface Leds; + } +} + +implementation +{ + cc1101_header_t* getHeader(message_t* msg) + { + return ((void*)msg) + call Config.headerLength(msg); + } + + void* getPayload(message_t* msg) + { + return ((void*)msg); + } + + cc1101_metadata_t* getMeta(message_t* msg) + { + return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); + } + + /*----------------- STATE -----------------*/ + + enum + { + STATE_POR = 0, + STATE_PD = 1, + STATE_PD_2_IDLE = 2, + STATE_IDLE = 3, + STATE_IDLE_2_RX_ON = 4, + STATE_RX_ON = 5, + STATE_BUSY_TX_2_RX_ON = 6, + STATE_IDLE_2_TX_ON = 7, + STATE_TX_ON = 8, + STATE_RX_DOWNLOAD = 9, + }; + norace uint8_t state = STATE_POR; + + enum + { + CMD_NONE = 0, // the state machine has stopped + CMD_TURNOFF = 1, // goto SLEEP state + CMD_STANDBY = 2, // goto TRX_OFF state + CMD_TURNON = 3, // goto RX_ON state + CMD_TRANSMIT = 4, // currently transmitting a message + CMD_RECEIVE = 5, // currently receiving a message + CMD_CCA = 6, // performing clear chanel assesment + CMD_CHANNEL = 7, // changing the channel + CMD_SIGNAL_DONE = 8, // signal the end of the state transition + CMD_DOWNLOAD = 9, // download the received message + }; + tasklet_norace uint8_t cmd = CMD_NONE; + + //for apps/PPPSniffer +#ifdef PPPSNIFFER + enum { + PPP_QUEUE_LEN = 10, + }; + + message_t pppQueueBufs[PPP_QUEUE_LEN]; + message_t *pppQueue[PPP_QUEUE_LEN]; + uint8_t pppIn, pppOut; + bool pppBusy, pppFull; + +#endif + + // flag: RX SFD was captured, but not yet processed + norace bool rxSfd = 0; + // flag: end of TX event (falling SFD edge) was captured, but not yet processed + norace bool txEnd = 0; + + tasklet_norace uint8_t txPower; + tasklet_norace uint8_t channel; + + tasklet_norace message_t* rxMsg; +#ifdef RADIO_DEBUG_MESSAGES + tasklet_norace message_t* txMsg; +#endif + message_t rxMsgBuffer; + + norace uint16_t capturedTime; // time when the last SFD rising edge was captured + + inline cc1101_status_t getStatus(); + inline cc1101_status_t enableReceiveSfd(); + + /*----------------- ALARM -----------------*/ + tasklet_async event void RadioAlarm.fired() + { + if( state == STATE_PD_2_IDLE ) { + state = STATE_IDLE; + if( cmd == CMD_STANDBY ) + cmd = CMD_SIGNAL_DONE; + } + else if( state == STATE_IDLE_2_RX_ON ) { + state = STATE_RX_ON; + cmd = CMD_SIGNAL_DONE; + // in receive mode, enable SFD capture + RADIO_ASSERT(call SFD.get() == 0); + enableReceiveSfd(); + } + else + RADIO_ASSERT(FALSE); + + // make sure the rest of the command processing is called + call Tasklet.schedule(); + } + + /*----------------- REGISTER -----------------*/ + + inline uint16_t readRegister(uint8_t reg) + { + uint16_t value = 0; + + RADIO_ASSERT( call SpiResource.isOwner() ); + RADIO_ASSERT( reg == (reg & CC1101_CMD_REGISTER_MASK) ); + + call CSN.set(); + call CSN.clr(); + + call FastSpiByte.splitWrite(CC1101_CMD_REGISTER_READ | reg); + call FastSpiByte.splitReadWrite(0); + value = ((uint16_t)call FastSpiByte.splitReadWrite(0) << 8); + value += call FastSpiByte.splitRead(); + call CSN.set(); + + return value; + } + + inline cc1101_status_t strobe(uint8_t reg) + { + cc1101_status_t status; + + RADIO_ASSERT( call SpiResource.isOwner() ); + RADIO_ASSERT( reg == (reg & CC1101_CMD_REGISTER_MASK) ); + + call CSN.set(); + call CSN.clr(); + + status.value = call SpiByte.write(CC1101_CMD_REGISTER_WRITE | reg); + + call CSN.set(); + return status; + + } + + inline cc1101_status_t getStatus() { + return strobe(CC1101_SNOP); + } + + inline cc1101_status_t writeRegister(uint8_t reg, uint8_t value) + { + cc1101_status_t status; + + RADIO_ASSERT( call SpiResource.isOwner() ); + RADIO_ASSERT( reg == (reg & CC1101_CMD_REGISTER_MASK) ); + + call CSN.set(); + call CSN.clr(); + + call SpiByte.write(CC1101_CMD_REGISTER_WRITE | reg); + status.value = call SpiByte.readWrite(value); + + call CSN.set(); + return status; + } + + inline cc1101_status_t writeTxFifo(uint8_t* data, uint8_t length) + { + cc1101_status_t status; + uint8_t idx; + + RADIO_ASSERT( call SpiResource.isOwner() ); + + call CSN.set(); + call CSN.clr(); + + call FastSpiByte.splitWrite(CC1101_CMD_REGISTER_WRITE | CC1101_TXFIFO); + for(idx = 0; idx 10000) { + strobe(CC1101_SRES); + call CSN.clr(); + } + } + // The chip is ready. XOSC is stable. + + // Strobe SRES + strobe(CC1101_SRES); + call CSN.clr(); + while(call GDO2.get()); + + // Power down + strobe(CC1101_SIDLE); + strobe(CC1101_SPWD); + + state = STATE_PD; + } + + + void initRadio() + { + resetRadio(); + + txPower = CC1101_DEF_RFPOWER & CC1101_TX_PWR_MASK; + channel = CC1101_DEF_CHANNEL & CC1101_CHANNEL_MASK; + + } + + /*----------------- SPI -----------------*/ + + event void SpiResource.granted() + { + + call CSN.makeOutput(); + call CSN.set(); + + if( state == STATE_POR ) + { + initRadio(); + call SpiResource.release(); + } + else + call Tasklet.schedule(); + } + + bool isSpiAcquired() + { + if( call SpiResource.isOwner() ) + return TRUE; + + if( call SpiResource.immediateRequest() == SUCCESS ) + { + call CSN.makeOutput(); + call CSN.set(); + + return TRUE; + } + + call SpiResource.request(); + return FALSE; + } + + /*----------------- CHANNEL -----------------*/ + + tasklet_async command uint8_t RadioState.getChannel() + { + return channel; + } + + tasklet_async command error_t RadioState.setChannel(uint8_t c) + { + c &= CC1101_CHANNEL_MASK; + + if( cmd != CMD_NONE ) + return EBUSY; + else if( channel == c ) + return EALREADY; + + channel = c; + cmd = CMD_CHANNEL; + call Tasklet.schedule(); + + return SUCCESS; + } + + inline void setChannel() + { + cc1101_fsctrl_t fsctrl; + // set up freq + fsctrl= cc1101_fsctrl_default; + fsctrl.f.freq = 357+5*(channel - 11); + + writeRegister(CC1101_FSCTRL, fsctrl.value); + } + + inline void changeChannel() + { + RADIO_ASSERT( cmd == CMD_CHANNEL ); + RADIO_ASSERT( state == STATE_PD || state == STATE_IDLE || ( state == STATE_RX_ON && call RadioAlarm.isFree())); + + if( isSpiAcquired() ) + { + setChannel(); + + if( state == STATE_RX_ON ) { + call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods + state = STATE_IDLE_2_RX_ON; + } + else + cmd = CMD_SIGNAL_DONE; + } + } + + /*----------------- TURN ON/OFF -----------------*/ + + void sendConfigRegs(){ + + } + inline void changeState() + { + + if( (cmd == CMD_STANDBY || cmd == CMD_TURNON) + && state == STATE_PD && isSpiAcquired() && call RadioAlarm.isFree() ) + { + // Go back to IDLE state + strobe(CC1101_SIDLE); + // Send configuration registers + sendConfigRegs(); + + call RadioAlarm.wait(PD_2_IDLE_TIME); // .86ms OSC startup time + state = STATE_PD_2_IDLE; + } + else if( cmd == CMD_TURNON && state == STATE_IDLE && isSpiAcquired() && call RadioAlarm.isFree()) + { + // setChannel was ignored in SLEEP because the SPI was not working, so do it here + setChannel(); + + // start receiving + strobe(CC1101_SRXON); + call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods + state = STATE_IDLE_2_RX_ON; + } + else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) + && state == STATE_RX_ON && isSpiAcquired() ) + { + // disable SFD capture + call SfdCapture.disable(); + + // stop receiving + strobe(CC1101_SRFOFF); + state = STATE_IDLE; + } + + if( cmd == CMD_TURNOFF && state == STATE_IDLE && isSpiAcquired() ) + { + // stop oscillator + strobe(CC1101_SXOSCOFF); + + // do a reset + initRadio(); + state = STATE_PD; + cmd = CMD_SIGNAL_DONE; + } + else if( cmd == CMD_STANDBY && state == STATE_IDLE ) + cmd = CMD_SIGNAL_DONE; + } + + tasklet_async command error_t RadioState.turnOff() + { + if( cmd != CMD_NONE ) + return EBUSY; + else if( state == STATE_PD ) + return EALREADY; + +#ifdef RADIO_DEBUG_STATE + if( call DiagMsg.record() ) + { + call DiagMsg.str("turnOff"); + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.send(); + } +#endif + + cmd = CMD_TURNOFF; + call Tasklet.schedule(); + + return SUCCESS; + } + + tasklet_async command error_t RadioState.standby() + { + if( cmd != CMD_NONE || (state == STATE_PD && ! call RadioAlarm.isFree()) ) + return EBUSY; + else if( state == STATE_IDLE ) + return EALREADY; + +#ifdef RADIO_DEBUG_STATE + if( call DiagMsg.record() ) + { + call DiagMsg.str("standBy"); + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.send(); + } +#endif + + cmd = CMD_STANDBY; + call Tasklet.schedule(); + + return SUCCESS; + } + + // TODO: turn on SFD capture when turning off radio + tasklet_async command error_t RadioState.turnOn() + { + if( cmd != CMD_NONE || (state == STATE_PD && ! call RadioAlarm.isFree()) ) + return EBUSY; + else if( state == STATE_RX_ON ) + return EALREADY; + +#ifdef RADIO_DEBUG_STATE + if( call DiagMsg.record() ) + { + call DiagMsg.str("turnOn"); + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.send(); + } +#endif + + cmd = CMD_TURNON; + call Tasklet.schedule(); + + return SUCCESS; + } + + default tasklet_async event void RadioState.done() { } + + /*----------------- TRANSMIT -----------------*/ + + tasklet_async command error_t RadioSend.send(message_t* msg) + { + uint16_t time; + uint8_t p; + uint8_t length; + uint8_t* data; + uint8_t header; + uint32_t time32; + void* timesync; + timesync_relative_t timesync_relative; + uint32_t sfdTime; + cc1101_status_t status; +#ifdef RADIO_DEBUG + uint8_t sfd1, sfd2, sfd3, sfd4; +#endif + if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxSfd || txEnd ) + return EBUSY; + + p = (call PacketTransmitPower.isSet(msg) ? + call PacketTransmitPower.get(msg) : CC1101_DEF_RFPOWER) & CC1101_TX_PWR_MASK; + + if( p != txPower ) + { + cc1101_txctrl_t txctrl = cc1101_txctrl_default; + + txPower = p; + + txctrl.f.pa_level = txPower; + writeRegister(CC1101_TXCTRL, txctrl.value); + } + + if( call Config.requiresRssiCca(msg) && !call CCA.get() ) + return EBUSY; + + data = getPayload(msg); + length = getHeader(msg)->length; + + // length | data[0] ... data[length-3] | automatically generated FCS + + header = call Config.headerPreloadLength(); + if( header > length ) + header = length; + + length -= header; + + // first upload the header to gain some time + writeTxFifo(data, header); + + atomic { + // there's a chance that there was a receive SFD interrupt in such a short time + // clean up the TXFIFO and bail out + if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || rxSfd || call SFD.get() == 1 ) { + // discard header we wrote to TXFIFO + strobe(CC1101_SFLUSHTX); + // and bail out + return EBUSY; + } +#ifdef RADIO_DEBUG + sfd1 = call SFD.get(); +#endif + // start transmission + status = strobe(CC1101_STXON); +#ifdef RADIO_DEBUG + sfd2 = call SFD.get(); +#endif + // get a timestamp right after strobe returns + time = call RadioAlarm.getNow(); + + cmd = CMD_TRANSMIT; + state = STATE_TX_ON; +#ifdef RADIO_DEBUG + sfd3 = call SFD.get(); +#endif + call SfdCapture.captureFallingEdge(); +#ifdef RADIO_DEBUG + sfd4 = call SFD.get(); +#endif + } + + //RADIO_ASSERT(sfd1 == 0); + RADIO_ASSERT(sfd2 == 0); + RADIO_ASSERT(sfd3 == 0); + RADIO_ASSERT(sfd4 == 0); + + timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; + + if( timesync == 0 ) { + // no timesync: write the entire payload to the fifo + if(length>0) + writeTxFifo(data+header, length - 1); + state = STATE_BUSY_TX_2_RX_ON; + } else { + // timesync required: write the payload before the timesync bytes to the fifo + // TODO: we're assuming here that the timestamp is at the end of the message + writeTxFifo(data+header, length - sizeof(timesync_relative) - 1); + } + + + // compute timesync + sfdTime = time; + + // read both clocks + atomic { + time = call RadioAlarm.getNow(); + time32 = call LocalTime.get(); + } + + // adjust time32 with the time elapsed since the SFD event + time -= sfdTime; + time32 -= time; + + // adjust for delay between the STXON strobe and the transmission of the SFD + time32 += TX_SFD_DELAY; + + call PacketTimeStamp.set(msg, time32); + + if( timesync != 0 ) { + // read and adjust the timestamp field + timesync_relative = (*(timesync_absolute_t*)timesync) - time32; + + // write it to the fifo + // TODO: we're assuming here that the timestamp is at the end of the message + writeTxFifo((uint8_t*)(×ync_relative), sizeof(timesync_relative)); + state = STATE_BUSY_TX_2_RX_ON; + } + +#ifdef RADIO_DEBUG_MESSAGES + txMsg = msg; + + if( call DiagMsg.record() ) + { + length = getHeader(msg)->length; + + call DiagMsg.chr('t'); + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.uint32(call PacketTimeStamp.isValid(msg) ? call PacketTimeStamp.timestamp(msg) : 0); + call DiagMsg.int8(length); + call DiagMsg.hex8s(getPayload(msg), length); + call DiagMsg.send(); + } +#endif + // SFD capture interrupt will be triggered: we'll reenable interrupts from there + // and clear the rx fifo -- should something have arrived in the meantime + return SUCCESS; + } + + default tasklet_async event void RadioSend.sendDone(error_t error) { } + default tasklet_async event void RadioSend.ready() { } + + /*----------------- CCA -----------------*/ + + tasklet_async command error_t RadioCCA.request() + { + if( cmd != CMD_NONE || state != STATE_RX_ON ) + return EBUSY; + + if(call CCA.get()) { + signal RadioCCA.done(SUCCESS); + } else { + // TODO: remove this + RADIO_ASSERT(FAIL); + signal RadioCCA.done(EBUSY); + } + return SUCCESS; + } + + default tasklet_async event void RadioCCA.done(error_t error) { } + + /*----------------- RECEIVE -----------------*/ + + inline cc1101_status_t enableReceiveSfd() { + cc1101_status_t status; +#ifdef RADIO_DEBUG + uint8_t sfd1, sfd2, sfd3, fifo, fifop; +#endif + atomic { + // turn off the radio first + strobe(CC2420_SRFOFF); +#ifdef RADIO_DEBUG + sfd1 = call SFD.get(); +#endif + // flush rx fifo + flushRxFifo(); +#ifdef RADIO_DEBUG + sfd2 = call SFD.get(); +#endif + // ready to receive new message: enable receive SFD capture + call SfdCapture.captureRisingEdge(); +#ifdef RADIO_DEBUG + sfd3 = call SFD.get(); + fifo = call FIFO.get(); + fifop = call FIFOP.get(); +#endif + // turn the radio back on + status = strobe(CC2420_SRXON); + } + RADIO_ASSERT(sfd1 == 0); + RADIO_ASSERT(sfd2 == 0); + RADIO_ASSERT(sfd3 == 0); + RADIO_ASSERT(fifo == 0); + RADIO_ASSERT(fifop == 0); + //RADIO_ASSERT(status.lock == 1); + RADIO_ASSERT(status.tx_active == 0); + //RADIO_ASSERT(status.tx_underflow == 0); + RADIO_ASSERT(status.xosc16m_stable == 1); + return status; + } + + + //for apps/PPPSniffer +#ifdef PPPSNIFFER + task void ppptransmit() + { + uint8_t len; + message_t* msg; + + atomic { + if (pppIn == pppOut && !pppFull) { + pppBusy = FALSE; + return; + } + + msg = pppQueue[pppOut]; + len = getHeader(msg)->length; // separate FCS/CRC + } + + call Leds.led1Toggle(); + //if (call UartSend.send(uartQueue[uartOut], len) == SUCCESS) { + if (call PppIpv6.transmit(getPayload(msg)+1, + len) == SUCCESS) { + //call Leds.led2Toggle(); + atomic { + if (msg == pppQueue[pppOut]) { + if (++pppOut >= PPP_QUEUE_LEN) + pppOut = 0; + if (pppFull) + pppFull = FALSE; + } + } + post ppptransmit(); + } else { + post ppptransmit(); + } + } + +#endif + + inline void downloadMessage() + { + uint8_t length; + uint16_t crc = 1; + uint8_t* data; + uint8_t rssi; + uint8_t crc_ok_lqi; + uint16_t sfdTime; + + state = STATE_RX_DOWNLOAD; + + sfdTime = capturedTime; + + // data starts after the length field + data = getPayload(rxMsg) + sizeof(cc1101_header_t); + + // read the length byte + readLengthFromRxFifo(&length); + + if (length < 3 || length > call RadioPacket.maxPayloadLength() + 2 ) { + // bad length: bail out + state = STATE_RX_ON; + cmd = CMD_NONE; + enableReceiveSfd(); + return; + } + + // if we're here, length must be correct + RADIO_ASSERT(length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2); + + getHeader(rxMsg)->length = length; + + // we'll read the FCS/CRC separately + length -= 2; + + // download the whole payload + readPayloadFromRxFifo(data, length ); + + // the last two bytes are not the fsc, but RSSI(8), CRC_ON(1)+LQI(7) + readRssiFromRxFifo(&rssi); + readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); + + /* UNCOMMENT THIS CODE IF THERE ARE TIMESTAMPING ERRORS + // there are still bytes in the fifo or if there's an overflow, flush rx fifo + if (call FIFOP.get() == 1 || call FIFO.get() == 1 || call SFD.get() == 1) { + RADIO_ASSERT(FALSE); + + state = STATE_RX_ON; + cmd = CMD_NONE; + + RADIO_ASSERT(call SFD.get() == 0); + enableReceiveSfd(); + return; + } + */ + + state = STATE_RX_ON; + cmd = CMD_NONE; + + // ready to receive new message: enable SFD interrupts + enableReceiveSfd(); + + // bail out if we're not interested in this message + if( !signal RadioReceive.header(rxMsg) ) + return; + + // set RSSI, CRC and LQI only if we're accepting the message + call PacketRSSI.set(rxMsg, rssi); + call PacketLinkQuality.set(rxMsg, crc_ok_lqi & 0x7f); + crc = (crc_ok_lqi > 0x7f) ? 0 : 1; + + + //for apps/PPPSniffer +#ifdef PPPSNIFFER + call Leds.led0Toggle(); + atomic { + if (!pppFull) { + //ret = pppQueue[pppIn]; + pppQueue[pppIn] = rxMsg; + + pppIn = (pppIn + 1) % PPP_QUEUE_LEN; + + if (pppIn == pppOut) + pppFull = TRUE; + + if (!pppBusy) { + post ppptransmit(); + pppBusy = TRUE; + } + } + } + //call PppIpv6.transmit(getPayload(rxMsg)+1, + // length+4); + //length-1+ sizeof(ieee154_header_t)); + // length-1+ sizeof(cc1101packet_header_t)); + //call PppIpv6.transmit(rxMsg+1, + // length -1 + sizeof(cc1101packet_header_t)); +#endif + + // signal reception only if it has passed the CRC check + if( crc == 0 ) { + uint32_t time32; + uint16_t time; + atomic { + time = call RadioAlarm.getNow(); + time32 = call LocalTime.get(); + } + + time -= sfdTime; + time32 -= time; + + call PacketTimeStamp.set(rxMsg, time32); + +#ifdef RADIO_DEBUG_MESSAGES + if( call DiagMsg.record() ) + { + call DiagMsg.str("r"); + call DiagMsg.uint16(call RadioAlarm.getNow() - (uint16_t)call PacketTimeStamp.timestamp(rxMsg) ); + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.uint16(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); + call DiagMsg.int8(length); + call DiagMsg.hex8s(getPayload(rxMsg), length); + call DiagMsg.send(); + } +#endif + rxMsg = signal RadioReceive.receive(rxMsg); + + } + + } + + + /*----------------- IRQ -----------------*/ + + // RX SFD (rising edge) or end of TX (falling edge) + async event void SfdCapture.captured( uint16_t time ) + { + + + RADIO_ASSERT( ! rxSfd ); // assert that there's no nesting + RADIO_ASSERT( ! txEnd ); // assert that there's no nesting + + call SfdCapture.disable(); + + if(state == STATE_RX_ON) { + rxSfd = TRUE; + capturedTime = time; + } else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON) { + txEnd = TRUE; + } else { + // received capture interrupt in an invalid state + RADIO_ASSERT(FALSE); + } + +#ifdef RADIO_DEBUG_IRQ + if( call DiagMsg.record() ) + { + if(rxSfd) + call DiagMsg.str("rxSfd"); + if(txEnd) + call DiagMsg.str("txEnd"); + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.str("s="); + call DiagMsg.uint8(state); + if(call FIFO.get()) + call DiagMsg.str("FIFO"); + if(call FIFOP.get()) + call DiagMsg.str("FIFOP"); + if(call SFD.get()) + call DiagMsg.str("SFD"); + call DiagMsg.send(); + } +#endif + + // do the rest of the processing + call Tasklet.schedule(); + } + + // FIFOP interrupt, last byte received + async event void FifopInterrupt.fired() + { + // not used + } + + + default tasklet_async event bool RadioReceive.header(message_t* msg) + { + return TRUE; + } + + default tasklet_async event message_t* RadioReceive.receive(message_t* msg) + { + return msg; + } + + /*----------------- TASKLET -----------------*/ + + task void releaseSpi() + { + call SpiResource.release(); + } + + tasklet_async event void Tasklet.run() + { +#ifdef RADIO_DEBUG_TASKLET + if( call DiagMsg.record() ) + { + call DiagMsg.str("tsk_str"); + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.str("s="); + call DiagMsg.uint8(state); + call DiagMsg.str("c="); + call DiagMsg.uint8(cmd); + if(rxSfd) + call DiagMsg.str("rxSfd"); + if(txEnd) + call DiagMsg.str("txEnd"); + if(call FIFO.get()) + call DiagMsg.str("FIFO"); + if(call FIFOP.get()) + call DiagMsg.str("FIFOP"); + if(call SFD.get()) + call DiagMsg.str("SFD"); + + call DiagMsg.send(); + } +#endif + + if( txEnd ) { + // end of transmission + if( isSpiAcquired() ) + { + cc1101_status_t status; + + txEnd = FALSE; + + RADIO_ASSERT(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON); + RADIO_ASSERT(cmd == CMD_TRANSMIT); + + state = STATE_RX_ON; + cmd = CMD_NONE; + + // a packet might have been received since the end of the transmission + status = enableReceiveSfd(); + +#if defined(RADIO_DEBUG_IRQ) && defined(RADIO_DEBUG_MESSAGES) + if( call DiagMsg.record() ) + { + call DiagMsg.str("txdone"); + call DiagMsg.uint16(call RadioAlarm.getNow()); + // TODO: captured time is not set for tx end + //call DiagMsg.uint16(capturedTime - (uint16_t)call PacketTimeStamp.timestamp(txMsg)); + if(call FIFO.get()) + call DiagMsg.str("FIFO"); + if(call FIFOP.get()) + call DiagMsg.str("FIFOP"); + if(call SFD.get()) + call DiagMsg.str("SFD"); + + call DiagMsg.send(); + } +#endif + + // check for tx underflow + if ( status.tx_underflow == 1) { + RADIO_ASSERT(FALSE); + // flush tx fifo + strobe(CC1101_SFLUSHTX); + signal RadioSend.sendDone(FAIL); + } else { + signal RadioSend.sendDone(SUCCESS); + } + } + else + RADIO_ASSERT(FALSE); + } + + if( rxSfd ) { + // incoming packet + if( isSpiAcquired() ) + { + rxSfd = FALSE; + + RADIO_ASSERT(state == STATE_RX_ON); + RADIO_ASSERT(cmd == CMD_NONE); + + cmd = CMD_DOWNLOAD; + } + else + RADIO_ASSERT(FALSE); + } + + + if( cmd != CMD_NONE ) + { + if( cmd == CMD_DOWNLOAD ) { + RADIO_ASSERT(state == STATE_RX_ON); + downloadMessage(); + } + else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON ) + changeState(); + else if( cmd == CMD_CHANNEL ) + changeChannel(); + + if( cmd == CMD_SIGNAL_DONE ) + { + cmd = CMD_NONE; + signal RadioState.done(); + } + } + + if( cmd == CMD_NONE && state == STATE_RX_ON && ! rxSfd && ! txEnd ) + signal RadioSend.ready(); + + if( cmd == CMD_NONE ) + post releaseSpi(); + +#ifdef RADIO_DEBUG_TASKLET + if( call DiagMsg.record() ) + { + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.str("tsk_end"); + call DiagMsg.str("s="); + call DiagMsg.uint8(state); + call DiagMsg.str("c="); + call DiagMsg.uint8(cmd); + if(rxSfd) + call DiagMsg.str("rxSfd"); + if(txEnd) + call DiagMsg.str("txEnd"); + if(call FIFO.get()) + call DiagMsg.str("FIFO"); + if(call FIFOP.get()) + call DiagMsg.str("FIFOP"); + if(call SFD.get()) + call DiagMsg.str("SFD"); + + call DiagMsg.send(); + } +#endif + } + + /*----------------- RadioPacket -----------------*/ + + async command uint8_t RadioPacket.headerLength(message_t* msg) + { + return call Config.headerLength(msg) + sizeof(cc1101_header_t); + } + + async command uint8_t RadioPacket.payloadLength(message_t* msg) + { + return getHeader(msg)->length - 2; + } + + async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) + { + RADIO_ASSERT( 1 <= length && length <= 125 ); + RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); + + // we add the length of the CRC, which is automatically generated + getHeader(msg)->length = length + 2; + } + + async command uint8_t RadioPacket.maxPayloadLength() + { + RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(cc1101_header_t) <= 125 ); + + return call Config.maxPayloadLength() - sizeof(cc1101_header_t); + } + + async command uint8_t RadioPacket.metadataLength(message_t* msg) + { + return call Config.metadataLength(msg) + sizeof(cc1101_metadata_t); + } + + async command void RadioPacket.clear(message_t* msg) + { + // all flags are automatically cleared + } + + /*----------------- PacketTransmitPower -----------------*/ + + async command bool PacketTransmitPower.isSet(message_t* msg) + { + return call TransmitPowerFlag.get(msg); + } + + async command uint8_t PacketTransmitPower.get(message_t* msg) + { + return getMeta(msg)->power; + } + + async command void PacketTransmitPower.clear(message_t* msg) + { + call TransmitPowerFlag.clear(msg); + } + + async command void PacketTransmitPower.set(message_t* msg, uint8_t value) + { + call TransmitPowerFlag.set(msg); + getMeta(msg)->power = value; + } + + /*----------------- PacketRSSI -----------------*/ + + async command bool PacketRSSI.isSet(message_t* msg) + { + return call RSSIFlag.get(msg); + } + + async command uint8_t PacketRSSI.get(message_t* msg) + { + return getMeta(msg)->rssi; + } + + async command void PacketRSSI.clear(message_t* msg) + { + call RSSIFlag.clear(msg); + } + + async command void PacketRSSI.set(message_t* msg, uint8_t value) + { + // just to be safe if the user fails to clear the packet + call TransmitPowerFlag.clear(msg); + + call RSSIFlag.set(msg); + getMeta(msg)->rssi = value; + } + + /*----------------- PacketTimeSyncOffset -----------------*/ + + async command bool PacketTimeSyncOffset.isSet(message_t* msg) + { + return call TimeSyncFlag.get(msg); + } + + async command uint8_t PacketTimeSyncOffset.get(message_t* msg) + { + return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t); + } + + async command void PacketTimeSyncOffset.clear(message_t* msg) + { + call TimeSyncFlag.clear(msg); + } + + async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value) + { + // we do not store the value, the time sync field is always the last 4 bytes + RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value ); + + call TimeSyncFlag.set(msg); + } + + /*----------------- PacketLinkQuality -----------------*/ + + async command bool PacketLinkQuality.isSet(message_t* msg) + { + return TRUE; + } + + async command uint8_t PacketLinkQuality.get(message_t* msg) + { + return getMeta(msg)->lqi; + } + + async command void PacketLinkQuality.clear(message_t* msg) + { + } + + async command void PacketLinkQuality.set(message_t* msg, uint8_t value) + { + getMeta(msg)->lqi = value; + } + + /*----------------- LinkPacketMetadata -----------------*/ + + async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) + { + return call PacketLinkQuality.get(msg) > 105; + } + + //for apps/PPPSniffer +#ifdef PPPSNIFFER + event void Ipv6LcpAutomaton.transitionCompleted (LcpAutomatonState_e lcpstate) { } + event void Ipv6LcpAutomaton.thisLayerUp () { } + event void Ipv6LcpAutomaton.thisLayerDown () { } + event void Ipv6LcpAutomaton.thisLayerStarted () { } + event void Ipv6LcpAutomaton.thisLayerFinished () { } + event void PppIpv6.linkUp () {} + event void PppIpv6.linkDown () {} + event error_t PppIpv6.receive (const uint8_t* message, unsigned int len) { + return SUCCESS; + } + + event void PppSplitControl.startDone (error_t error) { } + event void PppSplitControl.stopDone (error_t error) { } +#endif + } diff --git a/tos/chips/cc1101/CC1101Radio.h b/tos/chips/cc1101/CC1101Radio.h new file mode 100644 index 0000000000..a91cff3211 --- /dev/null +++ b/tos/chips/cc1101/CC1101Radio.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +#ifndef __CC1101RADIO_H__ +#define __CC1101RADIO_H__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +typedef nx_struct cc1101packet_header_t +{ + cc1101_header_t cc1101; + ieee154_simple_header_t ieee154; +#ifndef TFRAMES_ENABLED + network_header_t network; +#endif +#ifndef IEEE154FRAMES_ENABLED + activemessage_header_t am; +#endif +} cc1101packet_header_t; + +typedef nx_struct cc1101packet_footer_t +{ + // the time stamp is not recorded here, time stamped messaged cannot have max length +} cc1101packet_footer_t; + +typedef struct cc1101packet_metadata_t +{ +#ifdef LOW_POWER_LISTENING + lpl_metadata_t lpl; +#endif +#ifdef PACKET_LINK + link_metadata_t link; +#endif + timestamp_metadata_t timestamp; + flags_metadata_t flags; + cc1101_metadata_t cc1101; +} cc1101packet_metadata_t; + +#endif//__CC1101RADIO_H__ diff --git a/tos/chips/cc1101/CC1101RadioC.nc b/tos/chips/cc1101/CC1101RadioC.nc new file mode 100644 index 0000000000..b78f24dcd6 --- /dev/null +++ b/tos/chips/cc1101/CC1101RadioC.nc @@ -0,0 +1,284 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai, Miklos Maroti + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +#include + +configuration CC1101RadioC +{ + provides + { + interface SplitControl; + +#ifndef IEEE154FRAMES_ENABLED + interface AMSend[am_id_t id]; + interface Receive[am_id_t id]; + interface Receive as Snoop[am_id_t id]; + interface SendNotifier[am_id_t id]; + + // for TOSThreads + interface Receive as ReceiveDefault[am_id_t id]; + interface Receive as SnoopDefault[am_id_t id]; + + interface AMPacket; + interface Packet as PacketForActiveMessage; +#endif + +#ifndef TFRAMES_ENABLED + interface Ieee154Send; + interface Receive as Ieee154Receive; + interface SendNotifier as Ieee154Notifier; + + interface Resource as SendResource[uint8_t clint]; + + interface Ieee154Packet; + interface Packet as PacketForIeee154Message; +#endif + + interface PacketAcknowledgements; + interface LowPowerListening; + interface PacketLink; + +#ifdef TRAFFIC_MONITOR + interface TrafficMonitor; +#endif + + interface RadioChannel; + + interface PacketField as PacketLinkQuality; + interface PacketField as PacketTransmitPower; + interface PacketField as PacketRSSI; + interface LinkPacketMetadata; + + interface LocalTime as LocalTimeRadio; + interface PacketTimeStamp as PacketTimeStampRadio; + interface PacketTimeStamp as PacketTimeStampMilli; + } +} + +implementation +{ +#define UQ_METADATA_FLAGS "UQ_CC1101_METADATA_FLAGS" +#define UQ_RADIO_ALARM "UQ_CC1101_RADIO_ALARM" + + // -------- RadioP + + components CC1101RadioP as RadioP; + +#ifdef RADIO_DEBUG + components AssertC; +#endif + + RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC; + RadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; + RadioP.PacketTimeStamp -> TimeStampingLayerC; + RadioP.CC1101Packet -> RadioDriverLayerC; + + // -------- RadioAlarm + + components new RadioAlarmC(); + RadioAlarmC.Alarm -> RadioDriverLayerC; + + // -------- Active Message + +#ifndef IEEE154FRAMES_ENABLED + components new ActiveMessageLayerC(); + ActiveMessageLayerC.Config -> RadioP; + ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC; + ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive; + ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket; + + AMSend = ActiveMessageLayerC; + Receive = ActiveMessageLayerC.Receive; + Snoop = ActiveMessageLayerC.Snoop; + SendNotifier = ActiveMessageLayerC; + AMPacket = ActiveMessageLayerC; + PacketForActiveMessage = ActiveMessageLayerC; + + ReceiveDefault = ActiveMessageLayerC.ReceiveDefault; + SnoopDefault = ActiveMessageLayerC.SnoopDefault; +#endif + + // -------- Automatic RadioSend Resource + +#ifndef IEEE154FRAMES_ENABLED +#ifndef TFRAMES_ENABLED + components new AutoResourceAcquireLayerC(); + AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)]; +#else + components new DummyLayerC() as AutoResourceAcquireLayerC; +#endif + AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend; +#endif + + // -------- RadioSend Resource + +#ifndef TFRAMES_ENABLED + components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC; + SendResource = SendResourceC; + + // -------- Ieee154 Message + + components new Ieee154MessageLayerC(); + Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC; + Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send; + Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive; + Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet; + + Ieee154Send = Ieee154MessageLayerC; + Ieee154Receive = Ieee154MessageLayerC; + Ieee154Notifier = Ieee154MessageLayerC; + Ieee154Packet = Ieee154PacketLayerC; + PacketForIeee154Message = Ieee154MessageLayerC; +#endif + + // -------- Tinyos Network + + components new TinyosNetworkLayerC(); + + TinyosNetworkLayerC.SubSend -> UniqueLayerC; + TinyosNetworkLayerC.SubReceive -> PacketLinkLayerC; + TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC; + + // -------- IEEE 802.15.4 Packet + + components new Ieee154PacketLayerC(); + Ieee154PacketLayerC.SubPacket -> PacketLinkLayerC; + + // -------- UniqueLayer Send part (wired twice) + + components new UniqueLayerC(); + UniqueLayerC.Config -> RadioP; + UniqueLayerC.SubSend -> PacketLinkLayerC; + + // -------- Packet Link + + components new PacketLinkLayerC(); + PacketLink = PacketLinkLayerC; + PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC; + PacketLinkLayerC -> LowPowerListeningLayerC.Send; + PacketLinkLayerC -> LowPowerListeningLayerC.Receive; + PacketLinkLayerC -> LowPowerListeningLayerC.RadioPacket; + + // -------- Low Power Listening + +#ifdef LOW_POWER_LISTENING +#warning "*** USING LOW POWER LISTENING LAYER" + components new LowPowerListeningLayerC(); + LowPowerListeningLayerC.Config -> RadioP; + LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC; +#else + components new LowPowerListeningDummyC() as LowPowerListeningLayerC; +#endif + LowPowerListeningLayerC.SubControl -> MessageBufferLayerC; + LowPowerListeningLayerC.SubSend -> MessageBufferLayerC; + LowPowerListeningLayerC.SubReceive -> MessageBufferLayerC; + LowPowerListeningLayerC.SubPacket -> TimeStampingLayerC; + SplitControl = LowPowerListeningLayerC; + LowPowerListening = LowPowerListeningLayerC; + + // -------- MessageBuffer + + components new MessageBufferLayerC(); + MessageBufferLayerC.RadioSend -> CollisionAvoidanceLayerC; + MessageBufferLayerC.RadioReceive -> UniqueLayerC; + MessageBufferLayerC.RadioState -> TrafficMonitorLayerC; + RadioChannel = MessageBufferLayerC; + + // -------- UniqueLayer receive part (wired twice) + + UniqueLayerC.SubReceive -> CollisionAvoidanceLayerC; + + // -------- CollisionAvoidance + +#ifdef SLOTTED_MAC + components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC; +#else + components new RandomCollisionLayerC() as CollisionAvoidanceLayerC; +#endif + CollisionAvoidanceLayerC.Config -> RadioP; + CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC; + CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC; + CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; + + // -------- SoftwareAcknowledgement + + components new SoftwareAckLayerC(); + SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; + SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; + PacketAcknowledgements = SoftwareAckLayerC; + SoftwareAckLayerC.Config -> RadioP; + SoftwareAckLayerC.SubSend -> CsmaLayerC; + SoftwareAckLayerC.SubReceive -> CsmaLayerC; + + // -------- Carrier Sense + + components new DummyLayerC() as CsmaLayerC; + CsmaLayerC.Config -> RadioP; + CsmaLayerC -> TrafficMonitorLayerC.RadioSend; + CsmaLayerC -> TrafficMonitorLayerC.RadioReceive; + CsmaLayerC -> RadioDriverLayerC.RadioCCA; + + // -------- TimeStamping + + components new TimeStampingLayerC(); + TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC; + TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC; + PacketTimeStampRadio = TimeStampingLayerC; + PacketTimeStampMilli = TimeStampingLayerC; + TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; + + // -------- MetadataFlags + + components new MetadataFlagsLayerC(); + MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC; + + // -------- Traffic Monitor + +#ifdef TRAFFIC_MONITOR + components new TrafficMonitorLayerC(); + TrafficMonitor = TrafficMonitorLayerC; +#else + components new DummyLayerC() as TrafficMonitorLayerC; +#endif + TrafficMonitorLayerC.Config -> RadioP; + TrafficMonitorLayerC -> RadioDriverLayerC.RadioSend; + TrafficMonitorLayerC -> RadioDriverLayerC.RadioReceive; + TrafficMonitorLayerC -> RadioDriverLayerC.RadioState; + + // -------- Driver + + components CC1101DriverLayerC as RadioDriverLayerC; + RadioDriverLayerC.Config -> RadioP; + RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC; + PacketTransmitPower = RadioDriverLayerC.PacketTransmitPower; + PacketLinkQuality = RadioDriverLayerC.PacketLinkQuality; + PacketRSSI = RadioDriverLayerC.PacketRSSI; + LinkPacketMetadata = RadioDriverLayerC; + LocalTimeRadio = RadioDriverLayerC; + + RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; + RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; + RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; + RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; +} diff --git a/tos/chips/cc1101/CC1101RadioP.nc b/tos/chips/cc1101/CC1101RadioP.nc new file mode 100644 index 0000000000..7a59d3b5b9 --- /dev/null +++ b/tos/chips/cc1101/CC1101RadioP.nc @@ -0,0 +1,338 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Miklos Maroti, Janos Sallai + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +#include +#include +#include + +module CC1101RadioP +{ + provides + { + interface CC1101DriverConfig; + interface SoftwareAckConfig; + interface UniqueConfig; + interface CsmaConfig; + interface TrafficMonitorConfig; + interface RandomCollisionConfig; + interface SlottedCollisionConfig; + interface ActiveMessageConfig; + interface DummyConfig; + +#ifdef LOW_POWER_LISTENING + interface LowPowerListeningConfig; +#endif + } + + uses + { + interface Ieee154PacketLayer; + interface RadioAlarm; + interface RadioPacket as CC1101Packet; + + interface PacketTimeStamp; + } +} + +implementation +{ + + /*----------------- CC1101DriverConfig -----------------*/ + + async command uint8_t CC1101DriverConfig.headerLength(message_t* msg) + { + return offsetof(message_t, data) - sizeof(cc1101packet_header_t); + } + + async command uint8_t CC1101DriverConfig.maxPayloadLength() + { + return sizeof(cc1101packet_header_t) + TOSH_DATA_LENGTH; + } + + async command uint8_t CC1101DriverConfig.metadataLength(message_t* msg) + { + return 0; + } + + async command uint8_t CC1101DriverConfig.headerPreloadLength() + { + // we need the fcf, dsn, destpan and dest + return 7; + } + + async command bool CC1101DriverConfig.requiresRssiCca(message_t* msg) + { + return call Ieee154PacketLayer.isDataFrame(msg); + } + + /*----------------- SoftwareAckConfig -----------------*/ + + async command bool SoftwareAckConfig.requiresAckWait(message_t* msg) + { + return call Ieee154PacketLayer.requiresAckWait(msg); + } + + async command bool SoftwareAckConfig.isAckPacket(message_t* msg) + { + return call Ieee154PacketLayer.isAckFrame(msg); + } + + async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack) + { + return call Ieee154PacketLayer.verifyAckReply(data, ack); + } + + async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack) + { + call Ieee154PacketLayer.setAckRequired(msg, ack); + } + + async command bool SoftwareAckConfig.requiresAckReply(message_t* msg) + { + return call Ieee154PacketLayer.requiresAckReply(msg); + } + + async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack) + { + call Ieee154PacketLayer.createAckReply(data, ack); + } + +#ifndef SOFTWAREACK_TIMEOUT +#define SOFTWAREACK_TIMEOUT 1000 +#endif + + async command uint16_t SoftwareAckConfig.getAckTimeout() + { + return (uint16_t)(SOFTWAREACK_TIMEOUT * RADIO_ALARM_MICROSEC); + } + + tasklet_async command void SoftwareAckConfig.reportChannelError() + { +#ifdef TRAFFIC_MONITOR + // signal TrafficMonitorConfig.channelError(); +#endif + } + + /*----------------- UniqueConfig -----------------*/ + + async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg) + { + return call Ieee154PacketLayer.getDSN(msg); + } + + async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn) + { + call Ieee154PacketLayer.setDSN(msg, dsn); + } + + async command am_addr_t UniqueConfig.getSender(message_t* msg) + { + return call Ieee154PacketLayer.getSrcAddr(msg); + } + + tasklet_async command void UniqueConfig.reportChannelError() + { +#ifdef TRAFFIC_MONITOR + // signal TrafficMonitorConfig.channelError(); +#endif + } + + /*----------------- ActiveMessageConfig -----------------*/ + + command am_addr_t ActiveMessageConfig.destination(message_t* msg) + { + return call Ieee154PacketLayer.getDestAddr(msg); + } + + command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr) + { + call Ieee154PacketLayer.setDestAddr(msg, addr); + } + + command am_addr_t ActiveMessageConfig.source(message_t* msg) + { + return call Ieee154PacketLayer.getSrcAddr(msg); + } + + command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr) + { + call Ieee154PacketLayer.setSrcAddr(msg, addr); + } + + command am_group_t ActiveMessageConfig.group(message_t* msg) + { + return call Ieee154PacketLayer.getDestPan(msg); + } + + command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp) + { + call Ieee154PacketLayer.setDestPan(msg, grp); + } + + command error_t ActiveMessageConfig.checkFrame(message_t* msg) + { + if( ! call Ieee154PacketLayer.isDataFrame(msg) ) + call Ieee154PacketLayer.createDataFrame(msg); + + return SUCCESS; + } + + /*----------------- CsmaConfig -----------------*/ + + async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg) + { + return call Ieee154PacketLayer.isDataFrame(msg); + } + + /*----------------- TrafficMonitorConfig -----------------*/ + + async command uint16_t TrafficMonitorConfig.getBytes(message_t* msg) + { + // pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes) + + return call CC1101Packet.payloadLength(msg) + 6; + } + + /*----------------- RandomCollisionConfig -----------------*/ + + /* + * We try to use the same values as in CC2420 + * + * CC2420_MIN_BACKOFF = 10 jiffies = 320 microsec + * CC2420_BACKOFF_PERIOD = 10 jiffies + * initial backoff = 0x1F * CC2420_BACKOFF_PERIOD = 310 jiffies = 9920 microsec + * congestion backoff = 0x7 * CC2420_BACKOFF_PERIOD = 70 jiffies = 2240 microsec + */ + +#ifndef LOW_POWER_LISTENING + + async command uint16_t RandomCollisionConfig.getMinimumBackoff() + { + return (uint16_t)(320 * RADIO_ALARM_MICROSEC); + } + + async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) + { + return (uint16_t)(9920 * RADIO_ALARM_MICROSEC); + } + + async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) + { + return (uint16_t)(2240 * RADIO_ALARM_MICROSEC); + } + +#endif + + async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg) + { + uint16_t time; + + // TODO: maybe we should use the embedded timestamp of the message + time = call RadioAlarm.getNow(); + + // estimated response time (download the message, etc) is 5-8 bytes + if( call Ieee154PacketLayer.requiresAckReply(msg) ) + time += (uint16_t)(32 * (-5 + 16 + 11 + 5) * RADIO_ALARM_MICROSEC); + else + time += (uint16_t)(32 * (-5 + 5) * RADIO_ALARM_MICROSEC); + + return time; + } + + tasklet_async event void RadioAlarm.fired() + { + } + + /*----------------- SlottedCollisionConfig -----------------*/ + + async command uint16_t SlottedCollisionConfig.getInitialDelay() + { + return 300; + } + + async command uint8_t SlottedCollisionConfig.getScheduleExponent() + { + return 1 + RADIO_ALARM_MILLI_EXP; + } + + async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg) + { + // TODO: check if the timestamp is correct + return call PacketTimeStamp.timestamp(msg); + } + + async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg) + { + // the preamble (4 bytes), SFD (1 byte), plus two extra for safety + return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC); + } + + async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg) + { + return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC); + } + + /*----------------- Dummy -----------------*/ + + async command void DummyConfig.nothing() + { + } + + /*----------------- LowPowerListening -----------------*/ + +#ifdef LOW_POWER_LISTENING + + command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg) + { + return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR; + } + + command bool LowPowerListeningConfig.ackRequested(message_t* msg) + { + return call Ieee154PacketLayer.getAckRequired(msg); + } + + command uint16_t LowPowerListeningConfig.getListenLength() + { + return 5; + } + + async command uint16_t RandomCollisionConfig.getMinimumBackoff() + { + return (uint16_t)(320 * RADIO_ALARM_MICROSEC); + } + + async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) + { + return (uint16_t)(1600 * RADIO_ALARM_MICROSEC); + } + + async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) + { + return (uint16_t)(3200 * RADIO_ALARM_MICROSEC); + } + +#endif + +} diff --git a/tos/chips/cc1101/CC1101TimeSyncMessageC.nc b/tos/chips/cc1101/CC1101TimeSyncMessageC.nc new file mode 100644 index 0000000000..9d1bedff1d --- /dev/null +++ b/tos/chips/cc1101/CC1101TimeSyncMessageC.nc @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Miklos Maroti, Janos Sallai + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +#include + +configuration CC1101TimeSyncMessageC +{ + provides + { + interface SplitControl; + + interface Receive[uint8_t id]; + interface Receive as Snoop[am_id_t id]; + interface Packet; + interface AMPacket; + interface PacketAcknowledgements; + interface LowPowerListening; + + interface PacketTimeStamp as PacketTimeStampRadio; + interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; + interface TimeSyncPacket as TimeSyncPacketRadio; + + interface PacketTimeStamp as PacketTimeStampMilli; + interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; + interface TimeSyncPacket as TimeSyncPacketMilli; + } +} + +implementation +{ + components CC1101ActiveMessageC as ActiveMessageC, new TimeSyncMessageLayerC(); + + SplitControl = ActiveMessageC; + AMPacket = TimeSyncMessageLayerC; + Receive = TimeSyncMessageLayerC.Receive; + Snoop = TimeSyncMessageLayerC.Snoop; + Packet = TimeSyncMessageLayerC; + PacketAcknowledgements = ActiveMessageC; + LowPowerListening = ActiveMessageC; + + PacketTimeStampRadio = ActiveMessageC.PacketTimeStampRadio; + TimeSyncAMSendRadio = TimeSyncMessageLayerC; + TimeSyncPacketRadio = TimeSyncMessageLayerC; + + PacketTimeStampMilli = ActiveMessageC.PacketTimeStampMilli; + TimeSyncAMSendMilli = TimeSyncMessageLayerC; + TimeSyncPacketMilli = TimeSyncMessageLayerC; + + TimeSyncMessageLayerC.PacketTimeStampRadio -> ActiveMessageC.PacketTimeStampRadio; + TimeSyncMessageLayerC.PacketTimeStampMilli -> ActiveMessageC.PacketTimeStampMilli; + + components CC1101DriverLayerC as DriverLayerC; + TimeSyncMessageLayerC.LocalTimeRadio -> DriverLayerC; + TimeSyncMessageLayerC.PacketTimeSyncOffset -> DriverLayerC.PacketTimeSyncOffset; +} diff --git a/tos/chips/cc1101/README.txt b/tos/chips/cc1101/README.txt new file mode 100644 index 0000000000..2e36a7ae3d --- /dev/null +++ b/tos/chips/cc1101/README.txt @@ -0,0 +1 @@ +This is a port rfxlink based radio stack to the CC1101. It is mostly based on the CC2420X implementation. From 81908febca8a9b3501419e0c2c0c92ff877bf7c2 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 16 Jul 2013 17:39:09 -0500 Subject: [PATCH 361/411] Adding preliminary support for Rfxlink based radio stack --- tos/chips/cc1101/CC1101DriverLayer.h | 1087 +++++++++++++++-- tos/chips/cc1101/CC1101DriverLayerC.nc | 5 +- tos/chips/cc1101/CC1101DriverLayerP.nc | 516 ++++---- tos/platforms/exp430/.platform | 59 +- tos/platforms/exp430/ActiveMessageC.nc | 123 +- .../exp430/chips/ccxx00/HplCC1101C.nc | 83 ++ .../exp430/chips/ccxx00/RadioConfig.h | 60 + .../exp430/hardware/usci/PlatformUsciMapC.nc | 8 +- tos/platforms/exp430/platform_message.h | 63 +- 9 files changed, 1597 insertions(+), 407 deletions(-) create mode 100644 tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc create mode 100644 tos/platforms/exp430/chips/ccxx00/RadioConfig.h diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h index 887b7a9673..086df09559 100644 --- a/tos/chips/cc1101/CC1101DriverLayer.h +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -59,28 +59,34 @@ enum cc1101_timing_enums { enum cc1101_reg_access_enums { CC1101_CMD_REGISTER_MASK = 0x3f, - CC1101_CMD_REGISTER_READ = 0x40, + CC1101_CMD_REGISTER_READ = 0x80, CC1101_CMD_REGISTER_WRITE = 0x00, - CC1101_CMD_TXRAM_WRITE = 0x80, + CC1101_CMD_BURST_MODE = 0x40, }; typedef union cc1101_status { - uint16_t value; + uint8_t value; struct { - unsigned reserved0:1; - unsigned rssi_valid:1; - unsigned lock:1; - unsigned tx_active:1; - - unsigned enc_busy:1; - unsigned tx_underflow:1; - unsigned xosc16m_stable:1; - unsigned reserved7:1; + unsigned fifo_byte_avail:4; + unsigned state:3; + unsigned chip_rdyn:1; }; } cc1101_status_t; +// Enums for the state bits in the cc1101_status union +enum cc1101_status_state { // Comments from datasheet + CC1101_STATE_IDLE = 0, // IDLE state + CC1101_STATE_RX = 1, // Receive mode + CC1101_STATE_TX = 2, // Transmit mode + CC1101_STATE_FSTXON = 3, // Fast TX ready + CC1101_STATE_CALIBRATE = 4, // Frequency synthesizer calibration is running + CC1101_STATE_SETTLING = 5, // PLL is settling + CC1101_STATE_RXFIFO_OVERFLOW = 6, // RX FIFO has overflowed. Read out any useful data, then flush the FIFO with SFRX + CC1101_STATE_TXFIFO_UNDERFLOW = 7 // TX FIFO has underflowed. Acknowledge with SFTX +}; +#if 0 typedef union cc1101_iocfg0 { - uint16_t value; + uint8_t value; struct { unsigned fifop_thr:7; unsigned cca_polarity:1; @@ -152,7 +158,7 @@ typedef union cc1101_txctrl { } cc1101_txctrl_t; static const cc1101_txctrl_t cc1101_txctrl_default = {.f.pa_level = 31, .f.reserved = 1, .f.pa_current = 3, .f.tx_turnaround = 1, .f.txmixbuf_cur = 2}; - +#endif #ifndef CC1101_DEF_CHANNEL #define CC1101_DEF_CHANNEL 11 @@ -162,69 +168,1006 @@ static const cc1101_txctrl_t cc1101_txctrl_default = {.f.pa_level = 31, .f.reser #define CC1101_DEF_RFPOWER 31 #endif -enum { - CC1101_TX_PWR_MASK = 0x1f, - CC1101_CHANNEL_MASK = 0x1f, -}; +//enum { +// CC1101_TX_PWR_MASK = 0x1f, +// CC1101_CHANNEL_MASK = 0x1f, +//}; enum cc1101_config_reg_enums { - CC1101_SRES = 0x30, - CC1101_SNOP = 0x3d, - //---------------------- not modified after copying ---- - CC1101_SXOSCON = 0x01, - CC1101_STXCAL = 0x02, - CC1101_SRXON = 0x03, - CC1101_STXON = 0x04, - CC1101_STXONCCA = 0x05, - CC1101_SRFOFF = 0x06, - CC1101_SXOSCOFF = 0x07, - CC1101_SFLUSHRX = 0x08, - CC1101_SFLUSHTX = 0x09, - CC1101_SACK = 0x0a, - CC1101_SACKPEND = 0x0b, - CC1101_SRXDEC = 0x0c, - CC1101_STXENC = 0x0d, - CC1101_SAES = 0x0e, - CC1101_MAIN = 0x10, - CC1101_MDMCTRL0 = 0x11, - CC1101_MDMCTRL1 = 0x12, - CC1101_RSSI = 0x13, - CC1101_SYNCWORD = 0x14, - CC1101_TXCTRL = 0x15, - CC1101_RXCTRL0 = 0x16, - CC1101_RXCTRL1 = 0x17, - CC1101_FSCTRL = 0x18, - CC1101_SECCTRL0 = 0x19, - CC1101_SECCTRL1 = 0x1a, - CC1101_BATTMON = 0x1b, - CC1101_IOCFG0 = 0x1c, - CC1101_IOCFG1 = 0x1d, - CC1101_MANFIDL = 0x1e, - CC1101_MANFIDH = 0x1f, - CC1101_FSMTC = 0x20, - CC1101_MANAND = 0x21, - CC1101_MANOR = 0x22, - CC1101_AGCCTRL = 0x23, - CC1101_AGCTST0 = 0x24, - CC1101_AGCTST1 = 0x25, - CC1101_AGCTST2 = 0x26, - CC1101_FSTST0 = 0x27, - CC1101_FSTST1 = 0x28, - CC1101_FSTST2 = 0x29, - CC1101_FSTST3 = 0x2a, - CC1101_RXBPFTST = 0x2b, - CC1101_FSMSTATE = 0x2c, - CC1101_ADCTST = 0x2d, - CC1101_DACTST = 0x2e, - CC1101_TOPTST = 0x2f, - CC1101_TXFIFO = 0x3e, - CC1101_RXFIFO = 0x3f, + // Configuration Registers + CC1101_IOCFG2 = 0x00, // GDO2 output pin configuration + CC1101_IOCFG1 = 0x01, // GDO1 output pin configuration + CC1101_IOCFG0 = 0x02, // GDO0 output pin configuration + CC1101_FIFOTHR = 0x03, // RX FIFO and TX FIFO thresholds + CC1101_SYNC1 = 0x04, // Sync word, high byte + CC1101_SYNC0 = 0x05, // Sync word, low byte + CC1101_PKTLEN = 0x06, // Packet length + CC1101_PKTCTRL1 = 0x07, // Packet automation control + CC1101_PKTCTRL0 = 0x08, // Packet automation control + CC1101_ADDR = 0x09, // Device address + CC1101_CHANNR = 0x0A, // Channel number + CC1101_FSCTRL1 = 0x0B, // Frequency synthesizer control + CC1101_FSCTRL0 = 0x0C, // Frequency synthesizer control + CC1101_FREQ2 = 0x0D, // Frequency control word, high byte + CC1101_FREQ1 = 0x0E, // Frequency control word, middle byte + CC1101_FREQ0 = 0x0F, // Frequency control word, low byte + CC1101_MDMCFG4 = 0x10, // Modem configuration + CC1101_MDMCFG3 = 0x11, // Modem configuration + CC1101_MDMCFG2 = 0x12, // Modem configuration + CC1101_MDMCFG1 = 0x13, // Modem configuration + CC1101_MDMCFG0 = 0x14, // Modem configuration + CC1101_DEVIATN = 0x15, // Modem deviation setting + CC1101_MCSM2 = 0x16, // Main Radio Cntrl State Machine config + CC1101_MCSM1 = 0x17, // Main Radio Cntrl State Machine config + CC1101_MCSM0 = 0x18, // Main Radio Cntrl State Machine config + CC1101_FOCCFG = 0x19, // Frequency Offset Compensation config + CC1101_BSCFG = 0x1A, // Bit Synchronization configuration + CC1101_AGCCTRL2 = 0x1B, // AGC control + CC1101_AGCCTRL1 = 0x1C, // AGC control + CC1101_AGCCTRL0 = 0x1D, // AGC control + CC1101_WOREVT1 = 0x1E, // High byte Event 0 timeout + CC1101_WOREVT0 = 0x1F, // Low byte Event 0 timeout + CC1101_WORCTRL = 0x20, // Wake On Radio control + CC1101_FREND1 = 0x21, // Front end RX configuration + CC1101_FREND0 = 0x22, // Front end TX configuration + CC1101_FSCAL3 = 0x23, // Frequency synthesizer calibration + CC1101_FSCAL2 = 0x24, // Frequency synthesizer calibration + CC1101_FSCAL1 = 0x25, // Frequency synthesizer calibration + CC1101_FSCAL0 = 0x26, // Frequency synthesizer calibration + CC1101_RCCTRL1 = 0x27, // RC oscillator configuration + CC1101_RCCTRL0 = 0x28, // RC oscillator configuration + CC1101_FSTEST = 0x29, // Frequency synthesizer cal control + CC1101_PTEST = 0x2A, // Production test + CC1101_AGCTEST = 0x2B, // AGC test + CC1101_TEST2 = 0x2C, // Various test settings + CC1101_TEST1 = 0x2D, // Various test settings + CC1101_TEST0 = 0x2E, // Various test settings + + // Strobe commands + CC1101_SRES = 0x30, // Reset chip. + CC1101_SFSTXON = 0x31, // Enable/calibrate freq synthesizer + CC1101_SXOFF = 0x32, // Turn off crystal oscillator. + CC1101_SCAL = 0x33, // Calibrate freq synthesizer & disable + CC1101_SRX = 0x34, // Enable RX. + CC1101_STX = 0x35, // Enable TX. + CC1101_SIDLE = 0x36, // Exit RX / TX + CC1101_SAFC = 0x37, // AFC adjustment of freq synthesizer + CC1101_SWOR = 0x38, // Start automatic RX polling sequence + CC1101_SPWD = 0x39, // Enter pwr down mode when CSn goes hi + CC1101_SFRX = 0x3A, // Flush the RX FIFO buffer. + CC1101_SFTX = 0x3B, // Flush the TX FIFO buffer. + CC1101_SWORRST = 0x3C, // Reset real time clock. + CC1101_SNOP = 0x3D, // No operation. + + // Status registers + CC1101_PARTNUM = 0x30, // Part number + CC1101_VERSION = 0x31, // Current version number + CC1101_FREQEST = 0x32, // Frequency offset estimate + CC1101_LQI = 0x33, // Demodulator estimate for link quality + CC1101_RSSI = 0x34, // Received signal strength indication + CC1101_MARCSTATE = 0x35, // Control state machine state + CC1101_WORTIME1 = 0x36, // High byte of WOR timer + CC1101_WORTIME0 = 0x37, // Low byte of WOR timer + CC1101_PKTSTATUS = 0x38, // Current GDOx status and packet status + CC1101_VCO_VC_DAC = 0x39, // Current setting from PLL cal module + CC1101_TXBYTES = 0x3A, // Underflow and # of bytes in TXFIFO + CC1101_RXBYTES = 0x3B, // Overflow and # of bytes in RXFIFO + CC1101_NUM_RXBYTES = 0x7F, // Mask "# of bytes" field in _RXBYTES + + // Other memory locations + CC1101_PATABLE = 0x3E, + CC1101_TXFIFO = 0x3F, + CC1101_RXFIFO = 0x3F, }; -// CC1101 Initial Configuration +// TODO: The following code was adapted from the CC1100.h file of the Blaze radio stack. Figure out how to incorporate +// license of that file into this. +// +/* + * Copyright (c) 2005-2006 Rincon Research Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Rincon Research Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + */ + +/** + * @author Jared Hill + * @author David Moss + * @author Roland Hendel + */ +/** + * This helps calculate new FREQx register settings at runtime + * The frequency is in Hz + */ +#define CC1101_CRYSTAL_HZ 26000000 + +#define CC1101_315_MHZ 0 +#define CC1101_433_MHZ 1 +#define CC1101_868_MHZ 2 +#define CC1101_915_MHZ 3 -uint8_t cc1101_init_config[] { +/** + * You can change the matching network at compile time + */ +#ifndef CC1101_MATCHING_NETWORK +#define CC1101_MATCHING_NETWORK CC1101_433_MHZ +#endif + +#define CC1101_1_2K 1 +#define CC1101_2_4K 2 +#define CC1101_10K 3 +#define CC1101_26K 4 +#define CC1101_38_4K 5 +#define CC1101_76_8K 6 +#define CC1101_100K 7 +#define CC1101_150K 8 +#define CC1101_250K 9 +#define CC1101_500K 10 + +#ifndef CC1101_BAUD +//#define CC1101_BAUD CC1101_10K +#define CC1101_BAUD CC1101_250K +#endif -} +/** + * All default channels and FREQx registers obtained from SmartRF studio. We + * are not trying to define channel frequencies to match up with any sort of + * specification; instead, we want flexibility. If you want to align with + * specs, then go for it. + * + * Note you can setup the CC1101 to match your antenna characteristics. + * Maybe your antenna is tuned to +/- 5 MHz with a center frequency of 315 MHz. + * You want your center frequency to be 314.996 MHz, and your lower edge to be + * 310 MHz and your upper edge to be 320 MHz. + * + * Lower Channel Calculation: + * CC1101_CHANNEL_MIN = [(310000 desired kHz) - (CC1101_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * Where CC1101_LOWEST_FREQ is defined for each band and 199 kHz is + * approximately the channel spacing, CC1101_CHANNEL_WIDTH + * + * CC1101_CHANNEL_MIN ~= 45 + * + * + * Upper Channel Calculation: + * CC1101_CHANNEL_MAX = [(320000 desired kHz) - (CC1101_LOWEST_FREQ)] + * --------------------------------------------- + * 199 kHz channel spacing + * + * CC1101_CHANNEL_MAX ~= 95 + * + * Incidentally, (95+45)/2 = 70, which is our default center channel. + * + * When you apply the MAX and MIN values, the radio stack will automatically + * make sure you're within bounds when you set the frequency or channel during + * runtime. + * + * We defined the minimum and maximum channels for the various bands below + * so they generally stay within the limits of the CC1101 radio defined in the + * datasheet. + */ + + + +/***************** 433 MHz Matching Network ****************/ + +// Default channel is at 433.191833 MHz +#ifndef CC1101_DEFAULT_CHANNEL +#define CC1101_DEFAULT_CHANNEL 161 +#endif + +#ifndef CC1101_CHANNEL_MIN +#define CC1101_CHANNEL_MIN 0 +#endif + +#ifndef CC1101_CHANNEL_MAX +#define CC1101_CHANNEL_MAX 255 +#endif + +enum { + CC1101_LOWEST_FREQ = 400998, + CC1101_DEFAULT_FREQ2 = 0x0F, + CC1101_DEFAULT_FREQ1 = 0x6C, + CC1101_DEFAULT_FREQ0 = 0x4E, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1101_PA_PLUS_10 = 0xC0, + CC1101_PA_PLUS_5 = 0x85, + CC1101_PA_PLUS_0 = 0x60, + CC1101_PA_MINUS_5 = 0x57, + CC1101_PA_MINUS_10 = 0x26, +}; + +#ifndef CC1101_PA +#define CC1101_PA CC1101_PA_PLUS_0 +#endif + + +/** + * These are used for calculating channels at runtime + */ +#define CC1101_CHANNEL_WIDTH 199 // kHz : Do not edit + +#if (CC1101_BAUD == CC1101_1_2K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1101_CONFIG_IOCFG0 = 0x01, + + CC1101_CONFIG_FIFOTHR = 0x0F, + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x06, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0xF5, + CC1101_CONFIG_MDMCFG3 = 0x83, + CC1101_CONFIG_MDMCFG2 = 0x03, // 0x03 = no manchester + CC1101_CONFIG_MDMCFG1 = 0x22, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x15, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x16, + CC1101_CONFIG_BSCFG = 0x6C, + CC1101_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0x91, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0x56, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xE9, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x81, + CC1101_CONFIG_TEST1 = 0x35, + CC1101_CONFIG_TEST0 = 0x0B, + +}; // end 1.2 + +#elif (CC1101_BAUD == CC1101_2_4K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1101_CONFIG_IOCFG0 = 0x01, + + CC1101_CONFIG_FIFOTHR = 0x0F, + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x06, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0xF5, + CC1101_CONFIG_MDMCFG3 = 0x83, + CC1101_CONFIG_MDMCFG2 = 0x03, // 0x03 = no manchester + CC1101_CONFIG_MDMCFG1 = 0x22, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x15, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x16, + CC1101_CONFIG_BSCFG = 0x6C, + CC1101_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0x91, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0x56, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xE9, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x81, + CC1101_CONFIG_TEST1 = 0x35, + CC1101_CONFIG_TEST0 = 0x0B, + +}; // end 2.4 + +#elif (CC1101_BAUD == CC1101_10K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts at the end of a received packet */ + CC1101_CONFIG_IOCFG0 = 0x01, + + /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ + CC1101_CONFIG_FIFOTHR = 0x0F, + + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x06, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0xC8, + CC1101_CONFIG_MDMCFG3 = 0x93, + CC1101_CONFIG_MDMCFG2 = 0x1B, // GFSK. 0x13 = no manchester / 0x1B = with manch. + CC1101_CONFIG_MDMCFG1 = 0x22, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x34, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x16, + CC1101_CONFIG_BSCFG = 0x6C, + CC1101_CONFIG_AGCTRL2 = 0x43, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0x91, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0x56, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xE9, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x81, + CC1101_CONFIG_TEST1 = 0x35, + CC1101_CONFIG_TEST0 = 0x0B, + +}; // end 10k baud + +#elif (CC1101_BAUD == CC1101_26K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts at the end of a received packet */ + CC1101_CONFIG_IOCFG0 = 0x01, + + /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ + CC1101_CONFIG_FIFOTHR = 0x0F, + + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x06, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0xFA, + CC1101_CONFIG_MDMCFG3 = 0x06, + CC1101_CONFIG_MDMCFG2 = 0x73, + CC1101_CONFIG_MDMCFG1 = 0x22, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x00, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x16, + CC1101_CONFIG_BSCFG = 0x6C, + CC1101_CONFIG_AGCTRL2 = 0x03, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0x91, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0x56, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xE9, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x81, + CC1101_CONFIG_TEST1 = 0x35, + CC1101_CONFIG_TEST0 = 0x09, + +}; // end 26 + +#elif (CC1101_BAUD == CC1101_38_4K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1101_CONFIG_IOCFG0 = 0x01, + + CC1101_CONFIG_FIFOTHR = 0x0F, + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x06, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0xCA, + CC1101_CONFIG_MDMCFG3 = 0x83, + CC1101_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester / 0x0B = with manch. + CC1101_CONFIG_MDMCFG1 = 0x22, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x34, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x16, + CC1101_CONFIG_BSCFG = 0x6C, + CC1101_CONFIG_AGCTRL2 = 0x43, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x40, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0x91, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0x56, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xE9, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x81, + CC1101_CONFIG_TEST1 = 0x35, + CC1101_CONFIG_TEST0 = 0x0B, + +}; // end 38.4 + +#elif (CC1101_BAUD == CC1101_76_8K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1101_CONFIG_IOCFG0 = 0x01, + + CC1101_CONFIG_FIFOTHR = 0x0F, + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x06, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0x7B, + CC1101_CONFIG_MDMCFG3 = 0x83, + CC1101_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester / 0x0B = with manch. + CC1101_CONFIG_MDMCFG1 = 0x22, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x42, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x1D, + CC1101_CONFIG_BSCFG = 0x1C, + CC1101_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0xB2, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0xB6, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xEA, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x81, + CC1101_CONFIG_TEST1 = 0x35, + CC1101_CONFIG_TEST0 = 0x0B, + +}; // end 76.8 + +#elif (CC1101_BAUD == CC1101_100K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1101_CONFIG_IOCFG0 = 0x01, + + CC1101_CONFIG_FIFOTHR = 0x0F, + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x06, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0x5B, + CC1101_CONFIG_MDMCFG3 = 0xF8, + CC1101_CONFIG_MDMCFG2 = 0x1B, // 0x13 = no manchester + CC1101_CONFIG_MDMCFG1 = 0x22, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x47, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x1D, + CC1101_CONFIG_BSCFG = 0x1C, + CC1101_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0xB2, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0xB6, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xEA, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x81, + CC1101_CONFIG_TEST1 = 0x35, + CC1101_CONFIG_TEST0 = 0x0B, + +}; // end 100 + +#elif (CC1101_BAUD == CC1101_150K) + +enum CC1101_config_reg_state_enums { + CC1101_CONFIG_IOCFG2 = 0x29, // 0x00, GDO2 Output Pin Config + CC1101_CONFIG_IOCFG1 = 0x2E, // 0x01, GDO1 Output Pin Config + CC1101_CONFIG_IOCFG0 = 0x01, // 0x02, GDO0 Output Pin Config + CC1101_CONFIG_FIFOTHR = 0x0F, // 0x03, RX FIFO and TX FIFO Thresholds + CC1101_CONFIG_SYNC1 = 0xD3, // 0x04, Sync Word, High Byte + CC1101_CONFIG_SYNC0 = 0x91, // 0x05, Sync Word, Low Byte + CC1101_CONFIG_PKTLEN = 0x3D, // 0x06, Packet Length + CC1101_CONFIG_PKTCTRL1 = 0x24, // 0x07, Packet Automation Control + CC1101_CONFIG_PKTCTRL0 = 0x45, // 0x08, Packet Automation Control + CC1101_CONFIG_ADDR = 0x00, // 0x09, Device Address + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, // 0x0A, Channel Number + CC1101_CONFIG_FSCTRL1 = 0x0E, // 0x0B, Frequency Synthesizer Control + CC1101_CONFIG_FSCTRL0 = 0x00, // 0x0C, Frequency Synthesizer Control + CC1101_CONFIG_FREQ2 = 0x0F, // 0x0D, Frequency Control Word, High + CC1101_CONFIG_FREQ1 = 0x6C, // 0x0E, Frequency Control Word, Middle + CC1101_CONFIG_FREQ0 = 0x4E, // 0x0F, Frequency Control Word, Low + CC1101_CONFIG_MDMCFG4 = 0x0C, // 0x10, Modem Config + CC1101_CONFIG_MDMCFG3 = 0x3B, // 0x11, Modem Config + CC1101_CONFIG_MDMCFG2 = 0x73, // 0x12, Modem Config + CC1101_CONFIG_MDMCFG1 = 0x42, // 0x13, Modem Config + CC1101_CONFIG_MDMCFG0 = 0xF8, // 0x14, Modem Config + CC1101_CONFIG_DEVIATN = 0x00, // 0x15, Modem Deviation Setting + CC1101_CONFIG_MCSM2 = 0x07, // 0x16, Main Radio Control State Machine Config + CC1101_CONFIG_MCSM1 = 0x3F, // 0x17, Main Radio Control State Machine Config + CC1101_CONFIG_MCSM0 = 0x18, // 0x18, Main Radio Control State Machine Config + CC1101_CONFIG_FOCCFG = 0x1D, // 0x19, Frequency Offset Compensation Config + CC1101_CONFIG_BSCFG = 0x1C, // 0x1A, Bit Sync Config + CC1101_CONFIG_AGCTRL2 = 0xC7, // 0x1B, AGC Control + CC1101_CONFIG_AGCTRL1 = 0x00, // 0x1C, AGC Control + CC1101_CONFIG_AGCTRL0 = 0xB0, // 0x1D, AGC Control + CC1101_CONFIG_WOREVT1 = 0x87, // 0x1E, High Byte Event0 Timeout + CC1101_CONFIG_WOREVT0 = 0x6B, // 0x1F, Low Byte Event0 Timeout + CC1101_CONFIG_WORCTRL = 0xF8, // 0x20, Wake On Radio Control + CC1101_CONFIG_FREND1 = 0xB6, // 0x21, Front End RX Config + CC1101_CONFIG_FREND0 = 0x10, // 0x22, Front End TX Config + CC1101_CONFIG_FSCAL3 = 0xEA, // 0x23, Frequency Synthesizer Calibration + CC1101_CONFIG_FSCAL2 = 0x2A, // 0x24, Frequency Synthesizer Calibration + CC1101_CONFIG_FSCAL1 = 0x00, // 0x25, Frequency Synthesizer Calibration + CC1101_CONFIG_FSCAL0 = 0x1F, // 0x26, Frequency Synthesizer Calibration + CC1101_CONFIG_RCCTRL1 = 0x41, // 0x27, RC Oscillator Config + CC1101_CONFIG_RCCTRL0 = 0x00, // 0x28, RC Oscillator Config + CC1101_CONFIG_FSTEST = 0x59, // 0x29, Frequency Synthesizer Calibration Control + CC1101_CONFIG_PTEST = 0x7F, // 0x2A, Production Test + CC1101_CONFIG_AGCTST = 0x3F, // 0x2B, AGC Test + CC1101_CONFIG_TEST2 = 0x88, // 0x2D, Varoius Test Setting + CC1101_CONFIG_TEST1 = 0x31, // 0x2E, Varoius Test Setting + CC1101_CONFIG_TEST0 = 0x0B // 0x2F, Varoius Test Setting +}; // end 150 + +#elif (CC1101_BAUD == CC1101_250K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1101_CONFIG_IOCFG0 = 0x01, + + CC1101_CONFIG_FIFOTHR = 0x0F, + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x0C, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0x2D, + CC1101_CONFIG_MDMCFG3 = 0x3B, + CC1101_CONFIG_MDMCFG2 = 0x0B, // 0x03 = no manchester + CC1101_CONFIG_MDMCFG1 = 0x22, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x62, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x1D, + CC1101_CONFIG_BSCFG = 0x1C, + CC1101_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0xB0, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0xB6, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xEA, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x88, + CC1101_CONFIG_TEST1 = 0x31, + CC1101_CONFIG_TEST0 = 0x0B, + +}; // end 250 + +#elif (CC1101_BAUD == CC1101_500K) + +enum CC1101_config_reg_state_enums { + /** GDO2 is CHIP_RDY, even when the chip is first powered */ + CC1101_CONFIG_IOCFG2 = 0x29, + + /** GDO1 is High Impedance */ + CC1101_CONFIG_IOCFG1 = 0x2E, + + /** GDO0 asserts when there is data in the RX FIFO */ + CC1101_CONFIG_IOCFG0 = 0x01, + + CC1101_CONFIG_FIFOTHR = 0x0F, + CC1101_CONFIG_SYNC1 = 0xD3, + CC1101_CONFIG_SYNC0 = 0x91, + + /** Maximum variable packet length is 61 per Errata */ + CC1101_CONFIG_PKTLEN = 0x3D, + + /** No hw address recognition for better ack rate, append 2 status bytes */ + CC1101_CONFIG_PKTCTRL1 = 0x24, + + /** CRC appending, variable length packets */ + CC1101_CONFIG_PKTCTRL0 = 0x45, + + CC1101_CONFIG_ADDR = 0x00, + + CC1101_CONFIG_CHANNR = CC1101_DEFAULT_CHANNEL, + + CC1101_CONFIG_FSCTRL1 = 0x0E, + CC1101_CONFIG_FSCTRL0 = 0x00, + + CC1101_CONFIG_FREQ2 = CC1101_DEFAULT_FREQ2, + CC1101_CONFIG_FREQ1 = CC1101_DEFAULT_FREQ1, + CC1101_CONFIG_FREQ0 = CC1101_DEFAULT_FREQ0, + + CC1101_CONFIG_MDMCFG4 = 0x0E, + CC1101_CONFIG_MDMCFG3 = 0x3B, + CC1101_CONFIG_MDMCFG2 = 0x73, + CC1101_CONFIG_MDMCFG1 = 0x42, + CC1101_CONFIG_MDMCFG0 = 0xF8, + CC1101_CONFIG_DEVIATN = 0x00, + CC1101_CONFIG_MCSM2 = 0x07, + + /** TX on CCA; Stay in Rx after Rx and Tx */ + CC1101_CONFIG_MCSM1 = 0x3F, + + /** I experimented with a cal every 4th time, but I never saw any, ever..? */ + CC1101_CONFIG_MCSM0 = 0x18, + + CC1101_CONFIG_FOCCFG = 0x1D, + CC1101_CONFIG_BSCFG = 0x1C, + CC1101_CONFIG_AGCTRL2 = 0xC7, // If no Tx, lower LNA's (look at AGC) + CC1101_CONFIG_AGCTRL1 = 0x00, // CCA thresholds + CC1101_CONFIG_AGCTRL0 = 0xB0, + + CC1101_CONFIG_WOREVT1 = 0x87, + CC1101_CONFIG_WOREVT0 = 0x6B, + CC1101_CONFIG_WORCTRL = 0xF8, + CC1101_CONFIG_FREND1 = 0xB6, + CC1101_CONFIG_FREND0 = 0x10, + CC1101_CONFIG_FSCAL3 = 0xEA, + CC1101_CONFIG_FSCAL2 = 0x2A, + CC1101_CONFIG_FSCAL1 = 0x00, + CC1101_CONFIG_FSCAL0 = 0x1F, + + CC1101_CONFIG_RCCTRL1 = 0x41, + CC1101_CONFIG_RCCTRL0 = 0x00, + CC1101_CONFIG_FSTEST = 0x59, + CC1101_CONFIG_PTEST = 0x7F, + CC1101_CONFIG_AGCTST = 0x3F, + CC1101_CONFIG_TEST2 = 0x88, + CC1101_CONFIG_TEST1 = 0x31, + CC1101_CONFIG_TEST0 = 0x0B, + +}; +#else +#error "Baud rate not defined" +#endif #endif // __CC1101DRIVERLAYER_H__ diff --git a/tos/chips/cc1101/CC1101DriverLayerC.nc b/tos/chips/cc1101/CC1101DriverLayerC.nc index cc5723003d..1b570413c0 100644 --- a/tos/chips/cc1101/CC1101DriverLayerC.nc +++ b/tos/chips/cc1101/CC1101DriverLayerC.nc @@ -98,9 +98,10 @@ implementation RadioAlarm = DriverLayerP.RadioAlarm; DriverLayerP.SpiResource -> HplC.SpiResource; - DriverLayerP.FastSpiByte -> HplC; + DriverLayerP.SpiByte -> HplC; + DriverLayerP.SpiBlock -> HplC; - DriverLayerP.GDO0Capture -> HplC; + DriverLayerP.Gdo0Capture -> HplC; DriverLayerP.Tasklet -> TaskletC; DriverLayerP.BusyWait -> BusyWaitMicroC; diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 4b56ba612f..86f2e660a8 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -54,10 +54,11 @@ module CC1101DriverLayerP interface CC1101DriverConfig as Config; interface SpiByte; + interface SpiBlock; interface GeneralIO as CSN; interface GeneralIO as GDO0; interface GeneralIO as GDO2; - interface GpioCapture as GDO0Capture; + interface GpioCapture as Gdo0Capture; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; @@ -104,7 +105,6 @@ implementation { STATE_POR = 0, STATE_PD = 1, - STATE_PD_2_IDLE = 2, STATE_IDLE = 3, STATE_IDLE_2_RX_ON = 4, STATE_RX_ON = 5, @@ -143,9 +143,9 @@ implementation #endif - // flag: RX SFD was captured, but not yet processed - norace bool rxSfd = 0; - // flag: end of TX event (falling SFD edge) was captured, but not yet processed + // flag: RX GDO0 was captured, but not yet processed + norace bool rxGdo0 = 0; + // flag: end of TX event (falling GDO0 edge) was captured, but not yet processed norace bool txEnd = 0; tasklet_norace uint8_t txPower; @@ -157,25 +157,100 @@ implementation #endif message_t rxMsgBuffer; - norace uint16_t capturedTime; // time when the last SFD rising edge was captured + + // initial CC1101 configuration + + uint8_t configRegs[] = { + CC1101_CONFIG_IOCFG2, + CC1101_CONFIG_IOCFG1, + CC1101_CONFIG_IOCFG0, + CC1101_CONFIG_FIFOTHR, + CC1101_CONFIG_SYNC1, + CC1101_CONFIG_SYNC0, + CC1101_CONFIG_PKTLEN, + CC1101_CONFIG_PKTCTRL1, + CC1101_CONFIG_PKTCTRL0, + CC1101_CONFIG_ADDR, + CC1101_CONFIG_CHANNR, + CC1101_CONFIG_FSCTRL1, + CC1101_CONFIG_FSCTRL0, + CC1101_CONFIG_FREQ2, + CC1101_CONFIG_FREQ1, + CC1101_CONFIG_FREQ0, + CC1101_CONFIG_MDMCFG4, + CC1101_CONFIG_MDMCFG3, + CC1101_CONFIG_MDMCFG2, + CC1101_CONFIG_MDMCFG1, + CC1101_CONFIG_MDMCFG0, + CC1101_CONFIG_DEVIATN, + CC1101_CONFIG_MCSM2, + CC1101_CONFIG_MCSM1, + CC1101_CONFIG_MCSM0, + CC1101_CONFIG_FOCCFG, + CC1101_CONFIG_BSCFG, + CC1101_CONFIG_AGCTRL2, + CC1101_CONFIG_AGCTRL1, + CC1101_CONFIG_AGCTRL0, + CC1101_CONFIG_WOREVT1, + CC1101_CONFIG_WOREVT0, + CC1101_CONFIG_WORCTRL, + CC1101_CONFIG_FREND1, + CC1101_CONFIG_FREND0, + CC1101_CONFIG_FSCAL3, + CC1101_CONFIG_FSCAL2, + CC1101_CONFIG_FSCAL1, + CC1101_CONFIG_FSCAL0, + CC1101_CONFIG_RCCTRL1, + CC1101_CONFIG_RCCTRL0, + CC1101_CONFIG_FSTEST, + CC1101_CONFIG_PTEST, + CC1101_CONFIG_AGCTST, + CC1101_CONFIG_TEST2, + CC1101_CONFIG_TEST1, + CC1101_CONFIG_TEST0 + }; + + uint8_t configRegSize = 47; + + + norace uint16_t capturedTime; // time when the last GDO0 rising edge was captured inline cc1101_status_t getStatus(); - inline cc1101_status_t enableReceiveSfd(); + inline cc1101_status_t enableReceiveGdo(); /*----------------- ALARM -----------------*/ tasklet_async event void RadioAlarm.fired() { - if( state == STATE_PD_2_IDLE ) { - state = STATE_IDLE; - if( cmd == CMD_STANDBY ) + cc1101_status_t status; + if( state == STATE_IDLE_2_RX_ON ) { + status = getStatus(); + if( call DiagMsg.record() ) + { + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.str("alrm"); + call DiagMsg.str("s="); + call DiagMsg.uint8(state); + call DiagMsg.str("c="); + call DiagMsg.uint8(cmd); + if(rxGdo0) + call DiagMsg.str("rxGdo0"); + if(txEnd) + call DiagMsg.str("txEnd"); + if(call GDO0.get()) + call DiagMsg.str("GDO0"); + call DiagMsg.str("st="); + call DiagMsg.uint8(status.value); + + call DiagMsg.send(); + } + if (status.state == CC1101_STATE_RX){ + state = STATE_RX_ON; cmd = CMD_SIGNAL_DONE; - } - else if( state == STATE_IDLE_2_RX_ON ) { - state = STATE_RX_ON; - cmd = CMD_SIGNAL_DONE; - // in receive mode, enable SFD capture - RADIO_ASSERT(call SFD.get() == 0); - enableReceiveSfd(); + // in receive mode, enable GDO0 capture + enableReceiveGdo(); + } else { + call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods + } } else RADIO_ASSERT(FALSE); @@ -196,10 +271,8 @@ implementation call CSN.set(); call CSN.clr(); - call FastSpiByte.splitWrite(CC1101_CMD_REGISTER_READ | reg); - call FastSpiByte.splitReadWrite(0); - value = ((uint16_t)call FastSpiByte.splitReadWrite(0) << 8); - value += call FastSpiByte.splitRead(); + call SpiByte.write(CC1101_CMD_REGISTER_WRITE | reg); + value = call SpiByte.write(0); call CSN.set(); return value; @@ -223,7 +296,17 @@ implementation } inline cc1101_status_t getStatus() { - return strobe(CC1101_SNOP); + int8_t value1 = 0, value2 = 0; + cc1101_status_t status; + + value1 = strobe(CC1101_SNOP).value; + do { + value2 = value1; + value1 = strobe(CC1101_SNOP).value; + }while(value1 != value2); + + status.value = value1; + return status; } inline cc1101_status_t writeRegister(uint8_t reg, uint8_t value) @@ -237,47 +320,43 @@ implementation call CSN.clr(); call SpiByte.write(CC1101_CMD_REGISTER_WRITE | reg); - status.value = call SpiByte.readWrite(value); + status.value = call SpiByte.write(value); call CSN.set(); return status; } - inline cc1101_status_t writeTxFifo(uint8_t* data, uint8_t length) + inline cc1101_status_t burstWrite(uint8_t addr,uint8_t* data, uint8_t length) { cc1101_status_t status; - uint8_t idx; - RADIO_ASSERT( call SpiResource.isOwner() ); - call CSN.set(); - call CSN.clr(); + status.value = call SpiByte.write(CC1101_CMD_REGISTER_WRITE | CC1101_CMD_BURST_MODE | addr); + call SpiBlock.transfer(data, NULL, length); - call FastSpiByte.splitWrite(CC1101_CMD_REGISTER_WRITE | CC1101_TXFIFO); - for(idx = 0; idx + +configuration ActiveMessageC +{ + provides + { + interface SplitControl; + + interface AMSend[uint8_t id]; + interface Receive[uint8_t id]; + interface Receive as Snoop[uint8_t id]; + interface SendNotifier[am_id_t id]; + + interface Packet; + interface AMPacket; -implementation { - - components BlazeC; - components CC1100ControlC; - - SplitControl = BlazeC.SplitControl; - BlazeSplitControl = BlazeC.BlazeSplitControl; - AMSend = BlazeC; - Receive = BlazeC.Receive; - Snoop = BlazeC.Snoop; - Packet = BlazeC; - AMPacket = BlazeC; - PacketAcknowledgements = BlazeC; - RadioSelect = BlazeC; - PacketLink = BlazeC; - BlazePacket = BlazeC; - Csma = BlazeC; - + interface PacketAcknowledgements; + interface LowPowerListening; + interface PacketLink; + interface RadioChannel; + + /*interface PacketTimeStamp as PacketTimeStampMicro;*/ + interface PacketTimeStamp as PacketTimeStampMilli; + } } +implementation +{ + components CC1101ActiveMessageC as MessageC; + + SplitControl = MessageC; + + AMSend = MessageC; + Receive = MessageC.Receive; + Snoop = MessageC.Snoop; + SendNotifier = MessageC; + + Packet = MessageC; + AMPacket = MessageC; + + PacketAcknowledgements = MessageC; + LowPowerListening = MessageC; + PacketLink = MessageC; + RadioChannel = MessageC; + + PacketTimeStampMilli = MessageC; + /*PacketTimeStampMicro = MessageC;*/ +} diff --git a/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc b/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc new file mode 100644 index 0000000000..843cf30b0d --- /dev/null +++ b/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +configuration HplCC1101C { + provides { + interface Resource as SpiResource; + interface SpiByte; + interface SpiBlock; + interface GeneralIO as CSN; + interface GeneralIO as GDO0; + interface GeneralIO as GDO2; + interface GpioCapture as Gdo0Capture; + /*interface GpioCapture as Gdo2Capture;*/ + + interface LocalTime as LocalTimeRadio; + interface Init; + interface Alarm; + } +} +implementation { + + components HplMsp430GeneralIOC as IO, new Msp430UsciSpiB0C() as SpiC; + + // pins + components new Msp430GpioC() as CSNM; + components new Msp430GpioC() as GDO0M; + components new Msp430GpioC() as GDO2M; + + CSNM -> IO.Port26; + GDO0M -> IO.Port23; + GDO2M -> IO.Port24; + + CSN = CSNM; + GDO0 = GDO0M; + GDO2 = GDO2M; + + // spi + SpiResource = SpiC.Resource; + SpiByte = SpiC; + SpiBlock = SpiC; + + components HplRadioSpiP; + SpiC.Msp430UsciConfigure -> HplRadioSpiP; + + // capture + components Msp430TimerC as TimerC; + components new GpioCaptureC(); + GpioCaptureC.Msp430TimerControl -> TimerC.Control2_A0; + GpioCaptureC.Msp430Capture -> TimerC.Capture2_A0; + GpioCaptureC.GeneralIO -> IO.Port23; + Gdo0Capture = GpioCaptureC; + + // alarm + components new Alarm32khz16C() as AlarmC; + Alarm = AlarmC; + Init = AlarmC; + + // localTime + components LocalTime32khzC; + LocalTimeRadio = LocalTime32khzC.LocalTime; + +} diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h new file mode 100644 index 0000000000..13ac2447f7 --- /dev/null +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -0,0 +1,60 @@ + +/* + * Copyright (c) 2007, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Miklos Maroti + */ + +#ifndef __RADIOCONFIG_H__ +#define __RADIOCONFIG_H__ + +#include +/** + * This is the timer type of the radio alarm interface + */ +typedef T32khz TRadio; +typedef uint16_t tradio_size; + + +/** + * The number of radio alarm ticks per one microsecond (0.9216). + * We use integers and no parentheses just to make deputy happy. + * Ok, further hacks were required for deputy, I removed 00 from the + * beginning and end to ba able to handle longer wait periods. + */ +//TODO: Determine this value +#define RADIO_ALARM_MICROSEC 4UL + +/** + * The base two logarithm of the number of radio alarm ticks per one millisecond + */ +#define RADIO_ALARM_MILLI_EXP 12UL +#endif diff --git a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc index 2ddbc6b1fb..442ee7552c 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc @@ -48,10 +48,10 @@ configuration PlatformUsciMapC { UartA1C.URXD -> GIO.UCA1RXD; UartA1C.UTXD -> GIO.UCA1TXD; - /*components Msp430UsciSpiA0P as SpiA0C;*/ - /*SpiA0C.SIMO -> GIO.UCA0SIMO;*/ - /*SpiA0C.SOMI -> GIO.UCA0SOMI;*/ - /*SpiA0C.CLK -> GIO.UCA0CLK;*/ + components Msp430UsciSpiA0P as SpiA0C; + SpiA0C.SIMO -> GIO.UCA0SIMO; + SpiA0C.SOMI -> GIO.UCA0SOMI; + SpiA0C.CLK -> GIO.UCA0CLK; components Msp430UsciSpiB0P as SpiB0C; SpiB0C.SIMO -> GIO.UCB0SIMO; diff --git a/tos/platforms/exp430/platform_message.h b/tos/platforms/exp430/platform_message.h index c5885c4d80..fa685bf1ca 100644 --- a/tos/platforms/exp430/platform_message.h +++ b/tos/platforms/exp430/platform_message.h @@ -1,31 +1,36 @@ - -/* $Id$ - * "Copyright (c) 2005 The Regents of the University of California. +/* + * Copyright (c) 2005 The Regents of the University of California. + * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF - * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * Copyright (c) 2002-2005 Intel Corporation - * All rights reserved. + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. * - * This file is distributed under the terms in the attached INTEL-LICENSE - * file. If you do not find these files, copies can be found by writing to - * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, - * 94704. Attention: Intel License Inquiry. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @@ -33,27 +38,25 @@ * chip-specific CC1000 packet structures. * * @author Philip Levis - * @version $Revision$ $Date$ */ - #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H -#include +#include #include typedef union message_header { - blaze_header_t blaze; + cc1101packet_header_t cc1101; serial_header_t serial; } message_header_t; typedef union TOSRadioFooter { - blaze_footer_t blaze; + cc1101packet_footer_t cc1101; } message_footer_t; typedef union TOSRadioMetadata { - blaze_metadata_t blaze; + cc1101packet_metadata_t cc1101; } message_metadata_t; #endif From c9f3d8a7bf6f19be7d82c99478b7e29e4e18d7d5 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 22 Jul 2013 16:54:50 -0500 Subject: [PATCH 362/411] Implemented Transmit mode. Can now transmit and receive packets using rfxlink --- tos/chips/cc1101/CC1101DriverLayerP.nc | 239 ++++++++++++------------ tos/platforms/exp430/Ieee154MessageC.nc | 2 +- 2 files changed, 117 insertions(+), 124 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 86f2e660a8..ae969c79b7 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -224,6 +224,7 @@ implementation cc1101_status_t status; if( state == STATE_IDLE_2_RX_ON ) { status = getStatus(); +#ifdef RADIO_DEBUG_STATE if( call DiagMsg.record() ) { call DiagMsg.uint16(call RadioAlarm.getNow()); @@ -243,6 +244,7 @@ implementation call DiagMsg.send(); } +#endif if (status.state == CC1101_STATE_RX){ state = STATE_RX_ON; cmd = CMD_SIGNAL_DONE; @@ -251,8 +253,7 @@ implementation } else { call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods } - } - else + } else RADIO_ASSERT(FALSE); // make sure the rest of the command processing is called @@ -360,6 +361,7 @@ implementation inline cc1101_status_t readLengthFromRxFifo(uint8_t* lengthPtr) { cc1101_status_t status; + uint8_t pkt_status; RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( call CSN.get() == 1 ); @@ -368,9 +370,12 @@ implementation call CSN.set(); // set CSN, just in clase it's not set call CSN.clr(); // clear CSN, starting a multi-byte SPI command + burstRead(CC1101_PKTSTATUS, &pkt_status, 1); + + /*status.value = call SpiByte.write(CC1101_CMD_REGISTER_READ | CC1101_CMD_BURST_MODE | CC1101_RXBYTES);*/ + /**lengthPtr = call SpiByte.write(0);*/ - status.value = call SpiByte.write(CC1101_CMD_REGISTER_WRITE | CC1101_RXBYTES); - *lengthPtr = call SpiByte.write(0); + status = burstRead(CC1101_RXBYTES, lengthPtr, 1); RADIO_ASSERT(status.chip_rdyn == 0); RADIO_ASSERT(status.state == CC1101_STATE_RX); @@ -590,6 +595,7 @@ implementation inline void changeState() { +#ifdef RADIO_DEBUG_STATE if( call DiagMsg.record() ) { call DiagMsg.uint16(call RadioAlarm.getNow()); @@ -601,6 +607,7 @@ implementation call DiagMsg.str("l="); call DiagMsg.send(); } +#endif if( (cmd == CMD_STANDBY || cmd == CMD_TURNON) && state == STATE_PD && isSpiAcquired() && call RadioAlarm.isFree() ) @@ -724,7 +731,6 @@ implementation tasklet_async command error_t RadioSend.send(message_t* msg) { -#if 0 uint16_t time; uint8_t p; uint8_t length; @@ -741,53 +747,31 @@ implementation if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd ) return EBUSY; - p = (call PacketTransmitPower.isSet(msg) ? - call PacketTransmitPower.get(msg) : CC1101_DEF_RFPOWER) & CC1101_TX_PWR_MASK; - - if( p != txPower ) - { - cc1101_txctrl_t txctrl = cc1101_txctrl_default; - - txPower = p; - - txctrl.f.pa_level = txPower; - writeRegister(CC1101_TXCTRL, txctrl.value); - } - - if( call Config.requiresRssiCca(msg) && !call CCA.get() ) - return EBUSY; + /* + *if( call Config.requiresRssiCca(msg) && !call CCA.get() ) + * return EBUSY; + */ data = getPayload(msg); - length = getHeader(msg)->length; + length = call RadioPacket.payloadLength(msg); - // length | data[0] ... data[length-3] | automatically generated FCS - - header = call Config.headerPreloadLength(); - if( header > length ) - header = length; - - length -= header; + // start transmission + status = strobe(CC1101_STX); + // Wait until TX mode + do{ + status = getStatus(); + }while(status.state != CC1101_STATE_TX); // first upload the header to gain some time call CSN.set(); call CSN.clr(); - writeTxFifo(data, header); + writeTxFifo(data, length); call CSN.set(); atomic { - // there's a chance that there was a receive GDO0 interrupt in such a short time - // clean up the TXFIFO and bail out - if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || rxGdo0 || call GDO0.get() == 1 ) { - // discard header we wrote to TXFIFO - strobe(CC1101_SFLUSHTX); - // and bail out - return EBUSY; - } #ifdef RADIO_DEBUG sfd1 = call GDO0.get(); #endif - // start transmission - status = strobe(CC1101_STXON); #ifdef RADIO_DEBUG sfd2 = call GDO0.get(); #endif @@ -799,75 +783,81 @@ implementation #ifdef RADIO_DEBUG sfd3 = call GDO0.get(); #endif - call Gdo0Capture.captureFallingEdge(); + /*call Gdo0Capture.captureFallingEdge();*/ + call Gdo0Capture.disable(); #ifdef RADIO_DEBUG sfd4 = call GDO0.get(); #endif } - //RADIO_ASSERT(sfd1 == 0); +#ifdef RADIO_DEBUG + RADIO_ASSERT(sfd1 == 0); RADIO_ASSERT(sfd2 == 0); RADIO_ASSERT(sfd3 == 0); RADIO_ASSERT(sfd4 == 0); +#endif - timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; - - if( timesync == 0 ) { - // no timesync: write the entire payload to the fifo - if(length>0){ - call CSN.set(); - call CSN.clr(); - writeTxFifo(data+header, length - 1); - state = STATE_BUSY_TX_2_RX_ON; - call CSN.set(); - } - } else { - // timesync required: write the payload before the timesync bytes to the fifo - // TODO: we're assuming here that the timestamp is at the end of the message - call CSN.set(); - call CSN.clr(); - writeTxFifo(data+header, length - sizeof(timesync_relative) - 1); - call CSN.set(); - } - - - // compute timesync - sfdTime = time; - - // read both clocks - atomic { - time = call RadioAlarm.getNow(); - time32 = call LocalTime.get(); - } - - // adjust time32 with the time elapsed since the GDO0 event - time -= sfdTime; - time32 -= time; - - // adjust for delay between the STXON strobe and the transmission of the GDO0 - time32 += TX_SFD_DELAY; - - call PacketTimeStamp.set(msg, time32); - - if( timesync != 0 ) { - // read and adjust the timestamp field - timesync_relative = (*(timesync_absolute_t*)timesync) - time32; +/* + * timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; + * + * if( timesync == 0 ) { + * // no timesync: write the entire payload to the fifo + * if(length>0){ + * call CSN.set(); + * call CSN.clr(); + * writeTxFifo(data+header, length - 1); + * state = STATE_BUSY_TX_2_RX_ON; + * call CSN.set(); + * } + * } else { + * // timesync required: write the payload before the timesync bytes to the fifo + * // TODO: we're assuming here that the timestamp is at the end of the message + * call CSN.set(); + * call CSN.clr(); + * writeTxFifo(data+header, length - sizeof(timesync_relative) - 1); + * call CSN.set(); + * } + * + * + * // compute timesync + * sfdTime = time; + * + * // read both clocks + * atomic { + * time = call RadioAlarm.getNow(); + * time32 = call LocalTime.get(); + * } + * + * // adjust time32 with the time elapsed since the GDO0 event + * time -= sfdTime; + * time32 -= time; + * + * // adjust for delay between the STXON strobe and the transmission of the GDO0 + * time32 += TX_SFD_DELAY; + * + * call PacketTimeStamp.set(msg, time32); + * + * if( timesync != 0 ) { + * // read and adjust the timestamp field + * timesync_relative = (*(timesync_absolute_t*)timesync) - time32; + * + * // write it to the fifo + * // TODO: we're assuming here that the timestamp is at the end of the message + * call CSN.set(); + * call CSN.clr(); + * writeTxFifo((uint8_t*)(×ync_relative), sizeof(timesync_relative)); + * call CSN.set(); + * state = STATE_BUSY_TX_2_RX_ON; + * } + */ - // write it to the fifo - // TODO: we're assuming here that the timestamp is at the end of the message - call CSN.set(); - call CSN.clr(); - writeTxFifo((uint8_t*)(×ync_relative), sizeof(timesync_relative)); - call CSN.set(); - state = STATE_BUSY_TX_2_RX_ON; - } #ifdef RADIO_DEBUG_MESSAGES txMsg = msg; if( call DiagMsg.record() ) { - length = getHeader(msg)->length; + length = call RadioPacket.payloadLength(msg); call DiagMsg.chr('t'); call DiagMsg.uint16(call RadioAlarm.getNow()); @@ -877,9 +867,15 @@ implementation call DiagMsg.send(); } #endif -#endif + // now wait till it goes to RX + do{ + status = getStatus(); + }while(status.state != CC1101_STATE_RX); + + txEnd = TRUE; // GDO0 capture interrupt will be triggered: we'll reenable interrupts from there // and clear the rx fifo -- should something have arrived in the meantime + call Tasklet.schedule(); return SUCCESS; } @@ -900,6 +896,9 @@ implementation /* RADIO_ASSERT(FAIL);*/ /* signal RadioCCA.done(EBUSY);*/ /*}*/ + +#warning "CCA not implemented properly" + signal RadioCCA.done(SUCCESS); return SUCCESS; } @@ -910,28 +909,10 @@ implementation inline cc1101_status_t enableReceiveGdo() { cc1101_status_t status; -/*#ifdef RADIO_DEBUG*/ -/* uint8_t gdo0_1, gdo0_2, gdo0_3;*/ -/*#endif*/ atomic { -/*#ifdef RADIO_DEBUG*/ -/* gdo0_1 = call GDO0.get();*/ -/*#endif*/ - // flush rx fifo - flushRxFifo(); -/*#ifdef RADIO_DEBUG*/ -/* gdo0_2 = call GDO0.get();*/ -/*#endif*/ // ready to receive new message: enable receive GDO0 capture call Gdo0Capture.captureRisingEdge(); -/*#ifdef RADIO_DEBUG*/ -/* gdo0_3 = call GDO0.get();*/ -/*#endif*/ } - // TODO: Add appropriate debugging asserts - /*RADIO_ASSERT(gdo0_1 == 0);*/ - /*RADIO_ASSERT(gdo0_2 == 0);*/ - /*RADIO_ASSERT(gdo0_3 == 0);*/ return status; } @@ -987,12 +968,12 @@ implementation sfdTime = capturedTime; - // data starts after the length field - data = getPayload(rxMsg) + sizeof(cc1101_header_t); + data = getPayload(rxMsg); // read the length byte readLengthFromRxFifo(&length); +#ifdef RADIO_DEBUG_STATE if( call DiagMsg.record() ) { call DiagMsg.uint16(call RadioAlarm.getNow()); @@ -1005,6 +986,7 @@ implementation call DiagMsg.uint8(length); call DiagMsg.send(); } +#endif if (length < 3 || length > call RadioPacket.maxPayloadLength() + 2 ) { // bad length: bail out state = STATE_RX_ON; @@ -1016,11 +998,11 @@ implementation // if we're here, length must be correct RADIO_ASSERT(length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2); - getHeader(rxMsg)->length = length; - // we'll read the FCS/CRC separately length -= 2; + getHeader(rxMsg)->length = length; + // download the whole payload readPayloadFromRxFifo(data, length ); @@ -1047,6 +1029,18 @@ implementation // ready to receive new message: enable GDO0 interrupts enableReceiveGdo(); +#ifdef RADIO_DEBUG_MESSAGES + if( call DiagMsg.record() ) + { + call DiagMsg.str("rmsg"); + call DiagMsg.uint16(call RadioAlarm.getNow() - (uint16_t)call PacketTimeStamp.timestamp(rxMsg) ); + call DiagMsg.uint16(call RadioAlarm.getNow()); + call DiagMsg.uint16(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); + call DiagMsg.int8(length); + call DiagMsg.hex8s(getPayload(rxMsg), length); + call DiagMsg.send(); + } +#endif // bail out if we're not interested in this message if( !signal RadioReceive.header(rxMsg) ) @@ -1124,19 +1118,16 @@ implementation //TODO async event void Gdo0Capture.captured( uint16_t time ) { - - - RADIO_ASSERT( ! rxGdo0 ); // assert that there's no nesting - RADIO_ASSERT( ! txEnd ); // assert that there's no nesting + /*RADIO_ASSERT( ! txEnd ); // assert that there's no nesting*/ call Gdo0Capture.disable(); if(state == STATE_RX_ON) { rxGdo0 = TRUE; capturedTime = time; - } else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON) { - txEnd = TRUE; + /*} else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON) { + txEnd = TRUE; */ } else { // received capture interrupt in an invalid state RADIO_ASSERT(FALSE); @@ -1318,7 +1309,7 @@ implementation async command uint8_t RadioPacket.payloadLength(message_t* msg) { - return getHeader(msg)->length - 2; + return getHeader(msg)->length + 1; } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) @@ -1327,7 +1318,9 @@ implementation RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); // we add the length of the CRC, which is automatically generated - getHeader(msg)->length = length + 2; + /*getHeader(msg)->length = length + 2;*/ + // exclude the length byte + getHeader(msg)->length = length; } async command uint8_t RadioPacket.maxPayloadLength() diff --git a/tos/platforms/exp430/Ieee154MessageC.nc b/tos/platforms/exp430/Ieee154MessageC.nc index 306c3ab3cf..6e3bccea53 100644 --- a/tos/platforms/exp430/Ieee154MessageC.nc +++ b/tos/platforms/exp430/Ieee154MessageC.nc @@ -54,7 +54,7 @@ configuration Ieee154MessageC { } } implementation { - components CC2420Ieee154MessageC as Msg; + components CC1101Ieee154MessageC as Msg; SplitControl = Msg; SendResource = Msg; From e162998cf8fa04521d8e60246f6d730f444330e1 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 23 Jul 2013 16:20:01 -0500 Subject: [PATCH 363/411] Implemented Clear Channel assessment. The CC1101 can perform CCA when transitioning from RX to TX state. This is called TX-if-CCA. With this enabled, RadioCCA.request() returns immediately with SUCCESS and the actual CCA is postponed until RadioSend.send() is called. Furthermore, IOCFG0 is configured to 0x06 in which GDO0 will assert when the sync word has been sent/received. This way, we don't have to poll the chip after filling the TXFIFO to see if it has finished transmitting. --- tos/chips/cc1101/CC1101DriverLayer.h | 20 ++-- tos/chips/cc1101/CC1101DriverLayerP.nc | 95 ++++++++++--------- .../exp430/chips/ccxx00/RadioConfig.h | 4 +- 3 files changed, 62 insertions(+), 57 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h index 086df09559..ad2674d2cf 100644 --- a/tos/chips/cc1101/CC1101DriverLayer.h +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -428,7 +428,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts when there is data in the RX FIFO */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, CC1101_CONFIG_FIFOTHR = 0x0F, CC1101_CONFIG_SYNC1 = 0xD3, @@ -505,7 +505,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts when there is data in the RX FIFO */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, CC1101_CONFIG_FIFOTHR = 0x0F, CC1101_CONFIG_SYNC1 = 0xD3, @@ -582,7 +582,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts at the end of a received packet */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ CC1101_CONFIG_FIFOTHR = 0x0F, @@ -661,7 +661,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts at the end of a received packet */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, /** FIFO Threshold is maxed so we don't try downloading incomplete pkts */ CC1101_CONFIG_FIFOTHR = 0x0F, @@ -740,7 +740,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts when there is data in the RX FIFO */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, CC1101_CONFIG_FIFOTHR = 0x0F, CC1101_CONFIG_SYNC1 = 0xD3, @@ -817,7 +817,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts when there is data in the RX FIFO */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, CC1101_CONFIG_FIFOTHR = 0x0F, CC1101_CONFIG_SYNC1 = 0xD3, @@ -894,7 +894,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts when there is data in the RX FIFO */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, CC1101_CONFIG_FIFOTHR = 0x0F, CC1101_CONFIG_SYNC1 = 0xD3, @@ -966,7 +966,7 @@ enum CC1101_config_reg_state_enums { enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG2 = 0x29, // 0x00, GDO2 Output Pin Config CC1101_CONFIG_IOCFG1 = 0x2E, // 0x01, GDO1 Output Pin Config - CC1101_CONFIG_IOCFG0 = 0x01, // 0x02, GDO0 Output Pin Config + CC1101_CONFIG_IOCFG0 = 0x06, // 0x02, GDO0 Output Pin Config CC1101_CONFIG_FIFOTHR = 0x0F, // 0x03, RX FIFO and TX FIFO Thresholds CC1101_CONFIG_SYNC1 = 0xD3, // 0x04, Sync Word, High Byte CC1101_CONFIG_SYNC0 = 0x91, // 0x05, Sync Word, Low Byte @@ -1023,7 +1023,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts when there is data in the RX FIFO */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, CC1101_CONFIG_FIFOTHR = 0x0F, CC1101_CONFIG_SYNC1 = 0xD3, @@ -1100,7 +1100,7 @@ enum CC1101_config_reg_state_enums { CC1101_CONFIG_IOCFG1 = 0x2E, /** GDO0 asserts when there is data in the RX FIFO */ - CC1101_CONFIG_IOCFG0 = 0x01, + CC1101_CONFIG_IOCFG0 = 0x06, CC1101_CONFIG_FIFOTHR = 0x0F, CC1101_CONFIG_SYNC1 = 0xD3, diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index ae969c79b7..53eca8d46b 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -300,11 +300,17 @@ implementation int8_t value1 = 0, value2 = 0; cc1101_status_t status; - value1 = strobe(CC1101_SNOP).value; + + RADIO_ASSERT( call SpiResource.isOwner() ); + + call CSN.set(); + call CSN.clr(); + value1 = call SpiByte.write(CC1101_CMD_REGISTER_WRITE | CC1101_SNOP); do { value2 = value1; - value1 = strobe(CC1101_SNOP).value; + value1 = call SpiByte.write(CC1101_CMD_REGISTER_WRITE | CC1101_SNOP); }while(value1 != value2); + call CSN.set(); status.value = value1; return status; @@ -729,45 +735,61 @@ implementation /*----------------- TRANSMIT -----------------*/ + inline cc1101_status_t enableTransmitGdo() + { + cc1101_status_t status; + atomic { + // Finished sending message + call Gdo0Capture.captureFallingEdge(); + } + return status; + } tasklet_async command error_t RadioSend.send(message_t* msg) { uint16_t time; - uint8_t p; + /*uint8_t p;*/ uint8_t length; uint8_t* data; - uint8_t header; - uint32_t time32; - void* timesync; - timesync_relative_t timesync_relative; - uint32_t sfdTime; + /* + *uint8_t header; + *uint32_t time32; + *void* timesync; + *timesync_relative_t timesync_relative; + *uint32_t sfdTime; + */ cc1101_status_t status; #ifdef RADIO_DEBUG uint8_t sfd1, sfd2, sfd3, sfd4; #endif + call Leds.led2On(); if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd ) return EBUSY; - /* - *if( call Config.requiresRssiCca(msg) && !call CCA.get() ) - * return EBUSY; - */ + status = getStatus(); + if (status.state == CC1101_STATE_TXFIFO_UNDERFLOW){ + RADIO_ASSERT(FALSE); + // flush tx fifo + strobe(CC1101_SFTX); + return EBUSY; + } + // start transmission + status = strobe(CC1101_STX); + // Do other useful things while we wait for TX state data = getPayload(msg); length = call RadioPacket.payloadLength(msg); - // start transmission - status = strobe(CC1101_STX); - // Wait until TX mode - do{ - status = getStatus(); - }while(status.state != CC1101_STATE_TX); - - // first upload the header to gain some time + // Fill up the FIFO call CSN.set(); call CSN.clr(); writeTxFifo(data, length); call CSN.set(); + // Check if in TX mode. If not in TX mode, CCA has failed + status = getStatus(); + if (status.state != CC1101_STATE_TX) + return EBUSY; + atomic { #ifdef RADIO_DEBUG sfd1 = call GDO0.get(); @@ -779,12 +801,11 @@ implementation time = call RadioAlarm.getNow(); cmd = CMD_TRANSMIT; - state = STATE_TX_ON; + state = STATE_BUSY_TX_2_RX_ON; #ifdef RADIO_DEBUG sfd3 = call GDO0.get(); #endif - /*call Gdo0Capture.captureFallingEdge();*/ - call Gdo0Capture.disable(); + call Gdo0Capture.captureFallingEdge(); #ifdef RADIO_DEBUG sfd4 = call GDO0.get(); #endif @@ -867,15 +888,10 @@ implementation call DiagMsg.send(); } #endif - // now wait till it goes to RX - do{ - status = getStatus(); - }while(status.state != CC1101_STATE_RX); - txEnd = TRUE; // GDO0 capture interrupt will be triggered: we'll reenable interrupts from there // and clear the rx fifo -- should something have arrived in the meantime - call Tasklet.schedule(); + call Leds.led2Off(); return SUCCESS; } @@ -884,20 +900,13 @@ implementation /*----------------- CCA -----------------*/ + // The CC1101 has TX-if-CCA. This feature allows for the CC1101 to enter its TX state only if clear channel + // requirements are met. Thus, we always return SUCCESS here and re-evaluate CCA when trying to transmit. tasklet_async command error_t RadioCCA.request() { if( cmd != CMD_NONE || state != STATE_RX_ON ) return EBUSY; - /*if(call CCA.get()) {*/ - /* signal RadioCCA.done(SUCCESS);*/ - /*} else {*/ - /* // TODO: remove this*/ - /* RADIO_ASSERT(FAIL);*/ - /* signal RadioCCA.done(EBUSY);*/ - /*}*/ - -#warning "CCA not implemented properly" signal RadioCCA.done(SUCCESS); return SUCCESS; } @@ -1115,19 +1124,18 @@ implementation /*----------------- IRQ -----------------*/ // RX GDO0 (rising edge) or end of TX (falling edge) - //TODO async event void Gdo0Capture.captured( uint16_t time ) { RADIO_ASSERT( ! rxGdo0 ); // assert that there's no nesting - /*RADIO_ASSERT( ! txEnd ); // assert that there's no nesting*/ + RADIO_ASSERT( ! txEnd ); // assert that there's no nesting call Gdo0Capture.disable(); if(state == STATE_RX_ON) { rxGdo0 = TRUE; capturedTime = time; - /*} else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON) { - txEnd = TRUE; */ + } else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON) { + txEnd = TRUE; } else { // received capture interrupt in an invalid state RADIO_ASSERT(FALSE); @@ -1149,7 +1157,6 @@ implementation } #endif - call Leds.led2Toggle(); // do the rest of the processing call Tasklet.schedule(); } @@ -1317,8 +1324,6 @@ implementation RADIO_ASSERT( 1 <= length && length <= 125 ); RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); - // we add the length of the CRC, which is automatically generated - /*getHeader(msg)->length = length + 2;*/ // exclude the length byte getHeader(msg)->length = length; } diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h index 13ac2447f7..93c6ffa9e9 100644 --- a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -51,10 +51,10 @@ typedef uint16_t tradio_size; * beginning and end to ba able to handle longer wait periods. */ //TODO: Determine this value -#define RADIO_ALARM_MICROSEC 4UL +#define RADIO_ALARM_MICROSEC 0.03125 /** * The base two logarithm of the number of radio alarm ticks per one millisecond */ -#define RADIO_ALARM_MILLI_EXP 12UL +#define RADIO_ALARM_MILLI_EXP 5 #endif From 06445ec6b9965245a6339e1ecd1fd3b98880cb6c Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 23 Jul 2013 18:20:27 -0500 Subject: [PATCH 364/411] Fixed an issue with length byte not being set properly in message buffer --- tos/chips/cc1101/CC1101DriverLayerP.nc | 62 ++++++++++++------- tos/chips/cc1101/CC1101Radio.h | 8 +-- .../exp430/chips/ccxx00/RadioConfig.h | 8 ++- 3 files changed, 49 insertions(+), 29 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 53eca8d46b..e1f3ef7306 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -388,6 +388,15 @@ implementation return status; } + // The first byte in the RX fifo contains the length + // This assumes that this is called first before reading any of the bytes in the RX FIFO + /* + *inline cc1101_status_t readLengthFromRxFifo(uint8_t* lengthPtr){ + * cc1101_status_t status; + * status = readRxFifo(lengthPtr,1); + * return status; + *} + */ inline void readPayloadFromRxFifo(uint8_t* data, uint8_t length) { @@ -746,7 +755,7 @@ implementation } tasklet_async command error_t RadioSend.send(message_t* msg) { - uint16_t time; + /*uint16_t time;*/ /*uint8_t p;*/ uint8_t length; uint8_t* data; @@ -761,7 +770,7 @@ implementation #ifdef RADIO_DEBUG uint8_t sfd1, sfd2, sfd3, sfd4; #endif - call Leds.led2On(); + /*call Leds.led2On();*/ if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd ) return EBUSY; @@ -777,7 +786,7 @@ implementation // Do other useful things while we wait for TX state data = getPayload(msg); - length = call RadioPacket.payloadLength(msg); + length = call RadioPacket.payloadLength(msg) + 1; // Fill up the FIFO call CSN.set(); @@ -798,7 +807,7 @@ implementation sfd2 = call GDO0.get(); #endif // get a timestamp right after strobe returns - time = call RadioAlarm.getNow(); + /*time = call RadioAlarm.getNow();*/ cmd = CMD_TRANSMIT; state = STATE_BUSY_TX_2_RX_ON; @@ -878,7 +887,7 @@ implementation if( call DiagMsg.record() ) { - length = call RadioPacket.payloadLength(msg); + length = call RadioPacket.payloadLength(msg) + 1; call DiagMsg.chr('t'); call DiagMsg.uint16(call RadioAlarm.getNow()); @@ -891,7 +900,7 @@ implementation // GDO0 capture interrupt will be triggered: we'll reenable interrupts from there // and clear the rx fifo -- should something have arrived in the meantime - call Leds.led2Off(); + /*call Leds.led2Off();*/ return SUCCESS; } @@ -966,7 +975,7 @@ implementation inline void downloadMessage() { - uint8_t length; + uint8_t fifo_length; uint16_t crc = 1; uint8_t* data; uint8_t rssi; @@ -979,8 +988,8 @@ implementation data = getPayload(rxMsg); - // read the length byte - readLengthFromRxFifo(&length); + // read the length of bytes in the RX FIFO + readLengthFromRxFifo(&fifo_length); #ifdef RADIO_DEBUG_STATE if( call DiagMsg.record() ) @@ -992,11 +1001,11 @@ implementation call DiagMsg.str("c="); call DiagMsg.uint8(cmd); call DiagMsg.str("l="); - call DiagMsg.uint8(length); + call DiagMsg.uint8(fifo_length); call DiagMsg.send(); } #endif - if (length < 3 || length > call RadioPacket.maxPayloadLength() + 2 ) { + if (fifo_length < 3 || fifo_length > call RadioPacket.maxPayloadLength() + 2 ) { // bad length: bail out state = STATE_RX_ON; cmd = CMD_NONE; @@ -1005,15 +1014,18 @@ implementation } // if we're here, length must be correct - RADIO_ASSERT(length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2); + RADIO_ASSERT(fifo_length >= 3 && fifo_length <= call RadioPacket.maxPayloadLength() + 2); // we'll read the FCS/CRC separately - length -= 2; + fifo_length -= 2; - getHeader(rxMsg)->length = length; + // The length does not include the length byte + getHeader(rxMsg)->length = fifo_length - 1; + // TODO: The payload contains the length byte, thus setting the length byte in the previous line of code is useless. + // Investigate if we should consider the length byte as part of the payload or not. // download the whole payload - readPayloadFromRxFifo(data, length ); + readPayloadFromRxFifo(data, fifo_length ); // the last two bytes are not the fsc, but RSSI(8), CRC_ON(1)+LQI(7) readRssiFromRxFifo(&rssi); @@ -1045,8 +1057,8 @@ implementation call DiagMsg.uint16(call RadioAlarm.getNow() - (uint16_t)call PacketTimeStamp.timestamp(rxMsg) ); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.uint16(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); - call DiagMsg.int8(length); - call DiagMsg.hex8s(getPayload(rxMsg), length); + call DiagMsg.int8(fifo_length); + call DiagMsg.hex8s(getPayload(rxMsg), fifo_length); call DiagMsg.send(); } #endif @@ -1081,11 +1093,11 @@ implementation } } //call PppIpv6.transmit(getPayload(rxMsg)+1, - // length+4); - //length-1+ sizeof(ieee154_header_t)); - // length-1+ sizeof(cc1101packet_header_t)); + // fifo_length+4); + //fifo_length-1+ sizeof(ieee154_header_t)); + // fifo_length-1+ sizeof(cc1101packet_header_t)); //call PppIpv6.transmit(rxMsg+1, - // length -1 + sizeof(cc1101packet_header_t)); + // fifo_length -1 + sizeof(cc1101packet_header_t)); #endif // signal reception only if it has passed the CRC check @@ -1109,14 +1121,16 @@ implementation call DiagMsg.uint16(call RadioAlarm.getNow() - (uint16_t)call PacketTimeStamp.timestamp(rxMsg) ); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.uint16(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); - call DiagMsg.int8(length); - call DiagMsg.hex8s(getPayload(rxMsg), length); + call DiagMsg.int8(fifo_length); + call DiagMsg.hex8s(getPayload(rxMsg), fifo_length); call DiagMsg.send(); } #endif rxMsg = signal RadioReceive.receive(rxMsg); + } + // TODO: Handle RX FIFO overflow } @@ -1316,7 +1330,7 @@ implementation async command uint8_t RadioPacket.payloadLength(message_t* msg) { - return getHeader(msg)->length + 1; + return getHeader(msg)->length; } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) diff --git a/tos/chips/cc1101/CC1101Radio.h b/tos/chips/cc1101/CC1101Radio.h index a91cff3211..97b0dd9d39 100644 --- a/tos/chips/cc1101/CC1101Radio.h +++ b/tos/chips/cc1101/CC1101Radio.h @@ -37,13 +37,13 @@ typedef nx_struct cc1101packet_header_t { - cc1101_header_t cc1101; - ieee154_simple_header_t ieee154; + cc1101_header_t cc1101; // 1 byte + ieee154_simple_header_t ieee154; // 9 bytes #ifndef TFRAMES_ENABLED - network_header_t network; + network_header_t network; // 1 byte #endif #ifndef IEEE154FRAMES_ENABLED - activemessage_header_t am; + activemessage_header_t am; // 1 byte #endif } cc1101packet_header_t; diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h index 93c6ffa9e9..dc4056e5e8 100644 --- a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -31,6 +31,7 @@ * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti + * Author: Addisu Z. Taddese (Port to CC1101) */ #ifndef __RADIOCONFIG_H__ @@ -50,11 +51,16 @@ typedef uint16_t tradio_size; * Ok, further hacks were required for deputy, I removed 00 from the * beginning and end to ba able to handle longer wait periods. */ -//TODO: Determine this value #define RADIO_ALARM_MICROSEC 0.03125 /** * The base two logarithm of the number of radio alarm ticks per one millisecond */ #define RADIO_ALARM_MILLI_EXP 5 + +/** + * Setup the CC1101 to use 433MHz. + */ +#define CC1101_MATCHING_NETWORK CC1101_433_MHZ + #endif From bde5306227f8c8d93075657df02c4f1bd6e8fba2 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 23 Jul 2013 20:26:38 -0500 Subject: [PATCH 365/411] Updated mspdebug.extra to match serial numbers of programmable devices mspdebug can program a device specified with it's serial number. When invoked with mspdebug,## where ## are first few numbers of the device's serial number, mspdebug chooses the matching device --- support/make/msp/mspdebug.extra | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/support/make/msp/mspdebug.extra b/support/make/msp/mspdebug.extra index ba42d06dc6..6ab934c01b 100644 --- a/support/make/msp/mspdebug.extra +++ b/support/make/msp/mspdebug.extra @@ -7,17 +7,29 @@ MSP_DEBUG_FLAGS ?= rf2500 MSP_DEBUG ?= mspdebug -program: FORCE +MSP_SERIAL = "" +ifneq ($(MSPDEBUG),"") +expanded_serial := $(shell $(MSP_DEBUG) --usb-list | perl -e '$$r=shift; while(<>) { if(/\[serial: ($$r[0-9A-F]*)\]/i) { print $$1; exit; } }' $(MSPDEBUG)) +MSP_SERIAL = -s $(expanded_serial) +MSPDEBUG_TARGETS += serialtest +endif + + +# Test if we have found a match +serialtest: FORCE + @N=$(expanded_serial); [ x$$N = x ] && echo " found no device that matches serial ($(MSPDEBUG))" && exit 1 || echo " found device with serial $$N" + +program: $(MSPDEBUG_TARGETS) FORCE @echo " installing $(PLATFORM) binary using mspdebug" - $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) "prog $(INSTALL_IHEX)" + $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) $(MSP_SERIAL) "prog $(INSTALL_IHEX)" -program_no_e: FORCE +program_no_e: $(MSPDEBUG_TARGETS) FORCE @echo " installing $(PLATFORM) binary mspdebug (without mass erase)" - $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) "load $(INSTALL_IHEX)" + $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) $(MSP_SERIAL) "load $(INSTALL_IHEX)" -program_bl: FORCE +program_bl: $(MSPDEBUG_TARGETS) FORCE @echo " installing $(PLATFORM) bootloader using mspdebug" - $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) "prog $(BOOTLOADER_IMG)" + $(MSP_DEBUG) $(MSP_DEBUG_FLAGS) $(MSP_SERIAL) "prog $(BOOTLOADER_IMG)" program_input: ihex @: From 5f42d2f3c9ae9e5f9dc56b4344c9c7cc6757f130 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 26 Jul 2013 11:56:31 -0500 Subject: [PATCH 366/411] Added CC1101 header information to SerialPacketInfo8012_15_4P --- tos/lib/serial/SerialPacketInfo802_15_4P.nc | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tos/lib/serial/SerialPacketInfo802_15_4P.nc b/tos/lib/serial/SerialPacketInfo802_15_4P.nc index 9360b4e50e..99c526cace 100644 --- a/tos/lib/serial/SerialPacketInfo802_15_4P.nc +++ b/tos/lib/serial/SerialPacketInfo802_15_4P.nc @@ -55,6 +55,11 @@ implementation { HEADER_SIZE = sizeof(rfa1packet_header_t), FOOTER_SIZE = sizeof(rfa1packet_footer_t), }; +#elif defined(PLATFORM_EXP430) + enum { + HEADER_SIZE = sizeof(cc1101packet_header_t), + FOOTER_SIZE = sizeof(cc1101packet_footer_t), + }; #else enum { HEADER_SIZE = sizeof(cc2420_header_t), From 2b952aa94cc6e8d6749653874e4bd3f7e040c2f9 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 26 Jul 2013 11:57:57 -0500 Subject: [PATCH 367/411] Source gdb_x5 instead of gdb_x2, added rst command --- tos/chips/msp430/99_gdb/gdbinit | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/tos/chips/msp430/99_gdb/gdbinit b/tos/chips/msp430/99_gdb/gdbinit index dc93570b62..d2fefcea66 100644 --- a/tos/chips/msp430/99_gdb/gdbinit +++ b/tos/chips/msp430/99_gdb/gdbinit @@ -6,9 +6,10 @@ set remote memory-write-packet-size fixed set remote memory-read-packet-size 1024 set remote memory-read-packet-size fixed + #source ../../.gdb_x1 - source ../../.gdb_x2 -#source ../../.gdb_x5 + #source ../../.gdb_x2 +source ../../.gdb_x5 target remote localhost:2000 @@ -22,6 +23,15 @@ set pri ele 0 #b SchedulerBasicP.nc:148 #b VirtualizeTimerC.nc:81 #dis +#b CC1101DriverLayerP__RadioAlarm__fired +#b CC1101DriverLayerP.nc:227 +#commands +#p /x status +#end + +#b CC1101DriverLayerP__Gdo0Capture__captured +#b CC1101DriverLayerP__downloadMessage + define nx fini @@ -40,3 +50,12 @@ end document npc display next (16) instructions from $pc end + +define rst +monitor reset +c +end + +document rst +Reset and run device +end From 9081d956bc2124ef1d4b3870dcfe6ba0caecede6 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 30 Jul 2013 13:52:37 -0500 Subject: [PATCH 368/411] Improved reliability during high traffic --- tos/chips/cc1101/CC1101DriverLayerP.nc | 144 ++++++++++++++++++------- 1 file changed, 107 insertions(+), 37 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index e1f3ef7306..19e4810693 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -108,10 +108,12 @@ implementation STATE_IDLE = 3, STATE_IDLE_2_RX_ON = 4, STATE_RX_ON = 5, - STATE_BUSY_TX_2_RX_ON = 6, - STATE_IDLE_2_TX_ON = 7, - STATE_TX_ON = 8, - STATE_RX_DOWNLOAD = 9, + STATE_RX_WAIT_END_PKT = 6, + STATE_BUSY_TX_2_RX_ON = 7, + STATE_IDLE_2_TX_ON = 8, + STATE_TX_ON = 9, + STATE_RX_DOWNLOAD = 10, + STATE_RX_INVALID = 11, }; norace uint8_t state = STATE_POR; @@ -127,6 +129,7 @@ implementation CMD_CHANNEL = 7, // changing the channel CMD_SIGNAL_DONE = 8, // signal the end of the state transition CMD_DOWNLOAD = 9, // download the received message + CMD_RX_FLUSH = 10, // Fluch RX FIFO }; tasklet_norace uint8_t cmd = CMD_NONE; @@ -364,10 +367,11 @@ implementation } - inline cc1101_status_t readLengthFromRxFifo(uint8_t* lengthPtr) + inline cc1101_status_t readLengthFromRxBytes(uint8_t* lengthPtr) { cc1101_status_t status; uint8_t pkt_status; + uint8_t length1, length2; RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( call CSN.get() == 1 ); @@ -376,34 +380,43 @@ implementation call CSN.set(); // set CSN, just in clase it's not set call CSN.clr(); // clear CSN, starting a multi-byte SPI command + // For debugging using Logic Analyzer burstRead(CC1101_PKTSTATUS, &pkt_status, 1); /*status.value = call SpiByte.write(CC1101_CMD_REGISTER_READ | CC1101_CMD_BURST_MODE | CC1101_RXBYTES);*/ /**lengthPtr = call SpiByte.write(0);*/ - status = burstRead(CC1101_RXBYTES, lengthPtr, 1); + status = burstRead(CC1101_RXBYTES, &length1, 1); + do { + length2 = length1; + status = burstRead(CC1101_RXBYTES, &length1, 1); + }while(length1 != length2); RADIO_ASSERT(status.chip_rdyn == 0); RADIO_ASSERT(status.state == CC1101_STATE_RX); + *lengthPtr = length1; + return status; } // The first byte in the RX fifo contains the length // This assumes that this is called first before reading any of the bytes in the RX FIFO - /* - *inline cc1101_status_t readLengthFromRxFifo(uint8_t* lengthPtr){ - * cc1101_status_t status; - * status = readRxFifo(lengthPtr,1); - * return status; - *} - */ + inline cc1101_status_t readLengthFromRxFifo(uint8_t* lengthPtr){ + cc1101_status_t status; + call CSN.set(); // set CSN, just in clase it's not set + call CSN.clr(); // clear CSN, starting a multi-byte SPI command + status = readRxFifo(lengthPtr,1); + /*call CSN.set(); // set CSN, just in clase it's not set*/ + /*call CSN.clr(); // clear CSN, starting a multi-byte SPI command*/ + return status; + } inline void readPayloadFromRxFifo(uint8_t* data, uint8_t length) { // readLengthFromRxFifo was called before, so CSN is cleared and spi is ours RADIO_ASSERT( call CSN.get() == 0 ); - readRxFifo(data, length); + call SpiBlock.transfer(NULL, data, length); } inline void readRssiFromRxFifo(uint8_t* rssiPtr) @@ -425,9 +438,19 @@ implementation call CSN.set(); } + inline cc1101_status_t waitForState(uint8_t st, uint8_t timeout) { + cc1101_status_t status; + uint8_t counter = 0; + do { + status = getStatus(); + counter++; + }while(status.state != st && counter < timeout); + return status; + } inline cc1101_status_t flushRxFifo() { - - return strobe(CC1101_SFRX); + strobe(CC1101_SFRX); + strobe(CC1101_SRX); + return waitForState(CC1101_STATE_RX, 0xff); } /*----------------- INIT -----------------*/ @@ -489,6 +512,7 @@ implementation if(timeout > 10000) { strobe(CC1101_SRES); call CSN.clr(); + timeout = 0; } } // The chip is ready. XOSC is stable. @@ -635,7 +659,6 @@ implementation call CSN.clr(); burstWrite(0x0, configRegs, configRegSize); call CSN.set(); - state = STATE_IDLE; call Tasklet.schedule(); } @@ -644,6 +667,8 @@ implementation // setChannel was ignored in SLEEP because the SPI was not working, so do it here /*setChannel();*/ + // Flush anything that might be in the RX FIFO + strobe(CC1101_SFRX); // start receiving strobe(CC1101_SRX); call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods @@ -770,7 +795,6 @@ implementation #ifdef RADIO_DEBUG uint8_t sfd1, sfd2, sfd3, sfd4; #endif - /*call Leds.led2On();*/ if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd ) return EBUSY; @@ -786,6 +810,8 @@ implementation // Do other useful things while we wait for TX state data = getPayload(msg); + // The length byte does not count itself so add one here in order to send the + // right number of bytes to the TXFIFO length = call RadioPacket.payloadLength(msg) + 1; // Fill up the FIFO @@ -814,11 +840,13 @@ implementation #ifdef RADIO_DEBUG sfd3 = call GDO0.get(); #endif - call Gdo0Capture.captureFallingEdge(); + /*call Gdo0Capture.captureFallingEdge();*/ #ifdef RADIO_DEBUG sfd4 = call GDO0.get(); #endif } + waitForState(CC1101_STATE_RX, 0xff); + txEnd = TRUE; #ifdef RADIO_DEBUG RADIO_ASSERT(sfd1 == 0); @@ -827,6 +855,7 @@ implementation RADIO_ASSERT(sfd4 == 0); #endif + //TODO: implement timesync /* * timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; * @@ -901,6 +930,7 @@ implementation // GDO0 capture interrupt will be triggered: we'll reenable interrupts from there // and clear the rx fifo -- should something have arrived in the meantime /*call Leds.led2Off();*/ + call Tasklet.schedule(); return SUCCESS; } @@ -930,6 +960,7 @@ implementation atomic { // ready to receive new message: enable receive GDO0 capture call Gdo0Capture.captureRisingEdge(); + /*call Gdo0Capture.captureFallingEdge();*/ } return status; } @@ -982,14 +1013,19 @@ implementation uint8_t crc_ok_lqi; uint16_t sfdTime; + cc1101_status_t status; + + status = getStatus(); + state = STATE_RX_DOWNLOAD; sfdTime = capturedTime; - data = getPayload(rxMsg); + // data starts after the length field + data = getPayload(rxMsg) + sizeof(cc1101_header_t); // read the length of bytes in the RX FIFO - readLengthFromRxFifo(&fifo_length); + status = readLengthFromRxFifo(&fifo_length); #ifdef RADIO_DEBUG_STATE if( call DiagMsg.record() ) @@ -1009,6 +1045,7 @@ implementation // bad length: bail out state = STATE_RX_ON; cmd = CMD_NONE; + call CSN.set(); enableReceiveGdo(); return; } @@ -1016,11 +1053,8 @@ implementation // if we're here, length must be correct RADIO_ASSERT(fifo_length >= 3 && fifo_length <= call RadioPacket.maxPayloadLength() + 2); - // we'll read the FCS/CRC separately - fifo_length -= 2; - // The length does not include the length byte - getHeader(rxMsg)->length = fifo_length - 1; + getHeader(rxMsg)->length = fifo_length; // TODO: The payload contains the length byte, thus setting the length byte in the previous line of code is useless. // Investigate if we should consider the length byte as part of the payload or not. @@ -1049,7 +1083,10 @@ implementation cmd = CMD_NONE; // ready to receive new message: enable GDO0 interrupts - enableReceiveGdo(); + // If RX FIFO overflowed, we have to flush it before we enable interrupts + if(status.state != CC1101_STATE_RXFIFO_OVERFLOW) + enableReceiveGdo(); + #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { @@ -1131,6 +1168,11 @@ implementation } // TODO: Handle RX FIFO overflow + if(status.state == CC1101_STATE_RXFIFO_OVERFLOW){ + // flush rx fifo + flushRxFifo(); + enableReceiveGdo(); + } } @@ -1140,16 +1182,27 @@ implementation // RX GDO0 (rising edge) or end of TX (falling edge) async event void Gdo0Capture.captured( uint16_t time ) { + uint8_t gdo0_val; + call Gdo0Capture.disable(); + call Leds.led2On(); RADIO_ASSERT( ! rxGdo0 ); // assert that there's no nesting RADIO_ASSERT( ! txEnd ); // assert that there's no nesting - - call Gdo0Capture.disable(); + + gdo0_val = call GDO0.get(); if(state == STATE_RX_ON) { - rxGdo0 = TRUE; - capturedTime = time; - } else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON) { - txEnd = TRUE; + if(gdo0_val){ + capturedTime = time; + call Gdo0Capture.captureFallingEdge(); + call Leds.led0On(); + call Leds.led0Off(); + }else{ + rxGdo0 = TRUE; + call Leds.led0On(); + call Leds.led0Off(); + call Leds.led0On(); + call Leds.led0Off(); + } } else { // received capture interrupt in an invalid state RADIO_ASSERT(FALSE); @@ -1173,6 +1226,7 @@ implementation // do the rest of the processing call Tasklet.schedule(); + call Leds.led2Off(); } @@ -1230,7 +1284,9 @@ implementation cmd = CMD_NONE; // a packet might have been received since the end of the transmission - status = enableReceiveGdo(); + enableReceiveGdo(); + + status = getStatus(); #if defined(RADIO_DEBUG_IRQ) && defined(RADIO_DEBUG_MESSAGES) if( call DiagMsg.record() ) @@ -1264,12 +1320,18 @@ implementation // incoming packet if( isSpiAcquired() ) { + cc1101_status_t status; + status = getStatus(); rxGdo0 = FALSE; - - RADIO_ASSERT(state == STATE_RX_ON); RADIO_ASSERT(cmd == CMD_NONE); - cmd = CMD_DOWNLOAD; + if (status.state == CC1101_STATE_RXFIFO_OVERFLOW) + cmd = CMD_RX_FLUSH; + else{ + cmd = CMD_DOWNLOAD; + state = STATE_RX_ON; + } + } else RADIO_ASSERT(FALSE); @@ -1280,7 +1342,15 @@ implementation { if( cmd == CMD_DOWNLOAD ) { RADIO_ASSERT(state == STATE_RX_ON); - downloadMessage(); + /*do{*/ + downloadMessage(); + /*}while(call GDO0.get());*/ + } + else if (cmd == CMD_RX_FLUSH){ + flushRxFifo(); + state = STATE_RX_ON; + enableReceiveGdo(); + cmd = CMD_NONE; } else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON ) changeState(); From 647ab1c2926478d2c55e9cd8e11c9f23d91c0c00 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Thu, 1 Aug 2013 14:36:33 -0500 Subject: [PATCH 369/411] Poll the chip after transmitting instead of using interrupts to check for completion --- support/make/msp/mspdebug.extra | 2 ++ tos/chips/cc1101/CC1101DriverLayerP.nc | 5 +++++ tos/platforms/exp430/chips/ccxx00/RadioConfig.h | 10 ++++++++++ 3 files changed, 17 insertions(+) diff --git a/support/make/msp/mspdebug.extra b/support/make/msp/mspdebug.extra index 6ab934c01b..42d041418b 100644 --- a/support/make/msp/mspdebug.extra +++ b/support/make/msp/mspdebug.extra @@ -7,6 +7,8 @@ MSP_DEBUG_FLAGS ?= rf2500 MSP_DEBUG ?= mspdebug +MSPDEBUG ?= "" + MSP_SERIAL = "" ifneq ($(MSPDEBUG),"") expanded_serial := $(shell $(MSP_DEBUG) --usb-list | perl -e '$$r=shift; while(<>) { if(/\[serial: ($$r[0-9A-F]*)\]/i) { print $$1; exit; } }' $(MSPDEBUG)) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 19e4810693..4cd4ab06ab 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -847,6 +847,7 @@ implementation } waitForState(CC1101_STATE_RX, 0xff); txEnd = TRUE; + /*enableTransmitGdo();*/ #ifdef RADIO_DEBUG RADIO_ASSERT(sfd1 == 0); @@ -1184,6 +1185,7 @@ implementation { uint8_t gdo0_val; call Gdo0Capture.disable(); + call Leds.led2Off(); call Leds.led2On(); RADIO_ASSERT( ! rxGdo0 ); // assert that there's no nesting RADIO_ASSERT( ! txEnd ); // assert that there's no nesting @@ -1203,6 +1205,8 @@ implementation call Leds.led0On(); call Leds.led0Off(); } + }else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON){ + txEnd = TRUE; } else { // received capture interrupt in an invalid state RADIO_ASSERT(FALSE); @@ -1226,6 +1230,7 @@ implementation // do the rest of the processing call Tasklet.schedule(); + call Leds.led2On(); call Leds.led2Off(); } diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h index dc4056e5e8..ba75f4514b 100644 --- a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -61,6 +61,16 @@ typedef uint16_t tradio_size; /** * Setup the CC1101 to use 433MHz. */ +#ifndef CC1101_MATCHING_NETWORK #define CC1101_MATCHING_NETWORK CC1101_433_MHZ +#endif + +#ifndef SOFTWAREACK_TIMEOUT +#define SOFTWAREACK_TIMEOUT 2000 +#endif + +#ifndef CC1101_BAUD +#define CC1101_BAUD CC1101_500K +#endif #endif From d1a30cdb83903fb2ae3440d7448268cd3fe14966 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Thu, 1 Aug 2013 17:07:11 -0500 Subject: [PATCH 370/411] Go to IDLE and back to RX whenever there is a transmission/reception error. The CC1101 calibrates when it goes from the IDLE to the RX state. This should improve overall stability --- tos/chips/cc1101/CC1101DriverLayerP.nc | 74 +++++++++++++++++--------- 1 file changed, 48 insertions(+), 26 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 4cd4ab06ab..453e4a1457 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -493,9 +493,20 @@ implementation return call SpiResource.request(); } - inline void resetRadio() { - uint16_t timeout; + inline void waitChipRdyn(){ + uint16_t timeout = 0; + // wait for CHIP_RDYn pin to go low + while(call GDO2.get()) { + timeout++; + if(timeout > 10000) { + strobe(CC1101_SRES); + call CSN.clr(); + timeout = 0; + } + } + } + inline void resetRadio() { // Go through reset procedure call CSN.set(); call BusyWait.wait(30); @@ -505,16 +516,7 @@ implementation call BusyWait.wait(45); call CSN.clr(); - timeout = 0; - // wait for CHIP_RDYn pin to go low - while(call GDO2.get()) { - timeout++; - if(timeout > 10000) { - strobe(CC1101_SRES); - call CSN.clr(); - timeout = 0; - } - } + waitChipRdyn(); // The chip is ready. XOSC is stable. // Strobe SRES @@ -529,6 +531,21 @@ implementation state = STATE_PD; } + inline void resetRx(){ + call Leds.led0On(); + call CSN.set(); + call CSN.clr(); + /*strobe(CC1101_SRES);*/ + /*waitChipRdyn();*/ + strobe(CC1101_SIDLE); + waitForState(CC1101_STATE_IDLE, 0xff); + strobe(CC1101_SRX); + waitForState(CC1101_STATE_RX, 0xff); + state = STATE_RX_ON; + cmd = CMD_NONE; + call Leds.led0Off(); + } + void initRadio() { @@ -822,8 +839,10 @@ implementation // Check if in TX mode. If not in TX mode, CCA has failed status = getStatus(); - if (status.state != CC1101_STATE_TX) + if (status.state != CC1101_STATE_TX){ + resetRx(); return EBUSY; + } atomic { #ifdef RADIO_DEBUG @@ -845,8 +864,14 @@ implementation sfd4 = call GDO0.get(); #endif } - waitForState(CC1101_STATE_RX, 0xff); - txEnd = TRUE; + status = waitForState(CC1101_STATE_RX, 0xff); + if(status.state == CC1101_STATE_RX) + txEnd = TRUE; + else { + // Transmission has failed + resetRx(); + return EBUSY; + } /*enableTransmitGdo();*/ #ifdef RADIO_DEBUG @@ -1044,10 +1069,7 @@ implementation #endif if (fifo_length < 3 || fifo_length > call RadioPacket.maxPayloadLength() + 2 ) { // bad length: bail out - state = STATE_RX_ON; - cmd = CMD_NONE; - call CSN.set(); - enableReceiveGdo(); + resetRx(); return; } @@ -1189,21 +1211,21 @@ implementation call Leds.led2On(); RADIO_ASSERT( ! rxGdo0 ); // assert that there's no nesting RADIO_ASSERT( ! txEnd ); // assert that there's no nesting - + gdo0_val = call GDO0.get(); if(state == STATE_RX_ON) { if(gdo0_val){ capturedTime = time; call Gdo0Capture.captureFallingEdge(); - call Leds.led0On(); - call Leds.led0Off(); + /*call Leds.led0On();*/ + /*call Leds.led0Off();*/ }else{ rxGdo0 = TRUE; - call Leds.led0On(); - call Leds.led0Off(); - call Leds.led0On(); - call Leds.led0Off(); + /*call Leds.led0On();*/ + /*call Leds.led0Off();*/ + /*call Leds.led0On();*/ + /*call Leds.led0Off();*/ } }else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON){ txEnd = TRUE; From ce3f10207685de1f1fe22cd52701da19502c1a82 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 25 Sep 2013 11:49:14 -0500 Subject: [PATCH 371/411] Added a new platform, vumcr, which is based on the EXP430 --- support/make/vumcr.target | 10 ++ tos/chips/msp430/pins/HplMsp430GeneralIOC.nc | 110 +++++++++---- tos/platforms/vumcr/.platform | 71 +++++++++ tos/platforms/vumcr/hardware/leds/LedsC.nc | 47 ++++++ tos/platforms/vumcr/hardware/leds/LedsP.nc | 51 ++++++ .../vumcr/hardware/leds/PlatformLedsC.nc | 67 ++++++++ .../vumcr/hardware/leds/PlatformLedsP.nc | 146 ++++++++++++++++++ .../vumcr/hardware/pins/PlatformPinsC.nc | 49 ++++++ .../vumcr/hardware/pins/PlatformPinsP.nc | 66 ++++++++ 9 files changed, 586 insertions(+), 31 deletions(-) create mode 100644 support/make/vumcr.target create mode 100644 tos/platforms/vumcr/.platform create mode 100644 tos/platforms/vumcr/hardware/leds/LedsC.nc create mode 100644 tos/platforms/vumcr/hardware/leds/LedsP.nc create mode 100644 tos/platforms/vumcr/hardware/leds/PlatformLedsC.nc create mode 100644 tos/platforms/vumcr/hardware/leds/PlatformLedsP.nc create mode 100644 tos/platforms/vumcr/hardware/pins/PlatformPinsC.nc create mode 100644 tos/platforms/vumcr/hardware/pins/PlatformPinsP.nc diff --git a/support/make/vumcr.target b/support/make/vumcr.target new file mode 100644 index 0000000000..4ffa6813e5 --- /dev/null +++ b/support/make/vumcr.target @@ -0,0 +1,10 @@ +#-*-Makefile-*- vim:syntax=make + +PLATFORM = vumcr +MSP_MCU = msp430f5528 +DEFAULT_PROGRAM ?= mspdebug + +$(call TOSMake_include_platform,msp) + +vumcr: $(BUILD_DEPS) + @: diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc index fc3a1e4102..f876ef24bf 100644 --- a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc +++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc @@ -452,10 +452,7 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as ADC15; #endif /* msp430x54x || msp430x54xA */ -/* - * x5 family: msp430f5529 - */ -#if defined(__MSP430F5529) +#if defined(__MSP430F5528) || defined(__MSP430F5529) provides interface HplMsp430GeneralIO as TA0CCR0; provides interface HplMsp430GeneralIO as TA0CCR1; provides interface HplMsp430GeneralIO as TA0CCR2; @@ -473,18 +470,18 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as TA2CCR2; provides interface HplMsp430GeneralIO as TA2CLK; - provides interface HplMsp430GeneralIO as TB0CCR0; - provides interface HplMsp430GeneralIO as TB0CCR1; - provides interface HplMsp430GeneralIO as TB0CCR2; - provides interface HplMsp430GeneralIO as TB0CCR3; - provides interface HplMsp430GeneralIO as TB0CCR4; - provides interface HplMsp430GeneralIO as TB0CCR5; - provides interface HplMsp430GeneralIO as TB0CCR6; - provides interface HplMsp430GeneralIO as TB0CLK; - provides interface HplMsp430GeneralIO as TB0OUTH; + /*provides interface HplMsp430GeneralIO as TB0CCR0;*/ + /*provides interface HplMsp430GeneralIO as TB0CCR1;*/ + /*provides interface HplMsp430GeneralIO as TB0CCR2;*/ + /*provides interface HplMsp430GeneralIO as TB0CCR3;*/ + /*provides interface HplMsp430GeneralIO as TB0CCR4;*/ + /*provides interface HplMsp430GeneralIO as TB0CCR5;*/ + /*provides interface HplMsp430GeneralIO as TB0CCR6;*/ + /*provides interface HplMsp430GeneralIO as TB0CLK;*/ + /*provides interface HplMsp430GeneralIO as TB0OUTH;*/ provides interface HplMsp430GeneralIO as RTCCLK; - provides interface HplMsp430GeneralIO as MCLK; + /*provides interface HplMsp430GeneralIO as MCLK;*/ provides interface HplMsp430GeneralIO as SMCLK; provides interface HplMsp430GeneralIO as ACLK; /*provides interface HplMsp430GeneralIO as ADC12CLK;*/ @@ -533,6 +530,35 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as ADC8; provides interface HplMsp430GeneralIO as ADC9; +// A10 connects internally to Ref_x and A11 (INCHx = 0xB) +// measures AVcc through a divider network. There are +// no external pins associated with ADC10 or ADC11. + + /*provides interface HplMsp430GeneralIO as ADC12;*/ + /*provides interface HplMsp430GeneralIO as ADC13;*/ + /*provides interface HplMsp430GeneralIO as ADC14;*/ + /*provides interface HplMsp430GeneralIO as ADC15;*/ + + // Supply voltage monitoring + provides interface HplMsp430GeneralIO as SVMOUT; + +#endif /* MSP430F5528 or MSP430F5529 */ +/* + * specific to msp430f5529 + */ +#if defined(__MSP430F5529) + provides interface HplMsp430GeneralIO as TB0CCR0; + provides interface HplMsp430GeneralIO as TB0CCR1; + provides interface HplMsp430GeneralIO as TB0CCR2; + provides interface HplMsp430GeneralIO as TB0CCR3; + provides interface HplMsp430GeneralIO as TB0CCR4; + provides interface HplMsp430GeneralIO as TB0CCR5; + provides interface HplMsp430GeneralIO as TB0CCR6; + provides interface HplMsp430GeneralIO as TB0CLK; + provides interface HplMsp430GeneralIO as TB0OUTH; + + provides interface HplMsp430GeneralIO as MCLK; + // A10 connects internally to Ref_x and A11 (INCHx = 0xB) // measures AVcc through a divider network. There are // no external pins associated with ADC10 or ADC11. @@ -542,12 +568,9 @@ configuration HplMsp430GeneralIOC { provides interface HplMsp430GeneralIO as ADC14; provides interface HplMsp430GeneralIO as ADC15; - // Supply voltage monitoring - provides interface HplMsp430GeneralIO as SVMOUT; - #endif /* MSP430F5529 */ - } + implementation { components #if defined(__MSP430_HAS_PORT1_R__) @@ -1192,7 +1215,7 @@ implementation { #endif /* __msp430x54x || __msp430x54xA */ -#if defined(__MSP430F5529) +#if defined(__MSP430F5528) || defined(__MSP430F5529) TA0CCR0 = P11; TA0CCR1 = P12; @@ -1211,18 +1234,20 @@ implementation { TA2CCR2 = P25; TA2CLK = P22; - TB0CCR0 = P56; - TB0CCR1 = P57; - TB0CCR2 = P74; - TB0CCR3 = P75; - TB0CCR4 = P76; - TB0CCR5 = P35; - TB0CCR6 = P36; - TB0CLK = P77; - TB0OUTH = P37; + /* + *TB0CCR0 = P56; + *TB0CCR1 = P57; + *TB0CCR2 = P74; + *TB0CCR3 = P75; + *TB0CCR4 = P76; + *TB0CCR5 = P35; + *TB0CCR6 = P36; + *TB0CLK = P77; + *TB0OUTH = P37; + */ RTCCLK = P26; - MCLK = P77; + /*MCLK = P77;*/ SMCLK = P22; ACLK = P10; // ADC12CLK is on accessable via the Port Mapping Controller @@ -1270,13 +1295,36 @@ implementation { // there are no ADC's 10 and 11 according to datasheet + /*ADC12 = P70;*/ + /*ADC13 = P71;*/ + /*ADC14 = P72;*/ + /*ADC15 = P73;*/ + + SVMOUT = P37; + +#endif /* __MSP430F5528 || __MSP430F5529*/ + +#if defined(__MSP430F5529) + + TB0CCR0 = P56; + TB0CCR1 = P57; + TB0CCR2 = P74; + TB0CCR3 = P75; + TB0CCR4 = P76; + TB0CCR5 = P35; + TB0CCR6 = P36; + TB0CLK = P77; + TB0OUTH = P37; + + MCLK = P77; + + // there are no ADC's 10 and 11 according to datasheet + ADC12 = P70; ADC13 = P71; ADC14 = P72; ADC15 = P73; - SVMOUT = P37; - #endif /* __MSP430F5529 */ } diff --git a/tos/platforms/vumcr/.platform b/tos/platforms/vumcr/.platform new file mode 100644 index 0000000000..c5873e56a1 --- /dev/null +++ b/tos/platforms/vumcr/.platform @@ -0,0 +1,71 @@ +# Includes that should take precedence come first. Platforms come before +# chips because they may override files. These must be specified as +# @includes instead of -I's to @opts, otherwise the %T won't be processed +# by ncc. + +push( @includes, qw( + + %P/hardware/pins + %P/hardware/leds + %T/platforms/exp430/ + %T/platforms/exp430/hardware/adc + %T/platforms/exp430/hardware/buttons + %T/platforms/exp430/hardware/clock + %T/platforms/exp430/hardware/usci + %T/platforms/exp430/chips/ccxx00 + %T/chips/msp430/x5xxx + %T/chips/msp430/x5xxx/lpm + %T/chips/msp430/x5xxx/timer + %T/chips/msp430/x5xxx/usci-v2 + %T/chips/msp430 + %T/chips/msp430/pins + %T/chips/msp430/timer + %T/chips/msp430/pmm + %T/chips/msp430/adc12 + %T/chips/msp430/sensors + %T/chips/cc1101 + %T/lib/rfxlink/layers + %T/lib/rfxlink/util + %T/lib/timer + %T/lib/serial + %T/lib/power + %T/lib/printf + %T/lib/diagmsg +) ); + +@opts = qw( + -gcc=msp430-gcc + -mmcu=msp430f5528 + -fnesc-target=msp430 + -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask +); + + + +#push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; +#push @opts, "-mingw-gcc" if $cygwin; + +$ENV{'CIL_MACHINE'} = + "version_major=3 " . + "version_minor=2 " . + "version=msp430-3.2.3 " . + "short=2,2 " . + "int=2,2 " . + "long=4,2 " . + "long_long=8,2 " . + "pointer=2,2 " . + "enum=2,2 " . + "float=4,2 " . + "double=4,2 " . + "long_double=4,2 " . + "void=1,1 " . + "fun=1,2 " . + "wchar_size_size=2,2 " . + "alignof_string=1 " . + "max_alignment=1 " . + "char_wchar_signed=true,true " . + "const_string_literals=true " . + "big_endian=false " . + "underscore_name=false " . + "__builtin_va_list=true " . + "__thread_is_keyword=true"; diff --git a/tos/platforms/vumcr/hardware/leds/LedsC.nc b/tos/platforms/vumcr/hardware/leds/LedsC.nc new file mode 100644 index 0000000000..8f5da66904 --- /dev/null +++ b/tos/platforms/vumcr/hardware/leds/LedsC.nc @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * EM430 has only two LEDs. + * @author Peter A. Bigot + */ + +configuration LedsC { + provides interface Leds; +} +implementation { + components PlatformLedsC; + + Leds = PlatformLedsC; +} diff --git a/tos/platforms/vumcr/hardware/leds/LedsP.nc b/tos/platforms/vumcr/hardware/leds/LedsP.nc new file mode 100644 index 0000000000..f595c8e8c0 --- /dev/null +++ b/tos/platforms/vumcr/hardware/leds/LedsP.nc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** +* 3 LED implementation + * + * @author Peter A. Bigot + * @author João Gonçalves + */ + +module LedsP @safe() { + provides interface Leds; + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} +implementation { +} diff --git a/tos/platforms/vumcr/hardware/leds/PlatformLedsC.nc b/tos/platforms/vumcr/hardware/leds/PlatformLedsC.nc new file mode 100644 index 0000000000..31e793bb6e --- /dev/null +++ b/tos/platforms/vumcr/hardware/leds/PlatformLedsC.nc @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter A. Bigot + * @author Addisu Z. Taddese + */ + +#include "hardware.h" + +configuration PlatformLedsC { + provides { + interface Init; + interface Leds; + } +} +implementation { + components PlatformLedsP; + Leds = PlatformLedsP; + Init = PlatformLedsP; + + components HplMsp430GeneralIOC as GeneralIOC; + + /* RED LED (D1) at P1.0 */ + components new Msp430GpioC() as Led0Impl; + Led0Impl -> GeneralIOC.Port10; + PlatformLedsP.Led0 -> Led0Impl; + + /* Yellow LED (D2) at P8.1 */ + components new Msp430GpioC() as Led1Impl; + Led1Impl -> GeneralIOC.Port11; + PlatformLedsP.Led1 -> Led1Impl; + + /* Green LED (D1) at P8.2 */ + components new Msp430GpioC() as Led2Impl; + Led2Impl -> GeneralIOC.Port12; + PlatformLedsP.Led2 -> Led2Impl; +} diff --git a/tos/platforms/vumcr/hardware/leds/PlatformLedsP.nc b/tos/platforms/vumcr/hardware/leds/PlatformLedsP.nc new file mode 100644 index 0000000000..87dafc21fc --- /dev/null +++ b/tos/platforms/vumcr/hardware/leds/PlatformLedsP.nc @@ -0,0 +1,146 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * This module provides the general Led interface. + * + * The advantage to doing it this way is we can now create a platforms + * that provide more or less than 3 LED's, and the LED's can be pull-up or + * pull-down enabled. + * + * @author David Moss + */ + +module PlatformLedsP { + provides { + interface Init; + interface Leds; + } + + uses { + interface GeneralIO as Led0; + interface GeneralIO as Led1; + interface GeneralIO as Led2; + } +} + +implementation { + + /***************** Init Commands ****************/ + command error_t Init.init() { + atomic { + call Led0.makeOutput(); + call Led1.makeOutput(); + call Led2.makeOutput(); + call Led0.clr(); + call Led1.clr(); + call Led2.clr(); + } + return SUCCESS; + } + + /***************** Leds Commands ****************/ + async command void Leds.led0On() { + call Led0.set(); + } + + async command void Leds.led0Off() { + call Led0.clr(); + } + + async command void Leds.led0Toggle() { + call Led0.toggle(); + } + + async command void Leds.led1On() { + call Led1.set(); + } + + async command void Leds.led1Off() { + call Led1.clr(); + } + + async command void Leds.led1Toggle() { + call Led1.toggle(); + } + + async command void Leds.led2On() { + call Led2.set(); + } + + async command void Leds.led2Off() { + call Led2.clr(); + } + + async command void Leds.led2Toggle() { + call Led2.toggle(); + } + + async command uint8_t Leds.get() { + uint8_t rval; + atomic { + rval = 0; + if (call Led0.get()) { + rval |= LEDS_LED0; + } + if (call Led1.get()) { + rval |= LEDS_LED1; + } + if (call Led2.get()) { + rval |= LEDS_LED2; + } + } + return rval; + } + + async command void Leds.set(uint8_t val) { + atomic { + if (val & LEDS_LED0) { + call Leds.led0On(); + } else { + call Leds.led0Off(); + } + if (val & LEDS_LED1) { + call Leds.led1On(); + } else { + call Leds.led1Off(); + } + if (val & LEDS_LED2) { + call Leds.led2On(); + } else { + call Leds.led2Off(); + } + } + } +} diff --git a/tos/platforms/vumcr/hardware/pins/PlatformPinsC.nc b/tos/platforms/vumcr/hardware/pins/PlatformPinsC.nc new file mode 100644 index 0000000000..5a77232299 --- /dev/null +++ b/tos/platforms/vumcr/hardware/pins/PlatformPinsC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * @author David Moss + * @author Peter A. Bigot + */ + +configuration PlatformPinsC { + provides { + interface Init; + } +} + +implementation { + components PlatformPinsP; + Init = PlatformPinsP; +} diff --git a/tos/platforms/vumcr/hardware/pins/PlatformPinsP.nc b/tos/platforms/vumcr/hardware/pins/PlatformPinsP.nc new file mode 100644 index 0000000000..dbf7b2e807 --- /dev/null +++ b/tos/platforms/vumcr/hardware/pins/PlatformPinsP.nc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + */ + +module PlatformPinsP { + provides interface Init; +} + +implementation { + int i; + + command error_t Init.init() { + atomic { + + PMAPPWD = PMAPPW; // Get write-access to port mapping regs + P4MAP0 = PM_TB0CCR1A; // Map Timer_B CCR1 capture/compare + /*P4MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6*/ + P4MAP6 = PM_TB0CCR2A; // Map Timer_B CCR2 capture/compare + P4MAP7 = PM_TB0CCR3A; // Map Timer_B CCR3 capture/compare + + PMAPPWD = 0; // Lock port mapping registers + P4SEL &= 0x3f; + P4DIR |= 0xc0; + P4OUT &= 0x3f; + + } + return SUCCESS; + } +} From 84c44a539a1dbf2ace8603de819cbf2e85980b1b Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 2 Oct 2013 16:24:41 -0500 Subject: [PATCH 372/411] Fixed platform file to make it play nice with Eclipse --- tos/platforms/exp430/.platform | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/tos/platforms/exp430/.platform b/tos/platforms/exp430/.platform index affebdd3d0..567318bfdb 100644 --- a/tos/platforms/exp430/.platform +++ b/tos/platforms/exp430/.platform @@ -3,8 +3,7 @@ # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. -for (split(/\n/, <<'EOText' - +push( @includes, qw( %P/hardware/adc %P/hardware/buttons %P/hardware/clock @@ -66,13 +65,7 @@ for (split(/\n/, <<'EOText' %T/lib/printf %T/lib/diagmsg -EOText -)) { - s/\#.*$//; - s/^\s*//g; - s/\s*$//g; - push(@includes, $_) if $_; -} +) ); @opts = qw( -gcc=msp430-gcc From 31146d7bc263f9aa9ce7562ceb80e518db2e750a Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 4 Dec 2013 18:33:53 -0600 Subject: [PATCH 373/411] Fixed a bug in the MSP430 I2C driver If the CPU is slow or running in debug mode, the timing works out in such a way that the interrupt for the very last byte doesn't trigger. This seems to happen because setTxStop is called right before the last byte which causes the hardware to proceed with receiving the last byte instead of waiting until the one-before-last byte is read from the RX buffer. The interrupt flag actually gets set, but the CPU doesn't get interrupted. Thus, we can check the flag and read the last byte, if it's available. --- .../x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc | 15 +++++++++++ tos/types/I2C.h | 24 ++++++++++++++++++ tos/types/TinyError.h | 25 ++++++++++--------- 3 files changed, 52 insertions(+), 12 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc index 863497e618..83d2f6c84f 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc @@ -533,6 +533,21 @@ implementation { m_buf[m_pos++] = call Usci.getRxbuf(); + /* + * If the CPU is slow or running in debug mode, the timing + * works out in such a way that the interrupt for the very last byte + * doesn't trigger. This seems to happen because setTxStop is called right + * before the last byte which causes the hardware to proceed with receiving + * the last byte instead of waiting until the one-before-last byte is read + * from the RX buffer. The interrupt flag actually gets set, but the CPU + * doesn't get interrupted. Thus, we can check the flag and read the last + * byte, if it's available. + */ + if ((m_left == 1) && UCRXIFG){ + m_left--; + m_buf[m_pos++] = call Usci.getRxbuf(); + } + if (m_left == 0) { /* * all done receiving... diff --git a/tos/types/I2C.h b/tos/types/I2C.h index bf4bdf1599..c0286f4e9c 100644 --- a/tos/types/I2C.h +++ b/tos/types/I2C.h @@ -39,15 +39,39 @@ #ifndef _I2C_H #define _I2C_H +/* + * It would be nice to deprecate TI2CExtdAddr and TI2CBasicAddr + * and replace them with TI2C7Bit and TI2C10Bit. + * + * But there is way too much code that uses TI2CBasicAddr and BasicAddr + * and it would be a pain to fix all that. Also adding a backward + * compatible interface to code providing BasicAddr is a pain because + * of the signalling. More trouble than it is worth. + * + * So keep in mind that TI2CBasicAddr is really TI2C7Bit. + */ + +/* nobody uses ExtdAddr (10 bit) address but define it anyway */ typedef struct { } TI2CExtdAddr; + +/* + * BasicAddr (7 bit addresses) is used all over the place. + * so back filling isn't recommended. New code should use + * TI2C7Bit. But that is also problematic. If so stick with + * TI2CBasicAddr. + */ typedef struct { } TI2CBasicAddr; +typedef struct { } TI2C7Bit; +typedef struct { } TI2C10Bit; + typedef uint8_t i2c_flags_t; enum { I2C_START = 0x01, I2C_STOP = 0x02, I2C_ACK_END = 0x04, + I2C_RESTART = 0x08, }; diff --git a/tos/types/TinyError.h b/tos/types/TinyError.h index 6d3acc67ec..ded1e6cfa2 100644 --- a/tos/types/TinyError.h +++ b/tos/types/TinyError.h @@ -48,8 +48,8 @@ #define NESC_COMBINE(x) #endif -enum { - SUCCESS = 0, +typedef enum { + SUCCESS = 0, FAIL = 1, // Generic condition: backwards compatible ESIZE = 2, // Parameter passed in was too big. ECANCEL = 3, // Operation cancelled by a call. @@ -61,17 +61,18 @@ enum { EALREADY = 9, // The device state you are requesting is already set ENOMEM = 10, // Memory required not available ENOACK = 11, // A packet was not acknowledged - ELAST = 11 // Last enum value -}; + ETIMEOUT = 12, // operation timed out + ELAST = 12 // Last enum value +} error_t NESC_COMBINE("ecombine"); -typedef uint8_t error_t NESC_COMBINE("ecombine"); - -error_t ecombine(error_t r1, error_t r2) @safe() -/* Returns: r1 if r1 == r2, FAIL otherwise. This is the standard error - combination function: two successes, or two identical errors are - preserved, while conflicting errors are represented by FAIL. -*/ -{ +/* + * Returns: r1 if r1 == r2, FAIL otherwise. + * + * This is the standard error combination function: two successes, or + * two identical errors are preserved, while conflicting errors are + * represented by FAIL. + */ +error_t ecombine(error_t r1, error_t r2) @safe() { return r1 == r2 ? r1 : FAIL; } From c7919bb460eb0470ed87c87dbcef02eb3dd86c77 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 17 Dec 2013 16:22:03 -0600 Subject: [PATCH 374/411] Fixed how UCRXIFG interrupt flag is checked --- tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc index 83d2f6c84f..a8ca13afff 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc @@ -543,9 +543,12 @@ implementation { * doesn't get interrupted. Thus, we can check the flag and read the last * byte, if it's available. */ - if ((m_left == 1) && UCRXIFG){ - m_left--; - m_buf[m_pos++] = call Usci.getRxbuf(); + if (m_left == 1){ + uint8_t ifg = call Usci.getIfg(); + if (ifg & UCRXIFG){ + m_left--; + m_buf[m_pos++] = call Usci.getRxbuf(); + } } if (m_left == 0) { From bb1c9a563f5c71c9be936d46b22ad41fb449dcaf Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 20 Dec 2013 10:33:08 -0600 Subject: [PATCH 375/411] Added gdb commands to flash device. Removed settings that were making this fail --- tos/chips/msp430/99_gdb/gdbinit | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/tos/chips/msp430/99_gdb/gdbinit b/tos/chips/msp430/99_gdb/gdbinit index d2fefcea66..7cf25f2d6a 100644 --- a/tos/chips/msp430/99_gdb/gdbinit +++ b/tos/chips/msp430/99_gdb/gdbinit @@ -1,15 +1,15 @@ -set remoteaddresssize 0d64 +#set remoteaddresssize 0d64 set remotetimeout 0d999999 -set remote memory-write-packet-size 1024 -set remote memory-write-packet-size fixed +#set remote memory-write-packet-size 1024 +#set remote memory-write-packet-size fixed set remote memory-read-packet-size 1024 set remote memory-read-packet-size fixed #source ../../.gdb_x1 #source ../../.gdb_x2 -source ../../.gdb_x5 +source ./.gdb_x5 target remote localhost:2000 @@ -53,9 +53,30 @@ end define rst monitor reset +flushregs c end document rst Reset and run device end + +define flash +erase +load +end + +document flash +Erase, load device +end + +define flash_run +erase +load +monitor reset +flushregs +end + +document flash_run +Erase, load and reset device +end From dd104522a0049f3f239a7d7974be2277e43724c9 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 20 Dec 2013 11:00:51 -0600 Subject: [PATCH 376/411] Added 868 MHz settings. Also now uses PA values --- tos/chips/cc1101/CC1101DriverLayer.h | 44 ++++++++++++++++++++++++-- tos/chips/cc1101/CC1101DriverLayerP.nc | 11 ++++++- 2 files changed, 52 insertions(+), 3 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h index ad2674d2cf..f4b9e855ad 100644 --- a/tos/chips/cc1101/CC1101DriverLayer.h +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -329,8 +329,8 @@ enum cc1101_config_reg_enums { #define CC1101_500K 10 #ifndef CC1101_BAUD -//#define CC1101_BAUD CC1101_10K -#define CC1101_BAUD CC1101_250K +#define CC1101_BAUD CC1101_10K +//#define CC1101_BAUD CC1101_250K #endif /** @@ -375,6 +375,7 @@ enum cc1101_config_reg_enums { +#if (CC1101_MATCHING_NETWORK == CC1101_433_MHZ) /***************** 433 MHz Matching Network ****************/ // Default channel is at 433.191833 MHz @@ -412,7 +413,46 @@ enum{ #define CC1101_PA CC1101_PA_PLUS_0 #endif +#elif (CC1101_MATCHING_NETWORK == CC1101_868_MHZ) +/***************** 868 MHz Matching Network ****************/ +#warning "Using 868 MHz radio" +// Default channel is at 868.192749 MHz +#ifndef CC1101_DEFAULT_CHANNEL +#define CC1101_DEFAULT_CHANNEL 141 +#endif + +#ifndef CC1101_CHANNEL_MIN +#define CC1101_CHANNEL_MIN 0 +#endif + +#ifndef CC1101_CHANNEL_MAX +#define CC1101_CHANNEL_MAX 255 +#endif + +enum { + CC1101_LOWEST_FREQ = 839998, + CC1101_DEFAULT_FREQ2 = 0x20, + CC1101_DEFAULT_FREQ1 = 0x4E, + CC1101_DEFAULT_FREQ0 = 0xC4, +}; + +/** + * These values calculated using TI smart RF studio + */ +enum{ + CC1101_PA_PLUS_10 = 0xC3, + CC1101_PA_PLUS_5 = 0x85, + CC1101_PA_PLUS_0 = 0x8E, + CC1101_PA_MINUS_5 = 0x57, + CC1101_PA_MINUS_10 = 0x34, +}; + +#ifndef CC1101_PA +#define CC1101_PA CC1101_PA_PLUS_10 +#endif + +#endif /** * These are used for calculating channels at runtime */ diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 453e4a1457..43706f70ca 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -215,6 +215,12 @@ implementation uint8_t configRegSize = 47; + uint8_t paRegs[] = { + CC1101_PA + }; + uint8_t paRegSize = 1; + + norace uint16_t capturedTime; // time when the last GDO0 rising edge was captured @@ -676,6 +682,9 @@ implementation call CSN.clr(); burstWrite(0x0, configRegs, configRegSize); call CSN.set(); + call CSN.clr(); + burstWrite(CC1101_PATABLE, paRegs, paRegSize); + call CSN.set(); state = STATE_IDLE; call Tasklet.schedule(); } @@ -1069,7 +1078,7 @@ implementation #endif if (fifo_length < 3 || fifo_length > call RadioPacket.maxPayloadLength() + 2 ) { // bad length: bail out - resetRx(); + /*resetRx();*/ return; } From 6f33584c88eab95019d853e8cb85e4212f8b88ff Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 20 Dec 2013 11:06:41 -0600 Subject: [PATCH 377/411] Added pin settings for VUMCR --- support/make/vumcr.target | 1 + tos/platforms/vumcr/.platform | 3 +- .../vumcr/hardware/usci/PlatformSerialC.nc | 76 +++++++++++++++++ .../vumcr/hardware/usci/PlatformSerialP.nc | 84 +++++++++++++++++++ .../vumcr/hardware/usci/PlatformSpiC.nc | 29 +++++++ .../vumcr/hardware/usci/PlatformSpiP.nc | 17 ++++ .../vumcr/hardware/usci/PlatformUsciMapC.nc | 69 +++++++++++++++ 7 files changed, 278 insertions(+), 1 deletion(-) create mode 100644 tos/platforms/vumcr/hardware/usci/PlatformSerialC.nc create mode 100644 tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc create mode 100644 tos/platforms/vumcr/hardware/usci/PlatformSpiC.nc create mode 100644 tos/platforms/vumcr/hardware/usci/PlatformSpiP.nc create mode 100644 tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc diff --git a/support/make/vumcr.target b/support/make/vumcr.target index 4ffa6813e5..840a747869 100644 --- a/support/make/vumcr.target +++ b/support/make/vumcr.target @@ -3,6 +3,7 @@ PLATFORM = vumcr MSP_MCU = msp430f5528 DEFAULT_PROGRAM ?= mspdebug +MSP_DEBUG_FLAGS ?= tilib $(call TOSMake_include_platform,msp) diff --git a/tos/platforms/vumcr/.platform b/tos/platforms/vumcr/.platform index c5873e56a1..c695f88b28 100644 --- a/tos/platforms/vumcr/.platform +++ b/tos/platforms/vumcr/.platform @@ -7,16 +7,17 @@ push( @includes, qw( %P/hardware/pins %P/hardware/leds + %T/hardware/usci %T/platforms/exp430/ %T/platforms/exp430/hardware/adc %T/platforms/exp430/hardware/buttons %T/platforms/exp430/hardware/clock - %T/platforms/exp430/hardware/usci %T/platforms/exp430/chips/ccxx00 %T/chips/msp430/x5xxx %T/chips/msp430/x5xxx/lpm %T/chips/msp430/x5xxx/timer %T/chips/msp430/x5xxx/usci-v2 + %T/chips/msp430/x5xxx/usci-v2/i2c-sm %T/chips/msp430 %T/chips/msp430/pins %T/chips/msp430/timer diff --git a/tos/platforms/vumcr/hardware/usci/PlatformSerialC.nc b/tos/platforms/vumcr/hardware/usci/PlatformSerialC.nc new file mode 100644 index 0000000000..6c711ccbf4 --- /dev/null +++ b/tos/platforms/vumcr/hardware/usci/PlatformSerialC.nc @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/** + * De-facto standard component for platform independent access to a serial port. + * + * This implementation supports the TI EM430 and other MSP430XV2-based boards. + * + * Note that, since the standard practice is to use StdControl to + * start and stop this module (which requests and releases the + * corresponding USCI UART module), inclusion of this into an + * application is incompatible with sharing the UART among multiple + * clients in the TEP108 sense of resource sharing. + * + * @author David Moss + * @author Peter A. Bigot + * @author Addisu Z. Taddese + */ + +configuration PlatformSerialC { + provides { + interface StdControl; + interface UartStream; + interface UartByte; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSerialP; + StdControl = PlatformSerialP; + + components new Msp430UsciUartA1C() as UartC; + + UartStream = UartC; + UartByte = UartC; + Msp430UsciError = UartC; + PlatformSerialP.Resource -> UartC.Resource; + UartC.Msp430UsciConfigure -> PlatformSerialP.Msp430UsciConfigure; + +} diff --git a/tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc b/tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc new file mode 100644 index 0000000000..9d81ae8881 --- /dev/null +++ b/tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2009-2010 People Power Company + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @author David Moss + * @author Peter A. Bigot + * @author Addisu Z. Taddese + */ + +/* + * This table assumes UART clock input (SMCLK) is 8MHz + */ +msp430_usci_config_t msp430_usci_uart_exp430_config = { + /* N81 UART mode driven by SMCLK */ + ctl0 : 0, + ctl1 : UCSSEL__SMCLK, + + /* SLAU208 Table 34-4 8MHz 9600: UBR=833, BRS=2, BRF=0 */ + /*brw 833 => 9600*/ + /*br0 : 68,*/ + /*br1 : 3,*/ + /* SLAU208 Table 34-4 8MHz 9600: UBR=833, BRS=2, BRF=0 */ + /* brw 69 => 115200*/ + /*br0 : 69,*/ + br0 : 8, + br1 : 0, + mctl : UCBRF_0 | UCBRS_2 +}; + +module PlatformSerialP { + provides interface StdControl; + provides interface Msp430UsciConfigure; + uses interface Resource; +} + +implementation { + + command error_t StdControl.start(){ + return call Resource.immediateRequest(); + } + + command error_t StdControl.stop(){ + return call Resource.release(); + } + + event void Resource.granted() { } + + async command const msp430_usci_config_t* Msp430UsciConfigure.getConfiguration(){ + return &msp430_usci_uart_exp430_config; + } +} diff --git a/tos/platforms/vumcr/hardware/usci/PlatformSpiC.nc b/tos/platforms/vumcr/hardware/usci/PlatformSpiC.nc new file mode 100644 index 0000000000..231bbab782 --- /dev/null +++ b/tos/platforms/vumcr/hardware/usci/PlatformSpiC.nc @@ -0,0 +1,29 @@ + +configuration PlatformSpiC { + provides { + interface SpiByte; + interface Resource; + interface SpiPacket; + interface Msp430UsciError; + } +} + +implementation { + + components PlatformSpiP; + +// components MainC; +// MainC.SoftwareInit -> PlatformSpiP; + + components new Msp430UsciSpiB0C() as SpiC; + + SpiByte = SpiC; + Resource = SpiC; + SpiPacket = SpiC; + + Msp430UsciError = SpiC; + PlatformSpiP.Resource -> SpiC.Resource; + + components PlatformLedsC; + PlatformSpiP.Leds -> PlatformLedsC; +} diff --git a/tos/platforms/vumcr/hardware/usci/PlatformSpiP.nc b/tos/platforms/vumcr/hardware/usci/PlatformSpiP.nc new file mode 100644 index 0000000000..aa2bc846f3 --- /dev/null +++ b/tos/platforms/vumcr/hardware/usci/PlatformSpiP.nc @@ -0,0 +1,17 @@ + +module PlatformSpiP { + provides interface Init; + uses { + interface Resource; + interface Leds; + } +} + +implementation { + + command error_t Init.init() { + return call Resource.immediateRequest(); + } + + event void Resource.granted() { } +} diff --git a/tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc new file mode 100644 index 0000000000..82109d7b82 --- /dev/null +++ b/tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "msp430usci.h" + +/** + * Connect the appropriate pins for USCI support on a CC430. + * + * @author Peter A. Bigot + */ + +configuration PlatformUsciMapC { +} implementation { + components HplMsp430GeneralIOC as GIO; + + components Msp430UsciUartA1P as UartA1C; + UartA1C.URXD -> GIO.UCA1RXD; + UartA1C.UTXD -> GIO.UCA1TXD; + + components Msp430UsciSpiA0P as SpiA0C; + SpiA0C.SIMO -> GIO.UCA0SIMO; + SpiA0C.SOMI -> GIO.UCA0SOMI; + SpiA0C.CLK -> GIO.UCA0CLK; + + components Msp430UsciSpiB0P as SpiB0C; + SpiB0C.SIMO -> GIO.UCB0SIMO; + SpiB0C.SOMI -> GIO.UCB0SOMI; + SpiB0C.CLK -> GIO.UCB0CLK; + + /*components Msp430UsciSpiA3P as SpiA3C;*/ + /*SpiA3C.SIMO -> GIO.UCA3SIMO;*/ + /*SpiA3C.SOMI -> GIO.UCA3SOMI;*/ + /*SpiA3C.CLK -> GIO.UCA3CLK;*/ + + components Msp430UsciI2CB1P as I2CB1C; + I2CB1C.SDA -> GIO.UCB1SDA; + I2CB1C.SCL -> GIO.UCB1SCL; +} From f4ef1f019525ba103dad95802822e9166c8d5581 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 23 Dec 2013 16:19:45 -0600 Subject: [PATCH 378/411] ADC12 now uses Timer_B instead of Timer_A for repeated samples --- .../exp430/hardware/adc/Msp430Adc12.h | 341 +++++++++ .../exp430/hardware/adc/Msp430Adc12ImplP.nc | 722 ++++++++++++++++++ .../exp430/hardware/adc/Msp430Adc12P.nc | 120 +++ tos/platforms/exp430/hardware/adc/README.txt | 4 + 4 files changed, 1187 insertions(+) create mode 100644 tos/platforms/exp430/hardware/adc/Msp430Adc12.h create mode 100644 tos/platforms/exp430/hardware/adc/Msp430Adc12ImplP.nc create mode 100644 tos/platforms/exp430/hardware/adc/Msp430Adc12P.nc create mode 100644 tos/platforms/exp430/hardware/adc/README.txt diff --git a/tos/platforms/exp430/hardware/adc/Msp430Adc12.h b/tos/platforms/exp430/hardware/adc/Msp430Adc12.h new file mode 100644 index 0000000000..baeecc4fa7 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/Msp430Adc12.h @@ -0,0 +1,341 @@ +/* + * Copyright (c) 2013, Eric B. Decker + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the Technische Universitaet Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jan Hauer + * @author Peter A. Bigot + * @author Eric B. Decker + */ + +#ifndef MSP430ADC12_H +#define MSP430ADC12_H +#include "Msp430RefVoltGenerator.h" + +#if !defined(__msp430_have_adc12) +#if !defined(__MSP430_HAS_ADC12__) +#if !defined(__MSP430_HAS_ADC12_PLUS__) +#error Target msp430 device does not have ADC12 module +#endif +#endif +#endif + +/* + * ADC12_USE_PLATFORM_ADC: Assume the platform defines a PlatformAdcC + * component that provides the necessary timer and IO pin interfaces. + * + * ADC12_PINS_AVAILABLE: The number of pins available on the hardware. + * If not defined, defaults to 8. + * + * ADC12_PIN_AUTO_CONFIGURE: Define to automatically configure all + * available pins. Only applies if ADC12_USE_PLATFORM_ADC is defined; + * otherwise refer to ADC12_P6PIN_AUTO_CONFIGURE. + */ + +#define ADC12_TIMERB_ENABLED +#define ADC12_P6PIN_AUTO_CONFIGURE +#define ADC12_CHECK_ARGS +//#define ADC12_ONLY_WITH_DMA + +#ifndef ADC12_PINS_AVAILABLE +#define ADC12_PINS_AVAILABLE 8 +#endif /* ADC12_PINS_AVAILABLE */ + +// for HIL clients +#define REF_VOLT_AUTO_CONFIGURE + +typedef struct { + // see README.txt + unsigned int inch: 5; // input channel + unsigned int sref: 3; // reference voltage + unsigned int ref2_5v: 1; // reference voltage level + unsigned int adc12ssel: 2; // clock source sample-hold-time + unsigned int adc12div: 3; // clock divider sample-hold-time + unsigned int sht: 4; // sample-hold-time + unsigned int sampcon_ssel: 2; // clock source sampcon signal + unsigned int sampcon_id: 2; // clock divider sampcon + unsigned int : 0; // align to a word boundary +} msp430adc12_channel_config_t; + +typedef struct +{ + // see README.txt + volatile unsigned + inch: 4, // input channel + sref: 3, // reference voltage + eos: 1; // end of sequence flag +} __attribute__ ((packed)) adc12memctl_t; + +enum inch_enum +{ + // see device specific data sheet which pin Ax is mapped to + INPUT_CHANNEL_A0 = 0, // input channel A0 + INPUT_CHANNEL_A1 = 1, // input channel A1 + INPUT_CHANNEL_A2 = 2, // input channel A2 + INPUT_CHANNEL_A3 = 3, // input channel A3 + INPUT_CHANNEL_A4 = 4, // input channel A4 + INPUT_CHANNEL_A5 = 5, // input channel A5 + INPUT_CHANNEL_A6 = 6, // input channel A6 + INPUT_CHANNEL_A7 = 7, // input channel A7 + EXTERNAL_REF_VOLTAGE_CHANNEL = 8, // VeREF+ (input channel 8) + REF_VOLTAGE_NEG_TERMINAL_CHANNEL = 9, // VREF-/VeREF- (input channel 9) + TEMPERATURE_DIODE_CHANNEL = 10, // Temperature diode (input channel 10) + SUPPLY_VOLTAGE_HALF_CHANNEL = 11, // (AVcc-AVss)/2 + INPUT_CHANNEL_A12 = 12, // input channel A12 + INPUT_CHANNEL_A13 = 13, // input channel A13 + INPUT_CHANNEL_A14 = 14, // input channel A14 + INPUT_CHANNEL_A15 = 15, // input channel A15 + INPUT_CHANNEL_NONE, // illegal (identifies invalid settings) +}; + +enum sref_enum +{ + REFERENCE_AVcc_AVss = 0, // VR+ = AVcc and VR-= AVss + REFERENCE_VREFplus_AVss = 1, // VR+ = VREF+ and VR-= AVss + REFERENCE_VeREFplus_AVss = 2, // VR+ = VeREF+ and VR-= AVss + REFERENCE_AVcc_VREFnegterm = 4, // VR+ = AVcc and VR-= VREF-/VeREF- + REFERENCE_VREFplus_VREFnegterm = 5, // VR+ = VREF+ and VR-= VREF-/VeREF- + REFERENCE_VeREFplus_VREFnegterm = 6 // VR+ = VeREF+ and VR-= VREF-/VeREF- +}; + +enum ref2_5v_enum +{ + REFVOLT_LEVEL_1_5 = 0, // reference voltage of 1.5 V + REFVOLT_LEVEL_2_5 = 1, // reference voltage of 2.5 V + REFVOLT_LEVEL_NONE = 0, // if e.g. AVcc is chosen +}; + +enum adc12ssel_enum +{ + SHT_SOURCE_ADC12OSC = 0, // ADC12OSC + SHT_SOURCE_ACLK = 1, // ACLK + SHT_SOURCE_MCLK = 2, // MCLK + SHT_SOURCE_SMCLK = 3 // SMCLK +}; + +enum adc12div_enum +{ + SHT_CLOCK_DIV_1 = 0, // ADC12 clock divider of 1 + SHT_CLOCK_DIV_2 = 1, // ADC12 clock divider of 2 + SHT_CLOCK_DIV_3 = 2, // ADC12 clock divider of 3 + SHT_CLOCK_DIV_4 = 3, // ADC12 clock divider of 4 + SHT_CLOCK_DIV_5 = 4, // ADC12 clock divider of 5 + SHT_CLOCK_DIV_6 = 5, // ADC12 clock divider of 6 + SHT_CLOCK_DIV_7 = 6, // ADC12 clock divider of 7 + SHT_CLOCK_DIV_8 = 7, // ADC12 clock divider of 8 +}; + +enum sht_enum +{ + SAMPLE_HOLD_4_CYCLES = 0, // sampling duration is 4 clock cycles + SAMPLE_HOLD_8_CYCLES = 1, // ... + SAMPLE_HOLD_16_CYCLES = 2, + SAMPLE_HOLD_32_CYCLES = 3, + SAMPLE_HOLD_64_CYCLES = 4, + SAMPLE_HOLD_96_CYCLES = 5, + SAMPLE_HOLD_128_CYCLES = 6, + SAMPLE_HOLD_192_CYCLES = 7, + SAMPLE_HOLD_256_CYCLES = 8, + SAMPLE_HOLD_384_CYCLES = 9, + SAMPLE_HOLD_512_CYCLES = 10, + SAMPLE_HOLD_768_CYCLES = 11, + SAMPLE_HOLD_1024_CYCLES = 12 +}; + +enum sampcon_ssel_enum +{ + SAMPCON_SOURCE_TACLK = 0, // Timer A clock source is (external) TACLK + SAMPCON_SOURCE_ACLK = 1, // Timer A clock source ACLK + SAMPCON_SOURCE_SMCLK = 2, // Timer A clock source SMCLK + SAMPCON_SOURCE_INCLK = 3, // Timer A clock source is (external) INCLK +}; + +enum sampcon_id_enum +{ + SAMPCON_CLOCK_DIV_1 = 0, // SAMPCON clock divider of 1 + SAMPCON_CLOCK_DIV_2 = 1, // SAMPCON clock divider of 2 + SAMPCON_CLOCK_DIV_4 = 2, // SAMPCON clock divider of 4 + SAMPCON_CLOCK_DIV_8 = 3, // SAMPCON clock divider of 8 +}; + +// The unique string for allocating ADC resource interfaces +#define MSP430ADC12_RESOURCE "Msp430Adc12C.Resource" + +// The unique string for accessing HAL2 +#define ADCC_SERVICE "AdcC.Service" + +// The unique string for accessing HAL2 via ReadStream +#define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client" + + +#ifdef __MSP430_TI_HEADERS__ + // "The bitfield structures that overlay peripheral registers are not part of + // mspgcc in the future; the recommended way of accessing those fields is to + // use the masks defined in the TI headers." + // (https://www.millennium.berkeley.edu/pipermail/tinyos-devel/2011-March/004804.html) + // + // Older versions of cpu header files included register definitions using bit field + // structures. Current versions using TI_HEADERS no longer include these bit field + // structure definitions. + // + // One could rewrite the drivers to use masks as is recommended in the tinyos-devel + // excerpt listed above. Technically there is nothing wrong with using bit fields + // as long as they work (there have been problems in different versions of the compiler). + // The big problem with bit fields is endianess and portability (related) but neither + // of those issues should be a problem here. + // + // It has been verified that the definitions of the ADC12 + // flags has not changed over the different MSP430 chip variants that have an + // ADC12, i.e. using common structs is safe (verified for the header files + // installed via package msp430mcu-tinyos version 20110613-20110821). + // (http://mail.millennium.berkeley.edu/pipermail/tinyos-2.0wg/2011-August/003861.html) + // + // So it is left as an exercise for the student to reimplement the driver if someone + // feels it is worth the time to do so. + // + // Be sure to check the generated code with a current compiler (which are in flux). + +typedef struct { + volatile unsigned + adc12sc:1, + enc:1, + adc12tovie:1, + adc12ovie:1, + adc12on:1, + refon:1, + r2_5v:1, + msc:1, + sht0:4, + sht1:4; +volatile unsigned int : 0; // align to word boundary (saves significant amount of code) +} __attribute__ ((packed)) adc12ctl0_t; + +typedef struct { + volatile unsigned + adc12busy:1, + conseq:2, + adc12ssel:2, + adc12div:3, + issh:1, + shp:1, + shs:2, + cstartadd:4; +volatile unsigned int : 0; // align to word boundary (saves significant amount of code) +} __attribute__ ((packed)) adc12ctl1_t; + + +#ifdef __MSP430_HAS_ADC12_PLUS__ + +typedef struct { + volatile unsigned + bit0:1, + bit1:1, + bit2:1, + bit3:1, + bit4:1, + bit5:1, + bit6:1, + bit7:1, + bit8:1, + bit9:1, + bit10:1, + bit11:1, + bit12:1, + bit13:1, + bit14:1, + bit15:1; +} __attribute__ ((packed)) adc12xflg_t; + +/* The adc12 declaration itself */ +struct adc12_t { + adc12ctl0_t ctl0; + adc12ctl1_t ctl1; + adc12xflg_t ifg; + adc12xflg_t ie; + adc12xflg_t iv; +}; + +#endif /* __MSP430_HAS_ADC12_PLUS__ */ + +/* + * TI's headers are not consistent. There are several + * headers for cpus that define __MSP430_HAS_ADC12__ + * but doesn't define ADC12ENC. Rather it defines ENC. + * + * Same applies to ADC12CONSEQ{0,1}. There are many others + * which aren't currently used, the TI headers are seriously + * confused, something using ENC sometimes ADC12ENC, ADC12ENC + * is correct. If more are used because of changes in the + * driver it is recommended that these tweaks be pulled out + * into their own file which then gets included here. + * + * Fix it here. Note that we are protected from picking + * up a wrong value for ENC because we check to see if + * this cpu explicitly has the ADC12 h/w. + */ + +#ifndef ADC12ENC +#define ADC12ENC ENC +#endif + +#ifndef ADC12CONSEQ0 +#define ADC12CONSEQ0 CONSEQ0 +#endif + +#ifndef ADC12CONSEQ1 +#define ADC12CONSEQ1 CONSEQ1 +#endif + +#endif /* __MSP430_TI_HEADERS__ */ + +#if __GNUC__ >= 4 +/* + * at one point (3.2.3 timeframe) someone noted that there was problems + * with the bitfield code gen. What exactly wasn't documented. No + * problems have been noticed but you might want to keep an eye out. + * + * As of 4.6.3 and 4.7 do not bitch. + * + * #warning "ADC12 periph_reg bitfields: mspgcc >= 4 (check bitfield code gen)." + */ +#else + /* Test for GCC bug (bitfield access) - only version 3.2.3 is known to be stable */ + #define GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__ * 10 + __GNUC_PATCHLEVEL__) + #if GCC_VERSION == 332 + #error "This msp430-gcc version (3.3.2) is known to contain a bug when accessing bitfield structs." + #elif GCC_VERSION != 323 + #warning "This version of msp430-gcc might contain a bug when accessing bitfield structs (version 3.2.3 is safe - anything else is on your own risk)" + #endif + +#endif /* __GNUC__ >= 4 */ + +#endif /* MSP430ADC12_H */ diff --git a/tos/platforms/exp430/hardware/adc/Msp430Adc12ImplP.nc b/tos/platforms/exp430/hardware/adc/Msp430Adc12ImplP.nc new file mode 100644 index 0000000000..4f2e1251cd --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/Msp430Adc12ImplP.nc @@ -0,0 +1,722 @@ +/* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright notice, + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jan Hauer + * @author Peter A. Bigot + * @author Eric B. Decker + * ======================================================================== + */ + +#if (! ADC12_USE_PLATFORM_ADC) && defined(ADC12_P6PIN_AUTO_CONFIGURE) +/* Convert ADC12_P6PIN_AUTO_CONFIGURE to new signal */ +#define ADC12_PIN_AUTO_CONFIGURE 1 +#endif /* P6PIN auto configure without PlatformAdcC */ + +#include +module Msp430Adc12ImplP @safe() { + provides { + interface Init; + interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; + interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; + interface Msp430Adc12Overflow as Overflow[uint8_t id]; + interface AsyncStdControl as DMAExtension[uint8_t id]; + } + uses { + interface ArbiterInfo as ADCArbiterInfo; + interface HplAdc12; + interface Msp430Timer as TimerB; + interface Msp430TimerControl as ControlB0; + interface Msp430TimerControl as ControlB1; + interface Msp430Compare as CompareB0; + interface Msp430Compare as CompareB1; + interface HplMsp430GeneralIO as A0; + interface HplMsp430GeneralIO as A1; + interface HplMsp430GeneralIO as A2; + interface HplMsp430GeneralIO as A3; + interface HplMsp430GeneralIO as A4; + interface HplMsp430GeneralIO as A5; +#if 6 < ADC12_PINS_AVAILABLE + interface HplMsp430GeneralIO as A6; + interface HplMsp430GeneralIO as A7; +#if 8 < ADC12_PINS_AVAILABLE + interface HplMsp430GeneralIO as A8; + interface HplMsp430GeneralIO as A9; + interface HplMsp430GeneralIO as A10; + interface HplMsp430GeneralIO as A11; + interface HplMsp430GeneralIO as A12; + interface HplMsp430GeneralIO as A13; + interface HplMsp430GeneralIO as A14; + interface HplMsp430GeneralIO as A15; +#endif /* ADC12_PINS_AVAILABLE : 8 */ +#endif /* ADC12_PINS_AVAILABLE : 6 */ + } +} +implementation { + +#ifdef ADC12_TIMERB_ENABLED +/** + * The SHS definition must be matched with the correct timer assignment. + * Timer_A => 1 + * Timer_B => 3 + * This mapping may also depend on the platform. This mapping is for the MSP430F552x + */ +#define SHS 3 +#endif + + enum { + SINGLE_DATA = 1, + SINGLE_DATA_REPEAT = 2, + MULTIPLE_DATA = 4, + MULTIPLE_DATA_REPEAT = 8, + MULTI_CHANNEL = 16, + CONVERSION_MODE_MASK = 0x1F, + + ADC_BUSY = 32, /* request pending */ + USE_TIMERB = 64, /* TimerB used for SAMPCON signal */ + ADC_OVERFLOW = 128, + }; + + uint8_t state; /* see enum above */ + + uint16_t resultBufferLength; /* length of buffer */ + uint16_t *COUNT_NOK(resultBufferLength) resultBufferStart; + uint16_t resultBufferIndex; /* offset into buffer */ + uint8_t numChannels; /* number of channels (multi-channel conversion) */ + uint8_t clientID; /* ID of client that called getData() */ + + command error_t Init.init() + { + adc12ctl0_t ctl0; + + atomic { + call HplAdc12.stopConversion(); /* data unreliable */ + call HplAdc12.resetIFGs(); /* clear relicts from SWReset */ + ctl0 = call HplAdc12.getCtl0(); + ctl0.adc12tovie = 1; + ctl0.adc12ovie = 1; + call HplAdc12.setCtl0(ctl0); +#ifdef __MSP430_HAS_REF__ + // Clear REFMSTR: use ADC12CTL to configure reference generate for backwards compatibility + REFCTL0 &= (~REFMSTR); +#endif // __MSP430_HAS_REF__ + } + return SUCCESS; + } + + void prepareTimerB(uint16_t interval, uint16_t csSAMPCON, uint16_t cdSAMPCON) + { +#ifdef ADC12_TIMERB_ENABLED + msp430_compare_control_t ccResetSHI = { + ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, + outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; + + call TimerB.setMode(MSP430TIMER_STOP_MODE); + call TimerB.clear(); + call TimerB.disableEvents(); + call TimerB.setClockSource(csSAMPCON); + call TimerB.setInputDivider(cdSAMPCON); + call ControlB0.setControl(ccResetSHI); + call CompareB0.setEvent(interval-1); + call CompareB1.setEvent((interval-1)/2); +#endif + } + + void startTimerB() + { +#ifdef ADC12_TIMERB_ENABLED + msp430_compare_control_t ccSetSHI = { + ccifg : 0, cov : 0, out : 1, cci : 0, ccie : 0, + outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; + msp430_compare_control_t ccResetSHI = { + ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, + outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; + msp430_compare_control_t ccRSOutmod = { + ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, + outmod : 7, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; + // manually trigger first conversion, then switch to Reset/set conversionMode + call ControlB1.setControl(ccResetSHI); + call ControlB1.setControl(ccSetSHI); + //call ControlB1.setControl(ccResetSHI); + call ControlB1.setControl(ccRSOutmod); + call TimerB.setMode(MSP430TIMER_UP_MODE); // go! +#endif + } + + void configureAdcPin( uint8_t inch ) + { +#if ADC12_PIN_AUTO_CONFIGURE + switch (inch) + { + case 0: call A0.selectModuleFunc(); call A0.makeInput(); break; + case 1: call A1.selectModuleFunc(); call A1.makeInput(); break; + case 2: call A2.selectModuleFunc(); call A2.makeInput(); break; + case 3: call A3.selectModuleFunc(); call A3.makeInput(); break; + case 4: call A4.selectModuleFunc(); call A4.makeInput(); break; + case 5: call A5.selectModuleFunc(); call A5.makeInput(); break; +#if 6 < ADC12_PINS_AVAILABLE + case 6: call A6.selectModuleFunc(); call A6.makeInput(); break; + case 7: call A7.selectModuleFunc(); call A7.makeInput(); break; +#if 8 < ADC12_PINS_AVAILABLE + case 8: call A8.selectModuleFunc(); call A8.makeInput(); break; + case 9: call A9.selectModuleFunc(); call A9.makeInput(); break; + case 10: call A10.selectModuleFunc(); call A10.makeInput(); break; + case 11: call A11.selectModuleFunc(); call A11.makeInput(); break; + case 12: call A12.selectModuleFunc(); call A12.makeInput(); break; + case 13: call A13.selectModuleFunc(); call A13.makeInput(); break; + case 14: call A14.selectModuleFunc(); call A14.makeInput(); break; + case 15: call A15.selectModuleFunc(); call A15.makeInput(); break; +#endif /* ADC12_PINS_AVAILABLE : 8 */ +#endif /* ADC12_PINS_AVAILABLE : 6 */ + } +#endif + } + + void resetAdcPin( uint8_t inch ) + { +#if ADC12_PIN_AUTO_CONFIGURE + switch (inch) + { + case 0: call A0.selectIOFunc(); break; + case 1: call A1.selectIOFunc(); break; + case 2: call A2.selectIOFunc(); break; + case 3: call A3.selectIOFunc(); break; + case 4: call A4.selectIOFunc(); break; + case 5: call A5.selectIOFunc(); break; +#if 6 < ADC12_PINS_AVAILABLE + case 6: call A6.selectIOFunc(); break; + case 7: call A7.selectIOFunc(); break; +#if 8 < ADC12_PINS_AVAILABLE + case 8: call A8.selectIOFunc(); break; + case 9: call A9.selectIOFunc(); break; + case 10: call A10.selectIOFunc(); break; + case 11: call A11.selectIOFunc(); break; + case 12: call A12.selectIOFunc(); break; + case 13: call A13.selectIOFunc(); break; + case 14: call A14.selectIOFunc(); break; + case 15: call A15.selectIOFunc(); break; +#endif /* ADC12_PINS_AVAILABLE : 8 */ +#endif /* ADC12_PINS_AVAILABLE : 6 */ + } +#endif + } + + async command error_t SingleChannel.configureSingle[uint8_t id]( + const msp430adc12_channel_config_t *config) + { + error_t result = ERESERVE; +#ifdef ADC12_CHECK_ARGS + if (!config || config->inch == INPUT_CHANNEL_NONE) + return EINVAL; +#endif + atomic { + if (state & ADC_BUSY) + return EBUSY; + if (call ADCArbiterInfo.userId() == id){ + adc12ctl1_t ctl1 = { + adc12busy: 0, + conseq: 0, + adc12ssel: config->adc12ssel, + adc12div: config->adc12div, + issh: 0, + shp: 1, + shs: 0, + cstartadd: 0 + }; + adc12memctl_t memctl = { + inch: config->inch, + sref: config->sref, + eos: 1 + }; + adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); + ctl0.msc = 1; + ctl0.sht0 = config->sht; + ctl0.sht1 = config->sht; + + state = SINGLE_DATA; + call HplAdc12.setCtl0(ctl0); + call HplAdc12.setCtl1(ctl1); + call HplAdc12.setMCtl(0, memctl); + call HplAdc12.setIEFlags(0x01); + result = SUCCESS; + } + } + return result; + } + + async command error_t SingleChannel.configureSingleRepeat[uint8_t id]( + const msp430adc12_channel_config_t *config, + uint16_t jiffies) + { + error_t result = ERESERVE; +#ifdef ADC12_CHECK_ARGS +#ifndef ADC12_TIMERB_ENABLED + if (jiffies>0) + return EINVAL; +#endif + if (!config || config->inch == INPUT_CHANNEL_NONE || jiffies == 1 || jiffies == 2) + return EINVAL; +#endif + atomic { + if (state & ADC_BUSY) + return EBUSY; + if (call ADCArbiterInfo.userId() == id) { + adc12ctl1_t ctl1 = { + adc12busy: 0, + conseq: 2, + adc12ssel: config->adc12ssel, + adc12div: config->adc12div, + issh: 0, + shp: 1, + shs: (jiffies == 0) ? 0 : SHS, + cstartadd: 0 + }; + adc12memctl_t memctl = { + inch: config->inch, + sref: config->sref, + eos: 1 + }; + adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); + ctl0.msc = (jiffies == 0) ? 1 : 0; + ctl0.sht0 = config->sht; + ctl0.sht1 = config->sht; + + state = SINGLE_DATA_REPEAT; + call HplAdc12.setCtl0(ctl0); + call HplAdc12.setCtl1(ctl1); + call HplAdc12.setMCtl(0, memctl); + call HplAdc12.setIEFlags(0x01); + if (jiffies){ + state |= USE_TIMERB; + prepareTimerB(jiffies, config->sampcon_ssel, config->sampcon_id); + } + result = SUCCESS; + } + } + return result; + } + + async command error_t SingleChannel.configureMultiple[uint8_t id]( + const msp430adc12_channel_config_t *config, + uint16_t *buf, uint16_t length, uint16_t jiffies) { + + error_t result = ERESERVE; + +#ifdef ADC12_CHECK_ARGS +#ifndef ADC12_TIMERB_ENABLED + if (jiffies>0) + return EINVAL; +#endif + if (!config || config->inch == INPUT_CHANNEL_NONE || !buf || !length || jiffies == 1 || jiffies == 2) + return EINVAL; +#endif + atomic { + if (state & ADC_BUSY) + return EBUSY; + if (call ADCArbiterInfo.userId() == id){ + adc12ctl1_t ctl1 = { + adc12busy: 0, + conseq: (length > 16) ? 3 : 1, + adc12ssel: config->adc12ssel, + adc12div: config->adc12div, + issh: 0, + shp: 1, + shs: (jiffies == 0) ? 0 : SHS, + cstartadd: 0 + }; + adc12memctl_t memctl = { + inch: config->inch, + sref: config->sref, + eos: 0 + }; + uint16_t i, mask = 1; + adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); + ctl0.msc = (jiffies == 0) ? 1 : 0; + ctl0.sht0 = config->sht; + ctl0.sht1 = config->sht; + + state = MULTIPLE_DATA; + resultBufferStart = NULL; + resultBufferLength = length; + resultBufferStart = buf; + resultBufferIndex = 0; + call HplAdc12.setCtl0(ctl0); + call HplAdc12.setCtl1(ctl1); + for (i=0; i<(length-1) && i < 15; i++) + call HplAdc12.setMCtl(i, memctl); + memctl.eos = 1; + call HplAdc12.setMCtl(i, memctl); + call HplAdc12.setIEFlags(mask << i); + + if (jiffies){ + state |= USE_TIMERB; + prepareTimerB(jiffies, config->sampcon_ssel, config->sampcon_id); + } + result = SUCCESS; + } + } + return result; + } + + async command error_t SingleChannel.configureMultipleRepeat[uint8_t id]( + const msp430adc12_channel_config_t *config, + uint16_t *buf, uint8_t length, uint16_t jiffies) { + + error_t result = ERESERVE; + +#ifdef ADC12_CHECK_ARGS +#ifndef ADC12_TIMERB_ENABLED + if (jiffies>0) + return EINVAL; +#endif + if (!config || config->inch == INPUT_CHANNEL_NONE || !buf || !length || length > 16 || jiffies == 1 || jiffies == 2) + return EINVAL; +#endif + atomic { + if (state & ADC_BUSY) + return EBUSY; + if (call ADCArbiterInfo.userId() == id){ + adc12ctl1_t ctl1 = { + adc12busy: 0, + conseq: 3, + adc12ssel: config->adc12ssel, + adc12div: config->adc12div, + issh: 0, + shp: 1, + shs: (jiffies == 0) ? 0 : SHS, + cstartadd: 0 + }; + adc12memctl_t memctl = { + inch: config->inch, + sref: config->sref, + eos: 0 + }; + uint16_t i, mask = 1; + adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); + ctl0.msc = (jiffies == 0) ? 1 : 0; + ctl0.sht0 = config->sht; + ctl0.sht1 = config->sht; + + state = MULTIPLE_DATA_REPEAT; + resultBufferStart = NULL; + resultBufferLength = length; + resultBufferStart = buf; + resultBufferIndex = 0; + + call HplAdc12.setCtl0(ctl0); + call HplAdc12.setCtl1(ctl1); + for (i=0; i<(length-1) && i < 15; i++) + call HplAdc12.setMCtl(i, memctl); + memctl.eos = 1; + call HplAdc12.setMCtl(i, memctl); + call HplAdc12.setIEFlags(mask << i); + + if (jiffies){ + state |= USE_TIMERB; + prepareTimerB(jiffies, config->sampcon_ssel, config->sampcon_id); + } + result = SUCCESS; + } + } + return result; + } + + async command error_t SingleChannel.getData[uint8_t id]() + { + atomic { + if (call ADCArbiterInfo.userId() == id){ + if ((state & MULTIPLE_DATA_REPEAT) && !resultBufferStart) + return EINVAL; + if (state & ADC_BUSY) + return EBUSY; + state |= ADC_BUSY; + clientID = id; + configureAdcPin((call HplAdc12.getMCtl(0)).inch); + call HplAdc12.startConversion(); + if (state & USE_TIMERB) + startTimerB(); + return SUCCESS; + } + } + return FAIL; + } + + async command error_t MultiChannel.configure[uint8_t id]( + const msp430adc12_channel_config_t *config, + adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buf, + uint16_t numSamples, uint16_t jiffies) { + + error_t result = ERESERVE; + +#ifdef ADC12_CHECK_ARGS +#ifndef ADC12_TIMERB_ENABLED + if (jiffies>0) + return EINVAL; +#endif + /* note: numSamples % (numMemctl+1) is expensive and should be reworked */ + if (!config || config->inch == INPUT_CHANNEL_NONE || !memctl || !numMemctl || + numMemctl > 15 || !numSamples || + !buf || jiffies == 1 || jiffies == 2 || numSamples % (numMemctl+1) != 0) + return EINVAL; +#endif + atomic { + if (state & ADC_BUSY) + return EBUSY; + if (call ADCArbiterInfo.userId() == id){ + adc12ctl1_t ctl1 = { + adc12busy: 0, + conseq: (numSamples > numMemctl+1) ? 3 : 1, + adc12ssel: config->adc12ssel, + adc12div: config->adc12div, + issh: 0, + shp: 1, + shs: (jiffies == 0) ? 0 : SHS, + cstartadd: 0 + }; + adc12memctl_t firstMemctl = { + inch: config->inch, + sref: config->sref, + eos: 0 + }; + uint16_t i, mask = 1; + adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); + ctl0.msc = (jiffies == 0) ? 1 : 0; + ctl0.sht0 = config->sht; + ctl0.sht1 = config->sht; + + state = MULTI_CHANNEL; + resultBufferStart = NULL; + resultBufferLength = numSamples; + resultBufferStart = buf; + resultBufferIndex = 0; + numChannels = numMemctl+1; + call HplAdc12.setCtl0(ctl0); + call HplAdc12.setCtl1(ctl1); + call HplAdc12.setMCtl(0, firstMemctl); + for (i=0; i<(numMemctl-1) && i < 14; i++){ + memctl[i].eos = 0; + call HplAdc12.setMCtl(i+1, memctl[i]); + } + memctl[i].eos = 1; + call HplAdc12.setMCtl(i+1, memctl[i]); + call HplAdc12.setIEFlags(mask << (i+1)); + + if (jiffies){ + state |= USE_TIMERB; + prepareTimerB(jiffies, config->sampcon_ssel, config->sampcon_id); + } + result = SUCCESS; + } + } + return result; + } + + async command error_t MultiChannel.getData[uint8_t id]() + { + uint8_t i; + atomic { + if (call ADCArbiterInfo.userId() == id){ + if (!resultBufferStart) + return EINVAL; + if (state & ADC_BUSY) + return EBUSY; + state |= ADC_BUSY; + clientID = id; + for (i=0; i 16) + length = 16; + else + length = resultBufferLength - resultBufferIndex; + do { + *resultBuffer++ = call HplAdc12.getMem(i); + } while (++i < length); + resultBufferIndex += length; + if (overflow || resultBufferLength == resultBufferIndex){ + stopConversion(); + resultBuffer -= resultBufferIndex; + k = resultBufferIndex - length; + resultBufferIndex = 0; + signal SingleChannel.multipleDataReady[clientID](resultBuffer, + overflow ? k : resultBufferLength); + } else if (resultBufferLength - resultBufferIndex > 15) + return; + else { + // last sequence < 16 samples + adc12memctl_t memctl = call HplAdc12.getMCtl(0); + memctl.eos = 1; + call HplAdc12.setMCtl(resultBufferLength - resultBufferIndex, memctl); + } + } + break; + case MULTIPLE_DATA_REPEAT: + { + uint8_t i = 0; + resultBuffer = resultBufferStart; + do { + *resultBuffer++ = call HplAdc12.getMem(i); + } while (++i < resultBufferLength); + + resultBufferStart = signal SingleChannel.multipleDataReady[clientID]( + resultBuffer-resultBufferLength, + overflow ? 0 : resultBufferLength); + if (!resultBufferStart) + stopConversion(); + break; + } +#endif + + default: + stopConversion(); + break; + } // switch + } + + default async event error_t SingleChannel.singleDataReady[uint8_t id](uint16_t data) { + return FAIL; + } + + default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id]( + uint16_t *buf, uint16_t numSamples) { return 0; } + + default async event void MultiChannel.dataReady[uint8_t id]( + uint16_t *buffer, uint16_t numSamples) {}; + + default async event void Overflow.memOverflow[uint8_t id]() {} + default async event void Overflow.conversionTimeOverflow[uint8_t id]() {} +} diff --git a/tos/platforms/exp430/hardware/adc/Msp430Adc12P.nc b/tos/platforms/exp430/hardware/adc/Msp430Adc12P.nc new file mode 100644 index 0000000000..8263c1cda2 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/Msp430Adc12P.nc @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright notice, + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Jan Hauer + * @author Peter A. Bigot + * @author Eric B. Decker + * ======================================================================== + */ + +#include +configuration Msp430Adc12P +{ + provides { + interface Resource[uint8_t id]; + interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; + interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; + interface Msp430Adc12Overflow as Overflow[uint8_t id]; + interface AsyncStdControl as DMAExtension[uint8_t id]; + } +} implementation { + components Msp430Adc12ImplP, HplAdc12P, MainC, + new SimpleRoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter; + + Resource = Arbiter; + SingleChannel = Msp430Adc12ImplP.SingleChannel; + MultiChannel= Msp430Adc12ImplP.MultiChannel; + Overflow = Msp430Adc12ImplP.Overflow; + DMAExtension = Msp430Adc12ImplP.DMAExtension; + + Msp430Adc12ImplP.Init <- MainC; + Msp430Adc12ImplP.ADCArbiterInfo -> Arbiter; + Msp430Adc12ImplP.HplAdc12 -> HplAdc12P; + +#if ADC12_USE_PLATFORM_ADC + components PlatformAdcC ; + + Msp430Adc12ImplP.TimerB -> PlatformAdcC.TimerB; + Msp430Adc12ImplP.ControlB0 -> PlatformAdcC.ControlB0; + Msp430Adc12ImplP.ControlB1 -> PlatformAdcC.ControlB1; + Msp430Adc12ImplP.CompareB0 -> PlatformAdcC.CompareB0; + Msp430Adc12ImplP.CompareB1 -> PlatformAdcC.CompareB1; + + Msp430Adc12ImplP.A0 -> PlatformAdcC.A0; + Msp430Adc12ImplP.A1 -> PlatformAdcC.A1; + Msp430Adc12ImplP.A2 -> PlatformAdcC.A2; + Msp430Adc12ImplP.A3 -> PlatformAdcC.A3; + Msp430Adc12ImplP.A4 -> PlatformAdcC.A4; + Msp430Adc12ImplP.A5 -> PlatformAdcC.A5; +#if 6 < ADC12_PINS_AVAILABLE + Msp430Adc12ImplP.A6 -> PlatformAdcC.A6; + Msp430Adc12ImplP.A7 -> PlatformAdcC.A7; +#if 8 < ADC12_PINS_AVAILABLE + Msp430Adc12ImplP.A8 -> PlatformAdcC.A8; + Msp430Adc12ImplP.A9 -> PlatformAdcC.A9; + Msp430Adc12ImplP.A10 -> PlatformAdcC.A10; + Msp430Adc12ImplP.A11 -> PlatformAdcC.A11; + Msp430Adc12ImplP.A12 -> PlatformAdcC.A12; + Msp430Adc12ImplP.A13 -> PlatformAdcC.A13; + Msp430Adc12ImplP.A14 -> PlatformAdcC.A14; + Msp430Adc12ImplP.A15 -> PlatformAdcC.A15; +#endif /* ADC12_PINS_AVAILABLE : 8 */ +#endif /* ADC12_PINS_AVAILABLE : 6 */ + +#else /* ADC12_USE_PLATFORM_ADC */ + +#ifdef ADC12_P6PIN_AUTO_CONFIGURE + components HplMsp430GeneralIOC; + Msp430Adc12ImplP.A0 -> HplMsp430GeneralIOC.Port60; + Msp430Adc12ImplP.A1 -> HplMsp430GeneralIOC.Port61; + Msp430Adc12ImplP.A2 -> HplMsp430GeneralIOC.Port62; + Msp430Adc12ImplP.A3 -> HplMsp430GeneralIOC.Port63; + Msp430Adc12ImplP.A4 -> HplMsp430GeneralIOC.Port64; + Msp430Adc12ImplP.A5 -> HplMsp430GeneralIOC.Port65; + Msp430Adc12ImplP.A6 -> HplMsp430GeneralIOC.Port66; + Msp430Adc12ImplP.A7 -> HplMsp430GeneralIOC.Port67; +#endif + +#ifdef ADC12_TIMERB_ENABLED + components Msp430TimerC; + Msp430Adc12ImplP.TimerB -> Msp430TimerC.TimerB; + Msp430Adc12ImplP.ControlB0 -> Msp430TimerC.ControlB0; + Msp430Adc12ImplP.ControlB1 -> Msp430TimerC.ControlB1; + Msp430Adc12ImplP.CompareB0 -> Msp430TimerC.CompareB0; + Msp430Adc12ImplP.CompareB1 -> Msp430TimerC.CompareB1; +#endif + +#endif /* ADC12_USE_PLATFORM_ADC */ +} diff --git a/tos/platforms/exp430/hardware/adc/README.txt b/tos/platforms/exp430/hardware/adc/README.txt new file mode 100644 index 0000000000..b2c885ade2 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/README.txt @@ -0,0 +1,4 @@ +The MSP430 ADC12 implementation uses Timer_A as the timing source of the ADC for modes that require a timer (repeated +samples). The use of Timer_A conflicts with other parts of the system (system time, radio). On this platform, we want +ADC12 to use Timer_B. To do so, the files Msp430Adc12P.h, Msp430Adc12P.nc and Msp430Adc12ImplP.nc have been copied from +tos/chips/msp430/adc12. The files have been modified to user Timer_B, which is available on the MSP430F552x chips. From ee5fd02b7a65c72686a22c7f23ea6e11dc7b5c9d Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 23 Dec 2013 16:21:33 -0600 Subject: [PATCH 379/411] Added ability to invoke mspdebug using the tilib library To do so, call "make install tilib" where platform is a platform that uses mspdebug as its default programmer --- support/make/msp/tilib.extra | 4 ++++ 1 file changed, 4 insertions(+) create mode 100644 support/make/msp/tilib.extra diff --git a/support/make/msp/tilib.extra b/support/make/msp/tilib.extra new file mode 100644 index 0000000000..be0e015c16 --- /dev/null +++ b/support/make/msp/tilib.extra @@ -0,0 +1,4 @@ +#-*-Makefile-*- vim:ft=make +# mspdebug using the tilib driver + +MSP_DEBUG_FLAGS = tilib From 51fd2393005abd58c5fb3c756a127d2b9ca1c062 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 23 Dec 2013 17:22:59 -0600 Subject: [PATCH 380/411] Changer system timer to Timer2_A so we can use Timer0_A for PWM --- tos/platforms/exp430/.platform | 1 + .../exp430/hardware/adc/PlatformAdcC.nc | 20 ++--- .../exp430/hardware/clock/PlatformClockP.nc | 8 +- .../hardware/timer/Msp430Counter32khzC.nc | 61 +++++++++++++ .../hardware/timer/Msp430Timer32khzMapC.nc | 88 +++++++++++++++++++ tos/platforms/vumcr/.platform | 4 +- 6 files changed, 169 insertions(+), 13 deletions(-) create mode 100644 tos/platforms/exp430/hardware/timer/Msp430Counter32khzC.nc create mode 100644 tos/platforms/exp430/hardware/timer/Msp430Timer32khzMapC.nc diff --git a/tos/platforms/exp430/.platform b/tos/platforms/exp430/.platform index 567318bfdb..511219e2e3 100644 --- a/tos/platforms/exp430/.platform +++ b/tos/platforms/exp430/.platform @@ -10,6 +10,7 @@ push( @includes, qw( %P/hardware/leds %P/hardware/pins %P/hardware/usci + %P/hardware/timer %T/chips/msp430/x5xxx %T/chips/msp430/x5xxx/lpm diff --git a/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc b/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc index f953c45c95..51dd3b53f0 100644 --- a/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc +++ b/tos/platforms/exp430/hardware/adc/PlatformAdcC.nc @@ -45,11 +45,11 @@ configuration PlatformAdcC { interface HplMsp430GeneralIO as A6; interface HplMsp430GeneralIO as A7; - interface Msp430Timer as TimerA; - interface Msp430TimerControl as ControlA0; - interface Msp430TimerControl as ControlA1; - interface Msp430Compare as CompareA0; - interface Msp430Compare as CompareA1; + interface Msp430Timer as TimerB; + interface Msp430TimerControl as ControlB0; + interface Msp430TimerControl as ControlB1; + interface Msp430Compare as CompareB0; + interface Msp430Compare as CompareB1; } } @@ -66,10 +66,10 @@ implementation { A7 = HplMsp430GeneralIOC.ADC7; components Msp430TimerC; - TimerA = Msp430TimerC.Timer0_A; - ControlA0 = Msp430TimerC.Control0_A0; - ControlA1 = Msp430TimerC.Control0_A1; - CompareA0 = Msp430TimerC.Compare0_A0; - CompareA1 = Msp430TimerC.Compare0_A1; + TimerB = Msp430TimerC.Timer0_B; + ControlB0 = Msp430TimerC.Control0_B0; + ControlB1 = Msp430TimerC.Control0_B1; + CompareB0 = Msp430TimerC.Compare0_B0; + CompareB1 = Msp430TimerC.Compare0_B1; } diff --git a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc index cafd10cf1f..6d71558585 100644 --- a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc +++ b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc @@ -460,7 +460,7 @@ module PlatformClockP { UCSCTL5 = DIVA__1 | DIVS__1 | DIVM__1; /* - * TA0 clocked off XT1, used for TMilli, 32KiHz. + * TA0 clocked off XT1, used for PWM */ TA0CTL = TASSEL__ACLK | TACLR | MC__CONTINOUS | TAIE; TA0R = 0; @@ -471,6 +471,12 @@ module PlatformClockP { TA1CTL = TASSEL__SMCLK | ID__8 | TACLR | MC__CONTINOUS | TAIE; TA1R = 0; + /* + * TA2 clocked off XT1, used for TMilli, 32KiHz. + */ + TA2CTL = TASSEL__ACLK | TACLR | MC__CONTINOUS | TAIE; + TA2R = 0; + return SUCCESS; } } diff --git a/tos/platforms/exp430/hardware/timer/Msp430Counter32khzC.nc b/tos/platforms/exp430/hardware/timer/Msp430Counter32khzC.nc new file mode 100644 index 0000000000..207fb57546 --- /dev/null +++ b/tos/platforms/exp430/hardware/timer/Msp430Counter32khzC.nc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2011, Eric B. Decker + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Msp430Counter32khC provides the standard 32khz counter for the MSP430. + * + * @author Cory Sharp + * @author Peter A. Bigot + * @author Eric B. Decker + * + * @see Please refer to TEP 102 for more information about this component and its + * intended use. + * + * The cc430f5137 and the msp430f5138{,a} (both x5 family) have at a minimum the + * T0A5 and T1A3 timer h/w. We assign T0A to the 32KiHz timer and T1A to the + * 1 MiHz (TMicro) timer (see Msp430CounterMicro). + */ + +configuration Msp430Counter32khzC { + provides interface Counter as Msp430Counter32khz; +} +implementation { + components Msp430TimerC; + components new Msp430CounterC(T32khz) as Counter; + + Msp430Counter32khz = Counter; + Counter.Msp430Timer -> Msp430TimerC.Timer2_A; +} diff --git a/tos/platforms/exp430/hardware/timer/Msp430Timer32khzMapC.nc b/tos/platforms/exp430/hardware/timer/Msp430Timer32khzMapC.nc new file mode 100644 index 0000000000..8c7226e4f0 --- /dev/null +++ b/tos/platforms/exp430/hardware/timer/Msp430Timer32khzMapC.nc @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2010, People Power Co. + * Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz + * hardware timers on the MSP430 that are available for compile time allocation + * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. + * + * Platforms based on the MSP430 are encouraged to copy in and override this + * file, presenting only the hardware timers that are available for allocation + * on that platform. + * + * @author Cory Sharp + * @author Peter A. Bigot + */ + +/* + * Inspection of cpu header files shows that the following defines exist. + * (all of the form __MSP430_HAS___ where xxxx gets replace with + * which timer module. Modules seen: TA3, T0A3, T0A5, T1A2, T1A3, T1A5, + * T2A3, T0B7, T0D3, T1D3. Which modules are actually present depends + * on which chip is being used and is reflected in the cpu header file. + * + * All supported x5 (msp430xv2) chips support T0An, so we'll use that + * for the 32KHz timer suite. If you clone this to a platform area, + * remember to also clone Msp430Counter32khzC if you change to a + * different timer. + * + * x5 processors have various block of timers. The 5137 and 5438 have T0A5 + * and T1A3. The 5438 also has the T0B7 timer block. + * + * 32KiHz timing is assigned to T0An. TMicro is assigned to T1An. + */ + +configuration Msp430Timer32khzMapC { + provides { + interface Msp430Timer[ uint8_t id ]; + interface Msp430TimerControl[ uint8_t id ]; + interface Msp430Compare[ uint8_t id ]; + } +} +implementation { + components Msp430TimerC; + + Msp430Timer[0] = Msp430TimerC.Timer2_A; + Msp430TimerControl[0] = Msp430TimerC.Control2_A1; + Msp430Compare[0] = Msp430TimerC.Compare2_A1; + + Msp430Timer[1] = Msp430TimerC.Timer2_A; + Msp430TimerControl[1] = Msp430TimerC.Control2_A2; + Msp430Compare[1] = Msp430TimerC.Compare2_A2; + + /*Msp430Timer[2] = Msp430TimerC.Timer2_A;*/ + /*Msp430TimerControl[2] = Msp430TimerC.Control2_A2;*/ + /*Msp430Compare[2] = Msp430TimerC.Compare2_A2;*/ +} diff --git a/tos/platforms/vumcr/.platform b/tos/platforms/vumcr/.platform index c695f88b28..e114d04fc5 100644 --- a/tos/platforms/vumcr/.platform +++ b/tos/platforms/vumcr/.platform @@ -4,14 +4,14 @@ # by ncc. push( @includes, qw( - %P/hardware/pins %P/hardware/leds - %T/hardware/usci + %P/hardware/usci %T/platforms/exp430/ %T/platforms/exp430/hardware/adc %T/platforms/exp430/hardware/buttons %T/platforms/exp430/hardware/clock + %T/platforms/exp430/hardware/timer %T/platforms/exp430/chips/ccxx00 %T/chips/msp430/x5xxx %T/chips/msp430/x5xxx/lpm From 3c5ec01dbe9fb3535a333ba444d20ce38163d853 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 8 Jan 2014 17:07:24 -0600 Subject: [PATCH 381/411] Added more LEDs to Leds interface for the EXP430 --- tos/platforms/exp430/hardware/leds/Leds.nc | 217 ++++++++++++++++++ .../exp430/hardware/leds/PlatformLedsC.nc | 21 ++ .../exp430/hardware/leds/PlatformLedsP.nc | 119 ++++++++++ 3 files changed, 357 insertions(+) create mode 100644 tos/platforms/exp430/hardware/leds/Leds.nc diff --git a/tos/platforms/exp430/hardware/leds/Leds.nc b/tos/platforms/exp430/hardware/leds/Leds.nc new file mode 100644 index 0000000000..cfd5dd5834 --- /dev/null +++ b/tos/platforms/exp430/hardware/leds/Leds.nc @@ -0,0 +1,217 @@ +// $Id: Leds.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $ + +/* + * Copyright (c) 2005-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Commands for controlling three LEDs. A platform can provide this + * interface if it has more than or fewer than three LEDs. In the + * former case, these commands refer to the first three LEDs. In the + * latter case, some of the commands are null operations, and the set + * of non-null operations must be contiguous and start at Led1. That + * is, on platforms with 2 LEDs, LED 3's commands are null operations, + * while on platforms with 1 LED, LED 2 and LED 3's commands are null + * opertations. + * + * @author Joe Polastre + * @author Philip Levis + */ + +#include "Leds.h" + +interface Leds { + + /** + * Turn on LED 0. The color of this LED depends on the platform. + */ + async command void led0On(); + + /** + * Turn off LED 0. The color of this LED depends on the platform. + */ + async command void led0Off(); + + /** + * Toggle LED 0; if it was off, turn it on, if was on, turn it off. + * The color of this LED depends on the platform. + */ + async command void led0Toggle(); + + /** + * Turn on LED 1. The color of this LED depends on the platform. + */ + async command void led1On(); + + /** + * Turn off LED 1. The color of this LED depends on the platform. + */ + async command void led1Off(); + + /** + * Toggle LED 1; if it was off, turn it on, if was on, turn it off. + * The color of this LED depends on the platform. + */ + async command void led1Toggle(); + + + /** + * Turn on LED 2. The color of this LED depends on the platform. + */ + async command void led2On(); + + /** + * Turn off LED 2. The color of this LED depends on the platform. + */ + async command void led2Off(); + + /** + * Toggle LED 2; if it was off, turn it on, if was on, turn it off. + * The color of this LED depends on the platform. + */ + async command void led2Toggle(); + + /** + * Turn on LED 3. The color of this LED depends on the platform. + */ + async command void led3On(); + + /** + * Turn off LED 3. The color of this LED depends on the platform. + */ + async command void led3Off(); + + /** + * Toggle LED 3; if it was off, turn it on, if was on, turn it off. + * The color of this LED depends on the platform. + */ + async command void led3Toggle(); + + /** + * Turn on LED 4. The color of this LED depends on the platform. + */ + async command void led4On(); + + /** + * Turn off LED 4. The color of this LED depends on the platform. + */ + async command void led4Off(); + + /** + * Toggle LED 4; if it was off, turn it on, if was on, turn it off. + * The color of this LED depends on the platform. + */ + async command void led4Toggle(); + + /** + * Turn on LED 5. The color of this LED depends on the platform. + */ + async command void led5On(); + + /** + * Turn off LED 5. The color of this LED depends on the platform. + */ + async command void led5Off(); + + /** + * Toggle LED 5; if it was off, turn it on, if was on, turn it off. + * The color of this LED depends on the platform. + */ + async command void led5Toggle(); + + /** + * Turn on LED 6. The color of this LED depends on the platform. + */ + async command void led6On(); + + /** + * Turn off LED 6. The color of this LED depends on the platform. + */ + async command void led6Off(); + + /** + * Toggle LED 6; if it was off, turn it on, if was on, turn it off. + * The color of this LED depends on the platform. + */ + async command void led6Toggle(); + + /** + * Turn on LED 7. The color of this LED depends on the platform. + */ + async command void led7On(); + + /** + * Turn off LED 7. The color of this LED depends on the platform. + */ + async command void led7Off(); + + /** + * Toggle LED 7; if it was off, turn it on, if was on, turn it off. + * The color of this LED depends on the platform. + */ + async command void led7Toggle(); + + + /** + * Get the current LED settings as a bitmask. Each bit corresponds to + * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can + * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression + * will determine whether LED 2 is on: + * + * 
 (call Leds.get() & LEDS_LED2)
+ * + * This command supports up to 8 LEDs; if a platform has fewer, then + * those LEDs should always be off (their bit is zero). Also see + * set(). + * + * @return a bitmask describing which LEDs are on and which are off + */ + async command uint8_t get(); + + + /** + * Set the current LED configuration using a bitmask. Each bit + * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED + * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example, + * this statement will configure the LEDs so LED 0 and LED 2 are on: + * + * 
 call Leds.set(LEDS_LED0 | LEDS_LED2);
+ * + * This statement will turn LED 1 on if it was not already: + * + * 
call Leds.set(call Leds.get() | LEDS_LED1);
+ * + * @param val a bitmask describing the on/off settings of the LEDs + */ + async command void set(uint8_t val); + +} + diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc index c1c4d495c2..b9a4c1623a 100644 --- a/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc @@ -64,4 +64,25 @@ implementation { components new Msp430GpioC() as Led2Impl; Led2Impl -> GeneralIOC.Port82; PlatformLedsP.Led2 -> Led2Impl; + + components new Msp430GpioC() as Led3Impl; + Led3Impl -> GeneralIOC.Port11; + PlatformLedsP.Led3 -> Led3Impl; + + components new Msp430GpioC() as Led4Impl; + Led4Impl -> GeneralIOC.Port12; + PlatformLedsP.Led4 -> Led4Impl; + + components new Msp430GpioC() as Led5Impl; + Led5Impl -> GeneralIOC.Port13; + PlatformLedsP.Led5 -> Led5Impl; + + components new Msp430GpioC() as Led6Impl; + Led6Impl -> GeneralIOC.Port14; + PlatformLedsP.Led6 -> Led6Impl; + + components new Msp430GpioC() as Led7Impl; + Led7Impl -> GeneralIOC.Port15; + PlatformLedsP.Led7 -> Led7Impl; + } diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc index 87dafc21fc..d3b89ff7e2 100644 --- a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc @@ -52,6 +52,11 @@ module PlatformLedsP { interface GeneralIO as Led0; interface GeneralIO as Led1; interface GeneralIO as Led2; + interface GeneralIO as Led3; + interface GeneralIO as Led4; + interface GeneralIO as Led5; + interface GeneralIO as Led6; + interface GeneralIO as Led7; } } @@ -63,9 +68,19 @@ implementation { call Led0.makeOutput(); call Led1.makeOutput(); call Led2.makeOutput(); + call Led3.makeOutput(); + call Led4.makeOutput(); + call Led5.makeOutput(); + call Led6.makeOutput(); + call Led7.makeOutput(); call Led0.clr(); call Led1.clr(); call Led2.clr(); + call Led3.clr(); + call Led4.clr(); + call Led5.clr(); + call Led6.clr(); + call Led7.clr(); } return SUCCESS; } @@ -106,6 +121,70 @@ implementation { async command void Leds.led2Toggle() { call Led2.toggle(); } + + async command void Leds.led3On() { + call Led3.set(); + } + + async command void Leds.led3Off() { + call Led3.clr(); + } + + async command void Leds.led3Toggle() { + call Led3.toggle(); + } + + + async command void Leds.led4On() { + call Led4.set(); + } + + async command void Leds.led4Off() { + call Led4.clr(); + } + + async command void Leds.led4Toggle() { + call Led4.toggle(); + } + + + async command void Leds.led5On() { + call Led5.set(); + } + + async command void Leds.led5Off() { + call Led5.clr(); + } + + async command void Leds.led5Toggle() { + call Led5.toggle(); + } + + + async command void Leds.led6On() { + call Led6.set(); + } + + async command void Leds.led6Off() { + call Led6.clr(); + } + + async command void Leds.led6Toggle() { + call Led6.toggle(); + } + + + async command void Leds.led7On() { + call Led7.set(); + } + + async command void Leds.led7Off() { + call Led7.clr(); + } + + async command void Leds.led7Toggle() { + call Led7.toggle(); + } async command uint8_t Leds.get() { uint8_t rval; @@ -120,6 +199,21 @@ implementation { if (call Led2.get()) { rval |= LEDS_LED2; } + if (call Led3.get()) { + rval |= LEDS_LED3; + } + if (call Led4.get()) { + rval |= LEDS_LED4; + } + if (call Led5.get()) { + rval |= LEDS_LED5; + } + if (call Led6.get()) { + rval |= LEDS_LED6; + } + if (call Led7.get()) { + rval |= LEDS_LED7; + } } return rval; } @@ -141,6 +235,31 @@ implementation { } else { call Leds.led2Off(); } + if (val & LEDS_LED3) { + call Leds.led3On(); + } else { + call Leds.led3Off(); + } + if (val & LEDS_LED4) { + call Leds.led4On(); + } else { + call Leds.led4Off(); + } + if (val & LEDS_LED5) { + call Leds.led5On(); + } else { + call Leds.led5Off(); + } + if (val & LEDS_LED6) { + call Leds.led6On(); + } else { + call Leds.led6Off(); + } + if (val & LEDS_LED7) { + call Leds.led7On(); + } else { + call Leds.led7Off(); + } } } } From 488ffb4334ee330925c6fde83ac6661c08efe004 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 8 Jan 2014 17:18:42 -0600 Subject: [PATCH 382/411] Fixes CC1101 some bugs 1. When downloading bytes from the CC1101, if there is an unexpected number of bytes in the RXFIFO, the function returns without resetting state variables properly 2. During TX, the wait time was hard coded to 0xff (waitForState). This value was not enough for slower baud rates. Instead, a timer and GDO0 interrupt based system is now implemented. The timer is set to fire after a period of time which I found to be enough even for 2.4Kbps. If the GDO0 interrupt is received before the timer fires, the timer is cancelled and the system proceeds to notify higher levels that TX was successful. --- tos/chips/cc1101/CC1101DriverLayer.h | 18 ++- tos/chips/cc1101/CC1101DriverLayerP.nc | 106 ++++++++++++++--- .../exp430/chips/ccxx00/HplCC1100PinsC.nc | 109 ------------------ .../exp430/chips/ccxx00/RadioConfig.h | 4 - 4 files changed, 106 insertions(+), 131 deletions(-) delete mode 100644 tos/platforms/exp430/chips/ccxx00/HplCC1100PinsC.nc diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h index f4b9e855ad..8b79039204 100644 --- a/tos/chips/cc1101/CC1101DriverLayer.h +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -55,6 +55,12 @@ enum cc1101_timing_enums { TX_SFD_DELAY = STROBE_TO_TX_ON_TIME + 10 * CC1101_SYMBOL_TIME - 25, // TX SFD is captured in hardware RX_SFD_DELAY = 0, + + // TX_2_RX Time is the amount of time it takes for the CC1101 to send the preamble and sync word. + // Since these are configurable, it is difficult to calculate exactly what this should be. For now + // we just assume the worst case for 2.4Kbps with 32 bit preamble and 16 bits sync word. Experiments + // show values > 50ms. + TX_2_RX_TIME = 65000U, }; enum cc1101_reg_access_enums { @@ -329,8 +335,9 @@ enum cc1101_config_reg_enums { #define CC1101_500K 10 #ifndef CC1101_BAUD -#define CC1101_BAUD CC1101_10K +//#define CC1101_BAUD CC1101_2_4K //#define CC1101_BAUD CC1101_250K +#define CC1101_BAUD CC1101_10K #endif /** @@ -410,9 +417,10 @@ enum{ }; #ifndef CC1101_PA -#define CC1101_PA CC1101_PA_PLUS_0 +//#define CC1101_PA CC1101_PA_PLUS_0 +#define CC1101_PA CC1101_PA_MINUS_10 #endif - +// End CC1101_433_MHz #elif (CC1101_MATCHING_NETWORK == CC1101_868_MHZ) /***************** 868 MHz Matching Network ****************/ @@ -449,10 +457,10 @@ enum{ }; #ifndef CC1101_PA -#define CC1101_PA CC1101_PA_PLUS_10 +#define CC1101_PA CC1101_PA_PLUS_0 #endif -#endif +#endif // End CC1101_868_MHz /** * These are used for calculating channels at runtime */ diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 43706f70ca..851ffe4f98 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -151,6 +151,9 @@ implementation // flag: end of TX event (falling GDO0 edge) was captured, but not yet processed norace bool txEnd = 0; + // flag: TX event was never received, for some unknown reason. Should go ahead and reset the chip + norace bool txFailed = FALSE; + tasklet_norace uint8_t txPower; tasklet_norace uint8_t channel; @@ -226,6 +229,7 @@ implementation inline cc1101_status_t getStatus(); inline cc1101_status_t enableReceiveGdo(); + inline cc1101_status_t burstRead(uint8_t addr,uint8_t* data, uint8_t length); /*----------------- ALARM -----------------*/ tasklet_async event void RadioAlarm.fired() @@ -262,7 +266,15 @@ implementation } else { call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods } - } else + } else if(state == STATE_BUSY_TX_2_RX_ON){ + // If GDO has asserted about sync byte being sent, we TX was successful, and txEnd should be set + if(!txEnd){ + // TX was unsuccessful + call Leds.led4On(); + txFailed = TRUE; + } + } + else RADIO_ASSERT(FALSE); // make sure the rest of the command processing is called @@ -325,6 +337,18 @@ implementation return status; } + + inline cc1101_status_t getPacketStatus(){ + cc1101_status_t status; + call CSN.set(); // set CSN, just in clase it's not set + call CSN.clr(); // clear CSN, starting a multi-byte SPI command + + // For debugging using Logic Analyzer + burstRead(CC1101_PKTSTATUS, &status.value, 1); + call CSN.set(); // set CSN, just in clase it's not set + return status; + } + inline cc1101_status_t writeRegister(uint8_t reg, uint8_t value) { cc1101_status_t status; @@ -401,7 +425,8 @@ implementation RADIO_ASSERT(status.chip_rdyn == 0); RADIO_ASSERT(status.state == CC1101_STATE_RX); - *lengthPtr = length1; + if(lengthPtr) + *lengthPtr = length1; return status; } @@ -450,6 +475,7 @@ implementation do { status = getStatus(); counter++; + getPacketStatus(); }while(status.state != st && counter < timeout); return status; } @@ -538,7 +564,7 @@ implementation } inline void resetRx(){ - call Leds.led0On(); + call Leds.led3On(); call CSN.set(); call CSN.clr(); /*strobe(CC1101_SRES);*/ @@ -549,7 +575,7 @@ implementation waitForState(CC1101_STATE_RX, 0xff); state = STATE_RX_ON; cmd = CMD_NONE; - call Leds.led0Off(); + /*call Leds.led3Off();*/ } @@ -810,6 +836,7 @@ implementation /*uint8_t p;*/ uint8_t length; uint8_t* data; + /*uint16_t trials = 0;*/ /* *uint8_t header; *uint32_t time32; @@ -821,7 +848,7 @@ implementation #ifdef RADIO_DEBUG uint8_t sfd1, sfd2, sfd3, sfd4; #endif - if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd ) + if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd || ! call RadioAlarm.isFree()) return EBUSY; status = getStatus(); @@ -864,7 +891,9 @@ implementation /*time = call RadioAlarm.getNow();*/ cmd = CMD_TRANSMIT; + call RadioAlarm.wait(TX_2_RX_TIME); // 32+16 symbol periods state = STATE_BUSY_TX_2_RX_ON; + enableTransmitGdo(); #ifdef RADIO_DEBUG sfd3 = call GDO0.get(); #endif @@ -873,14 +902,20 @@ implementation sfd4 = call GDO0.get(); #endif } - status = waitForState(CC1101_STATE_RX, 0xff); - if(status.state == CC1101_STATE_RX) - txEnd = TRUE; - else { - // Transmission has failed - resetRx(); - return EBUSY; - } + /* + *while(TRUE){ + * status = waitForState(CC1101_STATE_RX, 0xff); + * if(status.state == CC1101_STATE_RX){ + * txEnd = TRUE; + * break; + * } + * if(trials++ > 20){ + * // Transmission has failed + * resetRx(); + * return EBUSY; + * } + *} + */ /*enableTransmitGdo();*/ #ifdef RADIO_DEBUG @@ -1079,6 +1114,24 @@ implementation if (fifo_length < 3 || fifo_length > call RadioPacket.maxPayloadLength() + 2 ) { // bad length: bail out /*resetRx();*/ + if(fifo_length < 3) + call Leds.led3Toggle(); + else + call Leds.led4Toggle(); + + // empty the buffer so it will be ready for the next data + readPayloadFromRxFifo(NULL, fifo_length+2); // +2 for RSSI and CRC + call CSN.set(); + state = STATE_RX_ON; + cmd = CMD_NONE; + + // ready to receive new message: enable GDO0 interrupts + // If RX FIFO overflowed, we have to flush it before we enable interrupts + if(status.state == CC1101_STATE_RXFIFO_OVERFLOW){ + // flush rx fifo + flushRxFifo(); + } + enableReceiveGdo(); return; } @@ -1211,6 +1264,7 @@ implementation /*----------------- IRQ -----------------*/ + // RX GDO0 (rising edge) or end of TX (falling edge) async event void Gdo0Capture.captured( uint16_t time ) { @@ -1218,6 +1272,7 @@ implementation call Gdo0Capture.disable(); call Leds.led2Off(); call Leds.led2On(); + call Leds.led5On(); RADIO_ASSERT( ! rxGdo0 ); // assert that there's no nesting RADIO_ASSERT( ! txEnd ); // assert that there's no nesting @@ -1238,6 +1293,8 @@ implementation } }else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON){ txEnd = TRUE; + if(state == STATE_BUSY_TX_2_RX_ON) + call RadioAlarm.cancel(); // No need to wait for the timeout alarm } else { // received capture interrupt in an invalid state RADIO_ASSERT(FALSE); @@ -1263,6 +1320,7 @@ implementation call Tasklet.schedule(); call Leds.led2On(); call Leds.led2Off(); + call Leds.led5Off(); } @@ -1285,6 +1343,7 @@ implementation tasklet_async event void Tasklet.run() { + uint8_t left_over; #ifdef RADIO_DEBUG_TASKLET if( call DiagMsg.record() ) { @@ -1352,6 +1411,22 @@ implementation RADIO_ASSERT(FALSE); } + if(txFailed){ + if( isSpiAcquired() ) { + + txFailed = FALSE; + + RADIO_ASSERT(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON); + RADIO_ASSERT(cmd == CMD_TRANSMIT); + + resetRx(); + // a packet might have been received since the end of the transmission + enableReceiveGdo(); + + } else + RADIO_ASSERT(FALSE); + } + if( rxGdo0 ) { // incoming packet if( isSpiAcquired() ) @@ -1380,6 +1455,11 @@ implementation RADIO_ASSERT(state == STATE_RX_ON); /*do{*/ downloadMessage(); + // Debug, check status again + readLengthFromRxBytes(&left_over); + /*if (left_over != 0)*/ + /* P2OUT |= 0x2; // Port2.1*/ + /*}while(call GDO0.get());*/ } else if (cmd == CMD_RX_FLUSH){ diff --git a/tos/platforms/exp430/chips/ccxx00/HplCC1100PinsC.nc b/tos/platforms/exp430/chips/ccxx00/HplCC1100PinsC.nc deleted file mode 100644 index abe1e0e498..0000000000 --- a/tos/platforms/exp430/chips/ccxx00/HplCC1100PinsC.nc +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (c) 2013, Vanderbilt University - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose, without fee, and without written agreement is - * hereby granted, provided that the above copyright notice, the following - * two paragraphs and the author appear in all copies of this software. - * - * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR - * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT - * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT - * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO - * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. - * - * Author: Janos Sallai - * Author: Addisu Z. Taddese (Port to CC1101) - */ - -configuration HplCC1100PinsC { - provides { - interface Resource as SpiResource; - /*interface FastSpiByte;*/ - interface SpiByte as FastSpiByte; - interface GeneralIO as CSN; - interface GeneralIO as GDO0; - interface GeneralIO as GDO2; - /*interface GpioCapture as Gdo0Capture;*/ - /*interface GpioCapture as Gdo2Capture;*/ - - // For ccxx00 driver, in case we use that - interface GeneralIO as Power; - interface GeneralIO as Csn; - interface GeneralIO as Gdo0_io; - interface GeneralIO as Gdo2_io; - interface GpioInterrupt as Gdo0_int; - interface GpioInterrupt as Gdo2_int; - - /*interface LocalTime as LocalTimeRadio;*/ - /*interface Init;*/ - /*interface Alarm;*/ - } -} -implementation { - - components HplMsp430GeneralIOC as IO, new Msp430UsciSpiB0C() as SpiC; - - // pins - components new Msp430GpioC() as CSNM; - components new Msp430GpioC() as GDO0M; - components new Msp430GpioC() as GDO2M; - - CSNM -> IO.Port26; - GDO0M -> IO.Port23; - GDO2M -> IO.Port24; - - CSN = CSNM; - GDO0 = GDO0M; - GDO2 = GDO2M; - - Csn = CSNM; - Gdo0_io = GDO0M; - Gdo2_io = GDO2M; - - components DummyIoP; - Power = DummyIoP; - - // spi - SpiResource = SpiC.Resource; - FastSpiByte = SpiC; - - // capture -/* - * components Msp430TimerC as TimerC; - * components new GpioCaptureC(); - * GpioCaptureC.Msp430TimerControl -> TimerC.ControlA1; - * GpioCaptureC.Msp430Capture -> TimerC.CaptureA1; - * GpioCaptureC.GeneralIO -> IO.Port12; - * SfdCapture = GpioCaptureC; - * - */ - // interrupts - components HplMsp430InterruptC; - components new Msp430InterruptC() as Gdo0_intm; - Gdo0_intm.HplInterrupt -> HplMsp430InterruptC.Port23; - Gdo0_int = Gdo0_intm.Interrupt; - - components new Msp430InterruptC() as Gdo2_intm; - Gdo2_intm.HplInterrupt -> HplMsp430InterruptC.Port24; - Gdo2_int = Gdo2_intm.Interrupt; - - - // alarm -/* - * components new Alarm32khz16C() as AlarmC; - * Alarm = AlarmC; - * Init = AlarmC; - * - * // localTime - * components LocalTime32khzC; - * LocalTimeRadio = LocalTime32khzC.LocalTime; - */ - -} diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h index ba75f4514b..70b7e12904 100644 --- a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -69,8 +69,4 @@ typedef uint16_t tradio_size; #define SOFTWAREACK_TIMEOUT 2000 #endif -#ifndef CC1101_BAUD -#define CC1101_BAUD CC1101_500K -#endif - #endif From 7fcf336fe72aafcd74d860cff57049aa92d49984 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 24 Jan 2014 11:50:32 -0600 Subject: [PATCH 383/411] Handle multiple packets in RXFIFO. Other stability improvements. --- tos/chips/cc1101/CC1101DriverLayer.h | 6 +- tos/chips/cc1101/CC1101DriverLayerP.nc | 119 +++++++++++++++++-------- 2 files changed, 87 insertions(+), 38 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h index 8b79039204..9b19be6bcb 100644 --- a/tos/chips/cc1101/CC1101DriverLayer.h +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -336,8 +336,10 @@ enum cc1101_config_reg_enums { #ifndef CC1101_BAUD //#define CC1101_BAUD CC1101_2_4K -//#define CC1101_BAUD CC1101_250K -#define CC1101_BAUD CC1101_10K +//#define CC1101_BAUD CC1101_10K +//#define CC1101_BAUD CC1101_100K +#define CC1101_BAUD CC1101_250K +//#define CC1101_BAUD CC1101_500K #endif /** diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 851ffe4f98..292079d9d4 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -412,14 +412,19 @@ implementation // For debugging using Logic Analyzer burstRead(CC1101_PKTSTATUS, &pkt_status, 1); + call CSN.set(); /*status.value = call SpiByte.write(CC1101_CMD_REGISTER_READ | CC1101_CMD_BURST_MODE | CC1101_RXBYTES);*/ /**lengthPtr = call SpiByte.write(0);*/ + call CSN.clr(); status = burstRead(CC1101_RXBYTES, &length1, 1); + call CSN.set(); do { length2 = length1; + call CSN.clr(); status = burstRead(CC1101_RXBYTES, &length1, 1); + call CSN.set(); }while(length1 != length2); RADIO_ASSERT(status.chip_rdyn == 0); @@ -446,6 +451,8 @@ implementation { // readLengthFromRxFifo was called before, so CSN is cleared and spi is ours RADIO_ASSERT( call CSN.get() == 0 ); + // Also, this assumes that the CC1101_RXFIFO address has already been sent to the CC1101. If this gets called + // without setting this address, the data will be filled with the status byte, not data from the FIFO. call SpiBlock.transfer(NULL, data, length); } @@ -564,7 +571,7 @@ implementation } inline void resetRx(){ - call Leds.led3On(); + call Leds.led6On(); call CSN.set(); call CSN.clr(); /*strobe(CC1101_SRES);*/ @@ -575,7 +582,6 @@ implementation waitForState(CC1101_STATE_RX, 0xff); state = STATE_RX_ON; cmd = CMD_NONE; - /*call Leds.led3Off();*/ } @@ -853,11 +859,12 @@ implementation status = getStatus(); if (status.state == CC1101_STATE_TXFIFO_UNDERFLOW){ - RADIO_ASSERT(FALSE); // flush tx fifo strobe(CC1101_SFTX); return EBUSY; - } + } else if(status.state == CC1101_STATE_CALIBRATE || status.state == CC1101_STATE_SETTLING) + return EBUSY; + // start transmission status = strobe(CC1101_STX); @@ -867,6 +874,13 @@ implementation // right number of bytes to the TXFIFO length = call RadioPacket.payloadLength(msg) + 1; + status = waitForState(CC1101_STATE_TX, 0xff); + if (status.state != CC1101_STATE_TX){ + call Leds.led3On(); + call Leds.led3Off(); + /*resetRx();*/ + return EBUSY; + } // Fill up the FIFO call CSN.set(); call CSN.clr(); @@ -874,11 +888,11 @@ implementation call CSN.set(); // Check if in TX mode. If not in TX mode, CCA has failed - status = getStatus(); - if (status.state != CC1101_STATE_TX){ - resetRx(); - return EBUSY; - } + /*status = getStatus();*/ + /*if (status.state != CC1101_STATE_TX){*/ + /*resetRx();*/ + /*return EBUSY;*/ + /*}*/ atomic { #ifdef RADIO_DEBUG @@ -1076,7 +1090,8 @@ implementation inline void downloadMessage() { - uint8_t fifo_length; + uint8_t fifo_length, fifo_length_end; + uint8_t packet_length; uint16_t crc = 1; uint8_t* data; uint8_t rssi; @@ -1095,7 +1110,8 @@ implementation data = getPayload(rxMsg) + sizeof(cc1101_header_t); // read the length of bytes in the RX FIFO - status = readLengthFromRxFifo(&fifo_length); + /*status = readLengthFromRxFifo(&fifo_length);*/ + status = readLengthFromRxBytes(&fifo_length); #ifdef RADIO_DEBUG_STATE if( call DiagMsg.record() ) @@ -1111,40 +1127,62 @@ implementation call DiagMsg.send(); } #endif - if (fifo_length < 3 || fifo_length > call RadioPacket.maxPayloadLength() + 2 ) { - // bad length: bail out - /*resetRx();*/ - if(fifo_length < 3) - call Leds.led3Toggle(); - else - call Leds.led4Toggle(); + // TODO: Handle RX FIFO overflow + // If RX FIFO overflowed, we have to flush it before we enable interrupts + if(status.state == CC1101_STATE_RXFIFO_OVERFLOW){ + // flush rx fifo + flushRxFifo(); + enableReceiveGdo(); + return; + } + if(fifo_length == 0){ + // This is a discarded packet. Nothing to do...enable interrupts and reset state vars. + call CSN.set(); + state = STATE_RX_ON; + cmd = CMD_NONE; + + // ready to receive new message: enable GDO0 interrupts + enableReceiveGdo(); + return; + } + + // Read the packet size from the first byte in the buffer + status = readLengthFromRxFifo(&packet_length); + + if ((fifo_length < 3 || fifo_length > call RadioPacket.maxPayloadLength() + 2 ) + ||(packet_length < 3 || packet_length > call RadioPacket.maxPayloadLength() + 2 )) { + // bad length: bail out. Not sure how likely this is since when packet length filter is enabled. + /*resetRx();*/ + /* + *if(fifo_length < 3) + * call Leds.led3Toggle(); + *else + * call Leds.led4Toggle(); + */ + + call Leds.led3On(); + call Leds.led3Off(); // empty the buffer so it will be ready for the next data - readPayloadFromRxFifo(NULL, fifo_length+2); // +2 for RSSI and CRC + //readRxFifo(NULL, fifo_length-2); // Uncomment if the packet length is NOT read before the if block + readPayloadFromRxFifo(NULL, fifo_length-1 ); call CSN.set(); state = STATE_RX_ON; cmd = CMD_NONE; // ready to receive new message: enable GDO0 interrupts - // If RX FIFO overflowed, we have to flush it before we enable interrupts - if(status.state == CC1101_STATE_RXFIFO_OVERFLOW){ - // flush rx fifo - flushRxFifo(); - } enableReceiveGdo(); return; } // if we're here, length must be correct RADIO_ASSERT(fifo_length >= 3 && fifo_length <= call RadioPacket.maxPayloadLength() + 2); + RADIO_ASSERT(packet_length >= 3 && packet_length <= call RadioPacket.maxPayloadLength() + 2); // The length does not include the length byte - getHeader(rxMsg)->length = fifo_length; + getHeader(rxMsg)->length = packet_length; - // TODO: The payload contains the length byte, thus setting the length byte in the previous line of code is useless. - // Investigate if we should consider the length byte as part of the payload or not. - // download the whole payload - readPayloadFromRxFifo(data, fifo_length ); + readPayloadFromRxFifo(data, packet_length ); // the last two bytes are not the fsc, but RSSI(8), CRC_ON(1)+LQI(7) readRssiFromRxFifo(&rssi); @@ -1164,11 +1202,23 @@ implementation } */ + // There might be more packets in the FIFO if we have received multiple packets + status = readLengthFromRxBytes(&fifo_length_end); + + if (fifo_length_end != 0){ + // What to do with these packets is not clear. We can completely discard them or read them in and signal multiple + // receive events. + call Leds.led3On(); + call Leds.led3Off(); + strobe(CC1101_SIDLE); + waitForState(CC1101_STATE_IDLE, 0xff); + flushRxFifo(); + } + state = STATE_RX_ON; cmd = CMD_NONE; // ready to receive new message: enable GDO0 interrupts - // If RX FIFO overflowed, we have to flush it before we enable interrupts if(status.state != CC1101_STATE_RXFIFO_OVERFLOW) enableReceiveGdo(); @@ -1251,12 +1301,9 @@ implementation rxMsg = signal RadioReceive.receive(rxMsg); - } - // TODO: Handle RX FIFO overflow - if(status.state == CC1101_STATE_RXFIFO_OVERFLOW){ - // flush rx fifo - flushRxFifo(); - enableReceiveGdo(); + }else{ + call Leds.led4On(); + call Leds.led4Off(); } } From 0e0a0302b92d451eb15a57172ed708883d91e6a7 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Fri, 24 Jan 2014 11:51:38 -0600 Subject: [PATCH 384/411] Use appropriate value of XCAP for VUMCR board. --- .../exp430/hardware/clock/PlatformClockP.nc | 1 + tos/platforms/vumcr/.platform | 2 +- .../vumcr/hardware/clock/PlatformClockC.nc | 49 ++ .../vumcr/hardware/clock/PlatformClockP.nc | 487 ++++++++++++++++++ 4 files changed, 538 insertions(+), 1 deletion(-) create mode 100644 tos/platforms/vumcr/hardware/clock/PlatformClockC.nc create mode 100644 tos/platforms/vumcr/hardware/clock/PlatformClockP.nc diff --git a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc index 6d71558585..748bc84e45 100644 --- a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc +++ b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc @@ -295,6 +295,7 @@ module PlatformClockP { * * Surf found XCAP=0 worked nice. We do the same thing but it should * be checked. FIXME. + * The EXP430 has 12pF caps on the crystal so we should use XCAP_0 */ P5SEL |= (BIT4 | BIT5); diff --git a/tos/platforms/vumcr/.platform b/tos/platforms/vumcr/.platform index e114d04fc5..3bbc73178d 100644 --- a/tos/platforms/vumcr/.platform +++ b/tos/platforms/vumcr/.platform @@ -7,10 +7,10 @@ push( @includes, qw( %P/hardware/pins %P/hardware/leds %P/hardware/usci + %P/hardware/clock %T/platforms/exp430/ %T/platforms/exp430/hardware/adc %T/platforms/exp430/hardware/buttons - %T/platforms/exp430/hardware/clock %T/platforms/exp430/hardware/timer %T/platforms/exp430/chips/ccxx00 %T/chips/msp430/x5xxx diff --git a/tos/platforms/vumcr/hardware/clock/PlatformClockC.nc b/tos/platforms/vumcr/hardware/clock/PlatformClockC.nc new file mode 100644 index 0000000000..3cff253d46 --- /dev/null +++ b/tos/platforms/vumcr/hardware/clock/PlatformClockC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 People Power Co. + * All rights reserved. + * + * This open source code was developed with funding from People Power Company + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Top-level initialization of anything to do with the clock + * subsystem. + * + * @author Peter A. Bigot + */ + +configuration PlatformClockC { + provides interface Init; +} implementation { + components PlatformClockP; + Init = PlatformClockP; +} diff --git a/tos/platforms/vumcr/hardware/clock/PlatformClockP.nc b/tos/platforms/vumcr/hardware/clock/PlatformClockP.nc new file mode 100644 index 0000000000..27dc7297d3 --- /dev/null +++ b/tos/platforms/vumcr/hardware/clock/PlatformClockP.nc @@ -0,0 +1,487 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * + * Initilization of the Clock system for the EXP430 Experimenter board. + * + * The EXP430 based on msp430f5529 series cpus. + * + * The 5529 runs at 2.2V and can clock up to 18MHz. The 5438a + * can run at 1.8V (up to 8 MHz), and its core can be tweaked to + * enable faster clocking. We default to using 8MHz so allow + * low power execution on the 5438a. + * + * Previous ports of TinyOS to msp430 cpus, would set the cpu to + * clock at a power of 2 (MiHz). This was to facilitate syncronizing + * with the 32768 (32 KiHz) XT1 crystal. The Timer TEP talks about + * time in TinyOS being binary time. 1 mis (binary millisec = 1/1024) + * is provided by TMilli and 1 uis (binary microsec = 1/1024/1024) + * is provided by TMicro. + * + * It is very desireable to run the 5438a at 1.8V for power conservation + * (the specs are quite good). We also want to run it at 8MHz (decimal). + * Clocking at 8MiHz is not recommended (out of spec). It might work but + * it is unclear how flakey behaviour would manifest. Not recommended. + * + * So for power performance reasons we want to configure for 8MHz and 1.8V. + * (Yes the 5438 is different but we are using it to simulate set up for + * the 5438a which has the tasty power performance specs.) Note, we ignore + * the 5438. It is quite buggy and has a pin for pin replacement (the 5438a) + * that behaves mor better. So why bother supporting the 5438. + * + * The TMicro timer (TA1) is run off DCOCLK/8 which yields 1us (not 1uis) + * ticks. However, TMilli is the long term timer that runs when the system + * is sleeping. It is clocked off XT1 at 32KiHz. This is a power of 2 + * and TMilli is defined by TEP to be in terms of 1mis. + * + * However, this then means that TMicro is in terms of 1us and TMilli is + * in terms of 1mis (essentially different units). This is not a good situation. + * It is better to be consistent in terms of units for both TMilli and TMicro. + * The constrant is on TMicro because of the 8MHz restriction forcing 1us. + * This argues for TMilli also being in decimal time (1ms). This is what + * we are doing. Both TMilli and TMicro decimal units. + * + * We want the following set up to be true when we are complete: + * + * 8 MHz clock. The 5438a is spec'd for a max of 8MHz when + * running at 1.8V. So that is what we use. Acutally 7995392 Hz + * (.0576% error, it'll do). + * + * DCOCLK -> MCLK, SMCLK. Also drives high speed timer that + * provides TMicro. 1us (note, decimal microsecs). DCOCLK + * sync'd to FLL/XT1/32KiHz. + * + * MCLK /1: main cpu clock. Off DCOCLK. + * + * SMCLK /1: used for timers and peripherals. We want to run the + * SPI (SD, GPS, subsystems, etc.) quickly and this gives us the + * option. Off DCOCLK. May want to divide it down because it isn't + * needed to be full speed. Dividing it down should save some energy + * because we won't be clocking downstream parts as fast. + * + * ACLK: 32 KiHz. Primarily used for slow speed timer that + * provides TMilli. + * + * FLL: in use and clocked off the 32 KiHz XT1 input. + * + * Much of the system relies on the 32KiHz XT1 xtal working correctly. + * We bring that up first and let it stabilize. + * + * The code loops up to 625ms waiting for XT1 stability. If stability + * is not achieved, the XT1 functionality is disabled. This should + * cause a hcf_panic which results in writing a panic block in slow + * mode. Should never happen. Famous last words (right before the + * rocket blows up). + * + * Stabilization appears to take roughly 150ms. + * + * @author Eric B. Decker + * @author Addisu Z. Taddese + */ + +#define noinit __attribute__ ((section(".noinit"))) + +uint16_t xt1_ctr; +noinit uint16_t xt1_stop; + +#define XT1_DELTAS 10 +uint16_t xt1_idx; +uint16_t xt1_deltas[XT1_DELTAS]; +uint16_t xt1_cap; +bool cap; +uint16_t xt1_read; +uint16_t last_xt1, last_dco; + +/* + * debugging code for tracing how the FLL homes in on the + * target frequency. We only nab those values which change. + */ + +#define STUFF_SIZE 128 + +noinit uint16_t ucsctl0[STUFF_SIZE]; + +noinit bool clear_stuff; +noinit uint16_t nxt; + +void set_stuff() { + if (clear_stuff) { + memset(ucsctl0, 0, sizeof(ucsctl0)); + clear_stuff = 0; + nxt = 0; + } + if (nxt >= STUFF_SIZE) + nxt = 0; + ucsctl0[nxt] = UCSCTL0; + nxt++; +} + + +module PlatformClockP { + provides interface Init; +} implementation { + + /* + * wait_for_32K() + * + * The 32KiHz Xtal provides a stable low power time base for everything + * else needing time in the system. It drives the FLL which provides + * syncronization for the DCO and ACLK which provides the time base + * for low power time (TMilli). + * + * The h/w has provisions for detecting XT1 oscillator faults but we + * don't know if that takes into account frequency stability. We have + * observed on the msp430f2618 that the XT1 oscillator takes a considerable + * amount of time to actual home to its base frequency. And that + * is where we want it before we do anything else. So we need to + * give it time to stabilize before using it. This should only be true + * coming out of reset. Anytime we reset P7.0 and P7.1 (XT1IN, XT1OUT) + * are reset to inputs and Pin Control and this shuts down the oscillator. + * So we need to bring it back up. + * + * On reset the 5438/5438a UCS is set to a configuration much like the + * following: (all values in hex). + * + * ucsctl0: 13e8 0020 101f 0000 0044 0000 c1cd 0403 0307 + * + * dco: 13, mod: 1e, rsel: 2, flld: 1 (f_dcoclk/2), flln: 1f + * selref: 0 (XT1CLK), fllrefdiv: 0 (f_fllrefclk/1) + * sela: 0 (xt1clk), sels: 4 (dcoclkdiv), selm: 4 (dcoclkdiv) + * diva = divs = divm = 0 (/1) + * xt2off, xt1off + * + * xt1 is off so clocking from REFO (32KiHz), XT1 pins set to Port/In. + * FLL is comparing 32KiHz * 32 = 1MiHz vs. dcoclk/2 => dcoclk 2MiHz + * SMCLK, MCLK => 1MiHz. + * + * We wait about a second for the 32KHz to stablize. + * + * PWR_UP_SEC is the number of times we need to wait for + * TimerA to cycle (16 bits) when clocked at the default + * msp430f5438 dco (about 2MHz). + */ + +#define PWR_UP_SEC 16 + + uint16_t maj_xt1() { + uint16_t a, b, c; + + a = TA0R; b = TA0R; c = TA0R; + if (a == b) return a; + if (a == c) return a; + if (b == c) return b; + while (1) + nop(); + return 0; + } + + + void wait_for_32K() __attribute__ ((noinline)) { + uint16_t left; + + /* + * TA0 -> XT1 32768 (just for fun and to compare against TA1 (1uis ticker) + * TA1 -> SMCLK/1 (should be 1uis ticker) + */ + TA0CTL = TACLR; // also zeros out control bits + TA1CTL = TACLR; + TA0CTL = TASSEL__ACLK | MC__CONTINOUS; // ACLK/1, continuous + TA1CTL = TASSEL__SMCLK | MC__CONTINOUS; // SMCLK/1, continuous + + /* + * wait for about a sec for the 32KHz to come up and + * stabilize. We are guessing that it is stable and + * on frequency after about a second but this needs + * to be verified. + * + * FIX ME. Need to verify stability of 32KHz. It definitely + * has a good looking waveform but what about its frequency + * stability. Needs to be measured. + * + * One thing to try is watching successive edges (ticks, TA0R, changing + * by one) and seeing how many TA1 (1 uis) ticks have gone by. When it is + * around 30-31 ticks then we are in the right neighborhood. + * + * We should see about PWR_UP_SEC (16) * 64Ki * 1/1024/1024 seconds which just + * happens to majikly equal 1 second. whew! + */ + + xt1_cap = 16; + left = PWR_UP_SEC; + while (1) { + if (TA1CTL & TAIFG) { + /* + * wrapped, clear IFG, and decrement major count + */ + TA1CTL &= ~TAIFG; + if (--left == 0) + break; + if (left <= xt1_cap) { + cap = TRUE; + xt1_cap = 0; /* disable future capture triggers */ + xt1_idx = 0; + last_xt1 = maj_xt1(); + last_dco = TA1R; + } + } + if (cap) { + xt1_read = maj_xt1(); + if (last_xt1 == xt1_read) + continue; + if (last_xt1 != xt1_read) { + xt1_deltas[xt1_idx++] = TA1R - last_dco; + last_xt1 = xt1_read; + last_dco = TA1R; + if (xt1_idx >= XT1_DELTAS) { + cap = FALSE; + nop(); + } + } + } + } + nop(); + } + + + command error_t Init.init () { + /* + * Enable XT1, lowest capacitance. + * + * XT1 pins (5.4 and 5.5) default to Pins/In. For the XT1 + * to function these have to be swithed to Module control. + * + * Surf code mumbles something about P5.0 and 1 must be clear + * in P5DIR. Shouldn't have any effect (the pins get kicked + * over to the Module for the Xtal and so the direction should + * be a don't care). Regardless we don't change the P5DIR + * from its power up value so will be cleared (IN). + * + * The surf code also talks about SMCLK being 4 per-mil faster + * if XCAP_3 is retained. Not sure what effect XCAP setting + * should have on SMCLK because XCAP effects the LF osc in LF mode, + * XTS=0 (which it will be). So a strange comment. + * + * Surf found XCAP=0 worked nice. We do the same thing but it should + * be checked. FIXME. + * + * For the VUMCR, we will only use the internal capacitance settings of + * the MSP430. This will reduce our component count. + */ + + + P5SEL |= (BIT4 | BIT5); + UCSCTL6 &= ~XT1OFF; + UCSCTL6 |= XCAP_3; + + /* + * From comments in Surf code. + * + * Spin waiting for a stable signal. This loop runs somewhere + * between 10K and 20K times; if it gets to 65536 without success, + * assume the crystal's absent or broken. At the power-up DCO + * (RSEL: 2, DCO: 19, MOD: 27) rate of ~2MHz and no crystal, the + * loop takes 625ms to complete. + * + * @note The UCS module will fall back to REFOCLK if configured + * for LF-mode XT1 and XT1 is not stable. It does not, however, + * revert to XT1 upon stabilization: the UCS module documentation + * implies that OFIFG must be cleared for this to occur. + * Consequently, we have to wait for stabilization even if we + * "know" a crystal is present. + */ + + /* + * xt1_ctr is initialized to 0 and counts up, if it hits zero + * again because it wrapped then we bail and panic. + */ + xt1_ctr = 0; + do { + xt1_ctr++; + UCSCTL7 &= ~(XT1LFOFFG | DCOFFG); + SFRIFG1 &= ~OFIFG; + nop(); + nop(); + if ((SFRIFG1 & OFIFG) == 0) + break; + } while (xt1_ctr); + + /* + * If the XT1 signal is still not valid, disable it. + * + * This is a major failure as we assume we have an XT1 xtal for + * timing stability. Flag it and try again? + * FIXME + */ + if (UCSCTL7 & XT1LFOFFG) { + P5SEL &= ~(BIT4 | BIT5); + UCSCTL6 |= XT1OFF; + while (1) + nop(); + return FAIL; + } + + /* + * XT1 up, lower the drive as suggested by TI. + * + * TI example code suggests clearing XT1DRIVE to reduce power. + * Current measurement does not indicate any value in doing so, + * at least not in LPM4, but it doesn't seem to hurt either. + * + * Note: we don't ever go into LPM4, LPM3 is required for the + * low speed timer to run (clocked from XT1). + */ + UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive + + /* + * We are no longer faulting, but we should still wait for the frequency to + * stabilize. Use wait_for_32k(). + */ + + wait_for_32K(); + + /* + * ACLK is to be set to XT1CLK, assumed to be 32KiHz (2^15Hz). + * This drives TA0 for TMilli. + * + * We run DCO into the integrator as /1 (FLLD_0). This also makes + * DCOCLKDIV = DCO. FLLN gets set to 243. 32768 * (243 + 1) + * = 7,995,392 Hz. The 32768 XT1 REFCLK is not divided down + * (/1, REFDIV). + */ + + /* Disable FLL control */ + __bis_SR_register(SR_SCG0); + + /* + * Use XT1CLK as the FLL input: if it isn't valid, the module + * will fall back to REFOCLK. Use FLLREFDIV value 1 (selected + * by bits 000) + */ + UCSCTL3 = SELREF__XT1CLK; + + /* + * The appropriate value for DCORSEL is obtained from the DCO + * Frequency table of the device datasheet. Find the DCORSEL + * value from that table where the maximum frequency with DCOx=31 + * is closest to your desired DCO frequency. (Where did this + * come from?) I've chosen next range up, don't want to run out + * of head room. + */ + + UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx + UCSCTL1 = DCORSEL_4; + UCSCTL2 = FLLD_0 + 243; + __bic_SR_register(SR_SCG0); // Enable the FLL control loop + + /* + * Worst-case settling time for the DCO when the DCO range bits have been + * changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx + * UG for optimization. + * + * n x 32 x 32 x 8 MHz / 32,768 Hz = 256000 = MCLK cycles for DCO to settle. + * but we don't know what n is (depends on how the FLL integrator works). + * + * Now this seems like a strange way to do this. This of course assumes + * that we are going to home on an arbritrary frequency so need to start + * from dco:0/mod:0. But even that doesn't make a whole boat load of sense. + * If going to an arbritary frequency, seems to make sense to start in the + * middle and either move up or down. + * + * Now that said, we have a pretty good idea of where we are going. To take + * into account temperature variance and dies we start below our target. But + * not that far. ie. we know we are going to ~8MHz and dco:x/mod:y is one + * such result. So starting ~25% below that should work just fine and greatly + * reduces potential start up time. This eliminates the need for the maximum + * delay waiting for the FLL to lock in. We can simply run, checking dco/mod + * looking for the maximum value we allow. Or just let it run to dco: 31, mod: 0. + * If it hits 31 we be done. + */ + + xt1_ctr = 0; + clear_stuff = 1; + do { + xt1_ctr++; + set_stuff(); + if (xt1_ctr == xt1_stop) + nop(); + } while (xt1_ctr); + + /* + * Loop until DCO fault flag is cleared. Ignore OFIFG, since it + * incorporates XT1 and XT2 fault detection. + * + * But XT2 is off so shouldn't be generating a fault and XT1 better + * be running we are assuming it drives the FLL. Yes if it fails + * then we auto switch over to the internal 32KiHz REFO. But this + * would be counter productive so looking for XT1 fault makes + * some sense. But it would be an error bail. Shouldn't happen. + */ + + do { + UCSCTL7 &= ~(XT1LFOFFG | DCOFFG); + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while (UCSCTL7 & DCOFFG); // Test DCO fault flag + + /* + * ACLK is XT1/1, 32KiHz. + * MCLK is set to DCOCLK/1. 8 MHz + * SMCLK is set to DCOCLK/1. 8 MHz. + * DCO drives TA1 for TMicro and is set to provide 1us ticks. + * ACLK drives TA0 for TMilli. + */ + UCSCTL4 = SELA__XT1CLK | SELS__DCOCLK | SELM__DCOCLK; + UCSCTL5 = DIVA__1 | DIVS__1 | DIVM__1; + + /* + * TA0 clocked off XT1, used for PWM + */ + TA0CTL = TASSEL__ACLK | TACLR | MC__CONTINOUS | TAIE; + TA0R = 0; + + /* + * TA1 clocked off SMCLK off DCO, /8, 1us tick + */ + TA1CTL = TASSEL__SMCLK | ID__8 | TACLR | MC__CONTINOUS | TAIE; + TA1R = 0; + + /* + * TA2 clocked off XT1, used for TMilli, 32KiHz. + */ + TA2CTL = TASSEL__ACLK | TACLR | MC__CONTINOUS | TAIE; + TA2R = 0; + + return SUCCESS; + } +} From f8d9ebb98f2a9a19c2e8617bdb61fcf2a7314b87 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 14:41:30 -0500 Subject: [PATCH 385/411] Removed LED debugging calls. Corrected PA values --- tos/chips/cc1101/CC1101DriverLayer.h | 96 +++----------------------- tos/chips/cc1101/CC1101DriverLayerP.nc | 58 ++++++++-------- 2 files changed, 37 insertions(+), 117 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h index 9b19be6bcb..36db6143f5 100644 --- a/tos/chips/cc1101/CC1101DriverLayer.h +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -90,89 +90,6 @@ enum cc1101_status_state { // Comments from datasheet CC1101_STATE_RXFIFO_OVERFLOW = 6, // RX FIFO has overflowed. Read out any useful data, then flush the FIFO with SFRX CC1101_STATE_TXFIFO_UNDERFLOW = 7 // TX FIFO has underflowed. Acknowledge with SFTX }; -#if 0 -typedef union cc1101_iocfg0 { - uint8_t value; - struct { - unsigned fifop_thr:7; - unsigned cca_polarity:1; - unsigned sfd_polarity:1; - unsigned fifop_polarity:1; - unsigned fifo_polarity:1; - unsigned bcn_accept:1; - unsigned reserved:4; // write as 0 - } f; -} cc1101_iocfg0_t; - -// TODO: make sure that we avoid wasting RAM -static const cc1101_iocfg0_t cc1101_iocfg0_default = {.f.fifop_thr = 64, .f.cca_polarity = 0, .f.sfd_polarity = 0, .f.fifop_polarity = 0, .f.fifo_polarity = 0, .f.bcn_accept = 0, .f.reserved = 0}; - -typedef union cc1101_iocfg1 { - uint16_t value; - struct { - unsigned ccamux:5; - unsigned sfdmux:5; - unsigned hssd_src:3; - unsigned reserved:3; // write as 0 - } f; -} cc1101_iocfg1_t; - -static const cc1101_iocfg1_t cc1101_iocfg1_default = {.value = 0}; - -typedef union cc1101_fsctrl { - uint16_t value; - struct { - unsigned freq:10; - unsigned lock_status:1; - unsigned lock_length:1; - unsigned cal_running:1; - unsigned cal_done:1; - unsigned lock_thr:2; - } f; -} cc1101_fsctrl_t; - -static const cc1101_fsctrl_t cc1101_fsctrl_default = {.f.lock_thr = 1, .f.freq = 357, .f.lock_status = 0, .f.lock_length = 0, .f.cal_running = 0, .f.cal_done = 0}; - -typedef union cc1101_mdmctrl0 { - uint16_t value; - struct { - unsigned preamble_length:4; - unsigned autoack:1; - unsigned autocrc:1; - unsigned cca_mode:2; - unsigned cca_hyst:3; - unsigned adr_decode:1; - unsigned pan_coordinator:1; - unsigned reserved_frame_mode:1; - unsigned reserved:2; - } f; -} cc1101_mdmctrl0_t; - -static const cc1101_mdmctrl0_t cc1101_mdmctrl0_default = {.f.preamble_length = 2, .f.autocrc = 1, .f.cca_mode = 3, .f.cca_hyst = 2, .f.adr_decode = 1}; - -typedef union cc1101_txctrl { - uint16_t value; - struct { - unsigned pa_level:5; - unsigned reserved:1; - unsigned pa_current:3; - unsigned txmix_current:2; - unsigned txmix_caparray:2; - unsigned tx_turnaround:1; - unsigned txmixbuf_cur:2; - } f; -} cc1101_txctrl_t; - -static const cc1101_txctrl_t cc1101_txctrl_default = {.f.pa_level = 31, .f.reserved = 1, .f.pa_current = 3, .f.tx_turnaround = 1, .f.txmixbuf_cur = 2}; -#endif - -#ifndef CC1101_DEF_CHANNEL -#define CC1101_DEF_CHANNEL 11 -#endif - -#ifndef CC1101_DEF_RFPOWER -#define CC1101_DEF_RFPOWER 31 -#endif //enum { // CC1101_TX_PWR_MASK = 0x1f, @@ -412,15 +329,18 @@ enum { */ enum{ CC1101_PA_PLUS_10 = 0xC0, - CC1101_PA_PLUS_5 = 0x85, + CC1101_PA_PLUS_5 = 0x84, CC1101_PA_PLUS_0 = 0x60, - CC1101_PA_MINUS_5 = 0x57, - CC1101_PA_MINUS_10 = 0x26, + CC1101_PA_MINUS_10 = 0x34, + CC1101_PA_MINUS_15 = 0x1d, + CC1101_PA_MINUS_20 = 0x0e, + CC1101_PA_MINUS_30 = 0x12, }; #ifndef CC1101_PA -//#define CC1101_PA CC1101_PA_PLUS_0 -#define CC1101_PA CC1101_PA_MINUS_10 +//#define CC1101_PA CC1101_PA_PLUS_10 +#define CC1101_PA CC1101_PA_PLUS_0 +//#define CC1101_PA CC1101_PA_MINUS_30 #endif // End CC1101_433_MHz #elif (CC1101_MATCHING_NETWORK == CC1101_868_MHZ) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 292079d9d4..c3c164677b 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -270,7 +270,6 @@ implementation // If GDO has asserted about sync byte being sent, we TX was successful, and txEnd should be set if(!txEnd){ // TX was unsuccessful - call Leds.led4On(); txFailed = TRUE; } } @@ -505,7 +504,7 @@ implementation // set pin directions call CSN.makeOutput(); - call GDO0.makeInput(); + /*call GDO0.makeInput();*/ call GDO2.makeInput(); // CHIP_RDYn by default call Gdo0Capture.disable(); @@ -571,7 +570,6 @@ implementation } inline void resetRx(){ - call Leds.led6On(); call CSN.set(); call CSN.clr(); /*strobe(CC1101_SRES);*/ @@ -832,13 +830,16 @@ implementation cc1101_status_t status; atomic { // Finished sending message + // Enable LEDs to debug gdo + /*call Leds.led3On();*/ call Gdo0Capture.captureFallingEdge(); + /*call Leds.led3Off();*/ } return status; } tasklet_async command error_t RadioSend.send(message_t* msg) { - /*uint16_t time;*/ + uint16_t time; /*uint8_t p;*/ uint8_t length; uint8_t* data; @@ -854,6 +855,22 @@ implementation #ifdef RADIO_DEBUG uint8_t sfd1, sfd2, sfd3, sfd4; #endif +#ifdef RADIO_DEBUG_MESSAGES + + if( call DiagMsg.record() ) + { + length = call RadioPacket.payloadLength(msg) + 1; + + call DiagMsg.str("bt"); + call DiagMsg.uint8(cmd); + call DiagMsg.uint8(state); + call DiagMsg.uint8(rxGdo0); + call DiagMsg.uint8(txEnd); + call DiagMsg.uint8(call RadioAlarm.isFree()); + call DiagMsg.send(); + } +#endif + if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd || ! call RadioAlarm.isFree()) return EBUSY; @@ -868,19 +885,22 @@ implementation // start transmission status = strobe(CC1101_STX); - // Do other useful things while we wait for TX state - data = getPayload(msg); // The length byte does not count itself so add one here in order to send the // right number of bytes to the TXFIFO length = call RadioPacket.payloadLength(msg) + 1; status = waitForState(CC1101_STATE_TX, 0xff); if (status.state != CC1101_STATE_TX){ - call Leds.led3On(); - call Leds.led3Off(); /*resetRx();*/ return EBUSY; } + // get a timestamp right after strobe returns + // This may not be accurate enough for time sync. + time = call RadioAlarm.getNow(); + call PacketTimeStamp.set(msg, time); + + // Do other useful things while we wait for TX state + data = getPayload(msg); // Fill up the FIFO call CSN.set(); call CSN.clr(); @@ -901,8 +921,6 @@ implementation #ifdef RADIO_DEBUG sfd2 = call GDO0.get(); #endif - // get a timestamp right after strobe returns - /*time = call RadioAlarm.getNow();*/ cmd = CMD_TRANSMIT; call RadioAlarm.wait(TX_2_RX_TIME); // 32+16 symbol periods @@ -1153,16 +1171,6 @@ implementation if ((fifo_length < 3 || fifo_length > call RadioPacket.maxPayloadLength() + 2 ) ||(packet_length < 3 || packet_length > call RadioPacket.maxPayloadLength() + 2 )) { // bad length: bail out. Not sure how likely this is since when packet length filter is enabled. - /*resetRx();*/ - /* - *if(fifo_length < 3) - * call Leds.led3Toggle(); - *else - * call Leds.led4Toggle(); - */ - - call Leds.led3On(); - call Leds.led3Off(); // empty the buffer so it will be ready for the next data //readRxFifo(NULL, fifo_length-2); // Uncomment if the packet length is NOT read before the if block readPayloadFromRxFifo(NULL, fifo_length-1 ); @@ -1208,8 +1216,6 @@ implementation if (fifo_length_end != 0){ // What to do with these packets is not clear. We can completely discard them or read them in and signal multiple // receive events. - call Leds.led3On(); - call Leds.led3Off(); strobe(CC1101_SIDLE); waitForState(CC1101_STATE_IDLE, 0xff); flushRxFifo(); @@ -1301,11 +1307,7 @@ implementation rxMsg = signal RadioReceive.receive(rxMsg); - }else{ - call Leds.led4On(); - call Leds.led4Off(); } - } @@ -1319,7 +1321,6 @@ implementation call Gdo0Capture.disable(); call Leds.led2Off(); call Leds.led2On(); - call Leds.led5On(); RADIO_ASSERT( ! rxGdo0 ); // assert that there's no nesting RADIO_ASSERT( ! txEnd ); // assert that there's no nesting @@ -1367,7 +1368,6 @@ implementation call Tasklet.schedule(); call Leds.led2On(); call Leds.led2Off(); - call Leds.led5Off(); } @@ -1503,7 +1503,7 @@ implementation /*do{*/ downloadMessage(); // Debug, check status again - readLengthFromRxBytes(&left_over); + /*readLengthFromRxBytes(&left_over);*/ /*if (left_over != 0)*/ /* P2OUT |= 0x2; // Port2.1*/ From 12a6e8783dffd8f9fd5f26f03d5106da374de54e Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 14:42:22 -0500 Subject: [PATCH 386/411] Added mapping for I2C --- tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc index 442ee7552c..2c9effddb1 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformUsciMapC.nc @@ -43,6 +43,7 @@ configuration PlatformUsciMapC { } implementation { components HplMsp430GeneralIOC as GIO; + components PlatformP; components Msp430UsciUartA1P as UartA1C; UartA1C.URXD -> GIO.UCA1RXD; @@ -62,4 +63,9 @@ configuration PlatformUsciMapC { /*SpiA3C.SIMO -> GIO.UCA3SIMO;*/ /*SpiA3C.SOMI -> GIO.UCA3SOMI;*/ /*SpiA3C.CLK -> GIO.UCA3CLK;*/ + + components Msp430UsciI2CB1P as I2CB1C; + I2CB1C.SDA -> GIO.UCB1SDA; + I2CB1C.SCL -> GIO.UCB1SCL; + I2CB1C.Platform -> PlatformP; } From 399590a3c86530e68dabf278e7a6f33a7113bffe Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 14:42:58 -0500 Subject: [PATCH 387/411] Removed unnecessary file --- tos/platforms/exp430/hardware/leds/LedsP.nc | 51 --------------------- 1 file changed, 51 deletions(-) delete mode 100644 tos/platforms/exp430/hardware/leds/LedsP.nc diff --git a/tos/platforms/exp430/hardware/leds/LedsP.nc b/tos/platforms/exp430/hardware/leds/LedsP.nc deleted file mode 100644 index f595c8e8c0..0000000000 --- a/tos/platforms/exp430/hardware/leds/LedsP.nc +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (c) 2009-2010 People Power Co. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * - Neither the name of the copyright holders nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** -* 3 LED implementation - * - * @author Peter A. Bigot - * @author João Gonçalves - */ - -module LedsP @safe() { - provides interface Leds; - uses { - interface GeneralIO as Led0; - interface GeneralIO as Led1; - interface GeneralIO as Led2; - } -} -implementation { -} From 28df0b73ea23cf4767bdb3be084a04165ec39e1b Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 14:46:36 -0500 Subject: [PATCH 388/411] I2C Fix --- tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc b/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc index a8ca13afff..926e8769be 100644 --- a/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc +++ b/tos/chips/msp430/x5xxx/usci-v2/i2c-sm/Msp430UsciI2CP.nc @@ -546,6 +546,8 @@ implementation { if (m_left == 1){ uint8_t ifg = call Usci.getIfg(); if (ifg & UCRXIFG){ + if (m_flags & I2C_STOP) + call Usci.setTxStop(); m_left--; m_buf[m_pos++] = call Usci.getRxbuf(); } From 82b414a0d559d465da527fc53f7941ab3cad5e4f Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 14:47:27 -0500 Subject: [PATCH 389/411] Added includes for gpio(buttons) --- tos/platforms/exp430/.platform | 15 +++++++++++++-- .../exp430/hardware/buttons/SwitchToggleC.nc | 2 +- tos/platforms/vumcr/.platform | 1 + 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/tos/platforms/exp430/.platform b/tos/platforms/exp430/.platform index 511219e2e3..ce9ac2a16c 100644 --- a/tos/platforms/exp430/.platform +++ b/tos/platforms/exp430/.platform @@ -3,7 +3,8 @@ # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. -push( @includes, qw( +#push( @includes, qw( +for (split(/\n/, <<'EOText' %P/hardware/adc %P/hardware/buttons %P/hardware/clock @@ -16,6 +17,7 @@ push( @includes, qw( %T/chips/msp430/x5xxx/lpm %T/chips/msp430/x5xxx/timer %T/chips/msp430/x5xxx/usci-v2 + %T/chips/msp430/x5xxx/usci-v2/i2c-sm %T/chips/msp430 %T/chips/msp430/pins %T/chips/msp430/timer @@ -65,8 +67,17 @@ push( @includes, qw( %T/lib/power %T/lib/printf %T/lib/diagmsg + %T/lib/gpio -) ); +EOText +)) { + s/\#.*$//; + s/^\s*//g; + s/\s*$//g; + push(@includes, $_) if $_; +} + +#) ); @opts = qw( -gcc=msp430-gcc diff --git a/tos/platforms/exp430/hardware/buttons/SwitchToggleC.nc b/tos/platforms/exp430/hardware/buttons/SwitchToggleC.nc index b7dfa1bce4..c510e05116 100644 --- a/tos/platforms/exp430/hardware/buttons/SwitchToggleC.nc +++ b/tos/platforms/exp430/hardware/buttons/SwitchToggleC.nc @@ -57,7 +57,7 @@ implementation { command bool Get.get() { return call HplMsp430GeneralIO.get(); } command error_t Notify.enable() { - error_t rv; + /*error_t rv;*/ call HplMsp430GeneralIO.makeInput(); call HplMsp430GeneralIO.setResistor(MSP430_PORT_RESISTOR_PULLUP); diff --git a/tos/platforms/vumcr/.platform b/tos/platforms/vumcr/.platform index 3bbc73178d..84b25b74e7 100644 --- a/tos/platforms/vumcr/.platform +++ b/tos/platforms/vumcr/.platform @@ -32,6 +32,7 @@ push( @includes, qw( %T/lib/power %T/lib/printf %T/lib/diagmsg + %T/lib/gpio ) ); @opts = qw( From a667c427ba4a9ea6f30e442b0994eb1f155537b2 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 14:48:51 -0500 Subject: [PATCH 390/411] Added a component for the Potentiometer and made it the Demo Sensor in EXP430 --- .../exp430/hardware/adc/DemoSensorC.nc | 3 +- .../exp430/hardware/adc/PotentioMeterC.nc | 49 +++++++++++++++++++ .../exp430/hardware/adc/PotentioMeterP.nc | 44 +++++++++++++++++ tos/platforms/exp430/platform.h | 1 + 4 files changed, 96 insertions(+), 1 deletion(-) create mode 100644 tos/platforms/exp430/hardware/adc/PotentioMeterC.nc create mode 100644 tos/platforms/exp430/hardware/adc/PotentioMeterP.nc diff --git a/tos/platforms/exp430/hardware/adc/DemoSensorC.nc b/tos/platforms/exp430/hardware/adc/DemoSensorC.nc index 31dfb7dab7..d24597dc93 100644 --- a/tos/platforms/exp430/hardware/adc/DemoSensorC.nc +++ b/tos/platforms/exp430/hardware/adc/DemoSensorC.nc @@ -51,6 +51,7 @@ generic configuration DemoSensorC() { provides interface Read; } implementation { - components new VoltageC() as DemoSensor; + /*components new VoltageC() as DemoSensor;*/ + components new PotentioMeterC() as DemoSensor; Read = DemoSensor; } diff --git a/tos/platforms/exp430/hardware/adc/PotentioMeterC.nc b/tos/platforms/exp430/hardware/adc/PotentioMeterC.nc new file mode 100644 index 0000000000..1ae1432fe2 --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/PotentioMeterC.nc @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2014, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Addisu Z. Taddese + */ + +generic configuration PotentioMeterC() { + provides { + interface Read; + interface ReadStream; + + interface Resource; + interface ReadNow; + } +} +implementation { + components new AdcReadClientC(); + Read = AdcReadClientC; + + components new AdcReadStreamClientC(); + ReadStream = AdcReadStreamClientC; + + components PotentioMeterP; + AdcReadClientC.AdcConfigure -> PotentioMeterP; + AdcReadStreamClientC.AdcConfigure -> PotentioMeterP; + + components new AdcReadNowClientC(); + Resource = AdcReadNowClientC; + ReadNow = AdcReadNowClientC; + + AdcReadNowClientC.AdcConfigure -> PotentioMeterP; +} diff --git a/tos/platforms/exp430/hardware/adc/PotentioMeterP.nc b/tos/platforms/exp430/hardware/adc/PotentioMeterP.nc new file mode 100644 index 0000000000..4e0b1c342b --- /dev/null +++ b/tos/platforms/exp430/hardware/adc/PotentioMeterP.nc @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2014, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Addisu Z. Taddese + */ + +module PotentioMeterP { + provides interface AdcConfigure ; +} +implementation { + const msp430adc12_channel_config_t config = { + inch: INPUT_CHANNEL_A5, + /*sref: REFERENCE_VREFplus_AVss,*/ + sref: REFERENCE_AVcc_AVss, + /*ref2_5v: REFVOLT_LEVEL_2_5,*/ + ref2_5v: REFVOLT_LEVEL_NONE, + adc12ssel: SHT_SOURCE_ACLK, + adc12div: SHT_CLOCK_DIV_1, + sht: SAMPLE_HOLD_4_CYCLES, + sampcon_ssel: SAMPCON_SOURCE_SMCLK, + sampcon_id: SAMPCON_CLOCK_DIV_1 + }; + async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration(){ + return &config; + } +} + diff --git a/tos/platforms/exp430/platform.h b/tos/platforms/exp430/platform.h index e69de29bb2..d46ebd7349 100644 --- a/tos/platforms/exp430/platform.h +++ b/tos/platforms/exp430/platform.h @@ -0,0 +1 @@ +#define REQUIRE_PLATFORM From 32c4dd0dfb76d8b827fa6d28b89b92cdbcb3ebf4 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 14:51:37 -0500 Subject: [PATCH 391/411] Reassigned Timers TA0 : PWM TA1 : TMicro TA2 : TMilli TB0 : ADC --- tos/chips/msp430/adc12/HplAdc12P.nc | 2 +- tos/lib/gpio/SoftCaptureC.nc | 4 +- tos/platforms/exp430/PlatformC.nc | 7 ++- tos/platforms/exp430/PlatformP.nc | 17 ++++-- .../exp430/hardware/clock/PlatformClockP.nc | 2 +- .../exp430/hardware/timer/AlarmAdc16C.nc | 53 +++++++++++++++++++ 6 files changed, 77 insertions(+), 8 deletions(-) create mode 100644 tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc index 2708ca0182..3e44701a58 100644 --- a/tos/chips/msp430/adc12/HplAdc12P.nc +++ b/tos/chips/msp430/adc12/HplAdc12P.nc @@ -52,7 +52,7 @@ #endif #if defined(__MSP430_HAS_ADC12_PLUS__) -#warning "HplAdc12P: processor uses ADC12_PLUS (may need review)" +/*#warning "HplAdc12P: processor uses ADC12_PLUS (may need review)"*/ #endif module HplAdc12P { diff --git a/tos/lib/gpio/SoftCaptureC.nc b/tos/lib/gpio/SoftCaptureC.nc index 27ac65e5b1..c5d9c17ccb 100644 --- a/tos/lib/gpio/SoftCaptureC.nc +++ b/tos/lib/gpio/SoftCaptureC.nc @@ -53,11 +53,11 @@ generic configuration SoftCaptureC() implementation { components new SoftCaptureP(); - components Counter32khzC; + components Counter32khz32C; GpioCapture = SoftCaptureP; GpioInterrupt = SoftCaptureP; - SoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32; + SoftCaptureP.Counter32khz32 -> Counter32khz32C; } diff --git a/tos/platforms/exp430/PlatformC.nc b/tos/platforms/exp430/PlatformC.nc index 0ba4edbb5a..422599f506 100644 --- a/tos/platforms/exp430/PlatformC.nc +++ b/tos/platforms/exp430/PlatformC.nc @@ -42,7 +42,10 @@ #include "hardware.h" configuration PlatformC { - provides interface Init as PlatformInit; + provides { + interface Init as PlatformInit; + interface Platform; + } uses interface Init as PeripheralInit; } @@ -50,8 +53,10 @@ implementation { components PlatformP; PlatformInit = PlatformP; + Platform = PlatformP; PeripheralInit = PlatformP.PeripheralInit; + components PlatformPinsC; PlatformP.PlatformPins -> PlatformPinsC; diff --git a/tos/platforms/exp430/PlatformP.nc b/tos/platforms/exp430/PlatformP.nc index 8b3387a316..9aaad0836a 100644 --- a/tos/platforms/exp430/PlatformP.nc +++ b/tos/platforms/exp430/PlatformP.nc @@ -55,7 +55,10 @@ noinit uint16_t boot_count; module PlatformP { - provides interface Init; + provides { + interface Init; + interface Platform; + } uses { interface Init as PlatformPins; interface Init as PlatformLeds; @@ -69,8 +72,8 @@ module PlatformP { implementation { void uwait(uint16_t u) { - uint16_t t0 = TA0R; - while((TA0R - t0) <= u); + uint16_t t0 = TA2R; + while((TA2R - t0) <= u); } command error_t Init.init() { @@ -83,6 +86,14 @@ implementation { return SUCCESS; } + async command uint16_t Platform.usecsRaw() { + return TA1R; + } + + async command uint16_t Platform.jiffiesRaw() { + return TA2R; + } + /***************** Defaults ***************/ default command error_t PeripheralInit.init() { return SUCCESS; diff --git a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc index 748bc84e45..a6a6db1829 100644 --- a/tos/platforms/exp430/hardware/clock/PlatformClockP.nc +++ b/tos/platforms/exp430/hardware/clock/PlatformClockP.nc @@ -455,7 +455,7 @@ module PlatformClockP { * MCLK is set to DCOCLK/1. 8 MHz * SMCLK is set to DCOCLK/1. 8 MHz. * DCO drives TA1 for TMicro and is set to provide 1us ticks. - * ACLK drives TA0 for TMilli. + * ACLK drives TA2 for TMilli. */ UCSCTL4 = SELA__XT1CLK | SELS__DCOCLK | SELM__DCOCLK; UCSCTL5 = DIVA__1 | DIVS__1 | DIVM__1; diff --git a/tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc b/tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc new file mode 100644 index 0000000000..62474e5443 --- /dev/null +++ b/tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2010, Vanderbilt University + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the copyright holder nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Addisu Taddese + */ + +generic configuration AlarmAdcTMilli16C() +{ + provides interface Init; + provides interface Alarm; +} +implementation +{ + components new Msp430TimerAdcC() as Msp430Timer; + components new Msp430AlarmC(TMilli) as Msp430Alarm; + + Init = Msp430Alarm; + Alarm = Msp430Alarm; + + Msp430Alarm.Msp430Timer -> Msp430Timer; + Msp430Alarm.Msp430TimerControl -> Msp430Timer; + Msp430Alarm.Msp430Compare -> Msp430Timer; +} + + From 226025da06243276bf130214dbc8a605a6c7da79 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 14:53:13 -0500 Subject: [PATCH 392/411] Testing SoftCapture for radio. Made other small improvements to radio driver --- tos/chips/cc1101/CC1101RadioC.nc | 2 ++ tos/lib/rfxlink/layers/SoftwareAckLayerC.nc | 11 ++++++++ tos/platforms/exp430/ActiveMessageC.nc | 2 ++ .../exp430/chips/ccxx00/HplCC1101C.nc | 27 +++++++++++-------- .../exp430/chips/ccxx00/HplRadioAlarmC.nc | 4 +-- .../exp430/chips/ccxx00/HplRadioSpiC.nc | 2 ++ .../exp430/chips/ccxx00/RadioConfig.h | 7 +++++ 7 files changed, 41 insertions(+), 14 deletions(-) diff --git a/tos/chips/cc1101/CC1101RadioC.nc b/tos/chips/cc1101/CC1101RadioC.nc index b78f24dcd6..de48b3ca65 100644 --- a/tos/chips/cc1101/CC1101RadioC.nc +++ b/tos/chips/cc1101/CC1101RadioC.nc @@ -224,12 +224,14 @@ implementation // -------- SoftwareAcknowledgement components new SoftwareAckLayerC(); + components DiagMsgC; SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; PacketAcknowledgements = SoftwareAckLayerC; SoftwareAckLayerC.Config -> RadioP; SoftwareAckLayerC.SubSend -> CsmaLayerC; SoftwareAckLayerC.SubReceive -> CsmaLayerC; + SoftwareAckLayerC.DiagMsg -> DiagMsgC; // -------- Carrier Sense diff --git a/tos/lib/rfxlink/layers/SoftwareAckLayerC.nc b/tos/lib/rfxlink/layers/SoftwareAckLayerC.nc index 28880fa624..88aa0fa111 100644 --- a/tos/lib/rfxlink/layers/SoftwareAckLayerC.nc +++ b/tos/lib/rfxlink/layers/SoftwareAckLayerC.nc @@ -52,6 +52,7 @@ generic module SoftwareAckLayerC() interface SoftwareAckConfig as Config; interface PacketFlag as AckReceivedFlag; + interface DiagMsg; } } @@ -148,6 +149,16 @@ implementation { RADIO_ASSERT( state == STATE_ACK_WAIT || state == STATE_READY ); +#ifdef RADIO_DEBUG_MESSAGES + if( call DiagMsg.record() ) + { + call DiagMsg.chr('s'); + call DiagMsg.uint8(state); + call DiagMsg.uint8(call Config.requiresAckReply(msg) ); + call DiagMsg.send(); + } +#endif + if( call Config.isAckPacket(msg) ) { if( state == STATE_ACK_WAIT && call Config.verifyAckPacket(txMsg, msg) ) diff --git a/tos/platforms/exp430/ActiveMessageC.nc b/tos/platforms/exp430/ActiveMessageC.nc index 2caa28dd2a..67cd8cc6f0 100644 --- a/tos/platforms/exp430/ActiveMessageC.nc +++ b/tos/platforms/exp430/ActiveMessageC.nc @@ -54,6 +54,7 @@ configuration ActiveMessageC interface PacketLink; interface RadioChannel; + interface PacketField as PacketRSSI; /*interface PacketTimeStamp as PacketTimeStampMicro;*/ interface PacketTimeStamp as PacketTimeStampMilli; } @@ -77,6 +78,7 @@ implementation LowPowerListening = MessageC; PacketLink = MessageC; RadioChannel = MessageC; + PacketRSSI = MessageC.PacketRSSI; PacketTimeStampMilli = MessageC; /*PacketTimeStampMicro = MessageC;*/ diff --git a/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc b/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc index 843cf30b0d..4b3872edeb 100644 --- a/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc +++ b/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc @@ -40,7 +40,7 @@ configuration HplCC1101C { } implementation { - components HplMsp430GeneralIOC as IO, new Msp430UsciSpiB0C() as SpiC; + components HplMsp430GeneralIOC as IO, HplRadioSpiC as SpiC; // pins components new Msp430GpioC() as CSNM; @@ -60,19 +60,24 @@ implementation { SpiByte = SpiC; SpiBlock = SpiC; - components HplRadioSpiP; - SpiC.Msp430UsciConfigure -> HplRadioSpiP; - // capture - components Msp430TimerC as TimerC; - components new GpioCaptureC(); - GpioCaptureC.Msp430TimerControl -> TimerC.Control2_A0; - GpioCaptureC.Msp430Capture -> TimerC.Capture2_A0; - GpioCaptureC.GeneralIO -> IO.Port23; - Gdo0Capture = GpioCaptureC; + /*components Msp430TimerC as TimerC;*/ + /*components new GpioCaptureC();*/ + /*GpioCaptureC.Msp430TimerControl -> TimerC.Control2_A0;*/ + /*GpioCaptureC.Msp430Capture -> TimerC.Capture2_A0;*/ + /*GpioCaptureC.GeneralIO -> IO.Port23;*/ + /*Gdo0Capture = GpioCaptureC;*/ + // SoftCapture is used instead since we don't have stringent timestamping requirements + // and because we are running out of timers (Timer2_A0 can now be used for TMilli) + components new SoftCaptureC(); + components new Msp430InterruptC(), HplMsp430InterruptC as IOIntC; + + Msp430InterruptC -> IOIntC.Port23; + SoftCaptureC.GpioInterrupt -> Msp430InterruptC; + Gdo0Capture = SoftCaptureC.GpioCapture; // alarm - components new Alarm32khz16C() as AlarmC; + components HplRadioAlarmC as AlarmC; Alarm = AlarmC; Init = AlarmC; diff --git a/tos/platforms/exp430/chips/ccxx00/HplRadioAlarmC.nc b/tos/platforms/exp430/chips/ccxx00/HplRadioAlarmC.nc index 8f4d00bdf9..15f063f3b9 100644 --- a/tos/platforms/exp430/chips/ccxx00/HplRadioAlarmC.nc +++ b/tos/platforms/exp430/chips/ccxx00/HplRadioAlarmC.nc @@ -1,6 +1,4 @@ - - -generic configuration HplRadioAlarmC() { +configuration HplRadioAlarmC { provides interface Init; provides interface Alarm as Alarm32khz16; diff --git a/tos/platforms/exp430/chips/ccxx00/HplRadioSpiC.nc b/tos/platforms/exp430/chips/ccxx00/HplRadioSpiC.nc index a603e1f52a..9e3aab9ad7 100644 --- a/tos/platforms/exp430/chips/ccxx00/HplRadioSpiC.nc +++ b/tos/platforms/exp430/chips/ccxx00/HplRadioSpiC.nc @@ -6,6 +6,7 @@ configuration HplRadioSpiC { provides interface Resource; provides interface SpiByte; provides interface SpiPacket; + provides interface SpiBlock; } @@ -16,6 +17,7 @@ implementation { Resource = SpiC; SpiByte = SpiC; SpiPacket = SpiC; + SpiBlock = SpiC; SpiC.Msp430UsciConfigure -> HplRadioSpiP; } diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h index 70b7e12904..2fad042031 100644 --- a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -69,4 +69,11 @@ typedef uint16_t tradio_size; #define SOFTWAREACK_TIMEOUT 2000 #endif +/** + * Make PACKET_LINK automaticaly enabled for Ieee154MessageC + */ +//#if !defined(TFRAMES_ENABLED) && !defined(PACKET_LINK) +//#define PACKET_LINK +//#endif + #endif From 873cd247f302b7fe8346a2715b09765534a8ebcc Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 2 Jun 2014 17:56:23 -0500 Subject: [PATCH 393/411] Fixes issue where interrupt is generated immediately after the edge type is set --- tos/chips/msp430/pins/Msp430InterruptC.nc | 1 + 1 file changed, 1 insertion(+) diff --git a/tos/chips/msp430/pins/Msp430InterruptC.nc b/tos/chips/msp430/pins/Msp430InterruptC.nc index 41280db9e5..79797c33fd 100644 --- a/tos/chips/msp430/pins/Msp430InterruptC.nc +++ b/tos/chips/msp430/pins/Msp430InterruptC.nc @@ -53,6 +53,7 @@ implementation { atomic { call Interrupt.disable(); call HplInterrupt.edge( rising ); + call HplInterrupt.clear(); call HplInterrupt.enable(); } return SUCCESS; From 34cfe77e72d7a55698e7933d8914740ede49a8ae Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 3 Jun 2014 14:59:40 -0500 Subject: [PATCH 394/411] Fixed a bug with Acks due to the radio not going into TX mode after a packet reception I added a polling check to see if the CCA (Clear channel assessment) condition has been met before strobing the TX mode. Also changed the Ack timeout to 3ms so 100Kbps would work. --- tos/chips/cc1101/CC1101DriverLayerP.nc | 72 ++++++++++--------- .../exp430/chips/ccxx00/RadioConfig.h | 5 +- 2 files changed, 41 insertions(+), 36 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index c3c164677b..e01e10245c 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -268,6 +268,9 @@ implementation } } else if(state == STATE_BUSY_TX_2_RX_ON){ // If GDO has asserted about sync byte being sent, we TX was successful, and txEnd should be set +#ifdef RADIO_DEBUG + RADIO_ASSERT(txEnd); +#endif if(!txEnd){ // TX was unsuccessful txFailed = TRUE; @@ -337,14 +340,13 @@ implementation } - inline cc1101_status_t getPacketStatus(){ + inline cc1101_status_t getPacketStatus(uint8_t* pkt_status){ cc1101_status_t status; call CSN.set(); // set CSN, just in clase it's not set call CSN.clr(); // clear CSN, starting a multi-byte SPI command - // For debugging using Logic Analyzer - burstRead(CC1101_PKTSTATUS, &status.value, 1); - call CSN.set(); // set CSN, just in clase it's not set + status = burstRead(CC1101_PKTSTATUS, pkt_status, 1); + call CSN.set(); return status; } @@ -410,7 +412,7 @@ implementation call CSN.clr(); // clear CSN, starting a multi-byte SPI command // For debugging using Logic Analyzer - burstRead(CC1101_PKTSTATUS, &pkt_status, 1); + getPacketStatus(&pkt_status); call CSN.set(); /*status.value = call SpiByte.write(CC1101_CMD_REGISTER_READ | CC1101_CMD_BURST_MODE | CC1101_RXBYTES);*/ @@ -477,14 +479,26 @@ implementation inline cc1101_status_t waitForState(uint8_t st, uint8_t timeout) { cc1101_status_t status; + uint8_t pkt_status; uint8_t counter = 0; do { status = getStatus(); counter++; - getPacketStatus(); + getPacketStatus(&pkt_status); }while(status.state != st && counter < timeout); return status; } + + inline uint8_t waitForCCA(uint8_t timeout) { + uint8_t pkt_status; + uint8_t counter = 0; + do { + getPacketStatus(&pkt_status); + counter++; + }while(!(pkt_status & 0x10) && counter < timeout); + return pkt_status; + } + inline cc1101_status_t flushRxFifo() { strobe(CC1101_SFRX); strobe(CC1101_SRX); @@ -842,6 +856,7 @@ implementation uint16_t time; /*uint8_t p;*/ uint8_t length; + uint8_t pkt_status; uint8_t* data; /*uint16_t trials = 0;*/ /* @@ -851,10 +866,7 @@ implementation *timesync_relative_t timesync_relative; *uint32_t sfdTime; */ - cc1101_status_t status; -#ifdef RADIO_DEBUG - uint8_t sfd1, sfd2, sfd3, sfd4; -#endif + volatile cc1101_status_t status; #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) @@ -882,6 +894,11 @@ implementation } else if(status.state == CC1101_STATE_CALIBRATE || status.state == CC1101_STATE_SETTLING) return EBUSY; + // Before we start transimssion, we have to wait for CCA, otherwise the chip won't get into the TX state + pkt_status = waitForCCA(0xff); + if (!(pkt_status & 0x10)) + return EBUSY; + // start transmission status = strobe(CC1101_STX); @@ -915,24 +932,11 @@ implementation /*}*/ atomic { -#ifdef RADIO_DEBUG - sfd1 = call GDO0.get(); -#endif -#ifdef RADIO_DEBUG - sfd2 = call GDO0.get(); -#endif - cmd = CMD_TRANSMIT; call RadioAlarm.wait(TX_2_RX_TIME); // 32+16 symbol periods state = STATE_BUSY_TX_2_RX_ON; enableTransmitGdo(); -#ifdef RADIO_DEBUG - sfd3 = call GDO0.get(); -#endif /*call Gdo0Capture.captureFallingEdge();*/ -#ifdef RADIO_DEBUG - sfd4 = call GDO0.get(); -#endif } /* *while(TRUE){ @@ -950,13 +954,6 @@ implementation */ /*enableTransmitGdo();*/ -#ifdef RADIO_DEBUG - RADIO_ASSERT(sfd1 == 0); - RADIO_ASSERT(sfd2 == 0); - RADIO_ASSERT(sfd3 == 0); - RADIO_ASSERT(sfd4 == 0); -#endif - //TODO: implement timesync /* * timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; @@ -1106,7 +1103,7 @@ implementation #endif - inline void downloadMessage() + inline void downloadMessage() { uint8_t fifo_length, fifo_length_end; uint8_t packet_length; @@ -1317,10 +1314,14 @@ implementation // RX GDO0 (rising edge) or end of TX (falling edge) async event void Gdo0Capture.captured( uint16_t time ) { - uint8_t gdo0_val; + volatile uint8_t gdo0_val; call Gdo0Capture.disable(); call Leds.led2Off(); call Leds.led2On(); + call Leds.led2Off(); + call Leds.led2On(); + call Leds.led2Off(); + call Leds.led2On(); RADIO_ASSERT( ! rxGdo0 ); // assert that there's no nesting RADIO_ASSERT( ! txEnd ); // assert that there's no nesting @@ -1364,9 +1365,12 @@ implementation } #endif + call Leds.led2Off(); + call Leds.led2On(); + call Leds.led2Off(); + call Leds.led2On(); // do the rest of the processing call Tasklet.schedule(); - call Leds.led2On(); call Leds.led2Off(); } @@ -1390,7 +1394,7 @@ implementation tasklet_async event void Tasklet.run() { - uint8_t left_over; + /*uint8_t left_over;*/ #ifdef RADIO_DEBUG_TASKLET if( call DiagMsg.record() ) { diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h index 2fad042031..c726be3271 100644 --- a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -51,7 +51,7 @@ typedef uint16_t tradio_size; * Ok, further hacks were required for deputy, I removed 00 from the * beginning and end to ba able to handle longer wait periods. */ -#define RADIO_ALARM_MICROSEC 0.03125 +#define RADIO_ALARM_MICROSEC 0.032768 /** * The base two logarithm of the number of radio alarm ticks per one millisecond @@ -65,8 +65,9 @@ typedef uint16_t tradio_size; #define CC1101_MATCHING_NETWORK CC1101_433_MHZ #endif +/* Number of microseconds a sender waits for an acklowledgement */ #ifndef SOFTWAREACK_TIMEOUT -#define SOFTWAREACK_TIMEOUT 2000 +#define SOFTWAREACK_TIMEOUT 3000 #endif /** From 3cff4670be20ccdcfde1f9fdadf57dadb504738b Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Wed, 4 Jun 2014 18:21:38 -0500 Subject: [PATCH 395/411] Enabled and tested the Packet Link Layer for packet retransmission --- tos/platforms/exp430/chips/ccxx00/RadioConfig.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h index c726be3271..91084f080a 100644 --- a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -1,4 +1,3 @@ - /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. @@ -73,8 +72,8 @@ typedef uint16_t tradio_size; /** * Make PACKET_LINK automaticaly enabled for Ieee154MessageC */ -//#if !defined(TFRAMES_ENABLED) && !defined(PACKET_LINK) -//#define PACKET_LINK -//#endif +#if !defined(TFRAMES_ENABLED) && !defined(PACKET_LINK) +#define PACKET_LINK +#endif #endif From e36bf18fbb6502c30a253b0097ec5bc137d58bf8 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Thu, 12 Jun 2014 13:47:38 -0500 Subject: [PATCH 396/411] Added Debugging Leds component This component can be used to swap out the regular LedsC component. Its Leds are wired to different pins that can be used for debugging with a logic analyzer/scope. --- .../exp430/hardware/leds/DebugLedsC.nc | 85 ++++++++++++++++++ tos/platforms/exp430/hardware/leds/NoLedsC.nc | 87 +++++++++++++++++++ .../exp430/hardware/leds/PlatformLedsC.nc | 2 +- .../exp430/hardware/leds/PlatformLedsP.nc | 2 +- 4 files changed, 174 insertions(+), 2 deletions(-) create mode 100644 tos/platforms/exp430/hardware/leds/DebugLedsC.nc create mode 100644 tos/platforms/exp430/hardware/leds/NoLedsC.nc diff --git a/tos/platforms/exp430/hardware/leds/DebugLedsC.nc b/tos/platforms/exp430/hardware/leds/DebugLedsC.nc new file mode 100644 index 0000000000..7115eb88f2 --- /dev/null +++ b/tos/platforms/exp430/hardware/leds/DebugLedsC.nc @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * @author Peter A. Bigot + * @author Addisu Z. Taddese + */ + +#include "hardware.h" + +configuration DebugLedsC { + provides { + interface Leds; + } +} +implementation { + components new PlatformLedsP(); + components PlatformC; + Leds = PlatformLedsP; + // Treat this as a peripheral + PlatformC.PeripheralInit -> PlatformLedsP; + + components HplMsp430GeneralIOC as GeneralIOC; + + /* RED LED (D1) at P1.0 */ + components new Msp430GpioC() as Led0Impl; + Led0Impl -> GeneralIOC.Port70; + PlatformLedsP.Led0 -> Led0Impl; + + /* Yellow LED (D2) at P8.1 */ + components new Msp430GpioC() as Led1Impl; + Led1Impl -> GeneralIOC.Port71; + PlatformLedsP.Led1 -> Led1Impl; + + /* Green LED (D1) at P8.2 */ + components new Msp430GpioC() as Led2Impl; + Led2Impl -> GeneralIOC.Port72; + PlatformLedsP.Led2 -> Led2Impl; + + components new Msp430GpioC() as Led3Impl; + Led3Impl -> GeneralIOC.Port73; + PlatformLedsP.Led3 -> Led3Impl; + + components DummyIoP as Led4Impl; + PlatformLedsP.Led4 -> Led4Impl; + + components DummyIoP as Led5Impl; + PlatformLedsP.Led5 -> Led5Impl; + + components DummyIoP as Led6Impl; + PlatformLedsP.Led6 -> Led6Impl; + + components DummyIoP as Led7Impl; + PlatformLedsP.Led7 -> Led7Impl; + +} diff --git a/tos/platforms/exp430/hardware/leds/NoLedsC.nc b/tos/platforms/exp430/hardware/leds/NoLedsC.nc new file mode 100644 index 0000000000..dcb72c5856 --- /dev/null +++ b/tos/platforms/exp430/hardware/leds/NoLedsC.nc @@ -0,0 +1,87 @@ +// $Id: NoLedsC.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $ + +/* + * Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the University of California nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * A null operation replacement for the LedsC component. As many + * components might concurrently signal information through LEDs, + * using LedsC and NoLedsC allows an application builder to select + * which components control the LEDs. + * + * @author Philip Levis + * @date March 19, 2005 + */ + +module NoLedsC { + provides interface Init; + provides interface Leds; +} +implementation { + + command error_t Init.init() {return SUCCESS;} + + async command void Leds.led0On() {} + async command void Leds.led0Off() {} + async command void Leds.led0Toggle() {} + + async command void Leds.led1On() {} + async command void Leds.led1Off() {} + async command void Leds.led1Toggle() {} + + async command void Leds.led2On() {} + async command void Leds.led2Off() {} + async command void Leds.led2Toggle() {} + + async command void Leds.led3On() {} + async command void Leds.led3Off() {} + async command void Leds.led3Toggle() {} + + async command void Leds.led4On() {} + async command void Leds.led4Off() {} + async command void Leds.led4Toggle() {} + + async command void Leds.led5On() {} + async command void Leds.led5Off() {} + async command void Leds.led5Toggle() {} + + async command void Leds.led6On() {} + async command void Leds.led6Off() {} + async command void Leds.led6Toggle() {} + + async command void Leds.led7On() {} + async command void Leds.led7Off() {} + async command void Leds.led7Toggle() {} + + async command uint8_t Leds.get() {return 0;} + async command void Leds.set(uint8_t val) {} +} diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc index b9a4c1623a..c2ad1236e1 100644 --- a/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsC.nc @@ -44,7 +44,7 @@ configuration PlatformLedsC { } } implementation { - components PlatformLedsP; + components new PlatformLedsP(); Leds = PlatformLedsP; Init = PlatformLedsP; diff --git a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc index d3b89ff7e2..c64e3e9c6e 100644 --- a/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc +++ b/tos/platforms/exp430/hardware/leds/PlatformLedsP.nc @@ -42,7 +42,7 @@ * @author David Moss */ -module PlatformLedsP { +generic module PlatformLedsP(){ provides { interface Init; interface Leds; From 3a86c380b11cf00d6440272b38d7d02155a20f30 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 17 Jun 2014 09:21:22 -0500 Subject: [PATCH 397/411] Fixed a bug where the current time as it was read from the timer register was corrupt. The solution was to assume the timer clock and the CPU clock were asynchronous, in which case a the timer register is sampled multiple times and a majority vote is taken. This bug affected the radio stack by firing an alarm when it wasn't supposed to. This in turn exposed a different bug where sending data over the radio was not functioning after resetRx was called. --- tos/chips/cc1101/CC1101DriverLayer.h | 46 +++++++------ tos/chips/cc1101/CC1101DriverLayerC.nc | 3 +- tos/chips/cc1101/CC1101DriverLayerP.nc | 68 +++++++++----------- tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc | 8 +-- 4 files changed, 62 insertions(+), 63 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h index 36db6143f5..e0a90b577e 100644 --- a/tos/chips/cc1101/CC1101DriverLayer.h +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -42,27 +42,13 @@ typedef struct cc1101_metadata_t } cc1101_metadata_t; enum cc1101_timing_enums { - CC1101_SYMBOL_TIME = 16, // 16us - IDLE_2_RX_ON_TIME = 12 * CC1101_SYMBOL_TIME, - PD_2_IDLE_TIME = 860, // .86ms - STROBE_TO_TX_ON_TIME = 12 * CC1101_SYMBOL_TIME, - // TX SFD delay is computed as follows: - // a.) STROBE_TO_TX_ON_TIME is required for preamble transmission to - // start after TX strobe is issued - // b.) the SFD byte is the 5th byte transmitted (10 symbol periods) - // c.) there's approximately a 25us delay between the strobe and reading - // the timer register - TX_SFD_DELAY = STROBE_TO_TX_ON_TIME + 10 * CC1101_SYMBOL_TIME - 25, - // TX SFD is captured in hardware - RX_SFD_DELAY = 0, - - // TX_2_RX Time is the amount of time it takes for the CC1101 to send the preamble and sync word. - // Since these are configurable, it is difficult to calculate exactly what this should be. For now - // we just assume the worst case for 2.4Kbps with 32 bit preamble and 16 bits sync word. Experiments - // show values > 50ms. - TX_2_RX_TIME = 65000U, + // Ref CC1101 datasheet Table 34: Overall State Transition Times + // These values assume Fxosc of 26MHz and no PA ramping + IDLE_2_RX_ON_TIME = 800, // with calibration }; +#define TX_DATA_TIME ((12+64)*16e6/(CC1101_BAUD_RATE)) + enum cc1101_reg_access_enums { CC1101_CMD_REGISTER_MASK = 0x3f, CC1101_CMD_REGISTER_READ = 0x80, @@ -259,6 +245,28 @@ enum cc1101_config_reg_enums { //#define CC1101_BAUD CC1101_500K #endif +#if (CC1101_BAUD == CC1101_1_2K) + #define CC1101_BAUD_RATE 1200 +#elif (CC1101_BAUD == CC1101_2_4K) + #define CC1101_BAUD_RATE 2400 +#elif (CC1101_BAUD == CC1101_10K) + #define CC1101_BAUD_RATE 10000 +#elif (CC1101_BAUD == CC1101_26K) + #define CC1101_BAUD_RATE 26000 +#elif (CC1101_BAUD == CC1101_38_4K) + #define CC1101_BAUD_RATE 38400 +#elif (CC1101_BAUD == CC1101_76_8K) + #define CC1101_BAUD_RATE 76800 +#elif (CC1101_BAUD == CC1101_100K) + #define CC1101_BAUD_RATE 100000 +#elif (CC1101_BAUD == CC1101_150K) + #define CC1101_BAUD_RATE 150000 +#elif (CC1101_BAUD == CC1101_250K) + #define CC1101_BAUD_RATE 250000 +#elif (CC1101_BAUD == CC1101_500K) + #define CC1101_BAUD_RATE 500000 +#endif + /** * All default channels and FREQx registers obtained from SmartRF studio. We * are not trying to define channel frequencies to match up with any sort of diff --git a/tos/chips/cc1101/CC1101DriverLayerC.nc b/tos/chips/cc1101/CC1101DriverLayerC.nc index 1b570413c0..9561d6c5f7 100644 --- a/tos/chips/cc1101/CC1101DriverLayerC.nc +++ b/tos/chips/cc1101/CC1101DriverLayerC.nc @@ -136,6 +136,7 @@ implementation DriverLayerP.PppIpv6 -> PppIpv6C; #endif - components LedsC; + /*components LedsC as LedsC;*/ + components DebugLedsC as LedsC; DriverLayerP.Leds -> LedsC; } diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index e01e10245c..d66845575e 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -264,7 +264,7 @@ implementation // in receive mode, enable GDO0 capture enableReceiveGdo(); } else { - call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods + call RadioAlarm.wait(IDLE_2_RX_ON_TIME*RADIO_ALARM_MICROSEC); } } else if(state == STATE_BUSY_TX_2_RX_ON){ // If GDO has asserted about sync byte being sent, we TX was successful, and txEnd should be set @@ -273,7 +273,9 @@ implementation #endif if(!txEnd){ // TX was unsuccessful + call Leds.led0Off(); txFailed = TRUE; + call Gdo0Capture.disable(); } } else @@ -401,7 +403,6 @@ implementation inline cc1101_status_t readLengthFromRxBytes(uint8_t* lengthPtr) { cc1101_status_t status; - uint8_t pkt_status; uint8_t length1, length2; RADIO_ASSERT( call SpiResource.isOwner() ); @@ -411,14 +412,6 @@ implementation call CSN.set(); // set CSN, just in clase it's not set call CSN.clr(); // clear CSN, starting a multi-byte SPI command - // For debugging using Logic Analyzer - getPacketStatus(&pkt_status); - call CSN.set(); - - /*status.value = call SpiByte.write(CC1101_CMD_REGISTER_READ | CC1101_CMD_BURST_MODE | CC1101_RXBYTES);*/ - /**lengthPtr = call SpiByte.write(0);*/ - - call CSN.clr(); status = burstRead(CC1101_RXBYTES, &length1, 1); call CSN.set(); do { @@ -479,12 +472,12 @@ implementation inline cc1101_status_t waitForState(uint8_t st, uint8_t timeout) { cc1101_status_t status; - uint8_t pkt_status; + /*uint8_t pkt_status;*/ uint8_t counter = 0; do { status = getStatus(); counter++; - getPacketStatus(&pkt_status); + /*getPacketStatus(&pkt_status);*/ }while(status.state != st && counter < timeout); return status; } @@ -590,6 +583,10 @@ implementation /*waitChipRdyn();*/ strobe(CC1101_SIDLE); waitForState(CC1101_STATE_IDLE, 0xff); + strobe(CC1101_SFRX); + waitForState(CC1101_STATE_IDLE, 0xff); + strobe(CC1101_SFTX); + waitForState(CC1101_STATE_IDLE, 0xff); strobe(CC1101_SRX); waitForState(CC1101_STATE_RX, 0xff); state = STATE_RX_ON; @@ -688,7 +685,7 @@ implementation setChannel(); if( state == STATE_RX_ON ) { - call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods + call RadioAlarm.wait(IDLE_2_RX_ON_TIME*RADIO_ALARM_MICROSEC); state = STATE_IDLE_2_RX_ON; } else @@ -737,11 +734,12 @@ implementation // setChannel was ignored in SLEEP because the SPI was not working, so do it here /*setChannel();*/ - // Flush anything that might be in the RX FIFO + // Flush anything that might be in the RX/TX FIFO strobe(CC1101_SFRX); + strobe(CC1101_SFTX); // start receiving strobe(CC1101_SRX); - call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods + call RadioAlarm.wait(IDLE_2_RX_ON_TIME*RADIO_ALARM_MICROSEC); state = STATE_IDLE_2_RX_ON; } else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) @@ -749,6 +747,9 @@ implementation { // disable GDO0 capture call Gdo0Capture.disable(); + // Also if an interrupt occured during the turnOff process, rxGdo0 will be true so set it to false + // TODO: This however means we have actually received a packet. Shouldn't we process it? + rxGdo0 = FALSE; // stop receiving strobe(CC1101_SIDLE); @@ -924,35 +925,19 @@ implementation writeTxFifo(data, length); call CSN.set(); - // Check if in TX mode. If not in TX mode, CCA has failed - /*status = getStatus();*/ - /*if (status.state != CC1101_STATE_TX){*/ - /*resetRx();*/ - /*return EBUSY;*/ - /*}*/ - atomic { cmd = CMD_TRANSMIT; - call RadioAlarm.wait(TX_2_RX_TIME); // 32+16 symbol periods + // Assumes Manchester encoding + // 4 bytes - preamble + // 2 bytes - sync + // 2 bytes - crc + // 4 byte - padding (just to be safe) + // length - payload + call RadioAlarm.wait(TX_DATA_TIME*RADIO_ALARM_MICROSEC); state = STATE_BUSY_TX_2_RX_ON; enableTransmitGdo(); - /*call Gdo0Capture.captureFallingEdge();*/ + } - /* - *while(TRUE){ - * status = waitForState(CC1101_STATE_RX, 0xff); - * if(status.state == CC1101_STATE_RX){ - * txEnd = TRUE; - * break; - * } - * if(trials++ > 20){ - * // Transmission has failed - * resetRx(); - * return EBUSY; - * } - *} - */ - /*enableTransmitGdo();*/ //TODO: implement timesync /* @@ -1471,11 +1456,16 @@ implementation RADIO_ASSERT(cmd == CMD_TRANSMIT); resetRx(); + call Leds.led1Off(); + call Leds.led1On(); // a packet might have been received since the end of the transmission enableReceiveGdo(); + call Leds.led1Off(); } else RADIO_ASSERT(FALSE); + + signal RadioSend.sendDone(FAIL); } if( rxGdo0 ) { diff --git a/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc b/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc index 7cfb3aca15..70260c637c 100644 --- a/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc +++ b/tos/chips/msp430/x5xxx/timer/Msp430TimerC.nc @@ -170,7 +170,7 @@ implementation { #if defined(__MSP430_HAS_T0A3__) || defined(__MSP430_HAS_T0A5__) components new Msp430TimerP( TA0IV_, TA0R_, TA0CTL_, TAIFG, TACLR, TAIE, - TASSEL0, TASSEL1, FALSE ) as Msp430Timer0_A; + TASSEL0, TASSEL1, TRUE ) as Msp430Timer0_A; Timer0_A = Msp430Timer0_A.Timer; Msp430Timer0_A.VectorTimerX0 -> Common.VectorTimer0_A0; @@ -219,7 +219,7 @@ implementation { #if defined(__MSP430_HAS_T0B7__) components new Msp430TimerP( TB0IV_, TB0R_, TB0CTL_, TBIFG, TBCLR, TBIE, - TBSSEL0, TBSSEL1, FALSE ) as Msp430Timer0_B; + TBSSEL0, TBSSEL1, TRUE ) as Msp430Timer0_B; Timer0_B = Msp430Timer0_B.Timer; Msp430Timer0_B.VectorTimerX0 -> Common.VectorTimer0_B0; @@ -280,7 +280,7 @@ implementation { #if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) components new Msp430TimerP( TA1IV_, TA1R_, TA1CTL_, TAIFG, TACLR, TAIE, - TASSEL0, TASSEL1, FALSE ) as Msp430Timer1_A; + TASSEL0, TASSEL1, TRUE ) as Msp430Timer1_A; Timer1_A = Msp430Timer1_A.Timer; Msp430Timer1_A.VectorTimerX0 -> Common.VectorTimer1_A0; @@ -331,7 +331,7 @@ implementation { #if defined(__MSP430_HAS_T2A3__) components new Msp430TimerP( TA2IV_, TA2R_, TA2CTL_, TAIFG, TACLR, TAIE, - TASSEL0, TASSEL1, FALSE ) as Msp430Timer2_A; + TASSEL0, TASSEL1, TRUE ) as Msp430Timer2_A; Timer2_A = Msp430Timer2_A.Timer; Msp430Timer2_A.VectorTimerX0 -> Common.VectorTimer2_A0; From 92b16ba8030b3a00316168aa26eff9d2e0b6c9a3 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 28 Jul 2014 09:16:01 -0500 Subject: [PATCH 398/411] Fixes to radio driver in low power listening mode --- tos/chips/cc1101/CC1101DriverLayer.h | 1 + tos/chips/cc1101/CC1101DriverLayerP.nc | 42 ++++++++++++++++--- .../exp430/hardware/usci/PlatformSerialP.nc | 15 ++++++- 3 files changed, 50 insertions(+), 8 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayer.h b/tos/chips/cc1101/CC1101DriverLayer.h index e0a90b577e..8971b2c5b7 100644 --- a/tos/chips/cc1101/CC1101DriverLayer.h +++ b/tos/chips/cc1101/CC1101DriverLayer.h @@ -47,6 +47,7 @@ enum cc1101_timing_enums { IDLE_2_RX_ON_TIME = 800, // with calibration }; +// Maximum time to wait for sending and receiving data #define TX_DATA_TIME ((12+64)*16e6/(CC1101_BAUD_RATE)) enum cc1101_reg_access_enums { diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index d66845575e..0c0c204639 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -266,6 +266,12 @@ implementation } else { call RadioAlarm.wait(IDLE_2_RX_ON_TIME*RADIO_ALARM_MICROSEC); } + } else if (state == STATE_RX_WAIT_END_PKT){ + // spurious GDO interrupt. Put radio back to RX ON + state = STATE_RX_ON; + cmd = CMD_NONE; + // in receive mode, enable GDO0 capture + enableReceiveGdo(); } else if(state == STATE_BUSY_TX_2_RX_ON){ // If GDO has asserted about sync byte being sent, we TX was successful, and txEnd should be set #ifdef RADIO_DEBUG @@ -273,7 +279,7 @@ implementation #endif if(!txEnd){ // TX was unsuccessful - call Leds.led0Off(); + /*call Leds.led0Off();*/ txFailed = TRUE; call Gdo0Capture.disable(); } @@ -858,6 +864,7 @@ implementation /*uint8_t p;*/ uint8_t length; uint8_t pkt_status; + uint8_t gdo0_val; uint8_t* data; /*uint16_t trials = 0;*/ /* @@ -884,8 +891,18 @@ implementation } #endif - if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd || ! call RadioAlarm.isFree()) + gdo0_val = call GDO0.get(); + if (!gdo0_val && state == STATE_RX_WAIT_END_PKT){ + // If state == STATE_RX_WAIT_END_PKT and gdo0 is low, then the state is + // invalid and can be ignored. This could happen if a spurious GDO0 + // interrupt occured. + call Leds.led0On(); + call Leds.led0Off(); + state = STATE_RX_ON; + } + if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || rxGdo0 || txEnd || ! call RadioAlarm.isFree()){ return EBUSY; + } status = getStatus(); if (status.state == CC1101_STATE_TXFIFO_UNDERFLOW){ @@ -1297,6 +1314,7 @@ implementation // RX GDO0 (rising edge) or end of TX (falling edge) + // Do not modify RadioAlarm here because it maybe owned by someone else. async event void Gdo0Capture.captured( uint16_t time ) { volatile uint8_t gdo0_val; @@ -1312,13 +1330,24 @@ implementation gdo0_val = call GDO0.get(); - if(state == STATE_RX_ON) { + if(state == STATE_RX_ON || state == STATE_RX_WAIT_END_PKT) { if(gdo0_val){ capturedTime = time; call Gdo0Capture.captureFallingEdge(); + // Switch to this state so we don't start sending data + // This however means that if we miss the GDO0 assertion(for some + // reason) that the system will remain in this state, which will + // prevent TX. Thus, this state has to be invalided at the beginning of + // TX by checking if gdo0 is low. In other words, if state == + // STATE_RX_WAIT_END_PKT and gdo0 is low, then the state is invalid and + // can be ignored. + state = STATE_RX_WAIT_END_PKT; + /*call Leds.led0On();*/ /*call Leds.led0Off();*/ - }else{ + }else if (state == STATE_RX_WAIT_END_PKT){ + // check if state == STATE_RX_WAIT_END_PKT to gaurd against spurious + // GDO0 interrupts. rxGdo0 = TRUE; /*call Leds.led0On();*/ /*call Leds.led0Off();*/ @@ -1327,8 +1356,6 @@ implementation } }else if(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON){ txEnd = TRUE; - if(state == STATE_BUSY_TX_2_RX_ON) - call RadioAlarm.cancel(); // No need to wait for the timeout alarm } else { // received capture interrupt in an invalid state RADIO_ASSERT(FALSE); @@ -1411,6 +1438,9 @@ implementation RADIO_ASSERT(state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON); RADIO_ASSERT(cmd == CMD_TRANSMIT); + if(state == STATE_BUSY_TX_2_RX_ON) + call RadioAlarm.cancel(); // No need to wait for the timeout alarm + state = STATE_RX_ON; cmd = CMD_NONE; diff --git a/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc b/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc index 29a8d11632..c4aa640ac0 100644 --- a/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc +++ b/tos/platforms/exp430/hardware/usci/PlatformSerialP.nc @@ -40,6 +40,8 @@ * @author Addisu Z. Taddese */ +#include "msp430usci.h" + /* * This table assumes UART clock input (SMCLK) is 8MHz */ @@ -49,9 +51,18 @@ msp430_usci_config_t msp430_usci_uart_exp430_config = { ctl1 : UCSSEL__SMCLK, /* SLAU208 Table 34-4 8MHz 9600: UBR=833, BRS=2, BRF=0 */ - /*brw : 833, // 9600*/ - br0 : 65, + /*brw 833 => 9600*/ + br0 : 68, br1 : 3, + /* SLAU208 Table 34-4 8MHz 9600: UBR=833, BRS=2, BRF=0 */ + /*brw 417 => 19200*/ + /*br0 : 161,*/ + /*br1 : 1,*/ + /* brw 69 => 115200*/ + /*br0 : 69,*/ + // 1000000 + /*br0 : 8,*/ + /*br1 : 0,*/ mctl : UCBRF_0 | UCBRS_2 }; From 496d6cf858f57f26e7e36b0db805be18ef2a502c Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Thu, 21 Aug 2014 15:43:47 -0500 Subject: [PATCH 399/411] Wire Platform component in VUMCR --- tos/chips/cc1101/CC1101DriverLayerC.nc | 4 ++-- tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc | 12 ++++++++---- .../vumcr/hardware/usci/PlatformUsciMapC.nc | 2 ++ 3 files changed, 12 insertions(+), 6 deletions(-) mode change 100644 => 100755 tos/chips/cc1101/CC1101DriverLayerC.nc mode change 100644 => 100755 tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc mode change 100644 => 100755 tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc diff --git a/tos/chips/cc1101/CC1101DriverLayerC.nc b/tos/chips/cc1101/CC1101DriverLayerC.nc old mode 100644 new mode 100755 index 9561d6c5f7..a16f2dda35 --- a/tos/chips/cc1101/CC1101DriverLayerC.nc +++ b/tos/chips/cc1101/CC1101DriverLayerC.nc @@ -136,7 +136,7 @@ implementation DriverLayerP.PppIpv6 -> PppIpv6C; #endif - /*components LedsC as LedsC;*/ - components DebugLedsC as LedsC; + components LedsC as LedsC; + /*components DebugLedsC as LedsC;*/ DriverLayerP.Leds -> LedsC; } diff --git a/tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc b/tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc old mode 100644 new mode 100755 index 9d81ae8881..4fc02d815a --- a/tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc +++ b/tos/platforms/vumcr/hardware/usci/PlatformSerialP.nc @@ -50,13 +50,17 @@ msp430_usci_config_t msp430_usci_uart_exp430_config = { /* SLAU208 Table 34-4 8MHz 9600: UBR=833, BRS=2, BRF=0 */ /*brw 833 => 9600*/ - /*br0 : 68,*/ - /*br1 : 3,*/ + br0 : 68, + br1 : 3, /* SLAU208 Table 34-4 8MHz 9600: UBR=833, BRS=2, BRF=0 */ /* brw 69 => 115200*/ /*br0 : 69,*/ - br0 : 8, - br1 : 0, + /*br1 : 0,*/ + /* brw 35 => 230400*/ + /*br0 : 34,*/ + /*br1 : 0,*/ + /*br0 : 8,*/ + /*br1 : 0,*/ mctl : UCBRF_0 | UCBRS_2 }; diff --git a/tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc b/tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc old mode 100644 new mode 100755 index 82109d7b82..2c9effddb1 --- a/tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc +++ b/tos/platforms/vumcr/hardware/usci/PlatformUsciMapC.nc @@ -43,6 +43,7 @@ configuration PlatformUsciMapC { } implementation { components HplMsp430GeneralIOC as GIO; + components PlatformP; components Msp430UsciUartA1P as UartA1C; UartA1C.URXD -> GIO.UCA1RXD; @@ -66,4 +67,5 @@ configuration PlatformUsciMapC { components Msp430UsciI2CB1P as I2CB1C; I2CB1C.SDA -> GIO.UCB1SDA; I2CB1C.SCL -> GIO.UCB1SCL; + I2CB1C.Platform -> PlatformP; } From 66eae7a96501a6b14780524ec9f28350eee47e79 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Tue, 20 Jan 2015 12:51:09 -0600 Subject: [PATCH 400/411] Add radio enable pin to turn power on to radio --- tos/chips/cc1101/CC1101DriverLayerC.nc | 1 + tos/chips/cc1101/CC1101DriverLayerP.nc | 3 + tos/chips/cc1101/CC1101RadioC.nc | 5 +- .../exp430/chips/ccxx00/HplCC1101C.nc | 3 + tos/platforms/vumcr/.platform | 1 + .../vumcr/chips/ccxx00/HplCC1101C.nc | 96 +++++++++++++++++++ 6 files changed, 107 insertions(+), 2 deletions(-) create mode 100644 tos/platforms/vumcr/chips/ccxx00/HplCC1101C.nc diff --git a/tos/chips/cc1101/CC1101DriverLayerC.nc b/tos/chips/cc1101/CC1101DriverLayerC.nc index a16f2dda35..f79bab20d3 100755 --- a/tos/chips/cc1101/CC1101DriverLayerC.nc +++ b/tos/chips/cc1101/CC1101DriverLayerC.nc @@ -80,6 +80,7 @@ implementation DriverLayerP.CSN -> HplC.CSN; DriverLayerP.GDO0 -> HplC.GDO0; DriverLayerP.GDO2 -> HplC.GDO2; + DriverLayerP.RADIO_EN -> HplC.RADIO_EN; PacketTransmitPower = DriverLayerP.PacketTransmitPower; TransmitPowerFlag = DriverLayerP.TransmitPowerFlag; diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 0c0c204639..c7694794bd 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -58,6 +58,7 @@ module CC1101DriverLayerP interface GeneralIO as CSN; interface GeneralIO as GDO0; interface GeneralIO as GDO2; + interface GeneralIO as RADIO_EN; interface GpioCapture as Gdo0Capture; interface PacketFlag as TransmitPowerFlag; @@ -558,6 +559,8 @@ implementation } inline void resetRadio() { + call RADIO_EN.set(); + call BusyWait.wait(30); // Go through reset procedure call CSN.set(); call BusyWait.wait(30); diff --git a/tos/chips/cc1101/CC1101RadioC.nc b/tos/chips/cc1101/CC1101RadioC.nc index de48b3ca65..fe85877e97 100644 --- a/tos/chips/cc1101/CC1101RadioC.nc +++ b/tos/chips/cc1101/CC1101RadioC.nc @@ -214,12 +214,13 @@ implementation #ifdef SLOTTED_MAC components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC; #else - components new RandomCollisionLayerC() as CollisionAvoidanceLayerC; + /*components new RandomCollisionLayerC() as CollisionAvoidanceLayerC;*/ + components new DummyLayerC() as CollisionAvoidanceLayerC; #endif CollisionAvoidanceLayerC.Config -> RadioP; CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC; CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC; - CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; + /*CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];*/ // -------- SoftwareAcknowledgement diff --git a/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc b/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc index 4b3872edeb..85c0a795a8 100644 --- a/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc +++ b/tos/platforms/exp430/chips/ccxx00/HplCC1101C.nc @@ -30,6 +30,7 @@ configuration HplCC1101C { interface GeneralIO as CSN; interface GeneralIO as GDO0; interface GeneralIO as GDO2; + interface GeneralIO as RADIO_EN; interface GpioCapture as Gdo0Capture; /*interface GpioCapture as Gdo2Capture;*/ @@ -46,10 +47,12 @@ implementation { components new Msp430GpioC() as CSNM; components new Msp430GpioC() as GDO0M; components new Msp430GpioC() as GDO2M; + components DummyIoP as RADIO_ENM; CSNM -> IO.Port26; GDO0M -> IO.Port23; GDO2M -> IO.Port24; + RADIO_EN = RADIO_ENM; CSN = CSNM; GDO0 = GDO0M; diff --git a/tos/platforms/vumcr/.platform b/tos/platforms/vumcr/.platform index 84b25b74e7..90ae6db72b 100644 --- a/tos/platforms/vumcr/.platform +++ b/tos/platforms/vumcr/.platform @@ -8,6 +8,7 @@ push( @includes, qw( %P/hardware/leds %P/hardware/usci %P/hardware/clock + %P/chips/ccxx00 %T/platforms/exp430/ %T/platforms/exp430/hardware/adc %T/platforms/exp430/hardware/buttons diff --git a/tos/platforms/vumcr/chips/ccxx00/HplCC1101C.nc b/tos/platforms/vumcr/chips/ccxx00/HplCC1101C.nc new file mode 100644 index 0000000000..bfd0733601 --- /dev/null +++ b/tos/platforms/vumcr/chips/ccxx00/HplCC1101C.nc @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2013, Vanderbilt University + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT + * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + * + * Author: Janos Sallai + * Author: Addisu Z. Taddese (Port to CC1101) + */ + +configuration HplCC1101C { + provides { + interface Resource as SpiResource; + interface SpiByte; + interface SpiBlock; + interface GeneralIO as CSN; + interface GeneralIO as GDO0; + interface GeneralIO as GDO2; + interface GeneralIO as RADIO_EN; + interface GpioCapture as Gdo0Capture; + /*interface GpioCapture as Gdo2Capture;*/ + + interface LocalTime as LocalTimeRadio; + interface Init; + interface Alarm; + } +} +implementation { + + components HplMsp430GeneralIOC as IO, HplRadioSpiC as SpiC; + + // pins + components new Msp430GpioC() as CSNM; + components new Msp430GpioC() as GDO0M; + components new Msp430GpioC() as GDO2M; + components new Msp430GpioC() as RADIO_ENM; + +#ifdef OLD_BOARD + CSNM -> IO.Port26; +#else + CSNM -> IO.Port21; +#endif + GDO0M -> IO.Port23; + GDO2M -> IO.Port24; + RADIO_ENM -> IO.Port17; + + CSN = CSNM; + GDO0 = GDO0M; + GDO2 = GDO2M; + RADIO_EN = RADIO_ENM; + + // spi + SpiResource = SpiC.Resource; + SpiByte = SpiC; + SpiBlock = SpiC; + + // capture + /*components Msp430TimerC as TimerC;*/ + /*components new GpioCaptureC();*/ + /*GpioCaptureC.Msp430TimerControl -> TimerC.Control2_A0;*/ + /*GpioCaptureC.Msp430Capture -> TimerC.Capture2_A0;*/ + /*GpioCaptureC.GeneralIO -> IO.Port23;*/ + /*Gdo0Capture = GpioCaptureC;*/ + // SoftCapture is used instead since we don't have stringent timestamping requirements + // and because we are running out of timers (Timer2_A0 can now be used for TMilli) + components new SoftCaptureC(); + components new Msp430InterruptC(), HplMsp430InterruptC as IOIntC; + + Msp430InterruptC -> IOIntC.Port23; + SoftCaptureC.GpioInterrupt -> Msp430InterruptC; + Gdo0Capture = SoftCaptureC.GpioCapture; + + // alarm + components HplRadioAlarmC as AlarmC; + Alarm = AlarmC; + Init = AlarmC; + + // localTime + components LocalTime32khzC; + LocalTimeRadio = LocalTime32khzC.LocalTime; + +} From 509de2b2ecb9ecd661f02eda8b9291d6a35086c7 Mon Sep 17 00:00:00 2001 From: Hakan Tunc Date: Sun, 26 Apr 2015 21:26:12 -0500 Subject: [PATCH 401/411] Check extra path for jre on Darwin/MacOSX --- tools/tinyos/misc/tos-locate-jre | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/tinyos/misc/tos-locate-jre b/tools/tinyos/misc/tos-locate-jre index 8acb1b036a..43433904ac 100755 --- a/tools/tinyos/misc/tos-locate-jre +++ b/tools/tinyos/misc/tos-locate-jre @@ -71,6 +71,9 @@ case `uname` in ## extra subdir at the end, beceuase that's what the reset of scripts ## presume. This is a work-around and should be eliminated eventually. xcode_jdk=/Developer/SDKs/${pn}${pv}.sdk/System/Library/Frameworks/JavaVM.framework/Versions/A/Headers + if ! [ -d "$xcode_jdk" ]; then + xcode_jdk=/System/Library/Frameworks/JavaVM.framework/Versions/A/Headers + fi jhome=/Library/Java/Home ;; From 8a52e8be8ebf53340566db9a1e977f876703af1d Mon Sep 17 00:00:00 2001 From: Hakan Tunc Date: Mon, 4 May 2015 11:14:46 -0500 Subject: [PATCH 402/411] Tidy ncc & nesdoc perl scripts with perltidy -i=2 --- tools/tinyos/ncc/ncc.in | 406 ++++++++++++++++++------------------- tools/tinyos/ncc/nesdoc.in | 186 ++++++++--------- 2 files changed, 297 insertions(+), 295 deletions(-) diff --git a/tools/tinyos/ncc/ncc.in b/tools/tinyos/ncc/ncc.in index 1233ae66c6..da4172274b 100644 --- a/tools/tinyos/ncc/ncc.in +++ b/tools/tinyos/ncc/ncc.in @@ -10,212 +10,215 @@ # 94704. Attention: Intel License Inquiry. # Configuration -$TOSDIR = $ENV{"TOSDIR"} if defined($ENV{"TOSDIR"}); -$nescc = "@nescc_prefix@/bin/nescc"; -$tossim = 0; -$is_tos_1 = 0; +$TOSDIR = $ENV{"TOSDIR"} if defined( $ENV{"TOSDIR"} ); +$nescc = "@nescc_prefix@/bin/nescc"; +$tossim = 0; +$is_tos_1 = 0; $with_scheduler_flag = 1; # Support platform directory renaming for 2.x -if (-d "$TOSDIR/platform") { - $platform = "platform"; - $is_tos_1 = 1; +if ( -d "$TOSDIR/platform" ) { + $platform = "platform"; + $is_tos_1 = 1; } else { - $platform = "platforms"; + $platform = "platforms"; } -my $exeflag=0; -my $libs = ""; +my $exeflag = 0; +my $libs = ""; # Have fun with the arguments -for ($i = 0; $i <= $#ARGV; $i++) { - $strip = 0; - $_ = $ARGV[$i]; - if (/^-/) { - if (/^-target=(.*)/) { - &fail("multiple targets specified") if defined($target); - $target = $1; - $strip = 1; - } - elsif (/^-tosdir=(.*)/) { - $TOSDIR = $1; - $strip = 1; - } - elsif (/^-tosscheduler=(.*)/) { - $scheduler = $1; - $strip = 1; - } - elsif (/^-nostdinc$/) { - $nostdinc = 1; - } - elsif (/^-board=(.*)/) { - push @boards, $1; - $strip = 1; - } - elsif (/^-print-tosdir$/) { - $print_tosdir = 1; - $strip = 1; - } - elsif (/^-print-target$/) { - $print_target = 1; - $strip = 1; - } - elsif (/^-print-platforms$/) { - $print_platforms = 1; - $strip = 1; - } - elsif (/^-g$/) { - $debugging = 1; - } - elsif (/^-v$/) { - $verbose = 1; - } - elsif (/^-tossim$/) { - $tossim = 1; - $strip = 1; - } - elsif (/^-I/) { - ($i, $file) = &extractarg($i); - $strip = 1; - push @includes, $file; - } - elsif (/^-fnesc-cfile=(.*)/){ - $appfilename=$1; - } - elsif (/^-o$/){ - $exeflag=1; - } - elsif (/^-l/) { - $libs = $libs . " " . $_; - } - elsif (/^--version$/) { - $print_version = 1; - } - } elsif ($exeflag) { - $exefilename =$_; - $exeflag=0; +for ( $i = 0 ; $i <= $#ARGV ; $i++ ) { + $strip = 0; + $_ = $ARGV[$i]; + if (/^-/) { + if (/^-target=(.*)/) { + &fail("multiple targets specified") if defined($target); + $target = $1; + $strip = 1; + } + elsif (/^-tosdir=(.*)/) { + $TOSDIR = $1; + $strip = 1; + } + elsif (/^-tosscheduler=(.*)/) { + $scheduler = $1; + $strip = 1; + } + elsif (/^-nostdinc$/) { + $nostdinc = 1; + } + elsif (/^-board=(.*)/) { + push @boards, $1; + $strip = 1; + } + elsif (/^-print-tosdir$/) { + $print_tosdir = 1; + $strip = 1; + } + elsif (/^-print-target$/) { + $print_target = 1; + $strip = 1; + } + elsif (/^-print-platforms$/) { + $print_platforms = 1; + $strip = 1; + } + elsif (/^-g$/) { + $debugging = 1; + } + elsif (/^-v$/) { + $verbose = 1; + } + elsif (/^-tossim$/) { + $tossim = 1; + $strip = 1; + } + elsif (/^-I/) { + ( $i, $file ) = &extractarg($i); + $strip = 1; + push @includes, $file; + } + elsif (/^-fnesc-cfile=(.*)/) { + $appfilename = $1; } + elsif (/^-o$/) { + $exeflag = 1; + } + elsif (/^-l/) { + $libs = $libs . " " . $_; + } + elsif (/^--version$/) { + $print_version = 1; + } + } + elsif ($exeflag) { + $exefilename = $_; + $exeflag = 0; + } - push @new_args, $_ if !$strip; + push @new_args, $_ if !$strip; } if ($print_version) { - print "ncc: @PACKAGE_VERSION@\n"; + print "ncc: @PACKAGE_VERSION@\n"; } # Remove trailing / from TOSDIR, if any (it confuses the topdir stuff) chop $TOSDIR if $TOSDIR =~ m!./$!; -if ($print_tosdir) -{ - print $TOSDIR, "\n"; - exit 0; +if ($print_tosdir) { + print $TOSDIR, "\n"; + exit 0; } -if ($print_platforms) -{ - print join(" ", all_platforms()), "\n"; - exit 0; +if ($print_platforms) { + print join( " ", all_platforms() ), "\n"; + exit 0; } if ($tossim) { push @new_args, "-DTOSSIM"; } -if (!defined $target) { - if (open DEFTARGET, "$TOSDIR/.default-platform") { - $target = ; - chomp $target; - } - else { - $target = "@default_target@"; - } +if ( !defined $target ) { + if ( open DEFTARGET, "$TOSDIR/.default-platform" ) { + $target = ; + chomp $target; + } + else { + $target = "@default_target@"; + } } -if (!defined $scheduler && !$is_tos_1) { - $scheduler = "TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask"; +if ( !defined $scheduler && !$is_tos_1 ) { + $scheduler = +"TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask"; } if ($print_target) { - print $target, "\n"; - exit 0; + print $target, "\n"; + exit 0; } # First see if the directory for this platform was explicitly specified foreach $dir (@includes) { - if ($dir =~ m!/$target/?$! && -f "$dir/.platform") { - $platform_def = "$dir/.platform"; - last; - } + if ( $dir =~ m!/$target/?$! && -f "$dir/.platform" ) { + $platform_def = "$dir/.platform"; + last; + } } -if (!-f $platform_def) { - # Next, check if it's a "plain" platform - if (-f "$TOSDIR/$platform/$target/.platform") { - $platform_def = "$TOSDIR/$platform/$target/.platform"; - } - else { - # Finally, see if it's in a platform family - opendir PLATFORMS, "$TOSDIR/$platform"; - foreach $dir (readdir PLATFORMS) { - if (-f "$TOSDIR/$platform/$dir/.family") { - if (-f "$TOSDIR/$platform/$dir/$target/.platform") { - $platform_def = "$TOSDIR/$platform/$dir/$target/.platform"; - $family_def = "$TOSDIR/$platform/$dir/.family"; - last; - } - } - } - closedir PLATFORMS; +if ( !-f $platform_def ) { + + # Next, check if it's a "plain" platform + if ( -f "$TOSDIR/$platform/$target/.platform" ) { + $platform_def = "$TOSDIR/$platform/$target/.platform"; + } + else { + # Finally, see if it's in a platform family + opendir PLATFORMS, "$TOSDIR/$platform"; + foreach $dir ( readdir PLATFORMS ) { + if ( -f "$TOSDIR/$platform/$dir/.family" ) { + if ( -f "$TOSDIR/$platform/$dir/$target/.platform" ) { + $platform_def = "$TOSDIR/$platform/$dir/$target/.platform"; + $family_def = "$TOSDIR/$platform/$dir/.family"; + last; + } + } } + closedir PLATFORMS; + } } # Use sim directory with tossim $platform_def =~ s!\.platform$!sim/.platform! if $tossim; $family_def =~ s!\.family$!sim/.family! if $tossim && $family_def; -if (!-f $platform_def) { - print STDERR "Unknown target $target\n"; - print STDERR "Known targets for TinyOS directory $TOSDIR\n"; - print STDERR "and the specified include directories are:\n"; +if ( !-f $platform_def ) { + print STDERR "Unknown target $target\n"; + print STDERR "Known targets for TinyOS directory $TOSDIR\n"; + print STDERR "and the specified include directories are:\n"; - @platforms = all_platforms(); - if (@platforms) { - print STDERR " ", join(" ", @platforms); - } - else { - print STDERR "none."; - } - print STDERR "\n"; - exit 2; + @platforms = all_platforms(); + if (@platforms) { + print STDERR " ", join( " ", @platforms ); + } + else { + print STDERR "none."; + } + print STDERR "\n"; + exit 2; } # Setup sensor boards push @includes, map "%T/sensorboards/$_", @boards unless $nostdinc; unshift @new_args, map "-DBOARD_\U$_", @boards; + # Execute .sensor file in selected sensor board directories if it exists $i = 0; -BOARD: while ($i <= $#boards) { - $board = $boards[$i]; - - # First check include path for a .sensor file for this board - foreach $dir (@includes) { - if ($dir =~ m!/$board/?$! && -f "$dir/.sensor") { - # Remove from @boards so that we don't add sensorboards/$board - # to the search path - splice @boards, $i, 1; - do "$dir/.sensor"; - next BOARD; - } +BOARD: while ( $i <= $#boards ) { + $board = $boards[$i]; + + # First check include path for a .sensor file for this board + foreach $dir (@includes) { + if ( $dir =~ m!/$board/?$! && -f "$dir/.sensor" ) { + + # Remove from @boards so that we don't add sensorboards/$board + # to the search path + splice @boards, $i, 1; + do "$dir/.sensor"; + next BOARD; } + } - # If none found, check the standard sensorboards directory - $bspec = &idir_subst("%T/sensorboards/$board/.sensor"); - do $bspec if -f $bspec; + # If none found, check the standard sensorboards directory + $bspec = &idir_subst("%T/sensorboards/$board/.sensor"); + do $bspec if -f $bspec; - $i++; + $i++; } # Setup platform @@ -227,25 +230,24 @@ do $family_def if -f $family_def; unshift @new_args, "-DPLATFORM_\U$target"; push @new_args, @opts; -if(!$is_tos_1) { +if ( !$is_tos_1 ) { unshift @new_args, "-fnesc-scheduler=$scheduler"; } # old nesdoc: set the default topdir based on TOSDIR -my ($tosparent) = ($TOSDIR =~ m!^(.*)/.*?$!); +my ($tosparent) = ( $TOSDIR =~ m!^(.*)/.*?$! ); unshift @new_args, "-topdir=$tosparent"; unshift @new_args, "-fnesc-include=tos"; unshift @new_args, "$nescc"; -if (!$nostdinc) { - push @includes, map "%T/$platform/$_", @commonplatforms; - push @includes, "%T/interfaces"; - push @includes, "%T/types"; - push @includes, "%T/system"; +if ( !$nostdinc ) { + push @includes, map "%T/$platform/$_", @commonplatforms; + push @includes, "%T/interfaces"; + push @includes, "%T/types"; + push @includes, "%T/system"; } - if ($tossim) { foreach $idir (@includes) { $idir = &idir_subst($idir); @@ -255,79 +257,77 @@ if ($tossim) { push @new_args, $tossim_dir; } foreach $idir (@includes) { - $idir = &idir_subst($idir); - push @new_args, "-I$idir"; + $idir = &idir_subst($idir); + push @new_args, "-I$idir"; } - - - -print STDERR join(' ', @new_args), "\n" if $verbose; +print STDERR join( ' ', @new_args ), "\n" if $verbose; exec @new_args; print STDERR "Couldn't execute nescc\n"; exit 2; sub extractarg { - local ($i) = @_; + local ($i) = @_; - if (length($ARGV[$i]) == 2) { - $arg = $ARGV[++$i]; - } - else { - $arg = substr($ARGV[$i], 2); - } - return ($i, $arg); + if ( length( $ARGV[$i] ) == 2 ) { + $arg = $ARGV[ ++$i ]; + } + else { + $arg = substr( $ARGV[$i], 2 ); + } + return ( $i, $arg ); } sub idir_subst { - local ($idir) = @_; - local $idx = 0; - - while (($idx = index $idir, "%", $idx) >= 0) { - $char = substr $idir, $idx + 1, 1; - $rep = 0; - $rep = "%" if $char eq "%"; - $rep = $TOSDIR if $char eq "T"; - $rep = $target if $char eq "p"; - $rep = $platform_dir if $char eq "P"; - &fail("unknown include-path substitution %" . $char) if !$rep; - substr($idir, $idx, 2) = $rep; - $idx += length $rep; - } - return $idir; + local ($idir) = @_; + local $idx = 0; + + while ( ( $idx = index $idir, "%", $idx ) >= 0 ) { + $char = substr $idir, $idx + 1, 1; + $rep = 0; + $rep = "%" if $char eq "%"; + $rep = $TOSDIR if $char eq "T"; + $rep = $target if $char eq "p"; + $rep = $platform_dir if $char eq "P"; + &fail( "unknown include-path substitution %" . $char ) if !$rep; + substr( $idir, $idx, 2 ) = $rep; + $idx += length $rep; + } + return $idir; } sub fail { - print STDERR "$_[0]\n"; - exit 2; + print STDERR "$_[0]\n"; + exit 2; } sub push_platform { - my ($p) = @_; + my ($p) = @_; - push @platforms, $p unless grep $_ eq $p, @platforms; + push @platforms, $p unless grep $_ eq $p, @platforms; } sub all_platforms() { - local(@platforms); + local (@platforms); foreach $dir (@includes) { push_platform($1) if -f "$dir/.platform" && $dir =~ m!/([^/]*)/?$!; } - if (opendir PLATFORMS, "$TOSDIR/$platform") { - foreach $d (readdir PLATFORMS) { - push_platform($d) if (-f "$TOSDIR/$platform/$d/.platform"); - if (-f "$TOSDIR/$platform/$d/.family") { - if (opendir SUBPLATFORMS, "$TOSDIR/$platform/$d") { - foreach $subdir (readdir SUBPLATFORMS) { - push_platform($subdir) if (-f "$TOSDIR/$platform/$d/$subdir/.platform"); - } - } - closedir SUBPLATFORMS; - } + if ( opendir PLATFORMS, "$TOSDIR/$platform" ) { + foreach $d ( readdir PLATFORMS ) { + push_platform($d) if ( -f "$TOSDIR/$platform/$d/.platform" ); + if ( -f "$TOSDIR/$platform/$d/.family" ) { + if ( opendir SUBPLATFORMS, "$TOSDIR/$platform/$d" ) { + foreach $subdir ( readdir SUBPLATFORMS ) { + push_platform($subdir) + if ( -f "$TOSDIR/$platform/$d/$subdir/.platform" ); + } + } + closedir SUBPLATFORMS; } - closedir PLATFORMS; + } + closedir PLATFORMS; } return @platforms; diff --git a/tools/tinyos/ncc/nesdoc.in b/tools/tinyos/ncc/nesdoc.in index 8c76fbc4a4..75195ab486 100644 --- a/tools/tinyos/ncc/nesdoc.in +++ b/tools/tinyos/ncc/nesdoc.in @@ -4,9 +4,9 @@ # Copyright (c) 2002-2005 Intel Corporation # All rights reserved. # -# This file is distributed under the terms in the attached INTEL-LICENSE +# This file is distributed under the terms in the attached INTEL-LICENSE # file. If you do not find these files, copies can be found by writing to -# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, +# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, # 94704. Attention: Intel License Inquiry. # The new nesdoc implementation. When run with a TinyOS 1.x setup, just runs @@ -15,7 +15,7 @@ # The new nesdoc implementation is based on the XML dump facilities in nesC # 1.2 (version 1.2.1 of the nesC compiler is required). Documenation # generation is broken into two phases: -# - nesdoc data collection: nesdoc information for all interfaces and +# - nesdoc data collection: nesdoc information for all interfaces and # components is saved to a nesdoc repository, which is just a collection # of XML files. See archive.py for more details. # - HTML generation from the XML files: once a repository is complete, @@ -32,100 +32,100 @@ # - information on module implementations is not included (it should not # be part of an API documentation) - -$prefix = "@prefix@"; +$prefix = "@prefix@"; $exec_prefix = "@exec_prefix@"; -$libprogs = "@libdir@/tinyos"; -$python = "@pathpython@"; +$libprogs = "@libdir@/tinyos"; +$python = "@pathpython@"; $tosdir = `ncc -print-tosdir`; chomp($tosdir); # If using a TinyOS 1.x tree, assume old-style nesdoc except if there is a # -new argument somewhere. -if (-d "$tosdir/platform" && !grep /^-new$/, @ARGV) { - # nesdoc for TinyOS 1.x, support old style docs - if ($#ARGV < 1) { - &fail("Usage: nesdoc "); - } +if ( -d "$tosdir/platform" && !grep /^-new$/, @ARGV ) { - $docdir = shift @ARGV; + # nesdoc for TinyOS 1.x, support old style docs + if ( $#ARGV < 1 ) { + &fail("Usage: nesdoc "); + } - unshift @ARGV, "-docdir=$docdir"; - unshift @ARGV, "-fsyntax-only"; - unshift @ARGV, "$exec_prefix/bin/ncc"; + $docdir = shift @ARGV; - exec @ARGV; - fail("Couldn't execute $ARGV[0]"); + unshift @ARGV, "-docdir=$docdir"; + unshift @ARGV, "-fsyntax-only"; + unshift @ARGV, "$exec_prefix/bin/ncc"; + + exec @ARGV; + fail("Couldn't execute $ARGV[0]"); } -# nesdoc for TinyOS 2.x +# nesdoc for TinyOS 2.x # parse arguments $target = `ncc -print-target`; chomp $target; -for ($i = 0; $i <= $#ARGV; $i++) { - $strip = 0; - $_ = $ARGV[$i]; - if (/^-/) { - if (/^-topdir=(.*)/) { - push @archive_args, "--topdir=$1"; - $strip = 1; - } - elsif (/^--version$/) { - $print_version = 1; - $strip = 1; - } - elsif (/^-v$/) { - $verbose = 1; - } - elsif (/^-target=(.*)/) { - $target = $1; - } - elsif (/^-o/) { - ($i, $docdir) = extractarg($i); - $strip = 1; - } - elsif (/^-html$/) { - $genhtml = 1; - $strip = 1; - } - elsif (/^-preserve$/) { - $preserve = 1; - $strip = 1; - } - elsif (/^-app$/) { - $app = 1; - $strip = 1; - } - elsif (/^-quiet$/) { - $quiet = 1; - $strip = 1; - } +for ( $i = 0 ; $i <= $#ARGV ; $i++ ) { + $strip = 0; + $_ = $ARGV[$i]; + if (/^-/) { + if (/^-topdir=(.*)/) { + push @archive_args, "--topdir=$1"; + $strip = 1; + } + elsif (/^--version$/) { + $print_version = 1; + $strip = 1; + } + elsif (/^-v$/) { + $verbose = 1; + } + elsif (/^-target=(.*)/) { + $target = $1; + } + elsif (/^-o/) { + ( $i, $docdir ) = extractarg($i); + $strip = 1; + } + elsif (/^-html$/) { + $genhtml = 1; + $strip = 1; } - push @ncc_args, $_ if !$strip; + elsif (/^-preserve$/) { + $preserve = 1; + $strip = 1; + } + elsif (/^-app$/) { + $app = 1; + $strip = 1; + } + elsif (/^-quiet$/) { + $quiet = 1; + $strip = 1; + } + } + push @ncc_args, $_ if !$strip; } if ($print_version) { - print "nesdoc: @PACKAGE_VERSION@\n"; - exit 0; + print "nesdoc: @PACKAGE_VERSION@\n"; + exit 0; } fail("No documentation directory specified") if !defined $docdir; $docdir = "$docdir/$target"; -if (defined $ENV{PYTHONPATH}) { - $ENV{PYTHONPATH} = "$libprogs:$PYTHONPATH"; +if ( defined $ENV{PYTHONPATH} ) { + $ENV{PYTHONPATH} = "$libprogs:$PYTHONPATH"; } else { - $ENV{PYTHONPATH} = "$libprogs"; + $ENV{PYTHONPATH} = "$libprogs"; } if ($genhtml) { - push @html_args, $python; - push @html_args, "$libprogs/nesdoc/genhtml.py"; - push @html_args, "--quiet" if $quiet; - push @html_args, $docdir; - execorfail(@html_args); + push @html_args, $python; + push @html_args, "$libprogs/nesdoc/genhtml.py"; + push @html_args, "--quiet" if $quiet; + push @html_args, $docdir; + execorfail(@html_args); } # Collecting nesdoc data. Run ncc, then process the results with @@ -140,18 +140,19 @@ unshift @ncc_args, "-fnesc-dump=functions(!global())"; unshift @ncc_args, "-fnesc-dump=referenced(interfaces,components,functions)"; unshift @ncc_args, "$exec_prefix/bin/ncc"; -print STDERR join(' ', @ncc_args), "\n" if $verbose; +print STDERR join( ' ', @ncc_args ), "\n" if $verbose; pipe FORARCHIVE, FORNCC; -if (!($pid = fork())) { - close STDOUT; - open STDOUT, ">&FORNCC"; - execorfail(@ncc_args); +if ( !( $pid = fork() ) ) { + close STDOUT; + open STDOUT, ">&FORNCC"; + execorfail(@ncc_args); } fail("fork failed") if $pid < 0; close STDIN; open STDIN, "<&FORARCHIVE"; + # Top of TinyOS tree is a default "topdir" (for package emulation) $toscontainer = `dirname $tosdir`; chomp $toscontainer; @@ -163,46 +164,47 @@ push @archive_args, "$docdir"; unshift @archive_args, "$libprogs/nesdoc/archive.py"; unshift @archive_args, $python; -print STDERR join(' ', @archive_args), "\n" if $verbose; +print STDERR join( ' ', @archive_args ), "\n" if $verbose; fail("Couldn't create directory $docdir") if system("mkdir -p \"$docdir\""); execorfail(@archive_args); sub fail { - print STDERR "$_[0]\n"; - exit 2; + print STDERR "$_[0]\n"; + exit 2; } sub execorfail { - exec @_; - fail("Couldn't execute $_[0]"); + exec @_; + fail("Couldn't execute $_[0]"); } sub usage { - fail(< Compile specified files and archive the resulting nesdoc - information in + information in Note: This does not generate the nesdoc html pages. nesdoc -o -html - Generate nesdoc html pages from archived nesdoc information. + Generate nesdoc html pages from archived nesdoc information. nesdoc -o -app Compile specified nesC application and generate a wiring graph - for the whole program in the current directory. + for the whole program in the current directory. EOM -) + ); } sub extractarg { - local ($i) = @_; - - if (length($ARGV[$i]) == 2) { - $arg = $ARGV[++$i]; - } - else { - $arg = substr($ARGV[$i], 2); - } - return ($i, $arg); + local ($i) = @_; + + if ( length( $ARGV[$i] ) == 2 ) { + $arg = $ARGV[ ++$i ]; + } + else { + $arg = substr( $ARGV[$i], 2 ); + } + return ( $i, $arg ); } From 6e7a65c817de2c4b851d5e09731ee5afba433dcc Mon Sep 17 00:00:00 2001 From: Hakan Tunc Date: Tue, 5 May 2015 13:39:21 -0500 Subject: [PATCH 403/411] Fix a bug ref: http://techscrapbox.blogspot.com/2014/05/how-to-generate-source-code.html Add a make && install && clean script --- tools/configure.ac | 2 +- tools/make_install_clean.sh | 5 +++++ tools/tinyos/ncc/nesdoc-py/archive.py | 10 ++++++---- tools/tinyos/ncc/nesdoc-py/html.py | 2 +- 4 files changed, 13 insertions(+), 6 deletions(-) create mode 100644 tools/make_install_clean.sh diff --git a/tools/configure.ac b/tools/configure.ac index 43b08079ef..ccc5ea7b30 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -12,7 +12,7 @@ dnl -*- m4 -*- # force autoconf 2.5 on Debian systems AC_PREREQ(2.50) -AC_INIT(tinyos-tools, 1.4.2) +AC_INIT(tinyos-tools, 1.4.3) AC_CONFIG_AUX_DIR(config-aux) AM_INIT_AUTOMAKE AC_CANONICAL_HOST diff --git a/tools/make_install_clean.sh b/tools/make_install_clean.sh new file mode 100644 index 0000000000..0fb102abc2 --- /dev/null +++ b/tools/make_install_clean.sh @@ -0,0 +1,5 @@ +#!/bin/bash +# !Warning! Do not run when you have uncommmited changes. +# TODO: Check if there is an uncommited changes. +# Compile, install the tinyos tools and clean the files. +./Bootstrap && ./configure && make && sudo make install && git clean -df && git checkout -- . diff --git a/tools/tinyos/ncc/nesdoc-py/archive.py b/tools/tinyos/ncc/nesdoc-py/archive.py index 88fba77e2f..2e71b96efb 100644 --- a/tools/tinyos/ncc/nesdoc-py/archive.py +++ b/tools/tinyos/ncc/nesdoc-py/archive.py @@ -1,4 +1,5 @@ # -*- python -*- +# -*- coding: utf-8 -*- # Copyright (c) 2005 Intel Corporation # All rights reserved. # @@ -43,6 +44,7 @@ from nesdoc.graph import generate_graph from nesdoc.html import * import os +import codecs def check(x): if not x: @@ -241,8 +243,8 @@ def set_nicename(x): doc = creator.createDocument(None, None, None) copy = x.cloneNode(True) doc.appendChild(copy) - ifile = file(filename, "w") - doc.writexml(ifile) + ifile = file(filename, "wb") + doc.writexml(codecs.open(filename, 'wb', 'utf-8'), encoding='utf-8') doc.unlink() ifile.close() @@ -292,7 +294,7 @@ def addelem(wireref): refd.appendChild(qnameidx[qname].cloneNode(True)) doc.appendChild(copy) - ifile = file(filename, "w") - doc.writexml(ifile) + ifile = file(filename, "wb") + doc.writexml(codecs.open(filename, 'wb', 'utf-8'), encoding='utf-8') doc.unlink() ifile.close() diff --git a/tools/tinyos/ncc/nesdoc-py/html.py b/tools/tinyos/ncc/nesdoc-py/html.py index 343c4b1d81..547f14d637 100644 --- a/tools/tinyos/ncc/nesdoc-py/html.py +++ b/tools/tinyos/ncc/nesdoc-py/html.py @@ -48,7 +48,7 @@ def p(self, s): if self.at0: self.f.write(" " * self.ind) self.at0 = False - self.f.write(s) + self.f.write(s.encode('utf-8')) # print a string and end the line def pln(self, s): From 8aac0882825c9e87e41efb5fd5372cbb58873a46 Mon Sep 17 00:00:00 2001 From: Hakan Tunc Date: Wed, 6 May 2015 15:23:15 -0500 Subject: [PATCH 404/411] Add doc/nesdoc to .gitignore --- .gitignore | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.gitignore b/.gitignore index c1432bd30e..f1edb49a3c 100644 --- a/.gitignore +++ b/.gitignore @@ -8,3 +8,5 @@ build .gdb* TAGS tags + +doc/nesdoc From 7882e0a6c0ef2d4dba960785ecba38029bdb1aba Mon Sep 17 00:00:00 2001 From: Hakan Tunc Date: Wed, 6 May 2015 15:47:28 -0500 Subject: [PATCH 405/411] Do not run make install clean script if there are uncommited changes --- tools/make_install_clean.sh | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) mode change 100644 => 100755 tools/make_install_clean.sh diff --git a/tools/make_install_clean.sh b/tools/make_install_clean.sh old mode 100644 new mode 100755 index 0fb102abc2..e15f677e93 --- a/tools/make_install_clean.sh +++ b/tools/make_install_clean.sh @@ -1,5 +1,11 @@ #!/bin/bash # !Warning! Do not run when you have uncommmited changes. -# TODO: Check if there is an uncommited changes. +# https://github.com/robbyrussell/oh-my-zsh/blob/e55c715508a2f652fed741f2047c66dda2c6e5b0/lib/git.zsh # Compile, install the tinyos tools and clean the files. -./Bootstrap && ./configure && make && sudo make install && git clean -df && git checkout -- . + +if [[ $(git status -s) == "" ]] +then + ./Bootstrap && ./configure && make && sudo make install && git clean -df && git checkout -- . +else + echo "There are uncommited changes." +fi From 9cf5ab1d2d1b130e48e2eebb3a9aeb0e628582a0 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 27 Jul 2015 11:51:08 -0500 Subject: [PATCH 406/411] Strobe SRX if transition from IDLE to RX failed --- tos/chips/cc1101/CC1101DriverLayerP.nc | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index c7694794bd..2741ae6a7a 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -231,11 +231,12 @@ implementation inline cc1101_status_t getStatus(); inline cc1101_status_t enableReceiveGdo(); inline cc1101_status_t burstRead(uint8_t addr,uint8_t* data, uint8_t length); + inline cc1101_status_t strobe(uint8_t reg); /*----------------- ALARM -----------------*/ + cc1101_status_t radio_status; tasklet_async event void RadioAlarm.fired() { - cc1101_status_t status; if( state == STATE_IDLE_2_RX_ON ) { status = getStatus(); #ifdef RADIO_DEBUG_STATE @@ -265,6 +266,7 @@ implementation // in receive mode, enable GDO0 capture enableReceiveGdo(); } else { + strobe(CC1101_SRX); call RadioAlarm.wait(IDLE_2_RX_ON_TIME*RADIO_ALARM_MICROSEC); } } else if (state == STATE_RX_WAIT_END_PKT){ @@ -559,8 +561,12 @@ implementation } inline void resetRadio() { + // Turn Off radio if it's been on + call RADIO_EN.makeOutput(); + call RADIO_EN.clr(); + call BusyWait.wait(1000); call RADIO_EN.set(); - call BusyWait.wait(30); + call BusyWait.wait(1000); // Go through reset procedure call CSN.set(); call BusyWait.wait(30); @@ -706,6 +712,7 @@ implementation inline void changeState() { + cc1101_status_t status; #ifdef RADIO_DEBUG_STATE if( call DiagMsg.record() ) @@ -743,9 +750,14 @@ implementation // setChannel was ignored in SLEEP because the SPI was not working, so do it here /*setChannel();*/ + status = getStatus(); // Flush anything that might be in the RX/TX FIFO - strobe(CC1101_SFRX); - strobe(CC1101_SFTX); + if (status.state == CC1101_STATE_IDLE) { + strobe(CC1101_SFRX); + call BusyWait.wait(1000); + strobe(CC1101_SFTX); + call BusyWait.wait(1000); + } // start receiving strobe(CC1101_SRX); call RadioAlarm.wait(IDLE_2_RX_ON_TIME*RADIO_ALARM_MICROSEC); From 13c5fd0c51ede6a803d93e2079f287e788859642 Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 27 Jul 2015 11:52:18 -0500 Subject: [PATCH 407/411] Use -fkeep-inline-functions instead of -fnesc-no-inline for better debugging support --- support/make/msp/debug.extra | 3 ++- support/make/msp/debug_noopt.extra | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/support/make/msp/debug.extra b/support/make/msp/debug.extra index 014aa3ca67..ed1778ac58 100644 --- a/support/make/msp/debug.extra +++ b/support/make/msp/debug.extra @@ -1,4 +1,5 @@ #-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ -OPTFLAGS += -g -fnesc-no-inline +#OPTFLAGS += -g -fnesc-no-inline +OPTFLAGS += -g -fkeep-inline-functions diff --git a/support/make/msp/debug_noopt.extra b/support/make/msp/debug_noopt.extra index 71b3562f6b..ac032f3d7c 100644 --- a/support/make/msp/debug_noopt.extra +++ b/support/make/msp/debug_noopt.extra @@ -1,3 +1,4 @@ #-*-Makefile-*- vim:syntax=make -OPTFLAGS += -O0 -g -fnesc-no-inline +#OPTFLAGS += -O0 -g -fnesc-no-inline +OPTFLAGS += -O0 -g -fkeep-inline-functions From b9fd1d972d3cd932ebbf67be822b3b4908e99dbf Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 27 Jul 2015 12:12:38 -0500 Subject: [PATCH 408/411] Add define to remove diagmsg. Fix variable name --- tos/chips/cc1101/CC1101DriverLayerP.nc | 8 ++++---- tos/platforms/exp430/chips/ccxx00/RadioConfig.h | 5 +++++ 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/tos/chips/cc1101/CC1101DriverLayerP.nc b/tos/chips/cc1101/CC1101DriverLayerP.nc index 2741ae6a7a..c1f430f3ba 100644 --- a/tos/chips/cc1101/CC1101DriverLayerP.nc +++ b/tos/chips/cc1101/CC1101DriverLayerP.nc @@ -234,11 +234,11 @@ implementation inline cc1101_status_t strobe(uint8_t reg); /*----------------- ALARM -----------------*/ - cc1101_status_t radio_status; tasklet_async event void RadioAlarm.fired() { + cc1101_status_t radio_status; if( state == STATE_IDLE_2_RX_ON ) { - status = getStatus(); + radio_status = getStatus(); #ifdef RADIO_DEBUG_STATE if( call DiagMsg.record() ) { @@ -255,12 +255,12 @@ implementation if(call GDO0.get()) call DiagMsg.str("GDO0"); call DiagMsg.str("st="); - call DiagMsg.uint8(status.value); + call DiagMsg.uint8(radio_status.value); call DiagMsg.send(); } #endif - if (status.state == CC1101_STATE_RX){ + if (radio_status.state == CC1101_STATE_RX){ state = STATE_RX_ON; cmd = CMD_SIGNAL_DONE; // in receive mode, enable GDO0 capture diff --git a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h index 91084f080a..3c9c27b9c4 100644 --- a/tos/platforms/exp430/chips/ccxx00/RadioConfig.h +++ b/tos/platforms/exp430/chips/ccxx00/RadioConfig.h @@ -76,4 +76,9 @@ typedef uint16_t tradio_size; #define PACKET_LINK #endif +/** + * We don't need diagmsg to be compiled + */ +#define DIAGMSG_NONE + #endif From 1b96a3d1ec3a8b6cb8da3aa839c40ba1a6026a9a Mon Sep 17 00:00:00 2001 From: "Addisu Z. Taddese" Date: Mon, 27 Jul 2015 12:13:19 -0500 Subject: [PATCH 409/411] Override Msp430TimerC so that some timers can be treated as async (majority vote) --- .../exp430/hardware/timer/Msp430TimerC.nc | 364 ++++++++++++++++++ 1 file changed, 364 insertions(+) create mode 100644 tos/platforms/exp430/hardware/timer/Msp430TimerC.nc diff --git a/tos/platforms/exp430/hardware/timer/Msp430TimerC.nc b/tos/platforms/exp430/hardware/timer/Msp430TimerC.nc new file mode 100644 index 0000000000..9a394097ce --- /dev/null +++ b/tos/platforms/exp430/hardware/timer/Msp430TimerC.nc @@ -0,0 +1,364 @@ +/* + * Copyright (c) 2011 Eric B. Decker + * Copyright (c) 2009-2010 People Power Co. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * - Neither the name of the copyright holders nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * TinyOS Msp430 support started with the msp430f1611 which provided + * 1 TA3 (3 CCRs) and 1 TB7 (7 CCRs). The cc430 and 5438 cpus (both x5) + * provide a T0A5 and T1A3 but no TBs. Other chips in the MSP430XV2 + * series have different suites. Current TI headers indicate the + * following sets are available: + * + * T0A3, T0A5 + * T1A2 T1A3 T1A5 + * T2A3 + * T0B7 + * T0D3, T1D3 + * + * TA3 is also defined but not in any of the x5 cpu headers. This may + * become an issue when we start to support the x4 family. + * + * Timer_B extends Timer_A with some extra features that are not + * currently supported in TinyOS. Until those features are needed, + * Timer_B instances use the same interfaces as Timer_A instances. + * Ditto for Timer_D. + * + * @note As of this writing, only T0A5 and T1A3 have been tested. + * + * @author Peter A. Bigot + * @author Eric B. Decker + */ + +configuration Msp430TimerC { +#if defined(__MSP430_HAS_T0A3__) || defined(__MSP430_HAS_T0A5__) + provides interface Msp430Timer as Timer0_A; + + provides interface Msp430TimerControl as Control0_A0; + provides interface Msp430Compare as Compare0_A0; + provides interface Msp430Capture as Capture0_A0; + + provides interface Msp430TimerControl as Control0_A1; + provides interface Msp430Compare as Compare0_A1; + provides interface Msp430Capture as Capture0_A1; + + provides interface Msp430TimerControl as Control0_A2; + provides interface Msp430Compare as Compare0_A2; + provides interface Msp430Capture as Capture0_A2; + +#if defined(__MSP430_HAS_T0A5__) + provides interface Msp430TimerControl as Control0_A3; + provides interface Msp430Compare as Compare0_A3; + provides interface Msp430Capture as Capture0_A3; + + provides interface Msp430TimerControl as Control0_A4; + provides interface Msp430Compare as Compare0_A4; + provides interface Msp430Capture as Capture0_A4; +#endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0A3__ || __MSP430_HAS_T0A5__ */ + +#if defined(__MSP430_HAS_T0B7__) + provides interface Msp430Timer as Timer0_B; + + provides interface Msp430TimerControl as Control0_B0; + provides interface Msp430Compare as Compare0_B0; + provides interface Msp430Capture as Capture0_B0; + + provides interface Msp430TimerControl as Control0_B1; + provides interface Msp430Compare as Compare0_B1; + provides interface Msp430Capture as Capture0_B1; + + provides interface Msp430TimerControl as Control0_B2; + provides interface Msp430Compare as Compare0_B2; + provides interface Msp430Capture as Capture0_B2; + + provides interface Msp430TimerControl as Control0_B3; + provides interface Msp430Compare as Compare0_B3; + provides interface Msp430Capture as Capture0_B3; + + provides interface Msp430TimerControl as Control0_B4; + provides interface Msp430Compare as Compare0_B4; + provides interface Msp430Capture as Capture0_B4; + + provides interface Msp430TimerControl as Control0_B5; + provides interface Msp430Compare as Compare0_B5; + provides interface Msp430Capture as Capture0_B5; + + provides interface Msp430TimerControl as Control0_B6; + provides interface Msp430Compare as Compare0_B6; + provides interface Msp430Capture as Capture0_B6; +#endif /* __MSP430_HAS_T0B7__ */ + +#if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + provides interface Msp430Timer as Timer1_A; + + provides interface Msp430TimerControl as Control1_A0; + provides interface Msp430Compare as Compare1_A0; + provides interface Msp430Capture as Capture1_A0; + + provides interface Msp430TimerControl as Control1_A1; + provides interface Msp430Compare as Compare1_A1; + provides interface Msp430Capture as Capture1_A1; + +#if defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + provides interface Msp430TimerControl as Control1_A2; + provides interface Msp430Compare as Compare1_A2; + provides interface Msp430Capture as Capture1_A2; + +#if defined(__MSP430_HAS_T1A5__) + provides interface Msp430TimerControl as Control1_A3; + provides interface Msp430Compare as Compare1_A3; + provides interface Msp430Capture as Capture1_A3; + + provides interface Msp430TimerControl as Control1_A4; + provides interface Msp430Compare as Compare1_A4; + provides interface Msp430Capture as Capture1_A4; +#endif /* __MSP430_HAS_T1A5__ */ +#endif /* __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ +#endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + + +#if defined(__MSP430_HAS_T2A3__) + provides interface Msp430Timer as Timer2_A; + + provides interface Msp430TimerControl as Control2_A0; + provides interface Msp430Compare as Compare2_A0; + provides interface Msp430Capture as Capture2_A0; + + provides interface Msp430TimerControl as Control2_A1; + provides interface Msp430Compare as Compare2_A1; + provides interface Msp430Capture as Capture2_A1; + + provides interface Msp430TimerControl as Control2_A2; + provides interface Msp430Compare as Compare2_A2; + provides interface Msp430Capture as Capture2_A2; +#endif /* __MSP430_HAS_T2A3__ */ + +} +implementation { + components Msp430TimerCommonP as Common; + +#if defined(__MSP430_HAS_T0A3__) || defined(__MSP430_HAS_T0A5__) + components new Msp430TimerP( TA0IV_, TA0R_, TA0CTL_, TAIFG, TACLR, TAIE, + TASSEL0, TASSEL1, TRUE ) as Msp430Timer0_A; + + Timer0_A = Msp430Timer0_A.Timer; + Msp430Timer0_A.VectorTimerX0 -> Common.VectorTimer0_A0; + Msp430Timer0_A.VectorTimerX1 -> Common.VectorTimer0_A1; + Msp430Timer0_A.Overflow -> Msp430Timer0_A.Event[7]; + + components new Msp430TimerCapComP( TA0CCTL0_, TA0CCR0_ ) as Msp430Timer0_A0; + Control0_A0 = Msp430Timer0_A0.Control; + Compare0_A0 = Msp430Timer0_A0.Compare; + Capture0_A0 = Msp430Timer0_A0.Capture; + Msp430Timer0_A0.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A0.Event -> Msp430Timer0_A.Event[0]; + + components new Msp430TimerCapComP( TA0CCTL1_, TA0CCR1_ ) as Msp430Timer0_A1; + Control0_A1 = Msp430Timer0_A1.Control; + Compare0_A1 = Msp430Timer0_A1.Compare; + Capture0_A1 = Msp430Timer0_A1.Capture; + Msp430Timer0_A1.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A1.Event -> Msp430Timer0_A.Event[1]; + + components new Msp430TimerCapComP( TA0CCTL2_, TA0CCR2_ ) as Msp430Timer0_A2; + Control0_A2 = Msp430Timer0_A2.Control; + Compare0_A2 = Msp430Timer0_A2.Compare; + Capture0_A2 = Msp430Timer0_A2.Capture; + Msp430Timer0_A2.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A2.Event -> Msp430Timer0_A.Event[2]; + +#if defined(__MSP430_HAS_T0A5__) + components new Msp430TimerCapComP( TA0CCTL3_, TA0CCR3_ ) as Msp430Timer0_A3; + Control0_A3 = Msp430Timer0_A3.Control; + Compare0_A3 = Msp430Timer0_A3.Compare; + Capture0_A3 = Msp430Timer0_A3.Capture; + Msp430Timer0_A3.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A3.Event -> Msp430Timer0_A.Event[3]; + + components new Msp430TimerCapComP( TA0CCTL4_, TA0CCR4_ ) as Msp430Timer0_A4; + Control0_A4 = Msp430Timer0_A4.Control; + Compare0_A4 = Msp430Timer0_A4.Compare; + Capture0_A4 = Msp430Timer0_A4.Capture; + Msp430Timer0_A4.Timer -> Msp430Timer0_A.Timer; + Msp430Timer0_A4.Event -> Msp430Timer0_A.Event[4]; + +#endif /* __MSP430_HAS_T0A5__ */ +#endif /* __MSP430_HAS_T0A3__ || __MSP430_HAS_T0A5__ */ + + +#if defined(__MSP430_HAS_T0B7__) + components new Msp430TimerP( TB0IV_, TB0R_, TB0CTL_, TBIFG, TBCLR, TBIE, + TBSSEL0, TBSSEL1, TRUE ) as Msp430Timer0_B; + + Timer0_B = Msp430Timer0_B.Timer; + Msp430Timer0_B.VectorTimerX0 -> Common.VectorTimer0_B0; + Msp430Timer0_B.VectorTimerX1 -> Common.VectorTimer0_B1; + Msp430Timer0_B.Overflow -> Msp430Timer0_B.Event[7]; + + components new Msp430TimerCapComP( TB0CCTL0_, TB0CCR0_ ) as Msp430Timer0_B0; + Control0_B0 = Msp430Timer0_B0.Control; + Compare0_B0 = Msp430Timer0_B0.Compare; + Capture0_B0 = Msp430Timer0_B0.Capture; + Msp430Timer0_B0.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B0.Event -> Msp430Timer0_B.Event[0]; + + components new Msp430TimerCapComP( TB0CCTL1_, TB0CCR1_ ) as Msp430Timer0_B1; + Control0_B1 = Msp430Timer0_B1.Control; + Compare0_B1 = Msp430Timer0_B1.Compare; + Capture0_B1 = Msp430Timer0_B1.Capture; + Msp430Timer0_B1.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B1.Event -> Msp430Timer0_B.Event[1]; + + components new Msp430TimerCapComP( TB0CCTL2_, TB0CCR2_ ) as Msp430Timer0_B2; + Control0_B2 = Msp430Timer0_B2.Control; + Compare0_B2 = Msp430Timer0_B2.Compare; + Capture0_B2 = Msp430Timer0_B2.Capture; + Msp430Timer0_B2.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B2.Event -> Msp430Timer0_B.Event[2]; + + components new Msp430TimerCapComP( TB0CCTL3_, TB0CCR3_ ) as Msp430Timer0_B3; + Control0_B3 = Msp430Timer0_B3.Control; + Compare0_B3 = Msp430Timer0_B3.Compare; + Capture0_B3 = Msp430Timer0_B3.Capture; + Msp430Timer0_B3.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B3.Event -> Msp430Timer0_B.Event[3]; + + components new Msp430TimerCapComP( TB0CCTL4_, TB0CCR4_ ) as Msp430Timer0_B4; + Control0_B4 = Msp430Timer0_B4.Control; + Compare0_B4 = Msp430Timer0_B4.Compare; + Capture0_B4 = Msp430Timer0_B4.Capture; + Msp430Timer0_B4.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B4.Event -> Msp430Timer0_B.Event[4]; + + components new Msp430TimerCapComP( TB0CCTL5_, TB0CCR5_ ) as Msp430Timer0_B5; + Control0_B5 = Msp430Timer0_B5.Control; + Compare0_B5 = Msp430Timer0_B5.Compare; + Capture0_B5 = Msp430Timer0_B5.Capture; + Msp430Timer0_B5.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B5.Event -> Msp430Timer0_B.Event[5]; + + components new Msp430TimerCapComP( TB0CCTL6_, TB0CCR6_ ) as Msp430Timer0_B6; + Control0_B6 = Msp430Timer0_B6.Control; + Compare0_B6 = Msp430Timer0_B6.Compare; + Capture0_B6 = Msp430Timer0_B6.Capture; + Msp430Timer0_B6.Timer -> Msp430Timer0_B.Timer; + Msp430Timer0_B6.Event -> Msp430Timer0_B.Event[6]; + +#endif /* __MSP430_HAS_T0B7__ */ + + +#if defined(__MSP430_HAS_T1A2__) || defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + components new Msp430TimerP( TA1IV_, TA1R_, TA1CTL_, TAIFG, TACLR, TAIE, + TASSEL0, TASSEL1, FALSE ) as Msp430Timer1_A; + + Timer1_A = Msp430Timer1_A.Timer; + Msp430Timer1_A.VectorTimerX0 -> Common.VectorTimer1_A0; + Msp430Timer1_A.VectorTimerX1 -> Common.VectorTimer1_A1; + Msp430Timer1_A.Overflow -> Msp430Timer1_A.Event[7]; + + components new Msp430TimerCapComP( TA1CCTL0_, TA1CCR0_ ) as Msp430Timer1_A0; + Control1_A0 = Msp430Timer1_A0.Control; + Compare1_A0 = Msp430Timer1_A0.Compare; + Capture1_A0 = Msp430Timer1_A0.Capture; + Msp430Timer1_A0.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A0.Event -> Msp430Timer1_A.Event[0]; + + components new Msp430TimerCapComP( TA1CCTL1_, TA1CCR1_ ) as Msp430Timer1_A1; + Control1_A1 = Msp430Timer1_A1.Control; + Compare1_A1 = Msp430Timer1_A1.Compare; + Capture1_A1 = Msp430Timer1_A1.Capture; + Msp430Timer1_A1.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A1.Event -> Msp430Timer1_A.Event[1]; + +#if defined(__MSP430_HAS_T1A3__) || defined(__MSP430_HAS_T1A5__) + components new Msp430TimerCapComP( TA1CCTL2_, TA1CCR2_ ) as Msp430Timer1_A2; + Control1_A2 = Msp430Timer1_A2.Control; + Compare1_A2 = Msp430Timer1_A2.Compare; + Capture1_A2 = Msp430Timer1_A2.Capture; + Msp430Timer1_A2.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A2.Event -> Msp430Timer1_A.Event[2]; + +#if defined(__MSP430_HAS_T1A5__) + components new Msp430TimerCapComP( TA1CCTL3_, TA1CCR3_ ) as Msp430Timer1_A3; + Control1_A3 = Msp430Timer1_A3.Control; + Compare1_A3 = Msp430Timer1_A3.Compare; + Capture1_A3 = Msp430Timer1_A3.Capture; + Msp430Timer1_A3.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A3.Event -> Msp430Timer1_A.Event[3]; + + components new Msp430TimerCapComP( TA1CCTL4_, TA1CCR4_ ) as Msp430Timer1_A4; + Control1_A4 = Msp430Timer1_A4.Control; + Compare1_A4 = Msp430Timer1_A4.Compare; + Capture1_A4 = Msp430Timer1_A4.Capture; + Msp430Timer1_A4.Timer -> Msp430Timer1_A.Timer; + Msp430Timer1_A4.Event -> Msp430Timer1_A.Event[4]; + +#endif /* __MSP430_HAS_T1A5__ */ +#endif /* __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ +#endif /* __MSP430_HAS_T1A2__ || __MSP430_HAS_T1A3__ || __MSP430_HAS_T1A5__ */ + + +#if defined(__MSP430_HAS_T2A3__) + components new Msp430TimerP( TA2IV_, TA2R_, TA2CTL_, TAIFG, TACLR, TAIE, + TASSEL0, TASSEL1, TRUE ) as Msp430Timer2_A; + + Timer2_A = Msp430Timer2_A.Timer; + Msp430Timer2_A.VectorTimerX0 -> Common.VectorTimer2_A0; + Msp430Timer2_A.VectorTimerX1 -> Common.VectorTimer2_A1; + Msp430Timer2_A.Overflow -> Msp430Timer2_A.Event[7]; + + components new Msp430TimerCapComP( TA2CCTL0_, TA2CCR0_ ) as Msp430Timer2_A0; + Control2_A0 = Msp430Timer2_A0.Control; + Compare2_A0 = Msp430Timer2_A0.Compare; + Capture2_A0 = Msp430Timer2_A0.Capture; + Msp430Timer2_A0.Timer -> Msp430Timer2_A.Timer; + Msp430Timer2_A0.Event -> Msp430Timer2_A.Event[0]; + + components new Msp430TimerCapComP( TA2CCTL1_, TA2CCR1_ ) as Msp430Timer2_A1; + Control2_A1 = Msp430Timer2_A1.Control; + Compare2_A1 = Msp430Timer2_A1.Compare; + Capture2_A1 = Msp430Timer2_A1.Capture; + Msp430Timer2_A1.Timer -> Msp430Timer2_A.Timer; + Msp430Timer2_A1.Event -> Msp430Timer2_A.Event[1]; + + components new Msp430TimerCapComP( TA2CCTL2_, TA2CCR2_ ) as Msp430Timer2_A2; + Control2_A2 = Msp430Timer2_A2.Control; + Compare2_A2 = Msp430Timer2_A2.Compare; + Capture2_A2 = Msp430Timer2_A2.Capture; + Msp430Timer2_A2.Timer -> Msp430Timer2_A.Timer; + Msp430Timer2_A2.Event -> Msp430Timer2_A.Event[2]; + +#endif /* __MSP430_HAS_T2A3__ */ +} + From 6c0ae928d94883e525358fdb6b9bfc72b03372c9 Mon Sep 17 00:00:00 2001 From: Hakan Tunc Date: Wed, 2 Sep 2015 18:41:13 -0500 Subject: [PATCH 410/411] Add python application for testing serial port communication --- apps/tests/TestSerial/Makefile | 3 ++ .../TestSerial/{README.txt => README.md} | 14 ++++-- apps/tests/TestSerial/TestSerial.py | 46 +++++++++++++++++++ 3 files changed, 59 insertions(+), 4 deletions(-) rename apps/tests/TestSerial/{README.txt => README.md} (79%) create mode 100644 apps/tests/TestSerial/TestSerial.py diff --git a/apps/tests/TestSerial/Makefile b/apps/tests/TestSerial/Makefile index daf594a994..4beb46c170 100644 --- a/apps/tests/TestSerial/Makefile +++ b/apps/tests/TestSerial/Makefile @@ -10,6 +10,9 @@ TestSerial.class: $(wildcard *.java) TestSerialMsg.java TestSerialMsg.java: mig java -target=null $(CFLAGS) -java-classname=TestSerialMsg TestSerial.h test_serial_msg -o $@ +BUILD_EXTRA_DEPS += TestSerialMsg.py +TestSerialMsg.py: TestSerial.h + mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=TestSerialMsg TestSerial.h test_serial_msg -o $@ include $(MAKERULES) diff --git a/apps/tests/TestSerial/README.txt b/apps/tests/TestSerial/README.md similarity index 79% rename from apps/tests/TestSerial/README.txt rename to apps/tests/TestSerial/README.md index 1a8e56d566..49e86db7d1 100644 --- a/apps/tests/TestSerial/README.txt +++ b/apps/tests/TestSerial/README.md @@ -1,7 +1,7 @@ -README for TestSerial +##### README for TestSerial Author/Contact: tinyos-help@millennium.berkeley.edu -Description: +##### Description: TestSerial is a simple application that may be used to test that the TinyOS java toolchain can communicate with a mote over the serial @@ -13,13 +13,19 @@ operates over the serial port.) Likewise, the mote also sends packets to the serial port at 1Hz. Upon reception of a packet, the java application prints the counter's value to standard out. -Java Application Usage: +##### Java Application Usage: java TestSerial [-comm ] If not specified, the defaults to sf@localhost:9002 or to your MOTECOM environment variable (if defined). -Python Usage: +##### Python Application Usage + +```` +PYTHONPATH=$PYTHONPATH:$TOSROOT/support/sdk/python python TestSerial.py serial@/dev/ttyACM0:9600 +```` + +##### Python Usage: tos-dump /dev/ttyUSB0 57600 Tools: diff --git a/apps/tests/TestSerial/TestSerial.py b/apps/tests/TestSerial/TestSerial.py new file mode 100644 index 0000000000..d5106e1aea --- /dev/null +++ b/apps/tests/TestSerial/TestSerial.py @@ -0,0 +1,46 @@ +# http://wiesel.ece.utah.edu/redmine/projects/hacks/wiki/How_to_use_Python_and_MIG_to_interact_with_a_TinyOS_application +""" + Python application for testing serial port communication. +""" +import sys +import time + +import TestSerialMsg +from tinyos.message import * +from tinyos.message.Message import * +from tinyos.message.SerialPacket import * +from tinyos.packet.Serial import Serial + +class TestSerial: + def __init__(self, motestring): + self.mif = MoteIF.MoteIF() + self.tos_source = self.mif.addSource(motestring) + self.mif.addListener(self, TestSerialMsg.TestSerialMsg) + + def receive(self, src, msg): + if msg.get_amType() == TestSerialMsg.AM_TYPE: + m = TestSerialMsg.TestSerialMsg(msg.dataGet()) + print 'Received packet #:', m.get_counter(), '\n' + + def send(self): + counter = 0 + payload = TestSerialMsg.TestSerialMsg() + while True: + time.sleep(1) + print 'Sending packet #:', counter + payload.set_counter(counter) + self.mif.sendMsg(self.tos_source, 0xFFFF, payload.get_amType(), 0, payload) + counter += 1 + +def main(): + if '-h' in sys.argv or len(sys.argv) < 2: + print 'Usage: ...' + sys.exit() + dl = TestSerial(sys.argv[1]) + dl.send() + +if __name__ == '__main__': + try: + main() + except KeyboardInterrupt: + pass From 7d544f17129132d7151b28cc62f50a5543f30f71 Mon Sep 17 00:00:00 2001 From: Hakan Tunc Date: Mon, 1 Feb 2016 13:50:35 -0600 Subject: [PATCH 411/411] Add missing include statement Fix a bug, remove some wiring, may need to be fixed --- tos/chips/msp430/adc12/AdcP.nc | 2 ++ tos/chips/msp430/adc12/AdcStreamP.nc | 1 + tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc | 10 +++++----- 3 files changed, 8 insertions(+), 5 deletions(-) diff --git a/tos/chips/msp430/adc12/AdcP.nc b/tos/chips/msp430/adc12/AdcP.nc index 0a1c11665e..9f3ee3ef03 100644 --- a/tos/chips/msp430/adc12/AdcP.nc +++ b/tos/chips/msp430/adc12/AdcP.nc @@ -33,6 +33,8 @@ * ======================================================================== */ +#include "Msp430Adc12.h" + module AdcP @safe() { provides { interface Read as Read[uint8_t client]; diff --git a/tos/chips/msp430/adc12/AdcStreamP.nc b/tos/chips/msp430/adc12/AdcStreamP.nc index f7a11b4d6b..013d14561f 100644 --- a/tos/chips/msp430/adc12/AdcStreamP.nc +++ b/tos/chips/msp430/adc12/AdcStreamP.nc @@ -42,6 +42,7 @@ * @author Jan Hauer */ #include "Timer.h" +#include "Msp430Adc12.h" module AdcStreamP @safe() { provides { diff --git a/tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc b/tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc index 62474e5443..1eb6f42e3d 100644 --- a/tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc +++ b/tos/platforms/exp430/hardware/timer/AlarmAdc16C.nc @@ -32,22 +32,22 @@ * Author: Addisu Taddese */ -generic configuration AlarmAdcTMilli16C() +generic configuration AlarmAdc16C() { provides interface Init; provides interface Alarm; } implementation { - components new Msp430TimerAdcC() as Msp430Timer; + components Msp430TimerC as Msp430Timer; components new Msp430AlarmC(TMilli) as Msp430Alarm; Init = Msp430Alarm; Alarm = Msp430Alarm; - Msp430Alarm.Msp430Timer -> Msp430Timer; - Msp430Alarm.Msp430TimerControl -> Msp430Timer; - Msp430Alarm.Msp430Compare -> Msp430Timer; + // Msp430Alarm.Msp430Timer -> Msp430Timer; + // Msp430Alarm.Msp430TimerControl -> Msp430Timer; + // Msp430Alarm.Msp430Compare -> Msp430Timer; }

Resource Configure< interface. In this way, different instances of the Msp430Usart0C can each have different configurations associated with them, but still provide the same functionality.

+

Take a look in the tinyos-2.x source tree under tinyos-2.x/tos/chips/msp430/usart to see the full implementation of -these components along with the corresponding Uart implementation.

+these components along with the corresponding Uart implementation. +Implementations on more modern TI processors can be found in +tos/chips/msp430/x{2,5}xxx/usci-v2.

diff --git a/doc/html/tep117.html b/doc/html/tep117.html index ae7df4ece2..a8b1aa48b3 100644 --- a/doc/html/tep117.html +++ b/doc/html/tep117.html @@ -493,9 +493,15 @@