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bug: SIGILL (Illegal instruction) crash on AMD Ryzen 9 3900XT in KVM/QEMU VM #155

@jg-noncelogic

Description

@jg-noncelogic

Environment

  • OS: Ubuntu Linux 6.8.0-90-generic (x64)
  • CPU: AMD Ryzen 9 3900XT 12-Core (running inside KVM/QEMU hypervisor)
  • CPU flags: AVX2, SSE4.2, FMA, BMI2 all present (verified via /proc/cpuinfo)
  • Node.js: v22.22.0 (v24.13.0 also tested, same result)
  • Zvec version: 0.2.0 (@zvec/zvec from npm)
  • Platform package: @zvec/bindings-linux-x64

Reproduction

npm install @zvec/zvec
node -e "const zvec = require('@zvec/zvec'); console.log(Object.keys(zvec));"

Result:

Illegal instruction     (core dumped)

Exit code 132 (SIGILL).

The crash occurs immediately on require() — before any Zvec API is called. The native binary (zvec_node_binding.node) loads but the Proxima C++ engine apparently executes a CPU instruction that the hypervisor doesn't expose, despite the underlying CPU supporting AVX2.

Investigation

  • file zvec_node_binding.node: ELF 64-bit LSB shared object, x86-64
  • ldd: All shared libraries resolve correctly (libstdc++, libm, libgcc_s, libc)
  • CPU supports: AVX, AVX2, SSE4.2, FMA, BMI1, BMI2, SHA_NI
  • This is a virtualized AMD Ryzen 9 3900XT — some instructions may not be forwarded by the hypervisor even though the physical CPU supports them

Expected Behavior

Zvec should either:

  1. Work on AMD Ryzen 9 CPUs in virtualized environments, or
  2. Fail gracefully with a clear error message about unsupported CPU instructions (rather than SIGILL crash)

Suggested Fix

  • Build the prebuilt binary with a lower instruction set baseline (e.g., SSE4.2 instead of AVX-512)
  • Or provide a runtime check at module load that validates CPU instruction availability
  • Or document minimum CPU instruction requirements

Workaround

Using Vectra (pure JS vector DB) as an alternative.

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